Wiring circuit board and method for manufacturing the same
Patent Information
- Application Number
- JP2024114216
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-17
- Publication Date
- 2025-10-07
AI Technical Summary
Conventional printed circuit boards with two-layer wiring terminal sections face limitations in achieving thinness due to their layered structure.
A printed circuit board design featuring a single-layer first and second terminal configuration, with a base insulating layer, intermediate insulating layer, and cover insulating layer, allowing for reduced thickness and improved electrical connectivity through a plating layer protection.
The solution enables thinner terminals with reduced electrical resistance, facilitating efficient transmission of both low and high current values, and allows for reliable attachment of electrodes at the same height.
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Abstract
Description
[Technical field]
[0001] The present invention relates to a wired circuit board and a method for manufacturing the same. [Background technology]
[0002] Conventionally, a suspension substrate having a wiring terminal portion has been proposed (for example, see Patent Document 1 below). On the wiring terminal portion, other electronic devices are mounted.
[0003] Moreover, the wiring terminal portion described in Patent Document 1 includes a first conductor terminal formed on a base insulating layer and a second conductor terminal formed thereon. The first conductor terminal is made of a first conductor layer. The second conductor terminal is made of a second conductor layer. One longitudinal end of each of the first conductor layer and the second conductor layer is the first conductor terminal and the second conductor terminal, respectively, and an intermediate insulating layer is interposed between a longitudinal intermediate portion of the first conductor layer and a longitudinal intermediate portion of the second conductor layer. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2012-198957 A Summary of the Invention [Problem to be solved by the invention]
[0005] In recent years, there has been a demand for thinner wiring terminals. However, the wiring terminal described in Patent Document 1 is made up of two layers, a first conductor terminal made of a first conductor and a second conductor terminal made of a second conductor, and therefore there is a limit to how thin it can be made.
[0006] The present invention provides a wired circuit board including a thin first terminal and a thin second terminal, and a method for manufacturing the same. [Means for solving the problem]
[0007] The present invention (1) includes a wired circuit board comprising: a base insulating layer; a first wiring arranged on one thickness-wise surface of the base insulating layer; an intermediate insulating layer arranged on the one thickness-wise surface of the base insulating layer so as to cover the first wiring; a second wiring arranged on the one thickness-wise surface of the intermediate insulating layer; a first terminal arranged on the one thickness-wise surface of the base insulating layer, electrically connected to the first wiring, and being one layer; and a second terminal arranged on the one thickness-wise surface of the base insulating layer, electrically connected to the second wiring, and being one layer, wherein the first terminal is continuous with the first wiring and the second terminal is discontinuous with the second wiring, and further comprising a connection portion arranged on the one thickness-wise surface of the base insulating layer and continuous with the second terminal, and the connection portion is electrically connected to the second wiring in the thickness direction.
[0008] This wired circuit board is disposed on one surface in the thickness direction of a base insulating layer, and includes a first terminal which is one layer and a second terminal which is one layer. Since both the first terminal and the second terminal are disposed on one surface in the thickness direction of the base insulating layer, they can be thinned. Furthermore, since both the first terminal and the second terminal are one layer, they can be thinned.
[0009] The present invention (2) includes the wired circuit board according to (1), further comprising a plating layer disposed on one surface in the thickness direction and on a side surface of the first wiring.
[0010] In this wired circuit board, the plating layer covers the first wiring, and therefore the first wiring can be protected.
[0011] The present invention (3) includes the wired circuit board according to (1) or (2), in which the second terminals have the same thickness as the first terminals.
[0012] In this wired circuit board, the second terminals have the same thickness as the first terminals, and therefore the structure is simple.
[0013] The present invention (4) includes the wired circuit board according to any one of (1) to (3), in which the second terminal has a thickness of 20 μm or less.
[0014] In this wired circuit board, the thickness of the second terminal is 20 μm or less, so that the second terminal can be reliably made thin.
[0015] The present invention (5) includes the wired circuit board according to any one of (1) to (4), in which the second wiring is thicker than the second terminal.
[0016] In this wired circuit board, the second terminal can be made thin, while the electrical resistance of the thick second wiring can be reduced.
[0017] The present invention (6) includes the wired circuit board according to any one of (1) to (5), in which the second wiring is thicker than the first wiring.
[0018] In this wired circuit board, the thin first wiring can transmit an electric signal with a low current value, while the thick second wiring can transmit a current with a high current value.
[0019] The present invention (7) includes the wired circuit board according to any one of (1) to (6), further comprising an auxiliary wiring arranged on one surface in the thickness direction of the base insulating layer and continuing to the connection portion.
[0020] In this printed circuit board, the second wiring and the auxiliary wiring can form the power wiring, and the total cross-sectional area of the power wiring can be increased. Therefore, the electrical resistance of the power wiring with a high current value can be reduced. As a result, the power current with a high current value can be efficiently transmitted.
[0021] The present invention (8) includes a method for manufacturing a wired circuit board, comprising the steps of: preparing a base insulating layer; forming a first conductor layer on one thickness-wise surface of the base insulating layer, the first conductor layer including a first wiring, a first terminal continuous with the first wiring, a lead continuous with the first terminal, a connection portion, and a second terminal continuous with the connection portion; forming a plating layer on one thickness-wise surface and a side surface of the first wiring by plating using the lead; forming an intermediate insulating layer on one thickness-wise surface of the base insulating layer so as to cover the plating layer; and forming a second conductor layer including a second wiring discontinuous with the second terminal, on one thickness-wise surface of the intermediate insulating layer so as to contact one thickness-wise surface of the connection portion.
[0022] According to this method for manufacturing a wired circuit board, a plating layer can be formed on one surface in the thickness direction and on the side surfaces of the first wiring by plating using the leads. Effect of the Invention
[0023] In the wired circuit board of the present invention, the first terminal and the second terminal are made thinner.
[0024] According to the method for producing the wired circuit board of the present invention, a plating layer can be formed on one surface in the thickness direction and on the side surfaces of the first wiring. [Brief description of the drawings]
[0025] [Figure 1] FIG. 1 is an enlarged plan view of one embodiment of the wired circuit board of the present invention. [Diagram 2] 2A to 2D are cross-sectional views of the wired circuit board shown in FIG. 1, where FIG. 2A is a cross-sectional view along line AA, FIG. 2B is a cross-sectional view along line BB, FIG. 2C is a cross-sectional view along line CC and along line XX of FIGS. 2A to 2B, and FIG. 2D is a cross-sectional view along line DD and along line YY of FIGS. 2A to 2B. [Diagram 3]3A to 3E are cross-sectional views of steps in the method for producing the wired circuit board shown in FIG. 2A, with FIG. 3A showing the first and second steps, FIG. 3B showing the third step, FIG. 3C showing the sixth step, FIG. 3D showing the seventh step, and FIG. 3E showing the eighth step. [Figure 4] 4A to 4G are cross-sectional views showing steps of the method for manufacturing the wired circuit board shown in FIG. 2B, with FIG. 4A showing the first and second steps, FIG. 4B showing the third step, FIG. 4C showing the fourth step, FIG. 4D showing the fifth step, FIG. 4E showing the sixth step, FIG. 4F showing the seventh step, and FIG. 4G showing the eighth step. [Diagram 5] 5A to 5D show a modified example of the wired circuit board of the present invention (a modified example in which the second wiring is thick) and are cross-sectional views corresponding to FIG. 1, where FIG. 5A is a cross-sectional view along line AA in FIG. 1, FIG. 5B is a cross-sectional view along line BB in FIG. 1, FIG. 5C is a cross-sectional view along line CC in FIG. 1 and along line XX in FIGS. 5A to 5B, and FIG. 5D is a cross-sectional view along line DD in FIG. 1 and along line YY in FIGS. 5A to 5B. [Figure 6] FIG. 6 is a cross-sectional view of a further modified example (a modified example further including auxiliary wiring) of the printed circuit board shown in FIG. 2B. [Figure 7] FIG. 7 is a cross-sectional view of a further modified example (a modified example in which the second wiring is thick) of the printed circuit board shown in FIG. [Figure 8] FIG. 8 is a cross-sectional view of a further modified example of the printed circuit board shown in FIG. 2B (a modified example in which the second wiring is connected to the connection portion through an intermediate via). [Figure 9] FIG. 9 is a cross-sectional view of a further modified example (a modified example further including auxiliary wiring) of the printed circuit board shown in FIG. [Figure 10] FIG. 10 is a plan view of a modified example of the wired circuit board shown in FIG. 1 (a modified example in which the first pattern portion and the second pattern portion partially overlap in a plan view and the first wiring is bent). [Figure 11]11A to 11D are cross-sectional views of the wired circuit board shown in FIG. 10, where FIG. 11A is a cross-sectional view along line AA, FIG. 11B is a cross-sectional view along line BB, FIG. 11C is a cross-sectional view along line CC and along line XX of FIGS. 11A to 11B, and FIG. 11D is a cross-sectional view along line DD and along line YY of FIGS. 11A to 11B. [Figure 12] FIG. 12 is a plan view of a modified example of the wired circuit board shown in FIG. 1 (a modified example in which the first pattern portion and the second pattern portion partially overlap in a plan view and the second wiring is bent). [Figure 13] 13A to 13C are cross-sectional views of the wired circuit board shown in FIG. 12, where FIG. 13A is a cross-sectional view along line AA, FIG. 13B is a cross-sectional view along line BB, FIG. 13C is a cross-sectional view along line CC and along line XX of FIGS. 13A to 13B, and FIG. 13D is a cross-sectional view along line DD and along line YY of FIGS. 13A to 13B. [Figure 14] 14A to 14E are cross-sectional views of steps in the method for manufacturing the wired circuit board of Comparative Example 1, where FIG. 14A shows the step of forming a first wiring, FIG. 14B shows the step of forming an intermediate insulating layer, FIG. 14C shows the step of forming a first terminal and a second connection portion, FIG. 14D shows the step of forming a plating layer, FIG. 14E shows the step of forming a cover insulating layer, and FIG. 14F shows the step of removing the second lead and the metal support layer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0026] <One embodiment> An embodiment of the wired circuit board and its manufacturing method of the present invention will be described with reference to Fig. 1 to Fig. 4G. In Fig. 1, a cover insulating layer 4 (described later) is omitted in order to clearly show the relative positions of a first pattern portion 5 and a second pattern portion 6 (described later).
[0027] 1 to 2D, the wired circuit board 1 has a predetermined thickness and a flat belt shape extending long in the front-to-back direction (the up-down direction in the plane of the paper in FIG. 1, and the depth direction in the plane of the paper in FIGS. 2C and 2D). The wired circuit board 1 includes a base insulating layer 2, an intermediate insulating layer 3, and a cover insulating layer 4, which are arranged in this order toward one side in the thickness direction.
[0028] In plan view, the base insulating layer 2 has the same outer shape as the wired circuit board 1. One surface in the thickness direction of the base insulating layer 2 is flat.
[0029] The intermediate insulating layer 3 is disposed on one surface in the thickness direction of the base insulating layer 2. More specifically, the intermediate insulating layer 3 is disposed in a region rearward of the front side on one surface in the thickness direction of the base insulating layer 2. In other words, the intermediate insulating layer 3 is not disposed on the front side on one surface in the thickness direction of the base insulating layer 2. Moreover, the one surface in the thickness direction of the intermediate insulating layer 3 includes a flat surface.
[0030] The insulating cover layer 4 is disposed on one thickness-wise surface of the intermediate insulating layer 3 and on one thickness-wise surface of the insulating base layer 2 that does not overlap with the intermediate insulating layer 3 in the thickness direction.
[0031] Examples of materials for the base insulating layer 2, the intermediate insulating layer 3, and the cover insulating layer 4 include insulating resins such as polyimide. The thickness of each of the base insulating layer 2, the intermediate insulating layer 3, and the cover insulating layer 4 is, for example, 5 μm or more and, for example, 30 μm or less.
[0032] The wired circuit board 1 also includes a first pattern portion 5 and a second pattern portion 6. The first pattern portion 5 is on one side of the wired circuit board 1 in the width direction (direction perpendicular to the thickness direction and the front-to-rear direction), and the second pattern portion 6 is on the other side of the wired circuit board 1 in the width direction.
[0033] As shown in Fig. 1, the first pattern portion 5 extends in the front-to-rear direction in the wired circuit board 1. As shown in Fig. 2A, the first pattern portion 5 includes a base insulating layer 2, a first wiring 7, a first terminal 8, an intermediate insulating layer 3, and a cover insulating layer 4.
[0034] 2A and 2C, the first wiring 7 is disposed on one thickness direction surface of the base insulating layer 2. Specifically, the other thickness direction surface of the first wiring 7 is entirely in contact with one thickness direction surface of the base insulating layer 2. As shown in Fig. 1, the first wiring 7 has a substantially linear shape extending in the front-to-rear direction in a plan view.
[0035] The first terminal 8 is continuous with the tip edge of the first wiring 7 in plan view. As a result, the first wiring 7 and the first terminal 8 are arranged in sequence and continuous toward the tip side. The first terminal 8 is electrically connected to the first wiring 7. The first terminal 8 has a generally rectangular land shape that is wider than the first wiring 7 in plan view.
[0036] The first terminal 8 is disposed on one thickness direction surface of the base insulating layer 2. Specifically, the other thickness direction surface of the first terminal 8 is entirely in contact with one thickness direction surface of the base insulating layer 2. Thus, the first terminal 8 is disposed on the same thickness direction surface of the base insulating layer 2 as the first wire 7.
[0037] 2A and 2D, the first terminal 8 is one layer. In other words, a laminated terminal made of a laminate (multilayer body) in which multiple layers are laminated in the thickness direction is not the first terminal of the present invention. Each of the multiple layers has a thickness of 1 μm or more.
[0038] Examples of materials for the first wiring 7 and the first terminal 8 include conductors such as copper, chromium, and alloys thereof.
[0039] 2A, the thickness T1 of the first wiring 7 and the thickness T2 of the first terminal 8 are, for example, the same or different, and preferably the same. Specifically, the thickness T1 of the first wiring 7 and the thickness T2 of the first terminal 8 are, for example, 3 μm or more, preferably 5 μm or more, and for example, 100 μm or less, preferably 50 μm or less, and more preferably 20 μm or less. If the thickness T2 of the first terminal 8 is equal to or less than the above-mentioned upper limit, the first terminal 8 can be made thin.
[0040] The width of the first wiring 7 is, for example, 5 μm or more and, for example, 50 μm or less. The width and front-to-rear length of the first terminal 8 are, for example, 10 μm or more and, for example, 100 μm or less.
[0041] 1, 2A, and 2C, the intermediate insulating layer 3 in the first pattern portion 5 does not cover the front and rear sides (not shown) of the first wiring 7, but covers a front-to-rear middle portion. The intermediate insulating layer 3 covers one thickness-wise surface and both width-wise side surfaces of the front-to-rear middle portion of the first wiring 7.
[0042] The cover insulating layer 4 in the first pattern portion 5 is disposed on one surface of the intermediate insulating layer 3 in the thickness direction.
[0043] As shown in Fig. 1, the second pattern portion 6 is adjacent to the other widthwise side of the first pattern portion 5. The second pattern portion 6 extends in the front-to-rear direction of the wired circuit board 1. As shown in Fig. 2B, the second pattern portion 6 includes a base insulating layer 2, a second terminal 10, a connection portion 11, an intermediate insulating layer 3, a second wiring 12, and a cover insulating layer 4.
[0044] As shown in FIGS. 1, 2C, and 2D, the base insulating layer 2 in the second pattern portion 6 is continuous with the base insulating layer 2 in the first pattern portion 5 in the width direction, and is the same layer.
[0045] The second terminal 10 is disposed opposite the first terminal 8 at a distance from the other side in the width direction. The second terminal 10 is disposed on one surface in the thickness direction of the base insulating layer 2. Specifically, the entire other surface in the thickness direction of the second terminal 10 is in contact with one surface in the thickness direction of the base insulating layer 2. The second terminal 10 has a generally rectangular land shape in a plan view. The thickness T4, width, and front-rear length of the second terminal 10 are the same as the thickness T2, width, and front-rear length of the first terminal 8, respectively. Specifically, the thickness T4 of the second terminal 10 is, for example, 3 μm or more, preferably 5 μm or more, and, for example, 100 μm or less, preferably 50 μm or less, more preferably 20 μm or less. If the thickness T4 of the second terminal 10 is the above-mentioned upper limit or less, the second terminal 10 can be made thin.
[0046] The second terminal 10 is a single layer. In other words, a laminated terminal made of a laminate (multilayer body) in which multiple layers are laminated in the thickness direction is not the second terminal of the present invention. Each of the multiple layers has a thickness of 1 μm or more.
[0047] The connection portion 11 is continuous with the rear end edge of the second terminal 10 in a plan view, and has a generally linear shape extending in the front-rear direction. More specifically, the connection portion 11 has a generally rectangular shape that is long and narrow in the front-rear direction in a plan view. The connection portion 11 is disposed opposite the front side of the first wiring 7 at a distance on the other side in the width direction. The thickness and width of the connection portion 11 are the same as the width of the second wiring 12 described later. The length of the connection portion 11 in the front-rear direction is not particularly limited, and is, for example, 100 μm or more, preferably 1,000 μm or more, and, for example, 100,000 μm or less, preferably 10,000 μm or less.
[0048] Moreover, the connection portion 11 is disposed on one thickness direction surface of the base insulating layer 2. Specifically, the other thickness direction surface of the connection portion 11 is entirely in contact with one thickness direction surface of the base insulating layer 2. Thus, the connection portion 11 and the second terminal 10 are disposed on one thickness direction surface of the same base insulating layer 2. The connection portion 11 is a single layer.
[0049] 2B and 2C, the intermediate insulating layer 3 in the second pattern portion 6 is continuous with the intermediate insulating layer 3 in the first pattern portion 5 in the width direction and is the same layer. The intermediate insulating layer 3 is disposed on one thickness direction surface of the base insulating layer 2 that does not overlap the connection portion 11 when projected in the thickness direction, and on one thickness direction surface, both width direction side surfaces, and the rear surface (rear end surface) of the rear end portion of the connection portion 11. As a result, the intermediate insulating layer 3 does not cover the front end portion and the front-rear intermediate portion of the connection portion 11, but covers the rear end portion of the connection portion 11.
[0050] As shown in FIG. 1, the second wiring 12 has a generally linear shape extending in the front-rear direction. More specifically, the second wiring 12 has a generally rectangular shape that is long and narrow in the front-rear direction in a plan view. The tip of the second wiring 12 overlaps with the rear side of the connection portion 11 in the thickness direction. More specifically, the other thickness direction surface of the tip of the second wiring 12 contacts one thickness direction surface of a portion of the rear side of the connection portion 11 that does not overlap with the intermediate insulating layer 3. This allows the second wiring 12 to be electrically connected to the connection portion 11 in the thickness direction. The second wiring 12 is also electrically connected to the second terminal 10 via the connection portion 11.
[0051] On the other hand, the second wiring 12 is discontinuous with the second terminal 10. The second wiring 12 is spaced apart from the second terminal 10 in a plan view.
[0052] 2B and 2C , the front-to-back intermediate portion and the rear side portion of the second wiring 12 are disposed on one thickness direction surface of the intermediate insulating layer 3. More specifically, the other thickness direction surfaces of the front-to-back intermediate portion and the rear side portion of the second wiring 12 are entirely in contact with one thickness direction surface of the intermediate insulating layer 3.
[0053] 2C, the thickness T3 of the second wiring 12 is, for example, the same as or different from the thickness T1 of the first wiring 7, and is preferably the same as the thickness T1. The width of the second wiring 12 is, for example, the same as that of the first wiring 7. Also, as shown in FIG. 2B, the thickness T3 of the second wiring 12 is also, for example, the same as the thickness T4 of the second terminal 10.
[0054] Examples of materials for the second terminal 10, the connection portion 11, and the second wiring 12 include the same materials as those for the first wiring 7 and the first terminal 8.
[0055] 2C, the cover insulating layer 4 in the second pattern portion 6 is continuous with the cover insulating layer 4 in the first pattern portion 5 in the width direction and is the same layer. The cover insulating layer 4 is disposed on one thickness direction surface of the intermediate insulating layer 3 so as to cover the second wiring 12. The cover insulating layer 4 covers one thickness direction surface and both width direction side surfaces of the second wiring 12, and one thickness direction surface of the intermediate insulating layer 3 that does not overlap with the second wiring 12 in the thickness direction.
[0056] 3E and 4G, the wired circuit board 1 further includes a plating layer 9. The plating layer 9 is formed on the surfaces of the first wiring 7, the first terminal 8, the second terminal 10, the connection portion 11, and the second wiring 12. The plating layer 9 protects the surfaces of the first wiring 7, the first terminal 8, the second terminal 10, the connection portion 11, and the second wiring 12. The plating layer 9 includes a first plating layer 13 and a second plating layer 14.
[0057] The first plating layer 13 is formed on the surfaces of the first wiring 7, the first terminal 8, the second terminal 10, and the connection portion 11. Specifically, the first plating layer 13 is formed on one thickness direction surface and both width direction side surfaces of the first wiring 7, one thickness direction surface and both width direction side surfaces of the first terminal 8, one thickness direction surface, both width direction side surfaces and a rear side surface of the connection portion 11, and one thickness direction surface and both width direction side surfaces of the second terminal 10. Examples of materials for the first plating layer 13 include metal materials such as nickel, gold, and alloys thereof. The thickness of the first plating layer 13 is, for example, 0.01 μm or more, preferably 0.02 μm or more, and, for example, less than 1 μm, preferably 0.5 μm or less. 3E and 4G, the interfaces between the first plating layer 13 and the first wiring 7, first terminal 8, second terminal 10, and connecting portion 11 are clearly visible, but may be unclear, for example, as shown by dashed dotted lines in FIGS. 2C to 2D, and the first plating layer 13 may be integral with the first wiring 7, first terminal 8, second terminal 10, and connecting portion 11 (the first plating layer 13 may be included in the surface layer of the first wiring 7, first terminal 8, second terminal 10, and connecting portion 11). The first plating layer 13 may be a multi-layer structure.
[0058] As shown in FIG. 4G, the second plating layer 14 is formed on the surface of the second wiring 12. Specifically, the second plating layer 14 is formed on one surface in the thickness direction, the front side surface (tip surface), and both sides in the width direction of the second wiring 12. Examples of the material of the second plating layer 14 include the same material as the material of the first plating layer 13. The thickness of the second plating layer 14 is selected from the range exemplified for the thickness of the first plating layer 13. As shown in FIG. 4G, the interface between the second plating layer 14 and the second wiring 12 is clearly visible, but it may be unclear, for example, as shown by the dashed and dotted line in FIG. 2C, and the second plating layer 14 and the second wiring 12 may be integrally formed (the second plating layer 14 is included in the surface layer of the second wiring 12). The second plating layer 14 may be a multi-layered layer.
[0059] Next, a method for manufacturing the wired circuit board 1 will be described. As shown in Fig. 3A to Fig. 4G, the method for manufacturing the wired circuit board 1 includes a first step of preparing a base insulating layer 2, a second step of forming a first conductor layer 31 including a first wiring 7, a first terminal 8, a second terminal 10, and a connection portion 11, a third step of forming a first plating layer 13, a fourth step of forming an intermediate insulating layer 3, a fifth step of forming a second conductor layer 32 including a second wiring 12, a sixth step of forming a second plating layer 14, a seventh step of forming a cover insulating layer 4, and an eighth step of removing a first lead 17, a second lead 18, and a metal support layer 15. The first to eighth steps are performed in this order.
[0060] In the first step, as shown in Figs. 3A and 4A, first, the insulating base layer 2 is formed on one surface in the thickness direction of the metal supporting layer 15.
[0061] The metal support layer 15 is a support member that supports the base insulating layer 2. The metal support layer 15 also serves as a ground member during electroless plating in the third and sixth steps (see Figs. 3B and 4B) described below, and / or as a conductive member during electrolytic plating in the third and sixth steps (see Figs. 3B and 4B) described below. The metal support layer 15 has a sheet shape extending in the planar direction. Examples of materials for the metal support layer 15 include metals such as iron, copper, and alloys (stainless steel, copper alloys, etc.). The thickness of the metal support layer 15 is not particularly limited.
[0062] The base insulating layer 2 is formed on one surface in the thickness direction of the metal support layer 15, for example, by photolithography of a photosensitive insulating resin composition. At this time, a through hole 19 is formed at the tip of the base insulating layer 2. The through hole 19 penetrates the base insulating layer 2 in the thickness direction. The through hole 19 exposes a part of one surface in the thickness direction of the metal support layer 15.
[0063] In the second step, the first conductor layer 31 including the first wiring 7, the first terminal 8, the second terminal 10, and the connection portion 11 is formed at once. At this time, the first lead 17 and the second lead 18 as an example of a lead are also formed. The first lead 17 is included in the first conductor layer 31. The first lead 17 and the second lead 18 are separate (see the dashed dotted line in FIG. 1) or integral. The first conductor layer 31 is a single layer. The first lead 17 is formed so as to be continuous with the tip edge of the first terminal 8 and to fill the through hole 19. The second lead 18 is formed so as to be continuous with the tip edge of the second terminal 10 and to fill the through hole 19.
[0064] For example, the first conductor layer 31 is formed at once by a pattern forming method such as an additive method or a subtractive method, preferably by an additive method.
[0065] As shown in FIGS. 3B and 4B, in the third step, a first plating layer 13 is formed.
[0066] For example, the first plating layer 13 is formed on the surface of the first conductor layer 31 at once by electroless plating and / or electrolytic plating.
[0067] 3B, in the electroless plating, a uniform first plating layer 13 is formed on the surfaces of the first terminal 8 and the first wiring 7 while the first terminal 8 and the first wiring 7 are grounded by the first lead 17. The first plating layer 13 is also formed on the surface of the first lead 17.
[0068] 4B, in the electroless plating, a uniform first plating layer 13 is formed on the surfaces of the second terminal 10 and the connection portion 11 while the second terminal 10 and the connection portion 11 are grounded via the second lead 18. The first plating layer 13 is also formed on the surface of the second lead 18.
[0069] 3B, in electrolytic plating, power is supplied to the first terminal 8 and the first wiring 7 through the first lead 17, and the first plating layer 13 is formed on the surfaces of the first terminal 8 and the first wiring 7. The first plating layer 13 is also formed on the surface of the first lead 17.
[0070] 4B, in electroless plating, power is supplied to second terminal 10 and connecting portion 11 through second lead 18, and first plating layer 13 is formed on the surfaces of second terminal 10 and connecting portion 11. Note that first plating layer 13 is also formed on the surface of second lead 18.
[0071] 3C and 4C, in the fourth step, the intermediate insulating layer 3 is formed. The intermediate insulating layer 3 is formed in the same manner as in the formation of the base insulating layer 2 in the first step. The intermediate insulating layer 3 is formed on one surface in the thickness direction of the base insulating layer 2 so as to cover the first plating layer 13 corresponding to the front-to-rear middle portion of the first wiring 7 and the first plating layer 13 corresponding to the rear end portion of the connection portion 11.
[0072] As shown in FIG. 4D, in the fifth step, a second conductor layer 32 including a second wiring 12 is formed. The second conductor layer 32 is a single layer. It is formed in the same manner as the formation of the first conductor layer 31 in the second step. The second conductor layer 32 including the second wiring 12 is formed continuously on one thickness direction surface of the intermediate insulating layer 3 and one thickness direction surface of the first plating layer 13 corresponding to the connection portion 11.
[0073] 4E, in the sixth step, the second plating layer 14 is formed. The second plating layer 14 is formed in the same manner as the first plating layer 13. The second plating layer 14 is formed, for example, in the same manner as the third step.
[0074] In the electroless plating, a uniform second plating layer 14 is formed on the surface of the second wiring 12 while the second wiring 12 is grounded by the second lead 18, the second terminal 10 and the connection portion 11.
[0075] On the other hand, in electrolytic plating, power is supplied to the second wiring 12 through the second lead 18, the second terminal 10, and the connection portion 11, and the second plating layer 14 is formed on the surface of the second wiring 12. The second plating layer 14 is also formed on the surface of the first lead 17.
[0076] 2C, 3D, and 4F, in the seventh step, the cover insulating layer 4 is formed. The cover insulating layer 4 is formed in the same manner as the base insulating layer 2 in the first step. The cover insulating layer 4 is formed on one surface in the thickness direction of the intermediate insulating layer 3 so as to cover the second plating layer 14.
[0077] In the eighth step, as shown by the solid lines in Fig. 3E and the solid lines in Fig. 4G, first, the first lead 17 and the second lead 18 are removed. For example, the first lead 17 and the second lead 18 are etched.
[0078] In an eighth step, the metal supporting layer 15 is then removed as shown by the imaginary lines in Fig. 3E and Fig. 4G (eighth step). For example, the metal supporting layer 15 is etched or peeled off.
[0079] In this way, the wired circuit board 1 is obtained.
[0080] If necessary, the area including the through-hole 19 in the base insulating layer 2 can be removed by contour processing.
[0081] (Effects of the first embodiment) The wired circuit board 1 is disposed on one surface in the thickness direction of the base insulating layer 2, and includes a first terminal 8 which is one layer, and a second terminal 10 which is one layer. Both the first terminal 8 and the second terminal 10 are disposed on one surface in the thickness direction of the base insulating layer 2, and therefore can be thinned. Both the first terminal 8 and the second terminal 10 are one layer, and therefore can be thinned.
[0082] Furthermore, in this wired circuit board 1, the first plating layer 13 covers the first wires 7, so that the first wires 7 can be protected.
[0083] As shown in FIG. 2D, in this wired circuit board 1, thickness T4 of second terminal 10 is the same as thickness T2 of first terminal 8. Therefore, for example, when external substrate 33 having two electrodes 35 on the other thickness-wise surface is mounted on the tip portion of wired circuit board 1, two electrodes 35 at the same height (level) can be easily and reliably brought into contact with one thickness-wise surface of first terminal 8 and second terminal 10, which have the same thickness.
[0084] In addition, in this wired circuit board 1, if the thickness T4 of the second terminal 10 is 20 μm or less, the second terminal 10 can be reliably made thin.
[0085] (Modification) In the following modifications, the same components and steps as those in the above-described embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted. In addition, each modification can achieve the same effects as those in the above-described embodiment, unless otherwise specified. Furthermore, the embodiment and its modifications can be appropriately combined.
[0086] 5B and 5C, in this modification, the thickness T3 of the second wiring 12 is thicker than the thickness T4 of the second terminal 10. Specifically, the ratio (T3 / T4) of the thickness T3 of the second wiring 12 to the thickness T4 of the second terminal 10 is, for example, 1.1 or more, preferably 1.5 or more, more preferably 2 or more, and is, for example, 10 or less.
[0087] In this modified example, the second wiring 12 transmits, for example, a power supply current (for example, a large current of 10 mA or more, or even 100 mA or more).
[0088] In this modification, the second terminal 10 can be made thin, while a high-current power supply current can be transmitted through the thick second wiring 12. Furthermore, if the ratio (T3 / T4) is equal to or greater than the lower limit, the above effect can be improved. In this case, the connection portion 11 connected to the second terminal 10 is made wider.
[0089] Furthermore, the thickness T3 of the second wiring 12 is thicker than the thickness T1 of the first wiring 7. The ratio (T3 / T1) of the thickness T3 of the second wiring 12 to the thickness T1 of the first wiring 7 is, for example, 1.1 or more, preferably 1.5 or more, more preferably 2 or more, and is, for example, 10 or less.
[0090] Specifically, the first wiring 7 transmits an electrical signal (for example, a weak current of less than 10 mA, or even less than 1 mA).
[0091] In this modification, a weak electrical signal can be transmitted through the thin first wiring 7, while a high-current power supply current can be transmitted through the thick second wiring 12. Furthermore, if the ratio (T3 / T1) is equal to or greater than the above-mentioned lower limit, the above-mentioned effect can be improved.
[0092] As shown in FIG. 6, the wired circuit board 1 further includes an auxiliary wire 20.
[0093] In this modified example, second pattern portion 6 includes auxiliary wiring 20.
[0094] The auxiliary wiring 20 is disposed on one surface in the thickness direction of the base insulating layer 2, and is continuous with the connection portion 11. The auxiliary wiring 20 is included in the first conductor layer 31. The auxiliary wiring 20 has a linear shape extending from the rear end edge of the connection portion 11 toward the front side. In this modification, the auxiliary wiring 20 overlaps with the second wiring 12 when projected in the thickness direction. An intermediate insulating layer 3 is interposed between the auxiliary wiring 20 and the second wiring 12.
[0095] In this modification, when the second terminal 10 is used as a power supply terminal, a power supply current having a high current value input to the second terminal 10 is branched to the second wiring 12 and the auxiliary wiring 20. The second wiring 12 and the auxiliary wiring 20 function as power supply wiring.
[0096] On the other hand, in one embodiment, only the second wiring 12 functions as a power supply wiring, and therefore the cross-sectional area of the power supply wiring (the area of the cross section perpendicular to the current transmission direction) is small.
[0097] On the other hand, in this modification, the total cross-sectional area of the second wiring 12 and the auxiliary wiring 20 is larger than that of the first embodiment. Therefore, the electrical resistance of the power supply wiring can be reduced. As a result, a power supply current with a high current value can be efficiently transmitted.
[0098] Furthermore, the thickness T3 of the second wiring 12 in the modified example shown in FIG. 6 can be made thicker as shown in FIG. 7, and specifically, can be made thicker than the thickness T4 of the second terminal 10 and the thickness T1 of the first wiring 7 (see FIG. 5A).
[0099] This allows the total cross-sectional area of the power supply wiring made up of the second wiring 12 and the auxiliary wiring 20 to be further increased, thereby further reducing the electrical resistance of the power supply wiring. As a result, a high-current power supply current can be transmitted more efficiently.
[0100] As shown in FIG. 8, the front side portion of the second wiring 12 can be electrically connected to the connection portion 11 through an intermediate via 21.
[0101] The intermediate via 21 is a through hole that penetrates the intermediate insulating layer 3 in the thickness direction. A part of the front side part of the second wiring 12 is filled in the intermediate via 21. In the intermediate via 21, the other thickness direction surface of the second wiring 12 contacts one thickness direction surface of the connection part 11.
[0102] As shown in FIG. 9, the connection portion 11 shown in FIG.
[0103] 10 and 12, first pattern portion 5 and second pattern portion 6 partially overlap in a plan view. Specifically, a part of first wiring 7 and a part of second wiring 12 overlap when projected in the thickness direction.
[0104] In the modification shown in FIGS. 10 to 11D, the first wiring 7 has a first non-overlapping portion 22 and a first overlapping portion .
[0105] The first non-overlapping portion 22 has a generally L-shape in plan view. Specifically, the first non-overlapping portion 22 extends rearward from the rear end edge of the first terminal 8 in parallel with the second wiring 12 in plan view, and then bends toward the second wiring 12 side (the other side in the width direction) to reach just before the second wiring 12.
[0106] In a plan view, the first overlapping portion 23 extends from the other widthwise end edge of the first non-overlapping portion 22 to the second wiring 12 and toward the rear while overlapping with the second wiring 12.
[0107] On the other hand, in the modification shown in FIGS. 12 to 13D, second wiring 12 has a generally L-shape in plan view, and has second non-overlapping portion 24 and second overlapping portion 25. In the modification shown in FIGS.
[0108] The second non-overlapping portion 24 does not overlap with the first wiring 7 in the thickness direction in a plan view, and the second overlapping portion 25 overlaps with the first wiring 7.
[0109] The second non-overlapping portion 24 extends from the intermediate via 21 toward the first wiring 7 side (one side in the width direction) and reaches just before the first wiring 7 in a plan view.
[0110] In a plan view, the second overlapping portion 25 extends from one widthwise edge of the second non-overlapping portion 24 to the first wiring 7, and then extends rearward while overlapping with the first wiring 7.
[0111] In the modified examples shown in FIGS. 10 to 13D, first pattern portion 5 and second pattern portion 6 overlap in plan view.
[0112] In the modified example shown in FIGS. 10 to 13D, the first wiring 7 and the second wiring 12 partially overlap each other, so that the first wiring 7 and the second wiring 12 can be routed in a narrow space.
[0113] Next, in order to aid in understanding the present invention, a wired circuit board 1 of Comparative Example 1 will be described with reference to Figs. 14A to 14F.
[0114] In Comparative Example 1, as shown in FIG. 14F, unlike the embodiment (see FIG. 2A), the first terminal 8 is discontinuous with the first wiring 7. The first terminal 8 is electrically connected to the first wiring 7 via the second connection portion 30. The second connection portion 30 is continuous with the rear end edge of the first terminal 8, extends rearward from the rear end edge of the first terminal 8, runs up the step formed by the tip portion of the first wiring 7, and contacts one surface in the thickness direction of the tip portion of the first terminal 8.
[0115] To manufacture the wired circuit board 1 of Comparative Example 1, first, as shown in Fig. 14A, a first conductor layer 31 including a first wiring 7 is formed on one surface in the thickness direction of a base insulating layer 2. At this time, the first wiring 7 is not located at the front side of the base insulating layer 2 (the area near the through hole 19).
[0116] Next, as shown by the solid line in Fig. 14B, the intermediate insulating layer 3 is formed on one thickness direction surface of the base insulating layer 2 so as to cover the first wiring 7, and then, as shown in Fig. 14C, a second conductor layer 32 including a first terminal 8 and a second connection portion 30 is formed on one thickness direction surface of the base insulating layer 2 and on one thickness direction surface of the tip portion of the first wiring 7. At this time, a second lead 18 is also formed.
[0117] 14D, a plating layer 9 is formed on the surface of the second conductor layer 32 including the first terminal 8 and the second connection portion 30. However, the plating layer 9 is not formed on the surface of the first conductor layer 31 including the first wiring 7.
[0118] Thereafter, as shown in FIG. 14E, the cover insulating layer 4 is formed, and then, as shown in FIG. 14F, the second lead 18 and the metal support layer 15 are removed in that order.
[0119] 14B, in the manufacturing method of Comparative Example 1, a uniform plating layer 9 (virtual line) cannot be formed on the surface of the first conductor layer 31 including the first wiring 7 exposed from the intermediate insulating layer 3 because stable plating cannot be performed using the through holes 19 and the metal support layer 15. That is, as shown in FIG. 14A, when the first wiring 7 is formed, the space for forming the first lead 17 is limited in order to secure the space for the first terminal 8 to be formed later, making it difficult to form the first lead 17. As a result, the above-mentioned plating layer 9 cannot be formed on the surface of the first conductor layer 31.
[0120] In contrast, in one embodiment, as shown in Fig. 3A, when forming the first conductor layer 31 including the first terminal 8 and the first wiring 7 which are continuous with each other, the first lead 17 is also formed. Therefore, in the third step, as shown in Fig. 3B, stable plating can be performed on the surface of the first wiring 7 by utilizing the through hole 19 and the metal support layer 15, and a uniform plating layer 9 can be formed.
[0121] 14B, even if an attempt is made to plate the surface of the first wiring 7 without using a lead, the absence of a lead in electrolytic plating makes it impossible to supply power to the first wiring 7 and therefore impossible to form an electrolytic plating layer on the surface of the first wiring 7. On the other hand, in the case of electroless plating, the first wiring 7 is not grounded by a lead, resulting in an extremely non-uniform electroless plating layer, which does not adequately protect the first terminal 8.
[0122] Alternatively, as shown in FIGS. 3E and 4G, the metal supporting layer 15 may not be removed and the wired circuit board 1 may include the metal supporting layer 15. FIG.
[0123] Moreover, the plating layer 9 may have only either the first plating layer 13 or the second plating layer 14. Furthermore, the wired circuit board 1 does not have to have the plating layer 9. [Explanation of symbols]
[0124] 1 Wiring circuit board 2 Base insulation layer 3 Intermediate insulation layer 7 1st wiring 8 1st terminal 9 Plating layer 10 2nd terminal 11 Connection 12 2nd wiring 17 1st Lead 18 2nd Lead 20 Auxiliary wiring 31 First conductor layer 32 Second conductor layer T2 Thickness of first terminal T3 Thickness of second wiring T4 Thickness of second terminal
Claims
1. a base insulating layer; a first conductor layer disposed on one surface of the insulating base layer in a thickness direction; an intermediate insulating layer disposed on one surface of the base insulating layer in the thickness direction so as to cover the first conductor layer; a second conductor layer disposed on one surface of the intermediate insulating layer in a thickness direction; Equipped with The first conductor layer is A first wiring; a first terminal that is continuous with the first wiring and is disposed on one surface of the insulating base layer in the thickness direction, and that is a single layer; a second terminal that is a single layer and is disposed on one surface of the insulating base layer in the thickness direction; a connection portion continuous with the second terminal; Equipped with The second conductor layer is A printed circuit board comprising a second wiring electrically connected to the connection portion of the first conductor layer in a thickness direction.
2. The printed circuit board according to claim 1 , further comprising a plating layer disposed on one surface in the thickness direction and on a side surface of the first wiring.
3. 3. The printed circuit board according to claim 1, wherein the second terminals have the same thickness as the first terminals.
4. 4. The wired circuit board according to claim 1, wherein the second terminal has a thickness of 20 μm or less.
5. 5. The printed circuit board according to claim 1, wherein the second wiring is thicker than the first wiring.
6. providing a base insulating layer; forming a first conductor layer on one surface in a thickness direction of the base insulating layer, the first conductor layer including a first wiring, a first terminal continuous with the first wiring, a lead continuous with the first terminal, a connection portion, and a second terminal continuous with the connection portion; forming a plating layer on one surface and a side surface of the first wiring in a thickness direction by plating using the lead; forming an intermediate insulating layer on one surface of the insulating base layer in the thickness direction so as to cover the plating layer; forming a second conductor layer including a second wiring that is discontinuous with the second terminal on one surface in the thickness direction of the intermediate insulating layer so that the second wiring contacts one surface in the thickness direction of the connecting portion; A method for manufacturing a wired circuit board, comprising: