SiC EPITAXIAL WAFER

Abstract

To provide a SiC substrate capable of suppressing warpage after performing a surface treatment, such as lamination of a SiC epitaxial layer.SOLUTION: A SiC epitaxial wafer has a SiC substrate, and a SiC epitaxial layer laminated on one surface of the SiC substrate. A diameter of the SiC substrate is 195 mm or more, and Warp is 50 μm or less.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a SiC epitaxial wafer. [Background technology]

[0002] Silicon carbide (SiC) has an electric breakdown field one order of magnitude larger than silicon (Si) and a band gap three times larger. Silicon carbide (SiC) also has properties such as a thermal conductivity about three times higher than silicon (Si). For this reason, silicon carbide (SiC) is expected to be applied to power devices, high-frequency devices, high-temperature operating devices, and the like. For this reason, SiC epitaxial wafers have come to be used in the above-mentioned semiconductor devices in recent years.

[0003] A SiC epitaxial wafer is obtained by laminating a SiC epitaxial layer on the surface of a SiC substrate cut from a SiC ingot. Hereinafter, the substrate before laminating the SiC epitaxial layer is referred to as a SiC substrate, and the substrate after laminating the SiC epitaxial layer is referred to as a SiC epitaxial wafer.

[0004] SiC epitaxial wafers may warp because they have a SiC epitaxial layer on one side. Warping of SiC epitaxial wafers has adverse effects on semiconductor device processes. For example, warping can cause focus deviations in photolithography processing. Warping can also cause a decrease in the positional accuracy of the wafer during the transfer process. Furthermore, SiC epitaxial wafers may warp significantly due to oxide film stacking and ion implantation during semiconductor processing.

[0005] On the other hand, the SiC substrate before laminating the SiC epitaxial layer is flat, and it is difficult to predict the warpage of the SiC epitaxial wafer or the warpage during the semiconductor process in the state of the SiC substrate. For example, Patent Document 1 describes the use of the difference in the wave number shift amount of the Raman scattered light in order to predict the value of the warpage of the SiC single crystal product wafer after polishing before the polishing process is completed. Patent Document 2 discloses a substrate in which the Raman spectrum is measured in the thickness direction of the substrate and the distribution of stress in the thickness direction is reduced. Also, for example, Patent Document 3 describes that the warpage of the SiC substrate is reduced by alleviating the crystallographic stress. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2015-59073 A [Patent Document 2] International Publication No. 2019 / 111507 [Patent Document 3] US Patent Application Publication No. 2021 / 0198804 [Patent Document 4] JP 2007-290880 A Summary of the Invention [Problem to be solved by the invention]

[0007] In Patent Documents 1 and 2, the internal stress of the substrate is evaluated using Raman shift, but the Raman shift does not include directional information. In Patent Documents 1 to 3, it is described that the stress is reduced, but the warpage of the SiC epitaxial wafer cannot be sufficiently suppressed by only reducing the stress. In Patent Document 4, it is described that the crack of the ingot is suppressed by increasing the compressive stress in the circumferential direction of the ingot, but the warpage of the SiC epitaxial wafer cannot be sufficiently suppressed.

[0008] The present invention has been made in consideration of the above problems, and has an object to provide a SiC substrate that can suppress warping after surface treatment such as stacking a SiC epitaxial layer, stacking an oxide film, or performing ion implantation. [Means for solving the problem]

[0009] The inventors have found that by making the tensile stress in the circumferential direction near the outer periphery larger than the tensile stress in the circumferential direction near the center, it is possible to suppress warpage after surface treatment such as laminating a SiC epitaxial layer. That is, in order to solve the above problems, the present invention provides the following means.

[0010] (1) In the SiC substrate of the first aspect, when a point 10 mm inside from the outer periphery edge in the [11-20] direction from the center is defined as a first outer periphery point, and any point within a circle having a diameter of 10 mm from the center is defined as a first center point, the tensile stress in the <1-100> direction, which is the circumferential direction of the first outer periphery point at the first outer periphery point, is greater than the tensile stress in the <1-100> direction, which is the same direction as the circumferential direction of the first outer periphery point at the first center point.

[0011] (2) In the SiC substrate according to the above aspect, when a point 10 mm inside from the outer periphery end in the [-1100] direction from the center is defined as a second outer periphery point, the tensile stress in the <11-20> direction, which is the same direction as the circumferential direction of the second outer periphery point, at the second outer periphery point may be greater than the tensile stress in the <11-20> direction, which is the same direction as the circumferential direction of the second outer periphery point at the first central point.

[0012] (3) In the SiC substrate of the second aspect, when a point 10 mm inside from the outer periphery end in the [-1100] direction from the center is defined as a second outer periphery point, and any point within a circle having a diameter of 10 mm from the center is defined as a first center point, the tensile stress in the <11-20> direction, which is the circumferential direction of the second outer periphery point at the second outer periphery point, is greater than the tensile stress in the <11-20> direction, which is the same direction as the circumferential direction of the second outer periphery point at the first center point.

[0013] (4) In the SiC substrate according to the above aspect, when a point 10 mm inside from the outer circumferential edge in the [11-20] direction from the center is defined as a first outer circumferential point, the tensile stress in the <1-100> direction, which is the same direction as the circumferential direction of the first outer circumferential point, at the first outer circumferential point may be greater than the tensile stress in the <1-100> direction, which is the same direction as the circumferential direction of the first outer circumferential point, at the first central point.

[0014] (5) In the SiC substrate according to the above aspect, the tensile stress in the circumferential direction at the first outer periphery point may be 10 MPa or more greater than the tensile stress acting in the same direction as the circumferential direction at the first central point at the first outer periphery point. Also, the tensile stress in the circumferential direction at the second outer periphery point may be 10 MPa or more greater than the tensile stress acting in the same direction as the circumferential direction at the first central point at the second outer periphery point.

[0015] (6) In the SiC substrate according to the above aspect, the tensile stress in the circumferential direction at the first outer periphery point may be 30 MPa or more greater than the tensile stress acting in the same direction as the circumferential direction at the first central point at the first outer periphery point. Also, the tensile stress in the circumferential direction at the second outer periphery point may be 30 MPa or more greater than the tensile stress acting in the same direction as the circumferential direction at the first central point at the second outer periphery point.

[0016] (7) The SiC substrate according to the above aspect may have a diameter of 145 mm or more.

[0017] (8) The SiC substrate according to the above aspect may have a diameter of 195 mm or more.

[0018] (9) In the SiC substrate according to the above aspect, the first surface may have a surface roughness (Ra) of 1 nm or less.

[0019] (10) The SiC substrate according to the above aspect may have a warp of 50 μm or less.

[0020] (11) In the SiC substrate according to the above aspect, the first surface may have a bow of 30 μm or less when a surface connecting a support located at a position overlapping with a circumference 7.5 mm inward from the outermost circumference and the overlapping portion as viewed in the thickness direction is used as a reference surface.

[0021] (12) A SiC epitaxial wafer according to a third aspect includes a SiC substrate according to the above aspect and a SiC epitaxial layer laminated on one surface of the SiC substrate.

[0022] (13) The SiC epitaxial wafer according to the above aspect may have a warp of 50 μm or less.

[0023] (14) In the SiC epitaxial wafer according to the above aspect, the surface of the epitaxial layer may have a bow of 30 μm or less when the reference plane is a plane passing through the portion that overlaps with a support located at a position that overlaps with a circumference 7.5 mm inward from the outermost circumference, as viewed in the thickness direction. Effect of the Invention

[0024] The SiC substrate according to the above aspect can suppress warping after surface treatment such as laminating an SiC epitaxial layer. [Brief description of the drawings]

[0025] [Figure 1] FIG. 2 is a schematic diagram for explaining warpage of a SiC epitaxial wafer. [Diagram 2] FIG. 2 is a plan view of the SiC substrate according to the present embodiment. [Diagram 3] FIG. 13 is a schematic diagram for explaining a method for measuring a tensile stress in the circumferential direction at a first outer periphery point. [Figure 4] FIG. 13 is a schematic diagram for explaining a method for measuring a tensile stress in the circumferential direction at a second outer periphery point. [Diagram 5] FIG. 1 is a diagram showing a schematic diagram of a method for evaluating the shape of a SiC substrate by Warp. [Figure 6] FIG. 1 is a diagram showing a schematic diagram of a method for evaluating the shape of a SiC substrate by Bow. [Figure 7]FIG. 1 is a schematic diagram for explaining a sublimation method, which is an example of a manufacturing apparatus for a SiC ingot. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] The SiC substrate and the like according to this embodiment will be described in detail below with reference to the drawings as appropriate. The drawings used in the following description may show characteristic parts in an enlarged scale for the sake of convenience in order to make the characteristics of this embodiment easier to understand, and the dimensional ratios of each component may differ from the actual ones. The materials, dimensions, and the like exemplified in the following description are merely examples, and the present invention is not limited thereto, and may be appropriately modified and implemented within the scope of the present invention.

[0027] First, we will explain the warpage of the SiC epitaxial wafer 20. Fig. 1 is a schematic diagram for explaining the warpage of the SiC epitaxial wafer 20. The SiC epitaxial wafer 20 is obtained by stacking a SiC epitaxial layer 11 on a first surface 10a of a SiC substrate 10. The SiC epitaxial wafer 20 has the SiC substrate 10 and the SiC epitaxial layer 11.

[0028] The SiC substrate 10 is almost flat without any significant warping. Almost flat means that there are no parts that rise up significantly when placed on a flat surface.

[0029] In order to obtain high-quality SiC that can operate a device, a SiC epitaxial layer 11 is laminated on a SiC substrate 10. Furthermore, before laminating the SiC epitaxial layer 11, mechanical processing such as polishing is often performed. In this case, a processing-affected layer is formed on a first surface 10a of the SiC substrate 10. When the SiC epitaxial layer 11 is laminated or a processing-affected layer is formed on one surface of the SiC substrate 10, the SiC epitaxial wafer 20 may warp.

[0030] "First embodiment" 2 shows a SiC substrate 10 according to this embodiment. The SiC substrate 10 is made of SiC. The polytype of the SiC substrate 10 is not particularly limited and may be any of 2H, 3C, 4H, and 6H. The SiC substrate 10 is, for example, 4H—SiC.

[0031] The planar shape of the SiC substrate 10 is approximately circular. The SiC substrate 10 may have an orientation flat OF or a notch for grasping the direction of the crystal axis. The diameter of the SiC substrate 10 is, for example, 145 mm or more, preferably 195 mm or more. The larger the diameter of the SiC substrate 10, the larger the absolute amount of warping becomes even with the same curvature. A SiC epitaxial wafer with a large warp has a large impact on the subsequent processes, and therefore it is required to suppress the warp. In other words, the present invention is more effective when applied to a SiC substrate 10 with a large diameter.

[0032] In the SiC substrate 10 according to this embodiment, the tensile stress in the <1-100> direction, which is the circumferential direction of the first outer periphery point 1, is greater than the tensile stress in the <1-100> direction, which is the same direction as the circumferential direction of the first outer periphery point 1 at the first central point 2. The tensile stress in the circumferential direction of the first outer periphery point 1 is preferably 10 MPa or more greater, and more preferably 30 MPa or more greater, than the tensile stress acting in the same direction as the circumferential direction of the first outer periphery point at the first central point 2.

[0033] The first outer periphery point 1 is located in the outer periphery 5 10 mm inward from the outer periphery edge of the SiC substrate 10. The first outer periphery point 1 is a point in the outer periphery 5 in the direction [11-20] from the center of the SiC substrate 10. The first center point 2 is an arbitrary point within the center portion 6. The center portion 6 is an area within a circle having a diameter of 10 mm from the center of the SiC substrate 10. The first center point 2 coincides with the center of the SiC substrate 10, for example.

[0034] Here, brackets indicating the direction of Miller indices are <> and []. <1-100> includes [-1100] due to the symmetry of the crystal direction. <11-20> includes [11-20] due to the symmetry of the crystal direction.

[0035] Tensile stress is calculated as the product of strain ε and Young's modulus. Strain ε is calculated by (a0-a) / a0. a0 is the reference lattice constant. In the case of 4H-SiC, a0 is approximately 3.08 Å. a is the lattice constant obtained by X-ray diffraction (XRD). The direction of stress is obtained from the direction of incident X-rays in X-ray diffraction. In the present invention, tension is treated as a positive value and compression as a negative value. When discussing the magnitude of stress, the magnitude is defined by the absolute value. The smaller the lattice constant a is compared to the reference lattice constant a0, the larger the strain ε becomes, and as a result, the tensile stress becomes larger.

[0036] FIG. 3 is a schematic diagram for explaining a method for measuring the tensile stress in the circumferential direction at the first outer periphery point 1. The circumferential direction at the first outer periphery point 1 is a direction (hereinafter referred to as the first direction) perpendicular to the line segment connecting the center of the SiC substrate 10 and the first outer periphery point 1. The first direction is the <1-100> direction. When measuring the tensile stress in the circumferential direction at the first outer periphery point 1, X-rays are irradiated from the first direction. By irradiating the X-rays from this circumferential direction to the SiC substrate 10, the lattice constant a in the circumferential direction at the first outer periphery point 1 is obtained. Then, using this lattice constant a, the stress in the circumferential direction at the first outer periphery point 1 is obtained from the above formula. Note that when the measured lattice constant a is smaller than the reference lattice constant a0, it is considered that a tensile stress is acting.

[0037] The tensile stress acting at the first central point 2 in the same direction as the circumferential direction of the first outer periphery point 1 is determined by irradiating X-rays at the first central point 2 in the same manner as the first outer periphery point 1. The same direction as the circumferential direction of the first outer periphery point 1 is the first direction described above. The first outer periphery point 1 and the first central point 2 are compared for the magnitude of the tensile stress acting in the same direction (first direction).

[0038] When the tensile stress in the circumferential direction at the first outer periphery point 1 is greater than the tensile stress acting in the same direction as the circumferential direction of the first outer periphery point 1 at the first central point 2, the SiC epitaxial wafer 20 is less likely to warp after the SiC epitaxial layer 11 is laminated. This is thought to be because a strong tensile stress is applied in the circumferential direction at the first outer periphery point 1, and a force acts on the SiC epitaxial wafer 20 to spread the SiC epitaxial wafer 20 outward.

[0039] Furthermore, in the SiC substrate 10 according to this embodiment, the tensile stress in the circumferential direction at the second outer periphery point 3 is preferably greater than the tensile stress acting in the same direction as the circumferential direction of the second outer periphery point 3 at the first central point 2. Furthermore, the tensile stress in the circumferential direction at the second outer periphery point 3 is preferably greater by 10 MPa or more, and more preferably greater by 30 MPa or more, than the tensile stress acting in the same direction as the circumferential direction of the second outer periphery point 3 at the first central point 2.

[0040] The second outer periphery point 3 is located in the outer periphery 5 10 mm inward from the outer periphery edge of the SiC substrate 10. The second outer periphery point 3 is a point in the outer periphery 5 in the [-1100] direction from the center of the SiC substrate 10.

[0041] FIG. 4 is a schematic diagram for explaining a method for measuring the tensile stress in the circumferential direction at the second outer periphery point 3. The circumferential direction at the second outer periphery point 3 is a direction (hereinafter referred to as the second direction) perpendicular to the line segment connecting the center of the SiC substrate 10 and the second outer periphery point 3. The second direction is the <11-20> direction. When measuring the tensile stress in the circumferential direction at the second outer periphery point 3, X-rays are irradiated from the second direction. By irradiating the X-rays from this circumferential direction to the SiC substrate 10, the lattice constant a in the circumferential direction at the second outer periphery point 3 is obtained. Then, using this lattice constant a, the tensile stress in the circumferential direction at the second outer periphery point 3 is obtained from the above formula.

[0042] When comparing the tensile stress in the circumferential direction of the second outer periphery point 3 with the tensile stress acting in the same direction as the circumferential direction of the second outer periphery point 3 at the first central point 2, the tensile stress in the <11-20> direction, which is the same direction as the circumferential direction of the second outer periphery point 3 at the first central point 2, is obtained. The tensile stress acting in the same direction as the circumferential direction of the second outer periphery point 3 at the first central point 2 is obtained by irradiating X-rays to the first central point 2 in the same manner as for the second outer periphery point 3. The direction that is the same as the circumferential direction of the second outer periphery point 3 is the second direction described above.

[0043] When the tensile stress in the circumferential direction at the second outer periphery point 3 is greater than the tensile stress acting in the same direction as the circumferential direction at the second outer periphery point 3 at the first center point 2, the SiC epitaxial wafer 20 is less likely to warp after the SiC epitaxial layer 11 is laminated. This is thought to be because the forces that try to spread the SiC epitaxial wafer 20 outward act in different directions within the plane of the SiC epitaxial wafer 20.

[0044] Furthermore, in the SiC substrate 10 according to this embodiment, the tensile stress in the circumferential direction at any position in the outer circumferential portion 5 is preferably greater than the tensile stress at the first center point 2. Here, the tensile stress at the first center point 2 is a tensile stress acting in the same direction as the circumferential direction at the measurement point. Furthermore, the average tensile stress applied to the region outside the outer circumferential portion 5 is preferably greater than the average tensile stress applied to the central portion 6. Here, the average tensile stress is, for example, an average value of tensile stresses measured at five different points in the region.

[0045] The surface of the SiC substrate 10 is often ground. The surface roughness (Ra) of the first surface 10a of the SiC substrate 10 is preferably, for example, 1 nm or less. The first surface 10a is, for example, the surface on which the SiC epitaxial layer 11 is stacked.

[0046] Both the first surface 10a and the second surface 10b of the SiC substrate 10 may be ground. The first surface 10a is, for example, a Si surface, and the second surface 10b is, for example, a C surface. The relationship between the first surface 10a and the second surface 10b may be reversed. The first surface 10a and the second surface 10b may both be mirror-finished surfaces with residual scratches or the like, or both be CMP-treated surfaces with chemical mechanical polishing (CMP), and the degree of polishing may be different between the first surface 10a and the second surface 10b. A processing-affected layer is formed on the mirror surface with residual scratches or the like, and almost no processing-affected layer is formed on the CMP-treated surface. The processing-affected layer is a portion that has been damaged by processing and has a collapsed crystal structure.

[0047] For example, when the first surface 10a is a mirror-ground surface and the second surface 10b is a CMP-treated surface, the Twyman effect occurs in the SiC substrate 10 due to the difference in surface conditions between the two surfaces. The Twyman effect is a phenomenon in which, when a difference occurs in the residual stress between the two surfaces of the substrate, a force acts to compensate for the difference in stress between the two surfaces. The Twyman effect can cause warping of the SiC epitaxial wafer 20. In other words, the present invention is more effective when applied to a SiC substrate 10 having different surface conditions between the first surface 10a and the second surface 10b.

[0048] The SiC substrate 10 according to this embodiment preferably has a warp of 50 μm or less, and more preferably has a warp of 30 μm or less. If a SiC substrate 10 having a warp of 50 μm or less and satisfying the above tensile stress relationship is used, the warp of the SiC epitaxial wafer 20 can be sufficiently reduced. Therefore, the deterioration of accuracy during transportation of the SiC epitaxial wafer 20 can be avoided, and the focus can be appropriately adjusted even in a fine lithography process.

[0049] FIG. 5 is a diagram showing a schematic diagram of a method for evaluating the shape (deformation) of a SiC substrate by Warp. Warp is the distance in the thickness direction between the highest point hp and the lowest point lp of the first surface 10a. The larger the Warp, the more the SiC substrate 10 is determined to be deformed. First, the SiC substrate 10 is placed on three support points placed on the flat surface F. An imaginary surface Slp that passes through the lowest point lp of the first surface 10a and is parallel to the flat surface F, and an imaginary surface Shp that passes through the highest point hp of the first surface 10a and is parallel to the flat surface F are obtained. Warp is obtained as the distance in the height direction between the imaginary surface Slp and the imaginary surface Shp. The height direction is perpendicular to the flat surface F and is a direction away from the flat surface F.

[0050] The SiC substrate 10 according to this embodiment preferably has a bow of 30 μm or less, and more preferably has a bow of 10 μm or less. The bow is also preferably −30 μm or more. If a SiC substrate 10 having an absolute value of the bow of 30 μm or less and satisfying the above tensile stress relationship is used, the warpage of the SiC epitaxial wafer 20 can be sufficiently reduced. Therefore, a decrease in accuracy during transportation of the SiC epitaxial wafer 20 can be avoided, and the focus can be appropriately adjusted even in a fine lithography process.

[0051] 6 is a diagram showing a schematic diagram of a method for evaluating the shape (deformation) of a SiC substrate based on the bow. The bow is the height direction position of the center c of the SiC substrate 10 relative to the reference plane Sr. In other words, the bow is the signed distance of the center c of the SiC substrate 10 from the reference plane Sr. The reference plane Sr is a plane that connects the points sp of the first surface 10a that overlap with each of the multiple supports when viewed from the thickness direction. The multiple supports are arranged, for example, at a position that overlaps with a circumference 7.5 mm inward from the outer circumferential edge of the SiC substrate 10. For example, the SiC substrate 10 is supported by three supports. Each of the three supports is located at a position that is three-fold symmetric with the center of the SiC substrate 10 supported by the supports as the central axis. The reference plane Sr is, for example, a three-point reference plane. The larger the absolute value of the bow, the more the SiC substrate 10 is determined to be deformed. First, the SiC substrate 10 is placed on three support points placed on the flat surface F. The three points sp of the first surface 10a that are on the support points when viewed from the thickness direction are connected to obtain the reference plane Sr. Then, the reference plane Sr is set to 0, and the direction away from the flat surface F based on the reference plane Sr is defined as +, and the direction approaching the flat surface F based on the reference plane Sr is defined as -. The Bow is obtained as the position of the center c of the first surface 10a in the height direction relative to the reference surface Sr. In other words, the Bow is obtained as the signed distance of the center c of the first surface 10a from the reference surface Sr.

[0052] The SiC epitaxial wafer 20 after the epitaxial layer 11 is laminated also has a warp of preferably 50 μm or less, more preferably 30 μm or less. The SiC epitaxial wafer after the epitaxial layer 11 is laminated also has a bow of preferably 30 μm or less, more preferably 10 μm or less, and more preferably -30 μm or more. The reference plane when measuring the bow of the SiC epitaxial wafer 20 is a plane that connects the points on the surface of the epitaxial layer 11 that overlap with each of the multiple supports when viewed from the thickness direction. The positions of the multiple supports are the same as the positions at which the bow of the SiC substrate 10 is measured. First, the SiC epitaxial wafer 20 is placed on three support points installed on the flat surface F. The three points on the surface of the epitaxial layer 11 that are on the support points when viewed from the thickness direction are connected to obtain the reference plane when measuring the bow of the SiC epitaxial wafer 20. The bow is obtained as the position in the height direction relative to the reference plane of the center of the surface of the epitaxial layer 11. In other words, the bow is obtained as the signed distance of the center of the surface of the epitaxial layer 11 from the reference plane.

[0053] Next, an example of a method for manufacturing the SiC substrate 10 according to this embodiment will be described. The SiC substrate 10 is obtained by slicing a SiC ingot. The SiC ingot is obtained by, for example, a sublimation method.

[0054] Fig. 7 is a schematic diagram for explaining a sublimation method as an example of a SiC ingot manufacturing apparatus 30. In Fig. 7, a direction perpendicular to the surface of pedestal 32 is defined as a z-direction, one direction perpendicular to the z-direction is defined as an x-direction, and a direction perpendicular to the z-direction and the x-direction is defined as a y-direction.

[0055] The sublimation method is a method in which a seed crystal 33 made of a SiC single crystal is placed on a pedestal 32 placed in a graphite crucible 31, and the crucible 31 is heated to supply sublimation gas sublimated from a raw material powder 34 in the crucible 31 to the seed crystal 33, thereby growing the seed crystal 33 into a larger SiC ingot 35. The crucible 31 is heated by a coil 36, for example.

[0056] By controlling the crystal growth conditions in the sublimation method, the tensile stress applied to the inside of the SiC substrate 10 obtained from the SiC ingot 35 can be controlled.

[0057] For example, when growing the SiC ingot 35 in the c-plane, the temperature of the center and the temperature of the outer periphery of the crystal growth surface are controlled. The crystal growth surface is the surface during the crystal growth process. For example, when growing the SiC ingot 35 in the c-plane, the temperature of the outer periphery of the crystal growth surface is made lower than the temperature of the center. Furthermore, crystal growth is performed so that the difference in growth rate between the center and the periphery in the xy plane is 0.001 mm / h or more and 0.05 mm / h or less. Here, the growth rate of the center in the xy plane is made slower than the growth rate of the periphery. The growth rate can be changed by changing the temperature of the crystal growth surface.

[0058] The temperature of the crystal growth surface can be adjusted by controlling the position in the z direction of the heating center of crucible 31 by coil 36. For example, the position in the z direction of the heating center of crucible 31 can be changed by changing the position in the z direction of coil 36. The z direction position of the heating center of crucible 31 and the z direction position of the crystal growth surface are controlled to move apart at a rate of 0.5 mm / h. Here, the z direction position of the heating center of crucible 31 is controlled to be below (on the raw material powder 34 side) the z direction position of the crystal growth surface.

[0059] Next, the SiC ingot produced under these conditions is processed into a SiC substrate 10. In a general processing method, the stress applied to the single crystal changes between the state of the SiC ingot and the state of the SiC substrate. For example, in the molding process, when processing a SiC ingot with a diameter of 180 mm into a SiC substrate with a diameter of 150 mm, the diameter needs to be reduced. In addition, for example, in the multi-wire cutting process, undulations occur on the surface, and the undulations need to be removed. By going through such a process, for example, the part of the SiC ingot with high stress may be removed or the shape of the crystal lattice plane may change, and the stress in the SiC ingot state may be released in the SiC substrate state, and a SiC substrate with high tensile stress in the outer periphery cannot be obtained. In order to obtain a SiC substrate with high tensile stress in the outer periphery, it is necessary to process the single crystal in the ingot state so that it is inherited in the substrate state.

[0060] For example, after one side of a SiC ingot is subjected to damage-free processing, it is cut with a single wire saw, and the surface that has been subjected to damage-free processing is adsorbed and further damage-free processing is performed on the cut surface. By performing damage-free processing on both sides of the SiC substrate 10, a part of the tensile stress generated in the state of the SiC ingot is also inherited by the substrate. The damage-free processing is, for example, CMP processing. By performing substrate processing in this way so as to leave the lattice surface shape in the state of the SiC ingot, it is possible to produce a SiC substrate 10 having a large tensile stress without releasing the stress of the SiC ingot. Then, a molding process for adjusting the diameter is performed, and a SiC substrate 10 having a large tensile stress can be obtained.

[0061] As described above, the SiC substrate 10 according to the first embodiment is resistant to warping even after the SiC epitaxial layer 11 is laminated thereon. This is believed to be because the intentional increase in the tensile stress in the circumferential direction on the outer side of the SiC substrate 10 acts as a force that tends to spread the SiC epitaxial wafer 20 outward.

[0062] "Second embodiment" In the SiC substrate 10 according to the second embodiment, the tensile stress in the <11-20> direction, which is the circumferential direction of the second outer periphery point 3, is greater than the tensile stress acting in the <11-20> direction, which is the same direction as the circumferential direction of the second outer periphery point 3 at the first center point 2. The SiC substrate 10 in the second embodiment is similar to the SiC substrate 10 in the first embodiment, except that the measurement points for defining the state of the SiC substrate 10 are different. For example, the preferred ranges of the warp, bow, diameter, surface roughness, etc. of the SiC substrate 10 according to the second embodiment are similar to those of the SiC substrate 10 according to the first embodiment.

[0063] The tensile stress in the circumferential direction of the second outer periphery point 3 is preferably 10 MPa or more larger, and more preferably 30 MPa or more larger, than the tensile stress acting in the same direction as the circumferential direction of the second outer periphery point 3 at the first center point 2.

[0064] Furthermore, the tensile stress in the <1-100> direction, which is the circumferential direction of the first outer periphery point 1, is preferably greater than the tensile stress in the <1-100> direction, which is the same direction as the circumferential direction of the first outer periphery point 1 at the first central point 2. The tensile stress in the circumferential direction of the first outer periphery point 1 is more preferably 10 MPa or more greater, and even more preferably 30 MPa or more greater, than the tensile stress acting in the same direction as the circumferential direction of the first outer periphery point at the first central point 2.

[0065] The SiC substrate 10 according to the second embodiment provides the same effects as the SiC substrate 10 according to the first embodiment.

[0066] Although the preferred embodiment of the present invention has been described in detail above, the present invention is not limited to the specific embodiment, and various modifications and changes are possible within the scope of the gist of the present invention described in the claims. EXAMPLES

[0067] Example 1 The warpage that occurs when a SiC epitaxial layer is laminated on the surface of a SiC substrate was determined by simulation. The simulation was performed using the finite element method simulator ANSYS. It was separately confirmed that the simulation using the finite element method simulator ANSYS matched the results of the actual product.

[0068] The simulation was performed using the following procedure. First, the physical properties of the SiC substrate and the surface layer with different stresses were set. The physical properties to be set were the thickness of the SiC substrate, the film thickness of the surface layer, Young's modulus, and Poisson's ratio. The thickness of the SiC substrate was set to 350 μm. The diameter of the SiC substrate was set to 150 mm. The warp of the SiC substrate was set to 0 μm. The Young's modulus of the SiC substrate was set to 480 GPa, and the Poisson's ratio was set to 0.20. The film thickness of the surface layer was set to 10 μm. Here, the case where stress is generated in the surface layer due to ion implantation was considered, and the Young's modulus and Poisson's ratio of the surface layer were set to the same values ​​as those of the SiC substrate.

[0069] Next, the stress distribution of the SiC substrate and the stress of the surface layer were set. First, the stress distribution of the SiC substrate was set. The tensile stress of the first outer periphery point 1 of the SiC substrate was set to be 40 MPa higher than the tensile stress of the first central point 2. In other words, the stress difference between the first outer periphery point 1 and the first central point 2 was set to 40 MPa, so that the first outer periphery point 1 was subjected to a stronger tensile stress than the first central point. A stress of 60 MPa was applied to the entire surface layer.

[0070] A simulation was performed under the above conditions to obtain the warpage of the SiC substrate with surface layer. The warpage was evaluated by Warp. The warpage (Warp) of Example 1 was 47 μm. The warpage of the SiC substrate with surface layer can be considered as the warpage of the epitaxial wafer by regarding the surface layer as an epitaxial layer. When the surface layer is an epitaxial layer, the magnitude of Warp changes depending on the stress difference depending on the film thickness and impurity concentration difference of the epitaxial layer, but it was confirmed that there is a correlation with the obtained warpage of the SiC substrate with surface layer.

[0071] Example 2 Example 2 differs from Example 1 in that the tensile stress at the first outer periphery point 1 of the SiC substrate was set to be 20 MPa greater than the tensile stress at the first central point 2. That is, the stress difference between the first outer periphery point 1 and the first central point 2 was set to 20 MPa, so that the first outer periphery point 1 was subjected to a stronger tensile stress than the first central point. The other parameters were the same as in Example 1, and the warp of the SiC substrate with surface layer was obtained by simulation in the same manner as in Example 1. The warp in Example 2 was 78 μm.

[0072] Comparative Example 1 Comparative Example 1 differs from Example 1 in that the tensile stress at the first outer periphery point 1 of the SiC substrate was set to be the same as the tensile stress at the first central point 2. That is, the stress difference between the first outer periphery point 1 and the first central point 2 was set to 0 MPa, and the first outer periphery point 1 was set to be subjected to the same stress as the first central point 2. The other parameters were the same as in Example 1, and the warp of the SiC substrate with surface layer was obtained by simulation in the same manner as in Example 1. The warp of Comparative Example 1 was 116 μm.

[0073] Comparative Example 2 Comparative Example 2 differs from Example 1 in that the tensile stress at the first central point 2 of the SiC substrate was set to be 20 MPa greater than the tensile stress at the first outer periphery point 1. That is, the stress difference between the first outer periphery point 1 and the first central point 2 was set to -20 MPa, and the first central point 2 was set to be subjected to a stronger tensile stress than the first outer periphery point 1. That is, the first outer periphery point 1 was subjected to a more compressive stress than the first central point 2. The other parameters were the same as in Example 1, and the warp of the SiC substrate with the surface layer was obtained by simulation in the same manner as in Example 1. The warp of Comparative Example 2 was 189 μm.

[0074] The results of Examples 1 and 2 and Comparative Examples 1 and 2 are summarized in Table 1.

[0075] [Table 1]

[0076] In Example 1 and Example 2, in which a large tensile stress acts on the outer periphery compared to the center, the warpage of the SiC substrate with the surface layer was smaller than that in Comparative Example 1, in which a tensile stress does not act on the outer periphery compared to the center, and Comparative Example 2, in which a compressive stress acts on the outer periphery. That is, in the substrate having a tensile stress on the outer periphery compared to the center, the warpage during the epitaxial wafer and semiconductor process can be reduced compared to the SiC substrate having a tensile stress on the outer periphery compared to the center and the SiC substrate having a compressive stress on the outer periphery as shown in the prior art. [Explanation of symbols]

[0077] 1 First outer perimeter point 2 1st center point 3 Second outer perimeter point 5 Outer periphery 6 Center 10. SiC Substrate 10a 1st page 10b 2nd side 11 SiC epitaxial layer 20 SiC epitaxial wafer hp highest point lp lowest point sp support point Shp, Slp virtual surface Sr reference plane

Claims

1. A SiC epitaxial wafer having a SiC substrate and a SiC epitaxial layer laminated on one surface of the SiC substrate, The diameter of the SiC substrate is 195 mm or more, and the bow of the SiC substrate is 30 μm or less; The SiC epitaxial wafer has a bow of 30 μm or less.

2. A SiC epitaxial wafer as described in claim 1, wherein the bow of the SiC epitaxial wafer is 10 μm or less.

3. A SiC epitaxial wafer as described in claim 1, wherein the bow of the SiC epitaxial wafer is -30 μm or more.

4. The SiC epitaxial wafer of claim 1, wherein the bow of the SiC substrate is -30 μm or more.

5. A SiC epitaxial wafer having a SiC substrate and a SiC epitaxial layer laminated on one surface of the SiC substrate, The diameter of the SiC substrate is 195 mm or more, and the warp of the SiC substrate is 50 μm or less; The SiC epitaxial wafer has a bow of 30 μm or less.

6. A SiC epitaxial wafer as described in claim 5, wherein the bow of the SiC epitaxial wafer is 10 μm or less.

7. The SiC epitaxial wafer of claim 5, wherein the bow of the SiC epitaxial wafer is -30 μm or more.

8. A SiC epitaxial wafer having a SiC substrate and a SiC epitaxial layer laminated on one surface of the SiC substrate, The diameter of the SiC substrate is 195 mm or more; The value obtained by subtracting the warp of the SiC substrate from the warp of the SiC epitaxial wafer is 0 μm or more and 78 μm or less, The SiC epitaxial wafer has a bow of 30 μm or less.

9. The value obtained by subtracting the warp of the SiC substrate from the warp of the SiC epitaxial wafer is 0 μm or more and 47 μm or less.

9. The SiC epitaxial wafer of claim 8.

10. A SiC epitaxial wafer having a SiC substrate and a SiC epitaxial layer laminated on one surface of the SiC substrate, The diameter of the SiC substrate is 195 mm or more, and the thickness of the SiC substrate is 350 μm or less; The SiC epitaxial wafer has a bow of 30 μm or less.

11. A SiC epitaxial wafer as described in claim 10, wherein the bow of the SiC epitaxial wafer is 10 μm or less.

12. The SiC epitaxial wafer of claim 10, wherein the bow of the SiC epitaxial wafer is -30 μm or more.

13. A SiC epitaxial wafer as described in claims 1 to 4, wherein the bow of the SiC substrate is determined by using a support located on the first surface of the SiC substrate at a position overlapping with a circumference 7.5 mm inward from the outermost circumference and a plane passing through the overlapping portion when viewed from the thickness direction as a reference plane.

14. A SiC epitaxial wafer as described in claim 13, wherein the bow of the SiC epitaxial wafer is determined by using a support located at a position on the surface of the SiC epitaxial layer that overlaps with a circumference 7.5 mm inward from the outermost circumference and a plane passing through the overlapping portion when viewed from the thickness direction as a reference plane.

15. A SiC epitaxial wafer as described in any one of claims 1 to 12, wherein the bow of the SiC epitaxial wafer is determined by using a support located at a position on the surface of the SiC epitaxial layer that overlaps with a circumference 7.5 mm inward from the outermost circumference and a plane passing through the overlapping portion when viewed from the thickness direction as a reference plane.

16. A method for manufacturing a semiconductor device using a SiC epitaxial wafer described in any one of claims 1 to 12.

17. A method for manufacturing a semiconductor device using the SiC epitaxial wafer described in claim 15.

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