Method and apparatus for low resistance contact interconnect

Abstract

To provide a method for processing a substrate.SOLUTION: A method may include, for example, selectively depositing a first metal layer in at least one feature on a substrate, depositing a second metal layer on the top of the first metal layer and on at least sidewalls defining the at least one feature, depositing a third metal layer on the top of the second metal layer and in the feature to at least completely fill the at least one feature, and removing a portion of the second metal layer, or a portion of the second metal layer and a portion of the third metal layer, such that the remaining portions of the second metal layer and the third metal layer are flush with a top surface of the at least one feature.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure relate generally to methods and apparatus for processing a substrate, and more particularly, to methods and apparatus for processing a substrate to form low resistance contacts. [Background technology]

[0002] There are many fundamental challenges with aggressive contacts in advanced logic and memory devices. For example, contact resistance must be kept to a minimum for optimal logic and memory device performance. Furthermore, as advanced logic and memory devices with very small critical dimensions (CD) and very high aspect ratios (HAR) are developed, the gap-fill challenge becomes more difficult to overcome.

[0003] Thus, the inventors have provided a method and apparatus for processing substrates used in advanced logic and memory devices. Summary of the Invention

[0004] Methods and apparatuses for processing a substrate are provided herein. In some embodiments, for example, a method for processing a substrate includes selectively depositing a first metal layer in at least one feature on a substrate, depositing a second metal layer on top of the first metal layer and on at least the sidewalls defining the at least one feature, depositing a third metal layer on top of the second metal layer and in the feature to at least completely fill the at least one feature, and removing a portion of the second metal layer, or a portion of the second metal layer and a portion of the third metal layer, such that the remaining portions of the second metal layer and the third metal layer are flush with a top surface of the at least one feature.

[0005] In accordance with at least some embodiments, a method for processing a substrate includes selectively depositing a first metal layer in at least one feature on the substrate; depositing a second metal layer on top of the first metal layer and on sidewalls defining the at least one feature; depositing a third metal layer on top of the second metal layer to partially fill, completely fill, or overfill the at least one feature; and removing a portion of the sidewalls, a portion of the third metal layer, and a portion of the second metal layer such that remaining portions of the second metal layer and the third metal layer are flush with each other and with the remaining portions of the sidewalls.

[0006] In accordance with at least some embodiments, a non-transitory computer-readable storage medium stores instructions that, when executed by a processor, perform a method including selectively depositing a first metal layer in at least one feature on a substrate; depositing a second metal layer on top of the first metal layer and on at least a sidewall defining the at least one feature; depositing a third metal layer on top of the second metal layer to partially fill, completely fill, or overfill the at least one feature; and removing a portion of the sidewall, a portion of the third metal layer, and a portion of the second metal layer such that remaining portions of the second metal layer and the third metal layer are flush with each other and with the remaining portions of the sidewall.

[0007] Other and further embodiments of the present disclosure are described below.

[0008]

[0013] Embodiments of the present disclosure, briefly summarized above and discussed in more detail below, can be understood by reference to the exemplary embodiments of the present disclosure as represented in the accompanying drawings. The accompanying drawings, however, depict only typical embodiments of the present disclosure and therefore should not be considered as limiting the scope, since the present disclosure may admit of other equally effective embodiments. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram of a system including an apparatus in accordance with at least some embodiments of the present disclosure. [Diagram 2] 1 is a flow diagram of a method for processing a substrate in accordance with at least some embodiments of the present disclosure. [Diagram 3] FIG. 3 illustrates a substrate being processed using the method of FIG. 2. [Figure 4] FIG. 3 shows a substrate being processed using a method similar to that of FIG. 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] For ease of understanding, the same reference numerals have been used, where possible, to designate identical elements common to each of the figures. The figures are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

[0011] Provided herein are embodiments of methods and apparatuses for processing substrates. The methods can be used to process substrates that require or can otherwise benefit from lower contact resistance, smaller critical dimensions, and / or higher aspect ratios, such as when the substrate is used in advanced logic and / or memory devices. For example, one or more metals, such as tungsten (W), can be deposited to partially fill one or more features, such as vias, trenches, and / or dual damascene via chains, formed on the substrate using one or more dielectrics. Then, another metal layer, such as W, can be deposited on top of the first W layer to form a liner, and another W layer can be deposited thereon to partially fill, fully fill, or overfill one or more features, thus obtaining lower contact resistance, smaller critical dimensions, and higher aspect ratios for advanced logic and / or memory devices.

[0012] For example, in at least some embodiments, a method for processing a substrate can include using selective chemical vapor deposition (CVD) / atomic layer deposition (ALD) to partially fill one or more features on the substrate with a first W layer (e.g., a bottom-up gap-fill process), thus effectively reducing the overall aspect ratio of the feature. Physical vapor deposition (PVD) can then be used to form a W liner and / or barrier on top of the first W layer, which can act as a protective layer for the feature against certain precursor chemicals used in subsequent processes. For example, after forming the liner W using PVD, the feature can be filled using a CVD W process that uses precursor chemicals such as fluorine (which may react (or attack) the dielectric forming the feature).

[0013] 1 is a diagram of a system configured to process a substrate including a multi-chamber processing apparatus (apparatus 100), sometimes referred to as a cluster tool, and a stand-alone chemical mechanical polishing (CMP) processing chamber 107, in accordance with at least some embodiments of the present disclosure. For example, the apparatus 100 includes multiple process chambers attached to a vacuum transfer chamber. The process chambers can be any type of process chamber, including but not limited to a PVD chamber, a CVD process chamber, an ALD process chamber, an etch chamber, or other type of process chamber.

[0014] An example of a PVD process chamber that can be configured for use with the apparatus 100 can be a stand-alone PVD apparatus from the ENDURA® VERSA® line available from Applied Materials, Inc., Santa Clara, Calif. An example of a CVD process chamber that can be configured for use with the apparatus 100 can be the ENDURA® VOLTA® line of stand-alone CVD apparatus available from Applied Materials, Inc. Similarly, an example of an ALD process chamber that can be configured for use with the apparatus 100 can be the OLYMPIA® line of ALD apparatus available from Applied Materials, Inc. An example of a CMP process chamber that can be configured for use as the CMP process chamber 107 can be one of the REFLEXION® LK PRIME® line of stand-alone apparatus available from Applied Materials, Inc.

[0015] One or more of the aforementioned devices can be combined into an integrated or cluster tool, such as the ENDURA® line of devices available from Applied Materials, Inc., Santa Clara, Calif. In some embodiments, the methods of the present invention described below may be advantageously performed in a cluster tool such that there is limited or no vacuum break during processing. Cluster tools can be configured to perform integrated multi-step processes such as ALD, CVD, PVD, pre-clean, epitaxy, etching, photomask fabrication, degassing, plasma doping, plasma nitridation, and RTP, as well as high-k transistor gate stack fabrication. However, the methods described herein may also be performed using or in other cluster tools coupled with appropriate process chambers.

[0016] For illustrative purposes, the apparatus 100 is shown including multiple process chambers embodied in a cluster tool 102 including a first set of process chambers and a second set of process chambers, which may include any combination of process chambers configured to perform various substrate processing operations, including the method 200 described below. For example, in at least some embodiments, the first set of process chambers may include a CVD process chamber 104a configured to perform CVD on a substrate, an ALD process chamber 104b configured to perform ALD on a substrate, a pre-clean process chamber 104c configured to perform a pre-clean process on a substrate, and / or an etch chamber 104d configured to etch a substrate (collectively referred to hereinafter as process chambers 104). In at least some embodiments, the second set of process chambers may include, for example, a PVD process chamber 105a configured to perform PVD on a substrate, a CVD process chamber 105b configured to perform CVD on a substrate, an etch process chamber 105c configured to etch a substrate, a pre-clean process chamber 105d configured to perform a pre-clean process on a substrate, and an ALD process chamber 105e configured to perform ALD on a substrate (collectively referred to hereinafter as process chambers 105).

[0017] If a particular process does not need to be performed by the cluster tool 102 , either of the process chambers 104 , 105 can be removed from the cluster tool 102 .

[0018] The cluster tool 102 may include two load lock chambers 106A, 106B for transferring substrates in and out of the cluster tool 102. Typically, the cluster tool 102 is under vacuum, so the load lock chambers 106A, 106B can "pump down" substrates introduced into the cluster tool 102. A first robot 108 can transfer substrates between the load lock chambers 106A, 106B and the process chambers 104, which are coupled to a first central transfer chamber 110 for performing corresponding processes on the substrates.

[0019] The first robot 108 can also transfer substrates between two intermediate transfer chambers 112a, 112b. The intermediate transfer chambers 112a, 112b can be used to transfer substrates within the cluster tool 102 while maintaining ultra-high vacuum conditions. The second robot 114 can transfer substrates between the intermediate transfer chambers 112a, 112b and the process chamber 105 coupled to a second central transfer chamber 116.

[0020] Additionally, a controller 118 (or processor) is provided and coupled to various components of the cluster tool 102 to control operation of the process chambers 104, 105 for processing substrates. The controller 118 includes a central processing unit (CPU) 119, support circuits 120, and a memory or non-transitory computer readable storage medium 121. The controller 118 is operatively coupled to and controls one or more energy sources (not shown) configured for use with the process chambers 104, 105, either directly or via a computer (or controller) associated with the particular process chamber and / or support system components.

[0021] The controller 118 may be any form of general-purpose computer processor that can be used in an industrial environment to control various chambers and sub-processors. The memory or non-transitory computer-readable storage medium 121 of the controller 118 may be one or more of readily available memories such as random access memory (RAM), read-only memory (ROM), floppy disk, hard disk, optical storage medium (e.g., compact disk or digital video disk), flash drive, or any other form of digital storage, local or remote. The support circuits 120 are coupled to the CPU 119 to support the CPU 119 in a conventional manner. The support circuits 120 include cache, power supplies, clock circuits, input / output circuits and subsystems, and the like. The methods of the invention described herein, such as the methods for processing a substrate (e.g., for low resistance contact interconnects), may be stored in the memory 121 as software routines 122 that can be executed or called to control the operation of one or more energy sources in the manner described herein. The software routines may also be stored and / or executed by a second CPU (not shown) located remotely from the hardware controlled by the CPU 119.

[0022] FIG. 2 is a flow diagram of a method 200 for processing a substrate in accordance with at least some embodiments of the present disclosure, and FIGS. 3A-3F illustrate a substrate being processed using the method of FIG.

[0023] For illustrative purposes, a method 200 is described for processing a pre-fabricated substrate 300. In at least some embodiments, the substrate 300 may be pre-fabricated using, for example, one or more of the process chambers described above, e.g., deposition process chambers, etch process chambers, CMP process chambers, etc., that may be configured for multiple patterning processes and / or one or more fill cycles. Alternatively, in at least some embodiments, the substrate 300 may be formed using, for example, a cluster tool 102.

[0024] The substrate 300 may be formed from any suitable material for forming a substrate, including, but not limited to, silicon, germanium, etc. For example, in at least some embodiments, the substrate 300 may be made from silicon. The base layer 302 may be deposited on top of the substrate 300 and may be made from any suitable material, including, but not limited to, aluminum (Al), copper (Cu), cobalt (Co), molybdenum (Mo), ruthenium (Ru), titanium (Ti), or tungsten (W) for forming a conductive base layer on the substrate 300. For example, in at least some embodiments, the base layer 302a may be made from tungsten (W) and / or copper (Cu).

[0025] Additionally, one or more additional layers may be deposited on top of the base layer 302 and / or the substrate 300. For example, in at least some embodiments, an additional layer 304 having one or more features 306 may be deposited on top of a portion of the substrate 300 and / or a portion of the base layer 302. One feature 306 is shown in the figure. The feature 306 may be a via, a trench, and / or a dual damascene via chain, etc., and may have one or more geometric configurations, including, but not limited to, a rectangle, a triangle, a circle, etc. For example, in at least some embodiments, the feature 306 may have a generally rectangular configuration defined by a top surface 312, a bottom surface (e.g., a portion of the base layer 302), and four sidewalls (e.g., that define the feature 306). For illustrative purposes, only a first sidewall 308 and a second sidewall 310 of the feature 306 are shown. The layer 304 can be made from one or more suitable dielectric materials for forming the features 306, including, but not limited to, silicon oxide (SiOx), silicon nitride (SiN), or other dielectric materials or films.

[0026] 3A , after the substrate 300 is fabricated, the substrate 300 can be transferred to one of the load lock chambers 106A, 106B of the cluster tool 102 for further processing using one or more of the process chambers 104, 105 of the cluster tool 102. During transfer of the substrate 300 to the cluster tool 102, atmospheric exposure to the substrate 300 can cause an oxide (e.g., metal oxide) to form on a surface (e.g., top surface) of the base layer 302. For illustrative purposes, a metal oxide layer 314 is shown on a portion of the top surface of the base layer 302. Thus, in at least some embodiments, one or more processes can be performed to remove the metal oxide layer 314 before depositing an additional layer of material on top of the base layer 302.

[0027] 3B, the first robot 108 can transfer the substrate 300 under vacuum from one of the load lock chambers 106A, 106B (e.g., load lock chamber 106A) to a pre-clean process chamber 104c (e.g., the fifth process chamber) to perform a pre-clean (e.g., etch) process to remove the metal oxide layer 314 (shown in phantom) from the substrate 300 in any suitable manner. Alternatively, a separate or remote process chamber (e.g., a pre-clean or etch process chamber) can be used to remove the metal oxide layer 314 from the base layer 302 prior to transferring the substrate 300 to the cluster tool 102.

[0028] Depending on the incoming substrate (e.g., having HAR or low aspect ratio (LAR)), a first material layer may then be optionally deposited in 202 within the features on the substrate. For example, with reference to FIG. 3C, in at least some embodiments, for substrates having a relatively HAR, a first material layer 318 may be deposited in any suitable manner within the features 306 of the substrate 300, for example, using the CVD process chamber 104a (e.g., the first process chamber). In some embodiments, an ALD process chamber 104b may be used in place of or in conjunction with the CVD process chamber 104a to deposit the first material layer 318. Alternatively, for substrates having a relatively LAR, e.g., incoming substrates having vias, trenches, etc., 202 may be omitted. The first robot 108 may transfer the substrate 300 under vacuum from the pre-clean process chamber 104c to the CVD process chamber 104a. The first material layer 318 can be any suitable metal for forming a first material layer, including, but not limited to, Al, Co, Cu, Mo, Ru, Ti, and / or W. For example, in at least some embodiments, the first material layer 318 can be W.

[0029] The first material layer 318 may be deposited to partially fill the feature 306, which may have a height of about 5 nm to about 500 nm with an AR of about 2 to about 20. In at least some embodiments, such as when the feature 306 includes a height of about 470 nm, a width of about 550 nm, and an aspect ratio of at least about 5.5, such as about 5.5 to about 12, the feature 306 may be filled with the first material layer 318 to a height of about 30 nm to about 600 nm. In at least some embodiments, the first material layer 318 may be filled to a height of about one-third (1 / 3) to about two-thirds (2 / 3) of the height of the feature 306. The height to which the feature 306 is filled with the first material layer 318 may depend, for example, on the manufacturer's preference, the type of material used for the first material layer 318, the intended use of the substrate 300 (e.g., logic and / or memory applications), etc.

[0030] In at least some embodiments, the CVD process chamber 104a can be configured to perform a selective CVD W process. More specifically, according to the method 200, the CVD process chamber 104a is configured to selectively deposit (e.g., grow) W on top of the base layer 302 in any suitable manner, while depositing (e.g., growing) little or no W on top of or on the dielectric surfaces, such as the first sidewall 308, the second sidewall 310, and / or the top surface 312, of the layer 304. That is, at 202, the CVD W fill process on top of the base layer 302 in the feature 306 is a bottom-up fill process (e.g., low contact resistance) and not a high resistance barrier process and nucleation process as would be required when using a conventional fill process to fill the feature 306. Examples of suitable selective CVD processes that can be used with the methods and apparatus described herein include commonly owned U.S. Patent Application Serial No. 16 / 803,842, entitled "AN INTEGRATION APPROACH OF SURFACE CLEANING AND SELECTIVE TUNGSTEN BOTTOM-UP GROWTH FOR LOW CONTACT RESISTANCE AND SEAM-FREE GAPFILL," U.S. Patent Application Publication No. 2018 / 0145034, entitled "METHODS TO SELECTIVELY DEPOSIT CORROSION-FREE METAL CONTACTS," U.S. Patent No. 9,716,012, entitled "METHODS OF SELECTIVE LAYER DEPOSITION," U.S. Patent No. 10,256,144, entitled "PROCESS INTEGRATION APPROACH OF SELECTIVE TUNGSTEN VIA FILL," and U.S. Patent No. 2013 / 0136364, entitled "IN-SITU PRE-CLEAN FOR SELECTIVITY IMPROVEMENT FOR SELECTIVE TUNGSTEN VIA FILL," and U.S. Patent No. 2013 / 0136365, entitled "PROCESS INTEGRATION APPROACH OF SELECTIVE TUNGSTEN VIA FILL." No. 10,395,916 entitled "DEPOSITION".

[0031] Next, at 204, after a first material layer 318 is deposited on top of the base layer 302 to partially fill the feature 306, the first robot 108 can transfer the substrate 300 under vacuum from the CVD process chamber 104a to one or more of the aforementioned process chambers so that a second material layer can be deposited on top of the first material layer 318.

[0032] 3D, the substrate 300 including the base layer 302 can be transferred from the CVD process chamber 104a to a PVD process chamber 105a (e.g., a second process chamber) to deposit a second material layer 320 on top of the first material layer 318. For example, in at least some embodiments, the first robot 108 can transfer the substrate 300 under vacuum from the CVD process chamber 104a to one of the intermediate transfer chambers 112a, 112b, e.g., the intermediate transfer chamber 112a. The second robot 114 can then transfer the substrate 300 from the intermediate transfer chamber 112a to the PVD process chamber 105a.

[0033] The second material layer 320 forms a liner along the first material layer 318 and / or the top surface 312 of the layer 304 of the substrate 300, which may act as a protective layer for the feature 306 against certain precursor chemicals used in subsequent processes, as described above. The second material layer 320 may be any suitable metal for forming a protective layer, including, but not limited to, Al, Co, Cu, Mo, Ru, Ti, and / or W. For example, in at least some embodiments, the second material layer 320 may be W.

[0034] Once transferred, the PVD process chamber 105a can deposit the second material layer 320 in any suitable manner (e.g., to form a liner along the first material layer 318, the first sidewall 308, and the second sidewall 310) on top of the first material layer 318 and along the first sidewall 308 and second sidewall 310 (and / or the third and fourth sidewalls) that define the feature 306 of the substrate 300. Additionally, in at least some embodiments, such as the illustrated embodiment, a second material layer 320 may be deposited on top of the first material layer 318, as well as along the first sidewall 308 and second sidewall 310 (and / or the third and fourth sidewalls), and also on the top surface 312 of layer 304 of substrate 300 (e.g., to form a liner along first material layer 318, first sidewall 308, second sidewall 310, and top surface 312).

[0035] The highly ionized plasma used for PVD provides metal ions with excellent directionality into the feature 306, thus providing enhanced step coverage into the feature 306. Alternatively, in at least some embodiments, the second material layer 320 can be deposited using, for example, one or both of the CVD process chamber 104a and / or the ALD process chamber 104b, although such respective processes typically cannot achieve as low a resistivity as PVD due to higher resistivity films that contain impurities that are sometimes present when using CVD / ALD processes to form a liner in a feature.

[0036] The amount or thickness of the second layer or material 320 deposited on the first material layer 318, along the first sidewall 308 and the second sidewall 310, and / or on the top surface 312 of the substrate 300 may depend on, for example, the manufacturer's preference, the type of material used for the second material layer 320, the intended use of the substrate 300 (e.g., logic and / or memory applications), etc.

[0037] Next, at 206, a second material layer 320 is deposited on top of the first material layer 318 and / or the top surface 312 of the substrate 300, and then the substrate 300 is transferred from the PVD process chamber 105a to one or more of the other aforementioned process chambers such that a third material layer is deposited on top of the second material layer 320 to, for example, at least partially fill features 306 of the substrate 300.

[0038] For example, referring to FIG. 3E, the substrate 300 including the base layer 302 can be transferred from the PVD process chamber 105a back to another CVD process chamber, such as the CVD process chamber 104a or the CVD process chamber 105b (e.g., a third process chamber), to deposit the third material layer 322 on top of the second material layer 320 in any suitable manner. In some embodiments, the CVD process chamber 105b can be the same type of process chamber as the CVD process chamber 104a. Alternatively, the CVD process chamber 105b can be a different type of process chamber than the CVD process chamber 104a. For example, the CVD process chamber 105b can be configured to use WF6 as a precursor material and hydrogen 2 (H2) as a reducing agent to facilitate the deposition of the third layer 322 on top of the second material layer 320, whereas the CVD process chamber 104a may not be so configured. For purposes of illustration, the second robot 114 is described herein as transferring the substrate 300 under vacuum from the PVD process chamber 105a to the CVD process chamber 105b.

[0039] The amount or thickness of the third material layer 322 deposited on top of the second material layer 320 may depend on, for example, the manufacturer's preference, the type of material used for the third material layer 322, whether the features 306 of the substrate 300 should be partially filled, fully filled, or overfilled, the intended use of the substrate 300 (e.g., logic and / or memory applications), etc.

[0040] In at least some embodiments, such as when a liner is formed along the first material layer 318, the first sidewall 308, and the second sidewall 310, a third material layer 322 can be deposited on top of the second material layer 320 to completely fill the feature 306. When the feature 306 is completely filled, the second material layer 320 deposited within the feature 306 (e.g., the area defined by the first sidewall 308 and the second sidewall 310) is completely covered by the third layer or material 322, such that the third material layer 322 is flush with the top surface 312 of layer 30e (as indicated by dashed line cf).

[0041] In at least some embodiments, the feature 306 may be overfilled, such as when a liner is formed along the first material layer 318, the first sidewall 308, the second sidewall 310, and the top surface 312. When the feature 306 is overfilled, all of the second material layer 320, including the portion of the second material layer 320 deposited on top of the top surface 312, is covered by the third material layer 322 (as indicated by the dashed line of).

[0042] Alternatively, in at least some embodiments, once the feature 306 is partially filled, a third material layer 322 can be deposited on top of the second material layer 320 deposited within the feature 306 to substantially cover the second material layer 320 (e.g., a substantial portion of the area defined by the first sidewall 308 and the second sidewall 310e and indicated by the dashed line pf).

[0043] Regardless of the extent to which the feature 306 is filled with the third material layer 322, the third material layer 322 should be deposited within the feature 306 such that there are no gaps or spaces of the third material layer 322 between the first sidewall 308 and the second sidewall 310 of the layer 304.

[0044] The third material layer 322 can be any suitable material, including but not limited to Al, Co, Cu, Mo, Ru, Ti, and / or W. For example, in at least some embodiments, the third material layer 322 can be W.

[0045] At 206, if the feature 306 is completely filled with the third material layer 322 (e.g., the third material layer 322 is flush (or substantially flush) with the top surface 312 of the layer 304) and no second material layer 320 is present on the top surface 312, the method 200 may end. However, in some embodiments, a CMP process may be performed. For example, even if the third material layer 322 is flush with the top surface 312 of the layer 304, a portion of the third material layer 322 may unintentionally deposit on the top surface 312.

[0046] Thus, if, at 206, feature 306 is partially filled, completely filled, or overfilled, at 208, at least a portion of the sidewall, at least a portion of the third material layer, and at least a portion of the second material layer can be removed such that the remaining portions of second material layer 320 and third material layer 322 are flush with each other and with the remaining portions of the sidewall (e.g., top surface 312 of layer 304).

[0047] For example, with reference to FIG. 3F, after the third material layer 322 is deposited on top of the second material layer 320 of the substrate 300, the substrate 300 can be transferred to one or more of the aforementioned process chambers for further processing. For example, in at least some embodiments, the second robot 114 can transfer the substrate 300 under vacuum from the CVD process chamber 105b to one of the intermediate transfer chambers 112a, 112b, e.g., intermediate transfer chamber 112a. The first robot 108 can then transfer the substrate 300 from the intermediate transfer chamber 112 to one of the load lock chambers 106A, 106B (e.g., load lock chamber 106A).

[0048] The substrate 300 may then be transferred to a stand-alone CMP process chamber 107 (e.g., a fourth process chamber) to remove a portion of the third material layer 322, a portion of the second material layer 320, and / or a portion of layer 304 (e.g., the first sidewall 308, the second sidewall 310, and a portion of the top surface 312). That is, the CMP process chamber 107 may be used to polish the substrate 300 to ensure that the second material layer 320 and the third material layer 322 are flush with each other and with layer 304 of the substrate 300.

[0049] As discussed above, in some embodiments, 202 may be omitted for relatively LAR substrates, such as incoming substrates with vias, trenches, etc. Thus, other than the omission of 202, substrate 400 may be processed identically to substrate 300, as shown in Figures 4A-4E. For example, rather than depositing a first material layer on top of base layer 402 at 202, second material layer 420 may be deposited directly on base layer 402, and method 200 may continue as described above, see, e.g., Figures 4D and 4E.

[0050] While the forgoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof.

Claims

1. 1. A method for processing a substrate, comprising: Selectively depositing a first metal layer in at least one feature on a substrate; depositing a second metal layer on top of the first metal layer and on at least the sidewalls defining the at least one feature; depositing a third metal layer on top of the second metal layer and within the feature to at least completely fill the at least one feature; removing a portion of the second metal layer, or a portion of the second metal layer and a portion of the third metal layer, such that the remaining portions of the second metal layer and the third metal layer are flush with a top surface of the at least one feature; The method includes:

2. 10. The method of claim 1, further comprising removing metal oxides from at least a surface of a base layer of the substrate, the base layer being made from at least one of aluminum (Al), copper (Cu), cobalt (Co), molybdenum (Mo), ruthenium (Ru), titanium (Ti), or tungsten (W).

3. depositing the first metal layer includes using a first process chamber; depositing the second metal layer includes using a second process chamber; depositing the third metal layer includes using at least one of the first process chamber or a third process chamber; removing at least a portion of the third metal layer and at least a portion of the second metal layer includes using a fourth process chamber; the removing of the metal oxide comprises using a fifth process chamber. The method of claim 2.

4. the first process chamber and the third process chamber are configured for chemical vapor deposition; the second process chamber is configured to perform physical vapor deposition; the fourth process chamber is configured to perform chemical mechanical polishing; the fifth process chamber is configured to perform at least one of a pre-clean or an etching process; The method according to any one of claims 1 to 3.

5. 2. The method of claim 1 , wherein depositing the first metal layer, the second metal layer, and the third metal layer comprises depositing at least one of Al, Co, Cu, Mo, Ru, Ti, and / or W.

6. The method of claim 1 , wherein the at least one feature is at least one of a via, a trench, or a dual damascene via chain.

7. 10. The method of claim 1 , wherein the first metal layer is deposited within the at least one feature to one of a height of about one-third (⅓) to about two-thirds (⅔) of a height of the at least one feature, or a height of about 30 nm to about 600 nm.

8. 8. The method of claim 1, wherein the steps of depositing the first metal layer, depositing the second metal layer, and depositing the third metal layer are performed using a cluster tool, and the steps of removing a portion of the second metal layer, or a portion of the second metal layer and a portion of the third metal layer are performed using a stand-alone apparatus.

9. 1. A method for processing a substrate, comprising: Selectively depositing a first metal layer in at least one feature on a substrate; depositing a second metal layer on top of the first metal layer and on at least sidewalls defining the at least one feature; depositing a third metal layer on top of the second metal layer to one of partially fill, completely fill, or overfill the at least one feature; removing a portion of the sidewall, a portion of the third metal layer, and a portion of the second metal layer such that the remaining portions of the second metal layer and the third metal layer are flush with each other and with the remaining portions of the sidewall; The method includes:

10. 10. The method of claim 9, further comprising removing metal oxides from at least a surface of a base layer of the substrate, the base layer being made from at least one of aluminum (Al), copper (Cu), cobalt (Co), molybdenum (Mo), ruthenium (Ru), titanium (Ti), or tungsten (W).

11. depositing the first metal layer includes using a first process chamber; depositing the second metal layer includes using a second process chamber; depositing the third metal layer includes using at least one of the first process chamber or a third process chamber; removing at least a portion of the sidewall, at least a portion of the third metal layer, and at least a portion of the second metal layer includes using a fourth process chamber; the removing of the metal oxide comprises using a fifth process chamber. The method of claim 10.

12. the first process chamber and the third process chamber are configured for chemical vapor deposition; the second process chamber is configured to perform physical vapor deposition; the fourth process chamber is configured to perform chemical mechanical polishing; the fifth process chamber is configured to perform at least one of a pre-clean or an etching process; The method according to any one of claims 9 to 11.

13. 10. The method of claim 9, wherein depositing the first metal layer, the second metal layer, and the third metal layer comprises depositing at least one of Al, Co, Cu, Mo, Ru, Ti, or W.

14. The method of claim 9 , wherein the at least one feature is at least one of a via, a trench, or a dual damascene via chain.

15. 15. The method of any one of claims 9 to 11, 13 or 14, wherein the first metal layer is deposited within the at least one feature to one of about one-third (⅓) to about two-thirds (⅔) of the height of the at least one feature, or about 30 nm to about 600 nm.

16. When executed by the processor, Selectively depositing a first metal layer in at least one feature on a substrate; depositing a second metal layer on top of the first metal layer and on at least sidewalls defining the at least one feature; depositing a third metal layer on top of the second metal layer to one of partially fill, completely fill, or overfill the at least one feature; removing a portion of the sidewall, a portion of the third metal layer, and a portion of the second metal layer such that the remaining portions of the second metal layer and the third metal layer are flush with each other and with the remaining portions of the sidewall; A non-transitory computer readable storage medium having stored thereon instructions for performing a method for processing a substrate, comprising:

17. 17. The non-transitory computer-readable storage medium of claim 16, further comprising removing metal oxides from at least a surface of a base layer of the substrate, the base layer being made from at least one of aluminum (Al), copper (Cu), cobalt (Co), molybdenum (Mo), ruthenium (Ru), titanium (Ti), or tungsten (W).

18. depositing the first metal layer includes using a first process chamber; depositing the second metal layer includes using a second process chamber; depositing the third metal layer includes using at least one of the first process chamber or a third process chamber; removing at least a portion of the sidewall, at least a portion of the third metal layer, and at least a portion of the second metal layer includes using a fourth process chamber; the removing of the metal oxide comprises using a fifth process chamber.

20. The non-transitory computer readable storage medium of claim 17.

19. the first process chamber and the third process chamber are configured for chemical vapor deposition; the second process chamber is configured to perform physical vapor deposition; the fourth process chamber is configured to perform chemical mechanical polishing; the fifth process chamber is configured to perform at least one of a pre-clean or an etching process; The non-transitory computer readable storage medium according to any one of claims 16 to 18.

20. 19. The non-transitory computer-readable storage medium of claim 16, wherein depositing the first metal layer, the second metal layer, and the third metal layer comprises depositing at least one of Al, Co, Cu, Mo, Ru, Ti, and / or W.

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