Display device

Abstract

To provide a display device with little light leakage and excellent contrast, or to provide a display device having a high aperture ratio and a capacitive element capable of increasing a charge capacity, or to provide a display device in which wiring delay due to a parasitic capacitance is reduced.SOLUTION: A display device has: a transistor on a substrate; a pixel electrode connected to the transistor; a signal line electrically connected to the transistor; a scanning line electrically connected to the transistor and intersecting the signal line; and a common electrode provided on the pixel electrode and the signal line via an insulating film. The common electrode has a striped region that extends in a direction intersecting the signal line.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The present invention relates to a method, manufacture, or composition of matter. One embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, and a driving method thereof. In particular, one aspect of the present invention relates to a display device and a manufacturing method thereof. It concerns the method. [Background technology]

[0002] In recent years, liquid crystal displays have been used in a variety of devices, particularly liquid crystal displays that are characterized by their thinness and light weight. The device (liquid crystal display) is used in a wide range of display applications.

[0003] As a method for applying an electric field to liquid crystal molecules contained in a liquid crystal display device, there are a vertical electric field method and a horizontal electric field method. In the in-plane switching type LCD panel, the pixel electrode and the common electrode are insulated from the same IPS (In-Plane Switching) mode provided on the insulating film and FFS (Fringe Field Switch) where pixel electrodes and common electrodes overlap There are two modes:

[0004] In the FFS mode liquid crystal display device, a pixel electrode has a slit-shaped opening. By applying an electric field generated between the pixel electrode and the common electrode to the liquid crystal molecules, Control the orientation.

[0005] FFS mode LCD devices have a high aperture ratio and can provide a wide viewing angle. It has the effect of improving image contrast in a wide range of situations, and has come to be widely used in recent years. (See Patent Document 1.) [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2000-89255 A Summary of the Invention [Problem to be solved by the invention]

[0007] One embodiment of the present invention provides a display device in which wiring delay due to parasitic capacitance is reduced. One embodiment of the present invention provides a display device with little light leakage and excellent contrast. One embodiment of the present invention is a capacitor element having a high aperture ratio and capable of increasing a charge capacitance. Another embodiment of the present invention is a display device having reduced power consumption. Another embodiment of the present invention provides a display device having a transistor with excellent electrical characteristics. According to another aspect of the present invention, there is provided a novel display device. One aspect of the present invention is to manufacture a display device having a high aperture ratio and a wide viewing angle with a small number of steps. Another embodiment of the present invention provides a method for manufacturing a novel display device.

[0008] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0009] One embodiment of the present invention is a semiconductor device including a transistor on an insulating surface and a pixel electrode connected to the transistor. , a signal line connected to the transistor, and a scanning line connected to the transistor and intersecting the signal line A common electrode is provided on the pixel electrode and the signal line via an insulating film. A pole is a display device having striped regions that extend in a direction that intersects with the signal lines.

[0010] The transistor has a gate electrode electrically connected to a scan line and a gate electrode overlapping the gate electrode. A gate insulating film between the gate electrode and the semiconductor film, and a signal line and a semiconductor film are electrically connected to the gate insulating film. A first conductive film electrically connected to the pixel electrode and the semiconductor film, and a second conductive film electrically connected to the pixel electrode and the semiconductor film. The first conductive film has an area parallel to the stripe-shaped areas of the scanning lines and the common electrode. do.

[0011] One embodiment of the present invention is a method for manufacturing a semiconductor device comprising: forming a signal line, a scan line, a transistor, a pixel electrode, a common The display device has an electrode and a capacitor. The transistor is electrically connected to a scanning line. a gate electrode overlapping the gate electrode, a semiconductor film overlapping the gate electrode, and a gate electrode between the gate electrode and the semiconductor film. a first conductive film electrically connected to the signal line and the semiconductor film; The capacitor element has a pixel electrode and a common electrode. The pixel electrode includes a nitride insulating film provided between the pixel electrode and the common electrode. The electrodes have striped regions extending in a direction intersecting the signal lines.

[0012] The second conductive film has regions parallel to the striped regions of the scanning lines and the common electrode.

[0013] In addition, the common electrode has a plurality of pixels arranged in parallel to the scanning lines in each of the stripe-shaped regions. It may extend across the electrodes.

[0014] In addition, the angle at which the common electrode and the signal line intersect must be between 70° and 110°. preferable.

[0015] The pixel electrodes are arranged in a matrix. The common electrodes are arranged at intersections with the scanning lines. The semiconductor film and the pixel electrode are connected to the striped region. It comes into contact with the insulating film.

[0016] The semiconductor film and the pixel electrode are made of In-Ga oxide, In-Zn oxide, or In- M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd).

[0017] The semiconductor film and the pixel electrode have a multi-layer structure including a first film and a second film. The film has a different atomic ratio of metal elements than the second film. Effect of the Invention

[0018] According to one aspect of the present invention, there is provided a display device in which wiring delay due to parasitic capacitance is reduced. Alternatively, according to one embodiment of the present invention, a display with little light leakage and excellent contrast can be achieved. According to one embodiment of the present invention, a device having a high aperture ratio and a charge It is possible to provide a display device having a capacitor element capable of increasing capacitance. According to one embodiment of the present invention, a display device with reduced power consumption can be provided. According to one embodiment of the present invention, a display device including a transistor with excellent electrical characteristics can be provided. Alternatively, according to one aspect of the present invention, a liquid crystal display having a high aperture ratio and a wide viewing angle can be obtained with a small number of steps. It is possible to manufacture a display device in which the above can be obtained. [Brief description of the drawings]

[0019] [Figure 1] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a display device. [Diagram 2] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 3] 1A and 1B are a block diagram and a circuit diagram illustrating one embodiment of a display device. [Figure 4] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 5] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 6] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 7] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 8] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 9] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a display device. [Figure 10] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 11] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 12] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 13] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 14] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 15] FIG. 2 is a diagram illustrating a display module. [Figure 16] 1A and 1B are diagrams illustrating external views of an electronic device according to an embodiment. [Figure 17] 1A and 1B are top views of Sample 1 and Sample 2 and graphs showing transmittance distributions. [Figure 18] 1A and 1B are top views and graphs showing transmittance distributions of Samples 3 and 4. [Figure 19] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 20]FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 21] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 22] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 23] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 24] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 25] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 26] FIG. 13 is a graph showing the temperature dependence of electrical conductivity. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and methods thereof may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments and examples. In the following embodiments and examples, the same parts or parts having similar functions are In the case of parts, the same reference numerals or the same hatch patterns are used in common among different drawings, and the repetition The explanation of the repetition will be omitted.

[0021] In each figure described in this specification, the size, thickness, or area of ​​each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.

[0022] In addition, the terms "first," "second," "third," etc., used in this specification are used interchangeably to avoid confusion of components. The number is added for convenience and is not intended to be a numerical limit. The terms can be replaced with "second" or "third" as appropriate for explanation.

[0023] The function of the "source" and "drain" is to change the direction of the current during circuit operation. For this reason, in this specification, the terms "sauce" and "dressing" are used interchangeably. The terms "in" and "in" may be used interchangeably.

[0024] Voltage is the potential difference between two points, and potential is the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a particle. Generally, the potential difference between a potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. In this specification, voltage may be read as potential.

[0025] In this specification, "electrically connected" means "something that has some kind of electrical effect" This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0026] (Embodiment 1) In this embodiment, a display device which is one embodiment of the present invention will be described with reference to drawings.

[0027] FIG. 1(A) is a cross-sectional view of an FFS mode liquid crystal display device, and FIG. 1(B) is a cross-sectional view of the liquid crystal display device. FIG. 1(A) is a top view of one pixel 10 of a display unit included in the device. This corresponds to a cross-sectional view taken along dashed line AB. In FIG. 1(B), a substrate 1, an insulating film 3, an insulating The insulating film 8, the insulating film 60, the substrate 61, the light-shielding film 62, the colored film 63, the insulating film 64, the insulating film 65, and and the liquid crystal layer 66 are omitted.

[0028] As shown in FIG. 1, the FFS mode liquid crystal display device is an active matrix type liquid crystal display device. A display device, in which a transistor 102 and a pixel electrode 7 are provided for each pixel 10 provided in a display portion. Yes.

[0029] As shown in FIG. 1A, the liquid crystal display device includes a transistor 102 on a substrate 1 and a transistor A pixel electrode 7 connected to the transistor 102 and an insulating layer in contact with the transistor 102 and the pixel electrode 7 a common electrode 9 in contact with the insulating film 8; and an insulating film 60 that functions as a film.

[0030] In addition, a light-shielding film 62 and a colored film 63 in contact with the substrate 61, and a substrate 61, a light-shielding film 62, and a colored film 63 in contact with the substrate 61, An insulating film 64 is in contact with the color film 63, and an insulating film 6 5. A liquid crystal layer 66 is provided between the insulating film 60 and the insulating film 65. However, polarizing plates are provided on the outside of the substrate 1 and the substrate 61.

[0031] The transistor 102 may be a staggered type, an inverted staggered type, a coplanar type, or the like. In the case of the inverted staggered type, the channel etch structure and the channel protection structure can be used. The structure, etc. can be appropriately used.

[0032] The transistor 102 described in this embodiment has an inverted staggered type and a channel etch structure. The transistor 102 is a transistor having a structure in which a gate electrode is formed on the substrate 1. a conductive film 2 that functions as a gate insulating film on the substrate 1 and the conductive film 2; A semiconductor film 4 overlaps the conductive film 2 via a conductive film 3, and a conductive film 5 and a conductive film 6 contact the semiconductor film 4. The conductive film 2 functions as a scanning line together with the gate electrode. The gate electrode is a part of the scanning line. The conductive film 5 functions as a signal line. 5 and 6 function as a source electrode and a drain electrode. One of the poles is a part of the signal line. Therefore, the transistor 102 is connected to the scan line and the signal line. In this embodiment, the conductive film 2 is electrically connected to the gate electrode as a scanning line. However, the gate electrode and the scanning line may be formed separately. It functions as one of the source and drain electrodes, and the signal line, but One of the in-electrodes and the signal line may be formed separately.

[0033] In the transistor 102, the semiconductor film 4 is made of silicon, silicon germanium, or In addition, the semiconductor film 4 may be formed of a non-semiconductor material. The structure may be a crystalline structure, a microcrystalline structure, a polycrystalline structure, a single crystal structure, or the like.

[0034] As shown in FIG. 1B, the pixel electrode 7 has a rectangular shape in the pixel 10. The display device shown in the embodiment is an active matrix liquid crystal display device. The electrodes 7 are arranged in a matrix. The pixel electrodes 7 and the common electrodes 9 are made of a light-transmitting film. is formed.

[0035] The shape of the pixel electrode 7 is not limited to a rectangular shape, but may be an appropriate shape according to the shape of the pixel 10. The pixel electrode 7 functions as a scanning line in the pixel 10. It is widely formed in the area surrounded by the conductive film 2 and the conductive film 5 that functions as a signal line. As a result, the aperture ratio of the pixel 10 can be increased.

[0036] The common electrode 9 is a region (first electrode) extending in a direction intersecting the conductive film 5 that functions as a signal line. That is, the conductive film 5 functions as a signal line. The striped regions (plurality of first regions) function as signal lines. The conductive film 5 is connected to a region (second region) extending in a direction parallel or approximately parallel to the conductive film 5. That is, the common electrode 9 is made up of a striped region (a plurality of first regions) and a It is composed of a connection region (second region).

[0037] In other words, the common electrode 9 is disposed on the pixel electrode 7 parallel to the conductive film 2 functioning as the scanning line. The display device has a plurality of regions (first regions) extending in a row or substantially parallel direction. The conductive film 2 functions as a stripe-shaped region (a plurality of first regions) extending in a direction parallel or substantially parallel to the conductive film 2. The striped regions are arranged in a direction intersecting the conductive film 2 functioning as a scanning line. It connects to the stretched region (second region).

[0038] The direction in which the striped regions (plurality of first regions) in the common electrode 9 extend and the direction in which the signal lines The angle at which the conductive film 5 extends is preferably 70° or more and 110° or less. By intersecting at such an angle, it is possible to reduce light leakage. The common electrode 9 is not formed on the entire surface of the plate 1, and the plate 1 has striped regions (plurality of first regions). In order to achieve this, the conductive film 2 functions as a scanning line, the conductive film 5 functions as a signal line, and the common It is possible to reduce the parasitic capacitance occurring between the electrode 9 and the first electrode 9 .

[0039] In addition, the striped regions (plurality of first regions) in the common electrode 9 may be linear. Alternatively, the striped regions (plurality of first regions) in the common electrode 9 can be arranged in a zigzag pattern. The common electrode 9 may have a shape in which a broken line, a wavy curve, or the like is repeated. When the striped region (plurality of first regions) has a shape in which broken lines or curves are repeated, the liquid The orientation of the crystal molecules becomes multi-domain, which improves the viewing angle.

[0040] Since the common electrode 9 is striped, when a voltage is applied to the pixel electrode 7, the pixel electrode 7 and the common Between the electrodes 9, a parabolic electric field is generated as shown by the dashed arrow in FIG. As a result, the liquid crystal molecules contained in the liquid crystal layer 66 can be aligned.

[0041] In the region where the pixel electrode 7 and the common electrode 9 overlap, the pixel electrode 7, the insulating film 8, and The pixel electrode 7 and the common electrode 9 function as a capacitance element. This increases the aperture ratio and increases the charge capacity stored in the capacitance element. In addition, the insulating film 8 between the pixel electrode 7 and the common electrode 9 can be made of a material having a high relative dielectric constant. By forming the capacitor using this material, it is possible to accumulate a large charge capacity in the capacitor element. Materials with high relative dielectric constants include silicon nitride, aluminum oxide, and gallium oxide. , yttrium oxide, hafnium oxide, hafnium silicate (HfSiO x ), nitrogen Doped hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium Aluminate (HfAl x O y N z ) etc.

[0042] The light-shielding film 62 functions as a black matrix. The colored film 63 functions as a color filter. The colored film 63 does not necessarily have to be provided. For example, in a liquid crystal display device, In the case of a black and white display, the colored film 63 may not be provided.

[0043] The colored film 63 may be a colored film that transmits light of a specific wavelength band. For example, A red (R) film that transmits light in the color wavelength band, and a green (G) film that transmits light in the green wavelength band. A film of blue (B) that transmits light in the blue wavelength band, or a film of blue (B) that transmits light in the blue wavelength band can be used.

[0044] The light-shielding film 62 may be a metal film having a function of blocking light of a specific wavelength band. Alternatively, an organic insulating film containing a black pigment or the like can be used.

[0045] The insulating film 65 functions as a flattening layer and prevents impurities that may be contained in the colored film 63 from being contained in the liquid crystal element. It has the function of suppressing the spread to the child.

[0046] Although not shown, a sealant is provided between the substrate 1 and the substrate 61. The liquid crystal layer 66 is sealed by the insulating film 60 and the insulating material. A spacer is provided between the insulating films 64 to maintain the thickness of the liquid crystal layer 66 (also called the cell gap). Good too.

[0047] Next, a method for driving the liquid crystal display device shown in this embodiment mode will be described with reference to FIG.

[0048] FIG. 2 is a top view of a pixel included in a pixel section of a liquid crystal display device in the FFS mode. In FIG. 2(A) and FIG. 2(B), the common electrode 9 extends in a direction parallel or approximately parallel to the conductive film 2 that functions as the scanning line. , spanning pixels 10a and 10b.

[0049] 2A and 2B show the direction intersecting the conductive films 5a and 5b functioning as signal lines. The pixels 10a and 10b are provided with a common electrode 9 having a striped region extending in the direction of the arrow in FIG. 2C) and FIG. 2D show stripe-shaped conductive films extending in a direction intersecting the conductive film 2 functioning as scanning lines. The pixels 10a and 10b are provided with a common electrode 9 having a region. A display element in a pixel that displays black when the pixel electrode is turned on and displays white when a voltage is applied to the pixel electrode. This section explains the driving method, i.e., the driving method for normally black mode display elements. In this case, the display element is a pixel electrode 7, a common electrode 9, and a liquid crystal layer. In this embodiment, the driving method of the normally black mode is However, a normally white mode drive method can also be used as appropriate.

[0050] In the case of black display, a voltage that turns on the transistor is applied to the scanning line, and And 0V is applied to the common electrode. As a result, 0V is applied to the pixel electrode. No electric field is generated between the electrode and the common electrode, and the liquid crystal molecules do not move.

[0051] To display white, a voltage that turns on the transistor is applied to the scan line, and liquid crystal is applied to the signal line. A voltage to operate the molecules, for example 6V, is applied, and 0V is applied to the common electrode. In other words, an electric field is generated between the pixel electrode and the common electrode, and the liquid crystal Molecules work.

[0052] In addition, since the explanation is given here using a negative type liquid crystal material, in the initial state, The liquid crystal molecules are aligned in a direction perpendicular to the common electrode. The alignment is called the initial alignment. In addition, by applying a voltage between the pixel electrode and the common electrode, In this embodiment, the liquid crystal molecules are rotated in a plane parallel to the Although a nematic type liquid crystal material will be used in the following description, a positive type liquid crystal material can also be used as appropriate.

[0053] In addition, a polarizing plate is provided on the outer side of the substrate 1 and the substrate 61 shown in FIG. The polarizer included in the polarizing plate provided on the side of the substrate 61 and the polarizer included in the polarizing plate provided on the outside of the substrate 61 are The polarizers are arranged in a crossed Nicol configuration so that they are perpendicular to each other. The liquid crystal is arranged in a direction parallel to the conductive film 2 functioning as a signal line or the conductive films 5a and 5b functioning as signal lines. When the molecules are oriented, the light is absorbed by the polarizing plate, resulting in a black display. In the following description, the polarizers are assumed to be in a crossed Nicol position, but they can also be in a parallel Nicol position as appropriate. Cut.

[0054] In FIG. 2, a conductive film 2 functioning as a scanning line, a semiconductor film 4a functioning as a signal line, A pixel having the conductive film 5a, the conductive film 6a, the pixel electrode 7a, and the common electrode 9 is referred to as a pixel 10a. The conductive film 2 functions as a scanning line, the semiconductor film 4b functions as a signal line, and the conductive film 5b functions as a signal line. A pixel having the conductive film 6b, the pixel electrode 7b, and the common electrode 9 is referred to as a pixel 10b. 2A and 2C show the initial state, and FIG. 2B and FIG. 2D show the pixel 10 This shows the state where b is displayed in white.

[0055] In the pixels 10a and 10b shown in FIG. 2(C) and FIG. 2(D), the common electrode 9 is used as a signal line. In order to extend in a direction parallel or approximately parallel to the conductive films 5a and 5b that function, In the initial state (black display), the liquid crystal molecules L are arranged perpendicular to the conductive films 5a and 5b which function as signal lines. The orientation is in the opposite direction.

[0056] As shown in FIG. 2D, when the pixel 10a is set to display black and the pixel 10b is set to display white, A voltage of 0 V is applied to the conductive film 5a functioning as a signal line and the common electrode 9. 6V is applied to the conductive film 5b which functions as a signal line. As a result, in the pixel 10b, 6V is applied to the electrode 7b, and as shown by the arrow in the figure, An electric field is generated, and the liquid crystal molecules L are aligned accordingly. In this example, the liquid crystal molecules L are aligned by 45 degrees. Indicates the rotated state.

[0057] In the pixel 10a, the potential of the pixel electrode 7a is 0V. The potential of the conductive film 5b that functions as a signal line is 6 V. As shown by the arrows in the figure, the pixel electrode 7a and the conductive film 5b functioning as the signal line An electric field is generated between the liquid crystal molecules L, and the liquid crystal molecules L are aligned in accordance with the electric field. As a result, black is displayed. In the pixel 10a where the liquid crystal molecules L should be aligned, the alignment state of some of the liquid crystal molecules L changes, causing light leakage. .

[0058] On the other hand, in the pixels 10a and 10b shown in FIG. 2(A) and FIG. 2(B), the common electrode 9 is a signal line Since the conductive film 5a and the conductive film 5b functioning as the conductive film 5b extend in a direction perpendicular to the conductive film 5a and the conductive film 5b, in the initial state (black display), The liquid crystal molecules L are arranged in a direction parallel or approximately parallel to the conductive films 5a and 5b that function as signal lines. To orient.

[0059] As shown in FIG. 2B, when the pixel 10a is set to display black and the pixel 10b is set to display white, A voltage of 0 V is applied to the conductive film 5a functioning as a signal line and the common electrode 9. 6V is applied to the conductive film 5b which functions as a signal line. As a result, in the pixel 10b, 6V is applied to the electrode 7b, and as shown by the arrow in the figure, An electric field is generated, and the liquid crystal molecules L are aligned accordingly. Here, the liquid crystal molecules L are aligned at -45°. Shows the rotated state.

[0060] In the pixel 10a, the potential of the pixel electrode 7a is 0V, and The potential of the conductive film 5b that functions as a signal line is 6 V. The conductive film 5b and the common electrode 9 functioning as the pixel electrode 7a and the signal line cross each other. A first electric field F1 generated between the conductive films 5b functioning as a first electric field is perpendicular to the major axis of the liquid crystal molecules L. As a result, since the liquid crystal molecules L are negative type liquid crystals, the liquid crystal molecules L do not move, and light leakage is suppressed. It is possible.

[0061] From the above, in the FFS mode liquid crystal display device, the stretching in the direction intersecting the signal line is By providing a common electrode having the same structure, a display device having excellent contrast can be manufactured. .

[0062] Moreover, the common electrode 9 shown in this embodiment is not formed over the entire surface of the substrate. Therefore, it is possible to reduce the area overlapping with the conductive films 5a and 5b that function as signal lines. It is possible to reduce the parasitic capacitance generated between the signal line and the common electrode 9. As a result, It is possible to reduce wiring delay in a display device formed using a large-area substrate. .

[0063] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0064] (Embodiment 2) In this embodiment, a display device which is one embodiment of the present invention will be described with reference to drawings. In this embodiment, an oxide semiconductor film is used as a semiconductor film included in a transistor. He explains.

[0065] The display device shown in FIG. 3A includes a pixel portion 101, a scanning line driver circuit 104, and a signal line driver circuit 105. The scanning line driving circuit 104 and the scanning line driving circuit 106 are arranged in parallel or approximately in parallel with each other. m scanning lines 107 whose potentials are controlled, each of which is arranged parallel or approximately parallel to each other and has a signal and n signal lines 109 whose potentials are controlled by a line driver circuit 106. The pixel section 101 has a plurality of pixels 103 arranged in a matrix. 9, each of which has a common line 115 arranged parallel or approximately parallel to each other. The signal line driver circuit 104 and the signal line driver circuit 106 may be collectively referred to as a driver circuit portion.

[0066] Each scanning line 107 corresponds to one of the pixels 103 arranged in m rows and n columns in the pixel section 101. The signal lines 109 are electrically connected to the n pixels 103 arranged in any one row. is m pixels 103 arranged in m rows and n columns, and m pixels 103 arranged in any one of the columns. 3. m and n are both integers of 1 or more. 5 denotes m pixels 103 arranged in m rows and n columns, which are arranged in any one of the columns. 03 is electrically connected.

[0067] FIG. 3B shows a circuit configuration that can be used for the pixel 103 of the display device shown in FIG. An example of this is shown below.

[0068] The pixel 103 shown in FIG. 3B includes a liquid crystal element 121, a transistor 102, and a capacitor element 105 and has.

[0069] One of the pair of electrodes of the liquid crystal element 121 is connected to the transistor 102, and the potential is The other of the pair of electrodes of the liquid crystal element 121 is connected to the common line 1 15 and a common potential is applied to the liquid crystal element 121. The alignment state of the liquid crystal molecules is controlled by the data written to the transistor 102 .

[0070] The liquid crystal element 121 transmits or blocks light by the optical modulation effect of the liquid crystal molecules. The optical modulation of liquid crystal molecules is achieved by controlling the electric field (horizontal) applied to the liquid crystal molecules. The liquid crystal element is controlled by an electric field (including a lateral electric field, a vertical electric field, or an oblique electric field). The liquid crystal material used for the element 121 is a nematic liquid crystal, a cholesteric liquid crystal, a smectic liquid crystal, or the like. Liquid crystals include ferroelectric liquid crystals, thermotropic liquid crystals, lyotropic liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. Some examples include:

[0071] The display device having the liquid crystal element 121 is driven in the FFS mode.

[0072] In addition, a liquid crystal composition containing a liquid crystal material exhibiting a blue phase and a chiral agent is also disclosed. The liquid crystal element may be made of the composition. The liquid crystal that exhibits the blue phase has a response speed of 1 msec or less. Since the liquid crystal display is optically isotropic, no alignment treatment is required and the viewing angle dependency is small.

[0073] In the configuration of the pixel 103 shown in FIG. One of the drain electrodes is electrically connected to the signal line 109, and the other is connected to a pair of the liquid crystal element 121. The gate electrode of the transistor 102 is electrically connected to one of the electrodes of the scan line 1. 07. The transistor 102 is turned on or off. This has the function of controlling the writing of data of the data signal.

[0074] In the configuration of the pixel 103 shown in FIG. 3B, one of a pair of electrodes of the capacitor 105 is The other of the pair of electrodes of the capacitor 105 is connected to the common line 11. The value of the potential of the common line 115 is appropriately set according to the specifications of the pixel 103. The capacitance element 105 functions as a storage capacitor that stores the written data. In this embodiment, one of a pair of electrodes of the capacitor 105 is a liquid crystal element. The other of the pair of electrodes of the capacitor 105 is a liquid crystal element. The other of the pair of electrodes of terminal 121.

[0075] Next, a specific configuration of the element substrate included in the display device will be described. A top view of the pixels 103a, 103b, and 103c is shown in FIG.

[0076] In FIG. 4, the conductive film 13 functioning as the scanning line is oriented in a direction substantially perpendicular to the signal line (left in the figure). The conductive film 21a, which functions as a signal line, is disposed so as to extend in a direction substantially parallel to the scanning line. The scanning lines are arranged to extend in the perpendicular direction (the vertical direction in the figure). The conductive film 13 is electrically connected to a scanning line driving circuit 104 (see FIG. 3) and The conductive film 21a functioning as a line is electrically connected to the signal line driver circuit 106 (see FIG. 3A). are connected to the network.

[0077] The transistor 102 is provided in a region where the scanning line and the signal line intersect. The gate electrode 102 includes a conductive film 13 that functions as a gate electrode, a gate insulating film (not shown in FIG. 4), and a gate insulating film 13b. ), an oxide semiconductor film 19a in which a channel region is formed on the gate insulating film, The conductive films 21a and 21b function as a source electrode and a drain electrode. The conductive film 13 also functions as a scan line, and a region overlapping with the oxide semiconductor film 19a serves as a transistor. The conductive film 21a functions as a gate electrode of the gate electrode 102. The conductive film 21a also functions as a signal line. The region overlapping with the oxide semiconductor film 19a is the source electrode or the drain electrode of the transistor 102. In FIG. 4, the scanning line has an oxide film at the end in the top view. The scanning lines are located outside the end of the semiconductor film 19a. As a result, the oxide semiconductor in the transistor functions as a light-shielding film that blocks light from Since the film 19a is not irradiated with light, fluctuations in the electrical characteristics of the transistor can be suppressed.

[0078] The conductive film 21b is electrically connected to the pixel electrode 19b. A common electrode 29 is provided on the pixel electrode 19b via an insulating film. The insulating film has an opening 40 indicated by a dashed line. Thus, the pixel electrode 19b is in contact with a nitride insulating film (not shown in FIG. 4).

[0079] The common electrode 29 is a striped region (a plurality of first regions) extending in a direction intersecting the signal line. The first regions have a first insulating film extending in a direction parallel or substantially parallel to the signal line. 2. For this reason, a common electrode having striped regions (plurality of first regions) In 29, each of the multiple first regions is at the same potential.

[0080] The capacitance element 105 is formed in the area where the pixel electrode 19b and the common electrode 29 overlap. The element electrode 19b and the common electrode 29 are transparent. do.

[0081] As shown in FIG. 4, the liquid crystal display device according to the present embodiment is an FFS mode. Since the common electrode 29 having stripe-shaped regions extending in a direction intersecting the signal lines is provided, A display device with excellent contrast can be manufactured.

[0082] In addition, since the capacitor 105 has a light-transmitting property, the capacitor 105 is large and is disposed in the pixel 103. Therefore, the aperture ratio can be increased, typically to 50% or more. , preferably 60% or more, and the charge capacity of the display device is increased. For example, in a display device with high resolution, such as a liquid crystal display device, The area of ​​the pixel is reduced, and the area of ​​the capacitance element is also reduced. This allows for a high-resolution display device. In this embodiment, however, the charge capacity stored in the capacitance element is small. Since the capacitor 105 shown in FIG. 1 has a light-transmitting property, the capacitor is provided in each pixel. It is possible to increase the aperture ratio while obtaining a sufficient charge capacity in the pixel. High resolution with resolution of 200ppi or more, 300ppi or more, or even 500ppi or more The liquid crystal display device can be suitably used for a high-resolution display device.

[0083] In addition, in a liquid crystal display device, the larger the capacitance value of the capacitance element, the more In this case, the period during which the alignment of the liquid crystal molecules in the liquid crystal element is kept constant can be extended. When displaying the image data, the period can be extended, reducing the number of times the image data needs to be rewritten. This makes it possible to reduce power consumption. This allows the aperture ratio to be increased even in high-resolution display devices, making it possible to reduce the backlight This allows the efficient use of light from light sources such as LEDs, and reduces the power consumption of display devices. Cut.

[0084] Note that the top view of one aspect of the embodiment of the present invention is not limited to this. For example, as shown in FIG. 19, in the common electrode 29, the connection area is Alternatively, the insulating film 14 may be formed on a conductive film that functions as the insulating film.

[0085] Next, a cross-sectional view taken along dashed lines AB and CD in FIG. 4 is shown in FIG. The transistor 102 is a channel etch type transistor. 1 is a cross-sectional view of a transistor 102 in the channel length direction and a capacitor 105, and The cross-sectional view in this example is a cross-sectional view of the transistor 102 in the channel width direction.

[0086] The transistor 102 shown in FIG. 5 is a transistor having a single gate structure. The semiconductor device has a conductive film 13 that functions as a gate electrode provided on the substrate 11. A nitride insulating film 15 is formed on the conductive film 13 that functions as a gate electrode. 5, and the nitride insulating film 15 and the oxide insulating film 17 are formed on the 1, an oxide semiconductor film 19a overlapping with the conductive film 13 functioning as a gate electrode; Conductive films 21a and 21b, which function as a source electrode and a drain electrode and are in contact with the film 19a, The oxide insulating film 17, the oxide semiconductor film 19a, and the source and drain electrodes An oxide insulating film 23 is formed on the conductive films 21a and 21b which function as the gate electrodes. An oxide insulating film 25 is formed on the oxide insulating film 23. 5. A nitride insulating film 27 is formed on the conductive film 21b. Also, the pixel electrode 19b is formed of an oxide The pixel electrode 19b is formed on the insulating film 17. The pixel electrode 19b functions as a source electrode and a drain electrode. One of the conductive films 21a and 21b that can function is connected to the conductive film 21b in this example. A pole 29 is formed on the nitride insulating film 27 .

[0087] In addition, the area where the pixel electrode 19b, the nitride insulating film 27, and the common electrode 29 overlap each other forms a capacitance. It functions as element 105.

[0088] Note that the cross-sectional view of one aspect of the embodiment of the present invention is not limited to this. For example, the pixel electrode 19b may have a slit. 19b may be in a comb-tooth shape. An example of a cross-sectional view in this case is shown in FIG. 20. Or, FIG. As shown, an insulating film 26b may be provided on the nitride insulating film 27. For example, An organic resin film may be provided as the film 26b. This makes it possible to flatten the surface of the insulating film 26b. That is, the insulating film 26b can function as a planarizing film, for example. Alternatively, the common electrode 29 and the conductive film 21b can be overlapped to form a capacitor. A capacitor 105b may be formed. Examples of cross-sectional views in this case are shown in FIGS.

[0089] The configuration of the display device will be described in detail below.

[0090] There is no particular restriction on the material of the substrate 11, but it should be at least strong enough to withstand the subsequent heat treatment. It is necessary to have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, surface treatment substrate, etc. A fiber substrate or the like may be used as the substrate 11. Also, materials such as silicon and silicon carbide may be used. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to use a substrate, an SOI substrate, or the like, on which a semiconductor element is provided. The substrate 11 may be a glass substrate. In the case of 6th generation (1500mm x 1850mm), 7th generation (1870mm x 2200mm m), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800m By using large area substrates such as 10th generation (2950mm x 3400mm), A display device of the above can be manufactured.

[0091] In addition, a flexible substrate is used as the substrate 11, and the transistor 102 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 11 and the transistor 102. The release layer is separated from the substrate 11 after a display device is partially or entirely completed thereon, The transistor 102 can be transferred to another substrate. It can also be transferred to solid or flexible substrates.

[0092] The conductive film 13 functioning as the gate electrode is made of aluminum, chromium, copper, tantalum, titanium, etc. A metal element selected from the group consisting of tungsten, molybdenum, and tungsten, or a metal element selected from the group consisting of the above-mentioned metal elements. The metal elements may be alloys of the above metal elements or alloys of the above metal elements. In addition, one or more metal elements selected from manganese and zirconium may be used. The conductive film 13 functioning as the gate electrode may have a single-layer structure or a laminated structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, an aluminum film on a titanium film, A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, Two-layer structure in which a tungsten film is laminated on a tantalum film, a tantalum nitride film or a tungsten nitride film Two-layer structure with tungsten film on top of titanium film, two-layer structure with copper film on top of titanium film, A titanium film is formed on the titanium film, and an aluminum film is laminated on the titanium film. There are also aluminum, titanium, tantalum, tungsten, molybdenum, etc. A combination of one or more elements selected from the group consisting of chromium, neodymium, and scandium. A gold film or a nitride film may also be used.

[0093] The conductive film 13 functioning as a gate electrode is made of indium tin oxide or tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light transmitting properties, such as indium tin oxide doped with silicon oxide, is used. In addition, the conductive material having light transmitting properties and the metal element may be laminated. It is also possible.

[0094] The nitride insulating film 15 may be a nitride insulating film having low oxygen permeability. A nitride insulating film having low permeability to oxygen, hydrogen, and water can be used for the oxygen insulating film. As a nitride insulating film having low permeability to oxygen, hydrogen, and water, , silicon nitride film, silicon oxynitride film, aluminum nitride film, aluminum oxynitride film In addition, there are nitride insulating films with low oxygen permeability, and oxide, hydrogen, and water permeability. Instead of the nitride insulating film, an aluminum oxide film, an aluminum oxynitride film, or a gallium oxide film can be used. film, gallium oxide nitride film, yttrium oxide film, yttrium oxide nitride film, hafnium oxide For example, an oxide insulating film such as a hafnium oxide nitride film or a hafnium oxynitride film can be used.

[0095] The thickness of the nitride insulating film 15 is 5 nm or more and 100 nm or less, and more preferably 20 nm or more. It is recommended to set it to 80 nm or less.

[0096] The oxide insulating film 17 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or oxide. Aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn-based metal oxides are used. It is sufficient to provide the insulating film 100 in the form of a laminate or a single layer.

[0097] The oxide insulating film 17 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminium minate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. The use of high-quality materials can reduce gate leakage of transistors.

[0098] The thickness of the oxide insulating film 17 is 5 nm or more and 400 nm or less, and more preferably 10 nm or more. It is preferably 300 nm or less, and more preferably 50 nm or more and 250 nm or less.

[0099] The oxide semiconductor film 19a is typically made of In-Ga oxide, In-Zn oxide, In- M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd).

[0100] When the oxide semiconductor film 19a is an In-M-Zn oxide film, the sum of In and M is When the atomic percentage of In is 100 atomic %, the atomic percentage of In and M is 25 atomic %. %, M is less than 75 atomic %, and preferably In is more than 34 atomic %. and M is less than 66 atomic %.

[0101] The oxide semiconductor film 19a has an energy gap of 2 eV or more, preferably 2.5 eV or more. In this way, the oxide semiconductor having a wide energy gap is By using a conductor, the off-state current of the transistor 102 can be reduced.

[0102] The thickness of the oxide semiconductor film 19a is 3 nm to 200 nm, preferably 3 nm to 100 nm. 00 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0103] The oxide semiconductor film 19a is an In-M-Zn oxide film (wherein M is Al, Ga, Y, Zr, La, In the case of In-M-Zn oxide films, the sputtering method used to deposit In-M-Zn oxide films is The atomic ratio of the metal elements in the annealing target preferably satisfies In≧M and Zn≧M. The atomic ratio of the metal elements in such a sputtering target is In:M:Zn=1 :1:1, In:M:Zn=1:1:1.2, and In:M:Zn=3:1:2 are preferred. The atomic ratio of the oxide semiconductor film 19a to be formed may be calculated by subtracting the above-mentioned sputtering time from the atomic ratio of the oxide semiconductor film 19a. The atomic ratio of metal elements contained in the target varies by ±40%. .

[0104] As the oxide semiconductor film 19a, an oxide semiconductor film with low carrier density is used. For example, The oxide semiconductor film 19a has a carrier density of 1×10 17 pieces / cm 3 Below, preferably 1 ×10 15 pieces / cm 3 Less than 1×10, more preferably 13 pieces / cm 3 The following is more preferred: 1×10 11 pieces / cm 3 The following oxide semiconductor film is used.

[0105] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of a transistor, the carrier density and impurity of the oxide semiconductor film 19a are controlled. The concentration of metals, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. are appropriately adjusted. It is preferred.

[0106] Note that the oxide semiconductor film 19a is an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a conductive film, it is possible to fabricate a transistor with even better electrical characteristics. Here, it is preferable that the impurity concentration is low and the defect level density is low (the amount of oxygen vacancies is small). This is called high purity authentic or substantially high purity authentic. High purity authentic or substantially high purity authentic Since oxide semiconductors have few carrier generation sources, it is possible to reduce the carrier density. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can be formed. The electrical characteristics of the transistor are such that the threshold voltage is negative (also called normally on). In addition, a highly-purified intrinsic or substantially highly-purified intrinsic oxide semiconductor film has a low defect level. The trap level density may also be low due to the low level density. The qualitatively high purity intrinsic oxide semiconductor film has a significantly small off-state current and a channel width of 1× 10 6 Even if the device has a channel length L of 10 μm, In the voltage (drain voltage) range of 1V to 10V, the off-state current is Below the measurement limit of the analyzer, i.e. 1×10 -13 A characteristic of less than A can be obtained. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has good electrical characteristics. The fluctuation of the impurities is small, and the transistor can be highly reliable. Examples include nitrogen, an alkali metal, or an alkaline earth metal.

[0107] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. Oxygen vacancies are formed in the lattice from which oxygen has been removed (or in the portion from which oxygen has been removed). When hydrogen enters the gap, electrons, which act as carriers, can be generated. When it bonds with oxygen, which bonds with metal atoms, it can generate electrons, which act as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen has normally-on characteristics. It is easy to become.

[0108] Therefore, in the oxide semiconductor film 19a, oxygen vacancies and hydrogen are reduced as much as possible. Specifically, it is preferable that the oxide semiconductor film 19a is By SIMS (Secondary Ion Mass Spectrometry) The resulting hydrogen concentration is 5×10 19 atoms / cm 3 Less than or equal to 1×10 19 a toms / cm 3 Less than or equal to 5×10 18 atoms / cm 3 Below, preferably 1 ×10 18 atoms / cm 3 Less than or equal to 5×10 17 atoms / cm 3 Below or less, and more preferably 1×10 16 atoms / cm 3 The following applies.

[0109] The oxide semiconductor film 19a contains silicon or carbon, which is one of the Group 14 elements. As a result, oxygen vacancies increase in the oxide semiconductor film 19a, causing the oxide semiconductor film 19a to become n-type. The concentrations of silicon and carbon in the nitride semiconductor film 19a (obtained by secondary ion mass spectrometry) The concentration of 18 atoms / cm 3 Less than or equal to 2×10 17 atoms / cm 3 The following applies.

[0110] In addition, in the oxide semiconductor film 19a, an alkali metal ion concentration obtained by secondary ion mass spectrometry is The concentration of metal or alkaline earth metal is 1×10 18 atoms / cm 3 The following is preferably is 2 × 10 16 atoms / cm 3 The following are the alkali metals and alkaline earth metals: When a compound is bonded to an oxide semiconductor, carriers may be generated, increasing the off-state current of a transistor. For this reason, the alkali metal or alkali metal in the oxide semiconductor film 19a may become large. It is preferable to reduce the concentration of alkaline earth metals.

[0111] In addition, when the oxide semiconductor film 19a contains nitrogen, electrons that serve as carriers are generated, and The carrier density increases and it becomes easier to make the material n-type. Therefore, the transistor having the oxide semiconductor film tends to be normally on. In this case, it is preferable that the nitrogen content is reduced as much as possible. For example, in the case of secondary ion mass spectrometry, The nitrogen concentration obtained is 5×10 18 atoms / cm 3 It is preferable to do the following: .

[0112] The oxide semiconductor film 19a may have a non-single crystal structure. For example, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described later), Among non-single crystal structures, the amorphous structure has the highest defect level density, C AAC-OS has the lowest defect state density.

[0113] The oxide semiconductor film 19a may have, for example, an amorphous structure. For example, the atomic arrangement is disordered and has no crystalline components.

[0114] Note that the oxide semiconductor film 19a may have an amorphous structure, a microcrystalline structure, a polycrystalline structure, or a The mixed film had two or more regions: a CAAC-OS region, a single crystal structure region, and a The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, and a polycrystalline structure region. A single-layer structure having two or more regions of either a CAAC-OS region or a single crystal structure region. In addition, the mixed film may have regions with an amorphous structure, a microcrystalline structure, a polycrystalline structure, or the like. A stack of two or more regions of the following structure: a region of a crystalline structure, a region of a CAAC-OS structure, and a region of a single crystal structure It may have a structure.

[0115] The pixel electrode 19b is formed by processing an oxide semiconductor film that is formed at the same time as the oxide semiconductor film 19a. Therefore, the pixel electrode 19b is formed by using the same metal element as the oxide semiconductor film 19a. In addition, the oxide semiconductor film 19a may have a crystal structure similar to or different from the crystal structure of the oxide semiconductor film 19a. However, the oxide semiconductor film 19a is a film having the oxide semiconductor layer 19b. By making the body film have impurities or oxygen deficiencies, the film becomes conductive, and the pixel electrode The oxide semiconductor film functions as 19b. Impurities contained in the oxide semiconductor film include hydrogen. Instead of hydrogen, impurities include boron, phosphorus, tin, antimony, rare gas elements, and alkali. The pixel electrode 19b may contain an oxide semiconductor. This film is formed at the same time as the conductive film 19a, and oxygen vacancies are formed due to plasma damage, etc. Alternatively, the pixel electrode 19b is a film having enhanced conductivity. This film is formed at the same time, contains impurities, and is oxygen deficient due to plasma damage, etc. Losses are formed in the film, increasing its electrical conductivity.

[0116] Therefore, both the oxide semiconductor film 19a and the pixel electrode 19b are formed on the oxide insulating film 17. Specifically, the pixel oxide semiconductor film 19a is different from the pixel oxide semiconductor film 19b in impurity concentration. The electrode 19b has a high impurity concentration. For example, the concentration of hydrogen contained in the oxide semiconductor film 19a is , 5×10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below Lower, preferably 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atom s / cm 3 Less than or equal to 5×10 17 atoms / cm 3 The following is more preferable: is 1×10 16 atoms / cm 3 The concentration of hydrogen contained in the pixel electrode 19b is , 8×10 19 atoms / cm 3 More than 1×10 20 atoms / cm 3 Below or more preferably 5×10 20 atoms / cm 3 The oxide semiconductor film The concentration of hydrogen contained in the pixel electrode 19b is twice as high as that of the pixel electrode 19a, and preferably 10 times or more. It is.

[0117] In addition, the oxide semiconductor film formed at the same time as the oxide semiconductor film 19a is exposed to plasma. The oxide semiconductor film can be damaged by the above-mentioned reaction, and oxygen vacancies can be formed. For example, When a film is formed on an oxide semiconductor film by plasma CVD or sputtering, the oxide The oxide semiconductor film is exposed to plasma, and oxygen vacancies are generated. In the etching treatment for forming the oxide insulating film 25, the oxide semiconductor film is etched into the plasma. When the oxide semiconductor film is exposed to the oxygen, oxygen vacancies are generated. Alternatively, the oxide semiconductor film becomes a mixture of oxygen and hydrogen. Exposure to plasma of mixed gas, hydrogen, rare gas, ammonia, etc. generates oxygen vacancies. As a result, the oxide semiconductor film becomes highly conductive and functions as a pixel electrode 19b.

[0118] In other words, the pixel electrode 19b is formed of a highly conductive oxide semiconductor film. In other words, the pixel electrode 19b is formed of a highly conductive metal oxide film.

[0119] In addition, when a silicon nitride film is used as the nitride insulating film 27, the silicon nitride film is hydrogenated. Therefore, hydrogen in the nitride insulating film 27 is formed simultaneously with the oxide semiconductor film 19a. When hydrogen diffuses into the oxide semiconductor film, it bonds with oxygen in the oxide semiconductor film and becomes a carrier In addition, silicon nitride films are formed by plasma CVD or sputtering. When the oxide semiconductor film is formed by the plasma etching method, the oxide semiconductor film is exposed to plasma and oxygen vacancies are generated. When hydrogen contained in the silicon nitride film enters the electron vacancy, electron carriers are generated. As a result, the oxide semiconductor film becomes highly conductive and becomes the pixel electrode 19b.

[0120] When hydrogen is added to an oxide semiconductor with oxygen vacancies, hydrogen enters the oxygen vacancy sites. A donor level is formed near the conduction band. As a result, the oxide semiconductor has high electrical conductivity. The oxide semiconductor that has been made conductive can be called an oxide conductor. In other words, the pixel electrode 19b can be said to be formed of an oxide conductive film. Since semiconductors have a large energy gap, they are transparent to visible light. An oxide conductor is an oxide semiconductor having a donor level in the vicinity of the conduction band. The effect of absorption due to donor levels is small, and the material has the same level of transparency to visible light as oxide semiconductors. Yes.

[0121] The pixel electrode 19b has a lower resistivity than the oxide semiconductor film 19a. However, the resistivity of the oxide semiconductor film 19a is 1×10 -8 1×10 times more -1 Less than double is preferred, typically 1×10 -3 Ωcm or more 1×10 4 Less than Ωcm, more preferably has a resistivity of 1×10 -3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0122] The conductive films 21a and 21b functioning as the source electrode and the drain electrode are made of aluminum. Titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum The alloy mainly composed of tungsten or tungsten is used in a single layer structure. For example, a single layer structure of an aluminum film containing silicon, a titanium A two-layer structure in which an aluminum film is laminated on a tungsten film. A two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film; Two-layer structure with copper film laminated on tungsten film, two-layer structure with copper film laminated on tungsten film, titanium A titanium film or titanium nitride film is laminated on the titanium film or titanium nitride film. A three-layer structure in which a titanium film or titanium nitride film is formed on top of a copper film. A molybdenum film or a molybdenum nitride film and a layer of the molybdenum film or the molybdenum nitride film Then, an aluminum film or a copper film is laminated on the substrate, and a molybdenum film or a molybdenum nitride film is further laminated on the substrate. There are three-layer structures that form a dendritic film. A transparent conductive material including the transparent conductive material may be used.

[0123] The oxide insulating film 23 or the oxide insulating film 25 contains oxygen having a stoichiometric composition. It is preferable to use an oxide insulating film containing a lot of oxygen. Then, an oxide insulating film that transmits oxygen is formed. An oxide insulating film containing more oxygen than the oxygen that satisfies the condition is formed.

[0124] The oxide insulating film 23 is an oxide insulating film that transmits oxygen. The oxygen desorbed from the oxide insulating film 25 provided on the oxide insulating film 23 is absorbed through the oxide insulating film 23. The oxide insulating film 23 can be transferred to the oxide semiconductor film 19a. The oxide insulating film 25 may also serve as a film for reducing damage to the oxide semiconductor film 19a when the oxide insulating film 25 is formed. It works.

[0125] The oxide insulating film 23 has a thickness of 5 nm to 150 nm, preferably 5 nm or more. A silicon oxide film, a silicon oxynitride film, or the like having a thickness of 50 nm or less can be used. In the present specification, a silicon oxynitride film is a film having a higher oxygen content than nitrogen as a composition. A silicon nitride oxide film is a film that contains more nitrogen than oxygen. Refers to a large amount of membrane.

[0126] In addition, it is preferable that the oxide insulating film 23 has a small amount of defects. Therefore, the spin density of the signal appearing at g=2.001 is 3×10 17 spins / cm 3 Below The signal at g=2.001 is due to dangling of silicon. This is due to the bond. When the oxide insulating film 23 has a high defect density, the defects This is because oxygen is bonded to the oxide insulating film 23, and the amount of oxygen that permeates the oxide insulating film 23 is reduced. be.

[0127] In addition, the number of defects at the interface between the oxide insulating film 23 and the oxide semiconductor film 19a is small. is preferable. Typically, the ESR measurement shows that the oxide semiconductor film 19a has a defect-derived g = 1.93, the spin density of the signal is 1 × 10 17 spins / cm 3 The following further It is preferably below the lower limit of detection.

[0128] Note that in the oxide insulating film 23, all of the oxygen that has entered the oxide insulating film 23 from the outside is In some cases, the oxide insulating film 23 may move to the outside. In some cases, part of the oxygen remains in the oxide insulating film 23. As oxygen enters the oxide insulating film 23, the oxygen contained in the oxide insulating film 23 flows out of the oxide insulating film 23. The movement of oxygen may cause the movement of oxygen in the oxide insulating film 23 in some cases.

[0129] An oxide insulating film 25 is formed so as to be in contact with the oxide insulating film 23. The fifth embodiment is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. The oxide insulating film containing more oxygen than the stoichiometric composition is heated to remove the oxygen. A part of the element is released. The oxide insulating film contains more oxygen than the oxygen that satisfies the stoichiometric composition. In TDS analysis, the amount of oxygen released was 1.0 x 10 18 atoms / cm 3 More than 3.0×10 20 atoms / cm 3 The oxide insulating film The surface temperature of the film during the TDS analysis was 100°C to 700°C. or in the range of 100° C. to 500° C.

[0130] The oxide insulating film 25 has a thickness of 30 nm to 500 nm, preferably 50 nm. A silicon oxide film, a silicon oxynitride film, or the like having a thickness of 400 nm or more and 400 nm or less can be used.

[0131] In addition, it is preferable that the oxide insulating film 25 has a small amount of defects. Therefore, the spin density of the signal appearing at g=2.001 is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 It is preferable that the oxidation The oxide insulating film 25 is located farther away from the oxide semiconductor film 19a than the oxide insulating film 23. The oxide insulating film 24 may have a higher defect density than the oxide insulating film 23.

[0132] The nitride insulating film 27 is made of a nitride insulating film having low oxygen permeability, similar to the nitride insulating film 15. Furthermore, it is possible to use a nitride insulating film that has low permeability to oxygen, hydrogen, and water. It is possible.

[0133] The nitride insulating film 27 has a thickness of 50 nm to 300 nm, preferably 100 nm. Silicon nitride film, silicon oxynitride film, aluminum nitride film, Examples include an aluminum oxide nitride film.

[0134] In the oxide insulating film 23 or the oxide insulating film 25, oxygen satisfying the stoichiometric composition is When the oxide insulating film 23 or the oxide insulating film 22 contains more oxygen than the oxide insulating film 21, Part of the oxygen contained in the oxide semiconductor film 19a is transferred to the oxide semiconductor film 19a. It is possible to reduce the amount of oxygen vacancies contained in the silicon dioxide.

[0135] A transistor including an oxide semiconductor film having oxygen vacancies in the oxide semiconductor film is The threshold voltage tends to shift in the negative direction, and the device tends to have normally-on characteristics. This is because oxygen vacancies in the oxide semiconductor film generate charges, resulting in a decrease in resistance. If a transistor has normally-on characteristics, malfunctions are likely to occur during operation. Various problems may occur, such as high power consumption when not in operation. The stress test increases the variation of the electrical characteristics of the transistor, typically the threshold voltage. There is a problem that...

[0136] However, in the transistor 102 described in this embodiment, The oxide insulating film 23 or the oxide insulating film 25 has a stoichiometric composition of oxygen. As a result, the oxide insulating film 23 or the oxide insulating film 24 contains more oxygen than the oxide insulating film 22. The oxygen contained in the insulating film 25 is efficiently transferred to the oxide semiconductor film 19a, and the oxide semiconductor film 1 It is possible to reduce the amount of oxygen vacancies in 9a. As a result, the device has normally-off characteristics. In addition, the electrical characteristics of the transistors are evaluated by aging and stress testing. Typically, the amount of variation in threshold voltage can be reduced.

[0137] The common electrode 29 is made of a conductive film having light-transmitting properties. Indium oxide film containing tungsten oxide, indium zinc oxide film containing tungsten oxide , indium oxide film containing titanium oxide, indium tin oxide film containing titanium oxide, Indium tin oxide (ITO) film, indium zinc oxide film, silicon oxide film Examples include an indium tin oxide film with an added metal.

[0138] The common electrode 29 extends in a striped pattern in a direction intersecting with the conductive film 21a that functions as a signal line. Therefore, in the vicinity of the pixel electrode 19b and the conductive film 21a, the liquid crystal molecules It is possible to prevent unintended alignment of the liquid crystal and suppress light leakage. A display device with excellent contrast can be manufactured.

[0139] In addition, the element substrate of the display device described in this embodiment has the same structure as the oxide semiconductor film of the transistor. At the same time, a pixel electrode is formed. The pixel electrode functions as one electrode of a capacitance element. The common electrode functions as the other electrode of the capacitance element. Therefore, a step of forming a new conductive film is not required, and the manufacturing process can be reduced. As a result, the area occupied by the capacitor element is increased, and the aperture ratio of the pixel is increased. It can be improved.

[0140] Next, a method for manufacturing the transistor 102 and the capacitor 105 shown in FIG. This will be explained with reference to FIG.

[0141] As shown in FIG. 6A, a conductive film 12 that will become a conductive film 13 is formed on a substrate 11. The film 12 can be formed by sputtering, chemical vapor deposition (CVD) (metal organic chemical vapor deposition (MO CVD, metal chemical vapor deposition, atomic layer deposition (ALD) or plasma chemical vapor deposition It is formed by deposition (PECVD), evaporation, pulsed laser deposition (PLD), etc. Metal organic chemical vapor deposition (MOCVD), metal chemical vapor deposition, atomic layer deposition ( By using the ALD method, it is possible to form a conductive film that is less damaged by plasma. Cut.

[0142] In this embodiment, a glass substrate is used as the substrate 11. The conductive film 12 is a 100 mm thick film. A tungsten film with a thickness of nm is formed by sputtering.

[0143] Next, a mask is formed on the conductive film 12 by a photolithography process using a first photomask. Next, a part of the conductive film 12 is etched using the mask, as shown in FIG. As shown in FIG. 1, a conductive film 13 that functions as a gate electrode is formed. After that, the mask is removed. Remove.

[0144] The conductive film 13 functioning as the gate electrode may be formed by electrolytic plating instead of the above-mentioned method. The conductive layer may be formed by a method such as a printing method or an ink jet method.

[0145] Here, the tungsten film is etched by dry etching to form a gate electrode. Then, a conductive film 13 that functions as a conductive film is formed.

[0146] Next, as shown in FIG. 6(C), a nitride insulating film is formed on the conductive film 13 which functions as a gate electrode. Then, the insulating film 15 and the oxide insulating film 16 that will later become the oxide insulating film 17 are formed. On the insulating film 16, an oxide semiconductor film 18 which will later become an oxide semiconductor film 19a and a pixel electrode 19b is formed. Form.

[0147] The nitride insulating film 15 and the oxide insulating film 16 are formed by a sputtering method, a chemical vapor deposition (CVD) method, or the like. ) method (metal organic chemical vapor deposition (MOCVD), metal chemical vapor deposition, atomic layer deposition (A LD) method or plasma enhanced chemical vapor deposition (PECVD) method. The metal-organic chemical vapor deposition (M By using the OCVD method, metal chemical vapor deposition method, and atomic layer deposition (ALD) method, The nitride insulating film 15 and the oxide insulating film 16 can be formed with little damage caused by ions. In addition, the nitride insulating film 15 and the oxide insulating film 16 are formed by using an atomic layer deposition (ALD) method. It is possible to improve the coverage of 16.

[0148] Here, we used the plasma CVD method with silane, nitrogen, and ammonia as raw material gases. As the nitride insulating film 15, a silicon nitride film having a thickness of 300 nm is formed.

[0149] The oxide insulating film 16 may be a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film. When forming a silicon film, a deposition gas containing silicon and an oxidizing gas are used as the source gas. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0150] When a gallium oxide film is formed as the oxide insulating film 16, it is formed by using the MOCVD method. It is possible.

[0151] Here, we used the plasma CVD method with silane and dinitrogen monoxide as raw material gases to oxidize As the insulating film 16, a silicon oxynitride film is formed to a thickness of 50 nm.

[0152] The oxide semiconductor film 18 is formed by sputtering, chemical vapor deposition (CVD) (organometallic chemical vapor deposition), or the like. Chemical vapor deposition (MOCVD), atomic layer deposition (ALD) or plasma enhanced chemical vapor deposition (P ECVD method), pulsed laser deposition method, laser ablation method, coating method, etc. It can be formed by using metal organic chemical vapor deposition (MOCVD) and atomic layer deposition (ALD). By using the LD method, the oxide semiconductor film 18 is formed with less damage caused by plasma. In addition, damage to the oxide insulating film 16 can be reduced. By using the atomic layer deposition (ALD) method, the coverage of the oxide semiconductor film 18 can be improved. It is possible.

[0153] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like, as appropriate.

[0154] The sputtering gas is a rare gas (typically argon), oxygen gas, or a mixture of a rare gas and oxygen. A mixed gas is used as appropriate. In the case of a mixed gas of rare gas and oxygen, the ratio of oxygen to rare gas is It is preferable to increase the gas ratio.

[0155] The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. .

[0156] In order to obtain a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor film, Not only is it necessary to evacuate the inside of the chamber to a high vacuum, but it is also necessary to highly purify the sputtering gas. The oxygen gas and argon gas used should have a dew point of -40°C or less, preferably -80°C or less. Gas that has been highly purified to -100℃ or less, more preferably -120℃ or less By using the above, it is possible to prevent moisture and the like from being taken into the oxide semiconductor film as much as possible. do.

[0157] Here, an In-Ga-Zn oxide target (In:Ga:Zn=1:1:1) was used. A 35-nm-thick In-Ga-Zn oxide film was deposited as an oxide semiconductor film by sputtering. A nitride film is formed.

[0158] Next, a photolithography process using a second photomask is performed on the oxide semiconductor film 18. After a mask is formed by etching, part of the oxide semiconductor film is etched using the mask. As a result, element-isolated oxide semiconductor films 19a and 19c are formed as shown in FIG. After that, the mask is removed.

[0159] Here, a mask is formed on the oxide semiconductor film 18, and the oxide semiconductor film 18 is oxidized by wet etching. By selectively etching a portion of the oxide semiconductor film 18, the oxide semiconductor films 19a and 19c are formed. Form.

[0160] Next, as shown in FIG. 7A, a conductive film 20 which will later become conductive films 21a and 21b is formed. do.

[0161] The conductive film 20 can be formed by appropriately using a method similar to that for the conductive film 12 .

[0162] Here, a tungsten film with a thickness of 50 nm and a copper film with a thickness of 300 nm are sputtered in this order. The layers are laminated by a coating method.

[0163] Next, a mask is formed on the conductive film 20 by a photolithography process using a third photomask. Next, the conductive film 20 is etched using the mask to form a mask as shown in FIG. In this manner, conductive films 21a and 21b functioning as a source electrode and a drain electrode are formed. After this, the mask is removed.

[0164] Here, a mask is formed on the copper film by a photolithography process. The tungsten film and the copper film are etched using a quartz crystal to form the conductive films 21a and 21b. The copper film is etched using a wet etching method. Next, the copper film is etched using SF6. The tungsten film is etched by the dry etching method. As a result, fluorides are formed on the surface of the copper film. The fluorides prevent the diffusion of copper elements from the copper film. As a result, the copper concentration in the oxide semiconductor film 19a can be reduced.

[0165] Next, as shown in FIG. 7C, the oxide semiconductor films 19a and 19c, the conductive film 21a, On 21b, an oxide insulating film 22 which will later become an oxide insulating film 23 and an oxide insulating film 25 which will later become an oxide insulating film 25 are formed. The oxide insulating film 22 and the oxide insulating film 24 are formed of a nitride. The insulating film 15 and the oxide insulating film 16 can be formed by any suitable method.

[0166] After the oxide insulating film 22 is formed, the oxide insulating film 2 is continuously removed without being exposed to the air. After the oxide insulating film 22 is formed, the source gas The oxide insulating film 24 is continuously formed by adjusting one or more of the flow rate, pressure, high frequency power, and substrate temperature. By forming the oxide insulating film 22 and the oxide insulating film 24 in the In addition, the impurity concentration in the oxide insulating film 24 can be reduced. The amount of oxygen vacancies in the oxide semiconductor film 19a can be reduced. It can be reduced.

[0167] The oxide insulating film 22 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is maintained at a temperature of 280° C. or higher and 400° C. or lower, and a source gas is introduced into the processing chamber. The pressure in the chamber is set to 20 Pa or more and 250 Pa or less, and more preferably 100 Pa or more and 250 Pa or less. Under the conditions below, a silicon oxide film is formed by supplying high frequency power to an electrode provided in the processing chamber. Alternatively, a silicon oxynitride film can be formed.

[0168] As the source gas for the oxide insulating film 22, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0169] By using the above conditions, an oxide insulating film that transmits oxygen is formed as the oxide insulating film 22. In addition, by providing the oxide insulating film 22, the oxide insulating film to be formed later can be formed. In the formation step of 25, damage to the oxide semiconductor film 19a can be reduced.

[0170] Under the film formation conditions, by setting the substrate temperature to the above temperature, the bonding strength between silicon and oxygen As a result, the oxide insulating film 22 is oxygen-permeable, dense, and hard. Oxide insulating film, typically etched using 0.5% by weight hydrofluoric acid at 25°C. A silicon oxide film or an oxide film having a dipping speed of 10 nm / min or less, preferably 8 nm / min or less. A silicon nitride film can be formed.

[0171] In addition, since the oxide insulating film 22 is formed while heating, the oxide semiconductor Hydrogen, water, and the like contained in the oxide semiconductor film 19a can be desorbed. The hydrogen contained in the oxide film combines with oxygen radicals generated in the plasma to form water. In the deposition process of step 2, the substrate is heated, and oxygen and hydrogen are combined to form Water is desorbed from the oxide semiconductor film. By forming the oxide semiconductor film 19a, the amount of water and hydrogen contained in the oxide semiconductor film 19a can be reduced. can be done.

[0172] In addition, since heating is performed in the process of forming the oxide insulating film 22, the oxide semiconductor film 19a The heating time in the exposed state is short, and oxygen is removed from the oxide semiconductor film by the heat treatment. That is, the amount of oxygen vacancies in the oxide semiconductor film can be reduced. It is possible.

[0173] In addition, by increasing the amount of oxidizing gas to 100 times or more the amount of deposition gas containing silicon, It is possible to reduce the hydrogen content in the oxide insulating film 22. Since the amount of hydrogen mixed into the semiconductor film 19a can be reduced, the threshold voltage of the transistor can be reduced. The negative shift can be suppressed.

[0174] Here, the oxide insulating film 22 is made of silane at a flow rate of 30 sccm and 4000 sccm. The source gas was nitrous oxide with a flow rate of 1.0 cm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220°C. A 27.12MHz high-frequency power source was used to supply 150W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 50 nm is formed by the plasma CVD method under the following conditions. In this manner, a silicon oxynitride film through which oxygen is transmitted can be formed.

[0175] The oxide insulating film 24 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is kept at a temperature of 180° C. or higher and 280° C. or lower, more preferably 200° C. or higher and 240° C. or lower. The raw material gas is introduced into the processing chamber to set the pressure in the processing chamber at 100 Pa or more and 250 Pa or less. More preferably, the pressure is set to 100 Pa or more and 200 Pa or less. .17W / cm 2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 End 0.35W / cm 2 Under the following conditions of high frequency power supply, silicon oxide film or oxide A silicon nitride film is formed.

[0176] As the source gas of the oxide insulating film 24, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0177] The oxide insulating film 24 is formed under the conditions of high frequency irradiation with the above power density in a processing chamber at the above pressure. Supplying microwave power increases the efficiency of decomposing the source gas in the plasma, and oxygen radicals are increased. As the oxidation of the source gas proceeds, the oxygen content in the oxide insulating film 24 becomes lower than the stoichiometric ratio. On the other hand, in the film formed at the above substrate temperature, the bonds between silicon and oxygen Because the combined force is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. An acid that contains more oxygen than satisfies the stoichiometric composition and loses some of the oxygen when heated. In addition, an oxide insulating film 22 can be formed on the oxide semiconductor film 19a. Therefore, in the step of forming the oxide insulating film 24, the oxide insulating film 22 This serves as a protective film for the oxide semiconductor film 19a. The oxide insulating film 24 can be formed by using high-frequency power with high power density while reducing the can.

[0178] Here, the oxide insulating film 24 is made of silane at a flow rate of 200 sccm and SiO at a flow rate of 4000 s. The source gas was nitrous oxide (N2O) at 1.0 ccm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220° C. A 27.12MHz high-frequency power source was used to apply 1500W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 400 nm is formed by the supplied plasma CVD method. The plasma CVD device has an electrode area of ​​6000 cm 2 Parallel plate plasma CVD The power supplied to the device is converted to power per unit area (power density) of 0.25W. / cm 2 It is.

[0179] In addition, when forming the conductive films 21a and 21b which function as the source electrode and the drain electrode, The oxide semiconductor film 19a is damaged by the etching of the conductive film, and the oxide semiconductor The back channel of the film 19a (which functions as a gate electrode in the oxide semiconductor film 19a) However, oxygen vacancies occur on the surface opposite to the surface facing the conductive film 13. By applying an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition to 4, The oxygen vacancies occurring on the back channel side can be repaired by the heat treatment. This can reduce defects in the oxide semiconductor film 19a, This can improve the reliability of the sensor 102.

[0180] Next, a photolithography process using a fourth photomask is performed on the oxide insulating film 24. Next, the oxide insulating film 22 and the oxide insulating film 24 are formed using the mask. 7(D), a part of the oxide insulating film 2 having an opening 40 is formed. 3 and the oxide insulating film 25. After that, the mask is removed.

[0181] In this step, the oxide insulating film 22 and the oxide insulating film 2 As a result, the oxide semiconductor film 19c is Since the oxide semiconductor film 19c is exposed to plasma during the etching process, the amount of oxygen vacancies in the oxide semiconductor film 19c increases. is possible.

[0182] Next, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher and 400° C. or lower. The temperature is preferably 300°C or higher and 400°C or lower, and more preferably 320°C or higher and 370°C or lower.

[0183] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.

[0184] Heat treatment is carried out in a vacuum of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). pm or less, preferably 10 ppb or less air), or rare gases (argon, helium, etc.) In addition, the above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be mixed with hydrogen, water, or the like. It is preferable that the above is not included.

[0185] By this heat treatment, part of oxygen contained in the oxide insulating film 25 is oxidized to the oxide semiconductor film 19a Thus, the amount of oxygen vacancies in the oxide semiconductor film 19a can be reduced.

[0186] In the case where the oxide insulating film 23 and the oxide insulating film 25 contain water, hydrogen, or the like, In the case where the nitride insulating film 26 further has a barrier property against water, hydrogen, etc., the nitride insulating film 2 When the oxide insulating film 23 and the oxide insulating film 25 are formed later and subjected to heat treatment, Water, hydrogen, and the like move to the oxide semiconductor film 19a, causing defects in the oxide semiconductor film 19a. However, the heating causes the oxide insulating film 23 and the oxide insulating film 25 to It is possible to remove water, hydrogen, and the like from the semiconductor device, and the variation in the electrical characteristics of the transistor 102 can be reduced. It is possible to reduce the threshold voltage and suppress the fluctuation of the threshold voltage.

[0187] The oxide insulating film 24 is formed on the oxide insulating film 22 while being heated. Oxygen is transferred to the oxide semiconductor film 19a, thereby reducing the amount of oxygen vacancies in the oxide semiconductor film 19a. Therefore, the heat treatment may not be performed.

[0188] The heat treatment is performed after the oxide insulating film 22 and the oxide insulating film 24 are formed. However, the heat treatment after the formation of the oxide insulating film 23 and the oxide insulating film 25 is more effective in preventing oxidation. The transfer of oxygen to the oxide semiconductor film 19c does not occur, and the oxide semiconductor film 19c is exposed. Therefore, oxygen is released from the oxide semiconductor film 19c, and oxygen vacancies are formed, so that the oxide semiconductor film 19c becomes more conductive. This is preferable because it allows the formation of a film having excellent properties.

[0189] Here, heat treatment is performed in a nitrogen and oxygen atmosphere at 350° C. for 1 hour.

[0190] Next, as shown in FIG. 8(A), a nitride insulating film 26 is formed.

[0191] The nitride insulating film 26 is formed by appropriately using the same method as the nitride insulating film 15 and the oxide insulating film 16. The nitride insulating film 26 can be formed by sputtering, CVD, or the like. As a result, the oxide semiconductor film 19c is exposed to plasma. The amount of oxygen vacancy can be increased.

[0192] The oxide semiconductor film 19c has improved conductivity and becomes the pixel electrode 19b. When a silicon nitride film is formed as the insulating film 26 by the plasma CVD method, the silicon nitride Hydrogen contained in the film diffuses into the oxide semiconductor film 19c, thereby increasing the conductivity of the pixel electrode 19b. It can be done.

[0193] When a silicon nitride film is formed as the nitride insulating film 26 by the plasma CVD method, the plasma The substrate placed in the evacuated processing chamber of the CVD device is heated to 300°C or higher and 400°C or lower. Furthermore, by maintaining the temperature at 320°C or higher and 370°C or lower, a dense silicon nitride film is formed. This is preferable because it can be achieved.

[0194] When forming a silicon nitride film, a deposition gas containing silicon, nitrogen, and ammonia are used. It is preferable to use a small amount of ammonia as the raw material gas compared to nitrogen. By using ammonia, ammonia dissociates in the plasma and active species are generated. The silicon and hydrogen bonds and the triple bonds of nitrogen contained in the silicon-containing deposition gas are As a result, the bonds between silicon and nitrogen are promoted and the bonds between silicon and hydrogen are reduced. It is possible to form a dense silicon nitride film with few defects. In this case, if the amount of ammonia relative to nitrogen is large, the deposition gas containing silicon and the nitrogen itself are The decomposition of these materials does not proceed, and silicon and hydrogen bonds remain, increasing the number of defects and causing coarse grains. For these reasons, the source gas should be ammonia-free. The flow rate ratio of nitrogen to oxygen is preferably 5 to 50, more preferably 10 to 50. stomach.

[0195] Here, silane at a flow rate of 50 sccm and 5000 The source gases were nitrogen at a flow rate of 100 sccm and ammonia at a flow rate of 100 sccm. The pressure in the processing chamber was The pressure was set at 100 Pa, the substrate temperature was set at 350°C, and a 27.12 MHz high frequency power source was used for 1000 The nitride insulating film 26 and the The plasma CVD device has an electrode area of ​​1000 nm. 6000cm 2 This is a parallel plate type plasma CVD device, and the power supplied is divided into This is converted to power per unit area (power density) of 1.7 x 10 -1W / cm 2 It is.

[0196] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 40° C. or lower. 0°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower As a result, the negative shift of the threshold voltage can be reduced. Therefore, the amount of fluctuation in the low voltage can be reduced.

[0197] Next, although not shown, a photolithography process is performed on the nitride insulating film 26 using a fifth photomask. After forming a mask by a roughening process, the nitride insulating film 26 is etched using the mask. The conductive film formed at the same time as the conductive films 21a and 21b is exposed and the nitride insulating film is formed. A film 27 is formed. The conductive film is connected to a common electrode 29 which will be formed later.

[0198] Next, as shown in FIG. 8B, a conductive layer that will later become a common electrode 29 is formed on the nitride insulating film 27. A conductive film 28 is formed.

[0199] The conductive film 28 is formed by a sputtering method, a CVD method, a vapor deposition method or the like.

[0200] Next, a mask is formed on the conductive film 28 by a photolithography process using a sixth photomask. Next, a part of the conductive film 28 is etched using the mask, as shown in FIG. ) the common electrode 29 is formed. Although not shown, the common electrode 29 is A connection terminal formed simultaneously with the conductive film 13 or a connection terminal formed simultaneously with the conductive films 21a and 21b The mask is then removed.

[0201] Through the above steps, the transistor 102 and the capacitor 105 are manufactured. It is possible.

[0202] The element substrate of the display device shown in this embodiment has a region extending in a striped shape in a direction intersecting the signal lines. A common electrode having a large area is formed. This makes it possible to manufacture a display device with excellent contrast. It is possible.

[0203] In addition, the element substrate of the display device described in this embodiment has the same structure as the oxide semiconductor film of the transistor. At the same time, pixel electrodes are formed, so transistors 102 and It is possible to manufacture a capacitor element 105. The pixel electrode functions as one electrode of the capacitor element. The common electrode also functions as the other electrode of the capacitance element. In order to form a quantum well, a process for forming a conductive film is not required, and the manufacturing process can be reduced. In addition, the capacitor element has a light-transmitting property. As a result, the area occupied by the capacitor element can be increased while Therefore, the aperture ratio of the pixel can be increased.

[0204] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0205] <Variation 1> In the display device shown in the first embodiment, a common line connected to a common electrode is provided. This will be described with reference to FIG.

[0206] FIG. 9A is a top view of pixels 103a, 103b, and 103c included in the display device. A cross-sectional view taken along dashed lines AB and CD in FIG. 9(A) is shown in FIG. 9(B).

[0207] As shown in FIG. 9A, the conductive film 21a, which functions as a signal line, is parallel or substantially parallel to the conductive film 21a. Here, in order to make the configuration of the common electrode 29 easier to understand, For clarity, the shape of the common electrode 29 will be described using hatching. A plurality of first regions indicated by hatching from left to right and a second region indicated by hatching from right to left The first regions are striped regions. The second regions are signal lines and The second region extends in a direction parallel or substantially parallel to the conductive film 21a that functions as a conductive film. Since it is connected to a plurality of first regions (striped regions), it can also be called a connection region. overlaps with the connection region (second region) of the common electrode 29.

[0208] The common line 21c may be provided for each pixel. For example, as shown in FIG. 9A, one line is provided for three pixels. By providing the common line 21c, the area occupied by the common line in the display device can be reduced. As a result, it is possible to increase the pixel area and the pixel aperture ratio.

[0209] In addition, in the region where the pixel electrode 19b and the common electrode 29 overlap, In the electric field generated between the common electrode 29 and the connection region (second region), the liquid crystal molecules are driven. Therefore, in the connection area of ​​the common electrode 29, the area overlapping with the pixel electrode 19b By reducing the area, it is possible to increase the area in which the liquid crystal molecules are driven, thereby increasing the aperture ratio. For example, as shown in FIG. 9A, the connection area of ​​the common electrode 29 can be By providing the pixel electrode 19b at a position where it does not overlap with the common electrode 29, It is possible to reduce the overlapping area with the connection region, enabling an increase in the aperture ratio of the pixel. It is.

[0210] In FIG. 9A, one line is provided for three pixels 103a, 103b, and 103c. Although the common line 21c is provided, one common line may be provided for two pixels. Alternatively, one common line may be provided for four or more pixels.

[0211] As shown in FIG. 9B, the common line 21c is formed of the same conductive film 21a that functions as a signal line. The common electrode 29 can be formed simultaneously with the oxide insulating film 23 and the oxide insulating film 24. 25 and an opening 42 formed in the nitride insulating film 27. do.

[0212] The material forming the conductive film 21a has a lower resistivity than the material forming the common electrode 29. Therefore, it is possible to reduce the resistance of the common electrode 29 and the common line 21c.

[0213] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0214] (Embodiment 3) In this embodiment mode, a display device and a manufacturing method thereof different from those in Embodiment Mode 2 will be described with reference to the drawings. In this embodiment, a transistor included in a high-definition display device will be described. The point that the present invention has a source electrode and a drain electrode capable of reducing light leakage is an embodiment of the present invention. 2. Note that the description of the configuration that overlaps with the second embodiment will be omitted.

[0215] 10 is a top view of the display device shown in this embodiment mode. The conductive film 21b, which functions as one of the two, has an L-shaped upper surface. The conductive film 21b is a region 21b extending in a direction perpendicular to the conductive film 13 that functions as a scanning line. _1 and a region 21b_2 extending in a direction parallel or approximately parallel to the conductive film 13 are connected. The region 21b_2 has a planar shape, and is adjacent to the conductive film 13 and the pixel electrode 19 in a top view. b, and the common electrode 29. Alternatively, the conductive film 21b is The conductive film 13 has a region 21b_2 extending in a direction parallel or substantially parallel to the conductive film 13, and the region 21b _2 is between the conductive film 13 and the pixel electrode 19b or the common electrode 29 in the top view. It is characterized by being located

[0216] In high-definition display devices, the area of ​​pixels is reduced, so that the conductive film that functions as a scanning line is The distance between the film 13 and the common electrode 29 is narrowed. In the pixel that displays black, the transistor is turned on. When a voltage that brings about this state is applied to the conductive film 13 that functions as a scanning line, the pixel electrodes 19b and An electric field is generated between the liquid crystal molecules and the conductive film 13 that functions as a scanning line. The child may rotate in an unintended direction, causing light leakage.

[0217] However, in the transistor included in the display device described in this embodiment, In the conductive film 21b which functions as one of the pixel electrode and the drain electrode, The electrode 19b and the common electrode 29 overlap with each other in an area 21b_2. In the figure, the area between the conductive film 13 and the pixel electrode 19b or the common electrode 29 As a result, the region 21b_2 is a region of the conductive film 13 that functions as a scanning line. In order to shield the electric field, the electric field generated between the conductive film 13 and the pixel electrode 19b is suppressed. This makes it possible to reduce light leakage.

[0218] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0219] (Embodiment 4) In this embodiment mode, a display device and a manufacturing method thereof different from those in Embodiment Modes 2 and 3 will be described. In the present embodiment, a method for preventing light leakage in a high-definition display device will be described with reference to the drawings. The difference from the second embodiment is that the second embodiment has a common electrode capable of reducing leakage. Description of configurations that overlap with those of the second embodiment will be omitted.

[0220] 11 is a top view of the display device shown in this embodiment. A striped region 29a_1 extending in a direction intersecting the conductive film 21a functioning as a and a region 29a_2 that is connected to the region and overlaps with the conductive film 13 that functions as a scanning line. It is characterized by:

[0221] In high-definition display devices, the area of ​​pixels is reduced, so that the conductive film that functions as a scanning line is The distance between the conductive film 13 and the pixel electrode 19b is narrowed. When a voltage is applied, an electric field is generated between the conductive film 13 and the pixel electrode 19b. This causes the liquid crystal molecules to move in unintended directions, resulting in light leakage.

[0222] However, in the display device shown in this embodiment, the conductive film 13 functioning as a scanning line and the The common electrode 29a has a region 29a_2 that overlaps the common electrode 29a. As a result, the common electrode 29a functions as a scanning line. It is possible to suppress the electric field generated between the conductive film 13 and the common electrode 29a, which are connected to each other. It is possible to reduce leakage.

[0223] Note that the top view of one aspect of the embodiment of the present invention is not limited to this. For example, the common electrode 29a can function as a scanning line as shown in FIG. 24 and FIG. 25. The oxide semiconductor film 1 of the transistor may have a region overlapping with a part of the conductive film 13. The channel region formed in the common electrode 29a does not overlap with the common electrode 29a. Since the electric field of the common electrode 29a is not applied to the region, the leakage current of the transistor is reduced. In addition, the common electrode 29a shown in FIG. 25 is a conductive film 1 that functions as a scanning line. 3 and the conductive film 21a that functions as a signal line. Since the electric field of the conductive film 21a can be shielded by the common electrode 29a, the alignment of the liquid crystal molecules is prevented from being disturbed. can be reduced.

[0224] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0225] (Embodiment 5) In this embodiment mode, a display device and a manufacturing method thereof different from those in Embodiment Mode 2 will be described with reference to the drawings. In this embodiment, an oxide film is formed between different gate electrodes in a transistor. The transistor has a dual gate structure, in which a semiconductor film is provided. This embodiment is different from the embodiment 2. Note that the description of the configuration that overlaps with the embodiment 2 will be omitted.

[0226] A specific configuration of an element substrate included in a display device will be described. As shown in FIG. 12, the child substrate is provided with a conductive film 13 functioning as a gate electrode, an oxide semiconductor film 19a, the conductive films 21a and 21b, and the oxide insulating film 25. The difference from the second embodiment is that the second embodiment has a conductive film 29b that functions as a gate electrode. The conductive film 29b, which functions as an electrode, is formed as a gate electrode in the openings 41a and 41b. It is connected to a functional conductive film 13 .

[0227] Next, the transistor 102a shown in FIG. 12 is a channel etch type transistor. Note that AB is the channel length direction of the transistor 102a and the 1 is a cross-sectional view, and the cross-sectional view taken along CD is a cross-sectional view taken along the channel width direction of the transistor 102a and Connection of the conductive film 13 functioning as a gate electrode and the conductive film 29b functioning as a gate electrode FIG.

[0228] The transistor 102a shown in FIG. 12 is a transistor having a dual gate structure. The conductive film 13 functions as a gate electrode and is provided on the plate 11. The nitride insulating film 15 is formed on the conductive film 13 which functions as a gate electrode. The oxide insulating film 17 formed on the film 15 and the nitride insulating film 15 and the oxide insulating film 17 are interposed therebetween. The oxide semiconductor film 19a overlaps with the conductive film 13 functioning as a gate electrode. Conductive films 21a and 21b, which function as a source electrode and a drain electrode, are in contact with the conductive film 19a. In addition, the oxide insulating film 17, the oxide semiconductor film 19a, and the source electrode and the drain electrode An oxide insulating film 23 is formed on the conductive films 21a and 21b that function as drain electrodes. An oxide insulating film 25 is formed on the oxide insulating film 23. The nitride insulating film 15 and the oxide insulating film 25 are A nitride insulating film 27 is formed on the film 23, the oxide insulating film 25, and the conductive film 21b. The pixel electrode 19b is formed on the oxide insulating film 17. The pixel electrode 19b is a source electrode and One of the conductive films 21a and 21b which function as a drain electrode is connected to the conductive film 21b here. In addition, the common electrode 29 and the conductive film 29b functioning as the gate electrode are connected to the nitride insulating film 29b. It is formed on the veneer 27.

[0229] As shown in the cross-sectional view along CD, the nitride insulating film 15 and the nitride insulating film 27 are provided with In the openings 41a and 41b, the conductive film 29b that functions as a gate electrode is That is, the conductive film 13 functioning as a gate electrode is connected to the conductive film 14. The conductive film 3 and the conductive film 29b functioning as a gate electrode have the same potential.

[0230] Therefore, by applying the same voltage to each gate electrode of the transistor 102a, -Reduction of variation in characteristics, suppression of deterioration in GBT stress test, and under different drain voltages In addition, the oxide semiconductor film 19a can suppress the fluctuation of the on-state current rising voltage. In the case of As a result, the on-state current of the transistor 102a increases and the field effect As a result, the mobility is high, typically with a field effect mobility of 20 cm 2 / V s or more.

[0231] The oxide insulating films 23 and 25 are separated over the transistor 102a in this embodiment. The separated oxide insulating films 23 and 25 overlap with the oxide semiconductor film 19a. In addition, in a cross-sectional view in the channel width direction, an oxide insulating film 23 is formed on the outer side of the oxide semiconductor film 19a. and an end of the oxide insulating film 25 are located. In addition, in the channel width direction shown in FIG. The conductive film 29b functioning as a gate electrode is formed with the oxide insulating film 23 and the oxide insulating film 25 interposed therebetween. The oxide semiconductor film 19a is formed on the first insulating film 19c.

[0232] At the edge of the oxide semiconductor film that is processed by etching or the like, the oxide semiconductor film is damaged during the processing. This leads to the formation of defects and contamination by impurities. It is easily activated by the application of stress, and as a result, it tends to become n-type (low resistance). Therefore, the oxide semiconductor film 19a overlapping the conductive film 13 functioning as a gate electrode The end portion is easily converted to n-type. The n-type end portion is connected to the source electrode and the drain electrode. When the n-type region is provided between the conductive films 21a and 21b that function as electrodes, However, the cross section of the CD 1, in the channel width direction, the conductive film 29b functioning as the gate electrode is When the gate electrode 14 faces the side surface of the oxide semiconductor film 19a via the oxide insulating films 23 and 25, The conductive film 29b functions as a conductive film. The occurrence of parasitic channels in the region including the side surface and its vicinity is suppressed. The drain current rises sharply at low voltages, resulting in a transistor with excellent electrical characteristics. do.

[0233] The common electrode has a region extending in a striped manner in a direction intersecting with the signal line. It is possible to prevent unintended alignment of liquid crystal molecules in the vicinity of the electrode 19b and the conductive film 21a. As a result, a display device with excellent contrast can be manufactured. It can be manufactured.

[0234] In the capacitor 105a, the pixel electrode 19b is formed simultaneously with the oxide semiconductor film 19a. The film is a film formed on a substrate and has an increased conductivity due to the inclusion of impurities therein. The pixel electrode 19b is a film formed simultaneously with the oxide semiconductor film 19a. The pixel electrode 19 is a film in which oxygen vacancies are formed due to a gap or the like, and the conductivity is increased. b is a film formed at the same time as the oxide semiconductor film 19a, contains impurities, and is This is a film in which oxygen vacancies are formed due to plasma damage or the like, and the electrical conductivity is increased.

[0235] The element substrate of the display device described in this embodiment includes a semiconductor film including a transistor and an oxide semiconductor film. A pixel electrode is formed. The pixel electrode functions as one electrode of a capacitance element. The electrode functions as the other electrode of the capacitor element. In this case, a step of forming a new conductive film is not required, and the manufacturing steps can be reduced. As a result, the area occupied by the capacitor element is increased, and the aperture ratio of the pixel is increased. It is possible.

[0236] The following describes the details of the configuration of the transistor 102a. Descriptions of components with the same reference numerals will be omitted.

[0237] The conductive film 29b functioning as the gate electrode is the same as the common electrode 29 shown in the second embodiment. The above materials can be used appropriately.

[0238] Next, a method for manufacturing the transistor 102a and the capacitor 105a shown in FIG. The following description will be given with reference to FIG. 6 to FIG. 8 and FIG.

[0239] As in the second embodiment, a gate electrode and a gate electrode are formed on a substrate 11 through the steps shown in FIG. 6 to FIG. The conductive film 13, the nitride insulating film 15, the oxide insulating film 16, and the oxide semiconductor film 19a function as , pixel electrode 19b, conductive films 21a and 21b functioning as a source electrode and a drain electrode, The oxide insulating film 22, the oxide insulating film 24, and the nitride insulating film 26 are formed. In the process, photolithography using the first to fourth photomasks is performed. The process is carried out.

[0240] Next, a fifth photomask is used to form a photoresist film on the nitride insulating film 26. After forming a mask, a part of the nitride insulating film 26 is etched using the mask, as shown in FIG. As shown in FIG. 13(A), a nitride insulating film 27 having openings 41a and 41b is formed. .

[0241] Next, as shown in FIG. 13B, the conductive film 13 and the conductive film 21 which function as the gate electrode are b, and on the nitride insulating film 27, a conductive film which will later function as a common electrode 29 and a gate electrode A conductive film 28 that will become 29b is formed.

[0242] Next, a mask is formed on the conductive film 28 by a photolithography process using a sixth photomask. Next, a part of the conductive film 28 is etched using the mask to form a mask as shown in FIG. As shown in FIG. 2C, a conductive film 29b that functions as a common electrode 29 and a gate electrode is formed. After that, the mask is removed.

[0243] Through the above steps, the transistor 102a and the capacitor 105a are manufactured. It is possible.

[0244] In the transistor described in this embodiment, a gate electrode The common electrode 29 is connected to the oxide semiconductor film 19a via the oxide insulating films 23 and 25. Since the conductive film 29b functions as a gate electrode, the oxide Generation of a parasitic channel in the side surface of the semiconductor film 19a or in a region including the side surface and its vicinity As a result, the drain current rises sharply at the threshold voltage, and the This results in a transistor with excellent characteristics.

[0245] The element substrate of the display device shown in this embodiment has a region extending in a striped shape in a direction intersecting the signal lines. A common electrode having a large area is formed. This makes it possible to manufacture a display device with excellent contrast. It is possible.

[0246] In addition, the element substrate of the display device described in this embodiment has the same structure as the oxide semiconductor film of the transistor. At the same time, a pixel electrode is formed. The pixel electrode functions as one electrode of a capacitance element. The common electrode functions as the other electrode of the capacitance element. Therefore, a step of forming a new conductive film is not required, and the manufacturing process can be reduced. As a result, the area occupied by the capacitance element is increased while the aperture ratio of the pixel is increased. can be increased.

[0247] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0248] (Embodiment 6) The source and drain electrodes of the transistors described in any of Embodiments 2 to 5 The conductive films 21a and 21b functioning as the conductive electrodes are made of tungsten, titanium, aluminum, etc. Aluminum, copper, molybdenum, chromium, or tantalum alone or their alloys, etc., combined with oxygen As a result, the oxide semiconductor film 19a can be made of an electrically conductive material that is easily oxidized. The conductive material contained in the conductive films 21a and 21b functioning as a source electrode and a drain electrode. The oxide semiconductor film 19a is bonded to the oxygen-deficient region. Conductive films 21a and 21b functioning as a source electrode and a drain electrode are formed on the semiconductor film 19a. In some cases, some of the constituent elements of the conductive material to be formed may be mixed in. As a result, In the film 19a, conductive films 21a and 21b functioning as a source electrode and a drain electrode are provided. A low resistance region is formed near the contact region. The low resistance region is a region where the source electrode and the drain electrode are The oxide insulating film 17 is in contact with the conductive films 21a and 21b which function as electrodes, and the source electrode and The low resistance region is formed between the conductive films 21a and 21b which function as the drain electrode and the gate electrode. Since the oxide semiconductor film 19a has high conductivity, the oxide semiconductor film 19a functions as a source electrode and a drain electrode. It is possible to reduce the contact resistance with the conductive films 21a and 21b, and the on-state current of the transistor is It is possible to increase the flow.

[0249] The conductive films 21a and 21b, which function as a source electrode and a drain electrode, are formed by the above-mentioned oxygen Conductive materials that bond easily with oxygen, such as titanium nitride, tantalum nitride, and ruthenium, which bond easily with oxygen, By using such a layered structure, the source electrode At the interface between the conductive films 21a and 21b functioning as drain electrodes and the oxide insulating film 23, In this case, the conductive films 21a and 21b that function as the source electrode and the drain electrode are prevented from being oxidized. The conductive films 21a and 21b functioning as the source electrode and the drain electrode can be highly It is possible to suppress the development of resistance.

[0250] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0251] (Embodiment 7) In this embodiment, compared with Embodiments 2 to 5, defects in an oxide semiconductor film can be reduced. A display device having a transistor capable of further reducing the amount of The transistor described in this embodiment has a structure similar to that described in Embodiments 2 to 5. In comparison, the present embodiment differs in that it has a multilayer film having a plurality of oxide semiconductor films. The transistor will be described in detail with reference to Embodiment 2.

[0252] 14 is a cross-sectional view of an element substrate of a display device. This corresponds to the cross-sectional view between B and CD.

[0253] The transistor 102b illustrated in FIG. 14A includes the nitride insulating film 15 and the oxide insulating film 17. A multilayer film 37a overlaps the conductive film 13 that functions as a gate electrode through the intermediation of the multilayer film 37a. The source electrode and the drain electrode are electrically conductive films 21a and 21b, which function as a source electrode and a drain electrode in contact with the source electrode and the drain electrode. In addition, the nitride insulating film 15 and the oxide insulating film 17, the multilayer film 37a, and the source electrode and the drain electrode An oxide insulating film 23 and an oxide insulating film 24 are formed on the conductive films 21a and 21b which function as inner electrodes. 25 and a nitride insulating film 27 are formed.

[0254] The capacitor element 105b shown in FIG. 14A includes a multilayer film 37 formed on an oxide insulating film 17. b, the nitride insulating film 27 in contact with the multilayer film 37b, and a common electrode in contact with the nitride insulating film 27. The multilayer film 37b includes an oxide semiconductor film 19f and an oxide semiconductor film 39b. That is, the multilayer film 37b has a two-layer structure. The multilayer film 37b also functions as a pixel electrode. do.

[0255] In the transistor 102b described in this embodiment, the multilayer film 37a is an oxide semiconductor film. The multilayer film 37a has a two-layer structure. A part of the oxide semiconductor film 19a functions as a channel region. The oxide insulating film 23 is formed so as to contact the 9a. In other words, the oxide semiconductor film 19a and the oxide insulating film 25 are formed. An oxide semiconductor film 39a is provided between the first and second electrodes 3 and 3.

[0256] The oxide semiconductor film 39a is composed of one or more elements that constitute the oxide semiconductor film 19a. Therefore, the interface between the oxide semiconductor film 19a and the oxide semiconductor film 39a is Therefore, the movement of carriers is not hindered at the interface. This increases the field effect mobility of the transistor.

[0257] The oxide semiconductor film 39a is typically an In-Ga oxide film, an In-Zn oxide film, or an I nM-Zn oxide film (M is Al, Ga, Y, Zr, La, Ce, or Nd) The energy of the bottom of the conduction band is closer to the vacuum level than that of the oxide semiconductor film 19a. The energy of the bottom of the conduction band of the oxide semiconductor film 39a and the energy of the conduction band of the oxide semiconductor film 19a are The difference in energy from the lower end of the conductive band is 0.05 eV or more, 0.07 eV or more, or 0.1 eV or more or above, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0 That is, the electron affinity of the oxide semiconductor film 39a and the electron affinity of the oxide semiconductor film 19 The difference between the electron affinity of a and is 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV The following is the result.

[0258] The oxide semiconductor film 39a contains In, and thus the carrier mobility (electron mobility) is increased. This is preferable.

[0259] The oxide semiconductor film 39a is formed by doping Al, Ga, Y, Zr, La, Ce, or Nd with In. A higher atomic ratio may have the following effects: (1) Oxide semiconductor (2) Enlarging the energy gap of the oxide semiconductor film 39a. (3) The diffusion of impurities from the outside is reduced. (4) The oxide semiconductor film 19a (5) Al, Ga, Y, Zr, La, Ce, or Nd Since is a metal element that has a strong bond with oxygen, oxygen deficiency is unlikely to occur.

[0260] When the oxide semiconductor film 39a is an In-M-Zn oxide film, the sum of In and M is 10 When the atomic percentage of In is 0 atomic %, the atomic ratio of In to M is preferably 50 atomic %. % or less, M is 50 atomic % or more, and more preferably, In is 25 atomic % or less. c% or less, and M is 75 atomic% or more.

[0261] In addition, the oxide semiconductor film 19a and the oxide semiconductor film 39a are In-M-Zn oxide films ( In the case where M is Al, Ga, Y, Zr, La, Ce, or Nd, the oxide semiconductor film 19a In comparison, M (Al, Ga, Y, Zr, La, Ce, or Nd) is large, and typically, the above-mentioned elements contained in the oxide semiconductor film 19a The atomic ratio is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more higher than that of the molecule. It is a numerical ratio.

[0262] In addition, the oxide semiconductor film 19a and the oxide semiconductor film 39a are In-M-Zn oxide films ( In the case where M is Al, Ga, Y, Zr, La, Ce, or Nd, the oxide semiconductor film 39a is In:M:Zn=x1:y1:z1 [atomic ratio], and the oxide semiconductor film 19a is In:M:Z If n=x2:y2:z2 [atomic ratio], y1 / x1 is larger than y2 / x2, and Preferably, y1 / x1 is 1.5 times or more larger than y2 / x2. More preferably, y1 / x1 is at least twice as large as y2 / x2, and more preferably, y1 / x1 is greater than y2 / x2. It is more than three times larger.

[0263] The oxide semiconductor film 19a is an In-M-Zn oxide film (wherein M is Al, Ga, Y, Zr, La , Ce, or Nd), the target used to form the oxide semiconductor film 19a In the above, the atomic ratio of metal elements is In:M:Zn=x1:y1:z1. 、 x1 / y 1 is 1 / 3 or more and 6 or less, and further 1 or more and 6 or less, and z1 / y1 is 1 / 3 or more and 6 or less. It is more preferable that z1 / y1 is 1 or more and 6 or less. This makes it easier to form a CAAC-OS film as the oxide semiconductor film 19a. Typical examples of the atomic ratio of the metal elements in the getter are In:M:Zn = 1:1:1, In:M :Zn = 1:1:1.2, In:M:Zn = 3:1:2, etc.

[0264] When the oxide semiconductor film 39a is an In-M-Zn oxide film (M is Al, Ga, Y, Zr, La , Ce, or Nd), in the target used to form the oxide semiconductor film 39a , if the atomic ratio of the metal elements is In:M:Zn = x2:y2:z2, then 、 x2 / y 2 < x1 / y1, and z2 / y2 is preferably 1 / 3 or more and 6 or less, more preferably 1 or more and 6 or less. By setting z2 / y2 to 1 or more and 6 or less, it becomes easier to form a CAAC-OS film as the oxide semiconductor film 39 a. Typical examples of the atomic ratio of the metal elements in the target are In:M:Zn = 1:3:2, In:M:Zn = 1:3:4, In:M: Zn = 1:3:6, In:M:Zn = 1:3:8, In:M:Zn = 1:4:4, In: Zn = 1:4:5, In:M:Zn = 1:6:8, etc. Zn = 1:3:6, In:M:Zn = 1:3:8, In:M:Zn = 1:4:4, In: M:Zn = 1:4:5, In:M:Zn = 1:6:8, etc.

[0265] Note that the atomic ratios of the oxide semiconductor film 19a and the oxide semiconductor film 39a each include fluctuations of plus or minus 40% of the above atomic ratios with an error.

[0266] The oxide semiconductor film 39a also functions as a damage relaxation film for the oxide semiconductor film 19a when forming the oxide insulating film 25 formed later.

[0267] The thickness of the oxide semiconductor film 39a is 3 nm or more and 100 nm or less, preferably 3 nm or more and 5 0 nm or less.

[0268] Similarly to the oxide semiconductor film 19a, the oxide semiconductor film 39a has a non-single crystal structure, for example. The non-single crystal structure may be, for example, a CAAC-OS (C Axis Aligned Crystal-Oxide) structure, which will be described later. ned-Crystalline Oxide Semiconductor), polycrystalline The structure includes a microcrystalline structure, which will be described later, or an amorphous structure.

[0269] The oxide semiconductor film 39a may have an amorphous structure, for example. For example, the atomic arrangement is disordered and has no crystalline components.

[0270] Note that the oxide semiconductor film 19a and the oxide semiconductor film 39a each have an amorphous structure. The regions are microcrystalline, polycrystalline, CAAC-OS, and single crystal. The mixed film may have two or more regions of the above-mentioned type. The mixed film may have, for example, an amorphous structure. The structure is divided into three regions: microcrystalline structure, polycrystalline structure, CAAC-OS, and single crystal structure. In some cases, the mixed film may have a single layer structure having two or more of the above-mentioned regions. , amorphous structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, single crystal structure region, There are cases where the crystal structure has a laminated structure in which two or more types of regions are laminated.

[0271] Here, the oxide semiconductor film 39a is disposed between the oxide semiconductor film 19a and the oxide insulating film 23. For this reason, between the oxide semiconductor film 39a and the oxide insulating film 23, Even if carrier traps are formed by impurities and defects, the carrier traps and oxides There is a gap between the oxide semiconductor film 19a. As a result, the electrons flowing through the oxide semiconductor film 19a is less likely to be captured by carrier traps, making it possible to increase the on-state current of the transistor. In addition, the field effect mobility can be increased. When trapped, the electrons become a fixed negative charge. However, the oxide semiconductor film 19a and the carrier trapping The separation between the carrier traps reduces the capture of electrons in the carrier traps. This makes it possible to reduce the amount of variation in the threshold voltage.

[0272] In addition, the oxide semiconductor film 39a can block impurities from the outside. The amount of impurities moving from the outside to the oxide semiconductor film 19a can be reduced. The oxide semiconductor film 39a is less likely to form oxygen vacancies. It is possible to reduce the impurity concentration and oxygen vacancy amount in a.

[0273] The oxide semiconductor film 19a and the oxide semiconductor film 39a are not simply laminated. A continuous junction (here, the energy of the bottom of the conduction band changes continuously between the layers) is used. In other words, trap centers and recombination centers are formed at the interfaces of each film. The layer structure is designed so that there are no impurities that would create such defect levels. When impurities are present between the oxide semiconductor film 19a and the oxide semiconductor film 39a, the energy The continuity of the Gate band is lost, and carriers are trapped or recombined at the interface, causing dissipation. It will be destroyed.

[0274] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without exposing it to the air. Each chamber in the sputtering apparatus is required for the oxide semiconductor film. In order to remove impurities such as water as much as possible, an adsorption type vacuum pump such as a cryopump is used. High vacuum pump (5×10 -7 Pa~1×10 -4 It is preferable to use a temperature of up to about 10 Pa. Alternatively, a turbo molecular pump and cold trap can be combined to separate the chamber from the exhaust system. It is preferable to prevent the backflow of gases into the bar, especially gases containing carbon or hydrogen. stomach.

[0275] Note that, instead of the multilayer film 37a, a transistor 102c shown in FIG. It may have a multi-layer film 38a.

[0276] In place of the multilayer film 37b, a multilayer film such as a capacitive element 105c shown in FIG. 14(B) is used. It may have a membrane 38b.

[0277] The multilayer film 38a includes an oxide semiconductor film 49a, an oxide semiconductor film 19a, and an oxide semiconductor film That is, the multilayer film 38a has a three-layer structure. It functions as a channel region.

[0278] The oxide semiconductor film 49a is formed using a material and a method similar to those of the oxide semiconductor film 39a. It is possible.

[0279] The multilayer film 38b includes an oxide semiconductor film 49b, an oxide semiconductor film 19f, and an oxide semiconductor film That is, the multilayer film 38b has a three-layer structure. It functions as:

[0280] The oxide semiconductor film 19f may be formed by using the same material and method as the pixel electrode 19b. The oxide semiconductor film 49b can be formed using a material and a method similar to those of the oxide semiconductor film 39b. It can be used appropriately.

[0281] The oxide insulating film 17 and the oxide semiconductor film 49a are in contact with each other. An oxide semiconductor film 49a is provided between the oxide semiconductor film 19a and the oxide semiconductor film 49b.

[0282] The multilayer film 38a and the oxide insulating film 23 are in contact with each other. The oxide semiconductor film 19a is in contact with the oxide insulating film 23. That is, between the oxide semiconductor film 19a and the oxide insulating film 23, An oxide semiconductor film 39a is provided.

[0283] The oxide semiconductor film 49a is preferably thinner than the oxide semiconductor film 19a. The thickness of the semiconductor film 49a is set to 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less. This makes it possible to reduce the amount of variation in the threshold voltage of the transistor.

[0284] In the transistor described in this embodiment, Therefore, the oxide semiconductor film 39a and the oxide Even if carrier traps are formed between the insulating films 23 due to impurities and defects, There is a gap between the carrier traps and the oxide semiconductor film 19a. Electrons flowing through the conductive film 19a are less likely to be captured by carrier traps, and the on-state current of the transistor is reduced. It is possible to increase the current and improve the field effect mobility. When an electron is captured by a carrier trap, the electron becomes a negative fixed charge. As a result, the threshold voltage of the transistor varies. Since there is a gap between the film 19a and the carrier trap, the electrons in the carrier trap Therefore, it is possible to reduce the amount of trapping of electrons, and the amount of variation in the threshold voltage can be reduced.

[0285] In addition, the oxide semiconductor film 39a can block impurities from the outside. The amount of impurities moving from the outside to the oxide semiconductor film 19a can be reduced. The oxide semiconductor film 39a is less likely to form oxygen vacancies. It is possible to reduce the impurity concentration and oxygen vacancy amount in a.

[0286] In addition, an oxide semiconductor film 49a is provided between the oxide insulating film 17 and the oxide semiconductor film 19a. The oxide semiconductor film 39 is disposed between the oxide semiconductor film 19a and the oxide insulating film 23. Since the oxide semiconductor film 49a is provided near the interface between the oxide semiconductor film 49a and the oxide semiconductor film 19a, the silicon and carbon concentrations in the oxide semiconductor film 19a, Alternatively, silicon or carbon in the vicinity of the interface between the oxide semiconductor film 39a and the oxide semiconductor film 19a As a result, the concentration of the multilayer film 38a can be reduced. The absorption coefficient derived by the method is 1×10 -3 / cm, preferably less than 1×10 -4 / cm not yet The number of localized levels is extremely small.

[0287] The transistor 102c having such a structure has a very small number of defects in the multilayer film 38a. Since the amount of the ions is small, it is possible to improve the electrical characteristics of the transistor. It is possible to increase the current and improve the field effect mobility. The amount of variation in threshold voltage during T stress testing and optical BT stress testing is small, resulting in high reliability. is high.

[0288] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0289] (Embodiment 8) In this embodiment, a transistor included in the display device described in the above embodiment is One embodiment applicable to an oxide semiconductor film will be described.

[0290] The oxide semiconductor film is an oxide semiconductor having a single crystal structure (hereinafter referred to as a single crystal oxide semiconductor). , a polycrystalline oxide semiconductor (hereinafter referred to as a polycrystalline oxide semiconductor), oxide semiconductors having an amorphous structure (hereinafter referred to as microcrystalline oxide semiconductors) and amorphous oxide semiconductors having an amorphous structure (hereinafter referred to as The oxide semiconductor film may be formed of one or more of the following: Alternatively, the oxide semiconductor film may be an amorphous oxide semiconductor film. The semiconductor layer may be made of an oxide semiconductor having a conductor and crystal grains. The CAAC-OS and a microcrystalline oxide semiconductor will be described.

[0291] <caac-os> The CAAC-OS film is one of the oxide semiconductor films having multiple crystal parts. The crystals in the AC-OS film have a c-axis orientation. The area of ​​the crystals in the C-OS film is 2500 nm 2 More preferably, 5 μm or more 2 Below More preferably, 1000 μm or more 2 In addition, in the cross-sectional TEM image, By having a ratio of 50% or more, preferably 80% or more, and more preferably 95% or more, The resulting thin film has properties close to those of a crystal.

[0292] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed using a quartz crystal microscope, clear boundaries between the crystals were observed. It is difficult to confirm the grain boundaries. It can be said that the CAAC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0293] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When the metal atoms are observed, it can be confirmed that they are arranged in layers in the crystal part. Each layer of the CAAC-OS film is formed on a surface on which the film is to be formed (also called a surface on which the film is to be formed) or on a concave surface on the upper surface. The shape reflects the convexity and is aligned parallel to the surface on which the CAAC-OS film is formed or the top surface. In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. " refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. This also includes cases where the angle is between 85° and 95°.

[0294] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.

[0295] When electron beam diffraction was performed on the CAAC-OS film, spots (bright spots) indicating orientation were observed. is observed.

[0296] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It is clear that there are

[0297] X-ray diffraction (XRD) of CAAC-OS film The structure of the CAAC-OS film was analyzed using the out-of-plane method. In the analysis, a peak may appear at a diffraction angle (2θ) of around 31°. This peak is I Since it is assigned to the (00x) plane (x is an integer) of the n-Ga-Zn oxide crystal, The crystals of the C-OS film have a c-axis orientation, and the c-axis is oriented in a direction approximately perpendicular to the surface on which the film is formed or the upper surface. It can be confirmed that this is the case.

[0298] On the other hand, in-p X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the lane method, a peak may appear at 2θ around 56°. is attributed to the (110) plane of the In-Ga-Zn oxide crystal. In the case of a single crystal oxide semiconductor film, 2θ is fixed at about 56°, and the normal vector of the sample surface is When the sample is rotated around the axis (φ axis) while analyzing (φ scan), the (110) plane and Six peaks attributable to equivalent crystal planes are observed. In this case, even if φ scanning is performed with 2θ fixed at around 56°, no clear peak appears.

[0299] From the above, it is concluded that the a-axis and b-axis orientations are inconsistent between different crystal regions in the CAAC-OS film. The crystal is regular, but has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which the crystal is formed or the upper surface. Therefore, the layered arrangement confirmed by the cross-sectional TEM observation mentioned above is consistent with the above. Each layer of aligned metal atoms is a plane parallel to the ab plane of the crystal.

[0300] The crystals are formed when the CAAC-OS film is formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned along the surface on which the CAAC-OS film is formed or along the surface on which the CAAC-OS film is formed. The orientation of the CAAC-OS film is parallel to the normal vector of the top surface. When the shape of the CAAC-OS film is changed by etching, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed. Or it may not be parallel to the normal vector of the upper surface.

[0301] In addition, the crystallinity in the CAAC-OS film does not have to be uniform. When the crystalline part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, The area near the surface may have a higher crystallinity than the area near the surface on which it is formed. When impurities are added to the AC-OS film, the crystallinity of the region to which the impurities are added changes, resulting in a partial In some cases, regions of differing crystallinity may be formed.

[0302] In addition, in the out-of-plane analysis of the CAAC-OS film, 2θ was 31°. In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks near the c-axis are due to the presence of crystals that do not have the c-axis orientation in the CAAC-OS film. The CAAC-OS film shows a peak at 2θ of around 31° and a peak at 2θ of around 36°. It is preferable that there is no peak nearby.

[0303] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The oxide semiconductor film is preferably made of silicon or a transition metal element other than the main component of the oxide semiconductor film. The elements that bond to oxygen stronger than the metal elements that form the oxide semiconductor film, such as Zn, By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, and the crystallinity is reduced. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide are Since the diameter (or molecular radius) of the ions is large, when the ions are contained inside the oxide semiconductor film, the oxide semiconductor film The impurities contained in the oxide semiconductor film are disturbed, which causes a decrease in crystallinity. Pure materials may act as carrier traps or carrier generation sources.

[0304] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in semiconductor films act as carrier traps and trap hydrogen. This can become a carrier generation source.

[0305] The low impurity concentration and low defect level density (low oxygen vacancy) are called high purity intrinsic High purity intrinsic or substantially high purity intrinsic oxide semiconductors Since the thin film has a small number of carrier generation sources, the carrier density can be reduced. The transistor including the oxide semiconductor film has electrical characteristics in which the threshold voltage is negative ( Also called normally-on.) In addition, high purity intrinsic or substantially high purity The highly intrinsic oxide semiconductor film has few carrier traps. The transistors using the thin film have small fluctuations in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time when the charge is released is long, and it may behave as if it is a fixed charge. A transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. This may be the case.

[0306] In addition, the electrical characteristics of transistors using CAAC-OS films are improved by irradiation with visible light or ultraviolet light. Gender variation is small.

[0307] <Microcrystalline oxide semiconductor> In the microcrystalline oxide semiconductor film, it is difficult to clearly identify the crystal parts in the TEM observation image. The crystal parts contained in the microcrystalline oxide semiconductor film have a thickness of 1 nm or more and 100 nm or less. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 nm or less and 3 nm or less. The oxide semiconductor film having Al was formed by The nc-OS film is called a TE semiconductor film. In the M image, it is sometimes difficult to clearly identify the grain boundaries.

[0308] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal planes are In addition, the peaks shown in the figure are not detected in the nc-OS film because the probe diameter is larger than that in the crystalline region. Electron beam diffraction (also called selected area electron beam diffraction) using an electron beam of 50 nm or more (for example) When the diffraction pattern is changed to nc-OS film, a halo-like diffraction pattern is observed. The probe diameter is close to or smaller than the size of the crystal part (for example, 1 nm to 30 nm). When electron beam diffraction (also called nanobeam electron beam diffraction) is performed using the electron beam shown below, In addition, when the nc-OS film was subjected to nanobeam electron diffraction, a circular pattern was observed. In addition, for the nc-OS film, a bright area (ring-shaped) may be observed. When performing nanobeam electron diffraction, multiple spots may be observed within a ring-shaped region. be.

[0309] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, the crystal orientation is not regular between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0310] <Oxide Semiconductor Film and Oxide Conductor Film> Next, a film formed of an oxide semiconductor (hereinafter referred to as an oxide semiconductor film (OS)) and A film made of an oxide conductor that can be used as the pixel electrode 19b (hereinafter, referred to as oxide conductor) The temperature dependence of the conductivity of each of the following films is shown in Figure 26. In FIG. 26, the horizontal axis indicates the measurement temperature (the lower horizontal axis indicates 1 / T, and the upper horizontal axis indicates T). The vertical axis indicates electrical conductivity (1 / ρ). The measurement results of the oxide semiconductor film (OS) are indicated by triangles. The measurement results of the oxide conductor film (OC) are indicated by circles.

[0311] The sample including the oxide semiconductor film (OS) was formed on a glass substrate with an atomic ratio of In:Ga A sputtering method was used to deposit a thick ZnO film using a sputtering target with a ratio of 1:1:1.2. An In-Ga-Zn oxide film having a thickness of 35 nm was formed, and the atomic ratio of the film was In:Ga:Zn=1:4. A 20 nm thick In- A Ga-Zn oxide film was formed, and then heat-treated in a nitrogen atmosphere at 450°C. The silicon oxynitride film is then formed by plasma CVD. It was produced by forming

[0312] The sample containing the oxide conductor (OC) was prepared by depositing an In:Ga atomic ratio on a glass substrate. A sputtering method was used with a sputtering target of Zn=1:1:1 to deposit a 10 ... After forming a 00 nm In-Ga-Zn oxide film and heat-treating it in a nitrogen atmosphere at 450 °C, The silicon nitride was then deposited by plasma CVD. It was prepared by forming a con film.

[0313] As can be seen from FIG. 26, the temperature dependence of the conductivity in the oxide conductor film (OC) is The temperature dependence of electrical conductivity is smaller than that of oxide semiconductor films (OS). Typically, it is 80K or higher. The rate of change in the electrical conductivity of oxide conductor film (OC) at 290K or less is less than ±20%. Alternatively, the rate of change in electrical conductivity from 150K to 250K is less than ±10%. That is, an oxide conductor is a degenerate semiconductor, and the bottom of the conduction band and the Fermi level are the same or approximately the same. Therefore, the oxide conductor film (OC) is used for resistance elements, wiring, and The electrode can be used as a pixel electrode, a common electrode, etc.

[0314] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0315] (Embodiment 9) In the method for manufacturing a transistor described in the above embodiment, After forming the conductive films 21a and 21b which function as the conductive films, the oxide semiconductor film 19a is The oxide semiconductor film 19a can be exposed to plasma generated by the above method, thereby supplying oxygen to the oxide semiconductor film 19a. The atmosphere may be oxygen, ozone, nitrous oxide, nitrogen dioxide, or the like. In the plasma processing, the plasma generated without applying a bias to the substrate 11 side It is preferable to expose the oxide semiconductor film 19a to the damascene. The oxide semiconductor film 19a can supply oxygen without imparting an image thereto. In addition, the amount of oxygen vacancies in the oxide semiconductor film 19 can be reduced by the etching treatment. Impurities remaining on the surface of a, such as halogens such as fluorine and chlorine, can be removed. It is also preferable to carry out the plasma treatment while heating at 300° C. or higher. The oxygen in the vapor is combined with the hydrogen contained in the oxide semiconductor film 19a to form water. Therefore, the water is released from the oxide semiconductor film 19a. The hydrogen and water contents in 9a can be reduced.

[0316] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0317] (Embodiment 10) In this embodiment, a structural example of an electronic device to which a display device of one embodiment of the present invention is applied will be described. In addition, in this embodiment, a display module to which the display device of one embodiment of the present invention is applied will be described. The rule will be explained with reference to FIG.

[0318] The display module 8000 shown in FIG. 15 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003, A display panel 8006, a backlight unit 8007, a frame 8009, a printed circuit board The backlight unit 8007, the battery 8011, and the LCD panel 8012 are also included. The telly 8011, the touch panel 8004, etc. may not be provided.

[0319] The display device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0320] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 8006.

[0321] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide a touch panel function to the display panel. It is also possible to provide an optical sensor in each pixel of the 8006 to make it into an optical touch panel. Alternatively, a touch sensor electrode may be provided in each pixel of the display panel 8006 to realize a capacitive touch sensor. It is also possible to use it as a touch panel.

[0322] The backlight unit 8007 includes a light source 8008. Alternatively, the light diffusing plate may be provided at the end of the light receiving unit 8007.

[0323] The frame 8009 protects the display panel 8006 and also supports the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 8009 may also function as a heat sink.

[0324] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. 1 can be omitted if commercial power is used.

[0325] The display module 8000 also includes components such as a polarizing plate, a retardation plate, and a prism sheet. Additional ones may be provided.

[0326] FIG. 16 is an external view of an electronic device including a display device of one embodiment of the present invention.

[0327] The electronic device may be, for example, a television device (television or television receiver) (also called "computer monitors"), digital cameras, digital video cameras, etc. digital photo frames, mobile phones (also called mobile phones or mobile phone devices), These include large game machines such as small game machines, portable information terminals, audio playback devices, and pachinko machines. can be.

[0328] FIG. 16A shows a portable information terminal, which includes a main body 1001, a housing 1002, a display unit 1003, and a The display unit 1003b is a touch panel. By touching the keyboard button 1004 displayed on the display unit 1003b, Of course, the display unit 1003a can be configured as a touch panel. The transistor described in the above embodiment may be used as a switching element in a liquid crystal panel. By fabricating a display panel or an organic light-emitting panel and applying it to the display units 1003a and 1003b, It is possible to provide a highly reliable portable information terminal.

[0329] The portable information terminal shown in FIG. 16(A) displays various information (still images, videos, text images, etc.). Functions that display calendars, dates, or times on the display, functions that display Ability to manipulate or edit displayed information, processed by various software (programs) In addition, the rear and side of the housing may be provided with terminals for external connection. It may also be configured to include a connector (such as an earphone jack or USB port) and a recording medium insertion section.

[0330] The portable information terminal shown in FIG. 16A is configured to be capable of wirelessly transmitting and receiving information. The desired book data can be purchased and downloaded wirelessly from an electronic book server. It is also possible to configure the device to perform this function.

[0331] FIG. 16B shows a portable music player. The main body 1021 has a display unit 1023 and an earphone. The device has a fixing part 1022 for mounting to an external device, a speaker, an operation button 1024, and an external memory slot. The transistors described in the above embodiment are switched By preparing a liquid crystal panel or an organic light-emitting panel as an element and applying it to the display unit 1023, This makes it a more reliable portable music player.

[0332] Furthermore, the portable music player shown in FIG. 16(B) is equipped with an antenna, a microphone function, and a wireless function. If you carry it with you and connect it to your mobile phone, you can enjoy wireless hands-free driving while driving a car. Conversations in Lee are also possible.

[0333] FIG. 16C shows a mobile phone, which is composed of two housings, a housing 1030 and a housing 1031. The housing 1031 includes a display panel 1032, a speaker 1033, a microphone, and the like. 1034, a pointing device 1036, a camera 1037, an external connection terminal 103 The housing 1030 also includes a solar cell 1040 for charging the mobile phone. , an external memory slot 1041, etc. Also, the antenna is provided inside the housing 1031. The transistor described in the above embodiment is applied to the display panel 1032. This makes it possible to provide a highly reliable mobile phone.

[0334] The display panel 1032 is equipped with a touch panel, and an image is displayed on the display panel 1032 as shown in FIG. The operation keys 1035 are indicated by dotted lines. It also implements a boost circuit to boost the voltage supplied to each circuit to the voltage required.

[0335] The display direction of the display panel 1032 changes appropriately depending on the usage mode. The camera 1037 is located on the same surface as the screen 1032, so video calls are possible. The speaker 1033 and microphone 1034 are not limited to voice calls, but can also be used for video calls, recording, Furthermore, the housing 1030 and the housing 1031 can be slid to each other, as shown in FIG. C) It can be folded from the unfolded state to the folded state, making it small and easy to carry. It is possible to typeify it.

[0336] The external connection terminal 1038 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the external memory slot 1041, it is possible to store and transfer a larger amount of data. Cut.

[0337] In addition to the above functions, it also has infrared communication function, TV reception function, etc. Good too.

[0338] FIG. 16D shows an example of a television device. The television device 1050 is A display unit 1053 is built into the housing 1051. The display unit 1053 displays an image. In addition, the CPU is built into the stand 1055 that supports the housing 1051. The transistor described in the above embodiment is applied to the display portion 1053 and the CPU. By using this, a highly reliable television device 1050 can be obtained.

[0339] The television device 1050 can be operated using an operation switch provided on the housing 1051 or a separate remote control. This can be done by a remote controller. A display unit that displays information output from the controller may be provided.

[0340] The television device 1050 includes a receiver, a modem, and the like. This allows reception of general television broadcasts, and can also be used for wired or wireless reception via a modem. By connecting to a network, communication can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between sender and receiver, or between receivers). .

[0341] The television device 1050 also includes an external connection terminal 1054 and a storage medium playback / recording unit 1055. 052, and an external memory slot. The external connection terminal 1054 is a It can be connected to any type of cable, enabling data communication with a personal computer, etc. In the storage medium playback and recording unit 1052, a disk-shaped recording medium is inserted and It is possible to read the stored data and write it to the recording medium. Images and videos stored in the external memory 1056 inserted in the reslot It is also possible to display it on the display unit 1053.

[0342] In addition, when the off-leak current of the transistor described in the above embodiment is extremely small, By applying this transistor to the external memory 1056 and the CPU, power consumption can be reduced sufficiently. This results in a highly reliable television apparatus 1050 with reduced power consumption.

[0343] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done. EXAMPLES

[0344] Example 1 In this example, a distribution of transmittance in a pixel of a liquid crystal display device according to one embodiment of the present invention will be described. and evaluated by calculation.

[0345] First, the samples used in this example will be described.

[0346] 17A shows a top view of Sample 1, which is a comparative example. The pixel shown in Sample 1 has a horizontal The extended scanning lines 201 and common lines 203 and the vertical direction (the direction perpendicular to the scanning lines and common lines) The signal line 205 extends in the vertical direction (vertical direction) and the area inside the signal line 205. 28 μm in length and 28 μm in width.

[0347] Sample 1 is located inside the area surrounded by the above-mentioned wiring and the signal lines of the horizontally adjacent pixels. A common electrode 207 is disposed on the common line 203 and electrically connected to the common line 203. The pixel electrode 209 has a comb-like shape and is disposed on the pixel electrode 207. In the sample 1, the teeth extend in a direction intersecting the signal line 205. a gate electrode electrically connected to the gate electrode 01 and overlapping the gate electrode via a gate insulating film; A semiconductor film 211 formed in the same process as the common electrode 207, and an electrode connected to the semiconductor film 211 The source electrode is electrically connected to the signal line 205 and the pixel electrode is electrically connected to the pixel electrode 209. A transistor having a drain electrode 213 connected to

[0348] Next, FIG. 17B shows a top view of Sample 2 which is one embodiment of the present invention. The pixel is made up of scanning lines 221 extending horizontally, signal lines 225 extending vertically, and The size of one pixel is 84 μm in length and 28 μm in width.

[0349] Sample 2 has the above-mentioned wiring, the signal lines of the horizontally adjacent pixels, and the vertically adjacent pixels. A pixel electrode 229 is disposed inside the area surrounded by the scanning lines, and a pixel electrode 229 is disposed on the pixel electrode 229. The common electrode 227 intersects with the signal line 225. In the sample 2, the gate electrode electrically connected to the scanning line 221 extends in a stripe shape in the direction of the scanning line 222. The gate electrode is overlapped with the gate insulating film through the gate electrode, and is formed through the same process as the pixel electrode 229. The semiconductor film 231 formed by the above-mentioned process is electrically connected to the signal line 225. A source electrode 229 is electrically connected to the drain electrode 233, and a pixel electrode 229 is electrically connected to the drain electrode 233. A transistor having the above structure is provided in a pixel. Reference can be made to the second embodiment and the transistor 102 shown in FIG.

[0350] In this manner, Sample 1 and Sample 2 were prepared. The pixels shown in Sample 1 and Sample 2 were The transmittance of the liquid crystal can be controlled by the horizontal electric field applied between the base electrode and the common electrode. can.

[0351] Next, the transmittance of Sample 1 and Sample 2 was calculated. The calculation was performed using Master 3-D in FEM-Static mode. The size is 84 μm in length, 28 μm in width, and 4 μm in depth (height). The boundary condition is period. The thickness of the gate electrode is 200 nm, and the thickness of the gate insulating film is 400 nm. The thickness of the signal line was 300 nm, and the thickness of the interlayer insulating film was 500 nm. The thickness of the common electrode is 0 nm, and the thickness of the nitride insulating film between the common electrode and the pixel electrode is 10 The thickness of the pixel electrode was set to 100 nm. The thickness of the nitride insulating film between the pixel electrode and the common electrode is 100 nm, and the thickness of the common electrode is The rubbing direction of the liquid crystal was 85°, the twist angle was 0°, and the pretilt angle was 100 nm. The angle was set to 3°. In order to reduce the calculation load, the common electrode of sample 1 and the pixel of sample 2 were The thickness of the electrode was set to 0 nm. Under these conditions, the scan line was set to -9 V, the common line was set to 0 V, and the signal The transmittance distribution was evaluated when 6 V was applied to the line and pixel electrodes.

[0352] The transmittance distribution is shown in gray scale, with white indicating higher transmittance. The transmittance distribution of sample 1 is shown in FIG. 17(C), and the transmittance distribution of sample 2 is shown in FIG. 17(D).

[0353] It was found that regions with high transmittance were formed in Samples 1 and 2. It was found that in Sample 2, a region with high transmittance was formed over a wide area within the pixel. This is because the area of ​​the common electrode formed on the sample 2 that extends in a direction parallel to the signal line is In contrast to Sample 1, Sample 2 does not have a pixel electrode and a common electrode. This is because the area is large.

[0354] Therefore, sample 2 has an effective structure for fabricating a liquid crystal display device with low power consumption. It can be seen that. EXAMPLES

[0355] In this embodiment, adjacent pixels of a liquid crystal display device according to one embodiment of the present invention are white and black. The light leakage in the black display area when the display was performed was evaluated by calculation.

[0356] First, the samples used in this example will be described.

[0357] Figure 18(A) shows a top view of sample 3. The pixel shown in sample 3 has a scanning line extending in the horizontal direction. 241, a signal line 243 extending in the vertical direction, and the area inside the signal line 243. The combined size of two pixels is 49.5 μm in height and 30 μm in width.

[0358] Sample 3 has the above-mentioned wiring, the signal lines of the horizontally adjacent pixels, and the vertically adjacent pixels. A pixel electrode 249 is disposed inside the area surrounded by the scanning lines, and a pixel electrode 249 is disposed on the pixel electrode 249. The common electrode 247 intersects with the signal line 243. In the sample 3, the scanning line 241 is electrically connected to the scanning line 242. The gate electrode is overlapped with the gate electrode via a gate insulating film, and is the same as the pixel electrode 249. The semiconductor film 251 formed through the process is electrically connected to the semiconductor film 251, and the signal line 2 A source electrode electrically connected to the pixel electrode 43 and a drain electrode 25 electrically connected to the pixel electrode A transistor having the following cross-sectional shape is provided in the pixel: The transistor 102 in Embodiment 2 and FIG. 5 can be referred to.

[0359] FIG. 18B shows a top view of sample 4. Sample 4 has a structure similar to that of sample 3, but The shapes of the drain electrode and the common electrode are different. Specifically, in sample 4, the drain electrode 2 The pixel electrode 63 is L-shaped and has an area overlapping the end of the pixel electrode 249, so that the scanning line 241 and the pixel electrode 249. Similarly, the common electrode 267 is , by making the shape of the pixel to be connected to the adjacent pixel in the vertical direction across the scanning line 241, The effect of the electric field between the pixel electrode 241 and the pixel electrode 249 is suppressed.

[0360] In this manner, Samples 3 and 4 were prepared. The pixels shown in Samples 3 and 4 were The transmittance of the liquid crystal element is controlled by the horizontal electric field applied between the base electrode and the common electrode. This can be done.

[0361] Next, the transmittance of Sample 3 and Sample 4 was calculated. The calculation was performed using Master 3-D in FEM-Static mode. The size is 49.5 μm in length, 30 μm in width, and 4 μm in depth (height). The boundary conditions are peri The thickness of the gate electrode is 200 nm, and the thickness of the gate insulating film is 40 0 nm, pixel electrode thickness 0 nm, signal line thickness 300 nm, interlayer insulating film thickness 50 The thickness of the common electrode was set to 100 nm. The thickness of the oxide insulating film was set to 100 nm. The rubbing direction of the liquid crystal was set to 90°, and the twist angle was set to 100°. The thickness of the pixel electrode was set to 0° and the pretilt angle was set to 3° in order to reduce the calculation load. Under these conditions, -9V was applied to the scan line and 0V was applied to the common line. 6V is applied to the signal line and pixel electrode of the left pixel, and 0V is applied to the signal line and pixel electrode of the right pixel. The distribution of transmittance when V was applied was evaluated.

[0362] The transmittance distribution is shown in gray scale, with white indicating higher transmittance. The distribution of the transmittance of Sample 1 is shown in FIG. 18(C), and the distribution of the transmittance of Sample 4 is shown in FIG. 18(D).

[0363] In Samples 3 and 4, white display was observed in the left pixel and black display was observed in the right pixel. In addition, in the black display of sample 3, some areas of high transmittance (light leakage) were confirmed. In the black display of sample 4, no area with high transmittance was observed across the entire pixel. The drain electrode 263 is L-shaped and has an area overlapping with an end of the pixel electrode 249. This makes it difficult for an electric field to occur between the scanning lines and pixel electrodes, resulting in a black display, compared to sample 3. It can be seen that the light leakage is reduced.

[0364] Therefore, sample 4 has an effective structure for producing a liquid crystal display device with high contrast. It is clear that it is a structure.

Claims

[Claim 1] a transistor on an insulating surface; a pixel electrode electrically connected to the transistor; a signal line electrically connected to the transistor; a scanning line electrically connected to the transistor and intersecting the signal line; a common electrode provided on the pixel electrode and the signal line via an insulating film; The display device according to claim 1, wherein the common electrode has striped regions extending in a direction intersecting the signal lines.

Images