86results about How to "Reduce the facing area" patented technology

The invention provides a silicon carbide MOSFET device and a manufacturing method thereof. Silicon carbide deep P injection is performed in a specified region, groove etching and deposition of metal or polysilicon are performed above a silicon carbide deep P doped region, and the deposited metal or polysilicon is in direct contact with the silicon carbide N-epitaxy to form a Schottky contact or aSi/SiC heterojunction contact having rectifying characteristics. Therefore, the integration of multiple sub-rectifiers is achieve while optimizing the basic performance of the conventional silicon carbide UMOSFET, the working performance of the third quadrant of the device is greatly optimized, the gate-drain capacitance of the device is reduced and the switching speed of the device is improved.

The invention discloses an array substrate, a manufacturing method of the array substrate and a display device, and belongs to the technical field of display. The array substrate comprises a substrate body. A data line is formed on the substrate body. A first electrode is formed on the substrate body on which the data line is formed. A first insulating layer is formed on the substrate body on which the first electrode is formed. A second electrode and a guard electrode are formed on the substrate body on which the first insulating layer is formed. The orthographic projection of the data line on the substrate body falls into the orthographic projection of the guard electrode on the substrate body. At least one opening is formed in the guard electrode, and the openings are located in the orthographic projection area of the data line on the guard electrode. The openings are formed in the guard electrode, the problem that signals of the guard electrode have an effect on signals of the data line, and consequently the load of the data line is large is solved, and the effect of reducing the load of the data line is achieved.

The invention provides a silicon carbide MOSFET device and a manufacturing method thereof. The invention improves device structure design and finally integrates Schottky contact or heterojunction contact with rectifying characteristics on the basis of traditional silicon carbide UMOSFET structure. At that same time of optimize the basic characteristics of the traditional silicon carbide UMOSFET structure, the improvement realize the integration of multi-sub rectifier devices, greatly optimizes the work performance of the third quadrant of the device, and in addition, the invention also optimizes the dynamic performance of the device, and has shorter switching time; In addition, the invention also has the characteristics of simple process and easy realization.

The invention provides a thin film transistor, a manufacturing method of the thin film transistor, an array substrate and a display device. The thin film transistor comprises a gate electrode, an active layer, an etching barrier layer, a source electrode and a drain electrode, wherein the etching barrier layer is arranged among the active layer, the source electrode and the drain electrode, and is provided with a first through hole and a second through hole, the source electrode is connected with the active layer through the first through hole, the drain electrode is connected with the active layer through the second through hole, and the gate electrode coincides with part of the first through hole and part of the second through hole, and coincides with a portion between the first through hole and the second through hole. According to the technical scheme, the frequency of the phenomenon that pixel voltage floats can be reduced, and the display effect can be improved.

The present application relates to a drive substrate and a display panel. The substrate comprises a special-shape display area and a special-shape non-display area. A plurality of first signal lines extend from the special-shape display area to the special-shape non-display area. A plurality of compensation capacitors are arranged in the special-shape non-display area. One compensation capacitor is electrically connected with one first signal line, and each compensation capacitor comprises a first electrode layer, a first dielectric layer and a second electrode layer which are sequentially arranged on the surface of the substrate. A plurality of first pixel driving rows are arranged in the special-shape display area. Each first pixel driving row comprises a plurality of first pixel drivingunits, and one first signal line is electrically connected with one first pixel driving row. Each first pixel driving unit comprises a storage capacitor. The storage capacitor comprises a third electrode layer, a second dielectric layer and a fourth electrode layer arranged in sequence on the surface of the substrate. The dielectric constant of the first dielectric layer is greater than that of the second dielectric layer to reduce the area occupied by the compensation capacitors in the special-shape non-display area, thereby improving the screen-to-body ratio and improving the look and feel.

The invention discloses a low junction capacitance characteristic terahertz Schottky diode and a manufacturing method thereof. A Schottky junction formed between Schottky contact metal and a materialhas a depletion effect on a two-dimensional electron gas, an etched semi-through hole is etched to a channel layer and etches off the two-dimensional electron gas of the channel layer, and the Schottky contact metal on a first convex surface and ohmic contact metal on a second convex surface are communicated by an air bridge, so that the direct area between the two-dimensional electron gas and theSchottky contact metal is very small, and capacitance is very small; and compared with a device with the Schottky contact metal completely covering the material surface, the device is smaller in capacitance, has no change in resistance, and can obtain higher cutoff frequency. A frequency mixer and a frequency doubler prepared through the low junction capacitance characteristic terahertz Schottkydiode can achieve a spectrum reception and detection function in the terahertz band, and is used for an excellent terahertz source and a terahertz receiver.

The invention discloses a welding disc, which comprises a plurality of welding disc metal layers, wherein the welding disc metal layers close to a semiconductor gasket and a semiconductor substrate form a parasitic capacitor; and the welding disc metal layers close to the semiconductor substrate are partitioned into parts which are separated from one another to reduce the opposite area of two pole plates of the parasitic capacitor, so that a parasitic capacitance value is reduced. The invention also discloses a silicon-on-insulator (SOI) device. The device comprises the welding disc, wherein a conductive layer which is used as a shielding layer is arranged inside the welding disc, so that a non-linear changeable parasitic capacitor inside an integrated circuit is changed into a constant parasitic capacitor; further, a shallow trench isolation (STI) area with increased depth is arranged inside the SOI device, so that the parasitic capacitance value is reduced. When the SOI device is operated, a radio frequency signal applied onto the device can be leaked out of the parasitic capacitor as few as possible; and the acquired radio frequency signal is a linear signal and meets the using requirement of radio frequency equipment.

The invention discloses a charge pump circuit, a charge pump system and a memory. The charge pump circuit comprises a charge pump unit, a clock booster circuit, a booster circuit and a transmission circuit, wherein an input end of the charge pump unit is coupled to the input end of the charge pump circuit and an output end is coupled to the output end of the charge pump circuit; the clock booster circuit is used for receiving a clock signal and is suitable for boosting the clock signal to output a boosted clock signal; the booster circuit is used for receiving the boosted clock signal and is suitable for improving the voltage on the basis of the boosted clock signal to output a boosted signal; and the transmission circuit is suitable for transmitting the boosted signal to the charge pump unit. The charge pump circuit has relatively high area efficiency.

The present application provides a memory and a manufacturing method thereof. The method comprises the steps of: providing a first wafer, wherein the first wafer is provided with a groove at a position corresponding to a position where a metal bonding pad is subsequently formed, the depth of the groove is larger than or equal to the thickness of the first wafer after thinning so as to get throughthe groove on the first wafer to form a wafer through hole penetrating the first wafer. Therefore, after the metal bonding pad is subsequently formed, the wafer through hole penetrating the first wafer is arranged at the position corresponding to the metal bonding pad, the wafer area directly facing the metal bonding pad is reduced to reduce the parasitic capacitance between the first wafer and the metal bonding pad, the groove can be formed through once etching, the depth is not needed to be strictly controlled so as to enlarge the process window to allow the mode of reducing the parasitic capacitance to be more easily controlled and reduce the process control precision requirement.

The invention relates to a touch display screen and a manufacturing method thereof and a display device. The touch display screen comprises a substrate and a conductive metal layer; the conductive metal layer is disposed on one side of the substrate and comprises a plurality of first electrodes arranged in a first direction and a plurality of second electrodes arranged in a second direction; the first direction is perpendicular to the second direction; every two second electrodes are connected through a first conductive part and a second conductive part, between which a lap joint part insulated to the second electrodes and the first and second conductive parts is provided; the conductive metal layer further comprises first and second bridge parts disposed between two adjacent first electrodes; each first bridge part is electrically connected with one of two first electrodes and the corresponding lap joint part; each second bridge part is electrically connected with the other of two first electrodes and the corresponding lap joint part. The touch display screen according to the technical scheme has the advantages that displaying effect is improved and touch effect is unaffected.

The invention provides an eliminator for parasitic inductance of a smoothing capacitor, which comprises a printed circuit board (401), and an upper layer plane helical coil (402) and a lower layer plane helical coil (403) which are arranged on the printed circuit board (401). The upper layer plane helical coil and the lower layer plane helical coil are formed by connecting im semi-circular PCB windings end to end of which semi-diameters are increased successively; the semi-circular PCB windings with the same semi-diameter are symmetrical about mirror image, so that the upper layer plane helical coil and the lower layer plane helical coil are in staggered arrangement; the upper layer plane helical coil is connected in series with the lower layer plane helical coil through a through hole E which is formed on the printed circuit board (401) to form an orthodromic coupled structure, namely, the directions of currents in the upper layer plane helical coil and the lower layer plane helical coil are the same. The through hole E is also used for accommodating a pin of the capacitor; the values of mutual inductance and the parasitic inductance are the same by controlling the number of the semi-circular PCB windings in the upper layer plane helical coil and the lower layer plane helical coil according to the parasitic inductance value of the capacitor.

The invention relates to the technical field of valve machining and discloses valve machining assisting equipment for correcting a grinding position by utilizing dielectric constant changes. The valvemachining assisting equipment comprises a grinding shaft; the outer side of the grinding shaft is movably connected with a baffle; a trigger power supply is started due to offset of the grinding shaft; a coil spring positioned at the outer side of a second rotary disc is coiled and contracted due to rotation of a first gear; subsequently the second rotary disc is used for driving a ratchet wheelto rotate; the first gear rotates to reduce the areas, facing to each other, of an dielectric plate and an electrode plate face so that the power supply is stopped and the power of the power supply isstored after being transformed into rotation circles when the power supply is connected; after the power supply is stopped, the power is released, subsequently the dielectric plate and the grinding shaft can be conveniently returned, the linkage between structures is improved, the automation degree is relatively high, and relatively high practicability is realized; a convex disc rotates to make sure that the grinding shaft returns to an initial position; the grinding shaft is automatically pushed to return to the initial position; and the offset situation which may occur subsequently is prevented.

The embodiment of the invention provides a display panel comprising a display area and a compensation circuit arranged in the display area. The compensation circuit comprises a threshold detection line extending in the first direction and also comprises a signal line extending in the second direction. The threshold detection line and the signal line include an overlapping part and a non-overlapping part. In the non-overlapping part, the threshold detection line has the first width D1 and the signal line has the second width D2. The distance between the threshold detection line and the signal line is H1 in the direction perpendicular to the display panel. In the overlapping part, the overlapping area between the threshold detection line and the signal line is S1. The distance between the threshold detection line and the signal line is H2 in the direction perpendicular to the display panel, wherein S1/H2<D1*D2/H1 so that the parasitic capacitance between the threshold detection line andthe signal line can be reduced and then the interference can be reduced.

The invention discloses a touch panel and a touch display device. The touch panel comprises a plurality of touch electrode blocks and a plurality of touch wires; wherein each touch electrode block comprises a first conductive layer and a second conductive layer which are stacked, a first insulating layer is arranged between the first conductive layer and the second conductive layer, and the first conductive layer and the second conductive layer of each touch electrode block are electrically connected; each touch wire comprises a first wire layer and a second wire layer which are stacked, a second insulating layer is arranged between the first wire layer and the second wire layer, and the first wire layer and the second wire layer of each touch wire are electrically connected; the first conductive layer and the first wiring layer are arranged on the same layer; the second conductive layer and the second wiring layer are arranged on the same layer, and the first insulating layer and the second insulating layer are arranged on the same layer. According to the technical scheme, stray capacitance between the touch electrode blocks and the touch wires connected with other touch electrode blocks is reduced, and the touch effect of the touch panel is improved.

The invention discloses a thin film transistor. The thin film transistor comprises a gate, a source drain metal layer and a semiconductor layer; the gate is arranged on a transparent substrate; the transparent substrate is also provided with a gate insulating layer for covering the gate; the semiconductor layer is arranged on the gate insulating layer and positioned above the gate; the source drain metal layer is arranged on the semiconductor layer, and comprises a source and a drain; the source and the drain are separated mutually and are in contact with the semiconductor layer; the semiconductor layer has a channel, and the channel is formed between the source and the drain; the gate and the source drain metal layer have an overlapped region in a direction perpendicular to the transparent substrate; and at least one of the gate and the source drain metal layer is provided with a hollow-out structure for reducing the aligned area between the gate and the source drain metal layer. Theinvention also relates to an array substrate and a display apparatus.

The invention discloses a bus fan-belt transmission mechanism which comprises a crankshaft pulley, a crankshaft belt, a central pulley assembly, a fan belt, a fan pulley assembly and a triangular frame assembly. A central pulley of the central pulley assembly is a double-layer pulley. The crankshaft belt surrounds the crankshaft pulley and a layer of the central pulley. The fan belt surrounds the other layer of the central pulley and the fan belt pulley assembly. The triangular frame assembly comprises two inclined beams, a central pulley mounting support and a fan pulley mounting support. The central pulley mounting support is taken as a base edge to form a triangle frame of the triangular frame assembly with the two cant beams. The fan pulley mounting support is mounted in the center of the triangle frame. The fan pulley mounting support and the central pulley mounting support are mounted in the triangular frame assembly, so that assembly accuracy of the fan pulley mounting support and the central pulley mounting support on the triangular frame assembly is improved, and the fan belt can be well matched with two belt grooves. The bus fan-belt transmission mechanism is simple to assemble, and structure stability thereof is improved.

The invention discloses an apparatus for measuring the wetting condition of the surface of a metal in an oil/water double phase flow system, and a method thereof, and belongs to the field of the measurement of the oil/water wetting condition of the surface of the metal. The apparatus comprises a liquid storage tank, a volume flow meter, a circulating pump, a flow velocity adjusting valve, a disc water separator, a sample cell, a test sample, miniature conductivity sensors, and a signal processing and displaying circuit. The apparatus utilizes the miniature conductivity sensors inlayed in the surface of the test sample to measure the conductivity of a liquid film on the surface of the metal nearby probes, and the measurement result can reflect the wetting condition of the surface of the metal nearby the probes because of the substantial difference of the conductivities of oil and water. The signal obtained through measuring by the miniature conductivity sensors is displayed by light emitting diodes to obtain the percentage of the water wetting (or oil wetting) of the surface of the test sample. The apparatus and the method can realize the measurement the wetting condition of the surface of the metal in the oil/water double phase fluid of different components at different flow velocities.

The invention discloses a connecting structure and an electrical connector manufacturing method. The connecting structure comprises at least one conductive terminal, a first material strip and a second material strip. The conductive terminals are each provided with a main body, the lower parts of the main bodies are connected with guiding connecting parts, pre-breaking parts are disposed at the upper ends of the main bodies, and the upper parts of the pre-breaking parts are connected with temporary soldering parts. The first material strip is connected to the guiding connecting parts, and thesecond material strip is welded to the temporary soldering parts. The manufacturing method includes the following steps that step S1, the first material strip is formed and the at least one conductiveterminal of the first material strip is connected, the conductive terminals are provided with the main bodies, the guiding connecting parts connected with the first material strip are disposed on thelower parts of the main bodies, and the pre-breaking parts and the temporary soldering parts are arranged at the upper ends of the main bodies in an extending mode in sequence; step S2, the second material strip is welded to the temporary soldering parts; step S3, the guiding connecting parts are separated from the first material strip; step S4, the second material strip is operated to control the conductive terminals to be mounted on a base; and step S5, the pre-breaking parts are broken, and at the same time, the second material strip and the temporary soldering parts are removed.

The invention discloses a semiconductor structure and a forming method thereof, and the method comprises the steps: providing a substrate which comprises a first region and a second region; forming a low-K dielectric layer on the surface of the substrate; carrying out the etching of the low-K dielectric layers in the first and second regions, forming a plurality of openings at the low-K dielectric layer in the first region, and forming a plurality of grooves at the low-K dielectric layer of the second region; placing metal in the first openings and the grooves, forming two opposite plate electrodes of a plurality of capacitors at the low-K dielectric layer in the first region, and forming a plurality of interconnection structures at the low-K dielectric layer of the second region; removing the low-K dielectric layer between the two opposite plate electrodes in the first region, and forming a second opening between the two opposite plate electrodes; placing a high-K dielectric layer in the second opening, wherein the high-K dielectric layer serves as the dielectric material layer of a capacitor. The method achieves the integrated manufacturing of capacitors and interconnection structures in the low-K dielectric layers, and reduces the area of the capacitors.

The invention discloses an array substrate and provides a display device comprising the array substrate. The array substrate comprises a bottom glass substrate and multiple pairs of source electrodes/drain electrodes, a grating line is arranged on the glass substrate, at least one insulation layer is arranged between the source electrodes/drain electrodes and the grating line, and a very opposite area of the source electrodes/drain electrodes and the grating line decreases gradually along an output near end to an output far end of the grating line. The array substrate and the display device are both excellent in display uniformity.

A thin film transistor is disclosed. A gate electrode, gate insulating layer, an active layer and source and drain electrodes are sequentially formed on a substrate, the source electrode is connectedto a first end of the active layer, the drain electrode is connected to a second end of the active layer, The source electrode and the drain electrode respectively include a first region overlapping with the gate electrode and a second region located outside the first region, wherein at least the first region of the source electrode and the drain electrode is formed with a hollow pattern to reducean area directly opposite the source electrode and the drain electrode to the gate electrode. An array substrate and a display device including a thin film transistor as described above are also disclosed. The thin film transistor provided above can reduce the area of the source/drain electrode facing the gate electrode, reduce the parasitic capacitance, and improve the performance of the device.

The invention discloses an RF overlap impedance measuring device and a manufacturing and measuring method thereof. The device comprises a cylinder, a top plate and a base plate; an inner cavity is formed among the cylinder, top plate and base plate; the cylinder comprises a conductive casing and a non-conductive cover plate cooperated with the casing; two test interfaces are symmetrically arrangedin the side part, opposite to each other, of the casing symmetrically, one end of each interface is positioned in the inner cavity, and the other end of the interface penetrates out of the casing andis then connected with test equipment; one end of a measuring chuck is positioned in the inner cavity, and the other end of the clamping chuck penetrates the cover plate and is then connected with atested overlap system; a measuring circuit accommodated in the inner cavity comprises a matching resistor and a disconnecting resistor; one end of each of two matching resistor is connected to the casing, and the other end of the matching resistor is connected with the corresponding test interface; and one end of each disconnecting resistor is connected with the corresponding test interface, and the other end of the disconnecting resistor is connected to one end of the measuring chuck. Thus, the technical problems that a present impedance measuring manner cannot realize impedance sweep measurement, is not suitable for measuring the overlap RF impedance of a practical system, and has high requirements for instruments are solved.

The invention relates to the technical field of medical instruments, and discloses a cardiology department nursing heart pace-making monitoring device, which comprises a shell, outer membranes are fixedly connected to the upper end and the lower end of the shell, tripods are fixedly connected to the inner walls of the upper side and the lower side of the shell, and inner membranes are fixedly connected to the middles of the tripods; and a movable block is fixedly connected to the side, close to the center of the shell, of the inner film. According to the cardiology department nursing heart pace-making monitoring device, when the blood pressure in the atrium rises, the outer membrane is compressed and amplified through the inner membrane to change the position of the movable block to enable the pressurizing block to move, the first plug bodies get away from each other to increase the discharging frequency of the capacitor plate, and meanwhile the second plug bodies move to increase the intensity of pulse current to prevent excessive hydrops in the atrium; adn then current generated autonomously through sinus node and pulse current of the pacemaker enter the upper side electromagnet and the lower side electromagnet respectively; therefore, the second contact is disconnected when the magnetic field is balanced, the pacemaker stops working and the phenomenon of pacing dependence of a patient is prevented.

The invention discloses a laminated inductor. The laminated inductor comprises a laminating body, wherein at least the printing conducting slurry on the uppermost insulator layer in the three uppermost insulator layers of the laminating body forms n upper plane electrodes; the upper plane electrodes are alternatively arranged; insulating separating sheets are arranged at the cross positions; at least the printing conducting slurry on the lowermost insulator layer in the three lowermost insulator layers of the laminating body forms (n-1) lower plane electrodes; the lower plane electrodes are alternatively arranged; insulating separating sheets are arranged at the cross positions; 2(n-1) through holes are respectively formed in the two ends, corresponding to the lower plane electrodes, of the insulator layers except for the insulator layers with the plane electrodes; after conducting slurry laminates are coated, 2(n-1) through hole electrodes are formed; and a coil electrode is formed by connecting the upper plane electrodes, the through hole electrodes and the lower plane electrodes. The laminated inductor has relatively high Q value under each frequency, and the Q value is relatively convenient to increase and improve.