Semiconductor device

The display device employs specific transistor configurations with overlapping gate electrodes and controlled channel lengths to address threshold voltage fluctuations, enhancing mobility and reducing power consumption for improved performance.

JP2024174993AActive Publication Date: 2024-12-17SEMICON ENERGY LAB CO LTD
View PDF 9 Cites 0 Cited by

Patent Information

Application Number
JP2024157468
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2013-06-05
Filing Date
2024-09-11
Publication Date
2024-12-17
Estimated Expiration
2034-05-28

AI Technical Summary

Technical Problem

Display devices using oxide semiconductors face issues with fluctuations in threshold voltage of driving transistors, which affect brightness and image quality, and require high field-effect mobility for high-speed driving while maintaining low power consumption.

Method used

The configuration of a display device with specific dimensions and gate electrode structures for transistors, including a channel length of 0.5 μm to 4.5 μm and overlapping gate electrodes, enhances field-effect mobility and reduces threshold voltage fluctuations, achieving high on-current and low off-state current.

Benefits of technology

This configuration results in a display device with stable brightness, improved image quality, high-speed operation, and reduced power consumption by minimizing threshold voltage fluctuations and optimizing transistor performance.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2024174993000001_ABST
    Figure 2024174993000001_ABST
Patent Text Reader

Abstract

To provide a display device in which an influence due to a fluctuation of a threshold value voltage of a transistor containing an oxide semiconductor film, has a high reliability, has a good display characteristic, and reaches a low-power consumption.SOLUTION: In a pixel 601 containing a selection transistor 400b, a driving transistor 400a, and a light emission element 350, a channel is formed onto an oxide semiconductor film as the driving transistor, and the length of the channel is 0.5 μm or more and is 4.5 μm or less, preferably is larger than 1 μm is 4 μm or less, and is preferably larger than 1 μm, and is 3.5 μm or less, and is preferably larger 1 μm and is 2.5 μm or less. On the oxide semiconductor film, first and second gate electrodes that are overlapped to upper and lower layers of the oxide semiconductor film respectively are included, and a transistor to which gate electrode is electrically connected is adopted. Also, the length of the channel of the selection transistor in which a magnetic field effect movement level is not required as compared with the driving transistor becomes larger than that of at least the driving transistor.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to a display device and a manufacturing method thereof. The present invention relates to a display device including a transistor having an oxide semiconductor film and a manufacturing method thereof. do. [Background technology]

[0002] Organic electroluminescence (EL Display devices using light-emitting elements such as LEDs have high visibility and are ideal for making them thinner. There is no restriction on the viewing angle, so it can be used with CRT (cathode ray tube) and LCD displays. Active matrix type LCDs using light-emitting elements are attracting attention as a display device that can replace conventional LCDs. A display device usually comprises at least a light emitting element and a transistor that controls the input of a video signal to the pixel. (switching (selection) transistor) and controls the current value supplied to the light emitting element. A transistor (drive transistor) that controls the pixel voltage is provided in each pixel.

[0003] The transistors used in display devices are made of amorphous silicon formed on a glass substrate. The semiconductor device is made of silicon semiconductor such as single crystal silicon or polycrystalline silicon.

[0004] In recent years, metal oxides (oxide semiconductors) that have semiconductor properties have been used instead of silicon semiconductors. For example, oxide semiconductors such as A transistor using zinc or In-Ga-Zn oxide is fabricated, and the transistor is The technology for use in switching transistors for display device pixels has been disclosed (Patent (See Reference 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A Summary of the Invention [Problem to be solved by the invention]

[0006] In a display device including a light-emitting element, a drain current of a driving transistor is supplied to the light-emitting element. Therefore, when the driving transistor deteriorates and the threshold voltage varies, the brightness of the light emitting element decreases. Therefore, it is important to suppress the variation in the threshold voltage of the driving transistor. This is an important issue in improving the image quality of display devices.

[0007] In order to drive a display device at high speed, a driving transistor having a field effect mobility of 100 nm is used. It is desirable to use high-performance transistors.

[0008] On the other hand, in order to reduce the power consumption of a display device, the threshold voltage of the selection transistor is By applying a transistor with positive electrical characteristics (also called normally-off characteristics), Alternatively, as a selection transistor, the drain current (Id)-gate voltage In the (Vg) characteristic curve, the drain current (cutoff current ( It is desirable to apply transistors with reduced values ​​of Icut).

[0009] In view of the above problems, one embodiment of the present invention is to provide a method for preventing a change in threshold voltage of a transistor. Another object of the present invention is to provide a display device in which a signal is reduced. An object of the present invention is to provide a highly reliable display device.

[0010] Another object of one embodiment of the present invention is to provide a display device having good display characteristics. Let us assume that.

[0011] Another object of one embodiment of the present invention is to provide a display device which achieves low power consumption. Let us assume that.

[0012] The description of these problems does not preclude the existence of other problems. It is not necessary to solve all of these problems. Problems other than those mentioned above are not necessarily solved. It will become clear from the description of the specification, etc., and problems other than those mentioned above will not be identified from the description of the specification, etc. It is possible to extract [Means for solving the problem]

[0013] In a pixel including a selection transistor, a drive transistor, and a light emitting element, As a stator, a channel is formed in the oxide semiconductor film, and the channel length is 0.5 μm or more. 0.5 μm or less, preferably greater than 1 μm and less than 4 μm, more preferably greater than 1 μm A transistor having a size of less than 3.5 μm, preferably greater than 1 μm and less than 2.5 μm. In addition, the driving transistor includes an oxide semiconductor film having an upper layer and a lower layer, The first gate electrode and the second gate electrode are overlapped, and the gate electrodes are electrically connected to each other. This improves the field effect mobility and on-state current of the driving transistor. This allows for improved current flow and allows for good display even at high drive frequencies. In addition, the field effect mobility of the driving transistor is not required to be as high as that of the driving transistor. The channel length of the selection transistor of the pixel is set to at least be longer than the channel length of the drive transistor. By increasing the aperture ratio, it is possible to achieve low power consumption while increasing the pixel aperture ratio. do.

[0014] More specifically, for example, the following configuration can be adopted.

[0015] One embodiment of the present invention is a light-emitting element and a first transistor that functions as a driving transistor of the light-emitting element. The transistor is electrically connected to the first transistor and functions as a selection transistor. and a second transistor, the first transistor being a first transistor on an insulating surface. A gate electrode, a first insulating film on the first gate electrode, and a first gate electrode via the first insulating film. a first oxide semiconductor film overlapping the first electrode and electrically connected to the first oxide semiconductor film; a pair of electrodes having ends on the first oxide semiconductor film and a second insulating film on the first oxide semiconductor film; a first gate electrode and a second insulating film provided on the first oxide semiconductor film, the first gate electrode and the second insulating film being interposed therebetween; and a second gate electrode overlapping the second gate electrode, the second gate electrode being a second a second transistor having a region facing a side surface of the first oxide semiconductor film with the insulating film interposed therebetween; The capacitor includes a third gate electrode on the insulating surface, a first insulating film on the third gate electrode, and a first a second oxide semiconductor film overlapping with the third gate electrode via an insulating film; a pair of electrodes electrically connected to the second oxide semiconductor film and having ends on the first oxide semiconductor film; The distance between the pair of electrodes of the first transistor is 0.5 μm or more and 4.5 μm or less, and the second The distance between the pair of electrodes of the first transistor is wider than the distance between the pair of electrodes of the second transistor. The display device is characterized in that

[0016] Another embodiment of the present invention is a light-emitting element and a transistor that functions as a driving transistor of the light-emitting element. The first transistor is electrically connected to the second transistor and functions as a selection transistor. and a second transistor functioning as a first transistor on an insulating surface. A first gate electrode, a first insulating film on the first gate electrode, and a first a first oxide semiconductor film overlapping with the gate electrode; a pair of electrodes having edges on a first oxide semiconductor film; a first gate insulating film and a second insulating film are provided on the first oxide semiconductor film, and a second gate electrode overlapping the electrode, the second gate electrode being a second insulating film disposed between the first oxide semiconductor film and the second oxide semiconductor film; The transistor includes a third gate electrode on the insulating surface, a first insulating film on the third gate electrode, and a second oxide semiconductor film overlapping the third gate electrode via the first insulating film; a pair of electrodes electrically connected to the second oxide semiconductor film and having ends on the second oxide semiconductor film; the distance between the pair of electrodes of the first transistor is not less than 0.5 μm and not more than 4.5 μm; The distance between the pair of electrodes of the second transistor is greater than the distance between the pair of electrodes of the first transistor. The cut-off current of the second transistor is wider than that of the first transistor. The display device is characterized in that the off-state current is smaller than the off-state current.

[0017] In the display device, the second transistor is connected to a second insulating film. a fourth gate electrode provided over the oxide semiconductor film and overlapping with the third gate electrode; The first gate electrode and the fourth gate electrode may have a region in contact with each other.

[0018] In the above display device, the first gate electrode and the second gate electrode are in contact with each other. It is preferable that the region has a

[0019] In the display device, at least one of the first insulating film and the second insulating film is a chemical It is preferable to have an oxide insulating film containing more oxygen than the stoichiometric composition. . Effect of the Invention

[0020] According to one embodiment of the present invention, the threshold voltage of a transistor including an oxide semiconductor film can be controlled by the following method. It is therefore possible to provide a display device in which the influence of the above factors is reduced.

[0021] According to one embodiment of the present invention, a highly reliable display device can be provided.

[0022] According to one embodiment of the present invention, a display device having good display characteristics can be provided. Cut.

[0023] According to one embodiment of the present invention, a display device which achieves low power consumption can be provided. Cut. [Brief description of the drawings]

[0024] [Figure 1] 1A and 1B are a conceptual diagram illustrating one embodiment of a display device and a circuit diagram illustrating one embodiment of a pixel. [Diagram 2] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a display device. [Diagram 3] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 4] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Diagram 5] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 6] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 7] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a display device. [Figure 8] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a display device. [Figure 9] 1A to 1C are a plan view, a cross-sectional view, and a circuit diagram illustrating one embodiment of a display device. [Figure 10] A diagram showing the circuit symbol and the configuration of a transistor. [Figure 11] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a display device. [Figure 12] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a display device. [Figure 13] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 14] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 15] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 16] FIG. 1 is a plan view illustrating one embodiment of a pixel configuration of a display device. [Figure 17] FIG. 1 is a cross-sectional view illustrating one embodiment of a pixel configuration of a display device. [Figure 18] FIG. 1 is a cross-sectional view illustrating one embodiment of a pixel configuration of a display device. [Figure 19] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 20] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a display device. [Figure 21] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 22] 1A and 1B are diagrams illustrating band structures of transistors. [Diagram 23] FIG. 1 is a circuit diagram illustrating one embodiment of a pixel configuration of a display device. [Figure 24] 1A and 1B are a top view and a cross-sectional view illustrating a display device. [Diagram 25] 1A to 1C are diagrams illustrating examples of electronic devices. [Figure 26] 4 shows the Vg-Id characteristics of a transistor according to an embodiment. [Figure 27] 4 shows the Vg-Id characteristics of a transistor according to an embodiment. [Figure 28]4 shows the Vg-Id characteristics of a transistor according to an embodiment. [Figure 29] 13A to 13C are diagrams illustrating a structure of a transistor used in calculation and the calculated field-effect mobility and on-state current. [Diagram 30] FIG. 13 illustrates a model of a transistor used in calculation. [Diagram 31] FIG. 13 is a graph for explaining the channel length dependence of saturation mobility obtained by calculation. [Diagram 32] FIG. 13 is a graph for explaining the channel length dependence of on-current obtained by calculation. [Diagram 33] 13A to 13C are graphs showing calculated Vg-Id characteristics of a transistor and current distribution in an oxide semiconductor film. [Diagram 34] 13A and 13B are diagrams illustrating the Vg-Id characteristics of a transistor and current distribution in a silicon film obtained by calculation. [Diagram 35] 13A and 13B are diagrams illustrating the channel length dependence of electron traps used in the calculation and the saturation mobility obtained by the calculation. [Diagram 36] 1A to 1C are diagrams illustrating carrier flow in an off state and an on state of a transistor. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications and details may be made to the present invention. The present invention should not be construed as being limited to the description of the following embodiment modes and examples. In the following embodiments and examples, the same parts or parts having similar functions are The same reference numerals or hatch patterns are used in different drawings for parts, and the repetition The explanation of the return is omitted.

[0026] In each figure described in this specification, the size, thickness, or area of ​​each component is not clearly indicated. may be exaggerated for clarity and are not necessarily limited to scale .

[0027] In addition, ordinal numbers such as 1st, 2nd, etc., used in this specification are used to avoid confusion of components. Therefore, for example, "the first" can be changed to "the second This can be explained by replacing it with "the" or "the third" etc. as appropriate.

[0028] The function of the "source" and "drain" is to change the direction of the current during circuit operation. For this reason, in this specification and other documents, the terms "source" and "drive" are used interchangeably. The terms "rain" and "rainfall" may be used interchangeably.

[0029] Voltage refers to the potential difference between two points, and potential refers to the electrostatic potential at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a field. However, in general, the potential at a certain point is the potential relative to a reference potential (for example, ground potential). The difference is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. However, voltage may be read as potential.

[0030] In this specification, when an etching process is performed after a photolithography process, The mask formed in the photolithography process is removed.

[0031] (Embodiment 1) In this embodiment, a display device according to one embodiment of the present invention and a manufacturing method thereof will be described with reference to the drawings. and explain.

[0032] <Example of display device configuration> FIG. 1A is a block diagram of an example of a display device. The display device shown in FIG. The element portion 600, the scanning line driving circuit 604, and the signal line driving circuit 606 are parallel or substantially parallel to each other. m scanning lines 607 arranged in rows and whose potentials are controlled by a scanning line driving circuit 604 The signal line driver circuit 606 controls the potential of each of the electrodes. The pixel section 600 has n signal lines 609 arranged in a matrix. The liquid crystal display device includes a plurality of pixels 601. The liquid crystal display device also includes a scanning line driver circuit 604 and a signal line driver circuit 606. In some cases, it is referred to as the drive circuit section.

[0033] Each scanning line 607 corresponds to one of the pixels 601 arranged in m rows and n columns in the pixel section 600. The signal lines 609 are electrically connected to the n pixels 601 arranged in any row. is m pixels 60 arranged in any one of the columns of the pixels 601 arranged in m rows and n columns. 1. Both m and n are integers of 1 or more. Among the pixels 601 arranged in m rows and n columns, n pixels 601 arranged in any row The capacitance lines 615 are electrically connected to the signal lines 609 in parallel or In the case where the pixels are arranged substantially parallel to each other, any one of the pixels 601 arranged in m rows and n columns The pixel 601 is electrically connected to m pixels 601 arranged in the pixel area 601 .

[0034] <Pixel configuration example> FIG. 1B shows a circuit configuration that can be used for the pixel 601 of the display device shown in FIG. An example of this is shown below.

[0035] The pixel 601 shown in FIG. 1B includes a transistor 400 functioning as a selection transistor. b, a transistor 400a functioning as a driving transistor, a capacitance element 370, and and a photo element 350.

[0036] One of the source electrode and the drain electrode of the transistor 400a is connected to one of the light emitting elements 350. the other of the source and drain electrodes of the transistor 400a. The transistor is electrically connected to an anode line (not shown) to which a high power supply potential is applied. The transistor 400a has a pair of gate electrodes that overlap with a semiconductor film sandwiched therebetween. One of the gate electrodes of the transistor 400a is connected to the other gate electrode of the transistor 400a. , one of the source electrode and the drain electrode of the transistor 400b and one of the capacitors 370 The gate electrode of the transistor 400b is electrically connected to the scan line 607. The other of the source electrode and the drain electrode of the transistor 400b is electrically connected to a signal The other electrode of the capacitor 370 is electrically connected to a capacitor line 615. The other electrode of the light emitting element 350 is electrically connected to a cathode line to which a low power supply potential is applied. (not shown).

[0037] The transistor 400a is turned on or off to provide the light emitting element 350 with a It has the function of controlling the flow of current.

[0038] The transistor 400a, which functions as a driving transistor, provides a sufficient brightness for the light-emitting element 350. In order to obtain high accuracy, it is necessary to use transistors with high on-state current. In order to improve the drive frequency of the device and realize smoother video display, the field effect mobility Therefore, it is necessary to apply transistors with high resistance.

[0039] Therefore, in the display device of the present embodiment, the transistor 400a is a channel The length is 0.5 μm or more and 4.5 μm or less, preferably 1 μm or more and 4 μm or less, and more preferably or more than 1 μm and not more than 3.5 μm, more preferably more than 1 μm and not more than 2.5 μm. The on-state current of a transistor is a function of the channel width. Since the channel length ratio (L / W ratio) is smaller, the channel length of the transistor 400a By reducing the above range, the on-current can be improved. By reducing the channel length to the above range and also reducing the channel width, the on-current can be kept constant. This allows the transistor size to be reduced while maintaining the same quality, improving the aperture ratio of pixels. can be done.

[0040] The transistor 400a includes an oxide semiconductor film in which a channel is formed and an oxide semiconductor The transistor has a first gate electrode and a second gate electrode that overlap each other with a body membrane sandwiched therebetween. The first gate electrode and the second gate electrode included in the transistor 400a are electrically connected to each other. In this manner, a pair of gate electrodes is provided with an oxide semiconductor film interposed therebetween. By electrically connecting the gate electrodes, a constant potential is applied to only one of the pair of gate electrodes. Unlike the conventional method, the same potential is applied to a pair of gate electrodes, so the channel formation region is increased. Therefore, the drain current of the transistor 400a can be increased. The size of transistor 400a can be kept small while suppressing the drop in current.

[0041] Further, in order to connect the first gate electrode and the second gate electrode, A second gate electrode is provided so as to overlap at least one of the side surfaces in the channel width direction. As a result, an electric field is applied to the side surface of the oxide semiconductor film in the channel width direction. Therefore, the area through which the current flows can be expanded. The field effect mobility can be improved.

[0042] In addition, by providing a pair of gate electrodes electrically connected to each other, a depletion layer is formed in the oxide semiconductor film. This makes it easier for the subthreshold characteristics of the transistor 400a to be improved. can be done.

[0043] In addition, by shortening the channel length, the threshold voltage of the transistor shifts in the negative direction. However, in the transistor 400a, in addition to the first gate electrode, By providing a second gate electrode (backgate electrode) on the back channel region side, This prevents negative charge from being generated in the gate channel region, lowering the threshold voltage of the transistor. This can suppress the shift in the negative direction.

[0044] The transistor 400b is turned on or off to write a data signal. It has the function of controlling congestion.

[0045] The transistor 400b has electrical characteristics in which the threshold voltage is positive (normally-on It is preferable to use a transistor having a cutoff characteristic. It is preferable to apply transistors with reduced current.

[0046] As mentioned above, a high on-state current can be obtained by shortening the channel length of a transistor. On the other hand, the threshold voltage of the transistor shifts in the negative direction (negative shift). In the display device of this embodiment, a high on-current and a high field effect mobility are required. The channel length of the transistor 400a, which functions as a driving transistor, is set to 0.5 μm or less. By providing a pair of electrically connected gate electrodes, The current and field effect mobility are improved while the negative shift of the threshold voltage is suppressed.

[0047] On the other hand, the transistor 400b, which functions as a selection transistor, is Since the field effect mobility of the transistor 400a is not required to be as high as that of the transistor 400b, the channel length of the transistor 400a is set to be the same as that of the transistor 400b. By making the channel length larger, the threshold voltage of transistor 400b is shifted negatively. This makes it possible to achieve high-speed operation and low power consumption of the display device. become.

[0048] For example, when the channel length of the transistor 400a is set to 0.5 μm or more and 4.5 μm or less, In this case, the channel length of the transistor 400b can be 6 μm. The channel length of transistor 400b is at least as long as the channel length of transistor 400a. The larger the value, the better, and the larger the value, the better, and the larger the value, the better, and the better, ...

[0049] The cutoff current of the transistor 400b is For example, the channel width of the transistor 400b is The channel length ratio (L / W ratio) of the transistor 400a is set to be larger than that of the transistor 400b. By this, the value of the cutoff current of the transistor 400b is set to the value of the cutoff current of the transistor 400a. The cut-off current can be made smaller than the value of the transistor 400a. If the channel widths of transistors 400b and 400c are the same, the channel length of transistor 400b is By making the channel length of the transistor 400b larger than that of the transistor 400a, the cutoff voltage It is possible to reduce the value of the flow.

[0050] The transistor 400b is electrically connected in the same manner as the transistor 400a. However, the transistor 400b may have the above-described structure. When the transistor is constructed as a single gate electrode, a region is required to connect the pair of gate electrodes. The area of ​​the transistor 400b becomes large, and the aperture ratio of the pixel decreases. The transistor 400b is preferably of a single gate structure. The parasitic capacitance of the gate wiring of the transistor 400b affects the operating speed of the display device. Therefore, the transistor 400b is a single gate transistor having a small parasitic capacitance of the gate wiring. The base structure is preferred.

[0051] The light-emitting element 350 may be, for example, an organic electroluminescence element (organic EL element). Alternatively, an inorganic EL element can be used.

[0052] <Transistor circuit symbol> Here, a pair of gate electrodes overlapping each other with an oxide semiconductor film sandwiched therebetween is used in this specification. The circuit symbol of a transistor having the above-mentioned structure is shown in FIG. In the circuit symbols, a pair of gate electrodes are indicated by FG ​​and BG, the source electrode is indicated by S, and the drain electrode is indicated by D. As shown in Fig.

[0053] FIG. 10B2 shows a transistor 400 that can be represented by the circuit symbol in FIG. 10B1. 10B2 shows an example of a cross-sectional view of a transistor 400a. A pair of electrodes 20a and 20b functioning as a gate electrode or a drain electrode are disposed on the oxide semiconductor film 1. 7a, it partially overlaps with the gate electrode 31. In the symbol, a pair of gate electrodes are indicated by FG ​​and BG, similarly to the circuit symbol shown in FIG. The source electrode is indicated by S and the drain electrode is indicated by D.

[0054] The transistor 400a shown in FIG. 10B2 has a pair of electrodes in the channel length direction. The distance Wsd between the ends of 20a and 20b is shorter than the distance Wbg between the ends of the gate electrode 31. In a cross-sectional view in the channel length direction, a pair of ends of the gate electrode 31 are The electrodes 20a and 20b overlap each other.

[0055] FIG. 10(C2) shows a transistor 400 that can be represented by the circuit symbol of FIG. 10(C1). 10C2 shows an example of a cross-sectional view of a transistor 400a having a source A pair of electrodes 20a and 20b functioning as a gate electrode or a drain electrode are disposed on the oxide semiconductor film 1. 7a, it does not overlap with the gate electrode 31. In the circuit symbol shown in FIG. As in the circuit symbol shown in FIG. 10(A), a pair of gate electrodes are indicated by FG ​​and BG, and a source The electrode is indicated by S and the drain electrode by D.

[0056] The transistor 400a shown in FIG. 10C2 has a pair of electrodes in the channel length direction. The distance Wsd between 20a and 20b is longer than the distance Wbg between the ends of the gate electrode 31. In the cross-sectional view in the channel length direction, a pair of ends of the gate electrode 31 are Does not overlap with 20a and 20b.

[0057] In the drawings attached to this specification, the circuit symbol shown in FIG. 10(A) corresponds to the circuit symbol shown in FIG. 10(B1). A transistor 400a having a structure represented by the circuit symbol and a transistor 400b having a structure represented by the circuit symbol in FIG. The transistor 400a has a structure similar to that of the transistor 400 shown in FIG.

[0058] <Example of the configuration of a transistor included in a pixel> Next, a specific structure of a transistor included in a pixel of a display device will be described.

[0059] 2A1 to 2C2 show a transistor 40 included in a pixel 601 of a display device. 2A shows a top view and a cross-sectional view of a driving transistor 400a and a transistor 400b. FIG. 2A is a top view of a transistor 400a that functions as a selection transistor. FIG. 2B is a top view of a transistor 400b functioning as a transistor. 2(A1) and FIG. 2(A2) are cross-sectional views taken along dashed lines A1-B1 and A2-B2, respectively. FIG. 2(C1) is a cross-sectional view taken along dashed line C1-D1 in FIG. 2(A1). C2) is a cross-sectional view taken along the dashed line C2-D2 in FIG. 2(A2). For clarity, the substrate 11 and the insulating film 15 are omitted in FIG. 2(A2).

[0060] The transistor 400a shown in FIG. 2A, FIG. 2B, and FIG. 2C has a channel The transistor is an etched type transistor, and includes a gate electrode 13a provided on a substrate 11 and a and an insulating film 15 formed on the gate electrode 13a, and a gate electrode 1 An oxide semiconductor film 17a overlapping with the oxide semiconductor film 3a, and a pair of electrodes 20a in contact with the oxide semiconductor film 17a. The insulating film 15, the oxide semiconductor film 17a, and the pair of electrodes 20a 20b, an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27 are formed on the The gate electrode 31 is formed on the insulating film 28. The gate electrode 13a is formed in the openings 42 and 43 provided in the insulating film 15 and the insulating film 28. In addition, one of the pair of electrodes 20a and 20b, in this case the electrode 20b, is connected to An electrode 32 is formed on the nitride insulating film 27. The electrode 32 functions as a pixel electrode. .

[0061] The transistor 400b shown in FIG. 2B and FIG. 2C2 is a channel-etched transistor. A gate electrode 13b is provided on the substrate 11, and the substrate 11 and the gate electrode An insulating film 15 is formed on the gate electrode 13b, and an oxide film overlapping the gate electrode 13b through the insulating film 15 is formed on the gate electrode 13b. The semiconductor device further includes a pair of electrodes 20c and 20d in contact with the oxide semiconductor film 17b. In addition, on the insulating film 15, the oxide semiconductor film 17b, and the pair of electrodes 20c and 20d, An insulating film 28 including an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27; , has.

[0062] In the transistor 400a and the transistor 400b, the insulating film 15 serves as a gate insulating film. In the transistor 400a, it functions as a first gate insulating film. The film 28 functions as a second gate insulating film for the transistor 400a and the transistor 40 In the case of 0b, it functions as a protective insulating film.

[0063] The transistor 400a described in this embodiment has a channel length of 0.5 μm to 4.5 μm. ≦1 μm, preferably ≦4 μm, more preferably ≦1 μm, μm or less, and more preferably, greater than 1 μm and less than 2.5 μm. The insulating layer 400a is disposed between the gate electrode 13a and the gate electrode 31 in the channel width direction. An oxide semiconductor film 17a is provided via an insulating film 15 and an insulating film 28. As shown in FIG. 2(A1), the electrode 31 is formed of an oxide semiconductor via an insulating film 28 when viewed from above. It overlaps with the edge of film 17a.

[0064] The oxide semiconductor film 17a included in the transistor 400a has a side surface in the channel length direction of The pair of electrodes 20a and 20b overlap, and the side surface in the channel width direction overlaps with the gate electrode 31. The end portion of the oxide semiconductor film 17a is processed into an island shape. During the etching process for the purpose of etching, chlorine radicals are generated from the etching gas when exposed to plasma. Therefore, oxygen, fluorine radicals, etc. easily bond with the metal elements that make up the oxide semiconductor. At the end of the compound semiconductor film 17a, the oxygen bonded to the metal element is easily released. In particular, the oxide semiconductor film 17 may be easily converted to an n-type film due to the formation of oxygen vacancies. When the region surrounded by the dashed lines 33 and 34 at the end of a becomes n-type, Therefore, leakage current is likely to flow between the pair of electrodes 20a and 20b. In the case of the gate electrode 31, the above-mentioned region overlaps with the gate electrode 31 (gate By controlling the potential of the gate electrode 13a having the same potential as the electrode 31, The electric field applied can be controlled. Therefore, the end portion of the oxide semiconductor film 17a becomes n-type. Even if the pair of electrodes 20a and 20b are connected to each other, the leakage current that may flow between the pair of electrodes 20a and 20b is The potential can be controlled by applying a potential to the electrode.

[0065] Specifically, a potential that makes the transistor 400a non-conductive is applied to the pair of gate electrodes. When the oxide semiconductor film 17a is heated, the oxide semiconductor film 17a is heated through the end portion surrounded by the dashed line 33 and the dashed line 34. The off-current flowing between the pair of electrodes 20a and 20b can be suppressed to a small value. In the transistor 400a, the channel length is shortened in order to obtain a large on-current. Even if the distance between the pair of electrodes 20a and 20b at the end of the oxide semiconductor film 17a becomes short, In other words, the transistor 400a is turned on when In the conductive state, a large on-current can be obtained, and in the non-conductive state, the off-current can be This is a transistor that can be made small.

[0066] The channel length of the transistor 400b in this embodiment is This makes the channel length of the transistor 40, which has a single gate structure, larger than that of the transistor 40. Suppresses the negative shift of the 0b threshold voltage and keeps the cutoff current small. It is possible.

[0067] The insulating film 15 and the insulating film 28 have a plurality of openings. As shown in FIG. 2( As shown in FIG. 1C1, the oxide semiconductor film 17a is sandwiched between the openings 42 in the channel width direction. , 43. That is, the oxide semiconductor film 17a has openings 42, 43 on the outer side of the side surface thereof. In the opening 41, one of the pair of electrodes 20a and 20b, here the electrode 20b and the electrode 3 2 are connected to the gate electrode 13a and the gate electrode 31 in the openings 42 and 43. That is, in the channel width direction, the gate electrode 13a and the gate electrode 31 are connected as follows: The opening 42 surrounds the oxide semiconductor film 17a via the insulating film 15 and the insulating film 28. , 43, the gate electrode 31 faces the side surface of the oxide semiconductor film 17a.

[0068] As shown in FIG. 2C1, the oxide semiconductor film 17a The distance d between the side surface and the gate electrode 31 at the openings 42 and 43 is determined by the thickness t1 of the insulating film 15. The thickness of the insulating film 28 is set to 1 to 7.5 times the total thickness of the insulating film 28. The distance d between the side surface of the film 17a and the gate electrode 31 in the openings 42 and 43 is When the thickness is equal to or greater than the sum of the thickness t1 and the thickness t2 of the insulating film 28, the potential of FIG. As shown by force lines 444, the electric field of the gate electrode 31 is applied to the side and the side of the oxide semiconductor film 17a. Since the side surface and the end portion including the vicinity thereof are affected, the side surface or the end portion of the oxide semiconductor film 17a is On the other hand, the occurrence of a parasitic channel on the oxide semiconductor film 17a side can be suppressed. The distance d between the surface and the gate electrode 31 at the openings 42 and 43 is equal to the thickness t1 of the insulating film 15. When the thickness of the insulating film 28 is 7.5 times or less than the total thickness, the area of ​​the transistor is reduced. It can be made smaller.

[0069] The oxide semiconductor film 17a included in the transistor 400a and the oxide semiconductor film 17b included in the transistor 400b The oxide semiconductor film 17b can be formed in the same manufacturing process. The semiconductor film 17a and the oxide semiconductor film 17b are made of a metal oxide material containing at least In or Zn. The oxides are typically In-Ga oxide, In-Zn oxide, and In-M-Zn oxide. It is formed from gallium arsenide (where M is Al, Ga, Y, Zr, La, Ce, or Nd).

[0070] The oxide semiconductor film 17a and the oxide semiconductor film 17b are made of In-M-Zn oxide. In, the atomic ratio of In and M, excluding Zn and O, is 25 atomic% In. or more, M is less than 75 atomic %, and more preferably In is 34 atomic % or more; M is less than 66 atomic%.

[0071] The oxide semiconductor film 17a and the oxide semiconductor film 17b have an energy gap of 2 eV or more. , preferably 2.5 eV or more, more preferably 3 eV or more. By using an oxide semiconductor with a wide gap, the transistor 400a and the transistor The off current of 400b can be reduced.

[0072] The oxide semiconductor film 17a and the oxide semiconductor film 17b each have a thickness of 3 nm or more and 200 nm or less. Preferably, the thickness is 3 nm or more and 100 nm or less, and more preferably, 3 nm or more and 50 nm or less. do.

[0073] The oxide semiconductor film 17a and the oxide semiconductor film 17b are made of In-M-Zn oxide (M is Al, In the case of Ga, Y, Zr, La, Ce, or Nd, the In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used for this purpose satisfies In≧M and Zn≧M. It is preferable that the atomic ratio of the metal elements in such a sputtering target is , In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3 Note that the ratio of the oxide semiconductor film 17a to the oxide semiconductor film 17b is preferably 1:2. The atomic ratio of each metal element contained in the sputtering target is included as an error. This includes a variation of ±40% in the atomic ratio.

[0074] The oxide semiconductor film 17a and the oxide semiconductor film 17b are formed of an oxide semiconductor material having a low carrier density. For example, the oxide semiconductor film 17a and the oxide semiconductor film 17b are formed of a carrier The density is 1×10 17 pieces / cm 3 Less than or equal to 1×10 15 pieces / cm 3 Further details are below. Preferably 1 x 10 13 pieces / cm 3 Less than or equal to 1×10 11 pieces / cm 3 below An oxide semiconductor film is used.

[0075] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. An oxide semiconductor film having an appropriate composition can be used depending on the characteristics of the oxide semiconductor film (e.g., the performance mobility, the threshold voltage, etc.). In order to obtain required semiconductor characteristics of the transistor, the oxide semiconductor film 17 The carrier density, impurity concentration, defect density, and metal element and oxygen concentration of the oxide semiconductor film 17a and the oxide semiconductor film 17b are It is preferable to make the atomic ratio, interatomic distance, density, etc. appropriate.

[0076] Note that the oxide semiconductor films 17a and 17b have low impurity concentrations and By using an oxide semiconductor film with a low density of defect states, a transistor having better electrical characteristics can be obtained. Impurities include hydrogen, nitrogen, and alkali metals. In this specification, the term "metallic or alkaline earth metal" refers to a material having a low impurity concentration and a defect level. A material with a low oxygen density (few oxygen vacancies) is called high-purity intrinsic or substantially high-purity intrinsic. A highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor has a small carrier generation source. Therefore, the carrier density can be reduced. The transistor in which this is formed has electrical characteristics in which the threshold voltage is positive (normally-off characteristics). In addition, oxides that are pure or substantially pure are prone to becoming oxidized. Since the semiconductor film has a low defect state density, the trap state density may also be low. A transistor using a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film is The drain current is extremely small, and the voltage between the source and drain electrodes (drain voltage) is 1V to In the range of 10 V, the off-state current is below the measurement limit of the semiconductor parameter analyzer, that is, Wachi 1×10 -13 Therefore, the oxide semiconductor film A transistor having a channel region formed in a semiconductor substrate has small fluctuations in electrical characteristics and is highly reliable. Note that it takes a long time for charges trapped in the trap states of the oxide semiconductor film to disappear. Therefore, the trap level density is high. A transistor in which a channel region is formed in a thin oxide semiconductor film has unstable electrical characteristics. There are cases.

[0077] Hydrogen in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water, and The reacted oxygen is released from the metal atom, creating an oxygen vacancy in the lattice (or in the area where the oxygen was released). When hydrogen enters the oxygen vacancy, electrons that act as carriers may be generated. In addition, some of the hydrogen atoms bond with oxygen, which bonds with metal atoms, and the electrons that act as carriers are released. Therefore, a transistor using an oxide semiconductor containing hydrogen may be generated. tends to be normally-on.

[0078] Therefore, the oxide semiconductor film 17a and the oxide semiconductor film 17b have oxygen vacancies and hydrogen. Specifically, the oxide semiconductor film 17a and the oxide In the semiconductor film 17b, secondary ion mass spectrometry (SIMS) The hydrogen concentration obtained by mass spectrometry was calculated as 2×10 20 atoms / cm 3 Less than or equal to 5×10 19 atoms / cm 3 The following is more preferred: 1×10 19 atoms / cm 3 Less than or equal to 5×10 18 atoms / c m 3 Less than or equal to 1×10 18 atoms / cm 3 Less than or equal to 5×1, more preferably 0 17 atoms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 below Let us assume that.

[0079] In the oxide semiconductor film 17a and the oxide semiconductor film 17b, When silicon or carbon is contained in the oxide semiconductor film 17a and the oxide semiconductor film 17b, The oxygen vacancies increase, and the oxide semiconductor film 17a and the oxide semiconductor film 17b become n-type. Concentrations of silicon and carbon in the body membrane 17b (concentrations obtained by secondary ion mass spectrometry) 2 × 10 18 atoms / cm 3 Less than or equal to 2×10 17 atoms / cm 3 The following applies.

[0080] In addition, the oxide semiconductor film 17a and the oxide semiconductor film 17b were subjected to secondary ion mass spectrometry. The concentration of alkali metals or alkaline earth metals obtained by the method is 1×10 18 atom s / cm 3 Less than or equal to 2×10 16 atoms / cm 3 Below: Alkali metals When the alkaline earth metal and the oxide semiconductor are bonded, they may generate carriers. As a result, the off-state current of the transistor may increase. In addition, the concentration of alkali metal or alkaline earth metal in the oxide semiconductor film 17b can be reduced. preferable.

[0081] In addition, when the oxide semiconductor film 17a and the oxide semiconductor film 17b contain nitrogen, This causes the generation of electrons that are rearranged, increases the carrier density, and makes it easier to become n-type. A transistor using an oxide semiconductor having such a structure tends to be normally on. It is preferable that nitrogen be reduced as much as possible in the oxide semiconductor film. For example, the nitrogen concentration obtained by secondary ion mass spectrometry is 5×10 18 atoms / cm 3 It is preferable to do the following:

[0082] The impurity concentrations in the oxide semiconductor films 17a and 17b are adjusted to the above values. By reducing the threshold voltage, the transistors 400a and 400b have a positive electrical characteristic. It is possible to provide the device with normally-off characteristics.

[0083] In addition, the oxide semiconductor film 17a and the oxide semiconductor film 17b may have, for example, a non-single crystal structure. The non-single crystal structure is, for example, the C Axis Aligned Array (CAAC-OS) structure described later. Crystalline Oxide Semiconductor), polycrystalline structure, This includes the microcrystalline structure described below, and the amorphous structure. The defect state density of CAAC-OS is the lowest.

[0084] Note that by forming the oxide semiconductor film 17a using a CAAC-OS film, the channel length can be shortened. Typically, the thickness is 0.5 μm or more and 4.5 μm or less, and preferably, the thickness is greater than 1 μm and less than 4 μm. , more preferably greater than 1 μm and less than 3.5 μm, more preferably greater than 1 μm and less than 2 Even if the thickness is less than 0.5 μm, it is possible to fabricate a channel-etched transistor. This is preferable because it is possible

[0085] Note that the oxide semiconductor film 17a and the oxide semiconductor film 17b are formed of an amorphous region and a microcrystalline region. The structure has two or more of a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may be a film having a structure in which, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, The crystal structure region has two or more regions of either a crystal structure region, a CAAC-OS region, or a single crystal structure region. In addition, the mixed film may have regions with an amorphous structure, a microcrystalline structure, a polycrystalline structure, etc. The product of two or more of the following regions: a crystal structure region, a CAAC-OS region, and a single crystal structure region It may have a layered structure.

[0086] The transistor including the oxide semiconductor film is an accumulation type transistor. The flow of carriers in a transistor having a semiconductor film in the off and on states is discussed. This will be described with reference to the schematic diagram shown in FIG. 36. Also, FIG. 36(A) and FIG. 36(B) show FIG. 36(C) is a cross-sectional view in the channel width direction.

[0087] In FIG. 36, the transistor including the oxide semiconductor film includes a gate electrode GE_1 and a A gate insulating film GI_1 on the gate electrode GE_1 and an oxide semiconductor on the gate insulating film GI_1 a semiconductor film OS, electrodes S and D on the semiconductor film OS, and a semiconductor film OS and electrodes S and D and a gate electrode GE_2 on the gate insulating film GI_2. The oxide semiconductor film OS has a channel region i and a low-resistance region n in contact with the electrodes S and D. + and The gate electrode GE_1 and the gate electrode GE_2 are connected as shown in FIG. It is being done.

[0088] When the transistor is in an off state, as shown in FIG. When a negative voltage is applied to E_2, electrons are expelled from the channel region i of the oxide semiconductor film OS. The channel region i is completely depleted. As a result, the off-current of the transistor is extremely Become smaller.

[0089] On the other hand, in the on-state, as shown in FIG. 36(B), the low-resistance region n + mosquito The low resistance area n that contacts the electrode D + Electrons accumulate around the As shown in FIG. 36(C), the gate electrodes GE_1 and GE_2 are formed. The oxide semiconductor film OS is set to the same potential and the side surface of the oxide semiconductor film OS faces the gate electrode GE_2. In addition, in the channel width direction, the gate electrode GE_1 and the gate electrode GE_2 are The oxide semiconductor film OS is surrounded by the gate insulating film GI_1 and the gate insulating film GI_2. As shown in FIG. 36B, carriers in the oxide semiconductor film OS are transferred to the gate insulating film GI _1, GI_2 and the oxide semiconductor film OS, as well as a wide area in the oxide semiconductor film OS This increases the amount of carrier movement in the transistor. As the on-state current of the transistor increases, the field effect mobility increases. Field effect mobility is 10 cm 2 / V·s or more, even 20 cm 2 / V s or more. The field effect mobility here is not an approximation of the mobility as a physical property value of the oxide semiconductor film. It is the field effect mobility in the saturation region of the transistor. The channel length (also called L length) is 0.5 μm or more and 6.5 μm or less, preferably 1 μm or more. Less than 6 μm, more preferably more than 1 μm and 4 μm or less, more preferably more than 1 μm By making the diameter at most 3.5 μm or less, and more preferably making the diameter at most 1 μm or less 2.5 μm or less, The increase in field effect mobility is remarkable. In addition, when the channel length is 0.5 μm or more and 6.5 μm or less, Therefore, the channel width can be made small. As shown in FIG. 1C, a region to be a connection portion between the gate electrode GE_1 and the gate electrode GE_2 is Even if the region is provided, the area of ​​the transistor can be reduced.

[0090] The transistor 400 shown in FIG. 2A1, FIG. 2B, FIG. 2C1, and FIG. 2D In the case of a, the gate electrode 13a and the gate electrode 31 are provided, and thus each of them is electrically connected to the external In order to have a function of shielding the magnetic field, the gate electrode 31 is provided between the substrate 11 and the gate electrode 13a. As a result, the fixed charges present in the oxide semiconductor film 17a do not affect the oxide semiconductor film 17a. For example, a negative potential is applied to the gate electrode (Gate Bias-Temperature Transistor). The degradation of the drain voltage at different drain voltages is suppressed. Therefore, it is possible to suppress the fluctuation in the rise voltage of the on-current.

[0091] The BT stress test is a type of accelerated test that detects the transitions that occur during long-term use. It is possible to evaluate the characteristic changes (i.e., aging) of the transistor in a short time. The amount of change in the threshold voltage of a transistor before and after stress testing is used to examine reliability. This is an important indicator. The smaller the change in threshold voltage before and after the BT stress test, the Therefore, it can be said that this is a highly reliable transistor.

[0092] Reducing the channel length of a transistor causes the threshold voltage to shift in the negative direction. However, in the display device of the present embodiment, the selection transistor of the pixel The channel length of the transistor 400b functioning as a drive transistor is set to By making the transistor longer than the transistor 400a, the display device can operate at high speed and consume less power. It is possible.

[0093] In addition, in the insulating film 28 provided on the oxide semiconductor film 17a and the oxide semiconductor film 17b, The oxide insulating film contains more oxygen than the oxygen that satisfies the stoichiometric composition. The oxide insulating film containing more oxygen than the oxygen content satisfying the stoichiometric composition is preferably A portion of the oxygen is released by oxidation. The surface temperature of the insulating film is 100°C to 700°C or 100°C to 500°C. Thermal Desorption Spectroscopy (TDS) py) analysis, the amount of oxygen released in terms of oxygen atoms was 1.0 x 10 18 atoms / c m 3 More than 3.0×10 20 atoms / cm 3 The oxide insulating film is as described above. do.

[0094] In the insulating film 28, an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition is used. When the insulating film 28 is included, part of the oxygen contained in the insulating film 28 is oxidized to the oxide semiconductor film 17a and the oxide semiconductor film 17b. It is possible to reduce oxygen vacancies that may be contained in the oxide semiconductor film by moving the oxygen to the conductive film 17b. It is.

[0095] A transistor including an oxide semiconductor film having oxygen vacancies in the oxide semiconductor film is The threshold voltage tends to shift in the negative direction, and the device tends to have normally-on characteristics. Charge is generated due to oxygen vacancies in the oxide semiconductor film, and the resistance of the oxide semiconductor film is reduced. If a transistor has normally-on characteristics, malfunctions may occur during operation. This can cause various problems, such as increased power consumption when not in operation. In addition, the electrical characteristics of a transistor, typically the threshold voltage, change over time or through stress testing. There is a problem in that the amount of fluctuation in

[0096] However, the transistors 400a and 400b in this embodiment The insulating film 28 provided on the oxide semiconductor films 17a and 17b is made of a material having a stoichiometric composition. By including an oxide insulating film containing more oxygen than oxygen, the oxygen in the insulating film 28 The oxygen vacancies in the oxide semiconductor films are reduced by transferring the oxygen to the oxide semiconductor films 17a and 17b. In addition, since the insulating film 28 is not exposed to the etching atmosphere, the insulating film 28 is free from defects. As a result, the transistor has normally-off characteristics. In the pass and stress tests, the electrical characteristics of the transistor, typically the threshold for operating time, Furthermore, even if stress tests are repeated, the fluctuation of the voltage can be reduced. Fluctuations in the threshold voltage can be reduced.

[0097] In addition, the transistors 400a and 400b are channel-etched transistors. The fact that the transistor is a channel-etch type transistor is also effective in improving the electrical characteristics. For example, a channel protection transistor is compared with a channel protection transistor. A channel protection transistor having two gate electrodes has a first gate electrode and a second gate electrode. A gate insulating film is formed, and an oxide semiconductor film is formed on the first gate insulating film. A channel protective film is formed on the semiconductor film, and the oxide semiconductor film is in contact with the channel protective film. A pair of electrodes is formed. Further, a second gate insulating film is formed on the channel protection film and the pair of electrodes. A film is formed, and a second gate electrode is formed on the second gate insulating film.

[0098] The channel protection film is exposed to plasma during the etching process for forming the pair of electrodes. As a result, defects are easily formed in the channel protection film. As a result, carriers flowing through the oxide semiconductor film are captured by the defects in the channel protection film, causing transistors to be generated. The electrical characteristics of the transistors change over time, making them less reliable. The transistors 400a and 400b shown in the embodiment are channel-etched transistors. In the insulating film 28, a region overlapping with the oxide semiconductor film 17a or the oxide semiconductor film 17b is The insulating film 28 is not exposed to the etching atmosphere, and therefore has fewer defects and is highly reliable. It is a transistor.

[0099] In addition, in a channel protective transistor, a pair of electrodes and a In the overlapping region, the pair of electrodes shields the electric field of the second gate electrode, The electric field of the electrode does not uniformly affect the oxide semiconductor film. As a result, This leads to a decrease in the amount of carriers flowing through the oxide semiconductor film. The transistor 400a described in this embodiment is a channel-etched transistor. The electric field of the gate electrode 31 uniformly affects the back channel of the oxide semiconductor film 17a. In addition, the side surface of the oxide semiconductor film 17a is also affected by the electric field of the gate electrode 31. As a result, carriers flow in a wide range of the oxide semiconductor film 17a, As the field effect mobility of the MOSFET increases, the on-state current also increases.

[0100] In addition, a channel protection transistor has a structure in which an oxide semiconductor film is connected to each of a pair of electrodes. In order to connect the electrodes, one end of each of the pair of electrodes is positioned on the channel protective film. One end of each of the pair of electrodes is a connection region between the oxide semiconductor film and each of the pair of electrodes. Therefore, when the positional deviation of the photomask is taken into consideration, the oxide It is necessary to design the gap between the semiconductor film and the pair of electrodes to be wide. In a transistor having a pair of electrodes, one end of each of the electrodes is directly connected to an oxide semiconductor film. In order to connect the transistors, the channel-etched transistors are different from the channel-protected transistors. In comparison, it is easy to reduce the distance between the pair of electrodes. The transistor 400a, which functions as a driving transistor of a pixel in a display device, has a short channel length. Since it is a low-cost transistor, a display device can be manufactured with a high yield by using a channel etch type. It becomes possible to do so.

[0101] Furthermore, both the transistor 400a and the transistor 400b are channel-etched. The difference between the configuration of the transistor 400b and the transistor 400a is the channel length. The length and the presence of the gate electrode 31 that functions as a back gate electrode in the transistor 400a Therefore, the transistors 400a and 400b are formed in the same process. Therefore, the manufacturing process of the display device can be simplified. become.

[0102] <Details of transistor components> The configurations of the transistors 400a and 400b will be described in detail below. .

[0103] There is no particular restriction on the material of the substrate 11, but it should be at least strong enough to withstand the subsequent heat treatment. It is necessary to have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, surface treatment substrate, etc. A fiber substrate or the like may be used as the substrate 11. Also, a single material such as silicon or silicon carbide may be used. Crystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SO It is also possible to use a semiconductor substrate such as an I-substrate, and a semiconductor element is provided on the substrate. In addition, when a glass substrate is used as the substrate 11, Generation (1500mm x 1850mm), 7th generation (1870mm x 2200mm), 8th Generation (2200mm x 2400mm), 9th generation (2400mm x 2800mm), 1st By using large area substrates such as 2950mm x 3400mm, large display devices can be produced. can be produced.

[0104] In addition, a flexible substrate is used as the substrate 11, and the transistor 400 is directly formed on the flexible substrate. a and transistor 400b may be formed. Alternatively, the substrate 11 and the transistor 400a A separation layer may be provided between the transistors 400b. After a part or whole of the device is completed, it can be separated from the substrate 11 and used for transferring to another substrate. At this time, the transistors 400a and 400b are made of a substrate having poor heat resistance. It can also be transferred to flexible substrates.

[0105] The gate electrodes 13a and 13b are made of aluminum, chromium, copper, tantalum, titanium, molybdenum, etc. A metal element selected from the group consisting of tungsten, fluorine, and tungsten, or an alloy containing the above-mentioned metal elements. The metal elements may be combined to form an alloy. Alternatively, a metal element selected from one or more of tungsten, fluorine, zirconium, or the like may be used. The gate electrodes 13a and 13b may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, or a structure in which an aluminum film is laminated on a titanium film, Two-layer structure: a titanium film laminated on a titanium nitride film; a tungsten film laminated on a titanium nitride film A two-layer structure in which a tantalum nitride film is laminated, a tungsten film on a tantalum nitride film or a tungsten nitride film A two-layer structure in which a copper film is laminated on a titanium film; a two-layer structure in which a copper film is laminated on a titanium film; There is also a three-layer structure in which an aluminum film is laminated on top and a titanium film is further formed on top of that. In addition, aluminum, titanium, tantalum, tungsten, molybdenum, chromium, neodymium , scandium, or an alloy film or nitride film made by combining multiple elements. may also be used.

[0106] The gate electrodes 13a and 13b are made of indium tin oxide (ITO) or tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light transmitting properties, such as indium tin oxide doped with silicon oxide, is used. In addition, the conductive material having light transmitting properties and the metal element may be laminated. It is also possible.

[0107] The insulating film 15 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride. Copper, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn-based metal oxide , silicon nitride, or the like may be used, and the insulating film 11 is provided as a laminated layer or a single layer.

[0108] The insulating film 15 is made of hafnium silicate (HfSiO x), nitrogen added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor can be reduced.

[0109] The thickness of the insulating film 15 is preferably 5 nm to 400 nm, more preferably 10 nm to 300 nm. nm or less, and more preferably from 50 nm to 250 nm.

[0110] The pair of electrodes 20a, 20b and the pair of electrodes 20c, 20d are made of aluminum, titanium, Chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, The metal is made of tungsten, or an alloy mainly made of tungsten, and is either a single layer or a multilayer structure. For example, a single layer structure of aluminum film containing silicon, or aluminum on titanium film Two-layer structure with aluminum film laminated on top of tungsten film. A two-layer structure with a copper film laminated on a copper-magnesium-aluminum alloy film, and a titanium film laminated on a titanium film Two-layer structure with copper film laminated, two-layer structure with copper film laminated on tungsten film, titanium film or A titanium nitride film and an aluminum film or a copper film overlaid on the titanium film or the titanium nitride film. A three-layer structure in which a titanium film or titanium nitride film is formed on top of the molybdenum A molybdenum film or molybdenum nitride film is laminated on the molybdenum film or molybdenum nitride film. A aluminum or copper film is laminated, and then a molybdenum or molybdenum nitride film is laminated on top of it. A three-layer structure is formed. An electrically conductive material may also be used.

[0111] The insulating film 28 is formed by the oxide insulating film 23 in contact with the oxide semiconductor films 17a and 17b, and the oxide insulating film 24 in contact with the oxide semiconductor films 17a and 17b. The insulating film 23 is in contact with an oxide insulating film 25, and the insulating film 27 is in contact with the oxide insulating film 25. The insulating film 28 is made of an oxide film containing more oxygen than the oxygen required for the stoichiometric composition. Here, the oxide insulating film 23 is preferably an oxygen-permeable insulating film. An oxide insulating film is formed. The oxide insulating film 25 contains more oxygen than the oxide having a stoichiometric composition. An oxide insulating film containing a large amount of oxygen is formed as the nitride insulating film 27. In this embodiment, the insulating film 28 has a three-layer structure. The number of layers may be one, two, or four or more. It is preferable to have an oxide insulating film containing more oxygen than the stoichiometric composition. .

[0112] The oxide insulating film 23 is an oxide insulating film that transmits oxygen. The oxygen desorbed from the oxide insulating film 25 provided on the oxide insulating film 23 is absorbed through the oxide insulating film 23. The oxide insulating film 23 can be transferred to the oxide semiconductor films 17a and 17b. In order to prevent damage to the oxide semiconductor films 17a and 17b when forming the oxide insulating film 25, It also functions as a relaxation membrane.

[0113] The oxide insulating film 23 has a thickness of 5 nm to 150 nm, preferably 5 nm or more. Silicon oxide, silicon oxynitride, etc., having a thickness of 50 nm or less can be used. In the present specification, a silicon oxynitride film is a film having a composition in which oxygen is more abundant than nitrogen. The term silicon nitride oxide refers to a film that contains more nitrogen than oxygen. Refers to the membrane.

[0114] In addition, it is preferable that the oxide insulating film 23 has a small amount of defects. Typically, the oxide insulating film 23 has an ESR (E Dangling silicon was detected by Electron Spin Resonance (ESR) measurement. The spin density of the signal at g=2.001 due to the bond is 3×10 17 spins / cm 3 This is because the oxide insulating film 23 has a high defect density. Then, oxygen is bonded to the defects, and the amount of oxygen that permeates the oxide insulating film 23 decreases. This is because...

[0115] In addition, the number of defects at the interfaces between the oxide insulating film 23 and the oxide semiconductor films 17a and 17b is small. It is preferable that the oxide semiconductor films 17a and 17b are not oxidized. Typically, the oxide semiconductor films 17a and 17b are not oxidized by ESR measurement. The spin density of the defect-related signal at g=1.93 is 1×10 17 spins / cm 3 It is preferably below the lower detection limit.

[0116] Note that in the oxide insulating film 23, all of the oxygen that has entered the oxide insulating film 23 from the outside is In some cases, the oxide insulating film 23 may move to the outside. In some cases, part of the oxygen remains in the oxide insulating film 23. As oxygen enters the oxide insulating film 23, the oxygen contained in the oxide insulating film 23 flows out of the oxide insulating film 23. The movement of oxygen may cause the movement of oxygen in the oxide insulating film 23 in some cases.

[0117] An oxide insulating film 25 is formed so as to be in contact with the oxide insulating film 23. The fifth embodiment is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. The oxide insulating film containing more oxygen than the stoichiometric composition is heated to remove the oxygen. A part of the element is released. The oxide insulating film contains more oxygen than the oxygen that satisfies the stoichiometric composition. The surface temperature must be between 100°C and 700°C, or between 100°C and 500°C. In the TDS analysis, the amount of oxygen released was 1.0 x 10 18 atom s / cm 3 More than 3.0×10 20 atoms / cm 3 More than 100% oxide insulation It is a membrane.

[0118] The oxide insulating film 25 has a thickness of 30 nm to 500 nm, preferably 50 nm. Silicon oxide, silicon oxynitride, etc., having a thickness of 400 nm or more and 400 nm or less can be used.

[0119] In addition, it is preferable that the oxide insulating film 25 has a small amount of defects. Therefore, the spin of the signal at g=2.001 originating from the silicon dangling bond Density is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Note that the oxide insulating film 25 has a thickness smaller than that of the oxide insulating film 23. Since the oxide semiconductor films 17a and 17b are apart from each other, the defect density is lower than that of the oxide insulating film 23. More is better.

[0120] The nitride insulating film 27 has at least a blocking effect against hydrogen and oxygen. Preferably, it has a blocking effect of oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the nitride insulating film 27 on the insulating film 28, oxygen diffusion from the oxide semiconductor films 17a and 17 b to the outside and the intrusion of hydrogen, water, etc. from the outside into the oxide semiconductor films 17a and 17b can be prevented.

[0121] As the nitride insulating film 27, there are silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride, etc. with a thickness of 50 nm or more and 300 nm or less, preferably 100 n m or more and 200 nm or less.

[0122] Note that instead of the nitride insulating film 27, an oxide insulating film having a blocking effect on oxygen, hydrogen, water, etc. may be provided. The oxide insulating film having a blocking effect on oxygen, hydrogen, water, etc. includes aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride , yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, etc.

[0123] In the transistor 400a, the gate electrode 31 and the electrode 32 use a conductive film having translucency. The conductive film having translucency is indium tin oxide (hereinafter also referred to as ITO). , indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide , indium oxide containing titanium oxide, indium tin oxide containing titanium oxide , indium tin oxide containing silicon oxide, etc.

[0124] <Regarding the improvement of current driving force by Dual Gate driving> In the display device of the present embodiment, pixels that require a high on-current and a high field-effect mobility are​​​​ The transistor 400a that functions as a driving transistor is an oxide in which a channel is formed. The gate electrodes 13a and 3b overlap the upper and lower layers of the nitride semiconductor film 17a, respectively. 1, and the gate electrodes are electrically connected to each other, i.e., dual gate drive ( A transistor that performs dual gate drive is used, and its channel length is 0.5 μm. The following describes the structure of the gate electrodes facing each other with an oxide semiconductor film sandwiched between them. In a dual gate transistor, the gate electrodes are connected and both electrodes are at the same potential. Next, it will be explained how the current driving force is improved by reducing the channel length L.

[0125] <<On saturation mobility in an ideal model>> First, we consider an ideal model that does not take into account the effects of interface states and interface scattering. The transistor model used in the calculation is shown in Figure 30. The calculations were performed using the device simulation software Atlas (Silvaco). there was.

[0126] The transistor shown in FIG. 30 has a gate insulating film GI_1 formed on a gate electrode GE_1. Then, an oxide semiconductor film OS is formed on the gate insulating film GI_1. A source electrode S and a drain electrode D are formed on the oxide semiconductor film OS. A gate insulating film GI_2 is formed on the semiconductor film OS, the source electrode S, and the drain electrode D. A gate electrode GE_2 is formed on the gate insulating film GI_2. The gate electrode GE_2 is formed on the gate insulating film GI_1 and the gate insulating film GI_2. The connection is made at an opening (not shown).

[0127] The conditions used in the calculation are shown in Table 1.

[0128] [Table 1]

[0129] Since the gate electrodes GE_1 and GE_2 are connected, they are always at the same potential. In addition, since this model uses two-dimensional simulation, the effect in the channel width direction is not observed. The Vg-Id characteristic when the drain voltage (Vd) is 10V is also By substituting the value of into Equation 1, the saturation mobility μ FE Here, the saturation The field effect mobility of the region is explained as the saturation mobility. The maximum mobility occurs in the saturation region (gate voltage (Vg) < drain voltage (Vd) + threshold voltage (Vth) is an index of the current driving force at the charge-discharge potential (Vt) of the oxide semiconductor film. This is different from the approximate value of the degree.

[0130]

number

[0131] In formula 1, W is the channel width of the transistor, and C Bottom Is, 13 is a capacitance value per unit area between the gate electrode GE_1 and the oxide semiconductor film OS.

[0132] The calculation results for a dual gate driven transistor are shown in FIG. The calculation results for a single-gate driven transistor without GE_2 are shown in Figure 31(B ) as shown in

[0133] As shown in Figure 31, the dual gate drive transistor and the single gate drive transistor In each of the transistors, a saturation mobility with a sharp peak was obtained. The shorter the L length, the higher the peak value of the saturation mobility.

[0134] Here, as the channel length L becomes shorter, the saturation mobility improves. The following describes how this corresponds to an improvement in the current driving force of the transistor.

[0135] In the results obtained from the simulation of the ideal model, the gate voltage Vg=V The on-current is plotted against the L length when Vth+5V and Vg=Vth+10V. The graph of the on-state current is shown in FIG. 32. The upper part of FIG. 32 shows the on-state current, and the lower part of FIG. 32 shows the off-state current. In FIG. 32, the left column shows the drain current x channel length. The right column shows the calculation results when the drain voltage (Vd) is 10V. .

[0136] The on-current shown in FIG. 32 is inversely proportional to the channel length (L). This is because it is inversely proportional to the channel length (L).

[0137] Also, if the on-current is completely inversely proportional to the channel length, then the on-current x channel length The value is a constant value independent of the channel length. In FIG. 32, In the case of V, the value of on-current x channel length is approximately constant with respect to the channel length (L). On the other hand, when the drain voltage (Vd) is 10 V, the channel length (L) becomes shorter. This is because the value of on-current × channel length increases when the drain voltage (Vd) is 10V. In this case, the effective channel length (described later) is the channel length defined in FIG. This indicates that the channel length (the distance between the source electrode S and the drain electrode D) is shorter than the channel length. There are.

[0138] <<Theory of Bulk Current>> Below, the saturation mobility of an ideal model transistor peaks at low gate voltages. This section explains the causes of this.

[0139] In the transistor illustrated in FIG. 30, the electron density in the oxide semiconductor film OS is The semiconductor film OS has a constant value n in the thickness direction. 0 Let us assume that the formula is (y), where y is an oxide semiconductor. The thickness direction of the oxide semiconductor film OS is shown in FIG. The potential φ at the gate electrode GE_1 is expressed by the formula 2 and is constant. The gate voltage Vg_1 and the gate voltage Vg_2 of the gate electrode GE_2 are at the same potential. The flat band voltages on both the gate electrode GE_1 side and the gate electrode GE_2 side are Band voltage V FB Assume that.

[0140]

number

[0141] At this time, in a transistor including an accumulation type oxide semiconductor film, a drain current Id is the bulk current I bulk is approximately given by

[0142]

number

[0143] In Formula 3, t is the thickness of the oxide semiconductor film, and μ is the electron mobility of the oxide semiconductor film. , k B is the Boltzmann constant, T is the absolute temperature, L eff is the effective channel length. In this case, the channel length is the distance between the source electrode and the drain electrode, and the effective channel length is In the oxide semiconductor film, the n-region extending from under the source electrode and the n-region extending from under the drain electrode are This represents the distance between the n-regions in the n-channel region. In particular, when the channel length is short or the drain voltage is high, In this case, the effective channel length is shorter than the channel length.

[0144] In addition, n 0 (0) is the end of the region determined by the effective channel length on the source electrode side. The electron density at the nucleus is expressed by the following formula 4. 0 (L eff ) is the effective channel is the electron density at the drain electrode side end of the region determined by the length of the drain pipe, and is expressed by Equation 5. In addition, in Formula 4 and Formula 5, N D is the donor density in the channel region of the oxide semiconductor film where q is the elementary charge.

[0145]

number

[0146]

number

[0147] In the saturated region where Vd>Vg-Vth and Vg>Vth, the drain voltage Vd is Vg- Since it is replaced with Vth, Equation 3 becomes Equation 6.

[0148]

number

[0149] For the drain current Id obtained by Equation 6, the saturation mobility μ FE sat Calculating the number This results in equation 7.

[0150]

number

[0151] In Equation 7, if Vg is changed to Vth, the denominator becomes 0, and the saturation mobility μFE sat teeth This property leads to a low gate in the saturation mobility as shown in FIG. This is the cause of the peak in the gate voltage Vg. The more the drain current is the main factor of the drain current, the greater the drain current becomes. Like the saturation mobility, a more distinct peak appears.

[0152] Another factor that increases the saturation mobility is the effective channel length L eff Gacha For example, in the oxide semiconductor film OS, In the vicinity of the region in contact with the source electrode S and the drain electrode D, the n region expands, Effective channel length L eff This effect is expressed as the saturation transition Motion μ FE sat L / L eff This is also clear from the proportional relationship to

[0153] <<Current density in oxide semiconductor film>> The effect of bulk current on saturation mobility is observed in oxide semiconductor films, which are accumulation-type devices. This phenomenon is specific to transistors that have a silicon film as a semiconductor film. Inverted devices such as MOSFETs have less effect on bulk current.

[0154] Next, a graph plotting the current density distribution obtained by device simulation is shown. This is shown in Figure 33(B) and Figure 33(C). Figure 33(A) shows the results when the drain voltage is set to 10 V. 33B and 33C show the Vg-Id characteristics obtained by calculation. FIG. 33B shows the current density distribution in the cross-sectional direction of the oxide semiconductor film taken along the line A1-A2. (Vg=0.5V), and Fig. 33(C) shows the current density distribution in the linear region (Vg=15V). The channel length L / channel width W of the transistor used in the calculation is 2 μm / 50 μm. m, and the drain voltage Vd was set to 10 V.

[0155] As shown in FIG. 33B, in the saturation region (low gate voltage Vg), almost On the other hand, as shown in FIG. 33(C), the current density is distributed almost uniformly in the linear region (high At a gate voltage of Vg, the current flowing near the surface of the oxide semiconductor film OS becomes dominant. As shown in FIG. 33B, in the saturation region, the current density in the oxide semiconductor film OS is Since the distribution is almost uniform, one of the reasons for the peak in the saturation mobility is the It can be seen that the current is a

[0156] On the other hand, the current density of the semiconductor film of the inversion type device obtained by device simulation The distribution of the luminance distribution of the transistor shown in FIG. When the oxide semiconductor film OS is replaced with a semiconductor film (silicon) containing an npn junction The calculation results are shown below. The channel region of the semiconductor film has a density of 1×17 / cm3 Acceptors with a density of A ter-type impurity was assumed.

[0157] FIG. 34(A) shows the Vg-Id characteristics calculated with a drain voltage of 10 V. 34B and 34C show currents in the cross-sectional direction of the semiconductor film taken along line A1-A2 in FIG. The density distribution is shown in Fig. 34(B) in the saturation region (Vg = 0.5 V), and in Fig. 34(C) in the linear region. The current density distribution at (Vg=15V) is shown in Fig. 1. The channel of the transistor used in the calculation is The channel length L / channel width W was 2 μm / 50 μm, and the drain voltage Vd was 10 V.

[0158] Unlike a transistor having an oxide semiconductor film, which is an accumulation type device, As shown in FIG. 34B, a transistor having a semiconductor film having a Even in the case of It is small compared to the device.

[0159] For the above reasons, in a transistor including an oxide semiconductor film, which is an accumulation type device, In the ideal model, it is found that the bulk current produces a sharp peak in the saturation mobility. In addition, the saturation mobility improves as the channel length L becomes shorter due to the bulk current. .

[0160] In addition, the shorter the channel length L, the smaller the peak value of the saturation mobility caused by the bulk current. The reason for this is that the oxide semiconductor film OS has a source electrode S and a drain electrode D In the vicinity of the region adjacent to the n region, the n region expands, and the effective channel length L eff Gacha It is considered that the channel length L is shorter than the source electrode S. The drain electrode D reduces the conduction band edge energy (Ec) of the oxide semiconductor film OS. The conduction band edge energy and the Fermi energy become closer (CBL effect (Co The induced band lowering effect Length L eff It is considered that the saturation mobility is shorter than the channel length L. As mentioned above, the effective channel length L eff As L / L becomes smaller, eff Large in proportion to This effect becomes more pronounced as the channel length L becomes smaller. It is considered that the saturation mobility is improved as the saturation mobility increases.

[0161] <<Model assuming shallow electron trap levels>> Next, we calculated the saturation mobility of the ideal model transistor to approximate that of the actual transistor. In the transistor, a gate insulating film GI_1 and an oxide semiconductor film OS are provided at the interface between the gate insulating film GI_1 and the oxide semiconductor film OS. The calculation is based on the assumption of an acceptor-type level, i.e., a shallow electron trap level, which becomes negatively charged when the electron is trapped. The results are shown in Figure 35.

[0162] FIG. 35A shows an electron ion implantation process assumed to occur at the interface between the gate insulating film GI_1 and the oxide semiconductor film OS. The DOS (density of state) of the trap level is shown.

[0163] Next, we will compare dual gate driven transistors and single gate driven transistors. The saturation mobility of each transistor was calculated. The calculation results are shown in Figure 35(B), and the calculation results for a single gate driven transistor are shown in Shown in Figure 35(C).

[0164] From FIGS. 35(B) and 35(C), in the saturation mobility of the transistors with Dual Gate drive and the transistors with Single Gate drive, no sharp peak as obtained in the ideal model appeared. Also, from FIG. 35(C), in the transistors with Single Gate drive, the peak value of the saturation mobility hardly depends on the channel length L and was around 5 cm / V·sec. On the other hand, in the transistors with Dual Gate drive, the smaller the channel length L, the higher the peak value of the saturation mobility, and the value became 15 to 20 cm 2 / V·sec. This result is the same as the tendency of the results of the examples described later. From this, it can be seen that in the transistors with Dual Gate drive, the saturation mobility increases as the channel length L is made smaller. 2

[0165]

[0166] <Comparison between Transistors of Channel Etch Type and Transistors of Channel Protection Type in Dual Gate Drive> The following uses the results of calculations on the electrical characteristics of transistors of channel etch type and transistors of channel protection type to compare the field effect mobility and on-current of the transistors of channel etch type and transistors of channel protection type, respectively. Here, the field effect mobility (μ and on-current (Ion) of the transistors with Dual Gate drive in which the gate electrodes facing each other across the oxide semiconductor film are connected and have the same potential are compared. FE

[0167] FIG. 29(A) shows the structure of the transistors of channel protection type used in the calculation. ​​​​​​​​​​The device simulation software Atlas (manufactured by Silvaco) was used for the calculation.

[0168] The channel-protection transistor has a gate insulating film GI_1 formed on a gate electrode GE_1. The oxide semiconductor film OS is formed on the gate insulating film GI_1. A source electrode S and a drain electrode D are formed on the oxide semiconductor film OS. Between the ends of the source electrode S and the drain electrode D and the oxide semiconductor film OS, a channel protective film C is provided. The oxide semiconductor film OS, the source electrode S, the drain electrode D, and the channel A gate insulating film GI_2 is formed on the gate protective film CS. The gate electrode GE_1 and the gate electrode GE_2 are formed. In the openings (not shown) formed in the gate insulating film GI_1 and the gate insulating film GI_2, and connect.

[0169] In the channel etch type transistor, the channel protective film CS is not provided, and the source electrode S In addition, an end portion of the drain electrode D is in contact with the oxide semiconductor film OS.

[0170] The conditions used in the calculation are shown in Table 2.

[0171] [Table 2]

[0172] FIG. 29(A) shows a transistor driven by a dual gate. Regarding a single gate driven transistor that does not have a gate electrode GE_2, The calculation was performed in the same way as for the Dual Gate driven transistor. The driving transistors are the selection transistors of FIG. 2(A2), FIG. 2(B), and FIG. 2(C2). This corresponds to transistor 400b which functions as a capacitor.

[0173] In a channel-protected transistor, an oxide semiconductor is The length of the region where the film OS and the source electrode S or the drain electrode D overlap is Sov. In addition, the source electrode S and the drain electrode D are formed of an oxide semiconductor via a channel protective film CS. The region overlapping with the body membrane OS is called the Sov region. The relationship between Sov and the field effect mobility is calculated. The results are shown in FIG. 29(B), and the results of calculating the relationship between Sov and on-current are shown in FIG. 29(C). As shown in.

[0174] In addition, in the case of a channel-etched transistor, Sov is set to 0 μm, and the field effect The mobility and on-current were calculated. The calculation results are shown in FIG. 29(B) and FIG. 29(C), respectively. ) as shown in

[0175] FIG. 29B shows the results when the drain voltage Vd is set to 1 V. 9(C) shows the results when the drain voltage Vd is 1V and the gate voltage Vg is 10V. .

[0176] As shown in FIG. 29(B), in a channel-etched transistor (Sov is 0 μm), Compared with single gate driven transistors, dual gate driven transistors The field effect mobility of the transistor is about twice as high as that of the channel protection type transistor. In the case of the dual gate driven transistor, the field effect mobility is increased as the length of Sov increases. The figure decreases as the temperature increases.

[0177] Also, as shown in FIG. 29(C), a channel etch type transistor (Sov is 0 μm ) in comparison with the single gate driven transistor, the dual gate driven transistor The on-state current of the transistor with channel protection is about twice as high. In the case of a dual gate driven transistor, the on-current increases as the length of Sov increases. The number of cases decreases as the number of cases increases.

[0178] In a channel-protected transistor, the Sov The region shields the electric field of the gate electrode GE_2. The area where the carrier density cannot be controlled by the voltage of the gate electrode GE_2 expands. As a result, As the length of Sov increases, the field effect mobility decreases and the on-current becomes smaller. From the above, it is considered that the channel edge The effect of increasing the field effect mobility of the dual gate drive transistor is In other words, in the display device of the present embodiment, the driving current of the light emitting element is high. The transistor 400a used as the transistor is a channel etch type transistor. It is effective to apply

[0179] In addition, channel-etched transistors have a lower resistance than channel-protected transistors. Therefore, it is easy to reduce the distance between the pair of electrodes. The channel length is 0.5 μm or more and 4.5 μm or less, preferably 1 μm or more and 4 μm or less. , more preferably greater than 1 μm and less than 3.5 μm, more preferably greater than 1 μm and less than 2 It can be made less than 0.5μm.

[0180] <Manufacturing method of display device> Next, a display device including the transistor 400a and the transistor 400b shown in FIG. The manufacturing method will be described with reference to Figs. 3 to 6. In Figs. 3 to 6, A1- Using the cross-sectional view in the channel length direction shown in B1 and the cross-sectional view in the channel width direction shown in C1-D1, A method for manufacturing a transistor 400a will be described below. A method for manufacturing the transistor 400b will be described with reference to the drawings.

[0181] In addition, a cross-sectional view of the transistor 400b in the channel width direction is shown in FIG. The transistor is the same as the transistor 400a except that it does not have a gate electrode 31 in contact with the gate electrode 13a. It seems that.

[0182] As shown in FIG. 3A, conductive layers that will later become gate electrodes 13a and 13b are formed on a substrate 11. A film 12 is formed.

[0183] Here, a glass substrate is used as the substrate 11.

[0184] The conductive film 12 is formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

[0185] Here, a tungsten film having a thickness of 100 nm is formed as the conductive film 12 by sputtering. More forming.

[0186] Next, a mask is formed on the conductive film 12 by a photolithography process using a first photomask. Next, a part of the conductive film 12 is etched using the mask to form a gate electrode. 13a and 13b are formed, and then the mask is removed (see FIG. 3(B)).

[0187] The method for etching a part of the conductive film 12 may be a wet etching method or a dry etching method. One or both of these methods can be used.

[0188] Here, a mask is formed by a photolithography process, and the conductive film is The film 12 is dry etched to form gate electrodes 13a and 13b.

[0189] The gate electrodes 13a and 13b may be formed by electrolytic plating or printing instead of the above method. Alternatively, the conductive layer 14 may be formed by an ink jet method or the like.

[0190] Next, as shown in FIG. 3(C), a thin film is formed on the substrate 11 and the gate electrodes 13a and 13b. An insulating film 14 that will become an insulating film 15 is formed, and an oxide semiconductor film 17a and a An oxide semiconductor film 16 that becomes 17b is formed.

[0191] The insulating film 14 is formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

[0192] The insulating film 14 is a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film. In the case of forming the silicon-containing film, a deposition gas containing silicon and an oxidizing gas are used as the source gas. Representative examples of deposition gases containing silicon include silane, disilane, trisilane, and Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and dioxygen. Examples include nitrogen oxides.

[0193] When a gallium oxide film is formed as the insulating film 14, MOCVD (Metal Orga The film is formed using the NIC Chemical Vapor Deposition method. This can be done.

[0194] The oxide semiconductor film 16 can be formed by a sputtering method, a coating method, a pulsed laser deposition method, a laser deposition method, or the like. It can be formed by using an ablation method or the like.

[0195] When the oxide semiconductor film 16 is formed by a sputtering method, a plasma generating device is used. The power supply may be an RF power supply, an AC power supply, a DC power supply, or the like.

[0196] The sputtering gas is a rare gas (typically argon) atmosphere, an oxidizing atmosphere, a rare gas and In the case of a mixed gas of rare gas and oxygen, the following conditions are used for the rare gas: It is preferable to increase the gas ratio of oxygen by the above.

[0197] The target may be appropriately selected depending on the composition of the oxide semiconductor film 16 to be formed. good.

[0198] In order to obtain a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor film 16, Not only is it necessary to evacuate the inside of the chamber to a high vacuum, but it is also necessary to highly purify the sputtering gas. The oxygen gas and argon gas used as the gas source have a dew point of -40°C or less, preferably -80°C or less. More preferably, the temperature is reduced to below -100°C, and even more preferably to below -120°C. By using the gas, it is possible to prevent moisture and the like from being taken into the oxide semiconductor film 16 as much as possible. This can be done.

[0199] Here, an In-Ga-Zn oxide target (In:Ga:Zn=1:1:1) was used. The oxide semiconductor film 16 was formed by sputtering with a thickness of 35 nm. Forms an n-oxide film.

[0200] Next, a photolithography process using a second photomask is performed on the oxide semiconductor film 16. After forming a mask, a part of the oxide semiconductor film 16 is etched using the mask. In this way, oxide semiconductor films 17a and 17b are formed, each of which is isolated from the others. The mask is removed (see FIG. 3(D)).

[0201] The method for etching a part of the oxide semiconductor film 16 may be a wet etching method, a dry etching method, or the like. One or both of these methods can be used.

[0202] Here, a mask is formed by a photolithography process, and the mask is used to form an oxide The semiconductor film 16 is wet etched to form oxide semiconductor films 17a and 17b.

[0203] After this, the substrate is heated at a temperature of 150° C. or higher but lower than the substrate distortion point, preferably 200° C. or higher but lower than 450° C. More preferably, a heat treatment may be performed at a temperature of 300° C. or higher and 450° C. or lower. It is possible to reduce the amount of hydrogen, water, etc. contained in the semiconductor films 17a and 17b. It is possible to reduce impurities contained in the nitride semiconductor films 17a and 17b.

[0204] Next, as shown in FIG. 4A, the pair of electrodes 20a and 20b of the transistor 400a are 0b, and a conductive film 18 which will become a pair of electrodes 20c and 20d of a transistor 400b are formed. do.

[0205] The conductive film 18 is formed by a method such as sputtering, CVD, or vapor deposition.

[0206] Here, a tungsten film with a thickness of 50 nm and a copper film with a thickness of 300 nm are sputtered in this order. The conductive film 18 is formed by laminating the layers by a coating method.

[0207] Next, a mask is formed on the conductive film 18 by a photolithography process using a third photomask. Next, the conductive film 18 is etched using the mask to form a pair of electrodes 20a. , 20b and a pair of electrodes 20c, 20d are formed. After that, the mask is removed (FIG. 4( See B). ).

[0208] Here, the tungsten film and the copper film are dry-etched using the mask to form a pair of First, the electrodes 20a and 20b and the pair of electrodes 20c and 20d are formed. The copper film is then etched using a hot etching method, followed by SF 6 Dry etching using The tungsten film is etched by the method, and the surface of the copper film is Fluorides are formed in the copper film, which reduces the diffusion of elemental copper from the copper film and prevents oxidation. Therefore, the copper concentration in the semiconductor films 17a and 17b can be reduced.

[0209] Next, as shown in FIG. 5A, the oxide semiconductor film 17a and the pair of electrodes 20a and 20b are An oxide insulating film is then formed on the oxide semiconductor film 17b and the pair of electrodes 20c and 20d. The oxide insulating film 22 that will become the film 23 and the oxide insulating film 24 that will later become the oxide insulating film 25 are formed. Complete.

[0210] After the oxide insulating film 22 is formed, the oxide insulating film 2 is continuously removed without being exposed to the air. After the oxide insulating film 22 is formed, the source gas The oxide insulating film 24 is continuously formed by adjusting one or more of the flow rate, pressure, high frequency power, and substrate temperature. By forming the oxide insulating film 22 and the oxide insulating film 24 in the In addition, the impurity concentration in the oxide insulating film 24 can be reduced. The oxide semiconductor films 17a and 17b can be moved to the oxide semiconductor films 17a and 17b. The amount of oxygen vacancy can be reduced.

[0211] The oxide insulating film 22 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is maintained at a temperature of 280° C. or higher and 400° C. or lower, and a source gas is introduced into the processing chamber. The pressure in the chamber is set to 20 Pa or more and 250 Pa or less, and more preferably 100 Pa or more and 250 Pa or less. Under the conditions below, a silicon oxide film is formed by supplying high frequency power to an electrode provided in the processing chamber. Alternatively, a silicon oxynitride film can be formed.

[0212] As the source gas for the oxide insulating film 22, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0213] By using the above conditions, an oxide insulating film that transmits oxygen is formed as the oxide insulating film 22. In addition, by providing the oxide insulating film 22, the oxide insulating film to be formed later can be formed. In the formation process of 25, damage to the oxide semiconductor films 17a and 17b can be reduced. .

[0214] Under the film formation conditions, by setting the substrate temperature to the above temperature, the bonding strength between silicon and oxygen As a result, the oxide insulating film 22 is oxygen-permeable, dense, and hard. Oxide insulating film, typically, etching rate for 0.5% by weight hydrofluoric acid at 25°C A silicon oxide film or an oxynitride film having a crystallinity of 10 nm / min or less, preferably 8 nm / min or less. A silicon film can be formed.

[0215] In addition, in order to form the oxide insulating film 22 while heating, the oxide semiconductor films 17a and 17 When hydrogen, water, or the like is contained in the oxide semiconductor films 17a and 17b in this step, Hydrogen, water, and the like contained in the oxide semiconductor films 17a and 17b can be desorbed. The oxygen radicals generated in the plasma combine with the oxygen radicals to form water. Since the substrate is heated during the process, the water generated by the combination of oxygen and hydrogen is That is, the oxide insulating film is formed by the plasma CVD method. By forming the film 22, the contents of water and hydrogen contained in the oxide semiconductor films 17a and 17b are can be reduced.

[0216] In addition, since heating is performed in the process of forming the oxide insulating film 22, the oxide semiconductor film 17a In addition, the heating time in the state where 17b is exposed is short, and the heat treatment can prevent the oxide semiconductor film from being damaged. That is, the amount of oxygen released from the oxide semiconductor films 17a and 17b can be reduced. This can reduce the amount of oxygen vacancies.

[0217] Furthermore, by setting the pressure in the treatment chamber to 100 Pa or more and 250 Pa or less, the oxide insulating film Since the water content in the transistor 400a and the transistor 4 This reduces the variation in the electrical characteristics of 00b and suppresses the fluctuation in the threshold voltage. Cut.

[0218] In addition, by setting the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, the oxide insulating film 22 When forming the oxide semiconductor films 17a and 17b, damage to the oxide semiconductor films 17a and 17b can be reduced. This can reduce the amount of oxygen vacancies in the oxide semiconductor films 17a and 17b. , the deposition temperature of the oxide insulating film 22 or the oxide insulating film 24 to be formed later is increased. In particular, by setting the temperature to be higher than 220° C., the oxide semiconductor films 17 a and 17 b can be easily oxidized. In addition, in order to improve the reliability of transistors, Therefore, when the film formation conditions for reducing the number of defects in the oxide insulating film 24 to be formed later are used, the amount of oxygen As a result, the amount of oxygen vacancies in the oxide semiconductor films 17a and 17b is reduced. However, it may be difficult to maintain the pressure in the processing chamber at 100 Pa or more and 250 Pa or less. The following is a description of the damage to the oxide semiconductor films 17a and 17b during the formation of the oxide insulating film 22. By reducing the amount of oxygen released from the oxide insulating film 24, the oxide semiconductor film 17 can be formed. It is possible to reduce oxygen vacancies in 17a and 17b.

[0219] In addition, by increasing the amount of oxidizing gas to 100 times or more the amount of deposition gas containing silicon, It is possible to reduce the hydrogen content in the oxide insulating film 22. Since the amount of hydrogen mixed into the semiconductor films 17a and 17b can be reduced, the threshold voltage of the transistor can be reduced. It is possible to suppress the negative shift in pressure.

[0220] Here, the oxide insulating film 22 is made of silane at a flow rate of 30 sccm and 4000 sccm. The source gas was nitrous oxide with a flow rate of 1.0 cm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220°C. A 27.12MHz high-frequency power source was used to supply 150W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 50 nm is formed by the plasma CVD method under the following conditions. In this manner, a silicon oxynitride film through which oxygen is transmitted can be formed.

[0221] The oxide insulating film 24 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is kept at a temperature of 180° C. or higher and 280° C. or lower, more preferably 200° C. or higher and 240° C. or lower. The raw material gas is introduced into the processing chamber to set the pressure in the processing chamber at 100 Pa or more and 250 Pa or less. More preferably, the pressure is set to 100 Pa or more and 200 Pa or less. .17W / cm 2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 End 0.35W / cm 2 Under the following conditions of high frequency power supply, silicon oxide film or oxide A silicon nitride film is formed.

[0222] As the source gas of the oxide insulating film 24, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0223] The oxide insulating film 24 is formed under the conditions of high frequency irradiation with the above power density in a reaction chamber with the above pressure. Supplying microwave power increases the efficiency of decomposing the source gas in the plasma, and oxygen radicals are increased. As the oxidation of the source gas proceeds, the oxygen content in the oxide insulating film 25 becomes stoichiometric. On the other hand, in the film formed at the substrate temperature, the composition of silicon and oxygen is Since the bonding strength is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. It contains more oxygen than the stoichiometric composition, and some of the oxygen is released by heating. In addition, the oxide insulating film 2 can be formed over the oxide semiconductor film 17. Therefore, in the process of forming the oxide insulating film 24, the oxide insulating film 2 2 serves as a protective film for the oxide semiconductor film 17. As a result, damage to the oxide semiconductor film 17 is prevented. Therefore, the oxide insulating film 24 can be formed by using high-frequency power with high power density while reducing the Cut.

[0224] Here, the oxide insulating film 24 is made of silane at a flow rate of 200 sccm and SiO at a flow rate of 4000 s. The source gas was nitrous oxide (N2O) at 1.0 ccm, the pressure in the reaction chamber was 200 Pa, and the substrate temperature was 220°C. A 27.12MHz high-frequency power source was used to apply 1500W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 400 nm is formed by the supplied plasma CVD method. The plasma CVD device has an electrode area of ​​6000 cm 2 Parallel plate plasma CVD The power supplied to the device is converted to power per unit area (power density) of 0.25W. / cm 2 It is.

[0225] Next, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher and 400° C. or lower. The temperature is preferably 300°C or higher and 400°C or lower, and more preferably 320°C or higher and 370°C or lower.

[0226] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.

[0227] Heat treatment is carried out in a vacuum of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). pm or less, preferably 10 ppb or less air), or rare gases (argon, helium, etc.) In addition, the above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be mixed with hydrogen, water, or the like. It is preferable that the above is not included.

[0228] By this heat treatment, part of oxygen contained in the oxide insulating film 24 is oxidized to the oxide semiconductor film 17a 17b, thereby further reducing the amount of oxygen vacancies in the oxide semiconductor films 17a and 17b. It is possible.

[0229] In the case where the oxide insulating film 22 and the oxide insulating film 24 contain water, hydrogen, or the like, When a heat treatment is performed after forming the nitride insulating film 26 having a blocking function, etc., Water, hydrogen, and the like contained in the oxide insulating film 22 and the oxide insulating film 24 are absorbed in the oxide semiconductor film 17a , and migrate to 17b, causing defects in the oxide semiconductor films 17a and 17b. By performing the heat treatment before the formation of the nitride insulating film 26, the oxide insulating film 22 and the oxide It is possible to remove water, hydrogen, etc. contained in the oxide insulating film 24, and the transistor 40 0a, the variation in the electrical characteristics of the transistor 400b is reduced, and the variation in the threshold voltage is also reduced. This can suppress movement.

[0230] The oxide insulating film 24 is formed on the oxide insulating film 22 while being heated. Oxygen is transferred to the oxide semiconductor films 17a and 17b, and the oxygen contained in the oxide semiconductor films 17a and 17b is Since oxygen vacancies can be reduced, the heat treatment does not have to be performed.

[0231] Here, heat treatment is performed in a nitrogen and oxidizing atmosphere at 350° C. for 1 hour.

[0232] In addition, when forming the pair of electrodes 20a and 20b and the pair of electrodes 20c and 20d, a conductive film The oxide semiconductor films 17a and 17b are damaged by the etching. The back channels of the oxide semiconductor films 17a and 17b (the gate electrodes However, oxygen deficiency occurs on the surface opposite to the surface facing the electrodes 13a and 13b. The insulating film 24 is made of an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. This makes it possible to reduce oxygen vacancies that occur on the back channel side due to heat treatment. This can improve the reliability of the transistors 400a and 400b.

[0233] Next, a nitride insulating film that will later become the nitride insulating film 27 is formed by a sputtering method, a CVD method, or the like. The velum 26 is formed.

[0234] When the nitride insulating film 26 is formed by the plasma CVD method, the The substrate placed in the evacuated processing chamber is heated to 300° C. or higher and 400° C. or lower, more preferably A temperature of 320° C. or higher and 370° C. or lower is preferable because a dense nitride insulating film can be formed. stomach.

[0235] When a silicon nitride film is formed as the nitride insulating film 26 by the plasma CVD method, the silicon It is preferable to use a deposition gas containing carbon, nitrogen, and ammonia as the source gas. By using a small amount of ammonia as the source gas compared to nitrogen, ammonia is generated in the plasma. Ni dissociates and generates active species. The active species are contained in the deposition gas containing silicon. The bond between silicon and hydrogen and the triple bond between nitrogen are broken. As a result, silicon and nitrogen The bonding of silicon and hydrogen is promoted, resulting in fewer defects and a dense silicon nitride. On the other hand, the amount of ammonia relative to nitrogen in the source gas is If the amount is too large, the decomposition of the deposition gas containing silicon and nitrogen does not proceed, and silicon and hydrogen Bonds remain, resulting in a silicon nitride film with increased defects and a rough surface. For these reasons, the flow rate ratio of nitrogen to ammonia in the raw gas is set to 5 to 50. It is preferably 10 or more and 50 or less.

[0236] Here, silane at a flow rate of 50 sccm and 5000 The source gases were nitrogen at a flow rate of 100 sccm and ammonia at a flow rate of 100 sccm. The pressure in the processing chamber was The pressure was set at 100 Pa, the substrate temperature was set at 350°C, and a 27.12 MHz high frequency power source was used for 1000 The nitride insulating film 26 and the The plasma CVD device has an electrode area of ​​1000 nm. 6000cm 2 This is a parallel plate type plasma CVD device, and the power supplied is divided into This is converted to power per unit area (power density) of 1.7 x 10 -1 W / cm 2 It is.

[0237] Through the above steps, the oxide insulating film 22, the oxide insulating film 24, and the nitride insulating film 26 are formed. It can be achieved.

[0238] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 40° C. or lower. 0°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower Let us assume that.

[0239] Next, a fourth photomask is used to form a photoresist film on the nitride insulating film 26. After forming a mask, the insulating film 14, the oxide insulating film 22, and the oxide insulating film 23 are formed using the mask. The insulating film 15 and the oxide insulating film 24 and the nitride insulating film 26 are each partially etched. An insulating film 28 composed of an insulating film 23, an oxide insulating film 25, and a nitride insulating film 27 is formed. The insulating film 28 is formed as shown in FIG. As shown by A1-B1 in (B), an opening 41 is provided. 8 is a cross-sectional view of the transistor 400a in the channel width direction taken along line C1-D1 in FIG. As shown in FIG.

[0240] Next, as shown in FIG. 6(A), a conductive film 30 which will later become a gate electrode 31 and an electrode 32 is formed. Form.

[0241] The conductive film 30 is formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

[0242] Here, a 100 nm thick ITO film is formed as the conductive film 30 by sputtering. do.

[0243] Next, a mask is formed on the conductive film 30 by a photolithography process using a fifth photomask. Next, a part of the conductive film is etched using the mask to form a gate electrode 31. and the electrode 32. After that, the mask is removed.

[0244] As shown in FIG. 6B, in the transistor 400a, The oxide semiconductor film 17a is formed on the side surface of the opening provided in the insulating film 15 and the insulating film 28. A gate electrode 31 is formed so as to face the side surface.

[0245] Through the above steps, the transistor 400a and the transistor 400b can be manufactured. can.

[0246] The transistor described in this embodiment has a structure in which a semiconductor layer overlaps an oxide semiconductor film that functions as a channel region. By convoluting the above, an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition is formed. As a result, oxygen from the oxide insulating film can be moved to the oxide semiconductor film. The amount of oxygen vacancies contained in the oxide semiconductor film can be reduced, and the oxide semiconductor film can be highly reliable. It becomes a transistor.

[0247] In addition, in the transistor 400a that functions as a driving transistor for the light-emitting element, In the width direction of the gate electrode 31, an opening 4 is provided in the insulating film 15 and the insulating film 28. The side surfaces of the oxide semiconductor film 17a and the oxide semiconductor film 17b are opposed to each other. The side surface of the oxide semiconductor film 17a is also affected by the electric field of the gate electrode 31. Carriers flow over a wide range of a, increasing the field-effect mobility of the transistor. At the same time, the on-current increases.

[0248] In addition, the channel length of the transistor 400a functioning as a driving transistor of the light-emitting element is The thickness is 0.5 μm or more and 4.5 μm or less, preferably 1 μm or more and 4 μm or less, more preferably or more than 1 μm and not more than 3.5 μm, more preferably more than 1 μm and not more than 2.5 μm. By setting the thickness of the first and second electrodes at the positions 111 and 112, it is possible to further increase the field effect mobility of the transistor. This makes it possible to realize high speed driving of the display device.

[0249] The channel length of the transistor 400b functioning as the selection transistor of the pixel is set to By making it larger than the transistor 400a, it is possible to reduce the cutoff current. This makes it possible to realize a display device with low power consumption.

[0250] As described above, a display device including a transistor having an oxide semiconductor film and having electrical characteristics In addition, a display device having a transistor including an oxide semiconductor film can be obtained. In such a display device, a highly reliable display device can be obtained.

[0251] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0252] <Display Device Variation 1> A display device having a structure different from that shown in FIG. 2 will be described with reference to FIG. 7. The display device shown in FIG. A transistor 410a functions as a drive transistor, and a transistor 410b functions as a selection transistor. FIG. 7(A1) shows a pixel including a driving transistor 400b. FIG. 7A is a top view of a transistor 410a functioning as a selection transistor. FIG. 7B is a top view of a transistor 400b functioning as a transistor; 7(C) and the dashed line A3-B3 of FIG. 7(A2) and the dashed line A2-B2 of FIG. 7(A1) is a cross-sectional view taken along the dashed line C3-D3 in FIG. 7(A1), and FIG. 7(C2) is a cross-sectional view taken along the dashed line C3-D3 in FIG. 7(A1) and 7(A2). For clarity, the substrate 11 and insulating film are omitted.

[0253] In FIG. 7(A2), FIG. 7(B) and FIG. 7(C2), the transistor functions as a selection transistor. The transistor 400b has the same configuration as that shown in FIG. 2(A2), FIG. 2(B), and FIG. 2(C2). do.

[0254] The transistor 410a has a first side of the oxide semiconductor film 17a in the channel width direction. On the outer side of the surface, the gate electrode 13a and the gate electrode 51 are connected to each other, but the oxide semiconductor film On the outside of the other side surface of the gate electrode 17a, the insulating film 15 and the insulating film 28 are interposed between the gate electrode 1 The transistor 300 differs from the transistor 400a shown above in that the first and second electrodes 3a and 51 face each other.

[0255] The transistor 410a shown in FIG. 7A1, FIG. 7B, and FIG. 7C1 has a channel The transistor is an etched type transistor, and includes a gate electrode 13a provided on a substrate 11 and a and an insulating film 15 formed on the gate electrode 13a, and a gate electrode 1 An oxide semiconductor film 17a overlapping with the oxide semiconductor film 3a, and a pair of electrodes 20a in contact with the oxide semiconductor film 17a. The insulating film 15, the oxide semiconductor film 17a, and the pair of electrodes 20a 20b, an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27 are formed on the The gate electrode 51 is formed on the insulating film 28. is connected to the gate electrode 13a through an opening 42 provided in the insulating film 15 and the insulating film 28. In addition, the electrode 32 connected to one of the pair of electrodes 20a and 20b, in this case the electrode 20b, is formed on the insulating film 28. The electrode 32 functions as a pixel electrode.

[0256] The transistor 410a has a channel length of 0.5 μm or more and 4.5 μm or less, preferably 1 More preferably, the diameter is greater than 1 μm and less than 3.5 μm. The transistor 410a has a gate electrode 1. An oxide semiconductor film 17a is provided between the gate electrode 51 and the gate electrode 3a. As shown in FIG. 7(A1), the electrode 51 is formed by interposing an oxide semiconductor film 28 therebetween when viewed from above. It overlaps with the end of 17a.

[0257] Further, the insulating film 15 and the insulating film 28 have a plurality of openings. As shown in FIG. 1, the device has an opening 41 that exposes one of the pair of electrodes 20a and 20b. As shown in FIG. 7C1, one outer side of the side surface of the oxide semiconductor film 17a in the channel width direction In the embodiment, an opening 42 is provided in the insulating film 15 and the insulating film 28, and a gate electrode is formed in the opening 42. The gate electrode 51 and the gate electrode 13a are connected to each other. The oxide semiconductor film 17a is opposed to the side surface of the oxide semiconductor film 17a in the channel width direction. On the other outer side of the conductor film 17a in the channel width direction, the gate electrode 51 is The end of the gate electrode 51 is not connected to the electrode 13a. Located on the outside.

[0258] As shown in FIG. 7C1, the insulating film 15 and the insulating film 2 The distance between the end of the gate electrode 51 projected onto the interface of the oxide semiconductor film 17a and the side of the oxide semiconductor film 17a. d is 1 or more times the sum of the thickness t1 of the insulating film 15 and the thickness t2 of the insulating film 28. It is preferable that the distance d is equal to or smaller than the thickness t1 of the insulating film 15 and the thickness t When the thickness of the gate electrode 51 is equal to or larger than the sum of the thicknesses of the oxide semiconductor film 17a and the gate electrode 51, the electric field of the gate electrode 51 is Since the side surface of the oxide semiconductor film 17a is affected, or the end portion including the side surface and the vicinity thereof, The occurrence of parasitic channels at the surface or edge can be suppressed. When the thickness t1 of the film 15 and the thickness t2 of the insulating film 28 are 7.5 times or less of the total thickness, The area of ​​the transistor can be reduced.

[0259] Next, a manufacturing process of the transistor 410a will be described.

[0260] 3 to 5A, a gate electrode 13a, an insulating film 14, and an oxide film 15 are formed on a substrate 11. a semiconductor film 17a, a pair of electrodes 20a and 20b, an oxide insulating film 22, an oxide insulating film 24, and a nitride insulating film 26. In this process, the first photomask A photolithography process is performed using a third photomask.

[0261] Next, a photolithography process using a fourth photomask is performed on the nitride insulating film 26. After forming a mask, the insulating film 14, the oxide insulating film 22, the oxide insulating film 24, and the nitride A part of the insulating film 26 is etched to obtain the insulating film 26 shown in FIG. 7(A1), FIG. 7(B) and FIG. 7(C1). Openings 41 and 42 are formed.

[0262] Next, a conductive film 30 is formed in the same manner as in the process shown in FIG. After forming a mask on the conductive film 30 by a photolithography process using a mask, 7(A1), 7(B) and 7(C1) are formed by etching a part of 30. The pole 51 and the electrode 32 are formed.

[0263] Through the above steps, the transistor 410a can be manufactured.

[0264] <Modification 2 of the display device> A display device having a structure different from those shown in FIG. 2 and FIG. 7 will be described with reference to FIG. 8. The display device includes a transistor 420a that functions as a drive transistor and a select transistor 420b that functions as a select transistor. FIG. 8(A1) shows a pixel including a driving transistor 400b. FIG. 8A is a top view of a transistor 420a functioning as a transistor. FIG. 8B is a top view of a transistor 400b functioning as a transistor. 8(A1) and the dashed line A2-B2 of FIG. 8(A2); FIG. 8(C1) is a cross-sectional view taken along the dashed line C4-D4 in FIG. 8(A1), and FIG. 8(C2) is 8(A2) is a cross-sectional view taken along the dashed line C2-D2 in FIG. In A2), for clarity, the substrate 11 and insulating film are omitted.

[0265] In FIG. 8(A2), FIG. 8(B) and FIG. 8(C2), the transistor functions as a selection transistor. The transistor 400b has the same configuration as that shown in FIG. 2(A2), FIG. 2(B), and FIG. 2(C2). In addition, in FIG. 8(A1), FIG. 8(B) and FIG. 8(C1), The functioning transistor 420a has a gate electrode 13a and a gate electrode 64 formed on the conductive film 62. 4. The transistor 410a differs from the transistor 410a shown above in that it is connected via

[0266] The transistor 420a shown in FIGS. 8A1, 8B, and 8C1 has a channel edge A gate electrode 13a is provided on the substrate 11, and the substrate 11 and An insulating film 15 is formed on the gate electrode 13a, and the gate electrode 13a is formed with the insulating film 15 interposed therebetween. and a pair of electrodes 20a and 20b in contact with the oxide semiconductor film 17a. In addition, the insulating film 15, the oxide semiconductor film 17a, and the pair of electrodes 20a and 2 An insulating film consisting of an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27 is formed on the insulating film 0b. The insulating film 28 and the gate electrode 64 formed on the insulating film 28. The gate electrode 64 is The gate electrode 13a is connected to the pair of electrodes 20a and 20b via a conductive film 62. On the other hand, here, an electrode 32 connected to the electrode 20b is formed on the insulating film 28. The reference numeral 32 functions as a pixel electrode.

[0267] The transistor 420a has a channel length of 0.5 μm or more and 4.5 μm or less, preferably 1 More preferably, the diameter is greater than 1 μm and less than 3.5 μm. The thickness of the transistor 420a is preferably greater than 1 μm and less than 2.5 μm. An oxide semiconductor film 17a is provided between the electrode 13a and the gate electrode 64. As shown in FIG. 8(A1), the gate electrode 64 is formed of an oxide semiconductor via an insulating film 28 when viewed from above. It overlaps with the end of the conductive film 17a.

[0268] Moreover, the insulating film 15 and the insulating film 28 have a plurality of openings. As shown, an opening exposing one of the pair of electrodes 20a, 20b of the transistor 420a 8(C1), an opening 61 is provided in the insulating film 15. In this case, the conductive film 62 is connected to the gate electrode 13a. 0a and 20b are formed at the same time. In addition, in the opening 63 provided in the insulating film 28, The gate electrode 64 is connected to the conductive film 62. The gate electrode 13a and the gate electrode 64 are electrically connected to each other. The conductive film 62, which has a potential, faces the side surface of the oxide semiconductor film 17a.

[0269] Note that as shown in FIG. 8C1, the transistor 420a has an oxide semiconductor film 17a. The gate electrode 13a and the gate electrode 64 are disposed only on one of the outer sides of the side surfaces in the channel width direction. are connected via the conductive film 62, but both of the side surfaces of the oxide semiconductor film 17a in the channel width direction are Even if the gate electrode 13a and the gate electrode 64 are connected to each other through the conductive film 62 on the outside of the gate electrode 13a, good.

[0270] Next, a manufacturing process of the transistor 420a will be described.

[0271] Through the process of FIG. 3, a gate electrode 13a, an insulating film 14, and an oxide semiconductor In this step, a first photomask and a second photomask are used to form a film 17a. A photolithography process is performed using the above method.

[0272] Next, a mask is formed on the insulating film 14 by a photolithography process using a third photomask. After forming the mask, a part of the insulating film 14 is etched to obtain the structure shown in FIG. 8(A1) and FIG. 8(C1). An opening 61 is formed as shown.

[0273] Next, similarly to the steps shown in FIG. 4(A) and FIG. 4(B), a fourth photomask is used to perform a film forming process. After forming a mask on the conductive film 18 by a photolithography process, a part of the conductive film 18 is etched. A pair of electrodes 20a, 20b and a conductive film 62 are formed by etching.

[0274] Next, similarly to the step shown in FIG. 5A, the oxide insulating film 22, the oxide insulating film 24, and the nitride semiconductor layer A nitride insulating film 26 is then formed. Next, a photolithography process is performed using a fifth photomask. After forming a mask on the nitride insulating film 26 by etching, a part of the nitride insulating film 26 is As a result, the opening 63 shown in FIG. 8(A1) and FIG. 8(C1) is formed.

[0275] Next, a conductive film 30 is formed in the same manner as in the process shown in FIG. After forming a mask on the conductive film 30 by a photolithography process using a mask, 30 is etched to form the gate electrodes shown in FIG. 8(A1), FIG. 8(B) and FIG. 8(C1). The electrode 64 and the electrode 32 are formed.

[0276] Through the above steps, the transistor 420a can be manufactured.

[0277] <Display Device Modification 3> A display device having a structure different from those shown in FIGS. 2, 7, and 8 will be described with reference to FIG. 11. The display device shown in FIG. 1 includes a transistor 430a functioning as a driving transistor and a selection transistor 430b functioning as a selection transistor. The pixel includes a transistor 430b that functions as a transistor. 11( ) is a top view of a transistor 430 a functioning as a driving transistor, A2) is a top view of a transistor 430b functioning as a selection transistor, and FIG. 1(B) is a dashed line A5-B5 in FIG. 11(A1) and a dashed line A6- 11(C1) is a cross-sectional view of B6, and FIG. 11(C1) is a cross-sectional view taken along dashed line C5-D5 in FIG. 11(A1). FIG. 11C2 is a cross-sectional view taken along dashed line C6-D6 in FIG. 11A2. In addition, in order to clarify the drawings, the substrate, insulating film, etc. are omitted in FIG. 11(A1) and FIG. 11(A2). is doing.

[0278] The transistor 430a shown in FIG. 11A1, FIG. 11B, and FIG. 11C1 is a An electrode 77 connected to one of the pair of electrodes 20a, 20b is formed on the insulating film 15. The oxide semiconductor film 17a and the pair of electrodes 20a and 20b are provided with a pair of electrodes 20a and 20b. It differs from the other driving transistors shown above in that it has an insulating film 74a.

[0279] In addition, the transistor 430b shown in FIG. The oxide semiconductor film 17b and the pair of electrodes 20c and 20d are separated for each transistor. The transistor 400 differs from the previously described transistor 400b in that it has a insulating film 74b.

[0280] The transistor 430a shown in FIG. 11A1, FIG. 11B, and FIG. 11C1 is a transistor The transistor is a channel etch type transistor, and includes a gate electrode 13a provided on a substrate 11 and a An insulating film 15 is formed on the plate 11 and the gate electrode 13a. An oxide semiconductor film 17a overlapping with the electrode 13a, and a pair of electrodes in contact with the oxide semiconductor film 17a The insulating film 15, the oxide semiconductor film 17a, and the pair of electrodes 20a and 20b are also included. On the first and second insulating layers 20a and 20b, an oxide insulating film 71a, an oxide insulating film 72a, and a nitride insulating film 73 are formed. a functioning as a gate insulating film, and a nitride insulating film. The gate electrode 76 is formed on the insulating film 15a. The pair of electrodes 15a is connected to the gate electrode 13a through an opening 75 formed in the pair of electrodes 15a. An electrode 77 connected to one of the electrodes 20a and 20b, ie, the electrode 20b in this case, is formed on the insulating film 15. The electrode 77 functions as a pixel electrode.

[0281] In addition, the transistor 430b shown in FIG. 1, a channel etch type transistor is provided on a substrate 11. An insulating film 15 is formed on the substrate 11 and the gate electrode 13b. The oxide semiconductor film 17b overlaps with the gate electrode 13b, and a pair of oxide semiconductor films 17b are in contact with the oxide semiconductor film 17b. The insulating film 15, the oxide semiconductor film 17b, and a pair of electrodes 20c and 20d are also included. On the electrodes 20c and 20d, an oxide insulating film 71b, an oxide insulating film 72b, and a nitride insulating film are formed. and an insulating film 74b formed of the insulating film 73b.

[0282] The insulating film 15 included in the transistors 430a and 430b is a nitride insulating film 15a and an oxide insulating film 15b. The oxide insulating film 15b is made of an oxide semiconductor film 17a, a pair of The regions overlapping the electrodes 20a and 20b and the oxide insulating film 71a, the oxide semiconductor film 17b, The insulating film 71b is formed in a region overlapping the pair of electrodes 20c and 20d and the oxide insulating film 71b.

[0283] The insulating films 74a and 74b are separated for each transistor and are made of oxide semiconductor. Specifically, the transistor shown in FIG. In the channel length direction of 430a, the end of the insulating film 74a is formed on the pair of electrodes 20a and 20b. In the channel width direction of the transistor 430a shown in FIG. The end of the insulating film 74a is located outside the semiconductor film 17a. In the channel length direction of the transistor 430b, an insulating film 7 is formed on the pair of electrodes 20c and 20d. 11C2 in the channel width direction of the transistor 430b. In addition, an end portion of the insulating film 74b is located outside the oxide semiconductor film 17b.

[0284] In addition, in the channel width direction shown in FIG. 11(C1), the gate electrode 76 is The insulating film 74a functions as a film, and the insulating film 74a has a side surface facing the side surface of the oxide semiconductor film 17a. The end of the insulating film 74a is located on the pair of electrodes 20a and 20b in the channel length direction. The electrode 77 may be provided on the insulating film 15 instead of on the insulating film 74a. and one of the pair of electrodes 20a, 20b in an opening of the insulating film 74a. Connect.

[0285] The transistor 430a has a channel length of 0.5 μm or more and 4.5 μm or less, preferably 1 More preferably, the diameter is greater than 1 μm and less than 3.5 μm. The thickness of the transistor 430a is preferably greater than 1 μm and less than 2.5 μm. In the width direction of the gate electrode 13a, the insulating film 15 and the insulating film 16 are disposed between the gate electrode 13a and the gate electrode 76. The oxide semiconductor film 17a is provided with the gate electrode 76 as shown in FIG. As shown in FIG. 1(A1), when viewed from above, the oxide semiconductor film 17a is formed with the insulating film 74a interposed therebetween. overlaps with the end.

[0286] In addition, the channel length of the transistor 430b is greater than that of the transistor 430a. This cuts off the transistor 430b, which functions as the selection transistor of the pixel. It is possible to reduce the value of the current.

[0287] In FIG. 11C1, the channel of the oxide semiconductor film 17a is The gate electrode 13a and the gate electrode 76 are connected only on one of the outer sides of the width direction. In this example, the oxide semiconductor film 17a is formed on both outer sides of the side surfaces in the channel width direction. Thus, the gate electrode 13a and the gate electrode 76 may be connected to each other.

[0288] Next, a method for manufacturing the transistors 430a and 430b will be described.

[0289] The transistors 430a and 430b are formed on the substrate 11 through the steps shown in FIG. On the top, gate electrodes 13a and 13b, an insulating film 14, oxide semiconductor films 17a and 17b, a pair of Electrodes 20a, 20b, a pair of electrodes 20c, 20d, an oxide insulating film 22, and an oxide insulating film 24 , and the nitride insulating film 26. In this process, the first to third photomasks are A photolithography process is performed using the photomask.

[0290] Next, in the process shown in FIG. 5(B), a fourth photomask is used to perform photolithography. After forming a mask on the nitride insulating film 26 by a deposition process, the oxide insulating film 22 and the oxide insulating film 23 are The insulating film 24 and the nitride insulating film 26 are partially etched to separate the transistors. In addition, when the insulating film 14 is a nitride insulating film and In the case where an oxide insulating film is laminated, the oxide insulating film 23 is etched and at the same time, part of the insulating film 14 is etched. As a result, as shown in FIG. 11(B), the nitride insulating film 15a and An insulating film 15 having a step formed by the oxide insulating film 15b is formed.

[0291] Thereafter, through the process shown in FIG. 6, the gate electrode 76 and the electrode 77 are formed.

[0292] Through the above steps, the transistors 430a and 430b can be manufactured.

[0293] <Display Device Variation 4> A display device having a structure different from those shown in FIGS. 2, 7, 8 and 11 will be described with reference to FIG. 9. 9A shows an equivalent circuit diagram of a pixel 602 included in the display device.

[0294] As shown in FIG. 9A, a pixel 602 of this modification includes a light emitting element 350 and a light emitting element 35 A transistor 400a functions as a drive transistor for 0 and a transistor 400b functions as a selection transistor. The transistor 400a and the transistor 450b function as a capacitor. The transistor 450b includes gate electrodes disposed above and below an oxide semiconductor film. This is a so-called dual-gate transistor.

[0295] The transistor 400a included in the pixel 602 is shown in FIG. 1) and the configuration shown in FIG. 2(D).

[0296] FIG. 9B is a top view of a transistor 450b that functions as a selection transistor. FIG. 9(C) is a cross-sectional view taken along dashed line C9-D9 in FIG. 9(B), and FIG. 9(D) is 2A and 9B. 9B is a cross-sectional view taken along dashed line A9-B9. The insulating film and other parts are omitted.

[0297] The transistor 450b illustrated in FIG. 9 includes an oxide semiconductor film 17b and a gate insulating film 28. The fact that the selection transistor has a gate electrode 109 overlapping with the selection electrode 13b is the same as that of the other selection transistors shown above. is different.

[0298] The transistor 450b shown in FIG. 9 is a channel etch type transistor. A gate electrode 13b is provided on the substrate 11, and an insulating film is formed on the substrate 11 and the gate electrode 13b. an insulating film 15; an oxide semiconductor film 17b overlapping the gate electrode 13b with the insulating film 15 interposed therebetween; The insulating film 15 has a pair of electrodes 20c and 20d in contact with the oxide semiconductor film 17b. An oxide insulating film 23 and an oxide semiconductor film 24 are formed on the oxide semiconductor film 17b and the pair of electrodes 20c and 20d. The insulating film 22 functions as a gate insulating film and is composed of the nitride insulating film 25 and the nitride insulating film 27. The gate electrode 109 is formed on the insulating film 28 and the insulating film 15. The electrode 109 is gated through the openings 102 and 103 provided in the insulating film 15 and the insulating film 28. It is connected to the output electrode 13b.

[0299] The gate electrode 109 included in the transistor 450b is the same as that included in the transistor 400a. The gate electrode 31 is formed in the same layer as the gate electrode 31 .

[0300] Also, transistor 450b has at least a larger channel than transistor 400a. In addition, the gate electrode 13b and the gate electrode 109 have a channel width. The oxide semiconductor film 17b is provided therebetween with the insulating film 15 and the insulating film 28 interposed therebetween. As shown in FIG. 9B, the gate electrode 109 is formed in a state where the oxide film 28 is interposed between the gate electrode 109 and the insulating film 28 when viewed from above. The end of the second insulating film 17a overlaps with an end of the second insulating film 17b.

[0301] In the transistors 400a and 450b, an oxide semiconductor that has been processed into an island shape by etching or the like is At the edge of the conductive film, defects are formed due to damage during processing, and impurities are also formed. Therefore, the oxide semiconductor film in the transistor may be contaminated by adhesion or the like. When only one of the gate electrodes is formed on the upper or lower side of the oxide semiconductor Even if the body membrane is intrinsic or substantially intrinsic, it may be subject to stress such as an electric field. As a result, the end portions of the oxide semiconductor film are activated and tend to become n-type (low resistance regions). The n-type end is disposed between the pair of electrodes 20c and 20d as shown by the dashed lines 33 and 34 in FIG. 9(B). If such a region is provided, the n-type region becomes a path for carriers, forming a parasitic channel. As a result, the rise in drain current at the threshold voltage is gradual, and the threshold voltage This results in a transistor with a negative voltage shift.

[0302] However, the transistor 450b shown in FIG. 9 has gate electrodes 13b and In the channel width direction, the gate electrode 109 is sandwiched between the insulating film 28 The side surface of the gate electrode 109 faces the side surface of the oxide semiconductor film 17b. The field also affects the side surface of the oxide semiconductor film 17b. Alternatively, the occurrence of a parasitic channel at the end including the side surface and the vicinity thereof is suppressed. As a result, the transistor 450b has a steeper rise in drain current at the threshold voltage. The above description can be applied to a transistor having excellent electrical characteristics. Regarding the gate electrode 13a, the gate electrode 31, and the oxide semiconductor film 17a included in 400a, can also be applied.

[0303] The configuration of the display device of the present embodiment and the configuration of the display device of the modification described above are the same. Although the components are different, they can be freely combined.

[0304] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0305] (Embodiment 2) In this embodiment mode, a display device different from that in Embodiment Mode 1 and a manufacturing method thereof will be described with reference to the drawings. In this embodiment, oxygen vacancies in an oxide semiconductor film are further reduced. The transistor will be described with reference to FIGS.

[0306] FIG. 12 shows a top view and a cross-sectional view of a transistor included in a pixel of a display device of this embodiment mode. show.

[0307] The display device of this embodiment includes a transistor 440a functioning as a driving transistor and 1, and a transistor 440b functioning as a selection transistor. 2(A1) is a top view of a transistor 440a functioning as a driving transistor; FIG. 12A2 is a top view of a transistor 440b functioning as a selection transistor. FIG. 12(B) is a cross-sectional view taken along the dashed line A7-B7 in FIG. 12(A1) and FIG. 12(C1) is a cross-sectional view taken along the dashed line A8-B8 of FIG. 12(A1). 12(C2) is a cross-sectional view taken along the dashed line C8-D7 in FIG. 12(A2). 12(A1) and 12(A2) are cross-sectional views of the substrate 8 for the sake of clarity. The plate 11 and the insulating film are omitted.

[0308] The transistor 440a shown in FIG. 12(A1), FIG. 12(B), and FIG. 12(C1) is a transistor The transistor is a channel etch type transistor, and includes a gate electrode 13a provided on a substrate 11 and a An insulating film 15 is formed on the plate 11 and the gate electrode 13a. An oxide semiconductor film 17a overlapping with the electrode 13a, and a pair of electrodes in contact with the oxide semiconductor film 17a The insulating film 15, the oxide semiconductor film 17a, and the pair of electrodes 20a and 20b are also included. An oxide insulating film 83a, an oxide insulating film 85a, and a nitride insulating film 87 are formed on the first and second insulating films 20a and 20b. and a gate electrode 91 formed on the insulating film 88a. The gate electrode 91 is formed in an opening 96 provided in the insulating film 15 and the nitride insulating film 87. In addition, one of the pair of electrodes 20a and 20b, here the electrode 20 An electrode 92 connected to the nitride insulating film 87 is formed on the nitride insulating film 87. The electrode 92 is connected to the electrode 20b through an opening 95 provided in the pixel electrode 7. It functions as:

[0309] In addition, the transistor 440b shown in FIG. is a channel etch type transistor, and a gate electrode 13b is provided on a substrate 11. an insulating film 15 formed on the substrate 11 and the gate electrode 13b; and The oxide semiconductor film 17b overlaps with the gate electrode 13b, and a pair of oxide semiconductor films 17b in contact with the oxide semiconductor film 17b The insulating film 15, the oxide semiconductor film 17b, and the pair of electrodes 20c and 20d are also included. On the electrodes 20c and 20d, an oxide insulating film 83b, an oxide insulating film 85b, and a nitride insulating film 86 are formed. The insulating film 88b is made of the film 87.

[0310] In the transistor 440a, the insulating film 15 and the insulating film 88a are gate insulating films. In the transistor 440b, the insulating film 15 functions as a gate insulating film. The insulating film 15 is formed of a nitride insulating film 15a and an oxide insulating film 15b. The oxide insulating film 15b is formed by insulating the oxide semiconductor films 17a and 17b, the pair of electrodes 20a and 20b, and the It is formed in a region overlapping with either the pair of electrodes 20c, 20d or the oxide insulating film 83a. .

[0311] In the transistor 440b, the gate electrode 13b and the A second gate electrode may be provided in a region overlapping with the oxide semiconductor film 17b. The second gate electrode is formed in an opening provided in the insulating film 15 and the nitride insulating film 87. It is preferable to connect the second electrode 13b to the first electrode 13c.

[0312] In this embodiment, the nitride insulating film 15a is formed using a silicon nitride film. The oxide insulating film 15b can be formed using any of the oxides listed for the insulating film 15 in Embodiment 1. The nitride insulating film 15a and the oxide insulating film 15b may be formed of, The formation method of the insulating film 14 can be appropriately used. The oxide insulating film 83b is formed using a material and a method similar to those of the oxide insulating film 23 in Embodiment 1 as appropriate. The oxide insulating films 85a and 85b can be formed by the oxide insulating film 85a described in Embodiment 1. The nitride insulating film 25 can be formed by appropriately using the same material and manufacturing method as the nitride insulating film 25. The film 87 is formed by using the same material and the same method as the nitride insulating film 27 shown in the first embodiment. The gate electrode 91 and the electrode 92 can be formed in the same manner as in the gate electrode shown in Embodiment 1. The second electrode 31 and the second electrode 32 can be formed by using the same material and manufacturing method as those of the first electrode 31 and the second electrode 32.

[0313] The oxide insulating films 83a and 83b and the oxide insulating films 85a and 85b are The oxide semiconductor films 17a and 17b are overlapped with each other. In the cross-sectional view of the transistor 440a in the channel length direction shown in FIG. The ends of the oxide insulating film 83a and the oxide insulating film 85a are located on the pair of electrodes 20a and 20b. In the cross-sectional view of the transistor 440a in the channel width direction shown in FIG. The ends of the oxide insulating film 83a and the oxide insulating film 85a are located outside the oxide semiconductor film 17a. Similarly, in the cross-sectional view of the transistor 440b in the channel length direction shown in FIG. The ends of the oxide insulating film 83b and the oxide insulating film 85b are positioned on the pair of electrodes 20c and 20d. In the cross-sectional view of the transistor 440b in the channel width direction shown in FIG. Ends of the oxide insulating film 83b and the oxide insulating film 85b are located outside the oxide semiconductor film 17b. do.

[0314] The nitride insulating film 87 is formed by insulating films 83a and 83b and oxide insulating films 85a and 8 It is formed so as to cover the upper and side surfaces of 5b and is in contact with nitride insulating film 15a.

[0315] Note that in the transistor 440a, the oxide insulating film 83a and the oxide insulating film 85a The end portion is not provided on the pair of electrodes 20a, 20b in the channel length direction, but is provided on the nitride insulating layer. In the transistor 440b, the oxide insulating film The ends of the oxide insulating film 83b and the oxide insulating film 85b are connected to a pair of electrodes 20c, It may be provided on the nitride insulating film 15a instead of on 20d.

[0316] In addition, in the cross-sectional view of the transistor 440a in the channel width direction shown in FIG. The gate electrode 91 is connected to the oxide insulating film 83a via the side surfaces of the oxide insulating film 85a. The insulating layer 17a faces the side surface of the semiconductor film 17a.

[0317] The transistor 440a described in this embodiment has a channel length of 0.5 μm to 4.5 μm. ≦1 μm, preferably ≦4 μm, more preferably ≦1 μm, μm or less, and more preferably, greater than 1 μm and less than 2.5 μm. The insulating layer 440a is disposed between the gate electrode 13a and the gate electrode 91 in the channel width direction. An oxide semiconductor film 17a is provided via an insulating film 15 and an insulating film 88a. As shown in FIG. 12(A1), the electrode 91 is formed of an oxide film via an insulating film 88a when viewed from above. It overlaps with the end of the semiconductor film 17a.

[0318] In addition, the channel length of the transistor 440b is greater than that of the transistor 440a. This cuts off the transistor 440b, which functions as the selection transistor of the pixel. It is possible to reduce the value of the current.

[0319] As illustrated in FIG. 12C1, the transistor 440a has a channel of an oxide semiconductor film 17a. At one of the outer sides of the side surface in the width direction of the panel, an opening 96 in the insulating film 15 and the nitride insulating film 87 is formed. In the opening 96, the gate electrode 91 is in contact with the gate electrode 13a. The gate electrode 91 is connected to the oxide insulating films 83a and 85a on the side surfaces thereof. The oxide semiconductor film 17a is opposed to the side surface of the oxide semiconductor film 17a in the channel width direction. On the other outer side of the side surface in the width direction of the panel, the gate electrode 91 is connected to the gate electrode 13a. In addition, the end portion of the gate electrode 91 is located outside the side surface of the oxide semiconductor film 17a.

[0320] Note that in the transistor 440a, as shown in FIG. The gate electrode 13a and the gate electrode 91 is connected to the oxide semiconductor film 17a on both outer sides of the side surfaces in the channel width direction. Alternatively, the gate electrode 13a and the gate electrode 91 may be connected to each other.

[0321] In the transistor 440a or the transistor 440b in this embodiment, an oxide The semiconductor film 17a and the oxide insulating film 85a, or the oxide semiconductor film 17b and the oxide insulating film 8 The nitride insulating film 5b is surrounded by the nitride insulating film 15a and the nitride insulating film 87. The film 15a and the nitride insulating film 87 have a low oxygen diffusion coefficient and have a barrier property against oxygen. Therefore, part of the oxygen contained in the oxide insulating films 85 a and 85 b is efficiently absorbed into the oxide semiconductor film 1 The oxygen vacancies in the oxide semiconductor films 17a and 17b can be eliminated by using the oxygen vacancies in the oxide semiconductor films 17a and 17b. In addition, the nitride insulating film 15a and the nitride insulating film 87 can be formed without using water or The diffusion coefficient of hydrogen is low and it has barrier properties against water, hydrogen, etc., so it is difficult to protect the oxide semiconductor from the outside. It is possible to prevent the diffusion of water, hydrogen, etc. into the conductive films 17a and 17b. The transistor 440a and the transistor 440b are highly reliable transistors.

[0322] Next, a display device according to this embodiment including the transistor 440a and the transistor 440b will be described. The manufacturing process will be described with reference to FIGS.

[0323] In addition, in FIG. 13 to FIG. 15, the cross-sectional view in the channel length direction indicated by A7-B7 and the cross-sectional view in the channel length direction indicated by C7 A method for manufacturing the transistor 440a will be described with reference to a cross-sectional view in the channel width direction shown in FIG. A method for manufacturing the transistor 440b will be described using the cross-sectional view in the channel length direction shown in A8-B8. Explain.

[0324] In addition, in a cross-sectional view of the transistor 440b in the channel width direction, the gate The transistor 440a is the same as the transistor 440a except that it does not have a gate electrode 91 in contact with the electrode 13a. do.

[0325] The transistors 440a and 440b are formed by the steps shown in FIGS. Through similar steps, gate electrodes 13a and 13b, a nitride insulating film 15a, and an oxide film 16 are formed on the substrate 11. the oxide insulating film 14b, the oxide semiconductor films 17a and 17b, the pair of electrodes 20a and 20b, and the pair of electrodes 20a and 20b. In this process, the first photomask to the third photomask are formed. A photolithography process is carried out using a photomask.

[0326] Next, as shown in FIG. 13A, the oxide insulating film 22 and the oxide insulating film 24 are formed. Next, heat treatment is performed to remove part of oxygen contained in the oxide insulating film 24 from the oxide semiconductor film 1. The oxide semiconductor film 17a and the oxide semiconductor film 17b are transferred by the heat treatment. The amount of oxygen vacancies contained in the films 17a and 17b can be reduced.

[0327] Next, a fourth photomask is used in a photolithography process to form an oxide insulating film 24 After forming a mask on the oxide insulating film 22, a part of the oxide insulating film 24 is etched. The oxide insulating films 83a and 83b and the oxide insulating film 85a are separated for each transistor. , 85b are formed. In addition to the etching of the oxide insulating film 24, the oxide insulating film 14b As a result, a part of the insulating film 15b is formed as shown in FIG. As shown in the figure, the nitride insulating film 15a is exposed. That is, the insulating film 15 having a step is formed. can be.

[0328] Next, the nitride insulating film 86 shown in FIG. In the channel width direction cross-sectional view of the transistor 440a shown in FIG. The oxide semiconductor film 17a and the oxide insulating film 85a are in contact with each other. The periphery is surrounded by nitride insulating film 15 a and nitride insulating film 86 .

[0329] Although not shown, the nitride insulating film 86 is formed to form the transistor 440b. In the cross-sectional view in the channel width direction, the oxide semiconductor film 17b and the oxide insulating film 85b are The periphery is surrounded by a nitride insulating film 15 a and a nitride insulating film 86 .

[0330] Next, a nitride insulating film 86 is formed by a photolithography process using a fifth photomask. After forming a mask on the nitride insulating film 86, a portion of the nitride insulating film 86 is etched to form an opening 95. Furthermore, the nitride insulating film 15a and a part of the nitride insulating film 86 are etched to form an opening. 96 (see FIG. 14(B)).

[0331] Thereafter, as shown in FIG. 15(A), the gate electrode 91 and A conductive film 90 that becomes an electrode 92 is formed. The conductive film 90 is the same as the conductive film 30 shown in the first embodiment. can be formed similarly.

[0332] Next, a mask is formed on the conductive film 90 by a photolithography process using a sixth photomask. Next, a part of the conductive film 90 is etched using the mask to form a gate electrode. Then, the mask 91 and the electrode 92 are formed. After that, the mask is removed (see FIG. 15(B)).

[0333] As shown in FIG. 15B, in a cross-sectional view in the channel width direction of the transistor 440a, The oxide semiconductor film 17a is formed on the side surfaces of the oxide insulating film 83a and the oxide insulating film 85a. A gate electrode 91 is formed so as to face the side surface of the semiconductor substrate 90 .

[0334] After that, heat treatment may be performed. The nitride insulating film 15 is formed of an oxide insulating film containing more oxygen than the oxygen that fills the gap. a and the nitride insulating film 87 have high barrier properties against oxygen. In this case, the diffusion of oxygen contained in the oxide insulating films 85a and 85b to the outside can be reduced. In addition, the diffusion of oxygen contained in the oxide semiconductor films 17a and 17b to the outside can be reduced. As a result, oxygen vacancies in the oxide semiconductor films 17a and 17b can be reduced. Furthermore, the nitride insulating film 15a and the nitride insulating film 87 have a barrier property against hydrogen, water, etc. and reducing the diffusion of hydrogen, water, and the like from the outside into the oxide semiconductor films 17a and 17b. As a result, hydrogen, water, and the like in the oxide semiconductor films 17a and 17b can be reduced. As a result, the transistors 440a and 440b can be manufactured with high reliability. It is possible.

[0335] Through the above steps, a display device including the transistor 440a and the transistor 440b is manufactured. It can be made.

[0336] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0337] (Embodiment 3) In the selection transistor and the drive transistor shown in the first and second embodiments, If necessary, a base insulating film may be provided between the substrate 11 and the gate electrodes 13a and 13b. The base insulating film can be silicon oxide, silicon oxynitride, silicon nitride, or nitride. Silicon oxide, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, Aluminum oxide nitride, etc. are used as the base insulating film. Silicon nitride, gallium oxide, etc. By using hafnium oxide, yttrium oxide, aluminum oxide, etc., The diffusion of impurities, typically alkali metals, water, hydrogen, and the like, into the oxide semiconductor films 17a and 17b. This can suppress dispersion.

[0338] The base insulating film can be formed by a sputtering method, a CVD method, or the like.

[0339] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0340] (Embodiment 4) In this embodiment, the transistor 400a and the transistor 400b shown in FIG. The oxide semiconductor film 17a and the pair of electrodes 20a and 20b, the oxide semiconductor film 17b and A display device in which a pair of electrodes 20c, 20d have different shapes will be described with reference to FIG. Note that this embodiment mode can be applied to other transistors as appropriate.

[0341] The pair of electrodes provided in the transistor may be made of tungsten, titanium, aluminum, Conductive materials that easily bond with oxygen, such as copper, molybdenum, chromium, or tantalum alone or in alloys As a result, oxygen contained in the oxide semiconductor films 17a and 17b and The conductive material contained in the electrodes 20a to 20d is bonded to the oxide semiconductor films 17a and 17b. In addition, an oxygen deficiency region is formed in the oxide semiconductor films 17a and 17b. In some cases, some of the constituent elements of the conductive material forming 20d may be mixed in. As shown in FIG. 19, the oxide semiconductor films 17a and 17b are connected to the electrodes 20a to 20d. Low resistance regions 21a to 21d are formed in the vicinity of the contact region. The electrodes 21a and 21b are in contact with the pair of electrodes 20a and 20b, respectively, and are connected to the insulating film 15. The low resistance regions 21c and 21d are formed between the pair of electrodes 20a and 20b. The insulating film 15 is in contact with the pair of electrodes 20c and 20d. is formed in between.

[0342] The low-resistance regions 21a to 21d have high electrical conductivity and are therefore Therefore, the contact resistance with the electrodes 20a to 20d can be reduced, and the on-state of the transistor can be improved. The current can be increased.

[0343] The ends of the low resistance regions 21a and 21b are substantially aligned with the ends of the pair of electrodes 20a and 20b. Alternatively, as shown in FIG. 19, the pair of electrodes 20a and 20b may be provided on the inner side from the ends of the pair of electrodes 20a and 20b. The ends of the low resistance regions 21a and 21b may be located. Similarly, the low resistance regions 21c and 21d The ends of the electrodes 20c and 20d may be substantially aligned with the ends of the pair of electrodes 20c and 20d. In this way, the ends of the low resistance regions 21c and 21d are located inside the ends of the pair of electrodes 20c and 20d. In the oxide semiconductor films 17a and 17b, the low-resistance regions 21a to 21d may be located When the insulating film 28 is formed, the channel length is determined by the low resistance region at the interface between the oxide semiconductor film and the insulating film 28. The distance between them is 1.

[0344] The electrodes 20a to 20d are made of the conductive material that easily bonds with oxygen, titanium nitride, and Alternatively, the layer structure may be a laminate structure with a conductive material that is difficult to bond with oxygen, such as tantalum chloride or ruthenium. With such a stacked structure, the oxide insulating film 23 can be formed at the interfaces between the electrodes 20a to 20d. In this way, it is possible to prevent the electrodes 20a to 20d from being oxidized, and the high It is possible to suppress the development of resistance.

[0345] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0346] (Embodiment 5) In this embodiment, compared with Embodiments 1 to 4, defects in an oxide semiconductor film can be reduced. A display device having a transistor capable of further reducing the amount of The transistor described in this embodiment has a structure similar to that described in Embodiments 1 to 4. In comparison, the difference is that the semiconductor device has a multilayer film including a plurality of oxide semiconductor films.

[0347] 20A1 to 20C2 show a transistor 105a and a transistor The transistor 105a is included in a pixel. The transistor functions as a driving transistor of the light-emitting element. Reference numeral 105b denotes a transistor that functions as a selection transistor for the pixel.

[0348] FIG. 20(A1) is a top view of the transistor 105a, and FIG. 20(A2) is a top view of the transistor 105b. FIG. 20(B) is a top view of the rotor 105b along the dashed line A10-B10 in FIG. 20(C) is a cross-sectional view taken along the dashed line A11-B11 in FIG. 20(A2), and FIG. 1) is a cross-sectional view taken along the dashed line C10-D10 in FIG. 20(A1), and FIG. 20(C2) is 20(A2) is a cross-sectional view taken along dashed line C11-D11 in FIG. In FIG. 20(A2), for clarity, the substrate 11, the insulating film, and the like are omitted.

[0349] The transistors 105a and 105b included in the display device illustrated in FIG. The multilayer film 98a and the multilayer film 98b are provided between the insulating film 15 and the insulating film 28, respectively. In the display device shown in FIG. The other configurations are the same as those in FIG. 2, and the above explanation can be taken into consideration.

[0350] In the transistor 105a described in this embodiment, the multilayer film 98a is an oxide semiconductor film. The transistor 105b has a multilayer structure including a gate insulating film 17a and an oxide semiconductor film 97a. The multilayer film 98b includes an oxide semiconductor film 17b and an oxide semiconductor film 97b. The multilayer film 8a and the multilayer film 98b each have a two-layer structure.

[0351] In the transistor 105a, part of the oxide semiconductor film 17a functions as a channel region. In the transistor 105b, part of the oxide semiconductor film 17b functions as a channel region. In addition, an oxide insulating film 23 is formed so as to contact the multilayer film 98a and the multilayer film 98b. The oxide insulating film 25 is formed so as to be in contact with the oxide insulating film 23. an oxide semiconductor film 97a is provided between the oxide semiconductor film 17a and the oxide insulating film 23; and In addition, an oxide semiconductor film 97b is provided between the oxide semiconductor film 17b and the oxide insulating film 23. It is being done.

[0352] The oxide semiconductor films 97a and 97b are formed by adding one of the elements constituting the oxide semiconductor films 17a and 17b. The oxide semiconductor film 17a is an oxide semiconductor film composed of at least one of the above-mentioned elements. At the interface with the oxide semiconductor film 17b and the interface with the oxide semiconductor film 97b, Therefore, the movement of carriers is not hindered at the interface. This results in a high field effect mobility of the transistor.

[0353] The oxide semiconductor film applied to the oxide semiconductor films 97a and 97b (hereinafter, the oxide semiconductor film 97 ) is formed of a metal oxide containing at least In or Zn, and is typically In-G a-oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La , Ce, or Nd), and the oxide semiconductor applied to the oxide semiconductor films 17a and 17b The energy of the bottom of the conduction band is closer to the vacuum level than that of the oxide semiconductor film (hereinafter, the oxide semiconductor film 17). Typically, the energy of the bottom of the conduction band of the oxide semiconductor film 97 and the energy of the bottom of the conduction band of the oxide semiconductor film 17 are The difference in energy from the bottom of the conduction band is 0.05 eV or more, 0.07 eV or more, or 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or That is, the electron affinity of the oxide semiconductor film 97 and the electron affinity of the oxide semiconductor film 17 The difference between the electron affinity of is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less Below.

[0354] The oxide semiconductor film 97 contains In, and thus has high carrier mobility (electron mobility). Therefore, it is preferable.

[0355] The oxide semiconductor film 97 is formed by doping Al, Ga, Y, Zr, La, Ce, or Nd with In. By having a higher atomic ratio, the following effects can be obtained in some cases. (2) To increase the energy gap of the oxide semiconductor film 97. (3) The diffusion of impurities from the outside is reduced. (4) Compared with the oxide semiconductor film 17, This increases the insulation properties.

[0356] In addition, Ga, Y, Zr, La, Ce, and Nd are metal elements that have strong bonding strength with oxygen. Therefore, it is preferable to have Ga, Y, Zr, La, Ce, or Nd in a higher atomic ratio than In. This makes it difficult for oxygen deficiency to occur.

[0357] When the oxide semiconductor film 97 is an In-M-Zn oxide, In is The atomic ratio of M is less than 50 atomic % for In and 50 atomic % for M. More preferably, In is less than 25 atomic % and M is 75 atomic % or more. do.

[0358] The oxide semiconductor film 17 and the oxide semiconductor film 97 are made of In-M-Zn oxide (M is G a, Y, Zr, La, Ce, or Nd), compared with the oxide semiconductor film 17, The atomic ratio of M (Ga, Y, Zr, La, Ce, or Nd) contained in the compound semiconductor film 97 is Typically, the number of atoms is 1.5 times or more as large as the number of atoms contained in the oxide semiconductor film 17. , preferably at least two times, and more preferably at least three times, higher.

[0359] The oxide semiconductor film 17 and the oxide semiconductor film 97 are made of In-M-Zn oxide (M is A In the case of In:M, the oxide semiconductor film 97 is In:M :Zn=x 1 :y 1 :z 1 [Atomic ratio], oxide semiconductor film 17 is In:M:Zn=x 2 : y 2 :z 2 [Atomic ratio], y 1 / x 1 y 2 / x 2 and preferably y 1 / x 1 y 2 / x 2 More preferably, y 1 / x 1 y 2 / x 2 More preferably, y 1 / x 1 y 2 / x 2 More than three times In this case, in the oxide semiconductor film, y 2 x 2 If the oxide semiconductor is This is preferable because it can provide stable electrical characteristics to a transistor using a conductor film. 2 x 2 When the field-effect mobility of a transistor using the oxide semiconductor film is three times or more, Because the degree of 2 x2 It is preferable that the amount of the ion exchange resin is less than three times as large as that of the ion exchange resin.

[0360] The oxide semiconductor film 17 is an In-M-Zn oxide (M is Ga, Y, Zr, La, Ce, or In the case of the oxide semiconductor film 17, the target used for forming the oxide semiconductor film 17 is preferably made of gold or Nd. The atomic ratio of group elements is In:M:Zn=x 1 :y 1 :z 1 So, 、 x 1 / y 1 is 1 / 3 and 6 or less, furthermore, 1 or more and 6 or less, z 1 / y 1 is between 1 / 3 and 6, and is preferably 1 or more and 6 or less. 1 / y 1 By setting the value to 1 or more and 6 or less, The CAAC-OS film is easily formed as the oxide semiconductor film 17. Representative examples of atomic ratios are In:M:Zn=1:1:1 and In:M:Zn=1:1 :1.2, In:M:Zn=3:1:2, etc.

[0361] The oxide semiconductor film 97 is an In-M-Zn oxide (M is Ga, Y, Zr, La, Ce, or In the case of the oxide semiconductor film 97, the target used for forming the oxide semiconductor film 97 is preferably made of gold or Nd. The atomic ratio of group elements is In:M:Zn=x 2 :y 2 :z 2 So, 、 x 2 / y 2 <x 1 / y 1 Where z 2 / y 2 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. In addition, z 2 / y 2By setting the value of The C-OS film is easily formed. The typical atomic ratio of the metal elements in the target is as follows: In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3: 6, In:M:Zn=1:3:8, etc.

[0362] Note that the atomic ratios of the oxide semiconductor film 17 and the oxide semiconductor film 97 are each calculated using an error. The atomic ratios listed above may vary by ±40%.

[0363] The oxide semiconductor films 97a and 97b are formed by using an oxide insulating film 25 to be formed later. The oxide insulating film also functions as a film for mitigating damage to the oxide semiconductor films 17a and 17b. The insulating film 23 may not be provided, and the oxide insulating film 25 may be formed over the oxide semiconductor films 97a and 97b. stomach.

[0364] The thickness of the oxide semiconductor films 97a and 97b is 3 nm or more and 100 nm or less, preferably 3 nm or less. The length should be between m and 50 nm.

[0365] Similarly to the oxide semiconductor films 17a and 17b, the oxide semiconductor films 97a and 97b are, for example, For example, a non-single crystal structure may be used. The non-single crystal structure is, for example, CAAC-OS (CAAC-OS) described later. xis Aligned Crystalline Oxide Semiconductor tor), polycrystalline structure, microcrystalline structure (described below), or amorphous structure.

[0366] The oxide semiconductor films 97a and 97b may have, for example, an amorphous structure. The conductor film has, for example, a disordered atomic arrangement and no crystalline components. The oxide film has, for example, a completely amorphous structure and does not have any crystalline portions.

[0367] Note that the oxide semiconductor film 17 and the oxide semiconductor film 97 form an amorphous region and a microcrystalline region. Two or more of the following: a crystal structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, Two or more of the following: a region of a polycrystalline structure, a region of a CAAC-OS structure, and a region of a single crystal structure In addition, the mixed film may have regions of, for example, an amorphous structure, a microcrystalline structure, Two or more of the following: a region of a polycrystalline structure, a region of a CAAC-OS structure, and a region of a single crystal structure The layer structure may include a layered structure of the above regions.

[0368] Here, the oxide semiconductor film 17a and the oxide insulating film 23 are separated from each other by a thin film. and the oxide insulating film 23, an oxide semiconductor film 97a and an oxide semiconductor film 97b are provided between the first insulating film 21 and the oxide insulating film 23, respectively. Therefore, the oxide semiconductor film 97a and the oxide semiconductor film 97b are formed as an oxide insulating film. Even if a trap level is formed between the insulating film 23 and the semiconductor substrate 20 due to impurities and defects, the trap level is not generated. Between the region where the loop level is formed and the oxide semiconductor film 17a and the oxide semiconductor film 17b, As a result, the electrons flowing through the oxide semiconductor film 17a and the oxide semiconductor film 17b is less likely to be captured by the trap level, and the on-current of the transistor can be increased. In addition, the field effect mobility can be increased. When the electrons are released, they become negative fixed charges. As a result, the threshold voltage of the transistor However, the oxide semiconductor films 17a and 17b and the trap level Since there is a gap between the regions where the electrons are formed, the trapping of electrons at the trap level is reduced. It is possible to obtain a threshold voltage of the transistor 105a and the transistor 105b. Pressure fluctuations can be reduced.

[0369] In addition, the oxide semiconductor films 97a and 97b can block impurities from the outside. Therefore, the amount of impurities moving from the outside to the oxide semiconductor films 17a and 17b can be reduced. In addition, oxygen vacancies are unlikely to form in the oxide semiconductor films 97a and 97b. Therefore, the impurity concentration and the amount of oxygen vacancies in the oxide semiconductor films 17a and 17b can be reduced. is possible.

[0370] Note that the oxide semiconductor film 17 and the oxide semiconductor film 97 are not simply stacked. Continuous junction (here, a structure in which the energy at the bottom of the conduction band changes continuously between each film) In other words, trap centers and recombination centers are formed at the interfaces of each film. The layer structure is designed so that there are no impurities that would form defect levels such as the core. When impurities are present between the stacked oxide semiconductor film 17 and the oxide semiconductor film 97, The continuity of the energy band is lost, and carriers are trapped or recombined at the interface. And then it disappears.

[0371] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without exposing it to the air. Each chamber in the sputtering apparatus is required for the oxide semiconductor film. In order to remove impurities such as water as much as possible, an adsorption type vacuum pump such as a cryopump is used. High vacuum pump (5×10 -7 Pa~1×10 -4It is preferable to use a temperature of up to about 10 Pa. Alternatively, a turbo molecular pump and cold trap can be combined to separate the chamber from the exhaust system. It is preferable to prevent the backflow of gases into the bar, especially gases containing carbon or hydrogen. stomach.

[0372] In place of the multilayer films 98a and 98b, the transistors 106a and 106b shown in FIG. The transistor 106a may have multiple layers 94a and 94b, like the transistor 106b. is a transistor that functions as a driving transistor of the pixel, and transistor 106b is a transistor that functions as a selection transistor for the pixel.

[0373] The multilayer film 94a includes an oxide semiconductor film 99a, an oxide semiconductor film 17a, and an oxide semiconductor film The multilayer film 94b includes an oxide semiconductor film 99b, an oxide semiconductor film 97a, and an oxide semiconductor film 98b. The conductor film 17b and the oxide semiconductor film 97b are laminated in this order. The multilayer film 94a and the multilayer film 94b have a three-layer structure. In the transistor 106a, the oxide semiconductor film 17a is a channel In the transistor 106b, the oxide semiconductor film 17b functions as a channel region. It functions as:

[0374] In the transistors 106a and 106b, the insulating film 15 and the oxide The insulating film 15 and the oxide semiconductor film 99a and the oxide semiconductor film 99b are in contact with each other. Between the oxide semiconductor film 17a or the oxide semiconductor film 17b, an oxide semiconductor film 99a or an oxide semiconductor film 99b is formed. A compound semiconductor film 99b is provided.

[0375] The oxide semiconductor film 97a, the oxide semiconductor film 97b, and the oxide insulating film 23 are That is, the oxide semiconductor film 17a or the oxide semiconductor film 17b is in contact with the oxide insulating film 23. An oxide semiconductor film 97a or an oxide semiconductor film 97b is provided between the first and second electrodes.

[0376] The oxide semiconductor film applied to the oxide semiconductor films 99a and 99b (hereinafter, the oxide semiconductor film 9 For 9), a material and a formation method similar to those of the oxide semiconductor film 97 can be used as appropriate.

[0377] The oxide semiconductor film 99a and the oxide semiconductor film 99b are the oxide semiconductor films 17a and 17b, respectively. The oxide semiconductor film 99a and the oxide semiconductor film 17b preferably have a smaller thickness than the oxide semiconductor film 99a and the oxide semiconductor film 17b. The thickness of the semiconductor film 99b is set to 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less. This makes it possible to reduce the amount of variation in the threshold voltage of the transistor.

[0378] Note that, like the transistors 105a and 105b, the transistor 106 The oxide semiconductor films 97a and 97b included in the transistors 106a and 106b are formed later. A film for reducing damage to the oxide semiconductor films 17a and 17b when the oxide insulating film 25 is formed. For this reason, the oxide insulating film 23 is not provided, and the oxide semiconductor films 97a and 97b are An oxide insulating film 25 may be formed thereon.

[0379] The transistor described in this embodiment has an oxide semiconductor film in which a channel is formed. The oxide semiconductor film 17a and the oxide semiconductor film 17b are formed between the oxide insulating film 23 and the oxide semiconductor film 17a. The oxide semiconductor film 97a and the oxide semiconductor film 97b are provided. The oxide insulating film 23 is provided with a layer 97a and an oxide semiconductor layer 97b. Even if a trap state is formed by the oxide semiconductor film, the region where the trap state is formed and the oxide semiconductor film There is a gap between the oxide semiconductor film 17a and the oxide semiconductor film 17b. Electrons flowing through the oxide semiconductor film 17a and the oxide semiconductor film 17b are not easily captured by the trap level. It is possible to increase the on-current of the transistor and to enhance the field effect mobility. In addition, when an electron is captured in a trap level, the electron becomes a negative fixed charge. As a result, the threshold voltage of the transistor changes. The oxide semiconductor film 17b is separated from the region where the trap level is formed by the semiconductor film 17a and the oxide semiconductor film 17b. Since there is a gap between the trap levels, it is possible to reduce the number of electrons captured in the trap levels. This can reduce fluctuations in the low voltage.

[0380] The oxide semiconductor films 97a and 97b have a function of blocking the intrusion of impurities. and prevents impurities from entering the oxide semiconductor films 17a and 17b from the outside. In addition, the amount of material can be reduced by the oxide semiconductor film 97a and the oxide semiconductor film 97 For the above reasons, the transistor described in this embodiment has the following characteristics: The impurity concentrations and the amount of oxygen vacancies in the oxide semiconductor films 17a and 17b are reduced. It is possible to reduce

[0381] In addition, between the insulating film 15 and the oxide semiconductor film 17a and between the insulating film 15 and the oxide semiconductor film 17b, The oxide semiconductor film 99a and the oxide semiconductor film 99b are provided. The oxide semiconductor film 9 is disposed between the oxide semiconductor film 17a and the oxide insulating film 23. Therefore, the oxide semiconductor films 99a and 97b are provided. The concentration of silicon and carbon in the vicinity of the interface between the oxide semiconductor film 9b and the oxide semiconductor films 17a and 17b, and the oxide The concentration of silicon or carbon in the oxide semiconductor films 17a and 17b, or the concentration of the oxide semiconductor film 97a The concentrations of silicon and carbon in the vicinity of the interfaces between the oxide semiconductor films 17a and 17b and the oxide semiconductor films 17a and 17b are can be reduced.

[0382] The transistor according to the present embodiment having such a structure is formed by an oxide in which a channel is formed. Since there are very few defects in the multilayer film including the nitride semiconductor film, the electrical characteristics of the transistor are It is possible to improve the on-state current and the field effect mobility. It is possible. In addition, BT stress test and optical BT stress test, which are examples of stress tests, The amount of variation in threshold voltage is small, and reliability is high.

[0383] <Band structure of transistor> Next, the transistor 105 shown in FIG. a, and the multilayer film 98a provided in the transistor 106a shown in FIG. The band structure of the film 94a will be described with reference to FIG. The multilayer film 98b provided on the transistor 98a has the same structure as the multilayer film 98a. The multilayer film 94b provided on the substrate 106b has the same configuration as the multilayer film 94a. In the following description, the multilayer film 98a can be read as the multilayer film 98b. The film 94a can be read as a multilayer film 94b.

[0384] Here, for example, the oxide semiconductor film 17a has an energy gap of 3.15 eV. The oxide semiconductor film 97a is made of In-Ga-Zn oxide having an energy gap of The energy gap is 3.5 eV for In-Ga-Zn oxide. The measurement was performed using a thickness meter (HORIBA JOBIN YVON UT-300).

[0385] The vacuum level and the energy at the top of the valence band of the oxide semiconductor film 17a and the oxide semiconductor film 97a The ionization potentials (also called ionization potentials) were 8 eV and 8.2 eV, respectively. The energy difference between the vacuum level and the top of the valence band was measured using ultraviolet photoelectron spectroscopy (UPS). Traviolet Photoelectron Spectroscopy ( Measurements were taken using a PHI VersaProbe.

[0386] Therefore, the vacuum level and the conduction band minimum of the oxide semiconductor film 17a and the oxide semiconductor film 97a The energy difference (also called electron affinity) between these two electrons is 4.85 eV and 4.7 eV, respectively. I did.

[0387] FIG. 22(A) shows a schematic diagram of a part of the band structure of the multilayer film 98a. The insulating film 15 and the oxide insulating film 23 are silicon oxide films, and the multilayer film 98a and the silicon oxide film In addition, EcI1 shown in FIG. EcS1 represents the energy of the bottom of the conduction band of the oxide semiconductor film 17a, and EcS2 represents the energy of the bottom of the conduction band of the oxide semiconductor film 17a. EcS2 represents the energy of the bottom of the conduction band of the oxide semiconductor film 97a, EcI2 indicates the energy of the bottom of the conduction band of the silicon oxide film. 20(B), and EcI2 corresponds to the oxide insulating film 23 shown in FIG. Correct.

[0388] As shown in FIG. 22A, in the oxide semiconductor film 17a and the oxide semiconductor film 97a, The energy at the bottom of the conduction band changes smoothly without any barrier. In other words, it changes continuously. This is because the multilayer film 98a and the oxide semiconductor film 17a share the same element. The oxide semiconductor film 17a and the oxide semiconductor film 97a are formed of a silicon oxide. This can be said to be because a mixed layer is formed by the

[0389] As shown in FIG. 22A, the oxide semiconductor film 17a of the multilayer film 98a serves as a well. In the transistor using the layer film 98a, a channel region is formed in the oxide semiconductor film 17a. It can be seen that the energy of the conduction band minimum changes continuously in the multilayer film 98a. Therefore, the oxide semiconductor film 17a and the oxide semiconductor film 97a are continuously joined. I can say.

[0390] As shown in FIG. 22A, the boundary between the oxide semiconductor film 97a and the oxide insulating film 23 Although trap levels due to impurities or defects may be formed near the surface, the oxide semiconductor The film 97a is provided, and thus the trap levels are formed together with the oxide semiconductor film 17a. However, the energy difference between EcS1 and EcS2 is small. In this case, electrons in the oxide semiconductor film 17a exceed the energy difference and reach the trap level. When electrons are captured in the trap levels, a negative fixed charge is generated on the surface of the insulating film. Therefore, the threshold voltage of the transistor is shifted in the positive direction. The energy difference between EcS1 and EcS2 is 0.1 eV or more, preferably 0.15 eV or more. This is preferable because it reduces the fluctuation of the threshold voltage of the transistor and results in stable electrical characteristics. be.

[0391] FIG. 22(B) shows a schematic diagram of a part of the band structure of the multilayer film 98a. In this example, the insulating film 15 and the oxide insulating film 23 are oxidized. A case will be described in which a silicon film is used and the multilayer film 98a and a silicon oxide film are provided in contact with each other. In addition, EcI1 shown in FIG. 22(B) indicates the energy of the bottom of the conduction band of the silicon oxide film, EcS1 indicates the energy of the bottom of the conduction band of the oxide semiconductor film 17a, and EcI2 indicates the energy of the silicon oxide The energy of the conduction band minimum of the insulating film shown in FIG. 15, and EcI2 corresponds to the oxide insulating film 23 shown in FIG.

[0392] In the transistor shown in FIG. 20(B), when the pair of electrodes 20a and 20b are formed, In some cases, the upper portion of the film 98a, i.e., the oxide semiconductor film 97a, may be etched. The upper surface of the oxide semiconductor film 17a is the oxide semiconductor film 17a when the oxide semiconductor film 97a is formed. In some cases, a mixed layer of the oxide semiconductor film 97a and the oxide semiconductor film 97b may be formed.

[0393] For example, the oxide semiconductor film 17a is made of In, Ga, and Zn in an atomic ratio of 1:1:1. -Ga-Zn oxide, or In-Ga- with In:Ga:Zn=3:1:2 [atomic ratio] The oxide semiconductor film is formed by using Zn oxide as a sputtering target. The semiconductor film 97a is an In-Ga-Zn oxide film having an atomic ratio of In:Ga:Zn=1:3:2. In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:3:4, or In In-Ga-Zn oxide with an atomic ratio of Ga:Zn=1:3:6 was sputtered. In the case where the oxide semiconductor film is formed using the oxide semiconductor film 17a as a get, the oxide semiconductor film 17b is thicker than the oxide semiconductor film 17a. Since the semiconductor film 97a contains a large amount of Ga, the upper surface of the oxide semiconductor film 17a is covered with GaO x A layer or a mixed layer containing more Ga than the oxide semiconductor film 17a can be formed.

[0394] Therefore, even when the oxide semiconductor film 97a is etched, the E The energy of the bottom of the conduction band on the cI2 side becomes higher, and the band structure shown in Figure 22(B) appears. This may be the case.

[0395] When the band structure shown in FIG. 22(B) is obtained, when observing the cross section of the channel region, In some cases, the multilayer film 98a appears to be composed of only the oxide semiconductor film 17a. However, in reality, the oxide semiconductor film 17a has more Ga than the oxide semiconductor film 17a. Since a mixed layer containing a large amount of uranium is formed, the mixed layer can be regarded as the 1.5th layer. The mixed layer can be obtained by, for example, EDX analysis or the like, by determining the elements contained in the multilayer film 98a. When the element is measured, the composition above the oxide semiconductor film 17a can be analyzed to confirm the result. For example, the composition above the oxide semiconductor film 17a may be different from the composition in the oxide semiconductor film 17a. This can be confirmed by the fact that the Ga content is higher than that of the other alloys.

[0396] FIG. 22C is a schematic diagram showing a part of the band structure of the multilayer film 94a shown in FIG. Here, the insulating film 15 and the oxide insulating film 23 are silicon oxide films, and the multilayer film 94a and the oxide insulating film 23 are silicon oxide films. The case where a silicon oxide film is provided in contact with the silicon oxide film will be described. indicates the energy of the bottom of the conduction band of the silicon oxide film, and EcS1 indicates the energy of the bottom of the conduction band of the oxide semiconductor film 17a. EcS2 is the energy of the bottom of the conduction band of the oxide semiconductor film 97a. EcS3 represents the energy of the bottom of the conduction band of the oxide semiconductor film 99a, and EcI 2 indicates the energy of the bottom of the conduction band of the silicon oxide film. Also, EcI1 is the 21. EcI2 corresponds to the oxide insulating film 23 shown in FIG.

[0397] As shown in FIG. 22C, the oxide semiconductor film 99a, the oxide semiconductor film 17a, and the oxide In the compound semiconductor film 97a, the energy of the conduction band minimum changes smoothly without any barrier. In other words, it can be said that the oxide film changes continuously. The oxide semiconductor film 17a and the oxide semiconductor film 97 contain the same elements. It can be said that the reason is that a mixed layer is formed by the mutual movement of oxygen.

[0398] As shown in FIG. 22C, the oxide semiconductor film 17a of the multilayer film 94a serves as a well. In the transistor using the layer film 94a, a channel region is formed in the oxide semiconductor film 17a. It can be seen that the energy of the conduction band minimum changes continuously in the multilayer film 94a. Therefore, the oxide semiconductor film 99a, the oxide semiconductor film 17a, and the oxide semiconductor film 97a It can also be said that the two are continuously joined.

[0399] In addition, in the vicinity of the interface between the multilayer film 94a and the oxide insulating film 23, and in the vicinity of the interface between the multilayer film 94a and the insulating film 15 Although trap levels due to impurities or defects can be formed near the interface with the semiconductor, As shown in FIG. 1C, the oxide semiconductor films 97a and 99a are provided, so that the oxide semiconductor The conductive film 17a can be spaced apart from the region where the trap level is formed. However, E The energy difference between EcS1 and EcS2, and between EcS1 and EcS3, is small. In this case, electrons in the oxide semiconductor film 17a exceed the energy difference and reach the trap level. When electrons are captured in the trap levels, a negative fixed charge is generated on the surface of the insulating film. Therefore, the threshold voltage of the transistor is shifted in the positive direction. The energy difference between EcS1 and EcS2, and between EcS1 and EcS3, is 0.1e V or more, preferably 0.15 eV or more, the fluctuation of the threshold voltage of the transistor is small. This is preferable because it reduces the electric charge and provides stable electrical characteristics.

[0400] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0401] (Embodiment 6) In this embodiment, a transistor included in the semiconductor device described in the above embodiment is In this section, one embodiment applicable to an oxide semiconductor film will be described.

[0402] The oxide semiconductor film is preferably a CAAC-OS film. The S film has crystals with a c-axis orientation, but the crystals have clear grain boundaries (grain bows). The crystals with c-axis orientation cannot be etched. In the case of a channel-etch type transistor, the oxide used for forming a pair of electrodes is difficult to be broken. The amount of over-etching of the semiconductor film is small. As a result, the oxide semiconductor film is By forming the transistor from a film, a channel-etched transistor can be manufactured. The channel-etched transistor used as the driving transistor has a distance between a pair of electrodes, i.e. The channel length can be reduced to between 0.5 μm and 4.5 μm.

[0403] In addition, the oxide semiconductor film is formed by using an oxide semiconductor having a single crystal structure (hereinafter, referred to as a single crystal oxide semiconductor). ), a polycrystalline oxide semiconductor (hereinafter referred to as a polycrystalline oxide semiconductor), an oxide semiconductor having an amorphous structure (hereinafter referred to as a microcrystalline oxide semiconductor) (hereinafter referred to as an amorphous oxide semiconductor). -OS, single-crystalline oxide semiconductor, polycrystalline oxide semiconductor, microcrystalline oxide semiconductor, amorphous oxide The following describes semiconductors.

[0404] <caac-os> The CAAC-OS film is one of the oxide semiconductor films having multiple crystal parts. The crystals in the AC-OS film have a c-axis orientation. The area of ​​the crystals in the C-OS film is 2500 nm 2 More preferably, 5 μm or more 2 Below More preferably, 1000 μm or more 2 In addition, in the cross-sectional TEM image, By having a ratio of 50% or more, preferably 80% or more, and more preferably 95% or more, The resulting thin film has properties close to those of a crystal.

[0405] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed using a quartz crystal microscope, clear boundaries between crystal parts were observed, i.e. It is not possible to confirm the grain boundary. It can be said that the AAC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0406] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When the metal atoms are observed, it can be confirmed that they are arranged in layers in the crystal part. Each layer of the CAAC-OS film is formed on a surface on which the film is to be formed (also called a surface on which the film is to be formed) or on a concave surface on the upper surface. The shape reflects the convexity and is aligned parallel to the surface on which the CAAC-OS film is formed or the top surface. In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. " refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. This also includes cases where the angle is between 85° and 95°.

[0407] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.

[0408] When electron beam diffraction was performed on the CAAC-OS film, spots (bright spots) indicating orientation were observed. is observed.

[0409] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It can be seen that...

[0410] X-ray diffraction (XRD) of CAAC-OS film The structure of the CAAC-OS film was analyzed using the out-of-plane method. In the analysis, a peak may appear at a diffraction angle (2θ) of around 31°. This peak is I Since it is assigned to the (00x) plane (x is an integer) of the nGaZn oxide crystal, The crystals of the OS film have a c-axis orientation, and the c-axis is oriented in a direction approximately perpendicular to the surface on which the film is formed or the upper surface. It can be confirmed that there is.

[0411] On the other hand, in-p X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the lane method, a peak may appear at 2θ around 56°. This is attributed to the (110) plane of the InGaZn oxide crystal. In the case of a crystalline oxide semiconductor film, 2θ is fixed at about 56°, and the normal vector of the sample surface is set to the axis (φ When the sample is rotated around the (φ) axis while analyzing (φ scan), the results show that the bonds are equivalent to the (110) plane. In contrast, in the case of the CAAC-OS film, 2 Even when θ is fixed at around 56° and φ is scanned, no clear peak appears.

[0412] From the above, it is considered that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, the layered structure confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of arranged metal atoms is in a plane parallel to the ab plane of the crystal.

[0413] The crystalline part is formed when the CAAC-OS film is formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned along the surface of the CAAC-OS film. Or, the orientation is parallel to the normal vector of the upper surface. When the shape of the CAAC-OS film is changed by etching, the c-axis of the crystal part is aligned with the CAAC-OS film. It may not be parallel to the normal vector of the forming surface or the top surface.

[0414] In addition, the crystallinity in the CAAC-OS film does not have to be uniform. When the crystalline part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, The area near the surface may have a higher crystallinity than the area near the surface on which it is formed. When impurities are added to the AC-OS film, the crystallinity of the region to which the impurities are added changes, resulting in a partial In some cases, regions of differing crystallinity may be formed.

[0415] In addition, in the out-of-plane analysis of the CAAC-OS film, 2θ was 31°. In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks near the c-axis are due to the presence of crystals that do not have the c-axis orientation in the CAAC-OS film. The CAAC-OS film shows a peak at 2θ of about 31° and a peak at 2θ of about 36°. It is preferable that there is no peak nearby.

[0416] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The oxide semiconductor film is preferably made of silicon or a transition metal element other than the main component of the oxide semiconductor film. The elements that bond to oxygen stronger than the metal elements that form the oxide semiconductor film, such as Zn, By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, and the crystallinity is reduced. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide are Since the diameter (or molecular radius) of the ions is large, when the ions are contained inside the oxide semiconductor film, the oxide semiconductor film The impurities contained in the oxide semiconductor film are disturbed, which causes a decrease in crystallinity. Pure materials may act as carrier traps or carrier generation sources.

[0417] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in semiconductor films act as carrier traps and trap hydrogen. This can become a carrier generation source.

[0418] The low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "high-purity intrinsic" refers to a substantially high-purity intrinsic oxide semiconductor. Since the film has a small carrier generation source, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics (noise) in which the threshold voltage is negative. It is also called "marine". It is rare for it to become "high purity genuine" or "substantially high purity". The intrinsic oxide semiconductor film has few carrier traps. Transistors using the film have little fluctuation in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time is long and the charge may behave as if it were a fixed charge. In addition, a transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. There may be cases where this occurs.

[0419] In addition, the electrical characteristics of transistors using CAAC-OS films are improved by irradiation with visible light or ultraviolet light. Gender variation is small.

[0420] <Single crystal oxide semiconductor> A single-crystal oxide semiconductor film has a low impurity concentration and a low density of defect states (few oxygen vacancies). ) an oxide semiconductor film. Therefore, the carrier density can be reduced. A transistor using a crystalline oxide semiconductor film rarely has normally-on electrical characteristics. In addition, since the single crystal oxide semiconductor film has a low impurity concentration and a low density of defect states, Therefore, in the case of a transistor using a single crystal oxide semiconductor film, the number of carrier traps may be reduced. The transistor has small fluctuations in electrical characteristics and is highly reliable.

[0421] Note that the oxide semiconductor film has a high density when the number of defects is small. High crystallinity increases density. In addition, the oxide semiconductor film has a low concentration of impurities such as hydrogen. The density of the single crystal oxide semiconductor film is higher than that of the CAAC-OS film. The CAAC-OS film has a higher density than the microcrystalline oxide semiconductor film. The conductor film has a higher density than the microcrystalline oxide semiconductor film. The density is higher than that of an crystalline oxide semiconductor film.

[0422] <Polycrystalline oxide semiconductor> In the polycrystalline oxide semiconductor film, crystal grains can be confirmed in the TEM image. The crystal grains contained in the crystalline oxide semiconductor film are, for example, 2 nm to 3 nm in a TEM image. 00 nm or less, 3 nm to 100 nm or 5 nm to 50 nm. In addition, in the case of a polycrystalline oxide semiconductor film, crystal grain boundaries cannot be confirmed in the TEM images. There may be cases where this occurs.

[0423] The polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientation between the plurality of crystal grains is In addition, the positions of the crystals in the polycrystalline oxide semiconductor film may differ from each other. When the structure was analyzed, for example, the o-structure of the polycrystalline oxide semiconductor film having InGaZn oxide crystals was In the out-of-plane analysis, a peak was observed at 2θ near 31° and a peak was observed at 2θ near 36°. Adjacent peaks or other peaks may appear.

[0424] A polycrystalline oxide semiconductor film has high crystallinity and therefore may have high electron mobility. Therefore, a transistor using a polycrystalline oxide semiconductor film has high field-effect mobility. However, in the polycrystalline oxide semiconductor film, impurities may be segregated at crystal grain boundaries. The grain boundaries of the polycrystalline oxide semiconductor film become defect states. Since the oxide semiconductor film may become a carrier trap or a carrier generation source, The transistors using the CAAC-OS film showed a small change in electrical characteristics compared to the transistors using the CAAC-OS film. may result in a transistor with low reliability.

[0425] <Microcrystalline oxide semiconductor> In the TEM image of the microcrystalline oxide semiconductor film, crystal parts can be clearly seen. The crystal parts contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or more. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 to 3 nm or less. The oxide semiconductor film having nc-OS (nanocrystalline O The nc-OS film is called a T In EM images, grain boundaries may not be clearly visible.

[0426] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal planes are In addition, the nc-OS film has a larger diameter (e.g., 50 When electron beam diffraction (also called selected area electron beam diffraction) is performed using an electron beam of 1 nm or more, On the other hand, the nc-OS film has a low-order diffraction pattern. Electron beams with a diameter close to or smaller than the crystal part (for example, 1 nm to 30 nm) are used. When nanobeam electron diffraction (also called nanobeam electron diffraction) is performed, spots are observed. When nanobeam electron diffraction is performed on a c-OS film, bright spots appear in a circular (ring-like) pattern. In addition, nanobeam electron diffraction of the nc-OS film shows that the Multiple spots may be observed within a ring-like region.

[0427] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, the crystal orientation is not regular between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0428] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0429] (Embodiment 7) In the manufacturing method of a display device described in any of Embodiments 1 to 6, the oxide semiconductor film 1 After forming the electrodes 20a to 20d on the oxide semiconductor films 17a and 17b, The oxide semiconductor films 17a and 17b are exposed to plasma generated in an oxidizing atmosphere to supply oxygen thereto. The oxidizing atmosphere may be an atmosphere of oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. Furthermore, in the plasma processing, no bias is applied to the substrate 11 side. It is preferable to expose the oxide semiconductor films 17a and 17b to plasma generated in a vacuum. Therefore, oxygen can be supplied to the oxide semiconductor films 17a and 17b without being damaged. As a result, the amount of oxygen vacancies in the oxide semiconductor films 17a and 17b can be reduced. In addition, impurities, such as For example, halogens such as fluorine and chlorine can be removed. It is preferable to perform the treatment while heating at a temperature of 00° C. or higher. The hydrogen in a and 17b combine to form water. Because the substrate is heated, the water becomes acid. As a result, the oxide semiconductor films 17a and 17b are desorbed. The hydrogen and water content can be reduced.

[0430] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0431] (Embodiment 8) In this embodiment, a configuration of a pixel included in a display device according to one embodiment of the present invention will be described with reference to drawings. In the following description, the same reference numerals as those in the above embodiment are used to denote the same parts or parts having the same functions. The same parts are denoted by the same reference numerals and detailed explanations thereof are omitted.

[0432] FIG. 23 shows an example of a circuit configuration that can be used for a pixel of a display device.

[0433] The pixel 603 shown in FIG. 23 includes a selection transistor that controls writing of a data signal. a transistor 300b functioning as a drive transistor; 300a, a transistor 300c, a capacitor 370, and a light-emitting element 350. .

[0434] One of the source electrode and the drain electrode of the transistor 300a serves as an anode line. The source and drain electrodes of the transistor 300a are electrically connected to the wiring ANO1. The other electrode is electrically connected to one electrode of the light emitting element 350. The gate electrode of transistor 300a is connected to one of the source electrode and drain electrode of transistor 300b. and electrically connected to one electrode of the capacitor 370 .

[0435] The transistor 300a is turned on or off to provide a light emitting element 350 with a In this embodiment, the transistor 300a has a function of controlling the flow of current. The channel length is set to 0.5 μm or more and 4.5 μm or less, and the upper and lower layers of the oxide semiconductor film a first gate electrode and a second gate electrode, which are electrically connected to each other, That is, the transistor 300a has improved on-state current and field-effect mobility. Moreover, this is a transistor in which the fluctuation of the threshold voltage in the negative direction is suppressed.

[0436] The other of the source electrode and the drain electrode of the transistor 300b is supplied with a data signal. The gate electrode of the transistor 300b is electrically connected to a signal line SL. The gate electrodes 111 and 112 are electrically connected to the scanning lines GL to which the gate signals are applied.

[0437] The transistor 300b is turned on or off to write a data signal. That is, the transistor 300b functions as a selection transistor. It has the function of

[0438] In this embodiment, the channel length of the transistor 300b is The channel length of transistor 300b is greater than the negative shift in threshold voltage. A transistor with suppressed shift and a small cutoff current.

[0439] One of the source electrode and the drain electrode of the transistor 300c is provided with a reference potential for data. The source electrode and the drain electrode of the transistor 300c are connected to the wiring ML. The other electrode of the light emitting element 350 is electrically connected to one electrode of the capacitor element 370. Furthermore, the gate electrode of the transistor 300c is connected to the scanning line G Electrically connected to L.

[0440] The transistor 300c has a function of adjusting the current flowing through the light-emitting element 350. For example, the threshold voltage or field effect mobility of the transistor 300a may vary, or the When the capacitor 300a deteriorates, the current flowing through the wiring ML is monitored. The current flowing through the line 350 can be corrected. For example, the potential given to the line ML is For example, the voltage can be equal to or lower than the threshold voltage of the light emitting element 350 .

[0441] In this embodiment, the channel length of the transistor 300c is, for example, It is preferable that the channel length of the transistor 300c is larger than that of the transistor 300a. It may have a single gate structure, or a dual gate structure like the transistor 300a. However, if the transistor 300c has a single gate structure, the first gate Since the area for connecting the first electrode and the second gate electrode can be eliminated, This allows the area of ​​the transistor to be reduced, thereby increasing the aperture ratio of the pixel. This is preferable because it is possible.

[0442] One of a pair of electrodes of the capacitor 370 is connected to the source electrode and the drain electrode of the transistor 300b. The gate electrode of the transistor 300a is electrically connected to one of the gate electrodes of the capacitor element 300a. The other of the pair of electrodes of 70 is the other of the source electrode and drain electrode of the transistor 300c. , and is electrically connected to one electrode of the light-emitting element 350 .

[0443] In the configuration of the pixel 603 shown in FIG. 23, the capacitor element 370 stores the written data. It functions as a storage capacitor.

[0444] One of the pair of electrodes of the light emitting element 350 is the source electrode and the drain electrode of the transistor 300a. The other of the gate electrodes of the capacitor 370, and the source and drain electrodes of the transistor 300c The other of the pair of electrodes of the light emitting element 350 is electrically connected to the cover electrode. It is electrically connected to a wiring CAT which functions as a cathode.

[0445] The light-emitting element 350 may be, for example, an organic electroluminescence element (organic EL element). Alternatively, an inorganic EL element can be used.

[0446] In addition, a wiring ANO2 is provided that extends in a direction parallel to the wiring ML. It is connected to the wiring ANO1 that functions as the anode line, reducing the wiring resistance of the wiring ANO1 As a result, in a display device using a large-area substrate, the voltage drop of the wiring can be reduced. It is possible to reduce the drop in brightness and reduce uneven brightness of the display device.

[0447] A high power supply potential VDD is applied to one of the wirings ANO1 and ANO2 and the wiring CAT. The other terminal is applied with a low power supply potential VSS. A configuration in which the high power supply potential VDD is applied to ANO2 and the low power supply potential VSS is applied to wiring CAT. It states that:

[0448] In a display device having the pixels 603 shown in FIG. 23, the pixels 603 in each row are driven by a scanning line driving circuit. The transistors are selected in sequence, the transistors 300b are turned on, and the data of the data signal is written.

[0449] The pixel 603 to which the data has been written is held by turning off the transistor 300b. Furthermore, since the transistor 300b is connected to the capacitance element 370, The data written can be held for a long time. The amount of current flowing between the source electrode and the drain electrode is controlled by this, and the light emitting device 350 It emits light with a brightness that corresponds to the amount of current.

[0450] Next, regarding the configuration that can be used for the pixel 603 shown in FIG. 23, The following explanation will be given using

[0451] FIG. 16 shows a partial top view of a pixel circuit that can be used for pixel 603. 17 is a cross-sectional view taken along a dashed line X1-X2 in FIG. 16, and FIG. 18 is a cross-sectional view taken along a dashed line X1-X2 in FIG. These represent cross sections taken along dashed dotted lines X3-X4 and X5-X6, respectively.

[0452] In FIG. 16, the wiring GL functioning as the scanning line extends in a direction substantially perpendicular to the signal line (the left side of the figure). The wiring SL, which functions as a signal line, is arranged to extend in a direction substantially perpendicular to the scanning line. The reference potential of the data is given to the wiring. The lines ML are provided so as to extend in a direction parallel to the wiring SL. The line ANO2 is provided extending in a direction parallel to the wirings SL and ML.

[0453] The transistors 300a, 300b, and 300c are provided in a pixel 603. The transistors 300a, 300b, and 300c each have a conductive layer that functions as a gate electrode. A conductive film, a gate insulating film, and an oxide film in which a channel region is formed on the gate insulating film. It is composed of a semiconductor film and a conductive film that functions as a pair of electrodes. For example, In the example shown in FIG. 300a, a gate electrode 13a, a gate insulating film (not shown), and an oxide semiconductor It is composed of a body membrane 17a and electrodes 20a and 20b.

[0454] In the transistor 300b, a gate electrode 13b and a gate insulating film (not shown) The insulating film 17 includes a first insulating film 17b and an oxide semiconductor film 17c and electrodes 20c and 20d.

[0455] The configuration of the transistor 300c is not specifically mentioned, but the transistor 30 0b。 0b.

[0456] Moreover, the electrode 13c is electrically connected to the electrode 20a through the opening 352a. In addition, the electrode 20b is electrically connected to the pixel electrode 322 at the openings 354 and 356b. The electrode 13d is connected to the opening 352b and the opening 352c. It is electrically connected to 20e.

[0457] In addition, a gate electrode 13a is formed below the electrode 20b. A capacitance element is formed by the dielectric film formed on the gate electrode 13a and the gate electrode 13a. The capacitive element corresponds to the capacitive element 370 shown in FIG.

[0458] Next, the dashed lines X1-X2, X3-X4, and X5-X6 shown in FIG. The cross section between X6 will be described with reference to FIGS.

[0459] The pixel shown in FIG. 17 and FIG. 18 includes a substrate 11 and gate electrodes 13a and 13b on the substrate 11. and electrodes 13c and 13d, a substrate 11, gate electrodes 13a and 13b, and electrodes 13c and 13 d, and the oxide semiconductor film 17 on the insulating film 306b. a pair of electrodes 20a provided on the oxide semiconductor films 17a and 17b, respectively; , 20b and a pair of electrodes 20c, 20d are formed in the same process as the electrodes 20a to 20d. The electrode 20e is formed on the oxide semiconductor films 17a and 17b, and the electrodes 20a to 20e. and a nitride insulating film 316 formed on the oxide insulating film 314. The oxide semiconductor film 17a is formed over the nitride insulating film 316 and overlaps with the oxide semiconductor film 17a. a gate electrode 320 provided on the nitride insulating film 316 and an oxide semiconductor film 17a The insulating film 318 has an opening 356a at a position overlapping the gate electrode 320. The pixel electrode 322 formed on the insulating film 318, the transistor, and the pixel and an insulating film 324 formed to cover the ends of the element electrodes 322.

[0460] The insulating films 306a and 306b are formed on the transistors 300a and 300b. It functions as a gate insulating film (the first gate insulating film in the transistor 300a) and The nitride insulating film 314 and the nitride insulating film 316 form a second gate insulating film of the transistor 300a. It acts as a membrane.

[0461] In the region sandwiched between the electrode 20b and the gate electrode 13a, the insulating film 306a , 306b function as a dielectric. The gate electrode 13a and the gate electrode 13b form a capacitance element.

[0462] In addition, an EL layer 326 is formed on the pixel electrode 322 and the insulating film 324. An electrode 328 is formed on the pixel electrode 322, the EL layer 326, and the electrode 32 The EL layer 326 is made of at least one luminescent material. It is sufficient that a light-emitting layer containing a hole transport material is formed. Functional layers such as an electron transport layer, an electron injection layer, and a charge generation layer may be formed. The EL layer 326 receives electrons and holes from a pair of electrodes (here, the pixel electrode 322 and the electrode 328). When electrons and holes are recombined, a light-emitting material is formed. forms an excited state, and can emit light when the excited state returns to the ground state.

[0463] In addition, the insulating film 318 has a function of flattening the unevenness formed below the pixel electrode 322. It is only necessary that the insulating film is provided, and it can be formed using, for example, an organic insulating film or the like.

[0464] The insulating film 324 also has a function of isolating the EL layer 326 between adjacent pixels, i.e., a function of a partition wall. The insulating film 324 may have any insulating properties. An organic insulating film or an inorganic insulating film can be used. As the organic insulating film, for example, a polyimide film can be used. Amide resin, polyamide resin, acrylic resin, siloxane resin, epoxy resin, Alternatively, a phenolic resin or the like can be used. As the inorganic insulating film, silicon oxide, Silicon oxynitride and the like can be used. In particular, by using a photosensitive organic resin material, This is preferable because the insulating film 324 can be easily formed.

[0465] An opening 352a is formed in the insulating films 306a and 306b on the electrode 13c. The electrode 13c is connected to the electrode 20a through the opening 352a. The upper insulating films 306a and 306b have openings 352b and 352c. 13d is connected to the electrode 20e through the openings 352b and 352c. By providing a plurality of openings, such as the openings 352b and 352c, the electric In addition, in FIG. 18, the contact resistance between the electrode 20e and the electrode 13d can be reduced. Although the above embodiment has been described with respect to the case where two openings are formed for the mouths 352b and 352c, the present invention is not limited to this. Alternatively, one opening or three or more openings may be formed.

[0466] An opening 356a is formed in the insulating film 318 on the transistor 300a. By forming the opening 356a, the gate electrode 320 and the oxide semiconductor film 17a Therefore, the electric field from the gate electrode 320 can be reduced by the distance The voltage can be suitably applied to the membrane 17a.

[0467] In addition, an opening 354 is formed in the oxide insulating film 314 and the nitride insulating film 316 on the electrode 20b. An opening 356b is formed in the insulating film 318 above the opening 354. The electrode 20b is electrically connected to the pixel electrode 322 through the openings 354 and 356b. This is being continued.

[0468] In addition, the material that can be used for the pixels shown in FIG. 17 and FIG. Alternatively, the description in embodiment 2 can be cited.

[0469] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0470] (Embodiment 9) In this embodiment, an example of an active matrix display device according to one embodiment of the present invention will be described. This will be explained with reference to FIG.

[0471] FIG. 24A is a top view of a display device according to one embodiment of the present invention. This corresponds to a cross-sectional view taken along dashed lines M1-M2 and N1-N2.

[0472] The active matrix display device shown in FIG. A light emitting unit 802, a driving circuit unit 803 (gate line driving circuit, etc.), a driving circuit unit 804 (signal The light emitting portion 802 and the driver circuit portion 803 and the sealing material 805 are 04 is a space 810 formed by a support substrate 801, a sealing substrate 806, and a sealing material 805. It is sealed.

[0473] The driver circuit portion 803 and the driver circuit portion 804 are made of the transistors described in the above embodiment. In addition, the driving circuits and the like may be divided and the pixels may be sandwiched between the opposing circuits. It may be placed to the side.

[0474] The light emitting portion 802 shown in FIG. 24B has a function of controlling writing of data of a data signal. A first transistor (not shown) functions as a selection transistor for a light emitting element. A second transistor that functions as a drive transistor having a function of adjusting the current flowing through it. 811 and the wiring (source electrode or drain electrode) of the second transistor 811 are electrically connected to each other. The pixel is formed of a plurality of pixels including a first electrode 831 connected to the first electrode 831.

[0475] The light emitting element 840 has a top emission structure, and the first electrode 831, E The first electrode 831 is made up of an L layer 833 and a second electrode 835. An insulating film 839 is formed to cover the end portions and function as a partition wall.

[0476] The transistor 811 has a dual gate structure, and a first electrode 8 The gate electrode 832 is formed at the same time as the transistor 831. By providing the gate electrode 832, reflection of external light at the gate electrode 832 can be reduced.

[0477] On the support substrate 801, external signals (video signals, clock signals, etc.) are input to the driving circuit sections 803 and 804. lock signal, start signal, reset signal, etc.) or an external input terminal that transmits electric potential. Here, the FP is used as the wiring for external input. This shows an example of installing C808 (Flexible Printed Circuit). do.

[0478] The driver circuit portions 803 and 804 each have a plurality of transistors. The path section 803 has an NMOS circuit having n-channel transistors 852 and 853. The circuit of the driver circuit section is a CMOS circuit, a PMOS circuit, or a NMMOS circuit. In this embodiment, the light emitting portion is formed on a substrate. In the figure, a drive circuit is formed on the substrate 1, but the present invention is not limited to this configuration. The driving circuit may be formed on a substrate separate from the substrate on which the light emitting portion is formed.

[0479] In order to prevent an increase in the number of processes, the lead wiring 809 is It is preferable to fabricate the wiring using the same material and process as the wiring. The gate electrodes of the transistors included in the light emitting section 802 and the driving circuit section 803 are made of the same material. The material can be produced in the same process.

[0480] The support substrate 801 is a substrate having a heat resistance sufficient to withstand the manufacturing process of the display device. The thickness and size of the substrate are not particularly limited as long as they are applicable to the manufacturing apparatus. do not have.

[0481] The support substrate 801 preferably has a gas barrier property. Specifically, the gas barrier property is 10% or more in terms of water vapor transmission rate. -5 g / m 2 ·day or less, preferably 10 -6 g / m 2 -day or less, the reliability of the display device can be increased.

[0482] The support substrate 801 may be flexible. Generally speaking, plastic substrates are an example of this, as well as substrates with a thickness of 50 μm or more and 500 μm or less. Thin glass or metal foil having a thickness of less than 1 mm can also be used.

[0483] For example, substrates that can be used as the support substrate 801 include non-alkali glass substrates, barium Borosilicate glass substrate, aluminoborosilicate glass substrate, ceramic substrate, quartz substrate, Fire substrate, metal substrate, stainless steel substrate, plastic substrate, polyethylene terephthalate Examples of the substrate include a polyimide substrate and a polyimide substrate.

[0484] The structure of the transistor included in the driver circuit portion 803 is not particularly limited. The transistor shown in the figure has a channel-etched bottom gate structure as an example. Channel-protected bottom-gate structure, self-aligned top-gate structure or non-cell A far-in type top gate structure may also be used.

[0485] A transistor that uses an oxide semiconductor in a channel region has an extremely low off-state current. When this transistor is used, the input to the pixel (capacitor element) This improves the retention of the received signal, making it possible to reduce the frame frequency, for example, when displaying still images. By reducing the frame frequency, the power consumption of the display device can be reduced. It can be reduced.

[0486] The insulating film 839 is provided to cover the end portion of the first electrode 831. In order to improve the coverage of the EL layer 833 and the second electrode 835 formed on the partition wall, It is preferable that the end portion has a curved surface.

[0487] In addition, it is preferable that the insulating film 839 is made of a material having a smaller refractive index than the EL layer 833. By forming the insulating film 839 from this material, the entire interface between the EL layer 833 and the insulating film 839 is This can cause reflection, reducing the amount of light that enters the insulating film 839, and improving the light extraction efficiency. The rate can be improved.

[0488] The light-emitting element included in the display device has a pair of electrodes (a first electrode 831 and a second electrode 835 ) and an EL layer 833 provided between the pair of electrodes. One acts as an anode and the other acts as a cathode.

[0489] In a light-emitting device with a top emission structure, a conductive material that is transparent to visible light is used as the upper electrode. It is preferable to use a conductive film that reflects visible light for the lower electrode. In a bottom emission light emitting device, the lower electrode is transparent to visible light. A conductive film having a reflecting property is used for the upper electrode. In a light emitting device having a dual emission (dual emission) structure, the upper electrode and the lower electrode A conductive film that transmits visible light is used for both electrodes.

[0490] A voltage higher than the threshold voltage of the light-emitting element is applied between the first electrode 831 and the second electrode 835. When a voltage is applied, holes are injected into the EL layer 833 from the first electrode 831 side, and the second electrode 835 The injected electrons and holes recombine in the EL layer 833, forming an EL The luminescent material contained in the layer 833 emits light.

[0491] The EL layer 833 has a light-emitting layer. The EL layer 833 has a hole-injecting layer as a layer other than the light-emitting layer. materials with high hole transporting properties, hole blocking materials, materials with high electron transporting properties, electron injection materials Highly conductive or bipolar substances (substances with high electron transport and hole transport properties) It may further have a layer including the above.

[0492] The EL layer 833 can be made of either a low molecular weight compound or a high molecular weight compound. The layers constituting the EL layer 833 may each be formed by deposition (vacuum deposition). It can be formed by methods such as deposition method, transfer method, printing method, inkjet method, coating method, etc. can.

[0493] In addition, a microcavity ( For example, the first electrode 831 can be connected to the EL layer 833. A conductive film that reflects light emitted from the second electrode 835 is used to reflect part of the light and The light emitting device can be constructed using a semi-transmissive and semi-reflective conductive film that transmits light.

[0494] Also, an optical adjustment layer can be provided between the first electrode 831 and the second electrode 835 . The optical adjustment layer is a light-transmitting layer between the reflective first electrode 831 and the semi-transmissive and semi-reflective second electrode 835. The optical adjustment layer is a layer for adjusting the optical distance. By adjusting the thickness of the optical adjustment layer, the second electrode 835 It is possible to adjust the wavelength of light to be preferentially extracted from the

[0495] The material that can be used for the optical adjustment layer is an EL layer. The thickness may be adjusted by using a raw region. When a region containing a conductive material is used in the optical adjustment layer, the driving voltage can be reduced even if the optical adjustment layer is thick. This is preferable because it can suppress the increase.

[0496] In addition, other materials that can be used for the optical adjustment layer include For example, a light-transmitting conductive film that transmits light can be applied to the surface of a reflective conductive film. By laminating the conductive films, the first electrode 831 can be formed. This is preferable because it is easy to change the thickness of the optical adjustment layer of the electrode 831 .

[0497] The insulating film 844 can be formed using the oxide insulating film or the nitride insulating film described in Embodiment 1. Cut.

[0498] The insulating film 846 is used as a planarizing film to reduce surface irregularities caused by transistors. It is preferable to select an insulating film that functions.

[0499] The encapsulant 805 and the encapsulation substrate 806 are resistant to impurities in the air (typically water and / or It is desirable to form the sealing material 805 from a material that is as impermeable to oxygen as possible. Silicone resin, glass frit, etc. can be used.

[0500] The sealing substrate 806 can be made of a material that can be applied to the support substrate 801. In addition, PVF (polyvinyl fluoride), polyester, acrylic, etc. are used. PCBs and FRP (Fiber Reinforced Plastics) are used. Examples of this include:

[0501] In addition, the structure formed on the support substrate 801 side and the structure formed on the sealing substrate 806 side are in contact with each other. The uncovered space 810 may contain a material that transmits light.

[0502] The light-transmitting material is, for example, a material that does not contain impurities that impair the reliability of a light-emitting element (typically, The material can be used to react with water and / or oxygen or to adsorb impurities. This allows the impurities to dissolve in the material contained in the filling before they impair the reliability of the light-emitting device. It is possible for the enzyme to react or be adsorbed preferentially, causing it to lose its activity. This can improve the reliability of the device.

[0503] Examples of the light-transmitting material include a substance having a high hole-transporting property, a light-emitting substance, and a host material. a substance having high electron transporting properties, a substance having high electron injecting properties and / or a substance having high electron accepting properties, etc. It can be used.

[0504] Specifically, the conductive polymer poly(3,4-ethylenedioxythiophene) / poly(s Polyethylenesulfonic Acid) (PEDOT / PSS), Desiccant, Materials Applicable to EL Layer 833, 4,4'-Bis[N-(1-naphthyl)-N-phenylamino]biphenyl (abbreviation: NP B or α-NPD), tris(8-quinolinolato)aluminum(III) (abbreviation: A lq) etc.

[0505] The light-transmitting material is used for the second electrode 835 and the sealing substrate 806 (sealing substrate 80 6) can be optically connected to the light emitting device. In the optical path in which the light emitted from the element 840 reaches from the second electrode 835 to the sealing substrate 806, Therefore, a sudden change in the refractive index (also called a step in the refractive index) is suppressed, and the second electrode 835 side is sealed. The light emitted from the light emitting element 840 can be efficiently extracted to the insulating substrate 806. The luminous efficiency of the display device can be improved.

[0506] The light-transmitting material has a refractive index higher than that of the second electrode 835. By using this material, the total reflection at the interface between the second electrode 835 and the material can be prevented. This suppresses reflection and allows light to be extracted efficiently.

[0507] The second electrode 835 and the sealing substrate 806 can be optically connected to each other using a material such as In addition to the above-mentioned materials, liquid crystal materials and fluorine-based inert liquids (perfluorocarbons, etc.) A resin having light transmitting properties can be used. Impurities that impair the reliability of the light-emitting element may be removed. Materials that react or adsorb may be dispersed.

[0508] The liquid crystal materials include nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, Discotic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal, polymer Liquid crystal, polymer dispersed liquid crystal (PDLC), ferroelectric liquid crystal, antiferroelectric liquid crystal, main chain liquid crystal, side chain Using liquid crystals such as polymer liquid crystals and banana-shaped liquid crystals, or mixtures of these liquid crystals and chiral agents, etc. There can be.

[0509] The color filter 866 is provided for the purpose of adjusting the color of the light from the light source and increasing the color purity. For example, when a full-color display device is constructed using white light-emitting elements, Uses multiple pixels with color filters. In this case, red (R), green (G), and blue A three-color filter of (B) may be used, or yellow (Y) may be added to make four colors. It is also possible to use a white (W) pixel in addition to R, G, B (and Y) to produce a four-color ( or five colors).

[0510] In addition, a black matrix 864 is provided between adjacent color filters 866. The black matrix 864 blocks light from entering from adjacent pixels and The black matrix 864 is arranged only between adjacent pixels of different luminescent colors. The color filter 866 may be disposed between the edges of the color filters 866 and may not be disposed between the same color pixels. By providing the black matrix 864 so as to overlap the black matrix 864, light leakage can be suppressed. can be done.

[0511] The black matrix 864 can be made of a material that blocks light, such as a metal material or a pigment. The black matrix 864 can be formed by using a resin material containing If the light emitting unit 802 is provided over an area other than the light emitting unit 802, such as a driving circuit unit, unintended interference due to guided light, etc. may occur. This can suppress unwanted light leakage.

[0512] As shown in FIG. 24B, a color filter 866 and a black matrix 864 When an overcoat 868 is provided to cover the color filter 866 and the black matrix 8 It is possible to prevent impurities such as pigments contained in 64 from diffusing into light emitting elements. The gate 868 has light-transmitting properties and can be formed of an inorganic insulating material or an organic insulating material.

[0513] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0514] (Embodiment 10) In this embodiment, an electronic device in which a display device according to one embodiment of the present invention can be mounted will be described. He explains.

[0515] As an example of an electronic device to which a display device is applied, a television device (a television or vision receivers), computer monitors, digital cameras, digital video digital cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices) , portable game machines, personal digital assistants, audio playback devices, pachinko machines and other large game machines. Specific examples of these electronic devices are shown in Figure 25.

[0516] FIG. 25(A) shows an example of a television device. The television device 7100 is A display unit 7103 is incorporated in the housing 7101. The display unit 7103 displays an image. It is possible to display an image on the display portion 7103. 7 shows a configuration in which a housing 7101 is supported by a stand 7105.

[0517] The television device 7100 can be operated using an operation switch provided on the housing 7101 or a separate remote control. This can be done by the remote controller 7110. The operation keys 7109 can be used to operate the channel and the volume. 03. The remote controller 7110 can also be used to control the images displayed on the A display unit 7107 for displaying information output from the remote controller is provided. You may do so.

[0518] The television device 7100 includes a receiver, a modem, and the like. This allows reception of general television broadcasts, and can also be used for wired or wireless reception via a modem. By connecting to a network, communication can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between sender and receiver, or between receivers). .

[0519] FIG. 25B shows a computer, which includes a main body 7201, a housing 7202, a display unit 7203, Including a keyboard 7204, an external connection port 7205, a pointing device 7206, etc. Note that the computer is manufactured by using a display device for the display portion 7203. do.

[0520] FIG. 25C shows a portable game machine that is composed of two housings, a housing 7301 and a housing 7302. The housing 7301 is connected to the connector 7303 so as to be openable and closable. A display portion 7305 is incorporated in the housing 7302. The portable game machine shown in FIG. 25(C) also includes a speaker unit 7306, a recording medium insertion unit 73 07, LED lamp 7308, input means (operation keys 7309, connection terminal 7310, sensor 7311 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature , chemicals, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, (including functions for measuring vibration, odor, or infrared rays), microphone 7312) Of course, the configuration of the portable gaming machine is not limited to the above, and at least A display device may be used for both the portion 7304 and the display portion 7305, or for either one of them. Other auxiliary equipment may be provided as appropriate. The device reads out the program or data recorded on the recording medium and displays it on the display unit. It also has the function of wirelessly communicating with other portable gaming machines to share information. The functions of the portable gaming machine shown in 5(C) are not limited to these, and it has various functions. can be done.

[0521] FIG. 25D shows an example of a mobile phone. A mobile phone 7400 includes a housing 740. In addition to the display unit 7402 incorporated in the 1, the operation buttons 7403, the external connection port 7404, The mobile phone 7400 includes a speaker 7405, a microphone 7406, and the like. The display device is used as the display portion 7402.

[0522] In a mobile phone 7400 shown in FIG. 25D, when the display portion 7402 is touched with a finger or the like, You can enter information, make calls, write emails, and perform other operations. This can be done by touching the display portion 7402 with a finger or the like.

[0523] The screen of the display unit 7402 has three main modes. The first is a mode that mainly displays images. The first mode is a display mode, the second is an input mode for inputting information such as characters, and the third mode is a display mode. This is a display + input mode that combines the display mode and the input mode.

[0524] For example, when making a call or composing an e-mail, the display unit 7402 is used for inputting characters. The main input mode is the character input mode, and the input operation of the characters displayed on the screen can be performed. In this case, a keyboard or number buttons can be displayed on most of the screen of the display unit 7402. preferable.

[0525] In addition, a sensor for detecting tilt, such as a gyro or an acceleration sensor, is installed inside the mobile phone 7400. By providing a detection device having the above, the orientation of the mobile phone 7400 (portrait or landscape) can be determined, The screen display on the display portion 7402 can be automatically switched.

[0526] The screen mode can be changed by touching the display portion 7402 or the housing 7401. This is done by operating the operation button 7403. Also, the type of image displayed on the display unit 7402 For example, the image signal to be displayed on the display unit may be changed depending on the type of the image. If it is image data, the mode is switched to display mode, and if it is text data, the mode is switched to input mode.

[0527] In the input mode, the optical sensor of the display unit 7402 detects a signal and displays the If there is no input by touch operation on the display unit 7402 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the display mode to the display mode.

[0528] The display unit 7402 can also function as an image sensor. By touching 402 with a palm or a finger and capturing an image of a palm print, fingerprint, or the like, personal authentication can be performed. In addition, a backlight that emits near-infrared light for the display unit or a sensing device that emits near-infrared light for the display unit By using a light source, it is also possible to image finger veins, palm veins, etc.

[0529] FIG. 25(E) shows an example of a folding computer. The computer 7450 has a housing 7451L and a housing 7451R connected by a hinge 7454. In addition, the operation button 7453, the left speaker 7455L and the right speaker 7 In addition to the 455R, the computer 7450 also has an external connection port 745 (not shown) on the side of the computer 7450. 6. The display unit 7452L is provided on the housing 7451L, and the display unit 7451R is provided on the housing 7451R. When the hinge 7454 is folded so that the display portions 7452R face each other, the display The part can be protected by a housing.

[0530] The display unit 7452L and the display unit 7452R not only display images, but also display information when touched with a finger or the like. For example, you can touch and select an icon that represents an installed program. You can start a program by touching two points on the image with your fingers at different intervals. You can zoom in or out on the image by moving your finger over a point on the displayed image. You can also display an image of a keyboard and use your finger to move the displayed letters and symbols. You can also select and enter information.

[0531] In addition, the computer 7450 is equipped with a gyro, an acceleration sensor, and a GPS (Global Positioning System). It is equipped with a GPS receiver, a fingerprint sensor, and a video camera. For example, a detection device having a sensor for detecting the inclination, such as a gyro or an acceleration sensor, By providing a positioning device, the orientation of the computer 7450 (portrait or landscape) can be determined and the screen to be displayed can be adjusted. You can set it to automatically switch orientation.

[0532] The computer 7450 can also be connected to a network. In addition to being able to display information on the Internet, it can also remotely control other electronic devices connected to the network. It can be used as a terminal to operate from the

[0533] FIG. 25(F) shows an example in which the display device of this embodiment is applied to a lighting device. The device 7500 includes a housing 7501 and a light emitting device in which the display device of one embodiment of the present invention is incorporated as a light source. The light emitting unit 7503 includes a light emitting unit 7503a, a light emitting unit 7503b, a light emitting unit 7503c, and a light emitting unit 7503d. The lighting device 7500 can be attached to a ceiling, a wall, or the like.

[0534] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do. EXAMPLES

[0535] In this example, a transistor was fabricated and its Vg-Id characteristics and reliability were evaluated. The results will be explained below.

[0536] <Sample preparation> In this embodiment, a transistor that can be used as a driving transistor of a pixel of a display device of one embodiment of the present invention will be described. Samples 1 and 2, and sample 3 applicable as a selection transistor were fabricated. Specifically, as Sample 1, which is one embodiment of the present invention, FIG. 7(A1), FIG. 7(B) and FIG. A structure corresponding to the transistor 410a shown in FIG. As a second example, the transistor 44 shown in FIG. 12(A1), FIG. 12(B), and FIG. 12(C1) As a sample 3 according to one embodiment of the present invention, a structure corresponding to the structure shown in FIG. 2C2) and 2C3 was fabricated.

[0537] <Sample 1> First, a glass substrate was used as the substrate, and a gate electrode was formed on the substrate.

[0538] A 200 nm thick tungsten film was formed as the gate electrode by sputtering. A mask is formed on the tungsten film by a photolithography process, and the mask is used to It was formed by etching a part of the tungsten film.

[0539] Next, an insulating film functioning as a gate insulating film was formed on the gate electrode.

[0540] The gate insulating film is a 400 nm thick silicon nitride film and a 50 nm thick silicon oxynitride film. The silicon film was laminated.

[0541] The silicon nitride film includes a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. The silicon nitride film was laminated in three layers.

[0542] The first silicon nitride film was formed using a mixture of silane at a flow rate of 200 sccm and nitrogen at a flow rate of 2000 sccm. The reaction in the plasma CVD equipment was carried out using ammonia gas at a flow rate of 100 sccm as the raw material gas. The pressure in the reaction chamber was controlled at 100 Pa, and a 27.12 MHz high-frequency power source was used. The second nitridation was performed by supplying 2000 W of power to the GaN film to a thickness of 50 nm. The silicon film was prepared by mixing silane at a flow rate of 200 sccm, nitrogen at a flow rate of 2000 sccm, and 000sccm of ammonia gas was supplied as a source gas to the reaction chamber of the plasma CVD device. The pressure in the reaction chamber was controlled at 100 Pa, and a high-frequency power source of 27.12 MHz was used to generate 200 The third silicon nitride was formed to a thickness of 300 nm by supplying a power of 0 W. The film was grown using silane at a flow rate of 200 sccm and nitrogen at a flow rate of 5000 sccm as source gases. The pressure in the reaction chamber was controlled to 100 Pa. A 2MHz high-frequency power supply was used to supply 2000W of power, and the thickness was set to 50nm. The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film were formed. The substrate temperature during the formation of the silicon film was set to 350°C.

[0543] The silicon oxynitride film was formed by silane at a flow rate of 20 sccm and dioxygen at a flow rate of 3000 sccm. Nitrogen was supplied as the source gas to the reaction chamber of the plasma CVD device, and the pressure in the reaction chamber was set to 40 Pa. The device was formed by controlling the temperature and supplying 100 W of power using a 27.12 MHz high-frequency power supply. The substrate temperature was 350° C. when the silicon oxynitride film was formed.

[0544] Next, an oxide semiconductor film was formed so as to overlap with the gate electrode with the gate insulating film interposed therebetween.

[0545] Here, a 35-nm-thick oxide semiconductor film is formed on the gate insulating film by a sputtering method. did.

[0546] The oxide semiconductor film was formed by sputtering a target of In:Ga:Zn=1:1:1 (atomic ratio) The sputtering gas was oxygen at a flow rate of 100 sccm. The pressure in the reaction chamber was controlled to 0.6 Pa, and a 5 kW DC The oxide semiconductor film was formed by supplying electric power. did.

[0547] Next, a pair of electrodes in contact with the oxide semiconductor film were formed.

[0548] First, a conductive film was formed over the gate insulating film and the oxide semiconductor film. An aluminum film having a thickness of 400 nm is formed on a tungsten film having a thickness of 50 nm. A titanium film with a thickness of 200 nm was then formed on the aluminum film. A mask is formed on the conductive film, and a part of the conductive film is etched using the mask to form a pair of An electrode was formed.

[0549] Next, the substrate is moved to a reduced pressure processing chamber, heated to 350° C., and then placed in a reaction chamber. A high-frequency power of 150 W was supplied to the upper electrode using a 27.12 MHz high-frequency power source. The oxide semiconductor film was exposed to oxygen plasma generated in a dinitrogen oxide atmosphere.

[0550] Next, a second gate insulating film was formed over the oxide semiconductor film and the pair of electrodes. A first oxide insulating film, a second oxide insulating film, and a nitride insulating film as a second gate insulating film The membrane has a three-layer structure.

[0551] The first oxide insulating film was formed using silane at a flow rate of 20 sccm and monoxide at a flow rate of 3000 sccm. Dinitrogen was used as the source gas, the pressure in the reaction chamber was 200 Pa, the substrate temperature was 350°C, and the The film was formed by the plasma CVD method in which high frequency power of 1000 Hz was supplied to parallel plate electrodes.

[0552] The second oxide insulating film was formed using silane at a flow rate of 160 sccm and monoacid at a flow rate of 4000 sccm. Nitrous oxide was used as the source gas, the pressure in the reaction chamber was 200 Pa, the substrate temperature was 220° C., and the The film was formed by the plasma CVD method in which 0 W of high frequency power was supplied to the parallel plate electrodes. As a result, the mixture contains more oxygen than satisfies the stoichiometric composition, and some of the oxygen is removed by heating. A desorbing silicon oxynitride film can be formed.

[0553] Next, heat treatment is performed to remove water, nitrogen, and other organic compounds from the first oxide insulating film and the second oxide insulating film. Hydrogen and the like are released, and part of oxygen contained in the second oxide insulating film is transferred to the oxide semiconductor film. Here, heat treatment was performed at 350° C. for 1 hour in a nitrogen and oxygen atmosphere.

[0554] Next, a nitride insulating film having a thickness of 100 nm was formed on the second oxide insulating film. The coating consisted of silane at a flow rate of 50 sccm, nitrogen at a flow rate of 5000 sccm, and cm of ammonia gas was used as the source gas, the pressure in the reaction chamber was 100 Pa, and the substrate temperature was 350°C. The film was formed by the plasma CVD method in which 1000 W of high frequency power was supplied to parallel plate electrodes. It was.

[0555] Next, in a region where the oxide semiconductor film and the pair of electrodes are not provided, a gate insulating film An opening reaching the gate electrode is formed in a part of the second gate insulating film. A mask is formed on the second gate insulating film by a photolithography process, and the mask is used to The gate insulating film and the second gate insulating film were partly etched using the same.

[0556] Next, a second gate electrode that functions as a back gate electrode is formed on the second gate insulating film. The back gate electrode is formed on a part of the gate insulating film and the second gate insulating film. The structure was such that the gate electrode was electrically connected through the opening.

[0557] Here, a 100 nm thick oxide film was deposited by sputtering as the back gate electrode. Indium oxide-tin oxide compound (ITO-SiO 2 ) conductive film was formed. The composition of the target used for the conductive film was In. 2 O 3 :SnO 2 :SiO 2 =85: After that, the mixture was heated at 250°C for 1 hour in a nitrogen atmosphere. Ta.

[0558] Through the above steps, Sample 1 of this example was obtained.

[0559] <Sample 2> Sample 2 is different from Sample 1 in the structure of the second gate insulating film and the back gate electrode. More specifically, as shown in Fig. 12(C1), in the channel width direction of the transistor the side surfaces of the first oxide insulating film and the second oxide insulating film are covered by the back gate electrode. It was configured in this way.

[0560] Sample 2 was fabricated by forming the first oxide insulating film and the second oxide insulating film in the fabrication process of Sample 1 described above, performing heat treatment, and then forming a mask on the second oxide insulating film by a photolithography process. Subsequently, a part of the first oxide insulating film and the second oxide insulating film was etched using the mask. Since the other processes are the same as those of Sample 1 described above, the description of Sample 1 can be incorporated by reference. oxide insulating film, and after performing heat treatment, a mask was formed on the second oxide insulating film by a photolithography process. Subsequently, a part of the first oxide insulating film and the second oxide insulating film was etched using the mask. Since the other processes are the same as those of Sample 1 described above, the description of Sample 1 can be incorporated by reference. oxide insulating film, and after performing heat treatment, a mask was formed on the second oxide insulating film by a photolithography process. Subsequently, a part of the first oxide insulating film and the second oxide insulating film was etched using the mask. Since the other processes are the same as those of Sample 1 described above, the description of Sample 1 can be incorporated by reference. oxide insulating film, and after performing heat treatment, a mask was formed on the second oxide insulating film by a photolithography process. Subsequently, a part of the first oxide insulating film and the second oxide insulating film was etched using the mask. Since the other processes are the same as those of Sample 1 described above, the description of Sample 1 can be incorporated by reference. Therefore, the description of Sample 1 can be incorporated by reference.

[0561] <Sample 3> Sample 3 is different from Sample 1 in that it does not have a back gate electrode.

[0562] Sample 3 was fabricated by omitting the formation process of the back gate electrode in the fabrication process of Sample 1 described above. Since the other processes are the same as those of Sample 1 described above, the description of Sample 1 can be incorporated by reference. Sample 3 was fabricated by omitting the formation process of the back gate electrode in the fabrication process of Sample 1 described above. Since the other processes are the same as those of Sample 1 described above, the description of Sample 1 can be incorporated by reference. Therefore, the description of Sample 1 can be incorporated by reference.

[0563] Note that, as Samples 1 to 3 described above, three types of transistors with a channel width (W) of 50 μm and channel lengths (L) of 2 μm, 3 μm, and 6 μm were fabricated respectively. Note that, as Samples 1 to 3 described above, three types of transistors with a channel width (W) of 50 μm and channel lengths (L) of 2 μm, 3 μm, and 6 μm were fabricated respectively. respectively.

[0564] <Vg-Id Characteristics> Next, as the initial characteristics of the transistors of Samples 1 to 3, the Vg-Id characteristics were measured. Here, the substrate temperature is set to 25°C, and the potential difference between the source and drain (hereafter referred to as drain voltage) is The potential difference between the source and gate electrodes (hereafter, the gate voltage) is set to 1 V and 10 V. The current between the source and drain when the voltage Vg is changed from -15V to 15V The change in the current (hereinafter referred to as drain current, Id) that flows through the transistor is called the Vg-Id characteristic. Measured.

[0565] In Samples 1 and 2, the gate electrode and the back gate electrode are electrically shorted. The driving method used was to apply a gate voltage in a state where the gate was connected to the This is called dual gate drive. In other words, in dual gate drive, The gate voltage of the gate electrode and the back gate electrode are always equal.

[0566] Figure 26 shows the Vg-Id characteristics of sample 3. Figures 26(A), (B), and (C) show ,The results are for transistors with channel lengths (L) of 2 μm, 3 μm, and 6 μm. Similarly, FIG. 27 shows the Vg-Id characteristics of sample 1, and FIG. 28 shows the Vg-Id characteristics of sample 2. Each indicates a gender.

[0567] In each of FIG. 26, FIG. 27, and FIG. 28, the horizontal axis represents the gate voltage Vg, and the first The vertical axis represents the drain current Id, and the second vertical axis represents the field effect mobility Mobility. Here, the field effect mobility is calculated at Vd = 10 V to show the value in the saturation region. The field effect mobility is shown.

[0568] Sample 3 shown in FIG. 26 (used as a selection transistor of a pixel in a display device according to one embodiment of the present invention) The longer the channel length (L), the lower the threshold voltage The results showed that the negative shift was suppressed. In particular, when the drain voltage Vd was large, In this case, the effect of suppressing the negative shift of the threshold voltage was significantly confirmed. It was found that the field-effect mobility value hardly changes regardless of the channel length (L).

[0569] In addition, Sample 1 shown in FIG. 27 (a driving transistor of a pixel in a display device according to one embodiment of the present invention) The transistors suitable for use in the MOSFETs are shown in the above test under all channel length (L) conditions. It was confirmed that the field effect mobility was improved compared to sample 3. Furthermore, the channel length (L It was found that the smaller the θJA, the higher the field effect mobility. By doing so, even if the channel length (L) is small (L = 2 μm), the drain voltage It was found that the change in threshold voltage with respect to Vd was extremely small.

[0570] In addition, sample 2 shown in FIG. 28 (a driving transistor of a pixel in a display device according to one embodiment of the present invention) The transistors suitable for use in the MOSFETs are shown in the above test under all channel length (L) conditions. It was confirmed that the field effect mobility was improved compared to sample 3. Furthermore, the channel length (L It was found that the smaller the θJA, the higher the field effect mobility. By doing so, even if the channel length (L) is small (L = 2 μm), the drain voltage It was found that the change in threshold voltage with respect to Vd was extremely small.

[0571] From the above results, the longer the channel length (L), the more negative the threshold voltage becomes. It was confirmed that the field effect shift was suppressed. It was confirmed that the mobility was improved. Furthermore, the channel This makes it possible to apply an electric field more effectively to the oxide semiconductor on which the As a result, even if the channel length (L) is small, the relationship between the threshold voltage and the drain voltage Vd Therefore, it is possible to reduce the change in field effect mobility. In the driving transistor of the pixel to be used, the channel length (L) is made short (typically, L=2μm) and dual gate drive, and selection of pixels that require normally-off characteristics In the transistor, the channel length (L) is made longer than that of the driving transistor. It is possible to provide a display device that can achieve high-speed driving and low power consumption. [Explanation of symbols]

[0572] 11 Substrate 12 Conductive film 13a Gate electrode 13b Gate electrode 13c electrode 13d electrode 14 Insulating film 14b Oxide insulating film 15 Insulating film 15a Nitride insulating film 15b Oxide insulating film 16 Oxide semiconductor film 17 Oxide semiconductor film 17a Oxide semiconductor film 17b Oxide semiconductor film 18 Conductive Film 20a electrode 20b electrode 20c electrode 20d electrode 20e electrode 21a Low resistance area 21b Low resistance region 21c low resistance region 21d Low resistance region 22 Oxide insulating film 23 Oxide insulating film 24 Oxide insulating film 25 Oxide insulating film 26 Nitride insulating film 27 Nitride insulating film 28 Insulating Film 30 Conductive Film 31 Gate electrode 32 electrodes 33 Dashed Line 34 Dashed Line 41 Opening 42 Opening 43 Opening 51 Gate electrode 61 Opening 62 Conductive Film 63 Opening 64 Gate electrode 71a Oxide insulating film 71b Oxide insulating film 72a Oxide insulating film 72b Oxide insulating film 73a Nitride insulating film 73b Nitride insulating film 74a Insulating film 74b Insulating film 75 Opening 76 Gate electrode 77 Electrode 83a Oxide insulating film 83b Oxide insulating film 85a Oxide insulating film 85b Oxide insulating film 86 Nitride insulating film 87 Nitride insulating film 88a Insulating film 88b Insulating film 90 Conductive Film 91 Gate electrode 92 electrodes 94a Multilayer film 94b Multilayer film 95 Opening 96 Opening 97 Oxide Semiconductor Film 97a Oxide semiconductor film 97b Oxide semiconductor film 98a Multilayer film 98b Multilayer film 99 Oxide Semiconductor Film 99a Oxide semiconductor film 99b Oxide semiconductor film 102 Opening 103 Opening 105a Transistor 105b Transistor 106a Transistor 106b Transistor 109 Gate electrode 300a transistor 300b transistor 300c transistor 306a Insulating film 306b Insulating film 314 Oxide insulating film 316 Nitride insulating film 318 Insulating Film 320 Gate electrode 322 Pixel electrode 324 Insulating Film 326 EL layer 328 Electrode 350 Light emitting element 352a opening 352b opening 352c opening 354 Opening 356a opening 356b opening 370 Capacitive element 400a transistor 400b transistor 410a Transistor 420a transistor 430a Transistor 430b transistor 440a transistor 440b transistor 444 Electric Field Lines 450b transistor 600 pixels 601 pixels 602 pixels 603 pixels 604 Scanning line driver circuit 606 Signal Line Driver Circuit 607 Scan Lines 609 Signal Line 615 Capacitive Line 801 Support substrate 802 Light emitting part 803 Drive circuit section 804 Drive circuit section 805 Encapsulating material 806 Sealing substrate 808 FPC 809 Wiring 810 Space 811 Transistor 831 Electrode 832 Gate electrode 833 EL layer 835 Electrode 839 Insulating film 840 Light emitting element 844 Insulating film 846 Insulating film 852 Transistor 853 Transistor 864 Black Matrix 866 Color Filter 868 Overcoat 7100 Television equipment 7101 Case 7103 Display section 7105 Stand 7107 Display section 7109 Operation key 7110 Remote Controller 7201 Main unit 7202 Case 7203 Display section 7204 Keyboard 7205 External connection port 7206 Pointing Device 7301 Case 7302 Case 7303 Connection section 7304 Display section 7305 Display section 7306 Speaker section 7307 Recording medium insertion section 7308 LED Lamp 7309 Operation key 7310 Connection terminal 7311 Sensor 7312 Microphone 7400 Mobile Phone 7401 Case 7402 Display section 7403 Operation button 7404 External connection port 7405 Speaker 7406 Mike 7450 Computer 7451L Housing 7451R Housing 7452L Display 7452R Display section 7453 Operation button 7454 Hinge 7455L Left speaker 7455R Right speaker 7456 External connection port 7500 Lighting Equipment 7501 Case 7503a Light emitting part 7503b Light emitting part 7503c Light emitting part 7503d Light emitting part

Claims

[Claim 1] A first conductive film; a first insulating film having a region in contact with an upper surface of the first conductive film; a second insulating film having a region in contact with an upper surface of the first insulating film; an oxide semiconductor film having a region in contact with an upper surface of the second insulating film; a second conductive film having a region in contact with a top surface of the oxide semiconductor film; a third insulating film having a region in contact with an upper surface of the oxide semiconductor film and a region in contact with an upper surface of the second conductive film; a fourth insulating film having a region in contact with an upper surface of the third insulating film; a fifth insulating film having a region in contact with an upper surface of the fourth insulating film; a third conductive film having a region in contact with an upper surface of the fifth insulating film and a region in contact with an upper surface of the first conductive film; a fourth conductive film having a region in contact with the first insulating film and a region in contact with the second conductive film; the oxide semiconductor film has a channel formation region, the first conductive film has a region overlapping the channel formation region, the third conductive film has a region overlapping with the channel formation region, the third conductive film has a region in contact with the first conductive film, the second conductive film has a region functioning as one of a source electrode and a drain electrode, The fourth conductive film is made of the same material as the third conductive film.

Citation Information

Patent Citations

  • Semiconductor device and method for manufacturing the same

    JP2010141308A

  • Semiconductor device, semiconductor device manufacturing method, TFT substrate, and display device

    JP2010212284A

  • Semiconductor device and method for manufacturing the same

    JP2011035387A

  • Semiconductor device and method of manufacturing the same

    JP2011044699A

  • Semiconductor device and method of manufacturing the same

    JP2011119714A