Semiconductor device

Abstract

To provide a semiconductor device capable of reducing a heat resistance while reducing an inductance, and provide a manufacturing method of them.SOLUTION: In a semiconductor device 20, a front surface metal body 52 of a substrate 50 is electrically connected to a drain electrode 40D provided onto one surface of a semiconductor element 40L. A front surface metal body 62 of the other substrate 60 is electrically connected to a source electrode 40S provided to a back surface of the semiconductor element. A signal terminal 93 is electrically connected to a pad 40P provided to the same surface of the source electrode via a bonding wire 110. In a direction that is arranged to the semiconductor element and the signal terminal 93, an end part 64e of the front surface metal body 62 is positioned to between an end part 70e1 of a conductive spacer 70 and an end part 40Le of a semiconductor element 40L.SELECTED DRAWING: Figure 16

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based on Patent Application No. 2021-153458 filed in Japan on September 21, 2021, and the contents of the original application are incorporated by reference in their entirety. [Technical field]

[0002] The disclosure herein relates to a semiconductor device and a method for manufacturing the same. [Background technology]

[0003] Patent Document 1 discloses a semiconductor device including a semiconductor chip having main electrodes on both sides, a first heat sink, a second heat sink, and a signal terminal. A drain electrode is provided on one side of the semiconductor chip, and a source electrode and a signal pad are provided on the back side. The first heat sink is electrically connected to the drain electrode, and the second heat sink is electrically connected to the source electrode. The signal terminal is connected to the pad via a bonding wire. The contents of the prior art documents are incorporated by reference as explanations of the technical elements in this specification. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2020-64907 A Summary of the Invention

[0005] In a semiconductor device with a double-sided heat dissipation structure, as typified by Patent Document 1, a terminal (conductive spacer) is placed between the source electrode and the second heat sink to avoid contact between the bonding wire and the second heat sink, that is, to ensure the height of the bonding wire. The thicker the terminal, the farther the opposing surfaces of the first heat sink and the second heat sink are, weakening the effect of canceling magnetic fluxes caused by currents flowing in opposite directions, that is, the effect of reducing inductance. It also increases thermal resistance.

[0006] Also, by cutting out a portion of the second heat sink closer to the signal terminal than the terminal, it is possible to avoid contact between the bonding wire and the second heat sink and to bring the opposing surfaces of the first heat sink and the second heat sink closer to each other. However, the cutout hinders heat diffusion from the semiconductor element to the second heat sink. With the above configuration, it is difficult to reduce the dead space. In the above-mentioned viewpoints and other viewpoints not mentioned, further improvements are required for semiconductor devices.

[0007] One disclosed object is to provide a semiconductor device and a method for manufacturing the same that can reduce inductance and thermal resistance at the same time.

[0008] The semiconductor device disclosed herein comprises: a semiconductor element having a first main electrode provided on one surface, a second main electrode provided on a back surface opposite to the first surface in a plate thickness direction, and a signal pad provided on the back surface at a position different from the second main electrode; a first wiring member electrically connected to the first main electrode; a second wiring member electrically connected to the second main electrode; A signal terminal; and a bonding wire electrically connecting the pad and the signal terminal; the second wiring member is a substrate having an insulating base material, a front surface metal body disposed on a front surface of the insulating base material that faces the semiconductor element and electrically connected to the second main electrode, and a back surface metal body disposed on a back surface of the insulating base material; In the arrangement direction of the semiconductor element and the signal terminal, an end of the front surface metal body is located between an end of a joining object to which the front surface metal body is joined and an end of the semiconductor element, The insulating base material has an exposed portion (61a1, 61a2) exposed from the surface metal body, The tip portion (110t) of the bonding wire faces the exposed portion in the thickness direction of the plate, The bond wire contacts the exposed portion of the insulating substrate.

[0009] According to the disclosed semiconductor device, a substrate is used as the second wiring member. The surface metal body of the substrate is patterned so that the end of the surface metal body is located between the end of the joining target and the end of the semiconductor element in the arrangement direction. Since the end of the surface metal body is located inside the end of the semiconductor element in this way, contact between the surface metal body and the bonding wire can be avoided, and the opposing surfaces of the surface metal body of the second wiring member and the conductive part of the first wiring member can be brought closer to each other. This enhances the effect of canceling magnetic flux, and inductance can be reduced. In addition, the heat transfer path from the semiconductor element to the surface metal body of the second wiring member is shortened, so that thermal resistance can be reduced.

[0010] Furthermore, since the end of the front metal body is located outside the end of the joining object, the heat of the semiconductor element can be diffused outside the joining object through the front metal body. This reduces the thermal resistance. As a result, the thermal resistance can be reduced while reducing the inductance.

[0011] The method for manufacturing a semiconductor device disclosed herein includes the steps of: a first connecting step of electrically connecting a first main electrode provided on one surface of the semiconductor element to a first wiring member; a wire bonding process for connecting, via a bonding wire, a signal pad provided on a back surface of the semiconductor element, which is opposite to the one surface in the plate thickness direction, to a signal terminal; a second connection step of electrically connecting a second main electrode provided at a position different from the pad on the back surface to the second wiring member after the wire bonding step, In the second connecting step, a substrate having an insulating base material, a front surface metal body disposed on a front surface of the insulating base material that faces the semiconductor element and electrically connected to a second main electrode, and a back surface metal body disposed on the back surface of the insulating base material, the substrate being patterned such that an end of the front surface metal body is located between an end of a joining object to which the front surface metal body is joined and an end of the semiconductor element in the arrangement direction of the semiconductor element and the signal terminal; The second main electrode and the second wiring member are electrically connected while the exposed portion of the insulating base material exposed from the front surface metal body is brought into contact with a bonding wire.

[0012] According to the disclosed method for manufacturing a semiconductor device, a substrate is used as the second wiring member. Then, the surface metal body of the substrate is patterned so that the end of the surface metal body is located between the end of the joining target and the end of the semiconductor element in the arrangement direction. Since the end of the surface metal body is located inside the end of the semiconductor element, contact between the surface metal body and the bonding wire can be avoided, and the opposing surfaces of the surface metal body of the second wiring member and the conductive part of the first wiring member can be brought closer to each other. This enhances the effect of canceling magnetic flux and reduces inductance. In addition, the heat transfer path from the semiconductor element to the surface metal body of the second wiring member is shortened, so that the thermal resistance can be reduced. By electrically connecting the second main electrode and the second wiring member while contacting the exposed part of the insulating base material exposed from the surface metal body with the bonding wire, the opposing surfaces are brought closer to each other, and the effects of reducing inductance and thermal resistance can be enhanced.

[0013] Furthermore, since the end of the front metal body is located outside the end of the joining object, the heat of the semiconductor element can be diffused outside the end of the joining object through the front metal body. This reduces the thermal resistance. As a result, the thermal resistance can be reduced while reducing the inductance.

[0014] The disclosed aspects of the present specification adopt different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims are illustrative of the corresponding relationship with the embodiments described below, and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the following detailed description and the attached drawings. [Brief description of the drawings]

[0015] [Figure 1]1 is a diagram showing a circuit configuration and a drive system of a power conversion device to which a semiconductor device is applied; [Diagram 2] 1 is a perspective view showing a semiconductor device according to a first embodiment. [Diagram 3] FIG. 3 is a plan view seen from the Z1 direction in FIG. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. [Diagram 5] FIG. 4 is a cross-sectional view taken along line VV in FIG. [Figure 6] FIG. 4 is a cross-sectional view taken along line VI-VI in FIG. [Figure 7] FIG. 4 is a cross-sectional view taken along line VII-VII in FIG. [Figure 8] FIG. 2 is a plan view showing a state in which a semiconductor element is mounted on a substrate. [Figure 9] FIG. 2 is a plan view showing a circuit pattern on the substrate on the drain electrode side. [Figure 10] FIG. 2 is a plan view showing a circuit pattern of the substrate on the source electrode side. [Figure 11] FIG. 7 is an enlarged view of region XI in FIG. 6. [Figure 12] FIG. 11 is a cross-sectional view showing a modified example. [Figure 13] FIG. 11 is a cross-sectional view showing a modified example. [Figure 14] FIG. [Figure 15] FIG. [Figure 16] FIG. 11 is a cross-sectional view showing an example of a semiconductor device according to a second embodiment. [Figure 17] 5A to 5C are cross-sectional views showing a manufacturing method. [Figure 18] FIG. 11 is a cross-sectional view showing another example of a semiconductor device. [Figure 19] FIG. 13 is a diagram showing the effect of reducing inductance. [Figure 20] FIG. [Figure 21] FIG. 13 is a perspective view of a semiconductor device according to a third embodiment. [Figure 22] 22 is a plan view of FIG. 21 as seen from the Z2 direction. [Figure 23] 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. 22. [Figure 24] FIG. 24 is a cross-sectional view taken along line XXIV-XXIV in FIG. 22. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, several embodiments will be described with reference to the drawings. In addition, by assigning the same reference numerals to corresponding components in each embodiment, duplicated explanations may be omitted. When only a part of the configuration is described in each embodiment, the configuration of the other embodiment described above can be applied to the other parts of the configuration. In addition to the combination of configurations explicitly stated in the description of each embodiment, configurations of several embodiments can be partially combined together even if not explicitly stated, as long as there is no particular problem with the combination.

[0017] The semiconductor device of this embodiment is applied to, for example, a power conversion device of a moving body using a rotating electric machine as a drive source. The moving body is, for example, an electric vehicle such as an electric vehicle (EV), a hybrid vehicle (HV), a plug-in hybrid vehicle (PHV), an aircraft such as a drone, a ship, a construction machine, or an agricultural machine. An example of application to a vehicle will be described below.

[0018] (First embodiment) First, a schematic configuration of a drive system of a vehicle will be described with reference to FIG.

[0019] <Vehicle drive system> As shown in FIG. 1, a vehicle drive system 1 includes a DC power supply 2, a motor generator 3, and a power conversion device 4.

[0020] The DC power supply 2 is a DC voltage source composed of a chargeable and dischargeable secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a drive source for the vehicle, that is, an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 performs power conversion between the DC power supply 2 and the motor generator 3.

[0021] <Power conversion device> Next, a circuit configuration of the power conversion device 4 will be described with reference to Fig. 1. The power conversion device 4 includes a power conversion circuit. The power conversion device 4 of this embodiment includes a smoothing capacitor 5 and an inverter 6 which is the power conversion circuit.

[0022] The smoothing capacitor 5 mainly smoothes the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to a P line 7, which is a power supply line on the high potential side, and an N line 8, which is a power supply line on the low potential side. The P line 7 is connected to the positive electrode of the DC power supply 2, and the N line 8 is connected to the negative electrode of the DC power supply 2. The positive electrode of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative electrode of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel to the DC power supply 2. The P line 7 and the N line 8 may be referred to as power supply lines 7, 8.

[0023] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts a DC voltage into a three-phase AC voltage in accordance with switching control by a control circuit (not shown) and outputs the voltage to the motor generator 3. This drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 upon receiving rotational force from the wheels into a DC voltage in accordance with switching control by the control circuit and outputs the DC voltage to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power source 2 and the motor generator 3.

[0024] The inverter 6 is configured with upper and lower arm circuits 9 for three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 each have an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side. A connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via an output line 10. The inverter 6 has six arms. Each arm is configured with a switching element. At least a part of each of the P line 7, the N line 8, and the output line 10 is configured with a conductive member such as a bus bar.

[0025] In this embodiment, an n-channel MOSFET 11 is used as a switching element constituting each arm. The number of switching elements constituting each arm is not particularly limited. There may be one or more. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

[0026] As an example, in this embodiment, each arm has two MOSFETs 11. The two MOSFETs 11 constituting one arm are connected in parallel. In the upper arm 9H, the drains of the two MOSFETs 11 connected in parallel are connected to the P line 7. In the lower arm 9L, the sources of the two MOSFETs 11 connected in parallel are connected to the N line 8. The sources of the two MOSFETs 11 connected in parallel in the upper arm 9H and the drains of the two MOSFETs 11 connected in parallel in the lower arm 9L are connected to each other. The two MOSFETs 11 connected in parallel are turned on and off at the same timing by a common gate drive signal (drive voltage).

[0027] A freewheeling diode 12 is connected in anti-parallel to each of the MOSFETs 11. The diode 12 may be a parasitic diode (body diode) of the MOSFET 11, or may be provided separately from the parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain. The upper and lower arm circuits 9 for one phase are provided by one semiconductor device 20. Details of the semiconductor device 20 will be described later.

[0028] The power conversion device 4 may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. The converter is provided between the DC power source 2 and the smoothing capacitor 5. The converter is configured to include, for example, a reactor and the above-mentioned upper and lower arm circuits 9. With this configuration, voltage can be increased and decreased. The power conversion device 4 may include a filter capacitor that removes power supply noise from the DC power source 2. The filter capacitor is provided between the DC power source 2 and the converter.

[0029] The power conversion device 4 may include a drive circuit for a switching element constituting the inverter 6 or the like. The drive circuit supplies a drive voltage to the gate of the MOSFET 11 of the corresponding arm based on a drive command from the control circuit. The drive circuit drives the corresponding MOSFET 11, i.e., turns it on and off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0030] The power conversion device 4 may include a control circuit for the switching element. The control circuit generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command based on, for example, a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit.

[0031] The various sensors include, for example, a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit is configured to include, for example, a processor and a memory. The control circuit outputs, for example, a PWM signal as a drive command. PWM is an abbreviation for Pulse Width Modulation.

[0032] <Semiconductor device> Next, the semiconductor device will be described with reference to Figs. 2 to 10. Fig. 2 is a perspective view of the semiconductor device 20. Fig. 3 is a plan view of Fig. 2 seen from the Z1 direction. Fig. 3 is a see-through view showing the internal structure. A portion covered by the sealing body 30 is indicated by a broken line. Fig. 4 is a cross-sectional view taken along the line IV-IV in Fig. 3. Fig. 5 is a cross-sectional view taken along the line VV in Fig. 3. Fig. 6 is a cross-sectional view taken along the line VI-VI in Fig. 3. Fig. 7 is a cross-sectional view taken along the line VII-VII in Fig. 3. Fig. 8 is a plan view showing a state in which the semiconductor element 40 is mounted on the substrate 50. Fig. 8 is a view in which the sealing body 30 and the substrate 60 are omitted from Fig. 3. Fig. 9 is a plan view showing a circuit pattern of the surface metal body 52 on the substrate 50. Fig. 10 is a plan view showing a circuit pattern of the surface metal body 62 on the substrate 60.

[0033] In the following, the thickness direction of the semiconductor element 40 (semiconductor substrate) is defined as the Z direction. The arrangement direction of the multiple semiconductor elements 40 arranged side by side, perpendicular to the Z direction, is defined as the X direction. In this embodiment, the arrangement direction of the multiple semiconductor elements 40 connected in parallel is defined as the X direction. The direction perpendicular to both the Z direction and the X direction is defined as the Y direction. Unless otherwise specified, a shape viewed from the Z direction, in other words a shape along the XY plane defined by the X direction and the Y direction, is defined as a planar shape. The planar view from the Z direction may be simply referred to as a planar view.

[0034] 2 to 10, the semiconductor device 20 constitutes one of the above-mentioned upper and lower arm circuits 9, i.e., one phase of the upper and lower arm circuits 9. The semiconductor device 20 includes a sealing body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, an arm connection portion 80, and an external connection terminal 90. The semiconductor device 20 may be called a semiconductor module, a power card, or the like.

[0035] The encapsulant 30 encapsulates a part of the other elements constituting the semiconductor device 20. The remaining parts of the other elements are exposed to the outside of the encapsulant 30. The encapsulant 30 is made of, for example, a resin. An example of the resin is an epoxy resin. The encapsulant 30 is made of a resin and molded by, for example, a transfer molding method. Such an encapsulant 30 may be called an encapsulating resin body, a molded resin, a resin molded body, or the like. The encapsulant 30 may be formed by using, for example, a gel. The gel is filled (placed) in, for example, the opposing regions of the pair of substrates 50, 60.

[0036] As shown in FIG. 2 to FIG. 4, the sealing body 30 has a substantially rectangular shape in plan view. The sealing body 30 has one surface 30a and a back surface 30b opposite to the one surface 30a in the Z direction as surfaces forming an outer periphery. The one surface 30a and the back surface 30b are, for example, flat surfaces. The sealing body 30 also has side surfaces 30c, 30d, 30e, and 30f that connect the one surface 30a and the back surface 30b. The side surface 30c is a surface from which the power terminal 91 and the signal terminal 93H of the external connection terminal 90 protrude. The side surface 30d is a surface opposite to the side surface 30c in the Y direction. The side surface 30d is a surface from which the output terminal 92 and the signal terminal 93L protrude. The side surfaces 30e and 30f are surfaces from which the external connection terminal 90 does not protrude. The side surface 30e is a surface opposite to the side surface 30f in the X direction.

[0037] The semiconductor element 40 is formed by forming a switching element on a semiconductor substrate made of silicon (Si) or a wide band gap semiconductor with a wider band gap than silicon. Examples of wide band gap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor element 40 may be called a power element, a semiconductor chip, or the like.

[0038] The semiconductor element 40 of this embodiment is formed by forming the n-channel MOSFET 11 on a semiconductor substrate made of SiC. The MOSFET 11 has a vertical structure so that a main current flows in the thickness direction of the semiconductor element 40 (semiconductor substrate), that is, in the Z direction. The semiconductor element 40 has main electrodes of a switching element on both sides in the Z direction, which is the thickness direction of the semiconductor element 40. Specifically, as main electrodes, the semiconductor element 40 has a drain electrode 40D on one side and a source electrode 40S on a back side, which is the opposite side in the Z direction from the one side. The main current flows between the drain electrode 40D and the source electrode 40S.

[0039] When the diode 12 is a parasitic diode, the source electrode 40S also serves as an anode electrode, and the drain electrode 40D also serves as a cathode electrode. The diode 12 may be formed on a chip separate from the MOSFET 11. The drain electrode 40D is a main electrode on the high potential side, and the source electrode 40S is a main electrode on the low potential side.

[0040] The semiconductor element 40 has a substantially rectangular shape, for example a square, in plan view. As shown in Fig. 3 and Fig. 8, the semiconductor element 40 has a pad 40P, which is an electrode for signals, on the back surface. The pad 40P is formed at a position different from the source electrode 40S on the back surface. The pad 40P includes at least a gate pad. The semiconductor element 40 of this embodiment has four pads 40P. As shown in Fig. 8, the pad 40P includes a gate pad GP, a Kelvin source pad KSP, an anode pad AP, and a cathode pad KP.

[0041] The gate pad GP is a pad 40P for applying a drive voltage to the gate electrode of the MOSFET 11. In other words, the gate pad GP is a pad 40P for the gate electrode that controls the main current flowing between the drain electrode 40D, which is the main electrode, and the source electrode 40S. The Kelvin source pad KSP is a pad 40P for detecting the source potential of the MOSFET 11, that is, the potential of the source electrode 40S. The anode pad AP is a pad 40P for detecting the anode potential of a temperature-sensing diode (not shown) included in the semiconductor element 40. The cathode pad KP is a pad 40P for detecting the cathode potential of the temperature-sensing diode.

[0042] Among the pads 40P, the gate pad GP, the anode pad AP, and the cathode pad KP are electrically isolated from the source electrode 40S. The Kelvin source pad KSP is electrically connected to the source electrode 40S. In this embodiment, the gate pad GP, the Kelvin source pad KSP, the anode pad AP, and the cathode pad KP are arranged in this order in the X direction.

[0043] The source electrode 40S and the pad 40P are exposed from a protective film (not shown) formed on the rear surface of the semiconductor substrate. The drain electrode 40D is formed on almost the entire surface. The source electrode 40S is formed on a part of the rear surface of the semiconductor element 40. In a plan view, the drain electrode 40D has a larger area than the source electrode 40S. The drain electrode 40D corresponds to a first main electrode, and the source electrode 40S corresponds to a second main electrode.

[0044] The semiconductor device 20 includes a plurality of semiconductor elements 40 having the above-described configuration. The plurality of semiconductor elements 40 includes a semiconductor element 40H constituting the upper arm 9H and a semiconductor element 40L constituting the lower arm 9L. The semiconductor element 40H may be referred to as an upper arm element, and the semiconductor element 40L may be referred to as a lower arm element. The semiconductor element 40 of this embodiment includes two semiconductor elements 40H and two semiconductor elements 40L.

[0045] The semiconductor element 40H includes a semiconductor element 41H which is a first element and a semiconductor element 42H which is a second element. The two semiconductor elements 40H (41H, 42H) are aligned in the X direction. The two semiconductor elements 40H aligned in the X direction have a common structure. The two semiconductor elements 40H having a common structure are aligned in the X direction in the same orientation. The two semiconductor elements 40H are connected in parallel to each other.

[0046] The semiconductor element 40L includes a semiconductor element 41L which is a first element and a semiconductor element 42L which is a second element. The two semiconductor elements 40L (41L, 42L) are aligned in the X direction. The two semiconductor elements 40L aligned in the X direction have a common structure. The two semiconductor elements 40L having a common structure are aligned in the X direction in the same orientation. The two semiconductor elements 40L are connected in parallel to each other.

[0047] In this embodiment, all the semiconductor elements 40 have a common structure. The arrangement of the semiconductor elements 41H and 42H and the arrangement of the semiconductor elements 41L and 42L have two-fold symmetry around an axis along the Z direction. The semiconductor elements 40H and 40L are aligned in the Y direction. The semiconductor device 20 has two rows of the semiconductor elements 40H and 40L aligned in the Y direction.

[0048] The semiconductor elements 40 are disposed at approximately the same positions as one another in the Z direction. A drain electrode 40D of each semiconductor element 40 faces the substrate 50. A source electrode 40S of each semiconductor element 40 faces the substrate 60.

[0049] The substrates 50 and 60 are disposed in the Z direction so as to sandwich the multiple semiconductor elements 40. The substrates 50 and 60 are disposed so as to at least partially face each other in the Z direction. The substrates 50 and 60 contain all of the multiple semiconductor elements 40 (40H, 40L) in a plan view.

[0050] The substrate 50 is disposed on the drain electrode 40D side with respect to the semiconductor element 40. The substrate 60 is disposed on the source electrode 40S side with respect to the semiconductor element 40. The substrate 50 is electrically connected to the drain electrode 40D as described later, and provides a wiring function. Similarly, the substrate 60 is electrically connected to the source electrode 40S, and provides a wiring function. For this reason, the substrates 50 and 60 are sometimes referred to as wiring members, wiring substrates, etc. The substrate 50 is sometimes referred to as a drain substrate, and the substrate 60 is sometimes referred to as a source substrate. The substrates 50 and 60 provide a heat dissipation function for dissipating heat generated by the semiconductor element 40. For this reason, the substrates 50 and 60 are sometimes referred to as a heat dissipation member. The substrate 50 corresponds to a first wiring member. The substrate 60 is a second wiring member electrically connected to a second main electrode.

[0051] The substrate 50 has an opposing surface 50a facing the semiconductor element 40 and a back surface 50b opposite to the opposing surface 50a. The substrate 50 includes an insulating base material 51, a front metal body 52, and a back metal body 53. The substrate 60 has an opposing surface 60a facing the semiconductor element 40 and a back surface 60b opposite to the opposing surface 60a. The substrate 60 includes an insulating base material 61, a front metal body 62, and a back metal body 63. Hereinafter, the front metal bodies 52, 62 and the back metal bodies 53, 63 may be simply referred to as metal bodies 52, 53, 62, and 63. The substrate 50 is a substrate in which the insulating base material 51 and the metal bodies 52, 53 are laminated. The substrate 60 is a substrate in which the insulating base material 61 and the metal bodies 62, 63 are laminated.

[0052] The insulating substrate 51 electrically separates the front metal body 52 from the back metal body 53. Similarly, the insulating substrate 61 electrically separates the front metal body 62 from the back metal body 63. The insulating substrates 51 and 61 are sometimes called insulating layers. The material of the insulating substrates 51 and 61 is resin or ceramic, which is an inorganic material. For example, epoxy resin or polyimide resin can be used as the resin. For example, Al2O3 (alumina) or Si3N4 (silicon nitride) can be used as the ceramic. When the insulating substrates 51 and 61 are resin, the substrates 50 and 60 are sometimes called metal-resin substrates. When the insulating substrates 51 and 61 are ceramic, the substrates 50 and 60 are sometimes called metal-ceramic substrates.

[0053] In the case of the insulating base material 51, 61 using a resin material, an inorganic filler (inorganic filling material) may be contained in the resin in order to improve heat dissipation and insulation properties. The linear expansion coefficient may be adjusted by adding a filler. Examples of the filler that can be used include Al2O3, SiO2 (silicon dioxide), AlN (aluminum nitride), and BN (boron nitride). The insulating base material 51, 61 may contain only one type of filler or multiple types of fillers.

[0054] Considering heat dissipation and insulation, in the case of a resin-based material, the thickness of each of the insulating base materials 51 and 61, that is, the length in the Z direction, is preferably about 50 μm to 300 μm. In the case of a ceramic-based material, the thickness of the insulating base materials 51 and 61 is preferably about 200 μm to 500 μm. In the Z direction, the front surface of the insulating base materials 51 and 61 is the inner surface, that is, the surface on the semiconductor element 40 side, and the back surface opposite the front surface in the Z direction is the outer surface. The insulating base materials 51 and 61 may have the same (identical) material composition, or may have different materials. In this embodiment, the resin-based insulating base materials 51 and 61 are adopted, and the material composition is the same. The linear expansion coefficient of the insulating base materials 51 and 61 is adjusted to be approximately the same as that of the sealing body 30 by adding a filler to the resin. By adding a filler to the resin, the linear expansion coefficient of the insulating base materials 51 and 61 and the sealing body 30 is close to that of the metal (Cu) constituting the metal bodies 52, 53, 62, and 63.

[0055] The metal bodies 52, 53, 62, 63 are provided as, for example, a metal plate or a metal foil. The metal bodies 52, 53, 62, 63 are formed of a metal material having good electrical conductivity and thermal conductivity, such as Cu or Al. The thickness of each of the metal bodies 52, 53, 62, 63 is, for example, about 0.1 mm to 3 mm. The front metal body 52 is disposed on the front surface of the insulating base material 51 in the Z direction. The back metal body 53 is disposed on the back surface of the insulating base material 51. Similarly, the front metal body 62 is disposed on the front surface of the insulating base material 61 in the Z direction. The back metal body 63 is disposed on the back surface of the insulating base material 61.

[0056] The thickness relationship between the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 is not particularly limited. The thickness of the front surface metal body 52 may be thicker than the back surface metal body 53 or may be approximately equal to the back surface metal body 53. The thickness of the front surface metal body 52 may be thinner than the back surface metal body 53. Similarly, the thickness of the front surface metal body 62 may be thicker than the back surface metal body 63 or may be approximately equal to the back surface metal body 63. The thickness of the front surface metal body 62 may be thinner than the back surface metal body 63. The thickness relationship between the front surface metal bodies 52, 62 is not particularly limited, and the thickness relationship between the back surface metal bodies 53, 63 is not particularly limited.

[0057] The surface metal bodies 52, 62 are patterned. The surface metal bodies 52, 62 provide wiring, that is, circuits. For this reason, the surface metal bodies 52, 62 may be referred to as a circuit pattern, a wiring layer, a circuit conductor, or the like. The surface metal bodies 52, 62 may have a plating film of Ni-based or Au, or the like, on the metal surface. The pattern of the surface metal bodies 52, 62 may be referred to as a circuit pattern. The surface of the surface metal body 52 and the non-arrangement area of ​​the surface metal body 52 on the surface of the insulating base material 51 form the opposing surface 50a of the substrate 50. Similarly, the surface of the surface metal body 62 and the non-arrangement area of ​​the surface metal body 62 on the surface of the insulating base material 61 form the opposing surface 60a of the substrate 60.

[0058] For example, the front surface metal bodies 52, 62 may be prepared by patterning into a predetermined shape by pressing or etching, and then attached to a two-layer laminate of the insulating base material 51, 61 and the back surface metal body 53, 63 to form the substrates 50, 60. After forming a three-layer laminate of the front surface metal bodies 52, 62, the insulating base material 51, 61, and the back surface metal bodies 53, 63, the front surface metal bodies 52, 62 may be patterned by cutting or etching.

[0059] As shown in Figs. 8 and 9, the front surface metal body 52 has a P wiring 54 and a relay wiring 55. The P wiring 54 and the relay wiring 55 are electrically separated by a predetermined distance (gap). This gap is filled with the sealing body 30. As the surfaces on the semiconductor element 40 side in the Z direction, the P wiring 54 has an opposing surface 54a, and the relay wiring 55 has an opposing surface 55a. These opposing surfaces 54a, 55a form the opposing surface 50a described above.

[0060] The P wiring 54 is connected to a P terminal 91P, which will be described later, and a drain electrode 40D of the semiconductor element 40H. The P wiring 54 electrically connects the P terminal 91P and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 electrically connects the drain electrode 40D of the semiconductor element 41H and the drain electrode 40D of the semiconductor element 42H.

[0061] The relay wiring 55 is connected to the drain electrode 40D of the semiconductor element 40L, the arm connection portion 80, and the output terminal 92. The relay wiring 55 electrically connects the arm connection portion 80 and the drain electrode 40D of the semiconductor element 40L. The relay wiring 55 electrically connects the source electrode 40S of the semiconductor element 40H and the drain electrode 40D of the semiconductor element 40L to the output terminal 92. The relay wiring 55 electrically connects the drain electrode 40D of the semiconductor element 41L and the drain electrode 40D of the semiconductor element 42L.

[0062] The P wiring 54 and the relay wiring 55 are arranged side by side in the Y direction. In the Y direction, the P wiring 54 is arranged on the power supply terminal 91 side, and the relay wiring 55 is arranged on the output terminal 92 side. The P wiring 54 is arranged on the side of the sealing body 30, which is side 30c, and the relay wiring 55 is arranged on the side of the sealing body 30, which is side 30d.

[0063] The P wiring 54 has a notch 540. The notch 540 opens on one of the four sides of a substantially rectangular shape in plan, with the X direction as the longitudinal direction. The notch 540 is provided on the side facing the side surface 30c, at substantially the center in the X direction. The P wiring 54 has a base 541 and a pair of extensions 542. The base 541 and the pair of extensions 542 define the notch 540. The P wiring 54 has a substantially U-shape (concave shape) in plan.

[0064] The base 541 is a portion closer to the relay wiring 55 side than the cutout 540 and the extension portion 542 in the Y direction, and has a generally rectangular shape in plan view. The base 541 overlaps the semiconductor element 40H in plan view. That is, the two semiconductor elements 40H (41H, 42H) are disposed on the base 541. The drain electrodes 40D of the semiconductor elements 40H are connected to the base 541.

[0065] The two extension parts 542 extend from the base 541 in the same direction, specifically, in the Y direction toward the side surface 30c of the sealing body 30. One of the extension parts 542 is connected to the vicinity of one end of the base 541 in the X direction, and the other is connected to the vicinity of the other end of the base 541. Both ends of the U-shape of the P wiring 54, that is, the ends of the two extension parts 542 opposite the base 541, are at approximately the same positions in the Y direction. The pair of extension parts 542 sandwich the notch 540 in the X direction. The length of the base 541 in the Y direction is longer than the depth of the notch 540 and the extension parts 542.

[0066] The relay wiring 55 also has a notch 550. The notch 550 opens on one of the four sides of the approximately rectangular shape in plan view. The notch 550 is provided in approximately the center in the X direction on the side opposite the side surface 30d. That is, the front surface metal body 52 has a notch 540 provided on one of the ends in the Y direction, and a notch 550 provided on the other end.

[0067] The relay wiring 55 has a base 551 and a pair of extensions 552. The base 551 and the pair of extensions 552 define a notch 550. The relay wiring 55 has a substantially U-shape (concave shape) in plan view. The base 551 is a portion closer to the P wiring 54 side than the notch 550 and the extensions 552 in the Y direction, and has a substantially rectangular shape in plan view. The base 551 overlaps the semiconductor element 40L in plan view. That is, the two semiconductor elements 40L (41L, 42L) are disposed on the base 551. The drain electrode 40D of each of the semiconductor elements 40L is connected to the base 551.

[0068] The two extension parts 552 extend from the base 551 in the same direction, specifically, in the Y direction toward the side surface 30d of the sealing body 30. One of the extension parts 552 is connected to the vicinity of one end of the base 551 in the X direction, and the other is connected to the vicinity of the other end of the base 551. Both ends of the U-shape of the relay wiring 55, that is, the ends of the two extension parts 552 opposite the base 551, are at approximately the same positions in the Y direction. The pair of extension parts 552 sandwich the notch 550 in the X direction. The length of the base 551 in the Y direction is longer than the depth of the notch 550 and the extension parts 552.

[0069] As shown in Fig. 3, Fig. 10, etc., the front surface metal body 62 has an N wiring 64 and a relay wiring 65. The N wiring 64 and the relay wiring 65 are electrically separated by a predetermined interval (gap). This gap is filled with the sealing body 30. As the surfaces on the semiconductor element 40 side in the Z direction, the N wiring 64 has an opposing surface 64a, and the relay wiring 65 has an opposing surface 65a. These opposing surfaces 64a, 65a form the aforementioned opposing surface 60a.

[0070] The N wiring 64 is connected to an N terminal 91N, which will be described later, and a source electrode 40S of the semiconductor element 40L. The N wiring 64 electrically connects the N terminal 91N and the source electrode 40S of the semiconductor element 40L. The N wiring 64 electrically connects the source electrode 40S of the semiconductor element 41L and the source electrode 40S of the semiconductor element 42L. The N wiring 64 may be referred to as a negative wiring, a low potential power supply wiring, or the like.

[0071] The relay wiring 65 is connected to the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. The relay wiring 65 electrically connects the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. The relay wiring 65 electrically connects the source electrode 40S of the semiconductor element 41H and the source electrode 40S of the semiconductor element 42H.

[0072] The N wiring 64 also has a notch 640. The notch 640 opens on one of the four sides of the approximately rectangular shape in plan view. The notch 640 is provided in approximately the center in the X direction on the side facing the side surface 30c. The N wiring 64 has a base 641 and a pair of extension parts 642. The base 641 and the pair of extension parts 642 define the notch 640. The N wiring 64 has an approximately U-shape (concave shape) in plan view.

[0073] The base 641 is a portion closer to the side surface 30d than the cutout 640 and the extension 642 in the Y direction. The base 641 has a generally rectangular shape in plan with the X direction as its longitudinal direction. The base 641 is arranged alongside the relay wiring 65 in the Y direction. The base 641 overlaps with the relay wiring 55 in a plan view. The source electrode 40S of each semiconductor element 40L is connected to the base 641.

[0074] The two extension portions 642 extend from the base 641 in the same direction, specifically, in the Y direction toward the side surface 30c of the sealing body 30. One of the extension portions 642 is connected to the vicinity of one end of the base 641 in the X direction, and the other is connected to the vicinity of the other end of the base 641. Both ends of the U-shape of the N wiring 64, that is, the ends of the two extension portions 642 opposite the base 641, are at approximately the same position in the Y direction.

[0075] The pair of extension parts 642 form both ends of the front surface metal body 62 in the X direction. The pair of extension parts 642 are disposed near the ends of the substrate 60. In a plan view, a portion of each of the pair of extension parts 642 overlaps the P wiring 54. In the Y direction, the length of the extension part 642 is longer than that of the base part 641.

[0076] As described above, the relay wiring 65 is arranged in line with the N wiring 64, specifically the base 641, in the Y direction. In the Y direction, the relay wiring 65 is arranged in a position close to the side surface 30c of the sealing body 30, and the base 641 is arranged in a position close to the side surface 30d. The relay wiring 65 is arranged between a pair of extension parts 642 in the X direction. The relay wiring 65 is sandwiched between the pair of extension parts 642. The relay wiring 65 is arranged in the notch 640. The relay wiring 65 is arranged with a predetermined interval (gap) between it and the N wiring 64. In a plan view, a part of the relay wiring 65 overlaps with the P wiring 54, and another part overlaps with the relay wiring 55. The source electrode 40S of each semiconductor element 40H is connected to the relay wiring 65. Details of the arrangement of the front surface metal body 62 (the N wiring 64 and the relay wiring 65) will be described later.

[0077] The back metal bodies 53, 63 are electrically isolated from the semiconductor element 40 and the circuit including the front metal bodies 52, 62 by the insulating substrates 51, 61. The back metal bodies 53, 63 are sometimes referred to as metal base substrates. Heat generated by the semiconductor element 40 is transferred to the back metal bodies 53, 63 via the front metal bodies 52, 62 and the insulating substrates 51, 61. The back metal bodies 53, 63 provide a heat dissipation function.

[0078] The back metal body 53, 63 in this embodiment has a substantially rectangular shape in plan view. The back metal body 53, 63 is a so-called solid conductor arranged over almost the entire back surface of the insulating base material 51, 61. As described above, the linear expansion coefficient of the insulating base material 51, 61 is adjusted by adding a filler, so that warping can be suppressed even if the patterns on the front and back are different. Of course, the back metal body 53, 63 may be patterned so as to match the front metal body 52, 62 in a plan view.

[0079] The back surface metal body 53, 63 in this embodiment is disposed over almost the entire area of ​​the back surface of the corresponding insulating base material 51, 61. To further enhance the heat dissipation effect, at least one of the back surface metal bodies 53, 63 may be exposed from the sealing body 30. In this embodiment, the back surface metal body 53 is exposed from one surface 30a of the sealing body 30, and the back surface metal body 63 is exposed from the back surface 30b. The exposed surface of the back surface metal body 53 is approximately flush with the one surface 30a. The exposed surface of the back surface metal body 63 is approximately flush with the back surface 30b. The back surface metal bodies 53, 63 form the back surfaces 50b, 60b of the substrates 50, 60.

[0080] The conductive spacer 70 provides a spacer function that ensures a predetermined distance between the semiconductor element 40 and the substrate 60. The conductive spacer 70 ensures a wire height for electrically connecting the corresponding signal terminal 93 to the pad 40P of the semiconductor element 40. The conductive spacer 70 is located midway along the electrical conduction and thermal conduction paths between the source electrode 40S of the semiconductor element 40 and the substrate 60, and provides a wiring function and a heat dissipation function. The conductive spacer 70 contains a metal material with good electrical and thermal conductivity, such as Cu. The conductive spacer 70 may have a plating film on its surface.

[0081] The conductive spacers 70 may be referred to as terminals, terminal blocks, metal blocks, etc. The semiconductor device 20 includes the same number of conductive spacers 70 as the semiconductor elements 40. Specifically, the semiconductor device 20 includes four conductive spacers 70. The conductive spacers 70 are individually connected to the semiconductor elements 40. The conductive spacers 70 are columnar bodies having a size approximately the same as or slightly smaller than that of the source electrode 40S in a plan view.

[0082] The arm connection part 80 electrically connects the relay wirings 55, 65. That is, the arm connection part 80 electrically connects the upper arm 9H and the lower arm 9L. The arm connection part 80 is provided between the semiconductor element 40H and the semiconductor element 40L in the Y direction. The arm connection part 80 is provided in an overlapping region of the relay wirings 55 and 65 in a plan view. The arm connection part 80 of this embodiment is configured to include a joint part 81 and a bonding material 103 described later.

[0083] The joint part 81 is a metal columnar body provided separately from the surface metal bodies 52, 62. Such a joint part 81 is sometimes called a joint terminal. In the Z direction, a bonding material 103 is interposed between one of the ends of the joint part 81 and the relay wiring 55, and a bonding material 103 is interposed between the other end and the relay wiring 65.

[0084] Alternatively, the joint portion 81 may be integrally connected to at least one of the surface metal bodies 52, 62. That is, the joint portion 81 may be provided integrally with the surface metal bodies 52, 62 as part of the substrates 50, 60. For example, the joint portion 81 is a convex portion of the surface metal body 62 (relay wiring 65). The arm connection portion 80 may not include the joint portion 81. That is, the arm connection portion 80 may include only the bonding material 103.

[0085] The external connection terminal 90 is a terminal for electrically connecting the semiconductor device 20 to an external device. The external connection terminal 90 is formed using a metal material with good conductivity such as copper. The external connection terminal 90 is, for example, a plate material. The external connection terminal 90 may be called a lead. The external connection terminal 90 includes a power terminal 91, an output terminal 92, and a signal terminal 93. The power terminal 91 includes a P terminal 91P and an N terminal 91N. The P terminal 91P, the N terminal 91N, and the output terminal 92 are main terminals electrically connected to the main electrodes of the semiconductor element 40. The signal terminal 93 includes a signal terminal 93H on the upper arm 9H side and a signal terminal 93L on the lower arm 9L side.

[0086] The power supply terminal 91 is an external connection terminal 90 electrically connected to the above-mentioned power supply lines 7 and 8. The P terminal 91P is electrically connected to the positive terminal of the smoothing capacitor 5. The P terminal 91P may be referred to as a positive terminal, a high potential power supply terminal, or the like. The P terminal 91P is connected to the P wiring 54 of the front surface metal body 52. ​​In other words, the P terminal 91P is connected to the drain electrode 40D of the semiconductor element 40H that constitutes the upper arm 9H.

[0087] The P terminal 91P is connected to the P wiring 54 near one end in the Y direction. The P terminal 91P extends in the Y direction from a connection portion (joint portion) with the P wiring 54, and protrudes from the side surface 30c near the center in the Z direction to the outside of the sealing body 30. The semiconductor device 20 of this embodiment includes two P terminals 91P. As shown in FIG. 8, one of the P terminals 91P is connected to one of the pair of extension portions 542, and the other is connected to the other of the pair of extension portions 542. The P terminal 91P is disposed in a position close to the notch 540, that is, inward, in each of the extension portions 542 so as to be adjacent to the N terminal 91N in a plan view. The two P terminals 91P are disposed side by side in the X direction. The two P terminals 91P are disposed at approximately the same position in the Z direction.

[0088] The N terminal 91N is electrically connected to the negative terminal of the smoothing capacitor 5. The N terminal 91N may be referred to as a negative terminal, a low potential power supply terminal, or the like. The N terminal 91N is connected to the N wiring 64 of the surface metal body 62. In other words, the N terminal 91N is connected to the source electrode 40S of the semiconductor element 40L that constitutes the lower arm 9L.

[0089] The N terminal 91N is connected to the N wiring 64 near one end in the Y direction. The N terminal 91N extends in the Y direction from the joint with the N wiring 64, and protrudes from the side surface 30c near the center in the Z direction to the outside of the sealing body 30. The semiconductor device 20 has two N terminals 91N. One of the N terminals 91N is connected to one of the pair of extension portions 642, and the other is connected to the other one of the pair of extension portions 642. The two N terminals 91N are arranged side by side in the X direction. The two N terminals 91N are arranged at approximately the same position in the Z direction.

[0090] The two N terminals 91N are disposed outside the two P terminals 91P in the X direction. In a plan view, one of the N terminals 91N is disposed near one of the P terminals 91P, and the other N terminal 91N is disposed near the other P terminal 91P. The N terminal 91N and P terminal 91P adjacent to each other in the X direction have their side surfaces facing each other in parts including parts protruding from the sealing body 30.

[0091] The output terminal 92 is electrically connected to the winding 3a (stator coil) of the corresponding phase of the motor generator 3. The output terminal 92 may be referred to as an O terminal, an AC terminal, or the like. As shown in Fig. 3 and Fig. 8, the output terminal 92 is connected to the relay wiring 55 of the surface metal body 52 of the substrate 50. In other words, the output terminal 92 is connected to the connection point between the upper arm 9H and the lower arm 9L.

[0092] The output terminal 92 is connected to the relay wiring 55 near one end in the Y direction. The output terminal 92 extends in the Y direction from a joint with the relay wiring 55, and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30d. The semiconductor device 20 has two output terminals 92. One of the output terminals 92 is connected to one of the pair of extension portions 552, and the other is connected to the other one of the pair of extension portions 552. The two output terminals 92 are arranged side by side in the X direction. The two output terminals 92 are arranged at approximately the same position in the Z direction.

[0093] The signal terminal 93 is electrically connected to a circuit board (not shown) including a drive circuit. The signal terminal 93H is electrically connected to the pad 40P of the semiconductor element 40H via the bonding wire 110. The number of the signal terminals 93H is not particularly limited. The signal terminal 93H includes at least a terminal for applying a drive voltage to the gate electrode of the semiconductor element 40H. The semiconductor device 20 of this embodiment includes two signal terminals 93H. The signal terminal 93H is disposed at a position overlapping the notch 540 of the P wiring 54 in a plan view. In the signal terminal 93H, the joint with the bonding wire 110 faces the insulating base material 51, not the surface metal body 52. ​​The two signal terminals 93H are disposed side by side in the X direction.

[0094] The signal terminal 93H extends in the Y direction from the joint with the bonding wire 110 and protrudes from near the center of the side surface 30c in the Z direction to the outside of the sealing body 30. At least a part of the protruding portion of the signal terminal 93H extends in the same direction as the power terminal 91. The signal terminal 93H is disposed between the two P terminals 91P in the X direction. In other words, the external connection terminals 90 protruding from the side surface 30c are disposed in the following order in the X direction: the N terminal 91N, the P terminal 91P, the two signal terminals 93H, the P terminal 91P, and the N terminal 91N.

[0095] The signal terminal 93H includes a gate terminal 93G and a Kelvin source terminal 93KS. The two signal terminals 93H are arranged in the order of the gate terminal 93G and the Kelvin source terminal 93KS in the direction from the semiconductor element 42H to the semiconductor element 41H. The gate terminal 93G is connected to the gate pad GP of each semiconductor element 40H via a bonding wire 110. The Kelvin source terminal 93KS is connected to the Kelvin source pad KSP of each semiconductor element 40H via a bonding wire 110.

[0096] The signal terminal 93L is electrically connected to the pad 40P of the semiconductor element 40L via the bonding wire 110. The signal terminal 93L includes at least a terminal for applying a drive voltage to the gate electrode of the semiconductor element 40L. The semiconductor device 20 of this embodiment includes four signal terminals 93L. The signal terminal 93L is disposed at a position overlapping with the notch 550 of the relay wiring 55 in a plan view. In the signal terminal 93L, the joint with the bonding wire 110 faces the insulating base material 51, not the front surface metal body 52. ​​The four signal terminals 93L are disposed side by side in the X direction.

[0097] The signal terminal 93L extends in the Y direction from the joint with the bonding wire 110, and protrudes from near the center of the side surface 30d in the Z direction to the outside of the sealing body 30. At least a part of the protruding portion of the signal terminal 93L extends in the same direction as the output terminal 92. The signal terminal 93L is disposed between the two output terminals 92 in the X direction. In other words, the external connection terminals 90 protruding from the side surface 30d are disposed in the following order in the X direction: the output terminal 92, the four signal terminals 93L, and the output terminal 92. The four signal terminals 93L are disposed in the spaces between the output terminals 92.

[0098] The signal terminals 93L include a gate terminal 93G, a Kelvin source terminal 93KS, an anode terminal 93A, and a cathode terminal 93K. The four signal terminals 93L are arranged in the order of the gate terminal 93G, the Kelvin source terminal 93KS, the anode terminal 93A, and the cathode terminal 93K in the direction from the semiconductor element 42L to the semiconductor element 41L. The arrangement of the four signal terminals 93L corresponds to the arrangement of the pads 40P of the semiconductor element 41L.

[0099] The gate terminal 93G is connected to the gate pad GP of each semiconductor element 40L via a bonding wire 110. The Kelvin source terminal 93KS is connected to the Kelvin source pad KSP of each semiconductor element 40L via a bonding wire 110. The anode terminal 93A is connected to the anode pad AP of the semiconductor element 41L via a bonding wire 110. The cathode terminal 93K is connected to the cathode pad KP of the semiconductor element 41L via a bonding wire 110.

[0100] In this manner, the semiconductor device 20 includes two signal terminals 93H and four signal terminals 93L as the signal terminals 93. The signal terminals 93H are arranged in the Y direction so as to sandwich the semiconductor element 40 between the signal terminals 93H and the signal terminals 93L. The two signal terminals 93H are arranged in the X direction together with the four power supply terminals 91 (91P, 91N). The four signal terminals 93L are arranged in the X direction together with the two output terminals 92. In order to suppress an increase in the size in the X direction, the number of signal terminals 93H is two and the number of signal terminals 93L is four. As a result, the number of external connection terminals 90 is six on each of the side surface 30c and the side surface 30d.

[0101] In a configuration in which a plurality of semiconductor elements 40 are thermally connected to each other, it is possible to ensure that the plurality of semiconductor elements 40 are not overheated by using only the temperature sensing diodes of some of the semiconductor elements 40. Therefore, only some of the plurality of semiconductor elements 40 may be connected to the anode terminal 93A and the cathode terminal 93K. In this case, the number of signal terminals 93 can be reduced. However, if the temperature sensing diodes that are not connected to the anode terminal 93A and the cathode terminal 93K are left in a so-called floating state, which is a state in which the potential is floating, there is a risk that a malfunction will occur in the semiconductor elements 40.

[0102] In this embodiment, in order to prevent the temperature sensing diode from being in a floating state in terms of potential, the Kelvin source terminal 93KS, which is the signal terminal 93H, is connected to the anode pad AP of each semiconductor element 40H via a bonding wire 110. Alternatively, the Kelvin source terminal 93KS may be connected to the cathode pad KP of each semiconductor element 40H. Similarly, the Kelvin source terminal 93KS, which is the signal terminal 93L, is connected to the anode pad AP of the semiconductor element 42L via a bonding wire 110. Alternatively, the Kelvin source terminal 93KS may be connected to the cathode pad KP of the semiconductor element 42L.

[0103] The drain electrode 40D of the semiconductor element 40 is joined to the front surface metal body 52 via a bonding material 100. The source electrode 40S of the semiconductor element 40 is joined to the conductive spacer 70 via a bonding material 101. The conductive spacer 70 is joined to the front surface metal body 62 via a bonding material 102. The joint portion 81 is joined to the front surface metal bodies 52, 62 via a bonding material 103. Of the external connection terminals 90, the P terminal 91P, the N terminal 91N, which are main terminals, and the output terminal 92 are joined to the front surface metal bodies 52, 62 via a bonding material 104.

[0104] The bonding materials 100 to 104 are conductive bonding materials. For example, solder can be used as the bonding materials 100 to 104. One example of the solder is a multi-element lead-free solder containing Cu, Ni, and the like in addition to Sn. Instead of solder, a sinter-based bonding material such as sintered silver may be used.

[0105] The P terminal 91P, the N terminal 91N, and the output terminal 92 may be directly joined to the corresponding surface metal bodies 52, 62 without using the joining material 104. The P terminal 91P, the N terminal 91N, and the output terminal 92 may be directly joined to the surface metal bodies 52, 62 by, for example, ultrasonic joining, friction stir joining, laser welding, or the like. When the joint portion 81 is provided separately from the substrates 50, 60, the joint portion 81 may be directly joined to the surface metal bodies 52, 62.

[0106] As described above, in the semiconductor device 20, the multiple semiconductor elements 40 constituting the upper and lower arm circuits 9 for one phase are encapsulated by the encapsulant 30. The encapsulant 30 integrally encapsulates (covers) the multiple semiconductor elements 40, part of the substrate 50, part of the substrate 60, the multiple conductive spacers 70, the arm connection portion 80, and parts of the external connection terminals 90. The encapsulant 30 encapsulates the insulating base materials 51, 61 and the surface metal bodies 52, 62 of the substrates 50, 60.

[0107] The semiconductor element 40 is disposed between the substrates 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the substrates 50 and 60 disposed opposite each other. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the substrate 50 is substantially flush with one surface 30a of the sealing body 30. The back surface 60b of the substrate 60 is substantially flush with the back surface 30b of the sealing body 30. Since the back surfaces 50b and 60b are exposed surfaces, heat dissipation can be improved.

[0108] Two semiconductor elements 40H (41H, 42H) arranged side by side in the X direction are connected in parallel to each other by front surface metal bodies 52, 62, a conductive spacer 70, and bonding materials 100-102. Two semiconductor elements 40L (41L, 42L) arranged side by side in the X direction are connected in parallel to each other by front surface metal bodies 52, 62, a conductive spacer 70, and bonding materials 100-102.

[0109] <Arrangement of surface metal bodies> Next, the arrangement (pattern) of the front surface metal body 62 will be described with reference to Figures 3, 6, 10, and 11. Figure 11 is an enlarged view of region XI in Figure 6. The front surface metal body 62 of this embodiment is patterned so as to have a predetermined positional relationship with some of the other elements constituting the semiconductor device 20.

[0110] First, the N wiring 64 of the front surface metal body 62 will be described. As shown in FIG. 3, FIG. 6, and FIG. 11, the semiconductor element 40L and the signal terminal 93L electrically connected via the bonding wire 110 are aligned in the Y direction. In the Y direction, the end 64e of the N wiring 64 is located between the end 70e1 of the conductive spacer 70, which is the bonding object of the N wiring 64, and the end 40Le of the semiconductor element 40L. Each of the above-mentioned ends 40Le, 64e, and 70e1 is an end on the signal terminal 93L side in the Y direction. In a configuration including the conductive spacer 70, the bonding object of the N wiring 64 is the conductive spacer 70 bonded via the bonding material 102. The bonding object may be called a connection object.

[0111] The end 64e of the N wiring 64 is located between the end 70e1 of the conductive spacer 70 connected to the semiconductor element 41L and the end 40Le of the semiconductor element 41L. Similarly, the end 64e of the N wiring 64 is located between the end 70e1 of the conductive spacer 70 connected to the semiconductor element 42L and the end 40Le of the semiconductor element 42L.

[0112] The end 64e of the N wiring 64 may be closer to the end 70e1 of the conductive spacer 70 than the end 61e1 of the insulating base material 61 in the Y direction, or may be substantially the same as the end 61e1. The end 61e1 is an end on the signal terminal 93L side in the Y direction. The end 64e of this embodiment is closer to the end 70e1 than the end 61e1. That is, the N wiring 64 is cut out. As shown in FIG. 6, FIG. 10, and FIG. 11, the insulating base material 61 has an exposed portion 61a1 exposed from the front metal body 62. The apex portion 110t of the bonding wire 110 connected to the signal terminal 93L faces the exposed portion 61a1 in the Z direction. The apex portion 110t is closer to the insulating base material 61 in the Z direction than the facing surface 64a of the N wiring 64. The apex portion 110t is located between the ends 40Le and 61e1 in the Y direction.

[0113] 11, the position of the end 64e of the N wiring 64 in the Y direction is indicated as P1, the position of the end 40Le of the semiconductor element 40L is indicated as P2, and the position of the end 70e1 of the conductive spacer 70 is indicated as P3. The position P1 of the end 64e is between the position P2 of the end 40Le and the position P3 of the end 70e1.

[0114] The relay wiring 65 has a similar configuration to the N wiring 64. As shown in FIG. 3 and FIG. 6, the semiconductor element 40H and the signal terminal 93H electrically connected via the bonding wire 110 are aligned in the Y direction. In the Y direction, the end 65e of the relay wiring 65 is located between the end 70e2 of the conductive spacer 70, which is the joint object of the relay wiring 65, and the end 40He of the semiconductor element 40H. Each of the above-mentioned ends 40He, 65e, and 70e2 is an end on the signal terminal 93H side in the Y direction. In the configuration including the conductive spacer 70, the joint object of the relay wiring 65 is the conductive spacer 70, which is joined via the joint material 102.

[0115] The end 65e of the relay wiring 65 is located between the end 70e2 of the conductive spacer 70 connected to the semiconductor element 41H and the end 40He of the semiconductor element 41H. Similarly, the end 65e of the relay wiring 65 is located between the end 70e2 of the conductive spacer 70 connected to the semiconductor element 42H and the end 40He of the semiconductor element 42H.

[0116] The end 65e of the relay wiring 65 may be closer to the end 70e2 of the conductive spacer 70 than the end 61e2 of the insulating base material 61 in the Y direction, or may be substantially the same as the end 61e2. The end 61e2 is an end on the signal terminal 93H side in the Y direction. In this embodiment, the end 65e is closer to the end 70e2 than the end 61e2. That is, the relay wiring 65 is cut out. As shown in FIG. 6 and FIG. 10, the insulating base material 61 has an exposed portion 61a2 exposed from the front metal body 62. The apex portion 110t of the bonding wire 110 connected to the signal terminal 93H faces the exposed portion 61a2 in the Z direction. The apex portion 110t is closer to the insulating base material 61 in the Z direction than the opposing surface 65a of the relay wiring 65. The apex portion 110t is located between the ends 40He and 61e2 in the Y direction.

[0117] <Summary of the First Embodiment> In this embodiment, the substrate 60 is used as a second wiring member electrically connected to the source electrode 40S, which is the second main electrode. By patterning the surface metal body 62 of the substrate 60, the end 64e of the N wiring 64 is located between the end 70e1 of the conductive spacer 70, which is the joining target of the N wiring 64, and the end 40Le of the semiconductor element 40L. The end 65e of the relay wiring 65 is located between the end 70e2 of the conductive spacer 70, which is the joining target of the relay wiring 65, and the end 40He of the semiconductor element 40H.

[0118] In this manner, the ends 64e, 65e of the front surface metal body 62 are positioned inside the ends 40Le, 40He of the corresponding semiconductor element 40. This makes it possible to avoid contact between the front surface metal body 62 and the bonding wire 110 and to bring the opposing surfaces of the front surface metal body 62 of the substrate 60 and the front surface metal body 52 of the substrate 50 closer to each other. For example, as shown in Fig. 11, the opposing surface 55a of the relay wiring 55 and the opposing surface 64a of the N wiring 64 can be brought closer to each other. In other words, the opposing surface distance D1, which is the distance between the opposing surfaces 55a, 64a in the Z direction, can be shortened.

[0119] The dashed arrows in Fig. 11 indicate the flow of current. As described above, by bringing the opposing surfaces 55a and 64a closer to each other, the effect of canceling magnetic fluxes caused by the currents flowing in the opposite directions is enhanced, and this can reduce inductance. In addition, the heat transfer path from the semiconductor element 40 to the front metal body 62 is shortened, so that the thermal resistance can be reduced.

[0120] In addition to the opposing surfaces 55a and 64a, the opposing surface 54a of the P wiring 54 and the opposing surface 64a of the N wiring 64 can be brought closer to each other. The opposing surface 54a of the P wiring 54 and the opposing surface 65a of the relay wiring 65 can be brought closer to each other. The opposing surface 55a of the relay wiring 55 and the opposing surface 65a of the relay wiring 65 can be brought closer to each other. This makes it possible to reduce inductance. Also, it makes it possible to reduce thermal resistance.

[0121] The heat spreads ideally at an angle of 45 degrees due to the presence of the heat transfer member. In this embodiment, the ends 64e and 65e of the front surface metal body 62 are located outside the ends 70e1 and 70e2 of the conductive spacer 70, which is the joint object of the front surface metal body 62. Through the front surface metal body 62, the heat of the semiconductor element 40 can be diffused to the outside of the conductive spacer 70 (joining object) in a plan view. That is, in this embodiment, the heat of the semiconductor element 40 is diffused in an ideal or near-ideal state as shown by the dashed-dotted arrow in FIG. 11. Therefore, the thermal resistance can be reduced. As described above, according to the semiconductor device 20 of this embodiment, the thermal resistance can be reduced while reducing the inductance.

[0122] In this embodiment, the above-mentioned arrangement of the front surface metal body 62 is adopted in the configuration including the conductive spacer 70. This makes it possible to bring the opposing surfaces of the front surface metal bodies 52, 62 closer to each other, that is, to reduce the thickness T1 of the conductive spacer 70. Because the conductive spacer 70 is thin, the thermal resistance can be reduced.

[0123] In this embodiment, the apex 110t of the bonding wire 110 connected to the signal terminal 93L faces the exposed portion 61a1 of the insulating base material 61 in the Z direction. The apex 110t of the bonding wire 110 connected to the signal terminal 93H faces the exposed portion 61a2 of the insulating base material 61 in the Z direction. In other words, the insulating base material 61 (and the back metal body 63) is disposed outside the ends 64e and 65e of the front metal body 62. As a result, when heat is transferred from the front metal body 62 to the insulating base material 61 and the back metal body 63, it is also diffused outside the front metal body 62 in a plan view. Therefore, the thermal resistance can be further reduced.

[0124] <Modification> As shown in Fig. 12, an end 64e of an N wiring 64, which is a front surface metal body 62, may be located between an end 40Pe on the source electrode 40S side of a pad 40P of a semiconductor element 40L and an end 40Le of the semiconductor element 40L. Fig. 12 corresponds to Fig. 11. In Fig. 12, the position of the end 40Pe is indicated as P4. A position P1 of the end 64e is between a position P2 of the end 40Le and a position P4 of the end 40Pe. This makes it easier for heat to diffuse outward from the conductive spacer 70 (joining target) in a plan view, and the thermal resistance can be further reduced.

[0125] The same applies to the end 65e of the relay wiring 65. Although not shown, the end 65e of the relay wiring 65 may be located between the end of the pad 40P of the semiconductor element 40H on the source electrode 40S side and the end 40He of the semiconductor element 40H.

[0126] Although an example in which the semiconductor device 20 includes the conductive spacer 70 has been described, the present invention is not limited to this. A configuration in which the conductive spacer 70 is not interposed between the semiconductor element 40 and the front surface metal body 62, and the front surface metal body 62 is bonded to the source electrode 40S via a bonding material may also be used. In this case, the metal body to which the front surface metal body 62 is bonded becomes the source electrode 40S.

[0127] As shown in FIG. 13, the front metal body 62 may be thicker than the back metal body 63. FIG. 13 corresponds to FIG. 11. The thicker the front metal body 62, the shorter the distance D2 between the opposing surfaces. This enhances the effect of canceling magnetic flux, and further reduces inductance. Furthermore, if the front metal body 62 is made thicker, it is easy to achieve a configuration without the conductive spacer 70, as shown in FIG. 13. In FIG. 13, the front metal body 62 is bonded to the source electrode 40S via the bonding material 102A. Of course, in a configuration including the conductive spacer 70, the front metal body 62 may be made thicker than the back metal body 63.

[0128] As shown in FIG. 13, the end 64e of the N wiring 64 is located between the end 40Se1 of the source electrode 40S, which is the object to be joined, and the end 40Le of the semiconductor element 40L. The end 40Se1 is the end on the signal terminal 93L side in the Y direction. In FIG. 13, the position of the end 40Se1 is indicated as P5. The position P1 of the end 64e is between the position P2 of the end 40Le and the position P5 of the end 40Se1. The end 65e of the relay wiring 65 is located between the end 40Se2 (see FIG. 3) of the source electrode 40S, which is the object to be joined, and the end 40He of the semiconductor element 40H. With this arrangement, the same effect as the configuration in which the conductive spacer 70 is the object to be joined can be achieved even in the configuration in which the source electrode 40S is the object to be joined.

[0129] The ends 64e, 65e of the front metal body 62 are not limited to the above example. For example, as shown in Fig. 14, the front metal body 62 may have cutouts 620, 621, and at least a part of the sides defining the cutouts 620, 621 may be the above-mentioned ends 64e, 65e. In Fig. 14, the bottom sides of the cutouts 620, 621 are the ends 64e, 65e as an example.

[0130] The notch 620 is provided locally at the end of the N wiring 64 on the signal terminal 93L side so as to avoid contact with the bonding wire 110 connected to the signal terminal 93L. The notch 621 is provided locally at the end of the relay wiring 65 on the signal terminal 93H side so as to avoid contact with the bonding wire 110 connected to the signal terminal 93H. In this way, the surface metal body 62 may be locally cut out. This can reduce the thermal resistance compared to a shape in which the end is uniformly cut out.

[0131] The arrangement of the pads 40P is not limited to the above example. For example, as shown in FIG. 15, the pads 40P may be provided biasedly around one of the four corners of the semiconductor element 40 having a substantially rectangular shape in plan view. In two semiconductor elements 40L having a common structure and arranged side by side in the X direction, the semiconductor element 42L is arranged rotated 90 degrees with respect to the arrangement of the semiconductor element 41L. In two semiconductor elements 40H having a common structure and arranged side by side in the X direction, the semiconductor element 42H is arranged rotated 90 degrees with respect to the arrangement of the semiconductor element 41H. In addition, each of the source electrode 40S and the conductive spacer 70 has a shape in which one of the four corners of the substantially rectangular shape in plan view is cut out so as to avoid the pads 40P.

[0132] In FIG. 15, in the arrangement of the pads 40P described above, the front surface metal body 62 is provided with cutouts 622 and 623, and at least a part of the side portion defining the cutouts 622 and 623 is the end portion 64e and 65e described above. The cutout 622 is provided locally at the end portion of the N wiring 64 on the signal terminal 93L side so that the end portion 64e satisfies the positional relationship described above while avoiding contact between the N wiring 64 and the bonding wire 110 connected to the signal terminal 93L. The cutout 623 is provided locally at the end portion of the relay wiring 65 on the signal terminal 93H side so that the end portion 65e satisfies the positional relationship described above while avoiding contact between the relay wiring 65 and the bonding wire 110 connected to the signal terminal 93H. In this way, by locally cutting out the front surface metal body 62, it is possible to reduce the inductance and the thermal resistance even when the pads 40P are arranged in an offset manner.

[0133] Second embodiment This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used in this embodiment. In the preceding embodiment, the bonding wire 110 is provided so as not to contact the insulating base material 61. Instead of this, the bonding wire 110 may be provided so as to contact the insulating base material 61.

[0134] FIG. 16 is a cross-sectional view showing an example of the semiconductor device 20 according to the present embodiment. FIG. 16 corresponds to FIG. 11. In the semiconductor device 20 shown in FIG. 16, the bonding wire 110 is in contact with the insulating base material 61. The bonding wire 110 has a contact portion 110c which is a portion in contact with the insulating base material 61. The bonding wire 110 is pressed against the insulating base material 61 and deformed. Due to this deformation, the contact portion 110c extends, for example, substantially parallel to the surface of the insulating base material 61. The bonding wire 110 connected to the signal terminal 93L is in contact with the exposed portion 61a1 of the insulating base material 61. Although not shown, the bonding wire 110 connected to the signal terminal 93H is in contact with the exposed portion 61a2 of the insulating base material 61.

[0135] Moreover, the semiconductor device 20 does not include a conductive spacer 70. The surface metal body 62 of the substrate 60 is bonded to the source electrode 40S, which is the bonding target, via a bonding material 102A. The N wiring 64 is bonded to the source electrode 40S of the semiconductor element 40L. Although not shown, the relay wiring 65 is bonded to the source electrode 40S of the semiconductor element 40H.

[0136] The rest of the configuration is the same as that shown in the preceding embodiment. For example, the end 64e of the N wiring 64 is located between the end 40Se1 of the source electrode 40S, which is the object to be joined, and the end 40Le of the semiconductor element 40L. Although not shown, the end 65e of the relay wiring 65 is located between the end 40Se2 of the source electrode 40S, which is the object to be joined, and the end 40He of the semiconductor element 40H.

[0137] Fig. 17 is a cross-sectional view showing an example of a manufacturing method of the semiconductor device 20 shown in Fig. 16. Fig. 17 corresponds to Fig. 16. Fig. 17 shows a step of electrically connecting the semiconductor element 40 and the substrate 60.

[0138] First, prepare the elements that make up the semiconductor device 20. In this embodiment, prepare the substrate 60 on which the surface metal body 62 is patterned so that the ends 64e, 65e satisfy the above-mentioned positional relationship.

[0139] Next, a first connection step is performed. In this step, the semiconductor element 40 is placed on the front surface metal body 52 so that the drain electrode 40D faces the front surface metal body 52 of the substrate 50. Then, the drain electrode 40D and the front surface metal body 52 are electrically connected. In this embodiment, the drain electrode 40D and the front surface metal body 52 are joined by a bonding material 100. In the first connection step, the joint portion 81 and the front surface metal body 52 are joined by a bonding material 103. The P terminal 91P and the output terminal 92 are joined by a bonding material 104 to the front surface metal body 52.

[0140] Next, a wire bonding process is performed. In this process, the pad 40P of the semiconductor element 40 and the signal terminal 93 are connected via the bonding wire 110. Specifically, the signal terminal 93L and the corresponding pad 40P of the semiconductor element 40L are connected via the bonding wire 110. The signal terminal 93H and the corresponding pad 40P of the semiconductor element 40H are connected via the bonding wire 110.

[0141] Next, a second connection step is performed. In this step, the source electrode 40S of the semiconductor element 40 and the substrate 60, which is the second wiring member, are electrically connected. In this embodiment, the source electrode 40S and the front surface metal body 62 are bonded via the bonding material 102A. At this time, the substrate 50 and the substrate 60 to which the semiconductor element 40 is connected are relatively displaced in a direction in which the opposing surfaces of the front surface metal bodies 52, 62 approach each other.

[0142] Due to this displacement, exposed portions 61a1 and 61a2 of the insulating base material 61 exposed from the front surface metal body 62 come into contact with the apex portion 110t of the bonding wire 110. As shown in Fig. 17, the exposed portion 61a1 of the insulating base material 61 comes into contact with the bonding wire 110 connected to the signal terminal 93L. The exposed portion 61a2 of the insulating base material 61 comes into contact with the bonding wire 110 connected to the signal terminal 93H.

[0143] Then, from the contact state, the opposing surfaces of the front surface metal bodies 52, 62, for example the opposing surfaces 55a, 64a shown in FIG. 17, are displaced in a direction to approach each other further. The bonding wire 110 is pushed by the insulating base material 61 (substrate 60) and deformed, and the height of the bonding wire 110 becomes lower than at the time of wire bonding. In this deformed state, the source electrode 40S and the front surface metal body 62 are joined. In a second connecting step, the joint portion 81 and the front surface metal body 62 are joined via the bonding material 103. The N terminal 91N and the front surface metal body 62 are joined via the bonding material 104.

[0144] Next, a molding process of the sealing body 30 is performed. For example, the sealing body 30 is molded by the transfer molding method described above. After molding, for example, cutting is performed. The sealing body 30 is cut together with a part of the back metal body 53, 63 of the substrate 50, 60. As a result, the back surface 50b, 60b is exposed from the sealing body 30. The back surface 50b is approximately flush with one surface 30a of the sealing body 30, and the back surface 60b is approximately flush with the back surface 30b. Note that the back surfaces 50b, 60b may be pressed against the cavity wall surface of a molding die and molded in a state where they are in close contact. In this case, the back surfaces 50b, 60b are exposed from the sealing body 30 at the time when the sealing body 30 is molded. Therefore, cutting after molding is not required.

[0145] Next, unnecessary portions of the lead frame, such as tie bars, are removed, thereby obtaining the above-mentioned semiconductor device 20.

[0146] <Summary of the second embodiment> The positions of the ends 64e, 65e of the front metal body 62 in this embodiment are the same as those in the preceding embodiment. Therefore, the same effect as that of the configuration described in the preceding embodiment can be achieved. That is, the inductance can be reduced while the thermal resistance can be reduced.

[0147] In this embodiment, as described above, the insulating base material 61 of the substrate 60 is pressed against the bonding wire 110 to bond the source electrode 40S and the front surface metal body 62. The bonding wire 110 is pressed and deformed by the insulating base material 61 (substrate 60), and the height of the bonding wire 110 becomes lower than that during wire bonding. By configuring the bonding wire 110 to contact the exposed parts 61a1 and 60a2 of the insulating base material 61, the distance D1 between the opposing surfaces can be further shortened. This can further reduce the inductance. Also, the thermal resistance can be further reduced. Also, it is easy to configure the structure without the conductive spacer 70. For example, as shown in FIG. 13, it is easy to eliminate the conductive spacer 70 without making the front surface metal body 62 thick.

[0148] Furthermore, since the bonding wires 110 are held between the signal terminals 93, the pads 40P, and the insulating base material 61, the occurrence of wire sweep during molding of the sealing body 30 can be suppressed.

[0149] FIG. 18 shows the results of an electromagnetic field simulation. The vertical axis indicates inductance in arbitrary units (au). RE1 and RE2 show the results of a reference example, and PE1 and PE2 show the results of a configuration example (this example) equivalent to this embodiment. The reference example, unlike this example, is provided with a conductive spacer. This example does not include a conductive spacer, and therefore the distance between the opposing surfaces of the surface metal bodies is closer by the thickness of the conductive spacer. In RE1 and PE1, the material of the insulating substrates 51 and 61 is a nitride-based ceramic. In RE2 and PE2, the material of the insulating substrates 51 and 61 is a resin.

[0150] As shown in FIG. 18, it was clear that according to the present examples (PE1, PE2), regardless of whether ceramic or resin was used, the inductance could be reduced by about 20% compared to the reference examples (RE1, RE2).

[0151] In the above-mentioned second connecting step, even if the bonding wire 110 contacts the exposed portions 61a1, 61a2 of the insulating base material 61, it is considered that the bonding wire 110 may be slightly separated from the exposed portions 61a1, 61a2 in a step subsequent to the second connecting step, for example, in a molding step. Therefore, as shown in Fig. 19, the semiconductor device 20 may have a slight gap of distance D2 of 0.1 mm or less between the bonding wire 110 and the exposed portions 61a1, 61a2 of the insulating base material 61. The distance D1 between the opposing surfaces is determined in the second connecting step, so that the same effect as the configuration shown in Fig. 16 can be achieved.

[0152] <Modification> The above-mentioned manufacturing method may be applied to a configuration including a conductive spacer 70. That is, in a configuration including a conductive spacer 70, the bonding wires 110 may be in contact with the exposed portions 61a1 and 61a2 of the insulating base material 61, or may have a small gap of 0.1 mm or less. The thickness of the conductive spacer 70 can be reduced.

[0153] The configuration described in this embodiment can be combined with any of the configurations of the first embodiment and the modified examples.

[0154] Although an example in which the ends 64e, 65e of the front surface metal body 62 are located between the ends 40Se1, 40Se2 of the source electrode 40S and the ends 40Le, 40He of the semiconductor element 40 has been shown, the present invention is not limited thereto. For example, as shown in FIG. 20, the position P1 of the end 64e of the N wiring 64 may be inside the position P5 of the end 40Se1 of the source electrode 40S to be joined. In the Y direction, the end 40Se1 is located between the ends 40Le, 64e. As described above, according to this embodiment, when the source electrode 40S (second main electrode) and the substrate 60 (second wiring member) are electrically connected, the insulating base material 61 of the substrate 50 holds down the bonding wire 110. This makes it possible to shorten the distance D1 between the opposing surfaces, and therefore it is possible to effectively reduce both the inductance and the thermal resistance even if the ends 64e, 65e of the front surface metal body 62 do not have the above-mentioned positional relationship.

[0155] Third embodiment This embodiment is a modification based on the previous embodiment, and the description of the previous embodiment can be used. In the previous embodiment, the semiconductor device 20 includes two semiconductor elements 40H and 40L, and the semiconductor elements 40H and 40L are arranged in the X direction and the semiconductor elements 40H and 40L are arranged in the Y direction. In addition, the P terminal 91P, the N terminal 91N, and the signal terminal 93H protrude from one side surface of the sealing body 30 in the Y direction, and the output terminal 92 and the signal terminal 93L protrude from the opposite side surface.

[0156] However, the number and arrangement of the semiconductor elements 40, the arrangement of the external connection terminals 90, and the like are not limited to the above example. For example, instead of a plurality of semiconductor elements 40, each arm may be formed of a single semiconductor element 40. Instead of the configuration in which the signal terminals 93H and 93L are arranged to sandwich the semiconductor element 40, the signal terminals 93H and 93L may be arranged side by side.

[0157] 21 to 24 show a semiconductor device 20 of this embodiment. Fig. 21 is a perspective view of the semiconductor device 20. Fig. 22 is a plan view of Fig. 21 seen from the Z2 direction. Fig. 22 is a see-through view showing the internal structure. Fig. 23 is a cross-sectional view taken along line XXIII-XXIII in Fig. 22. Fig. 24 is a cross-sectional view taken along line XXIV-XXIV in Fig. 22.

[0158] The semiconductor device 20 of this embodiment constitutes one of the upper and lower arm circuits 9, i.e., one phase of the upper and lower arm circuits 9, as in the preceding embodiment. The semiconductor device 20 includes elements similar to those in the configuration described in the preceding embodiment (see Figs. 2 to 11). The semiconductor device 20 includes a sealing body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, an arm connection portion 80, and an external connection terminal 90. The following mainly describes the parts that are different from the configuration described in the preceding embodiment.

[0159] As in the previous embodiment, the encapsulant 30 encapsulates some of the other elements constituting the semiconductor device 20. As shown in Fig. 21, the encapsulant 30 has a generally rectangular shape in plan view. The encapsulant 30 has one surface 30a and a back surface 30b in the Z direction. The side surface connecting the one surface 30a and the back surface 30b includes two side surfaces 30g and 30h from which the external connection terminals 90 protrude. The side surface 30h is the surface opposite the side surface 30g in the Y direction.

[0160] The semiconductor elements 40 include one semiconductor element 40H constituting the upper arm 9H and one semiconductor element 40L constituting the lower arm 9L. The semiconductor device 20 includes two semiconductor elements 40. The semiconductor elements 40H, 40L have a common configuration. As shown in FIG. 22, the semiconductor elements 40H, 40L are aligned in the X direction. The semiconductor elements 40 are disposed at approximately the same positions as each other in the Z direction. The drain electrode 40D of each semiconductor element 40 faces the substrate 50. The source electrode 40S of each semiconductor element 40 faces the substrate 60.

[0161] The substrates 50 and 60 are disposed in the Z direction so as to sandwich the multiple semiconductor elements 40. The substrates 50 and 60 are disposed so as to at least partially face each other in the Z direction. The substrates 50 and 60 contain all of the multiple semiconductor elements 40 (40H, 40L) in a plan view.

[0162] As in the preceding embodiment, the substrate 50 includes an insulating base material 51, a front surface metal body 52, and a back surface metal body 53. The substrate 60 includes an insulating base material 61, a front surface metal body 62, and a back surface metal body 63. The front surface metal body 52 includes a P wiring 54 and a relay wiring 55. The P wiring 54 and the relay wiring 55 are electrically separated by a predetermined interval (gap).

[0163] The P wiring 54 is connected to the P terminal 91P and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 electrically connects the P terminal 91P and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 has a substantially rectangular shape in plan with the Y direction as the longitudinal direction. The relay wiring 55 is connected to the drain electrode 40D of the semiconductor element 40L, the arm connection portion 80, and the output terminal 92. The relay wiring 55 has a substantially rectangular shape in plan.

[0164] The P wiring 54 and the relay wiring 55 are arranged side by side in the X direction. The semiconductor element 40L is mounted on the relay wiring 55, biased toward one end side in the X direction, specifically, the side farther from the P wiring 54. The joint portion 81 constituting the arm connection portion 80 is mounted on the relay wiring 55, biased toward the other end side in the X direction, specifically, the side closer to the P wiring 54. The P terminal 91P is connected to the P wiring 54 near one end in the Y direction. The output terminal 92 is connected to the relay wiring 55 near one end in the Y direction. The P terminal 91P and the output terminal 92 are arranged on the same side in the Y direction with respect to the semiconductor element 40.

[0165] The front surface metal body 62 has an N wiring 64 and a relay wiring 65. The N wiring 64 and the relay wiring 65 are electrically separated by a predetermined interval (gap). The N wiring 64 is connected to the N terminal 91N and the source electrode 40S of the semiconductor element 40L. The relay wiring 65 is connected to the source electrode 40S of the semiconductor element 40H and the arm connection part 80.

[0166] The N wiring 64 has a base 643 and an extension portion 644. The N wiring 64 has a generally L-shape in plan view. The base 643 has a generally rectangular shape in plan view. The base 643 contains a part of the semiconductor element 40L in plan view. The base 643 contains the source electrode 40S of the semiconductor element 40L. The extension portion 644 is connected to one side of the base 643 which has a generally rectangular shape in plan view. The extension portion 644 extends from the side of the base 643 facing the relay wiring 65 towards the base 653 in the X direction.

[0167] In the N wiring 64 (base portion 643), an end portion 64e which is the side on the signal terminal 93L side is located in the Y direction between the end portion 40Le of the semiconductor element 40L and the end portion 70e of the conductive spacer 70 which is to be joined.

[0168] The relay wiring 65 has a base 653 and an extension portion 654. The relay wiring 65 has a generally L-shape in plan view. The base 653 has a generally rectangular shape in plan view. The base 653 contains a part of the semiconductor element 40H in plan view. The base 653 contains the source electrode 40S of the semiconductor element 40L. The extension portion 654 is connected to one side of the base 653 having a generally rectangular shape in plan view. The extension portion 654 extends from a side of the base 653 facing the N wiring 64 toward the base 643 in the X direction. At least a part of the extension portion 654 overlaps with the relay wiring 55 in plan view.

[0169] In the relay wiring 65, an end 65e which is the side on the signal terminal 93H side is located between the end 40He of the semiconductor element 40H and the end 70e of the conductive spacer 70 which is to be joined in the Y direction.

[0170] The N wiring 64 and the relay wiring 65 are arranged side by side in the X direction. The bases 643, 653 are arranged side by side in the X direction. The source electrode 40S of the semiconductor element 40L is electrically connected to the base 643. The source electrode 40S of the semiconductor element 40H is electrically connected to the base 653. The extensions 644, 654 are arranged side by side in the Y direction. The N terminal 91N is connected to the extension 644. The joint portion 81 is connected to the extension 654.

[0171] The conductive spacers 70 are interposed between the source electrodes 40S of the semiconductor elements 40 and the substrate 60. The conductive spacers 70 are connected to the source electrodes 40S of the semiconductor elements 40 individually.

[0172] The arm connection part 80 electrically connects the relay wirings 55 and 65. The arm connection part 80 is provided between the semiconductor element 40H and the semiconductor element 40L in the X direction. The arm connection part 80 is provided in an overlapping region of the relay wirings 55 and 65 (extension part 654) in a plan view. The arm connection part 80 of this embodiment is configured to include a joint part 81 and a bonding material 103, as in the previous embodiment. The joint part 81 is a metal columnar body. In the Z direction, the bonding material 103 is interposed between one of the ends of the joint part 81 and the relay wiring 55, and the bonding material 103 is interposed between the other end and the relay wiring 65. Instead of this, the joint part 81 may be integrally connected to at least one of the surface metal bodies 52 and 62. The arm connection part 80 may be configured not to include the joint part 81.

[0173] The external connection terminal 90 includes a power terminal 91, an output terminal 92, and a signal terminal 93. The power terminal 91 includes a P terminal 91P and an N terminal 91N. Hereinafter, the P terminal 91P, the N terminal 91N, and the output terminal 92 may be referred to as main terminals 91P, 91N, and 92. The signal terminal 93 includes a signal terminal 93H on the upper arm 9H side and a signal terminal 93L on the lower arm 9L side.

[0174] P terminal 91P is connected to the vicinity of one end of P wiring 54 in the Y direction. P terminal 91P extends outward in the Y direction from the connection portion with P wiring 54. A portion of P terminal 91P is covered by sealing body 30, and the remaining portion protrudes from sealing body 30. P terminal 91P protrudes outside sealing body 30 from near the center in the Z direction on side surface 30g.

[0175] The N terminal 91N is connected to the N wiring 64 near one end in the Y direction. The N terminal 91N extends outward in the Y direction from the connection portion with the N wiring 64. A portion of the N terminal 91N is covered by the sealing body 30, and the remaining portion protrudes from the sealing body 30. The N terminal 91N protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30g.

[0176] The output terminal 92 is connected to the relay wiring 55 near one end in the Y direction. The output terminal 92 extends outward in the Y direction from the connection portion with the relay wiring 55. A portion of the output terminal 92 is covered by the sealing body 30, and the remaining portion protrudes from the sealing body 30. The output terminal 92 protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30g.

[0177] The three main terminals 91P, 91N, 92 are arranged side by side in the X direction. The main terminals 91P, 91N, 92 are arranged in the X direction in the following order: P terminal 91P, N terminal 91N, output terminal 92. The P terminal 91P and N terminal 91N, which are power supply terminals 91, have side surfaces that face each other in a portion including a portion protruding from the sealing body 30.

[0178] The signal terminal 93 is electrically connected to the pad 40P of the corresponding semiconductor element 40 via a bonding wire 110. The signal terminal 93H is connected to the pad 40P of the semiconductor element 40H via a bonding wire 110. The signal terminal 93L is connected to the pad 40P of the semiconductor element 40L via a bonding wire 110. The signal terminal 93 extends outward in the Y direction and protrudes from the sealing body 30 near the center in the Z direction on the side surface 30h. The signal terminal 93 extends on the opposite side to the main terminals 91P, 91N, and 92 in the Y direction. The semiconductor element 40 is disposed between the main terminals 91P, 91N, and 92 and the signal terminal 93 in the Y direction.

[0179] The semiconductor device 20 includes two guide frames 94. One of the guide frames 94 is connected to the P terminal 91P. The other guide frame 94 is connected to the output terminal 92. These guide frames 94 are portions that connect an outer frame that holds a signal terminal 93 to the main terminals 91P, 92 before unnecessary portions of the lead frame are removed. A portion of the guide frame 94 connected to the P terminal 91P is connected to the P wiring 54. A portion of the guide frame 94 connected to the output terminal 92 is connected to the relay wiring 55. The guide frame 94 can have a connection structure (joint structure) similar to that of the main terminals 91P, 91N, 92.

[0180] As described above, in the semiconductor device 20 of this embodiment, the multiple semiconductor elements 40 constituting the upper and lower arm circuits 9 for one phase are encapsulated by the encapsulant 30. The encapsulant 30 integrally encapsulates the multiple semiconductor elements 40, part of the substrate 50, part of the substrate 60, the multiple conductive spacers 70, the arm connection portion 80, and parts of the external connection terminals 90. The encapsulant 30 encapsulates the insulating base materials 51, 61 and the surface metal bodies 52, 62 of the substrates 50, 60.

[0181] The semiconductor element 40 is disposed between the substrates 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the substrates 50 and 60 disposed opposite each other. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the substrate 50 is substantially flush with one surface 30a of the sealing body 30. The back surface 60b of the substrate 60 is substantially flush with the back surface 30b of the sealing body 30. Since the back surfaces 50b and 60b are exposed surfaces, heat dissipation can be improved.

[0182] <Summary of the third embodiment> The positions of the ends 64e, 65e of the front metal body 62 in this embodiment are the same as those in the preceding embodiment. Therefore, the same effect as that of the configuration described in the preceding embodiment can be achieved. That is, the inductance can be reduced while the thermal resistance can be reduced.

[0183] The configuration described in this embodiment can be combined with any of the configurations of the first embodiment, the second embodiment, and the modified example. For example, in this embodiment, as shown in FIG. 14, notches 620 and 621 may be provided in the front surface metal body 62. As shown in FIG. 15, the pad 40P may be provided biasedly at one of the corners of the rectangle, and notches 622 and 623 may be provided in the front surface metal body 62. As shown in FIG. 16, the bonding wire 110 may be brought into contact with the exposed parts 61a1 and 61a2 of the front surface metal body 62. A configuration in which the conductive spacer 70 is eliminated may also be used.

[0184] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure includes the exemplified embodiments and modifications by those skilled in the art based thereon. For example, the disclosure is not limited to the combination of parts and / or elements shown in the embodiments. The disclosure can be implemented by various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure includes the omission of parts and / or elements of the embodiments. The disclosure includes the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are indicated by the description of the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the description of the claims.

[0185] The disclosure in the specification and drawings is not limited by the claims. The disclosure in the specification and drawings includes the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification and drawings without being bound by the claims.

[0186] When an element or layer is referred to as being "on," "coupled," "connected," or "bonded," it may be directly coupled, connected, or bonded to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly bonded" to another element or layer, there are no intervening elements or layers. Other words used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0187] Spatially relative terms such as "inside," "outside," "back," "bottom," "low," "top," "top," and the like are utilized herein to facilitate the description of the relationship of one element or feature to another element or feature as depicted in the figures. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "directly below" other elements or features would be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used in this specification would be interpreted accordingly.

[0188] The vehicle drive system 1 is not limited to the above-mentioned configuration. For example, although an example has been shown in which one motor generator 3 is provided, the present invention is not limited to this. A plurality of motor generators may be provided. Although an example has been shown in which the power conversion device 4 is provided with an inverter 6 as a power conversion circuit, the present invention is not limited to this. For example, a configuration may be provided with a plurality of inverters. A configuration may be provided with at least one inverter and a converter. A configuration may be provided with only a converter.

[0189] Although an example has been shown in which the semiconductor element 40 has the MOSFET 11 as a switching element, the present invention is not limited to this. For example, an IGBT may also be used. IGBT is an abbreviation for Insulated Gate Bipolar Transistor.

[0190] Although the substrate 50 has been shown as an example of a wiring member connected to the drain electrode 40D, the present invention is not limited to this. In a configuration not limited to the substrate 50, a metal plate (lead frame) may be used instead of the substrate 50. In the case of a metal plate, a first metal plate to which the drain electrode 40D of the semiconductor element 40H is connected and a second metal plate to which the drain electrode 40D of the semiconductor element 40L is connected are arranged on the drain electrode 40D side.

[0191] Although an example in which one semiconductor device 20 constitutes one phase of upper and lower arm circuits 9 (two arms) has been shown, the present invention is not limited to this. For example, the present invention can be applied to a semiconductor device in which one semiconductor device 20 constitutes one arm. The number of arms constituted by one semiconductor device 20 is not particularly limited.

Claims

1. a semiconductor element (40) having a first main electrode (40D) provided on one surface, a second main electrode (40S) provided on a back surface opposite to the first surface in a plate thickness direction, and a signal pad (40P) provided on the back surface at a position different from that of the second main electrode; a first wiring member (50) electrically connected to the first main electrode; a second wiring member (60) electrically connected to the second main electrode; A signal terminal (93); a bonding wire (110) electrically connecting the pad and the signal terminal; the second wiring member is a substrate having an insulating base material (61), a front surface metal body (62) disposed on a front surface of the insulating base material that faces the semiconductor element and electrically connected to the second main electrode, and a back surface metal body (63) disposed on a back surface of the insulating base material, In an arrangement direction of the semiconductor element and the signal terminal, an end (64e, 65e) of the surface metal body is located between an end (40Se1, 40Se2, 70e1, 70e2) of a joining object to which the surface metal body is joined and an end (40Le, 40He) of the semiconductor element, The insulating base material has an exposed portion (61a1, 61a2) exposed from the surface metal body, A tip portion (110t) of the bonding wire faces the exposed portion in the plate thickness direction, The semiconductor device, wherein the bonding wire is in contact with the exposed portion of the insulating substrate.

2. 2. The semiconductor device according to claim 1, wherein an end of the front surface metal body is located between an end (40Pe) of the pad on the second main electrode side and an end of the semiconductor element in the arrangement direction.

3. The semiconductor device according to claim 1 , wherein the front surface metal body is thicker than the back surface metal body.

4. a conductive spacer (70) interposed between the second main electrode and the surface metal body; 4. The semiconductor device according to claim 1, wherein the joining object is the conductive spacer.

5. 4. The semiconductor device according to claim 1, wherein the joining object is the second main electrode.

6. a first connection step of electrically connecting a first main electrode (40D) provided on one surface of the semiconductor element (40) to a first wiring member (50); a wire bonding process for connecting a signal pad (40P) provided on a back surface of the semiconductor element opposite to the one surface in the plate thickness direction to a signal terminal (93) via a bonding wire (110); a second connection step of electrically connecting a second main electrode (40S) provided at a position different from the pad on the rear surface to a second wiring member (60) after the wire bonding step, In the second connecting step, a substrate having an insulating base material (61), a front surface metal body (62) disposed on a front surface of the insulating base material that faces the semiconductor element and electrically connected to the second main electrode, and a back surface metal body (63) disposed on a back surface of the insulating base material, the substrate being patterned with the front surface metal body so that an end (64e, 65e) of the front surface metal body is located between an end (40Se1, 40Se2, 70e1, 70e2) of a joining target to which the front surface metal body is joined and an end (40Le, 40He) of the semiconductor element in an arrangement direction of the semiconductor element and the signal terminal; The method for manufacturing a semiconductor device further comprises contacting an exposed portion (61a1, 61a2) of the insulating base material exposed from the front surface metal body with the bonding wire while electrically connecting the second main electrode and the second wiring member.

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