Semiconductor device, manufacturing method of semiconductor device, and vehicle

Abstract

To provide a semiconductor device capable of suppressing occurrence of a resin burr formed on a peripheral edge of a metal layer exposed from a sealing resin.SOLUTION: A semiconductor device A10 includes an insulating layer 11, a conductive layer 12, a first metal layer 13, a semiconductor element, and a sealing resin 50. The first metal layer 13 has a first back surface 131 exposed from a first surface 521 of the sealing resin 50. A protrusion 55 is provided on the sealing resin 50. A second surface 522 of the protrusion 55 is located farther from the first surface 521 than the first back surface 131 in a first direction z. Furthermore, a groove portion 56 recessed on an opposite side to a side to which the first surface 521 faces in the first direction z is provided on the sealing resin 50. The groove portion 56 is located between the first back surface 131 and the protrusion 55 when viewed in the first direction z. A dimension d of the groove portion 56 in the first direction z is greater than a dimension w of the groove portion 56 in a direction which is orthogonal to each of first direction z and a direction where the groove portion 56 extends.SELECTED DRAWING: Figure 9

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device, a manufacturing method thereof, and a vehicle equipped with the semiconductor device. [Background technology]

[0002] Patent Document 1 discloses an example of a semiconductor device equipped with a MOSFET. The semiconductor device includes a drain terminal to which a power supply voltage is applied, a gate terminal for inputting an electric signal to the MOSFET, and a source terminal from which power corresponding to the power supply voltage is converted based on the electric signal and then the converted power is output. The MOSFET has a drain electrode that is conductive to the drain terminal, a source electrode that is conductive to the source terminal, and a gate electrode that is conductive to the gate terminal. The drain electrode is conductively bonded to a die pad (tab). The drain terminal is integrated with the die pad. The source electrode is conductively bonded to a metal clip. The metal clip is also conductively bonded to the source terminal. This makes it possible to pass a larger current through the semiconductor device.

[0003] The semiconductor device disclosed in Patent Document 1 further includes an encapsulating resin that covers a portion of the die pad. In the semiconductor device, the back surface of the die pad is exposed from the encapsulating resin. In this case, in the process of forming the encapsulating resin included in the semiconductor device, a resin burr may be formed on the periphery of the back surface of the die pad. If the range or size of the resin burr is excessive, it will be an obstacle when attaching the semiconductor device to a heat sink. For this reason, a measure to suppress the occurrence of resin burrs is desired. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2016-192450 A Summary of the Invention [Problem to be solved by the invention]

[0005] In view of the above circumstances, an object of the present disclosure is to provide a semiconductor device capable of suppressing the occurrence of resin burrs formed on the periphery of a metal layer exposed from a sealing resin. [Means for solving the problem]

[0006] A semiconductor device provided by a first aspect of the present disclosure includes an insulating layer, a conductive layer bonded to one side of the insulating layer in a first direction, a first metal layer located on the opposite side of the conductive layer with respect to the insulating layer and bonded to the insulating layer, a semiconductor element bonded to the conductive layer, and a sealing resin covering the conductive layer and the semiconductor element. The sealing resin has a first surface facing the side where the first metal layer is located with respect to the insulating layer in the first direction. The first metal layer has a first back surface exposed from the first surface. The sealing resin is provided with a convex portion protruding from the first surface. The convex portion faces the same side as the first surface in the first direction and has a second surface located farther from the first surface in the first direction than the first back surface. The sealing resin is provided with a groove portion located between the first back surface and the convex portion as viewed in the first direction and recessed on the opposite side to the side where the first surface faces in the first direction. The dimension of the groove in the first direction is larger than the dimension of the groove in a direction perpendicular to both the first direction and the direction in which the groove extends.

[0007] A semiconductor device provided by a second aspect of the present disclosure includes an insulating layer, a conductive layer bonded to one side of the insulating layer in a first direction, a first metal layer located on the opposite side of the insulating layer from the conductive layer and bonded to the insulating layer, a semiconductor element bonded to the conductive layer, and a sealing resin covering the conductive layer and the semiconductor element. The sealing resin has a first surface facing the side where the first metal layer is located with respect to the insulating layer in the first direction. The first metal layer has a first back surface exposed from the first surface. The sealing resin is provided with a protrusion protruding from the first surface. The protrusion has a second surface facing the same side as the first surface in the first direction and located farther from the first surface than the first back surface in the first direction. The protrusion is in contact with the first back surface.

[0008] A method for manufacturing a semiconductor device provided by a third aspect of the present disclosure includes the steps of forming a conductive layer and a first metal layer bonded individually to both sides of an insulating layer in a first direction, bonding a semiconductor element to the conductive layer, forming a sealing resin having a first surface facing the side where the first metal layer is located with respect to the insulating layer in the first direction and covering the conductive layer and the semiconductor element, and forming a groove portion in the sealing resin that is recessed on the opposite side to the side where the first surface faces in the first direction. The step of forming the sealing resin includes the steps of exposing, from the first surface, a first back surface of the first metal layer facing the same side as the first surface in the first direction, and forming, in the sealing resin, a protrusion protruding from the first surface. The protrusion has a second surface that faces the same side as the first surface in the first direction and is located farther from the first surface than the first back surface in the first direction. The step of forming the groove portion includes forming the groove portion so as to be located between the first back surface and the protrusion portion as viewed in the first direction. The dimension of the groove in the first direction is larger than the dimension of the groove in a direction perpendicular to both the first direction and the direction in which the groove extends.

[0009] A vehicle provided by a fourth aspect of the present disclosure includes a drive source and a semiconductor device. The semiconductor device is electrically connected to the drive source. The semiconductor device further includes a terminal electrically connected to a semiconductor element included in the semiconductor device provided by the first aspect of the present disclosure and the semiconductor device provided by the second aspect of the present disclosure. Each of the semiconductor element and the terminal is electrically connected to a conductive layer included in the semiconductor device provided by the first aspect of the present disclosure and the semiconductor device provided by the second aspect of the present disclosure. Effect of the Invention

[0010] According to the configuration of the semiconductor device according to the present disclosure, it is possible to suppress the occurrence of resin burrs formed on the periphery of the metal layer exposed from the sealing resin.

[0011] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure. [Diagram 2] FIG. 2 is a plan view corresponding to FIG. 1, seen through the sealing resin. [Diagram 3] FIG. 3 is a bottom view of the semiconductor device shown in FIG. [Figure 4] FIG. 4 is a right side view of the semiconductor device shown in FIG. [Diagram 5] FIG. 5 is a cross-sectional view taken along line VV in FIG. [Figure 6] FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. [Figure 7] FIG. 7 is a partially enlarged view of FIG. 5, showing the first semiconductor element and its vicinity. [Figure 8] FIG. 8 is a partially enlarged view of FIG. 5, showing the second semiconductor element and its vicinity. [Figure 9]FIG. 9 is a partially enlarged view of FIG. [Figure 10] 10A to 10C are cross-sectional views illustrating a manufacturing process of the semiconductor device shown in FIG. [Figure 11] 11A to 11C are cross-sectional views illustrating a manufacturing process of the semiconductor device shown in FIG. [Figure 12] 12A to 12C are cross-sectional views illustrating a manufacturing process of the semiconductor device shown in FIG. [Figure 13] 13A to 13C are cross-sectional views illustrating a manufacturing process of the semiconductor device shown in FIG. [Figure 14] FIG. 14 is a partially enlarged view of FIG. [Figure 15] 15A to 15C are cross-sectional views illustrating a manufacturing process of the semiconductor device shown in FIG. [Figure 16] FIG. 16 is a schematic diagram of a vehicle on which the semiconductor device shown in FIG. 1 is mounted. [Figure 17] FIG. 17 is a bottom view of the semiconductor device according to the second embodiment of the present disclosure. [Figure 18] FIG. 18 is a cross-sectional view of the semiconductor device shown in FIG. [Figure 19] FIG. 19 is a cross-sectional view of the semiconductor device shown in FIG. 17, and the cross-sectional position is different from that of FIG. [Figure 20] FIG. 20 is a bottom view of the semiconductor device according to the third embodiment of the present disclosure. [Figure 21] FIG. 21 is a cross-sectional view of the semiconductor device shown in FIG. [Figure 22] FIG. 22 is a partially enlarged view of FIG. [Diagram 23] FIG. 23 is a cross-sectional view of a semiconductor device according to a modified example of the third embodiment of the present disclosure. [Figure 24] FIG. 24 is a partially enlarged view of FIG. [Diagram 25] FIG. 25 is a cross-sectional view of a semiconductor device according to a fourth embodiment of the present disclosure. [Figure 26] FIG. 26 is a cross-sectional view of the semiconductor device shown in FIG. [Figure 27] FIG. 27 is a partially enlarged view of FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0014] [First embodiment] A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 9. The semiconductor device A10 is generally used in a power conversion circuit such as an inverter. The semiconductor device A10 includes an insulating layer 11, a conductive layer 12, a first metal layer 13, a gate wiring layer 14, a first semiconductor element 21, a second semiconductor element 22, a first terminal 31, a second terminal 32, a first signal terminal 33, a second signal terminal 34, and a sealing resin 50. The semiconductor device A10 further includes a first conductive member 41, a second conductive member 42, and a third conductive member 43. Here, FIG. 2 shows the sealing resin 50 through the transparent portion for ease of understanding. In FIG. 2, the transparent sealing resin 50 is indicated by an imaginary line (double-dashed line).

[0015] In explaining the semiconductor device A10, for convenience, the normal direction of the mounting surface 121 of the conductive layer 12 described later is referred to as the "first direction z." The direction perpendicular to the first direction z is referred to as the "second direction x." The direction perpendicular to each of the first direction z and the second direction x is referred to as the "third direction y." When viewed from the first direction z, the second direction x corresponds to the long side direction of the semiconductor device A10. When viewed from the first direction z, the third direction y corresponds to the short side direction of the semiconductor device A10.

[0016] 5, the sealing resin 50 covers the conductive layer 12, the first semiconductor element 21, and the second semiconductor element 22. The sealing resin 50 is an insulator. The sealing resin 50 is made of a material containing, for example, a black epoxy resin.

[0017] As shown in Fig. 4, the sealing resin 50 has a top surface 51, a first surface 521, a first side surface 53, and a second side surface 54. As shown in Figs. 5 and 6, the top surface 51 faces the same side as a mounting surface 121 of a conductive layer 12, which will be described later, in the first direction z. The first surface 521 faces the opposite side to the top surface 51 in the first direction z. In other words, the first surface 521 faces the side where the first metal layer 13 is located with respect to the insulating layer 11 in the first direction z.

[0018] 1, 3, and 4, the first side surface 53 and the second side surface 54 face in opposite directions to each other in the second direction x. The first side surface 53 and the second side surface 54 are connected to the top surface 51 and the first surface 521, respectively.

[0019] As shown in Fig. 5 and Fig. 6, the insulating layer 11 is covered with a sealing resin 50. The insulating layer 11 is made of a material having a relatively high thermal conductivity. The insulating layer 11 is made of ceramics including either silicon nitride (Si3N4) or aluminum nitride (AlN), for example. Alternatively, the insulating layer 11 may be made of a material including a resin.

[0020] As shown in Figs. 5 and 6, the conductive layer 12 is joined to one side of the insulating layer 11 in the first direction z. The conductive layer 12 has a first semiconductor element 21 and a second semiconductor element 22 mounted thereon. When viewed in the first direction z, the conductive layer 12 is located inward from the periphery 11A of the insulating layer 11. The conductive layer 12 is covered with a sealing resin 50. The conductive layer 12 contains copper (Cu). The dimension of the conductive layer 12 in the first direction z is larger than the dimension of the insulating layer 11 in the first direction z.

[0021] 2 and 5, the conductive layer 12 has a mounting surface 121. The mounting surface 121 faces the same side as the top surface 51 of the sealing resin 50 in the first direction z. The mounting surface 121 faces each of the first semiconductor element 21 and the second semiconductor element 22.

[0022] As shown in FIG. 5 and FIG. 6, the first metal layer 13 is located on the opposite side of the insulating layer 11 from the conductive layer 12 and is joined to the insulating layer 11. As viewed in the first direction z, the first metal layer 13 overlaps the conductive layer 12. The first metal layer 13 has a first back surface 131 and an end surface 132. As shown in FIG. 3, the first back surface 131 is exposed from the first surface 521 of the sealing resin 50. As viewed in the first direction z, the first back surface 131 is located inward from the periphery 11A of the insulating layer 11. The end surface 132 faces a direction perpendicular to the first direction z. The first metal layer 13 includes copper. In the semiconductor device A10, the dimension of the first metal layer 13 in the first direction z is larger than the dimension of the insulating layer 11 in the first direction z and is equal to the dimension of the conductive layer 12 in the first direction z. In addition, the relationship in magnitude between the dimension in the first direction z of first metal layer 13 and the dimension in the first direction z of insulating layer 11 and conductive layer 12 may be various.

[0023] As shown in FIGS. 2 and 6, the gate wiring layer 14 is located on the same side as the conductive layer 12 with respect to the insulating layer 11, and is joined to the insulating layer 11. The gate wiring layer 14 is located next to the conductive layer 12 in the second direction x. The gate wiring layer 14 extends in the third direction y. When viewed in the first direction z, the gate wiring layer 14 is located inward from the periphery 11A of the insulating layer 11. The gate wiring layer 14 is covered with a sealing resin 50. The gate wiring layer 14 contains copper. The dimension of the gate wiring layer 14 in the first direction z is larger than the dimension of the insulating layer 11 in the first direction z.

[0024] The first semiconductor element 21 is joined to the conductive layer 12 as shown in FIG. 5 and FIG. 6. The first semiconductor element 21 is, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). Alternatively, the first semiconductor element 21 may be a field effect transistor including a MISFET (Metal-Insulator-Semiconductor Field-Effect Transistor) or a bipolar transistor such as an IGBT (Insulated Gate Bipolar Transistor). In the description of the semiconductor device A10, the first semiconductor element 21 is an n-channel type MOSFET having a vertical structure. The first semiconductor element 21 includes a compound semiconductor substrate. The composition of the compound semiconductor substrate includes silicon carbide (SiC).

[0025] As shown in FIG. 7, the first semiconductor element 21 has a first electrode 211 , two second electrodes 212 , and a first gate electrode 213 .

[0026] As shown in FIG. 7, the first electrode 211 is located on one side in the first direction z. The first electrode 211 faces the mounting surface 121 of the conductive layer 12. The first electrode 211 is conductively bonded to the mounting surface 121 via a conductive bonding layer 29. This allows the first electrode 211 to be electrically connected to the conductive layer 12. The conductive bonding layer 29 is, for example, solder. Alternatively, the conductive bonding layer 29 may be a sintered metal containing silver (Ag) or the like. A current corresponding to the power before being converted by the first semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the drain of the first semiconductor element 21.

[0027] As shown in Fig. 7, the two second electrodes 212 are located on the opposite side to the first electrode 211 in the first direction z. As shown in Fig. 2, the two second electrodes 212 are spaced apart from each other in the second direction x. A current corresponding to the power converted by the first semiconductor element 21 flows in each of the two second electrodes 212. That is, the two second electrodes 212 correspond to the sources of the first semiconductor element 21.

[0028] 2 and 7, the first gate electrode 213 is located on the same side as the two second electrodes 212 in the first direction z. A gate voltage for driving the first semiconductor element 21 is applied to the first gate electrode 213. The first gate electrode 213 is electrically connected to the gate wiring layer 14. As shown in FIG. 2, the area of ​​the first gate electrode 213 is smaller than the area of ​​each of the two second electrodes 212 as viewed in the first direction z.

[0029] 5, the second semiconductor element 22 is bonded to the conductive layer 12. The second semiconductor element 22 is the same element as the first semiconductor element 21. Therefore, the second semiconductor element 22 is an n-channel type MOSFET with a vertical structure. The second semiconductor element 22 is located next to the first semiconductor element 21 in the third direction y.

[0030] As shown in FIG. 8, the second semiconductor element 22 has a third electrode 221 , two fourth electrodes 222 , and a second gate electrode 223 .

[0031] 8, the third electrode 221 is located on one side in the first direction z. The third electrode 221 faces the mounting surface 121 of the conductive layer 12. The third electrode 221 is conductively bonded to the mounting surface 121 via a conductive bonding layer 29. This allows the third electrode 221 to be electrically connected to the conductive layer 12. A current corresponding to the power before being converted by the second semiconductor element 22 flows through the third electrode 221. In other words, the third electrode 221 corresponds to the drain of the second semiconductor element 22.

[0032] As shown in Fig. 8, the two fourth electrodes 222 are located on the opposite side to the third electrode 221 in the first direction z. As shown in Fig. 2, the two fourth electrodes 222 are spaced apart from each other in the second direction x. A current corresponding to the power converted by the second semiconductor element 22 flows in each of the two fourth electrodes 222. That is, the two fourth electrodes 222 correspond to the sources of the second semiconductor element 22.

[0033] 2 and 8, the second gate electrode 223 is located on the same side as the two fourth electrodes 222 in the first direction z. A gate voltage for driving the second semiconductor element 22 is applied to the second gate electrode 223. The second gate electrode 223 is electrically connected to the gate wiring layer 14. As shown in FIG. 2, the area of ​​the second gate electrode 223 is smaller than the area of ​​each of the two fourth electrodes 222 when viewed in the first direction z.

[0034] 2, the first terminal 31 is located on one side of the first semiconductor element 21 and the second semiconductor element 22 in the second direction x. The first terminal 31 is electrically connected to the first electrode 211 of the first semiconductor element 21 and the third electrode 221 of the second semiconductor element 22. Therefore, the first terminal 31 corresponds to the drain terminal of the semiconductor device A10. The first terminal 31 contains copper.

[0035] As shown in FIG. 2 and FIG. 6, the first terminal 31 has a first base portion 311 and a plurality of first bonding portions 312. As viewed in the first direction z, the first base portion 311 is separated from the conductive layer 12. As shown in FIG. 1, the first base portion 311 includes a portion covered with the sealing resin 50 and a portion exposed to the outside from a first side surface 53 of the sealing resin 50. As viewed in the first direction z, the plurality of first bonding portions 312 extend from the first base portion 311 to a side where the first semiconductor element 21 and the second semiconductor element 22 are located in the second direction x. The plurality of first bonding portions 312 are arranged along the third direction y. Each of the plurality of first bonding portions 312 is covered with the sealing resin 50.

[0036] 6, each of the multiple first bonding portions 312 is conductively bonded to the mounting surface 121 of the conductive layer 12 via a conductive bonding layer 29. Alternatively, each of the multiple first bonding portions 312 may be conductively bonded to the conductive layer 12 by welding.

[0037] 2 and 5, the second terminal 32 is conductively joined to the two second electrodes 212 of the first semiconductor element 21 and the two fourth electrodes 222 of the second semiconductor element 22. As a result, the second terminal 32 is electrically connected to each of the two second electrodes 212 and each of the two fourth electrodes 222. Therefore, the second terminal 32 corresponds to a source terminal of the semiconductor device A10. The second terminal 32 contains copper.

[0038] As shown in FIG. 2 and FIG. 5, the second terminal 32 has a second base 321, a plurality of second bonding portions 322, and a plurality of third bonding portions 323. When viewed in the first direction z, the second base 321 overlaps the mounting surface 121 of the conductive layer 12. As shown in FIG. 1, the second base 321 includes a portion covered with the sealing resin 50 and a portion exposed to the outside from the second side surface 54 of the sealing resin 50. Each of the plurality of second bonding portions 322 is connected to the second base 321 and is covered with the sealing resin 50. As shown in FIG. 6, each of the plurality of second bonding portions 322 protrudes from the second base 321 toward the first semiconductor element 21. Each of the plurality of second bonding portions 322 is conductively bonded to one of the two second electrodes 212 of the first semiconductor element 21 via the conductive bonding layer 29. Each of the multiple third bonding portions 323 is connected to the second base portion 321 and is covered with the sealing resin 50. Each of the multiple third bonding portions 323 protrudes from the second base portion 321 toward the second semiconductor element 22. Each of the multiple third bonding portions 323 is conductively bonded to one of the two fourth electrodes 222 of the second semiconductor element 22 via a conductive bonding layer 29.

[0039] As shown in FIG. 1, the first signal terminal 33 includes a portion covered with the sealing resin 50 and a portion exposed to the outside from the second side surface 54 of the sealing resin 50. The first signal terminal 33 is located on one side of the second base portion 321 of the second terminal 32 in the third direction y. The first signal terminal 33 is electrically connected to the gate wiring layer 14. Therefore, the first signal terminal 33 is electrically connected to the first gate electrode 213 of the first semiconductor element 21 and the second gate electrode 223 of the second semiconductor element 22. That is, the first signal terminal 33 corresponds to the gate terminal of the semiconductor device A10. The first signal terminal 33 includes copper. As shown in FIG. 4, the portion of the first signal terminal 33 exposed to the outside from the second side surface 54 includes a portion extending along the first direction z.

[0040] As shown in FIG. 1, the second signal terminal 34 includes a portion covered with the sealing resin 50 and a portion exposed to the outside from the second side surface 54 of the sealing resin 50. The second signal terminal 34 is located between the first signal terminal 33 and the second base portion 321 of the second terminal 32 in the third direction y. In the semiconductor device A10, the second signal terminal 34 is connected to the second base portion 321. Therefore, the second signal terminal 34 is electrically connected to each of the two second electrodes 212 and each of the two fourth electrodes 222. A voltage having the same potential as the voltage applied to each of the two second electrodes 212 and each of the two fourth electrodes 222 is applied to the second signal terminal 34. The second signal terminal 34 includes copper. As with the first signal terminal 33, the portion of the second signal terminal 34 exposed to the outside from the second side surface 54 includes a portion extending along the first direction z.

[0041] 2, the first conductive member 41 is conductively joined to the first gate electrode 213 of the first semiconductor element 21 and the gate wiring layer 14. As a result, the gate wiring layer 14 is electrically connected to the first gate electrode 213. The first conductive member 41 is covered with a sealing resin 50. The first conductive member 41 is, for example, a wire containing either aluminum (Al) or gold (Au).

[0042] 2, the second conductive member 42 is conductively joined to the second gate electrode 223 of the second semiconductor element 22 and the gate wiring layer 14. As a result, the gate wiring layer 14 is electrically connected to the second gate electrode 223. The second conductive member 42 is covered with a sealing resin 50. The second conductive member 42 is, for example, a wire containing either aluminum or gold.

[0043] 2, the third conductive member 43 is conductively joined to the gate wiring layer 14 and the first signal terminal 33. As a result, the gate wiring layer 14 is electrically connected to the first signal terminal 33. The third conductive member 43 is covered with a sealing resin 50. The third conductive member 43 is, for example, a wire containing either aluminum or gold. In the semiconductor device A10, the third conductive member 43 is connected to the second conductive member 42.

[0044] As shown in FIGS. 3 to 6, the sealing resin 50 has a protrusion 55 protruding from the first surface 521. As viewed in the first direction z, the protrusion 55 surrounds the first back surface 131 of the first metal layer 13. As shown in FIG. 9, the protrusion 55 has a second surface 522, an outer peripheral surface 55A, and an inner peripheral surface 55B. The second surface 522 faces the same side as the first surface 521 of the sealing resin 50 in the first direction z. The second surface 522 is located farther from the first surface 521 than the first back surface 131 is located in the first direction z. As viewed in the first direction z, the inner peripheral surface 55B is located between the first back surface 131 and the second surface 522. As viewed in the first direction z, the outer peripheral surface 55A is located on the opposite side to the inner peripheral surface 55B with respect to the second surface 522. The outer peripheral surface 55A is inclined with respect to the first surface 521. The outer circumferential surface 55A is inclined in the first direction z from the first surface 521 to the second surface 522 toward the inner circumferential surface 55B.

[0045] 3 to 6, the sealing resin 50 has a groove 56 located between the first back surface 131 and the protrusion 55 of the first back surface 131 as viewed in the first direction z. The groove 56 is recessed on the side opposite to the side toward which the first surface 521 of the sealing resin 50 faces. As viewed in the first direction z, the groove 56 surrounds the first back surface 131 and overlaps the insulating layer 11. The groove 56 extends in a direction perpendicular to the first direction z.

[0046] 9, a dimension d of the groove 56 in the first direction z is greater than a dimension w of the groove 56 in a direction perpendicular to both the first direction z and the direction in which the groove 56 extends. The dimension d corresponds to the depth of the groove 56. The dimension w corresponds to the width of the groove 56.

[0047] 9, an end face 132 of the first metal layer 13 is exposed from the groove portion 56. The sealing resin 50 has a third surface 523 facing the same side as the first surface 521 of the sealing resin 50 in the first direction z. The third surface 523, the end face 132, and the inner circumferential surface 55B of the protrusion 55 each define the groove portion 56. The third surface 523 is located between the first surface 521 and the first back surface 131 of the first metal layer 13 in the first direction z. The surface roughness of each of the third surface 523 and the inner circumferential surface 55B is greater than the surface roughness of the first surface 521.

[0048] Next, an example of a manufacturing method of the semiconductor device A10 will be described with reference to Figures 10 to 15. Here, the cross-sectional positions of Figures 10 to 13 and Figure 15 correspond to the cross-sectional position of Figure 6.

[0049] First, as shown in Fig. 10, a first conductor layer 81 is bonded to one side of the insulating layer 11 in the first direction z. At the same time, a second conductor layer 82 is bonded to the other side of the insulating layer 11 in the first direction z. The first conductor layer 81 is an element including the conductive layer 12 and the gate wiring layer 14 of the semiconductor device A10. The second conductor layer 82 is an element including the first metal layer 13 of the semiconductor device A10. Each of the first conductor layer 81 and the second conductor layer 82 contains copper.

[0050] 11, a portion of each of the first conductor layer 81 and the second conductor layer 82 is removed. In this process, each of the first conductor layer 81 and the second conductor layer 82 is subjected to photolithographic patterning, and then the portions exposed from the mask layer by the photolithographic patterning are removed by wet etching. Through this process, the conductive layer 12, the first metal layer 13, and the gate wiring layer 14 included in the semiconductor device A10 are formed.

[0051] 12, the first semiconductor element 21 and the second semiconductor element 22 are each conductively bonded to the mounting surface 121 of the conductive layer 12 via the conductive bonding layer 29. Each of the first bonding portions 312 of the first terminal 31 is conductively bonded to the mounting surface 121 via the conductive bonding layer 29. Furthermore, the second bonding portions 322 of the second terminal 32 are conductively bonded to the two second electrodes 212 of the first semiconductor element 21 via the conductive bonding layer 29. In addition, the third bonding portions 323 of the second terminal 32 are conductively bonded to the two fourth electrodes 222 of the second semiconductor element 22 via the conductive bonding layer 29. In this process, the first base portion 311 of the first terminal 31 and the second base portion 321 of the second terminal 32 are supported by a support member (not shown) such as a metal frame.

[0052] Next, although not shown in the figures, a first conductive member 41 is conductively bonded to the first gate electrode 213 of the first semiconductor element 21 and the gate wiring layer 14. A second conductive member 42 is conductively bonded to the second gate electrode 223 of the second semiconductor element 22 and the gate wiring layer 14. Furthermore, a third conductive member 43 is conductively bonded to the gate wiring layer 14 and the first signal terminal 33.

[0053] 13, a sealing resin 50 is formed to cover the insulating layer 11, the conductive layer 12, the first semiconductor element 21, and the second semiconductor element 22. The sealing resin 50 is formed by transfer molding. As shown in FIG. 14, the process of forming the sealing resin 50 includes a process of exposing the first back surface 131 of the first metal layer 13 from the first surface 521 of the sealing resin 50, and a process of forming a protrusion 55 protruding from the first surface 521 in the sealing resin 50. The protrusion 55 is formed integrally with other parts of the sealing resin 50 by transfer molding.

[0054] Next, as shown in FIG. 15, a groove 56 is formed in the sealing resin 50 so as to be recessed in the opposite direction to the side to which the first surface 521 of the sealing resin 50 faces in the first direction z. In this process, the groove 56 is formed so as to be located between the first back surface 131 of the first metal layer 13 and the protruding portion 55 as viewed in the first direction z. The groove 56 is formed by removing a part of the sealing resin 50 by irradiating with a laser 89. FIG. 9 shows a state after the groove 56 is formed in the sealing resin 50. As shown in FIG. 9, in this process, the dimension d of the groove 56 in the first direction z is made larger than the dimension w of the groove 56 in a direction perpendicular to each of the first direction z and the direction in which the groove 56 extends. Furthermore, in this process, the end surface 132 of the first metal layer 13 is exposed from the groove 56. Then, the first base 311 of the first terminal 31 and the second base 321 of the second terminal 32 are each cut off from the support member. Through the above steps, the semiconductor device A10 is obtained.

[0055] Next, a vehicle B equipped with the semiconductor device A10 will be described with reference to Fig. 16. The vehicle B is, for example, an electric vehicle (EV).

[0056] As shown in Fig. 16, vehicle B includes an on-board charger 91, a storage battery 92, and a drive system 93. Power is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 91 via a wired connection. A step-up DC-DC converter is configured in the on-board charger 91. The voltage of the power supplied to the on-board charger 91 is stepped up by the converter and then supplied to the storage battery 92. The stepped-up voltage is, for example, 600V.

[0057] The drive system 93 drives the vehicle B. The drive system 93 has an inverter 931 and a drive source 932. The semiconductor device A10 constitutes a part of the inverter 931. The power stored in the storage battery 92 is supplied to the inverter 931. The power supplied from the storage battery 92 to the inverter 931 is DC power. In addition, unlike the power system shown in FIG. 16, a step-up DC-DC converter may be further provided between the storage battery 92 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931 including the semiconductor device A10 is conducted to the drive source 932. The drive source 932 has an AC motor and a transmission. When the AC power converted by the inverter 931 is supplied to the drive source 932, the AC motor rotates and the rotation is transmitted to the transmission. The transmission rotates the drive shaft of the vehicle B after appropriately reducing the rotation speed transmitted from the AC motor. This drives vehicle B. To drive vehicle B, it is necessary to freely control the rotation speed of the AC motor based on information such as the amount of fluctuation in the accelerator pedal. Therefore, semiconductor device A10 in inverter 931 is necessary to output AC power with a frequency appropriately changed to correspond to the required rotation speed of the AC motor.

[0058] Next, the effects of the semiconductor device A10 will be described.

[0059] The semiconductor device A10 includes an insulating layer 11, a conductive layer 12, a first metal layer 13, a first semiconductor element 21, and a sealing resin 50. The first metal layer 13 has a first back surface 131 exposed from a first surface 521 of the sealing resin 50. The sealing resin 50 is provided with a protruding portion 55. A second surface 522 of the protruding portion 55 is located farther from the first surface 521 than the first back surface 131 in the first direction z. Furthermore, the sealing resin 50 is provided with a groove portion 56 recessed on the side opposite to the side to which the first surface 521 faces in the first direction z. The groove portion 56 is located between the first back surface 131 and the protruding portion 55 as viewed in the first direction z. A dimension d of the groove portion 56 in the first direction z is larger than a dimension w of the groove portion 56 in a direction perpendicular to each of the first direction z and the direction in which the groove portion 56 extends. By providing the convex portion 55 in the sealing resin 50, in the process of forming the sealing resin 50 shown in FIG. 13, the molten resin located at the portion of the mold for forming the convex portion 55 mainly flows in the first direction z. This suppresses leakage of the molten resin from the mold for forming the sealing resin 50 toward the first back surface 131 of the first metal layer 13 in a direction perpendicular to the first direction z. Here, the molten resin leaking from the mold is a cause of the formation of resin burrs on the periphery 131A (see FIG. 9) of the first back surface 131. Therefore, by providing the groove portion 56 in the sealing resin 50, the resin burrs formed on the periphery 131A can be removed. Therefore, according to this configuration, in the semiconductor device A10, it is possible to suppress the formation of resin burrs on the periphery of the metal layer exposed from the sealing resin 50.

[0060] Each of the protrusions 55 and the grooves 56 surrounds the first back surface 131 of the first metal layer 13. With this configuration, the occurrence of resin burrs formed on the periphery 131A of the first back surface 131 can be effectively suppressed.

[0061] End face 132 of first metal layer 13 is exposed from groove 56. With this configuration, resin burrs formed on peripheral edge 131A of first back surface 131 of first metal layer 13 can be removed more reliably.

[0062] The sealing resin 50 has a third surface 523 that defines a part of the groove 56. The third surface 523 is located between the first surface 521 of the sealing resin 50 and the first back surface 131 of the first metal layer 13 in the first direction z. This configuration can prevent the dimension d of the groove 56 in the first direction z from becoming excessively large. Furthermore, the surface roughness of the third surface 523 is greater than the surface roughness of the first surface 521. Such a difference in surface roughness occurs because the groove 56 is formed by irradiation with a laser 89, as shown in FIG. 15.

[0063] The insulating layer 11 is covered with the sealing resin 50. As viewed in the first direction z, the first back surface 131 of the first metal layer 13 is located inward from the peripheral edge 11A of the insulating layer 11. With this configuration, the vicinity of the peripheral edge 11A is pressed against the sealing resin 50 from the side opposite to the side to which the first back surface 131 faces in the first direction z. This makes it possible to prevent the insulating layer 11 and the conductive layer 12 from falling off from the sealing resin 50.

[0064] The dimension in the first direction z of each of the conductive layer 12 and the first metal layer 13 is larger than the dimension in the first direction z of the insulating layer 11. This configuration reduces the thermal resistance in the first direction z of each of the conductive layer 12 and the first metal layer 13. This can further improve the heat dissipation performance of the semiconductor device A10.

[0065] Second Embodiment A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 17 to 19. In these figures, elements that are the same as or similar to those of the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. Here, the cross-sectional position of Figure 18 corresponds to the cross-sectional position of Figure 5 showing the semiconductor device A10. The cross-sectional position of Figure 19 corresponds to the cross-sectional position of Figure 6 showing the semiconductor device A10.

[0066] In the semiconductor device A20, the configuration of the groove 56 is different from that of the semiconductor device A10.

[0067] 17, the groove portion 56 includes a first groove 561, a second groove 562, and two third grooves 563. The first groove 561 and the second groove 562 are located on opposite sides to each other in the second direction x with respect to the first back surface 131 of the first metal layer 13. The two third grooves 563 are located on opposite sides to each other with respect to the first back surface 131 in the third direction y.

[0068] 19, the dimension d1 in the first direction z of the first groove 561 is larger than the dimension d2 in the first direction z of the second groove 562. Therefore, the dimension d2 is different from the dimension d1. Furthermore, as shown in FIGS. 18 and 19, the dimension d3 in the first direction z of each of the two third grooves 563 is equal to or larger than the dimension d2 and equal to or smaller than the dimension d3.

[0069] Next, the effects of the semiconductor device A20 will be described.

[0070] The semiconductor device A20 includes an insulating layer 11, a conductive layer 12, a first metal layer 13, a first semiconductor element 21, and a sealing resin 50. The first metal layer 13 has a first back surface 131 exposed from a first surface 521 of the sealing resin 50. The sealing resin 50 is provided with a protruding portion 55. A second surface 522 of the protruding portion 55 is located farther from the first surface 521 than the first back surface 131 in the first direction z. Furthermore, the sealing resin 50 is provided with a groove portion 56 recessed on the side opposite to the side to which the first surface 521 faces in the first direction z. The groove portion 56 is located between the first back surface 131 and the protruding portion 55 as viewed in the first direction z. A dimension d of the groove portion 56 in the first direction z is larger than a dimension w of the groove portion 56 in a direction perpendicular to each of the first direction z and the direction in which the groove portion 56 extends. Therefore, according to this configuration, it is possible to suppress the occurrence of resin burrs in the semiconductor device A20 along the periphery of the metal layer exposed from the sealing resin 50. Furthermore, the semiconductor device A20 has a configuration in common with the semiconductor device A10, and thereby achieves the same effects as the semiconductor device A10.

[0071] In the semiconductor device A20, the groove portion 56 includes a first groove 561 and a second groove 562 located on opposite sides of each other with respect to the first back surface 131 of the first metal layer 13. The dimension d2 of the second groove 562 in the first direction z is different from the dimension d1 of the first groove 561 in the first direction z. Here, in the process of forming the sealing resin 50 shown in FIG. 13, a rotational displacement of the insulating layer 11 may occur around a direction perpendicular to the first direction z. As a result, the size of the resin burr formed differs on both sides of the periphery 131A (see FIG. 9) of the first back surface 131 in the direction perpendicular to both the first direction z and the axial direction of the rotational displacement. Therefore, by adopting this configuration, even if there is a difference in the size of the resin burr formed on the periphery 131A, the resin burr can be removed more reliably.

[0072] Third Embodiment A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figs. 20 to 22. In these figures, elements that are the same as or similar to those of the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. Here, the cross-sectional position of Fig. 21 corresponds to the cross-sectional position of Fig. 6 showing the semiconductor device A10.

[0073] The semiconductor device A30 differs from the semiconductor device A10 in that it further comprises a second metal layer 15.

[0074] As shown in FIGS. 20 and 21, the second metal layer 15 is laminated on the first back surface 131 of the first metal layer 13. The second metal layer 15 contains a metal element different from that of the first metal layer 13. The second metal layer 15 contains, for example, silver. When the first metal layer 13 contains copper and the second metal layer 15 contains silver, the thermal conductivity of the second metal layer 15 is higher than that of the first metal layer 13. The second metal layer 15 has a second back surface 151 facing the same side as the first back surface 131 of the first metal layer 13 in the first direction z. The second back surface 151 is exposed from the sealing resin 50.

[0075] 20, as viewed in the first direction z, the second back surface 151 is located inward from the peripheral edge 131A of the first back surface 131 of the first metal layer 13. As shown in Fig. 22, the second back surface 151 is located between the first back surface 131 and the second surface 522 of the protrusion 55 in the first direction z.

[0076] As shown in FIG. 22, the dimension t2 of the second metal layer 15 in the first direction z is smaller than the dimension t1 of the first metal layer 13 in the first direction z.

[0077] Next, a semiconductor device A31 according to a modified example of the third embodiment of the present disclosure will be described with reference to Fig. 23 and Fig. 24. Here, the cross-sectional position of Fig. 23 corresponds to the cross-sectional position of Fig. 21.

[0078] In the semiconductor device A31, the configuration of the second metal layer 15 is different from that of the semiconductor device A30. As shown in Fig. 23 and Fig. 24, the second back surface 151 of the second metal layer 15 is located on the opposite side to the first back surface 131 of the first metal layer 13 with respect to the second surface 522 of the protrusion 55 in the first direction z. This configuration is formed by removing a part of the protrusion 55 by irradiating with a laser 89 in the step of forming the groove 56 in the protrusion 55 shown in Fig. 15. Therefore, in the semiconductor device A31, the surface roughness of the second surface 522 is larger than the surface roughness of the first surface 521 of the sealing resin 50.

[0079] Next, the effects of the semiconductor device A30 will be described.

[0080] The semiconductor device A30 includes an insulating layer 11, a conductive layer 12, a first metal layer 13, a first semiconductor element 21, and a sealing resin 50. The first metal layer 13 has a first back surface 131 exposed from a first surface 521 of the sealing resin 50. The sealing resin 50 is provided with a protruding portion 55. A second surface 522 of the protruding portion 55 is located farther from the first surface 521 than the first back surface 131 in the first direction z. Furthermore, the sealing resin 50 is provided with a groove portion 56 recessed on the side opposite to the side to which the first surface 521 faces in the first direction z. The groove portion 56 is located between the first back surface 131 and the protruding portion 55 as viewed in the first direction z. A dimension d of the groove portion 56 in the first direction z is larger than a dimension w of the groove portion 56 in a direction perpendicular to each of the first direction z and the direction in which the groove portion 56 extends. Therefore, according to this configuration, it is possible to suppress the occurrence of resin burrs in the semiconductor device A30 as well, which are formed on the periphery of the metal layer exposed from the sealing resin 50. Furthermore, by being provided with a configuration common to the semiconductor device A10, the semiconductor device A30 achieves the same effects as the semiconductor device A10.

[0081] The semiconductor device A30 further includes a second metal layer 15 that is laminated on a first back surface 131 of the first metal layer 13 and contains a metal element different from that of the first metal layer 13. A second back surface 151 of the second metal layer 15 is exposed from the sealing resin 50. With this configuration, the semiconductor device A30 can be attached to a heat sink via the second metal layer 15. In this case, the metal element contained in the second metal layer 15 can be an element suitable for attachment to the heat sink.

[0082] [Fourth embodiment] A semiconductor device A40 according to a fourth embodiment of the present disclosure will be described with reference to Figs. 25 to 27. In these figures, elements that are the same as or similar to those of the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. Here, the cross-sectional position of Fig. 26 corresponds to the cross-sectional position of Fig. 6 showing the semiconductor device A10.

[0083] In the semiconductor device A40, the configuration of the convex portion 55 provided in the sealing resin 50 is different from that of the semiconductor device A10. Furthermore, in the semiconductor device A40, the sealing resin 50 does not have the groove portion 56 provided therein.

[0084] As shown in FIGS. 25 and 26 , the protrusion 55 includes a base 551 and an overhang 552. The base 551 protrudes from the first surface 521 of the sealing resin 50. The base 551 includes a second surface 522, an outer peripheral surface 55A, and an inner peripheral surface 55B. The end surface 132 of the first metal layer 13 is covered by the inner peripheral surface 55B. The overhang 552 extends from the base 551 in a direction perpendicular to the first direction z. The overhang 552 is in contact with the first back surface 131 of the first metal layer 13. The overhang 552 includes a resin burr formed on the periphery 131A of the first back surface 131.

[0085] As shown in FIG. 27, a dimension h2 of the protruding portion 552 in the first direction z is smaller than a dimension h1 of the base portion 551 in the first direction z.

[0086] Next, the function and effect of the semiconductor device A40 will be described.

[0087] The semiconductor device A40 includes an insulating layer 11, a conductive layer 12, a first metal layer 13, a first semiconductor element 21, and a sealing resin 50. The first metal layer 13 has a first back surface 131 exposed from a first surface 521 of the sealing resin 50. The sealing resin 50 is provided with a protruding portion 55. A second surface 522 of the protruding portion 55 is located farther from the first surface 521 than the first back surface 131 in the first direction z. The protruding portion 55 is in contact with the first back surface 131. By adopting this configuration, in the process of forming the sealing resin 50 shown in FIG. 13, the molten resin located at the part of the mold for forming the protruding portion 55 mainly flows in the first direction z. This suppresses leakage of the molten resin from the mold for forming the sealing resin 50 toward the first back surface 131 of the first metal layer 13 in a direction perpendicular to the first direction z. Therefore, according to this configuration, it is possible to suppress the occurrence of resin burrs formed on the periphery of the metal layer exposed from the sealing resin 50 in the semiconductor device A40 as well.

[0088] The present disclosure is not limited to the above-described embodiment. The specific configuration of each part of the present disclosure can be freely designed in various ways.

[0089] The present disclosure includes the embodiments described in the appended claims below. [Appendix 1] An insulating layer; a conductive layer bonded to one side of the insulating layer in a first direction; a first metal layer located on the opposite side of the insulating layer from the conductive layer and bonded to the insulating layer; a semiconductor element bonded to the conductive layer; a sealing resin that covers the conductive layer and the semiconductor element, the sealing resin has a first surface facing a side on which the first metal layer is located with respect to the insulating layer in the first direction; the first metal layer has a first back surface exposed from the first surface; the sealing resin is provided with a protrusion protruding from the first surface, the protrusion has a second surface that faces the same side as the first surface in the first direction and is located farther from the first surface in the first direction than the first back surface, the sealing resin has a groove portion that is located between the first back surface and the protruding portion as viewed in the first direction and is recessed on a side opposite to a side to which the first surface faces in the first direction, A semiconductor device, wherein a dimension of the groove in the first direction is larger than a dimension of the groove in a direction perpendicular to both the first direction and a direction in which the groove extends. [Appendix 2] 2. The semiconductor device according to claim 1, wherein the groove portion surrounds the first back surface. [Appendix 3] the first metal layer has an end surface facing in a direction perpendicular to the first direction, 3. The semiconductor device according to claim 2, wherein the end surface is exposed from the groove. [Appendix 4] the sealing resin has a third surface that faces the same side as the first surface in the first direction and defines a part of the groove; 4. The semiconductor device according to claim 3, wherein the third surface is located between the first surface and the first back surface in the first direction. [Appendix 5] 5. The semiconductor device according to claim 4, wherein the third surface has a surface roughness greater than a surface roughness of the first surface. [Appendix 6] the groove portion includes a first groove and a second groove located on opposite sides of the first back surface, 4. The semiconductor device according to claim 3, wherein a dimension of the second groove in the first direction is different from a dimension of the first groove in the first direction. [Appendix 7] An insulating layer; a conductive layer bonded to one side of the insulating layer in a first direction; a first metal layer located on the opposite side of the insulating layer from the conductive layer and bonded to the insulating layer; a semiconductor element bonded to the conductive layer; a sealing resin that covers the conductive layer and the semiconductor element, the sealing resin has a first surface facing a side on which the first metal layer is located with respect to the insulating layer in the first direction; the first metal layer has a first back surface exposed from the first surface; the sealing resin is provided with a protrusion protruding from the first surface, the protrusion has a second surface that faces the same side as the first surface in the first direction and is located farther from the first surface in the first direction than the first back surface, The protruding portion is in contact with the first back surface. [Appendix 8] the protruding portion has a base portion protruding from the first surface and a protruding portion extending from the base portion in a direction perpendicular to the first direction, 8. The semiconductor device according to claim 7, wherein the protruding portion is in contact with the first back surface. [Appendix 9] 9. The semiconductor device according to claim 8, wherein a dimension of the protrusion in the first direction is smaller than a dimension of the base in the first direction. [Appendix 10] 10. The semiconductor device according to claim 1, wherein the protrusion surrounds the first back surface. [Appendix 11] the insulating layer is covered with the sealing resin, 11. The semiconductor device according to claim 10, wherein, as viewed in the first direction, the first back surface is located inward from a periphery of the insulating layer. [Appendix 12] a second metal layer laminated on the first back surface and containing a metal element different from that of the first metal layer; the second metal layer has a second back surface facing the same side as the first back surface in the first direction; 12. The semiconductor device according to claim 11, wherein the second back surface is exposed from the sealing resin. [Appendix 13] 13. The semiconductor device of claim 12, wherein the dimension of the second metal layer in the first direction is smaller than the dimension of the first metal layer in the first direction. [Appendix 14] When viewed in the first direction, the second back surface is located inward from a peripheral edge of the first back surface, The semiconductor device according to claim 13, wherein the second back surface is located between the first back surface and the second surface in the first direction. [Appendix 15] Further comprising a terminal electrically connected to the semiconductor element, 12. The semiconductor device of claim 11, wherein each of the semiconductor element and the terminal is conductively connected to the conductive layer. [Appendix 16] forming a conductive layer and a first metal layer bonded to both sides of an insulating layer in a first direction; bonding a semiconductor element to the conductive layer; forming a sealing resin having a first surface facing a side where the first metal layer is located with respect to the insulating layer in the first direction, the sealing resin covering the conductive layer and the semiconductor element; forming a groove portion in the sealing resin that is recessed on a side opposite to a side to which the first surface faces in the first direction; the step of forming the sealing resin includes a step of exposing, from the first surface, a first back surface of the first metal layer facing the same side as the first surface in the first direction; and a step of forming a convex portion in the sealing resin that protrudes from the first surface, the protrusion has a second surface that faces the same side as the first surface in the first direction and is located farther from the first surface in the first direction than the first back surface, In the step of forming the groove portion, the groove portion is formed so as to be located between the first back surface and the protrusion portion when viewed in the first direction, A method for manufacturing a semiconductor device, wherein a dimension of the groove in the first direction is larger than a dimension of the groove in a direction perpendicular to both the first direction and a direction in which the groove extends. [Appendix 17] 17. The method for manufacturing a semiconductor device according to claim 16, wherein the groove portion is formed by removing a part of the sealing resin by laser irradiation. [Appendix 18] 18. The method for manufacturing a semiconductor device according to claim 17, wherein in the step of forming the groove, an end face of the first metal layer facing a direction perpendicular to the first direction is exposed from the groove. [Appendix 19] A driving source; A semiconductor device according to claim 15, The semiconductor device is electrically connected to the drive source. [Explanation of symbols]

[0090] A10, A20, A30, A40: Semiconductor device 11: Insulating layer 11A: Periphery 12: Conductive layer 121: Mounting surface 13: Heat dissipation layer 131: First back 131A: Periphery 132: End face 14: Gate wiring layer 15: Second metal layer 151: Second back 21: First semiconductor element 211: 1st electrode 212:Second electrode 213: First gate electrode 22: Second semiconductor element 221:Third electrode 222: 4th electrode 223: second gate electrode 29: Conductive bonding layer 31: 1st terminal 311:1st base 312: 1st joint 32: 2nd terminal 321:Second base 322:Second joint 323: Third joint 33: 1st signal terminal 34: 2nd signal terminal 41: First conductive member 42: Second conductive member 43: Third conductive member 50: Sealing resin 51:Top surface 521: 1st page 522:Second side 523:Side 3 53:1st side 54:Second side 55: Convex 55A: Outer surface 55B: Inner surface 551: Base 552: Overhang 56: Groove 561~563: 1st groove ~ 3rd groove 81: First conductor layer 82: Second conductor layer 89: Laser 91: Vehicle charger 92: Battery 93: Drive system 931: Inverter 932: Power source z: 1st direction x: 2nd direction y: third direction

Claims

1. An insulating layer; a conductive layer bonded to one side of the insulating layer in a first direction; a first metal layer located on the opposite side of the insulating layer from the conductive layer and bonded to the insulating layer; a semiconductor element bonded to the conductive layer; a sealing resin that covers the conductive layer and the semiconductor element, the sealing resin has a first surface facing a side on which the first metal layer is located with respect to the insulating layer in the first direction; the first metal layer has a first back surface exposed from the first surface; the sealing resin is provided with a protrusion protruding from the first surface, the protrusion has a second surface that faces the same side as the first surface in the first direction and is located farther from the first surface in the first direction than the first back surface, the sealing resin has a groove portion that is located between the first back surface and the protruding portion as viewed in the first direction and is recessed on a side opposite to a side to which the first surface faces in the first direction, A semiconductor device, wherein a dimension of the groove in the first direction is larger than a dimension of the groove in a direction perpendicular to both the first direction and a direction in which the groove extends.

2. The semiconductor device according to claim 1 , wherein the groove surrounds the first back surface.

3. the first metal layer has an end surface facing in a direction perpendicular to the first direction, The semiconductor device according to claim 2 , wherein the end surface is exposed from the groove.

4. the sealing resin has a third surface that faces the same side as the first surface in the first direction and defines a part of the groove; The semiconductor device according to claim 3 , wherein the third surface is located between the first surface and the first back surface in the first direction.

5. The semiconductor device according to claim 4 , wherein the third surface has a surface roughness greater than a surface roughness of the first surface.

6. The groove portion includes a first groove and a second groove located on opposite sides of the first back surface, The semiconductor device according to claim 3 , wherein a dimension of said second groove in said first direction is different from a dimension of said first groove in said first direction.

7. An insulating layer; a conductive layer bonded to one side of the insulating layer in a first direction; a first metal layer located on the opposite side of the insulating layer from the conductive layer and bonded to the insulating layer; a semiconductor element bonded to the conductive layer; a sealing resin that covers the conductive layer and the semiconductor element, the sealing resin has a first surface facing a side on which the first metal layer is located with respect to the insulating layer in the first direction; the first metal layer has a first back surface exposed from the first surface; the sealing resin is provided with a protrusion protruding from the first surface, the protrusion has a second surface that faces the same side as the first surface in the first direction and is located farther from the first surface in the first direction than the first back surface, The protruding portion is in contact with the first back surface.

8. The protrusion has a base portion protruding from the first surface and a protruding portion extending from the base portion in a direction perpendicular to the first direction, The semiconductor device according to claim 7 , wherein the protruding portion is in contact with the first back surface.

9. The semiconductor device according to claim 8 , wherein a dimension of said protruding portion in said first direction is smaller than a dimension of said base portion in said first direction.

10. The semiconductor device according to claim 1 , wherein the protruding portion surrounds the first rear surface.

11. the insulating layer is covered with the sealing resin, The semiconductor device according to claim 10 , wherein the first back surface is located inward from a periphery of the insulating layer when viewed in the first direction.

12. a second metal layer laminated on the first back surface and containing a metal element different from that of the first metal layer; the second metal layer has a second back surface facing the same side as the first back surface in the first direction; The semiconductor device according to claim 11 , wherein the second back surface is exposed from the sealing resin.

13. The semiconductor device according to claim 12 , wherein a dimension of the second metal layer in the first direction is smaller than a dimension of the first metal layer in the first direction.

14. When viewed in the first direction, the second back surface is located inward from a peripheral edge of the first back surface, The semiconductor device according to claim 13 , wherein the second back surface is located between the first back surface and the second surface in the first direction.

15. Further comprising a terminal electrically connected to the semiconductor element, The semiconductor device according to claim 11 , wherein each of the semiconductor element and the terminal is conductively bonded to the conductive layer.

16. forming a conductive layer and a first metal layer bonded to opposite sides of an insulating layer in a first direction; bonding a semiconductor element to the conductive layer; forming a sealing resin having a first surface facing a side where the first metal layer is located with respect to the insulating layer in the first direction, the sealing resin covering the conductive layer and the semiconductor element; forming a groove portion in the sealing resin, the groove portion being recessed toward a side opposite to a side toward which the first surface faces in the first direction; the step of forming the sealing resin includes a step of exposing, from the first surface, a first back surface of the first metal layer facing the same side as the first surface in the first direction; and a step of forming a convex portion in the sealing resin that protrudes from the first surface, the protrusion has a second surface that faces the same side as the first surface in the first direction and is located farther from the first surface in the first direction than the first back surface, In the step of forming the groove portion, the groove portion is formed so as to be located between the first back surface and the protrusion portion as viewed in the first direction, A method for manufacturing a semiconductor device, wherein a dimension of the groove in the first direction is larger than a dimension of the groove in a direction perpendicular to both the first direction and a direction in which the groove extends.

17. 17. The method for manufacturing a semiconductor device according to claim 16, wherein the groove portion is formed by removing a part of the sealing resin by laser irradiation.

18. 18. The method for manufacturing a semiconductor device according to claim 17, wherein in the step of forming the groove, an end face of the first metal layer facing a direction perpendicular to the first direction is exposed from the groove.

19. A driving source; The semiconductor device according to claim 15, The semiconductor device is electrically connected to the drive source.

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