Semiconductor device

Abstract

To provide a semiconductor device with high reliability.SOLUTION: A semiconductor element includes a source electrode on one surface and a drain electrode on a rear surface. The semiconductor element also includes a pad 44 arranged in a position different from the source electrode on one surface. A bonding wire 90 is connected to the pad 44. A sealing body 30 seals the semiconductor element and the bonding wire 90. The pad 44 includes an exposed surface 441 exposed from an opening 451 of a protective film 45. The exposed surface 441 includes a connection region 441a to which the bonding wire 90 is connected and a peripheral region 441b of the connection region 441a. The peripheral region 441b includes a surface in which an angle relative to a surface of the connection region 441a is 90 degrees or lower.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The disclosure herein relates to semiconductor devices. [Background technology]

[0002] Patent Document 1 discloses a semiconductor device including a semiconductor element. The semiconductor element has a first main electrode and a pad on one side and a second main electrode on the back side. The contents of the prior art documents are incorporated by reference as explanations of the technical elements in this specification. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2007-27183 A Summary of the Invention [Problem to be solved by the invention]

[0004] A bonding wire is connected to a portion of the pad exposed from the protective film. The semiconductor element and the bonding wire are sealed with a sealing body. In such a configuration, there is a risk that peeling will occur, for example, at the interface between the sealing body and the protective film due to thermal stress such as power cycles and thermal cycles. If the peeling progresses to the connection between the pad and the bonding wire, the connection reliability will decrease. In addition, there is a risk that a crack will occur at the connection between the pad and the bonding wire due to thermal stress. If the peeling of the sealing body starting from a crack progresses, for example, toward a main electrode provided on the same surface as the pad, the connection reliability of the main electrode will decrease. If the peeling progresses, for example, to an end face of the semiconductor element, the insulation reliability will decrease. In the above-mentioned viewpoints, or in other viewpoints not mentioned, further improvements are required for semiconductor devices.

[0005] The present disclosure has been made in view of the above problems, and has an object to provide a highly reliable semiconductor device. [Means for solving the problem]

[0006] The semiconductor device disclosed herein comprises: a semiconductor element (40) having a semiconductor substrate (41), a first main electrode (42) arranged on one surface of the semiconductor substrate, a second main electrode (43) arranged on a back surface of the semiconductor substrate opposite to the one surface in the plate thickness direction, and a pad (44) which is an electrode for signals arranged on the one surface at a position different from the first main electrode; a first wiring member (50, 70) electrically connected to the first main electrode; a second wiring member (60) electrically connected to the second main electrode; a bonding wire (90) connected to the pad; The semiconductor device includes a sealing body (30) that seals at least a portion of each of a first wiring member and a second wiring member, a semiconductor element, and a bonding wire, The semiconductor element has a protective film (45) disposed on one surface thereof and having an opening (451) formed therein; The pad has an exposed surface (441) exposed from the opening, The exposed surface has a connection region (441a) to which a bonding wire is connected and a peripheral region (441b) of the connection region; The peripheral region includes surfaces that are at an angle of 90 degrees or less relative to the surfaces of the connecting region. In one disclosure, the protective film has a convex portion (455) and / or a concave portion (456) between the first main electrode and the pad in a plan view in the plate thickness direction. In another embodiment of the disclosure, the pad includes a base layer (44a), a top layer (44b) disposed over the base layer and providing at least a portion of the exposed surface, and a groove (445) extending through the top layer. In another embodiment of the present disclosure, the pad has a recess (443) disposed within the opening, The bottom surface (443c) of the recess provides a connection region, and the side surface (443b) of the recess and the top surface (443a) connected to the side surface provide a peripheral region.

[0007] In the disclosed semiconductor device, the relative angle between at least a part of the peripheral region and the connection region on the exposed surface of the pad is 90 degrees or less. Therefore, peeling of the sealing body is unlikely to progress between the peripheral region and the connection region on the exposed surface. As a result, a highly reliable semiconductor device can be provided.

[0008] The various aspects disclosed in this specification adopt different technical means to achieve their respective objectives. The claims and the parenthetical symbols described in this section are merely illustrative of the corresponding relationship with the embodiments described below, and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer with reference to the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0009] [Figure 1] 1 is a diagram showing a schematic configuration of a drive system of a vehicle to which a semiconductor device according to a first embodiment is applied; [Diagram 2] 1 is a plan view showing a semiconductor device according to a first embodiment. [Diagram 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. [Figure 4] FIG. 2 is a plan view showing a semiconductor element. [Diagram 5] FIG. 5 is a cross-sectional view taken along line VV in FIG. [Figure 6] FIG. 6 is an enlarged view of region VI in FIG. 5. [Figure 7] FIG. 11 is a cross-sectional view showing a modified example. [Figure 8] FIG. 11 is a cross-sectional view showing a modified example. [Figure 9] 11 is a cross-sectional view showing the periphery of a pad of a semiconductor element in a semiconductor device according to a second embodiment. FIG. [Figure 10] FIG. 10 is an enlarged view of region X in FIG. [Figure 11] FIG. 11 is a cross-sectional view showing a modified example. [Figure 12]13 is a cross-sectional view showing the periphery of a protective film between a source electrode and a pad in a semiconductor device according to a third embodiment. FIG. [Figure 13] FIG. 11 is a cross-sectional view showing a modified example. [Figure 14] 13 is a cross-sectional view showing the periphery of a pad of a semiconductor element in a semiconductor device according to a fourth embodiment. FIG. [Figure 15] FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, several embodiments will be described with reference to the drawings. In addition, by assigning the same reference numerals to corresponding components in each embodiment, duplicated explanations may be omitted. When only a part of the configuration is described in each embodiment, the configuration of the other embodiment described above can be applied to the other parts of the configuration. In addition to the combination of configurations explicitly stated in the description of each embodiment, configurations of several embodiments can be partially combined together even if not explicitly stated, as long as there is no particular problem with the combination.

[0011] The semiconductor device of this embodiment is applied to a power conversion device of a moving body using a rotating electric machine as a drive source, for example. The moving body is, for example, an electric vehicle such as an electric vehicle (EV), a hybrid vehicle (HV), a plug-in hybrid vehicle (PHV), an aircraft such as a drone, a ship, a construction machine, or an agricultural machine. An example of application to a vehicle will be described below.

[0012] (First embodiment) First, a schematic configuration of a drive system of a vehicle will be described with reference to FIG.

[0013] <Vehicle drive system> As shown in FIG. 1, a vehicle drive system 1 includes a DC power supply 2, a motor generator 3, and a power conversion device 4.

[0014] The DC power supply 2 is a DC voltage source composed of a chargeable and dischargeable secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a drive source for the vehicle, that is, an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 performs power conversion between the DC power supply 2 and the motor generator 3.

[0015] <Power conversion device> Next, a circuit configuration of the power conversion device 4 will be described with reference to Fig. 1. The power conversion device 4 includes a power conversion circuit. The power conversion device 4 of this embodiment includes a smoothing capacitor 5 and an inverter 6 which is the power conversion circuit.

[0016] The smoothing capacitor 5 mainly smoothes the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to a P line 7 which is a power supply line on the high potential side and an N line 8 which is a power supply line on the low potential side. The P line 7 is connected to the positive electrode of the DC power supply 2, and the N line 8 is connected to the negative electrode of the DC power supply 2. The positive electrode of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative electrode of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel to the DC power supply 2.

[0017] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts a DC voltage into a three-phase AC voltage in accordance with switching control by a control circuit (not shown) and outputs the voltage to the motor generator 3. This drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 upon receiving rotational force from the wheels into a DC voltage in accordance with switching control by the control circuit and outputs the DC voltage to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power source 2 and the motor generator 3.

[0018] The inverter 6 is configured with upper and lower arm circuits 9 for three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 each have an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side. A connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via an output line 10. The inverter 6 has six arms. Each arm is configured with a switching element. At least a part of each of the P line 7, the N line 8, and the output line 10 is configured with a conductive member such as a bus bar.

[0019] In this embodiment, an n-channel MOSFET 11 is used as a switching element constituting each arm. The number of switching elements constituting each arm is not particularly limited. There may be one or more. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

[0020] As an example, in this embodiment, each arm has one MOSFET 11. In the upper arm 9H, the drain of the MOSFET 11 is connected to the P line 7. In the lower arm 9L, the source of the MOSFET 11 is connected to the N line 8. In the upper and lower arm circuit 9, the source of the MOSFET 11 in the upper arm 9H and the drain of the MOSFET 11 in the lower arm 9L are connected to each other.

[0021] A freewheeling diode 12 is connected in anti-parallel to each of the MOSFETs 11. The diode 12 may be a parasitic diode (body diode) of the MOSFET 11, or may be provided separately from the parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain.

[0022] The power conversion device 4 may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. The converter is provided between the DC power source 2 and the smoothing capacitor 5. The converter is configured to include, for example, a reactor and the above-mentioned upper and lower arm circuits 9. With this configuration, voltage can be increased and decreased. The power conversion device 4 may include a filter capacitor that removes power supply noise from the DC power source 2. The filter capacitor is provided between the DC power source 2 and the converter.

[0023] The power conversion device 4 may include a drive circuit for a switching element constituting the inverter 6 or the like. The drive circuit supplies a drive voltage to the gate of the MOSFET 11 of the corresponding arm based on a drive command from the control circuit. The drive circuit drives the corresponding MOSFET 11, i.e., turns it on and off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0024] The power conversion device 4 may include a control circuit for the switching element. The control circuit generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command based on a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. The various sensors include, for example, a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects a phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as the drive command. The control circuit is configured to include, for example, a processor and a memory. ECU is an abbreviation for Electronic Control Unit. PWM is an abbreviation for Pulse Width Modulation.

[0025] <Semiconductor device> Next, a schematic configuration of a semiconductor device to which a semiconductor element is applied will be described with reference to Fig. 2, Fig. 3, and Fig. 4. Fig. 2 is a plan view showing the semiconductor device. Fig. 2 is a top plan view of the semiconductor device. Fig. 3 is a cross-sectional view taken along line III-III in Fig. 2. Fig. 3 illustrates a simplified structure of the semiconductor element. Fig. 4 is a plan view showing the semiconductor element. Fig. 4 is a plan view seen from one surface side of a semiconductor substrate, i.e., the source electrode side.

[0026] In the following, the thickness direction of the semiconductor substrate is defined as the Z direction. The direction perpendicular to the Z direction is defined as the X direction. The direction perpendicular to both the Z direction and the X direction is defined as the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, is defined as the planar shape. The planar view from the Z direction may also be simply referred to as the planar view.

[0027] 2 and 3, the semiconductor device 20 includes a sealing body 30, a semiconductor element 40, heat sinks 50 and 60, a conductive spacer 70, an external connection terminal 80, and a bonding wire 90. The semiconductor device 20 constitutes one of the above-mentioned arms. In other words, two semiconductor devices 20 constitute an upper and lower arm circuit 9 for one phase. The semiconductor device 20 is sometimes called a power module.

[0028] The sealing body 30 is formed using an electrically insulating material and seals a part of the other elements constituting the semiconductor device 20. The remaining parts of the other elements are exposed to the outside of the sealing body 30. The sealing body 30 is made of, for example, a resin. An example of the resin is an epoxy resin. The sealing body 30 is made of a resin and molded by, for example, a transfer molding method. Such a sealing body 30 may be called a sealing resin body, a molded resin, or a resin molded body. The sealing body 30 may be formed using, for example, a gel. The gel is filled (placed) in, for example, the opposing regions of the pair of heat sinks 50 and 60.

[0029] As shown in FIG. 2, the sealing body 30 has a generally rectangular shape in plan view. The sealing body 30 has one surface 30a and a back surface 30b, which is the surface opposite to the one surface 30a in the Z direction, as surfaces forming an outer shell. The one surface 30a and the back surface 30b are, for example, flat surfaces. The sealing body 30 also has side surfaces 30c and 30d, which are surfaces connecting the one surface 30a and the back surface 30b. The side surface 30c is the surface from which the main terminals 81 and 82 of the external connection terminal 80 protrude. The side surface 30d is the surface opposite to the side surface 30c in the Y direction. The side surface 30d is the surface from which the signal terminal 83 protrudes.

[0030] The semiconductor element 40 has a semiconductor substrate 41, a source electrode 42, a drain electrode 43, and a pad 44. The semiconductor element 40 may be called a power element, a semiconductor chip, or the like. The semiconductor substrate 41 is made of a vertical element formed from materials such as silicon (Si) and a wide band gap semiconductor having a wider band gap than silicon. Examples of wide band gap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond.

[0031] The vertical element is configured to pass a main current in the thickness direction of the semiconductor substrate 41 (semiconductor element 40), i.e., in the Z direction. The vertical element is a heat generating element that generates heat when current is applied. The semiconductor substrate 41 of this embodiment is made of SiC, and has a MOSFET 11 formed thereon that constitutes one arm. A gate electrode (not shown) is formed on the semiconductor substrate 41. The gate electrode has, for example, a trench structure.

[0032] The semiconductor substrate 41 has a generally rectangular shape in plan view. The semiconductor substrate 41 has one surface 41a and a back surface 41b as plate surfaces on which main electrodes are provided. The one surface 41a is the surface of the semiconductor substrate 41 on the side of the one surface 30a of the sealing body 30. The back surface 41b is the surface opposite to the one surface 41a in the plate thickness direction. A source electrode 42, which is one of the main electrodes, is disposed on the one surface 41a of the semiconductor substrate 41. A drain electrode 43, which is the other of the main electrodes, is disposed on the back surface 41b of the semiconductor substrate 41. The source electrode 42 corresponds to a first main electrode, and the drain electrode 43 corresponds to a second main electrode.

[0033] When the MOSFET 11 is turned on, a current (main current) flows between the main electrodes, that is, between the source electrode 42 and the drain electrode 43. The drain electrode 43 is formed on almost the entire back surface 41b of the semiconductor substrate 41. The source electrode 42 is formed on a part of one surface 41a of the semiconductor substrate 41.

[0034] The pad 44 is an electrode for signals. The pad 44 is formed on one surface 41a of the semiconductor substrate 41 at a position different from the formation region of the source electrode 42. The pad 44 is electrically separated from the source electrode 42. As shown in FIG. 4, the pad 44 is formed at an end opposite to the formation region of the source electrode 42 in the Y direction. The pad 44 is provided side by side with the source electrode 42 in the Y direction. The number of pads 44 is not particularly limited. The pads 44 include at least a pad for a gate electrode. The semiconductor element 40 of this embodiment has five pads 44. The five pads 44 are lined up in the X direction.

[0035] The heat sinks 50, 60 are metal plates made of a metal with good electrical conductivity, such as Cu or a Cu alloy. The heat sinks 50, 60 are arranged in the Z direction to sandwich a plurality of semiconductor elements 40. The heat sinks 50, 60 are arranged such that at least a portion of each of them faces each other in the Z direction. The heat sinks 50, 60 contain the semiconductor elements 40 in a plan view.

[0036] The heat sink 50 is electrically connected to the source electrode 42 and provides a wiring function. Similarly, the heat sink 60 is electrically connected to the drain electrode 43 and provides a wiring function. The heat sinks 50, 60 provide a heat dissipation function for dissipating heat generated by the semiconductor element 40. The heat sinks 50, 60 may have a plating film of Ni, Au, or the like on the surface. The heat sink 50 of this embodiment is electrically connected to the source electrode 42 via a conductive spacer 70. The heat sink 50 and the conductive spacer 70 correspond to a first wiring member. The heat sink 60 corresponds to a second wiring member.

[0037] The heat sink 50 has an opposing surface 50a, which is the surface on the semiconductor element 40 side, and a back surface 50b, which is the surface opposite to the opposing surface 50a in the Z direction. Similarly, the heat sink 60 also has an opposing surface 60a and a back surface 60b. The heat sinks 50 and 60 are substantially rectangular in plan view. The back surfaces 50b and 60b of the heat sinks 50 and 60 are exposed from the sealing body 30. The back surfaces 50b and 60b may be referred to as heat dissipation surfaces, exposed surfaces, etc. The back surface 50b of the heat sink 50 is substantially flush with one surface 30a of the sealing body 30. The back surface 60b of the heat sink 60 is substantially flush with the back surface 30b of the sealing body 30.

[0038] The conductive spacer 70 is interposed between the semiconductor element 40 and the heat sink 50. The conductive spacer 70 provides a spacer function that ensures a predetermined distance between the semiconductor element 40 and the heat sink 50. For example, the conductive spacer 70 ensures a height for electrically connecting the corresponding signal terminal 83 to the pad 44 of the semiconductor element 40. The conductive spacer 70 is located midway along the electrical conduction and thermal conduction paths between the source electrode 42 of the semiconductor element 40 and the heat sink 50, and provides a wiring function and a heat dissipation function.

[0039] The conductive spacer 70 includes a metal material having good electrical conductivity and thermal conductivity, such as Cu. The conductive spacer 70 may have a plating film on its surface. The conductive spacer 70 may be called a terminal, a terminal block, a metal block, or the like. The semiconductor device 20 includes the same number of conductive spacers 70 as the semiconductor elements 40. The conductive spacers 70 are individually connected to the semiconductor elements 40. The conductive spacer 70 is, for example, a columnar body having a substantially rectangular shape in plan view. The conductive spacer 70 has a size that is approximately the same as or slightly smaller than the junction area of ​​the source electrode 42 in plan view.

[0040] The external connection terminals 80 are terminals for electrically connecting the semiconductor device 20 to an external device. The external connection terminals 80 are formed using a metal material with good conductivity, such as copper. The external connection terminals 80 are, for example, a plate material. The external connection terminals 80 are sometimes called leads. The external connection terminals 80 include main terminals 81 and 82 and a signal terminal 83. The main terminals 81 and 82 are external connection terminals 80 electrically connected to main electrodes of the semiconductor element 40.

[0041] The main terminal 81 is electrically connected to the source electrode 42. The main terminal 81 may be referred to as a source terminal. The main terminal 81 is connected to the source electrode 42 via the heat sink 50. The main terminal 81 is connected to one end of the heat sink 50 in the Y direction. The thickness of the main terminal 81 is thinner than that of the heat sink 50. The main terminal 81 is connected to the heat sink 50 so as to be approximately flush with the opposing surface 50a, for example. The main terminal 81 may be connected by being provided integrally with the heat sink 50, or may be provided as a separate member and connected by joining.

[0042] The main terminal 81 in this embodiment is provided integrally with the heat sink 50 as a part of the lead frame. The main terminal 81 extends in the Y direction from the heat sink 50 and protrudes to the outside from the side surface 30c of the sealing body 30. The main terminal 81 has a bent portion midway through the portion covered by the sealing body 30, and protrudes from near the center in the Z direction on the side surface 30c.

[0043] The main terminal 82 is electrically connected to the drain electrode 43. The main terminal 82 may be referred to as a drain terminal. The main terminal 82 is connected to the drain electrode 43 via the heat sink 60. The main terminal 82 is connected to one end of the heat sink 60 in the Y direction. The thickness of the main terminal 82 is thinner than that of the heat sink 60. The main terminal 82 is connected to the heat sink 60 so as to be approximately flush with the opposing surface 60a, for example. The main terminal 82 may be connected by being provided integrally with the heat sink 60, or may be provided as a separate member and connected by joining.

[0044] The main terminal 82 in this embodiment is provided integrally with the heat sink 60 as a part of a lead frame separate from the main terminal 81. The main terminal 82 extends in the Y direction from the heat sink 60 and protrudes to the outside from the same side surface 30c as the main terminal 81. The main terminal 82 also has a bent portion midway through the portion covered by the sealing body 30, and protrudes from near the center in the Z direction on the side surface 30c. The two main terminals 81, 82 are arranged side by side in the X direction with their side surfaces facing each other.

[0045] The signal terminals 83 are electrically connected to the pads 44 of the semiconductor element 40 via bonding wires 90. The signal terminals 83 extend in the Y direction and include a plurality of signal terminals 83 attached to the sealing body 30. The signal terminals 83 are formed on a lead frame common to the heat sink 60 and the main terminals 82, for example. The plurality of signal terminals 83 are electrically isolated from one another by cutting tie bars (not shown).

[0046] The source electrode 42 of the semiconductor element 40 is bonded to the conductive spacer 70 via a bonding material 91. The conductive spacer 70 is bonded to the heat sink 50 via a bonding material 92. The drain electrode 43 of the semiconductor element 40 is bonded to the heat sink 60 via a bonding material 93. The bonding materials 91, 92, and 93 are conductive bonding materials. For example, solder can be used as the bonding materials 91, 92, and 93. An example of the solder is a multi-element lead-free solder containing Cu, Ni, and the like in addition to Sn. Instead of solder, a sinter-based bonding material such as sintered silver may be used. The bonding materials 91, 92, and 93 may be made of a common material, or at least one of them may be made of a material different from the others. In this embodiment, solder is used as the bonding materials 91, 92, and 93.

[0047] As described above, in the semiconductor device 20, the semiconductor element 40 constituting one arm is encapsulated by the encapsulant 30. The encapsulant 30 integrally encapsulates the semiconductor element 40, a portion of the heat sink 50, a portion of the heat sink 60, the conductive spacer 70, portions of the external connection terminals 80, and the bonding wires 90.

[0048] In the Z direction, the semiconductor element 40 is disposed between the heat sinks 50 and 60. The semiconductor element 40 is sandwiched between the heat sinks 50 and 60 disposed opposite each other. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the heat sink 50 is substantially flush with one surface 30a of the sealing body 30. The back surface 60b of the heat sink 60 is substantially flush with the back surface 30b of the sealing body 30. Since the back surfaces 50b and 60b are exposed surfaces, heat dissipation can be improved.

[0049] <Pad> Next, the pad 44 of the semiconductor element 40 will be described with reference to FIG. 4, FIG. 5, and FIG. 6. FIG. 5 is a cross-sectional view taken along line VV in FIG. 4. For convenience, FIG. 5 omits the illustration of the drain electrode 43. FIG. 6 shows the convex shape of the pad 44. FIG. 6 is an enlarged view of an area VI shown by a dashed line in FIG. 5. FIG. 6 also shows the encapsulant 30 and the bonding wire 90. For clarity, FIG. 6 intentionally omits the hatching of the encapsulant 30 and the pad 44.

[0050] As shown in FIGS. 4 and 5, the semiconductor element 40 has a protective film 45 disposed on one surface 41a of a semiconductor substrate 41. The protective film 45 is an insulating film. For example, polyimide, silicon nitride film, or the like can be used as the material of the protective film 45. The protective film 45 has an opening 451. The opening 451 is provided individually for each pad 44. The opening 451 is provided so as to overlap with the corresponding pad 44 in a plan view. The pads 44 each have an exposed surface 441 exposed from the opening 451.

[0051] Protective film 45 has an opening 452. Opening 452 is provided so as to overlap source electrode 42. Source electrode 42 has exposed surface 421 exposed from opening 452. Opening 451 may be referred to as a first opening, and opening 452 may be referred to as a second opening.

[0052] The exposed surface 441 has a connection region 441a and a peripheral region 441b. The connection region 441a is a region of the exposed surface 441 to which the bonding wire 90 is connected. The peripheral region 441b is a region of the exposed surface 441 that is located around the connection region 441a. As an example, the peripheral region 441b surrounds the connection region 441a.

[0053] The pad 44 in this embodiment has a convex portion 442 that protrudes from an opening periphery 453 of the protective film 45. The opening periphery 453 is a peripheral portion of the opening 451 on the upper surface of the protective film 45. The opening periphery 453 corresponds to the periphery of the opening. The convex portion 442 protrudes upward in the Z direction beyond the opening periphery 453 (upper surface) of the protective film 45.

[0054] The pad 44 has a multi-layer structure. The pad 44 has an underlayer 44a and an upper layer 44b. The underlayer 44a is formed using a material mainly composed of aluminum (Al), for example. In this embodiment, the material is an Al alloy such as AlSi or AlSiCu. The underlayer 44a in this embodiment has a first layer 44a1 and a second layer 44a2.

[0055] The first layer 44a1 is disposed on one surface 41a of the semiconductor substrate 41 via an interlayer insulating film 46. The first layer 44a1 is provided directly below and around the opening 451 in a plan view. The surrounding portion of the first layer 44a1 is covered with a protective film 45. The second layer 44a2 is disposed on a portion of the first layer 44a1 exposed from the opening 451. The second layer 44a2 is disposed within the opening 451. The second layer 44a2 of this embodiment is disposed so as to substantially coincide with the opening 451. The lower end of the second layer 44a2 substantially coincides with the lower end of the opening 451, and the upper end of the second layer 44a2 substantially coincides with the upper end of the opening 451. The second layer 44a2 fills the opening 451 with almost no gaps. The first layer 44a1 and the second layer 44a2 are formed using a common material (Al alloy).

[0056] The upper layer 44b is disposed on the underlayer 44a. The upper layer 44b may be referred to as a connection layer. The upper layer 44b includes at least one metal layer. The metal layer constituting the upper layer 44b includes, for example, any one of nickel (Ni), palladium (Pd), gold (Au), platinum (Pt), and silver (Ag). The upper layer 44b of this embodiment includes at least a Ni layer. Ni is harder than the Al alloy constituting the underlayer 44a. The upper layer 44b may further include an Au layer on the Ni layer.

[0057] The upper base layer 44b of this embodiment is a columnar body extending in the Z direction and substantially coincides with the upper end of the base layer 44a in a plan view. The upper base layer 44b is provided so as to substantially coincide with the opening end of the upper surface of the protective film 45 in a plan view. The lower end of the upper base layer 44b substantially coincides with the opening periphery 453 of the protective film 45 in the Z direction. The upper base layer 44b constitutes the protrusion 442 of the pad 44.

[0058] The surface of the protrusion 442 forms the exposed surface 441 of the pad 44. The protrusion 442 has an upper surface 442a and a side surface 442b. The upper surface 442a is a protruding tip surface. The upper surface 442a provides a connection region 441a. Furthermore, the side surface 442b provides a peripheral region 441b.

[0059] In this embodiment, almost the entire area of ​​the top surface 442a that provides the connection region 441a is a surface that is approximately parallel to the XY plane. The top surface 442a is an approximately flat surface. The top surface 442a has a planar, approximately rectangular shape with the Y direction as the longitudinal direction. Furthermore, almost the entire area of ​​the side surface 442b that provides the peripheral region 441b is a surface that is approximately parallel to the Z direction. As a result, the relative angle θa between the top surface 442a and the side surface 442b, that is, the relative angle between the connection region 441a and the peripheral region 441b, is 90 degrees. The relative angle θa between the top surface 442a and the side surface 442b is the angle between the top surface 442a and the side surface 442b.

[0060] Furthermore, in this embodiment, the opening periphery 453 of the protective film 45 is approximately parallel to the XY plane, so that the relative angle θb between the side surface 442b and the opening periphery 453 of the protective film 45 is 90 degrees.

[0061] Like the pad 44, the source electrode 42 also has a multi-layer structure. However, the base layer has only a first layer, and an upper layer is laminated on the first layer. The base layer is connected to the semiconductor substrate 41 via a contact hole (not shown) in the interlayer insulating film 46. The upper layer is disposed in the opening 452.

[0062] The pad 44 having the above-described structure can be formed, for example, by the method described below. First, the first layer 44a1 is formed on the interlayer insulating film 46 by, for example, sputtering. Next, the protective film 45 is formed so as to cover the first layer 44a1 by, for example, spin coating. Then, the protective film 45 is patterned by etching using a photoresist as a mask, and the openings 451 and 452 are formed.

[0063] Next, the second layer 44a2 is formed by, for example, a sputtering method. At this time, the second layer 44a2 is formed so as to fill the opening 451. Then, the second layer 44a2 is patterned by performing etching using a photoresist as a mask, so that the second layer 44a2 remains only in the opening 452. Next, the upper layer 44b is formed on the second layer 44a2 by a plating method. In this manner, the pad 44 having the protrusion 442 can be formed.

[0064] <Summary of the First Embodiment> The semiconductor element 40 generates heat because a large current flows through it. The semiconductor element 40 (MOSFET 11) is repeatedly turned on and off, causing the semiconductor device 20 to alternate between an overheated state and a cooled state. This causes thermal stress to act on the components of the semiconductor device 20 due to differences in linear expansion coefficients.

[0065] In this embodiment, the relative angle between at least a part of the surface of the peripheral region 441b and the surface of the connection region 441a is 90 degrees on the exposed surface 441 of the pad 44. Therefore, on the exposed surface 441, peeling of the sealing body 30 is unlikely to progress between the peripheral region 441b and the connection region 441a.

[0066] For example, even if the sealing body 30 peels off from the surface of the peripheral region 441b, the peeling is unlikely to progress to the surface of the connection region 441a. This makes it possible to suppress the occurrence of electrical connection failures such as cracks and disconnections caused by stress acting on the connection (joint) between the bonding wire 90 and the pad 44. Furthermore, even if a crack occurs in the connection between the bonding wire 90 and the pad 44 due to thermal stress, peeling of the sealing body 30 from the surface of the connection region 441a is unlikely to progress from the crack to the surface of the peripheral region 441b. As a result, a highly reliable semiconductor device 20 can be provided.

[0067] In this embodiment, the pad 44 has a protruding portion 442 protruding from the opening periphery 453 of the protective film 45. In the protruding portion 442, an angle θa between an upper surface 442a providing the connection region 441a and a side surface 442b providing the peripheral region 441b is set to 90 degrees. For example, as shown in FIG. 6, even if the peeling of the sealing body 30 from the side surface 442b progresses in the Z1 direction, the peeling can be suppressed from progressing toward the upper surface 442a. Also, even if the peeling of the sealing body 30 from the upper surface 442a progresses in the Y1 direction shown in FIG. 6, the peeling can be suppressed from progressing toward the side surface 442b.

[0068] In this embodiment, the angle θb between the side surface 442b of the protrusion 442 and the opening periphery 453 of the protective film 45 is set to 90 degrees. For example, as shown in Fig. 6, even if the peeling of the sealant 30 from the protective film 45 progresses in the Y2 direction, the peeling can be prevented from progressing toward the side surface 442b. Also, even if the peeling of the sealant 30 from the side surface 442b progresses in the Z2 direction shown in Fig. 6, the peeling can be prevented from progressing toward the opening periphery 453 of the protective film 45, i.e., toward the upper surface of the protective film 45.

[0069] In the configuration having the convex portion 442, when the peeling progresses in the Y2 direction, it reaches the convex portion 442. If the angle θb is an obtuse angle, that is, greater than 90 degrees, there is a risk that the peeling will progress to the interface with the side surface 442b due to the Y direction component. In this embodiment, since the angle θb is 90 degrees, the progress of the peeling can be effectively suppressed. This makes it possible to effectively suppress the progress of the peeling that occurs at the interface between the sealing body 30 and the protective film 45, for example, from progressing to the connection (joint) between the bonding wire 90 and the pad 44. In other words, it is possible to suppress the occurrence of cracks, breaks, etc. at the connection between the bonding wire 90 and the pad 44 due to the progress of the peeling. The synergistic effect of the part that forms the angle θa and the part that forms the angle θb makes it possible to effectively suppress the progress of the peeling.

[0070] <Modification> Although an example in which the convex portion 442 is composed only of the upper layer 44b has been shown, the present invention is not limited thereto. For example, as shown in FIG. 7, the convex portion 442 may be composed of the base layer 44a and the upper layer 44b. In FIG. 7, the second layer 44a2 fills the opening 451 of the protective film 45 and is disposed above the opening periphery 453. Almost the entire area of ​​the side surface 442b is approximately parallel to the Z direction. Such a convex portion 442 may be formed by forming the second layer 44a2 above the upper end of the opening 451 and patterning it. FIG. 7 is a cross-sectional view corresponding to FIG. 5.

[0071] Although an example in which the relative angle between at least a portion of the surface of the peripheral region 441b and the surface of the connection region 441a is 90 degrees has been shown, the present invention is not limited to this. The relative angle between at least a portion of the surface of the peripheral region 441b and the surface of the connection region 441a may be an angle smaller than 90 degrees. In other words, the angle θa may be an acute angle. By making the angle acute, the progress of peeling can be more effectively suppressed.

[0072] The angle θb is not limited to 90 degrees. As shown in FIG. 8, the angle between the side surface 442b and the opening periphery 453, i.e., the above-mentioned angle θb, may be an acute angle. FIG. 8 is a cross-sectional view corresponding to FIG. 5. In FIG. 8, the convex portion 442 is formed of the underlayer 44a and the upper layer 44b, as in FIG. 7. When the second layer 44a2 is patterned, the side surface is etched to have a tapered surface, so that the angle θb between the opening periphery 453 and a predetermined range from the lower end of the convex portion 442 on the side surface 442b is set to be smaller than 90 degrees.

[0073] A groove may be provided on the side surface 442b of the protrusion 442. This can improve the adhesion of the plug 30 to the side surface 442b. In other words, the progression of peeling through the side surface 442b can be suppressed.

[0074] Second embodiment This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used in this embodiment. In the preceding embodiment, the pad 44 is provided with the convex portion 442. Instead of this, the pad 44 may be provided with a concave portion.

[0075] FIG. 9 is a cross-sectional view showing the periphery of the pad of the semiconductor element 40 in the semiconductor device 20 according to this embodiment. FIG. 9 corresponds to FIG. 5. For convenience, the drain electrode 43 is omitted from FIG. 9. FIG. 10 shows the shape of the recess of the pad 44. FIG. 10 is an enlarged view of the region X shown by the dashed line in FIG. 9. FIG. 10 also shows the sealing body 30 and the bonding wire 90. For clarity, hatching of the sealing body 30 and the pad 44 is intentionally omitted from FIG. 10.

[0076] 9 and 10, in this embodiment, the pad 44 has a recess 443. The recess 443 is provided in an opening 451 of the protective film 45. The pad 44 is configured to include a base layer 44a and an upper layer 44b, as in the previous embodiment. The second layer 44a2 is disposed in the opening 451. The lower end of the second layer 44a2 approximately coincides with the lower end of the opening 451, and the upper end of the second layer 44a2 approximately coincides with the upper end of the opening 451.

[0077] The second layer 44a2 has a groove 444 that opens to the upper end (upper surface). The groove 444 has a depth that does not reach the lower end of the second layer 44a2. The overlying layer 44b is disposed in the groove 444. The overlying layer 44b fills the groove 444 to a position lower than the upper surface of the second layer 44a2.

[0078] The pad 44 has a top surface 443a, a side surface 443b, and a bottom surface 443c as wall surfaces that define the recess 443. The top surface 443a is the top end (top surface) of the second layer 44a2. The side surface 443b is a surface in the second layer 44a2 that defines a part of the side surface of the groove 444. The bottom surface 443c is the top surface of the upper layer 44b. The bottom surface 443c provides a connection region 441a of the exposed surface 441. The top surface 443a and the side surface 443b provide a peripheral region 441b.

[0079] In this embodiment, almost the entire area of ​​the bottom surface 443c that provides the connection region 441a is approximately parallel to the XY plane. The bottom surface 443c is an approximately flat surface. The bottom surface 443c has a planar, approximately rectangular shape with the Y direction as the longitudinal direction, for example. Furthermore, almost the entire area of ​​the side surface 443b that provides the peripheral region 441b is approximately parallel to the Z direction. As a result, the relative angle θc between the bottom surface 443c and the side surface 443b, that is, the relative angle between the connection region 441a and the peripheral region 441b, is 90 degrees. The relative angle θc between the bottom surface 443c and the side surface 443b is the angle between the bottom surface 443c and the side surface 443b.

[0080] Furthermore, in this embodiment, the upper surface 443a is approximately parallel to the XY plane. The upper surface 443a is approximately flush and continues to the opening periphery 453. As a result, the relative angle θd between the side surface 443b and the upper surface 443a, and therefore the opening periphery 453, is 90 degrees. The other configurations are similar to those described in the preceding embodiment.

[0081] The pad 44 having the above-described structure can be formed, for example, by the method described below. First, the first layer 44a1 is formed on the interlayer insulating film 46 by, for example, sputtering. Next, the protective film 45 is formed so as to cover the first layer 44a1 by, for example, spin coating. Then, the protective film 45 is patterned by etching using a photoresist as a mask, and the openings 451 and 452 are formed.

[0082] Next, the second layer 44a2 is formed by, for example, a sputtering method. At this time, the second layer 44a2 is formed so as to fill the opening 451. Then, the second layer 44a2 is patterned by etching using a photoresist as a mask. As a result, the second layer 44a2 is left only in the opening 452, and the groove 444 is formed in the second layer 44a2. Next, the upper layer 44b is formed in the groove 444 of the second layer 44a2 by a plating method. In this manner, the pad 44 having the recess 443 can be formed.

[0083] <Summary of the second embodiment> In the present embodiment, the relative angle between at least a part of the surface of the peripheral region 441b and the surface of the connection region 441a is 90 degrees on the exposed surface 441 of the pad 44. Therefore, peeling of the sealing body 30 is unlikely to progress between the peripheral region 441b and the connection region 441a on the exposed surface 441. As a result, a highly reliable semiconductor device 20 can be provided.

[0084] In this embodiment, the pad 44 has a recess 443 provided in the opening 451 of the protective film 45. The angle θc between the bottom surface 443c providing the connection region 441a and the side surface 443b providing the peripheral region 441b is set to 90 degrees. For example, as shown in FIG. 10, even if the peeling of the sealing body 30 from the side surface 443b progresses in the Z3 direction, the peeling can be suppressed from progressing toward the bottom surface 443c. Also, even if the peeling of the sealing body 30 from the bottom surface 443c progresses in the Y3 direction shown in FIG. 10, the peeling can be suppressed from progressing toward the side surface 443b.

[0085] In this embodiment, the angle θd between the side surface 443b and the upper surface 443a, that is, the angle between the side surface 443b and the opening periphery 453, is set to 90 degrees. For example, as shown in Fig. 10, even if the peeling of the sealant 30 from the protective film 45 progresses in the Y4 direction, the peeling can be prevented from progressing toward the side surface 443b. Also, even if the peeling of the sealant 30 from the side surface 443b progresses in the Z4 direction shown in Fig. 10, the peeling can be prevented from progressing toward the opening periphery 453 of the protective film 45, that is, toward the upper surface of the protective film 45.

[0086] In the configuration having the recess 443, when the peeling progresses in the Y3 direction, it reaches the side surface 443b. If the angle θc is an obtuse angle, that is, greater than 90 degrees, there is a risk that the peeling will progress to the interface with the side surface 443b due to the Y direction component. In this embodiment, since the angle θc is 90 degrees, the progress of the peeling can be effectively suppressed. This makes it possible to effectively suppress the peeling that starts from a crack in the connection (joint) between the bonding wire 90 and the pad 44 from progressing to the periphery of the pad 44. For example, it is possible to suppress the peeling from progressing toward the source electrode 42, which would cause a decrease in the connection reliability of the source electrode 42. It is also possible to suppress the peeling from progressing to the outer peripheral end of the semiconductor element 40, which would cause a short circuit between the source electrode 42 and the drain electrode 43, which would cause a decrease in insulation reliability. The synergistic effect of the part that forms the angle θc and the part that forms the angle θd makes it possible to effectively suppress the progress of the peeling.

[0087] <Modification> Although an example in which the relative angle between at least a part of the surface of the peripheral region 441b and the surface of the connection region 441a is 90 degrees has been shown, the present invention is not limited to this. The relative angle between at least a part of the surface of the peripheral region 441b and the surface of the connection region 441a may be an angle smaller than 90 degrees. In the example shown in FIG. 11, the angle between the bottom surface 443c and the side surface 443b, that is, the above-mentioned angle θc, is an acute angle. Such a structure can be obtained by etching the groove 444 to have a reverse taper when patterning the second layer 44a2. By making the angle θc an acute angle, the progress of peeling can be more effectively suppressed. FIG. 11 is a cross-sectional view corresponding to FIG. 9.

[0088] The angle θd is not limited to 90 degrees, but may be an angle smaller than 90 degrees, that is, an acute angle, as shown in FIG.

[0089] Third embodiment This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used. In the preceding embodiment, the pad 44 is provided with the convex portion 442 or the concave portion 443. Instead of this, the protective film 45 may be provided with the convex portion and / or the concave portion.

[0090] 12 is a cross-sectional view showing the periphery of the protective film between the source electrode 42 and the pad 44 in the semiconductor device 20 according to this embodiment. In FIG. 12, the semiconductor substrate 41 and the like are omitted.

[0091] As described above, the source electrode 42 has a multi-layer structure. The source electrode 42 has an underlayer 42a and an upper layer 42b. The underlayer 42a is made of the same material as the underlayer 44a, for example, an Al alloy.

[0092] The upper base layer 42b is disposed on the base layer 42a exposed from the opening 452. The upper base layer 42b is disposed within the opening 452. The upper surface of the upper base layer 42b is located lower than the opening periphery 454 of the protective film 45. The opening periphery 454 is the peripheral portion of the upper surface of the protective film 45 around the opening 452.

[0093] The upper layer 42b has the same structure as the upper layer 44b. The upper layer 42b includes at least a Ni layer. Ni is harder than the Al alloy constituting the base layer 42a. The upper layer 42b may further include an Au layer on the Ni layer. The Au layer, for example, suppresses oxidation of the Ni layer and improves wettability with the solder. Au diffuses into the solder during soldering. When the bonding material 91 is solder, the Au layer exists before soldering and does not exist after soldering.

[0094] The source electrode 42 may be electrically connected to one of the pads 44. The pad 44 shown in FIG. 12 is a pad for a Kelvin source that detects the source potential of the MOSFET 11 formed on the semiconductor substrate 41. The underlayer 42a of the source electrode 42 and a first layer 44a1 of the pad 44 for the Kelvin source are electrically connected. The first layers 44a1 of the other pads 44 are electrically isolated from the underlayer 42a of the source electrode 42.

[0095] The protective film 45 includes a protective film 45a. The protective film 45a is a portion of the protective film 45 that is disposed between the source electrode 42 and the pad 44 in a plan view. The protective film 45a has a protrusion 455 and a recess 456. The protrusion 455 is continuous with the opening periphery 454. The protrusion 455 protrudes upward from the opening periphery 454 in the Z direction. The recess 456 is continuous with the opening periphery 453. The recess 456 is recessed with respect to the opening periphery 453 in the Z direction. The other configurations are the same as those of the semiconductor device 20 described in the preceding embodiment. The pad 44 is the same as that described in the first embodiment (see FIG. 5).

[0096] <Summary of the third embodiment> In recent years, the element area has been expanded to accommodate larger currents, and the distance between the source electrode 42 and the pad 44 has been shortened. In other words, peeling that occurs on the source electrode 42 side is more likely to reach the pad 44. As shown in FIG. 12, in a configuration in which a triple point TP of the sealing body 30, the source electrode 42 (upper layer 42b), and the bonding material 91 is formed, thermal stress is likely to concentrate at the triple point TP. For example, peeling of the sealing body 30 occurs starting from the triple point TP and progresses toward the pad 44. When peeling reaches the pad 44, there is a risk that a crack will occur in the connection (joint) between the bonding wire 90 and the pad 44, or that the bonding wire 90 will be broken. In other words, the connection reliability will decrease at the connection between the bonding wire 90 and the pad 44.

[0097] Furthermore, when peeling progresses from a crack generated at the connection between the bonding wire 90 and the pad 44 due to thermal stress and reaches the source electrode 42, the thermal stress tends to concentrate on the bonding material 91 and the source electrode 42. In other words, the connection reliability at the connection portion of the source electrode 42 decreases.

[0098] In this embodiment, the protective film 45a has a convex portion 455 and a concave portion 456. The wall surface defining the convex portion 455 has an orthogonal component with respect to the direction of peeling of the sealing body 30 with respect to the upper surface of the protective film 45. As a result, peeling of the sealing body 30 is unlikely to progress between a portion closer to the source electrode 42 than the convex portion 455 and a portion closer to the pad 44 than the convex portion 455. Similarly, the wall surface defining the concave portion 456 has an orthogonal component with respect to the direction of peeling of the sealing body 30 with respect to the upper surface of the protective film 45. As a result, peeling of the sealing body 30 is unlikely to progress between a portion closer to the source electrode 42 than the concave portion 456 and a portion closer to the pad 44 than the concave portion 456. As a result, it is possible to suppress the peeling of the sealing body 30 from progressing between the source electrode 42 and the pad 44. Therefore, in combination with the effects described in the preceding embodiment, it is possible to more effectively suppress the deterioration of the connection reliability.

[0099] Furthermore, by providing the protrusions 455 and the recesses 456 in the protective film 45, the contact area between the sealing body 30 and the protective film 45 increases, and an anchor effect can be expected. That is, the adhesion of the sealing body 30 to the protective film 45 can be improved. This can also suppress the progression of peeling.

[0100] <Modification> Although an example has been shown in which protective film 45a has protrusions 455 and recesses 456, the present invention is not limited thereto. Protective film 45a may have only protrusions 455 or only recesses 456. Recesses 456 may be provided on the source electrode 42 side, and protrusions 455 may be provided on the pad 44 side.

[0101] Although an example in which the protrusions 455 and / or the recesses 456 are provided in the protective film 45a has been shown, the present invention is not limited to this. The protrusions 455 and / or the recesses 456 may be provided in a portion other than the protective film 45a around the pad 44. For example, as shown in FIG. 13, the protrusions 455 and the recesses 456 may be provided on both sides in the Y direction. FIG. 13 is a cross-sectional view corresponding to FIG. 5.

[0102] The convex portion 455 and the concave portion 456 are provided not only in the protective film 45a between the source electrode 42 and the pad 44 but also in the protective film 45b between the pad 44 and the end of the semiconductor element 40. In addition to the above-mentioned effects, this can prevent peeling from a crack occurring at the connection between the bonding wire 90 and the pad 44, which may cause peeling to reach the end of the semiconductor element 40, thereby preventing insulation reliability from decreasing. In FIG. 13, the convex portion 455 and the concave portion 456 are provided in each of the protective films 45a and 45b, but it goes without saying that only one of the convex portion 455 and the concave portion 456 may be provided.

[0103] The configuration described in this embodiment can be combined with any of the configurations described in the first embodiment, the configurations described in the second embodiment, and various modified examples. For example, although an example in which the pad 44 has a convex portion 442 is shown in FIG. 12, it can also be combined with a configuration having a concave portion 443.

[0104] (Fourth embodiment) This embodiment is a modified example based on the previous embodiment, and the description of the previous embodiment can be used. In the previous embodiment, the boundary between the solder and the protective film, i.e., the opening end of the protective film, is provided at a position overlapping the active area. Alternatively, the opening end of the protective film may be provided outside the active area.

[0105] Fig. 14 is a cross-sectional view showing the periphery of the pads of the semiconductor element 40 in the semiconductor device 20 according to this embodiment. Fig. 14 corresponds to Fig. 6. However, in Fig. 14, the sealing body 30 and the pads 44 are also hatched. Fig. 15 is a plan view showing the pads 44.

[0106] The pad 44 has a protrusion 442, similar to the configuration described in the first embodiment (see FIG. 5). As shown in FIGS. 14 and 15, the pad 44 has a groove 445 that penetrates the upper layer 44b and has a bottom in the lower layer 44a. The groove 445 is provided in a ring shape in a plan view so as to surround the bonded portion of the pad 44 with the bonding wire. The other configurations are similar to those of the semiconductor device 20 described in the preceding embodiment.

[0107] <Summary of the Fourth Embodiment> In this embodiment, the pad 44 has a groove 445 penetrating the upper layer 44b. The wall surface defining the groove 445 has a component perpendicular to the direction in which the peeling of the encapsulant 30 progresses relative to the upper surface 442a of the protrusion 442. This makes it difficult for the peeling of the encapsulant 30 to progress. Therefore, in combination with the effects described in the preceding embodiment, the reliability of the semiconductor device 20 can be further improved.

[0108] Furthermore, by providing the grooves 445, the contact area between the plug 30 and the pad 44 increases, and an anchor effect can be expected. That is, the adhesion of the plug 30 to the pad 44 can be improved. This also makes it possible to suppress the progression of peeling.

[0109] <Modification> There may be multiple grooves 445. In addition, some of the multiple grooves 445 may be located directly below the bonded portion of the pad 44 with the bonding wire 90 in plan view.

[0110] The configuration described in this embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, and various modified examples. For example, in the configuration having the recess 443, a groove 445 may be provided in the upper layer 44b.

[0111] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure includes the exemplified embodiments and modifications by those skilled in the art based thereon. For example, the disclosure is not limited to the combination of parts and / or elements shown in the embodiments. The disclosure can be implemented by various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure includes the omission of parts and / or elements of the embodiments. The disclosure includes the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are indicated by the description of the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the description of the claims.

[0112] The disclosure in the specification and drawings is not limited by the claims. The disclosure in the specification and drawings includes the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification and drawings without being bound by the claims.

[0113] When an element or layer is referred to as being "on," "coupled," "connected," or "bonded," it may be directly coupled, connected, or bonded to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly bonded" to another element or layer, there are no intervening elements or layers. Other words used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0114] Spatially relative terms such as "inside," "outside," "back," "bottom," "low," "top," "top," and the like are utilized herein to facilitate the description of the relationship of one element or feature to another element or feature as depicted in the figures. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "directly below" other elements or features would be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used in this specification would be interpreted accordingly.

[0115] The vehicle drive system 1 is not limited to the above-mentioned configuration. Although an example has been shown in which one motor generator 3 is provided, the present invention is not limited to this. A plurality of motor generators may be provided. Although an example has been shown in which the power conversion device 4 is provided with an inverter 6 as a power conversion unit, the present invention is not limited to this. For example, the drive system 1 may be provided with a plurality of inverters. The drive system 1 may be provided with at least one inverter and a converter. The drive system 1 may be provided with only a converter.

[0116] Although an example has been shown in which the semiconductor element 40 has the MOSFET 11 as a switching element, the present invention is not limited to this. For example, an IGBT may also be used. IGBT is an abbreviation for Insulated Gate Bipolar Transistor.

[0117] Although an example has been shown in which the rear surfaces 50b, 60b of the heat sinks 50, 60 are exposed from the sealing body 30, the present invention is not limited to this. At least one of the rear surfaces 50b, 60b may be covered by the sealing body 30. At least one of the rear surfaces 50b, 60b may be covered by an insulating member (not shown) separate from the sealing body 30.

[0118] In the above example, a heat sink 50 and a conductive spacer 70 are provided as a first wiring member connected to the source electrode 42 (first main electrode), and a heat sink 60 is provided as a second wiring member connected to the drain electrode 43 (second main electrode). However, the wiring members are not limited to the above example. For example, instead of the heat sinks 50 and 60, a substrate having metal bodies arranged on both sides of an insulating base material may be used. One example of the substrate is a DBC substrate. DBC is an abbreviation for Direct Bonded Copper. Instead of the conductive spacer 70, a convex portion may be provided on the heat sink 50. Similarly, a convex portion may be provided on the metal body on the inner surface side of the substrate.

[0119] Although the semiconductor device 20 has been shown as having a double-sided heat dissipation structure, the present invention is not limited to this. A single-sided heat dissipation structure may also be used. For example, the drain electrode 43 may be connected to a heat sink or a metal body of a substrate, and the source electrode 42 may be connected to a lead.

[0120] Although an example has been shown in which the semiconductor device 20 includes only one semiconductor element 40 that configures one arm, the present invention is not limited to this. The semiconductor device 20 may include multiple semiconductor elements 40 that configure one arm. In other words, multiple semiconductor elements 40 may be connected in parallel to configure one arm. The semiconductor device 20 may also include multiple semiconductor elements 40 that configure upper and lower arm circuits 9 for one phase. The semiconductor device 20 may also include multiple semiconductor elements 40 that configure upper and lower arm circuits 9 for multiple phases. [Explanation of symbols]

[0121] 1... drive system, 2... DC power supply, 3... motor generator, 4... power conversion device, 5... smoothing capacitor, 6... inverter, 7... P line, 8... N line, 9... upper and lower arm circuits, 9H... upper arm, 9L... lower arm, 10... output line, 11... IGBT, 12... diode, 20... semiconductor device, 30... sealing resin body, 30a... one side, 30b... back side, 30c, 30d... side, 40... semiconductor element, 41... semiconductor substrate, 41a... one side, 41b... back side, 42... source electrode, 42a... underlayer, 42b... upper layer, 421... exposed surface, 43... drain electrode, 44... pad, 44a... underlayer, 44a1... first layer, 4a2... second layer, 44b... upper layer layer, 441...exposed surface, 441a...connection region, 441b...peripheral region, 442...projection, 442a...upper surface, 442b...side surface, 442c...part, 443...recess, 443a...upper surface, 443b...side surface, 443c...bottom surface, 444, 445...groove, 45, 45a, 45b...protective film, 451, 452...opening, 453, 454...opening periphery, 455...projection, 456...recess, 46...interlayer insulating film, 50...heat sink, 50a...opposing surface, 50b...rear surface, 60...heat sink, 60a...opposing surface, 60b...rear surface, 70...conductive spacer, 80...external connection terminal, 81, 82...main terminal, 83...signal terminal, 90...bonding wire, 91, 92, 93...bonding material

Claims

1. a semiconductor element (40) having a semiconductor substrate (41), a first main electrode (42) arranged on one surface of the semiconductor substrate, a second main electrode (43) arranged on a back surface of the semiconductor substrate opposite to the one surface in a plate thickness direction, and a pad (44) which is an electrode for signals arranged at a position different from that of the first main electrode on the one surface; a first wiring member (50, 70) electrically connected to the first main electrode; a second wiring member (60) electrically connected to the second main electrode; a bonding wire (90) connected to the pad; a sealing body (30) that seals at least a portion of each of the first wiring member and the second wiring member, the semiconductor element, and the bonding wires; The semiconductor element has a protective film (45) disposed on the one surface and having an opening (451) formed therein; The pad has an exposed surface (441) exposed from the opening, The exposed surface has a connection area (441a) to which the bonding wire is connected and a peripheral area (441b) of the connection area, the peripheral region includes a surface that is at an angle of 90 degrees or less relative to a surface of the connection region; The protective film has a convex portion (455) and / or a concave portion (456) between the first main electrode and the pad when viewed in a plan view in the thickness direction.

2. 2. The semiconductor device of claim 1, wherein the pad comprises an underlayer (44a), an upper layer (44b) laminated on the underlayer and providing at least a portion of the exposed surface, and a groove (445) penetrating the upper layer.

3. a semiconductor element (40) having a semiconductor substrate (41), a first main electrode (42) arranged on one surface of the semiconductor substrate, a second main electrode (43) arranged on a back surface of the semiconductor substrate opposite to the one surface in a plate thickness direction, and a pad (44) which is an electrode for signals arranged at a position different from that of the first main electrode on the one surface; a first wiring member (50, 70) electrically connected to the first main electrode; a second wiring member (60) electrically connected to the second main electrode; a bonding wire (90) connected to the pad; a sealing body (30) that seals at least a portion of each of the first wiring member and the second wiring member, the semiconductor element, and the bonding wires; The semiconductor element has a protective film (45) disposed on the one surface and having an opening (451) formed therein; The pad has an exposed surface (441) exposed from the opening, The exposed surface has a connection area (441a) to which the bonding wire is connected and a peripheral area (441b) of the connection area, the peripheral region includes a surface that is at an angle of 90 degrees or less relative to a surface of the connection region; The pad comprises an underlayer (44a), an upper layer (44b) laminated on the underlayer and providing at least a portion of the exposed surface, and a groove (445) penetrating the upper layer.

4. The pad has a protrusion (442) protruding from a periphery (453) of the opening in the protective film, The semiconductor device according to any one of claims 1 to 3, wherein an upper surface (442a) of the protrusion provides the connection region, and a side surface (442b) of the protrusion provides the peripheral region.

5. 5. The semiconductor device according to claim 4, wherein a portion of said side surface within a predetermined range from a lower end of said convex portion forms an angle of 90 degrees or less relative to a periphery of said opening of said protective film.

6. The pad has a recess (443) disposed within the opening; The semiconductor device according to any one of claims 1 to 3, wherein a bottom surface (443c) of the recess provides the connection region, and a side surface (443b) of the recess and an upper surface (443a) connected to the side surface provide the peripheral region.

7. a semiconductor element (40) having a semiconductor substrate (41), a first main electrode (42) arranged on one surface of the semiconductor substrate, a second main electrode (43) arranged on a back surface of the semiconductor substrate opposite to the one surface in a plate thickness direction, and a pad (44) which is an electrode for signals arranged at a position different from that of the first main electrode on the one surface; a first wiring member (50, 70) electrically connected to the first main electrode; a second wiring member (60) electrically connected to the second main electrode; a bonding wire (90) connected to the pad; a sealing body (30) that seals at least a portion of each of the first wiring member and the second wiring member, the semiconductor element, and the bonding wires; The semiconductor element has a protective film (45) disposed on the one surface and having an opening (451) formed therein; The pad has an exposed surface (441) exposed from the opening, The exposed surface has a connection area (441a) to which the bonding wire is connected and a peripheral area (441b) of the connection area, the peripheral region includes a surface that is at an angle of 90 degrees or less relative to a surface of the connection region; The pad has a recess (443) disposed within the opening; A semiconductor device, wherein a bottom surface (443c) of the recess provides the connection region, and a side surface (443b) of the recess and an upper surface (443a) continuous with the side surface provide the peripheral region.

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