Disable circuit for current rush limiter

Abstract

To suppress a rush current to a capacitor.SOLUTION: A power control circuit includes a transistor comprising a first control input and a first current terminal. A controller comprises a controller output which is coupled to the first control input. A current rush limiting circuit comprises an output and an input which is coupled to the first control input. A disable circuit comprises a first input, a sensing input, and a supply reference terminal. The first input is coupled to the output of the current rush limiting circuit. The sensing input is coupled to the first current terminal. The disable circuit couples the output of the current rush limiting circuit to the supply reference terminal in response to a state where a voltage of the first current terminal is lower than a threshold and decouples the output of the current rush limiting circuit from the supply reference terminal in response to a state where the voltage of the first current terminal is higher than the threshold.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to Indian Provisional Application No. 202341036859, filed on May 26, 2023, entitled "Novel Circuit for Faster Line Transient Response of Gate Drivers in High Inrush Current Control Applications with Capacitive Loads," which is incorporated herein by reference. [Background technology]

[0002] It is common practice to have a capacitor coupled between the power supply input terminal of an electrical load and a supply reference terminal (e.g., ground) to reduce undesirable power supply voltage fluctuations. Such a capacitor is initially charged during a power-up event of a system that includes such an electrical load. Application of a step voltage to the capacitor can result in a large, and therefore potentially detrimental, inrush current into the capacitor. Summary of the Invention

[0003] In one example, a power control circuit includes a transistor having a first control input and a first current terminal. A controller has a controller output coupled to the first control input. A current inrush limiting circuit has an input and an output. The input of the current inrush limiting circuit is coupled to the first control input. A disable circuit has a first input, a sense input, and a supply reference terminal. The first input of the disable circuit is coupled to the output of the current inrush limiting circuit. The sense input is coupled to the first current terminal. The disable circuit is configured to couple the output of the current inrush limiting circuit to the supply reference terminal in response to a voltage at the first current terminal falling below a threshold, and to decouple the output of the current inrush limiting circuit from the supply reference terminal in response to the voltage at the first current terminal rising above the threshold. [Brief description of the drawings]

[0004] [Figure 1]FIG. 2 is a schematic diagram of an exemplary system including, in one example, a fuse to protect against excessive current levels between a battery and an electronics unit.

[0005] [Diagram 2] FIG. 2 is a schematic diagram of another exemplary system that, in one example, includes solid state switches instead of fuses.

[0006] [Diagram 3] In one example, a system includes a current inrush limiting circuit.

[0007] [Figure 4] 4 is an example waveform illustrating the operation of the system and current inrush limiting circuit of FIG. 3.

[0008] [Diagram 5] In one example, a power control circuit includes a disable circuit coupled to a current inrush limiting circuit.

[0009] [Figure 6] FIG. 2 is a schematic diagram of a disable circuit in one example.

[0010] [Figure 7] In another example, a power control circuit includes a disable circuit coupled to a current inrush limiting circuit.

[0011] [Figure 8] FIG. 8 is a schematic diagram of the disable circuit of FIG. 7 in one example.

[0012] [Figure 9] 9 is an example waveform illustrating the operation of the circuits of FIGS. 6 and 8.

[0013] [Figure 10] 1 is an exemplary system including a primary power circuit and an auxiliary power circuit, in one example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] In the drawings, the same or different reference numbers are used to denote identical or similar features (in function and / or structure).

[0015] FIG. 1 is a schematic diagram of a system 100 including one or more electronics units 110 and 112 coupled to a battery 120. The battery 120 provides an operating voltage and current to each of the electronics units 110 and 112. One or more fuses are coupled between the battery 120 and the electronics units 110 and 112. In FIG. 1, a battery fuse box 130 is included that includes an individual fuse 132. An electrical cable couples each electronics unit to the battery fuse box 130. For example, an electrical cable 135 couples the battery fuse box 130 to the electronics unit 110, and an electrical cable 136 couples the electronics unit 112 to the battery fuse box. A fuse may be included within each electrical cable or coupled to each electrical cable. For example, a fuse 140 is associated with the electrical cable 135 and the electrical unit 110, and electrical current to the electronics unit 110 flows through the fuse 140. Similarly, fuse 142 is associated with electrical cable 136 and electrical unit 112, with electrical current to electronics unit 112 flowing through fuse 142. In Figure 1, fuses 132, 140, and 142 may be fusion fuses, in which excessive electrical current through the fuse overheats the fuse and melts a conductor within the fuse, leaving a first portion of the conductor separated from a second portion, thereby interrupting the flow of electrical current.

[0016] The system 100 may have various applications. For example, the system 100 may be part of a vehicle (e.g., a car, a truck, a bus, an airplane, etc.). In the context of an automobile, the electronics unit 110 may be an emission controller and the electronics unit 112 may be a body control module. The electronics units 110 and 112 may include various components. For example, the electronics unit 110 includes a microcontroller unit (MCU) 111, a sensor 113, and a register 114. The electronics unit 112 includes the MCU 111, drivers 115, 116, which turn on and provide current to lights (e.g., light-emitting diodes) 117, 118, respectively. The automobile may include one or more, typically many, electronics units that receive operating power from a battery 120.

[0017] Each electronics unit may also include a capacitor coupled between its power supply terminal input and a supply reference terminal (e.g., ground). For example, electronics unit 110 includes capacitor C1 and electronics unit 112 includes capacitor C2. As mentioned above, such a capacitor reduces ripple on the supply voltage from battery 120 to the circuitry within each electronics unit. Such a capacitor may be relatively large (e.g., 5 mF).

[0018] A vehicle may have a large number of fuses (e.g., more than 80 fuses) distributed across multiple fuse boxes 130. The electrical cables 135 and 136 should be sized with respect to their thickness (cross-sectional area) to safely conduct the maximum amount of current that the fuses can conduct without melting the fuses. For example, for a fuse rated at 20 amps (A), the electrical cables need to be sized to safely conduct current up to at least 20 A. However, there is a significant variability in the current ratings of melting fuses. For example, a 20 A fuse may not melt until the current reaches 25 A. Due to such variability, electrical cables in vehicles are generally sized to accommodate more current than the listed current rating of the fuses. A cable with a larger current capacity means that the cross-sectional area of ​​the cable is larger, which therefore takes up more space in the vehicle and the cable is also heavier.

[0019] To address the above-mentioned problems, one or more melting fuses in an automobile may be replaced with solid-state switches. For example, FIG. 2 is a schematic diagram of a system 200 including a solid-state transistor, e.g., transistor Q1, instead of a melting fuse (e.g., fuse 140 of FIG. 1). Any or all of the fuses may be replaced with solid-state switches. The solid-state transistor may be a field-effect transistor (FET). A controller 250 is coupled to a control input (e.g., gate) of transistor Q1. The current through transistor Q1 may be accurately monitored by controller 250, which may turn off transistor Q1 in response to the current through the transistor exceeding a predetermined current (e.g., 20 A). Because the overcurrent threshold implemented by controller 250 varies less than the current that melts the fuse, the electrical cable coupled between the solid-state switch and the electronics unit may use a smaller gauge wire than would be the case for a melting fuse. Solid-state transistors Q1 and their associated controller 250 may be included as part of a power distribution box / zone module 240 in the vehicle.

[0020] Using a transistor as a switch instead of a melting fuse allows for smaller and lighter cabling to be used in the vehicle, but using such a transistor can cause problems in that an inrush current through the transistor to charge the capacitor C1 can damage the transistor. For example, when the vehicle is off, the controller 250 can be off, and when the controller 250 is off, the transistor Q1 is also off. When the transistor Q1 is off, the capacitor C1 can be discharged. In response to the vehicle being turned on, the controller 250 turns on the transistor Q1. The current into the capacitor is proportional to the rate of change of the voltage across the capacitor with respect to time (capacitor current ∝ dv / dt). Thus, a sudden change in the capacitor voltage when the transistor Q1 turns on can cause an inrush current into the capacitor that can be large enough to damage the transistor Q1.

[0021] 3 is a schematic diagram of a power control circuit 300 illustrating a solution to the large inrush current when transistor Q1 is turned on. The power control circuit 300 of FIG. 3 includes transistor Q1, controller 250, and current inrush limiting circuit 310. The voltage on the drain of transistor Q1 is labeled as the input voltage VIN, for example, from a battery (e.g., a car battery). The voltage on the source of transistor Q1 is labeled as the output voltage (VOUT), which is provided to the electronics unit and its capacitor (e.g., capacitor C1).

[0022] In this example, the current inrush limiting circuit has an input 311 coupled to the gate of transistor Q1 and an output 312 coupled to ground reference 360. The current inrush limiting circuit 310 may include a resistor R2 coupled in series with a capacitor C3 between the input 311, and therefore the gate of transistor Q1, and the output 312, and therefore the ground reference 360. The controller 250 includes sense inputs 351, 353, and 354 and an output 352. The sense input 351 is coupled to the drain of transistor Q1, and the sense input 354 is coupled to the source of transistor Q1. A resistor R1 is coupled between the source of transistor Q1 and the sense input 353. The controller output 352 is coupled to the gate of transistor Q1 and the resistor R2.

[0023] When the controller 250 starts to turn on the transistor Q1, the controller 250 sources a current I1 through its output 352. The current I1 splits into a current I2 to the gate capacitance of the transistor Q1 and a current I3 to the current inrush limiting circuit 310. The current I2 charges the gate capacitance of the transistor and the current I3 charges the capacitor C3. While the capacitor C3 is charging, the rise of the voltage on the gate of the transistor Q1 (HGATE) is limited due to a time constant implemented by the combination of the resistance of the resistor R2 and the capacitance of the capacitor C3. By limiting how fast HGATE can rise, the transistor Q1 turns on more slowly compared to what would happen without the current inrush limiting circuit 310. Although the current inrush limiting circuit 310 limits the magnitude of the inrush current through the transistor Q1 to the capacitor C1, the current inrush limiting circuit 310 can cause some problems when there are transients in the input voltage VIN.

[0024] FIG. 4 includes example waveforms illustrating some of the challenges with the current inrush limiting circuit 310. The example waveforms in FIG. 4 include VIN, VOUT, HGATE, the gate-to-source voltage of transistor Q1 (Vgs_Q1), and the drain-to-source voltage of transistor Q1 (Vds_Q1). The VIN waveform illustrates a transient 410 in which VIN increases rapidly from its nominal level (e.g., 12V) to 40V and back to 12V in 1 millisecond (ms). The voltage on the source of transistor Q1 (VOUT) also has a transient 411 that approximately tracks the input voltage VIN transient 410. However, the gate voltage (HGATE) cannot rise as quickly as VIN or VOUT due to the capacitance C3 of the current inrush limiting circuit 310. Thus, the HGATE transient 412 has a smaller slew rate than the VIN and VOUT transients 410 and 411. Because the current inrush limiting circuit 310 prevents the gate voltage HGATE of transistor Q1 from rising as quickly as the transistor's source voltage, Vgs_Q1 decreases as illustrated by Vgs_Q1 transient 413. One problem that the decrease in Vgs_Q1 can cause is that when Vgs_Q1 drops to the transistor's threshold voltage (Vth), transistor Q1 will undesirably turn off, thereby turning off power to the electronics unit.

[0025] Another problem that may occur due to the presence of the current inrush limiting circuit 310 is false triggering of the overcurrent detection capability of the controller 250. When the transistor Q1 is on and fully boosted, its on-resistance (Rdson) is at a fairly low, known resistance level (e.g., 100 milliohms). The level of Vds_Q1 is the product of the current through the transistor Q1 and its on-resistance. The sense inputs 351 and 353 of the controller 250 may be coupled to the source and drain of the transistor Q1 (through resistor R1). The voltage drop between the sense inputs 351 and 353 is proportional to Vds_Q1 and therefore to the current through the transistor. The controller 250 may include a voltage comparator that compares the voltage difference between the sense inputs 351 and 353 with an internal reference voltage. If the voltage difference between the sense inputs 351 and 353 exceeds the reference voltage (which may occur in response to an overcurrent condition such as a short circuit in the electronic circuit unit), the controller 250 may turn off the transistor Q1. However, the decrease in Vgs_Q1 during transient 413 increases the Rdson of transistor Q1. The increase in Rdson of transistor Q1 increases its Vds_Q1, as shown in transient 414. Controller 250 may undesirably respond to positive transient 414 in Vds_Q1 by turning off transistor Q1. That is, positive transient 414 in Vds_Q1 may cause a false triggering of the overcurrent protection of controller 250.

[0026] 5 is a schematic diagram of a power control circuit 500 including a transistor Q1, a controller 240, a current inrush limiting circuit 310, and a disable circuit 510. The inclusion of the disable circuit 510 can ameliorate either or both of the above-mentioned problems caused by the current inrush limiting circuit 310 in response to a transient on VIN.

[0027] The disable circuit 510 includes a first input 511, a sense input 512, and a ground terminal 513 coupled to the ground reference 360. The output 312 of the current inrush limiting circuit 310 is coupled to the input 511 of the disable circuit 510. Thus, the current inrush limiting circuit 310 is coupled between the gate of the transistor Q1 and the first input 511 of the disable circuit 510. Thus, a resistor R2 and a capacitor C3 are coupled in series between the gate of the transistor Q1 and the first terminal 511. The sense input 512 of the disable circuit 510 receives VOUT. The disable circuit 510 detects whether VOUT is below or above a threshold value. The threshold value is less than VIN but close to VIN.

[0028] During start-up (e.g., when the vehicle is turned on), the controller 250 begins to turn on the transistor Q1, and the current inrush limiting circuit 310 ensures that the current I2 to the gate of the transistor Q1 is smaller than it would be without the current inrush limiting circuit, thereby slowing down the rate at which the transistor Q1 turns fully on. As the transistor Q1 begins to turn on, VOUT increases from 0V toward the level of VIN (e.g., 12V). In response to detecting that VOUT is below the threshold, the disable circuit 510 couples the first input 511 to the ground terminal 513, and thus to the ground reference 360, thereby enabling operation of the current inrush limiting circuit 310 to limit the inrush current to the capacitor C1. In response to detecting that VOUT exceeds the threshold (e.g., when the capacitor C1 is nearly fully charged), the disable circuit 510 decouples the current inrush limiting circuit 310, thereby disabling the current inrush limiting circuit 310. When the inrush current limiting circuit 310 is decoupled from the ground terminal 513 and the ground reference 360, the current path from the gate of the transistor Q1 through the resistor R2 and the capacitor C3 to the ground reference 360 ​​is broken, thereby preventing the inrush current limiting circuit 310 from causing either or both of the problems mentioned above.

[0029] FIG. 6 is a schematic diagram similar to that of FIG. 5 but including an example implementation of the disable circuit 510. In this example, the disable circuit 510 includes transistors Q2 and Q3, a resistor R3, and a resistor divider 620. The transistors Q2 and Q3 are NPN bipolar junction transistors (BJTs) in this example. The collector transistor Q2 is coupled to the first input 511 and therefore to a capacitor C3. The resistor R3 is coupled between VIN and the base of the transistor Q2 and the collector of the transistor Q3. The emitters of the transistors Q2 and Q3 are coupled together and to a ground terminal 513. The resistor divider 620 includes resistors R4 and R5 coupled in series between the sense input 512 and the ground terminal 513. In this example, the resistor divider 620 includes two resistors R4 and R5, but in other examples, the resistor divider 620 can include three or more resistors. The connection between resistors R4 and R5 is the output 621 of resistor divider 620, which is coupled to the base of transistor Q3.

[0030] The voltage at the output 621 of resistor divider 620 is based on VOUT and the relative resistance values ​​of resistors R4 and R5. For example, V_621=VOUT×R5 / (R4+R5), where V_621 is the voltage at the output 621. Transistor Q3 is off when its base voltage V_621 is less than the transistor's base-emitter voltage (Vbe, e.g., 0.6V). Transistor Q3 is on when its base voltage V_621 exceeds its Vbe. Resistor divider 620 turns off transistor Q3 until VOUT approaches VIN, at which point the base-emitter voltage of transistor Q3 is high enough to turn on transistor Q3. In an example where VIN is 12V, the values ​​of resistors R4 and R5 can be selected such that VOUT×R5 / (R4+R5) reaches 0.7V when VOUT is approximately 11V. The above threshold is set based on the values ​​of R4 and R5, and is 0.7V in one example.

[0031] During start-up, transistor Q3 is off, but transistor Q2 is on because its base is pulled up to V by resistor R3. When transistor Q2 is on, current inrush limiting circuit 310 is enabled and coupled to ground reference 360. When a current path is enabled through the series combination of resistor R2 and capacitor C3 between the gate of transistor Q1 and ground reference 360, current inrush limiting circuit 310 is operable to limit the rate at which transistor Q1 turns on, thereby limiting the current inrush into capacitor C1.

[0032] When VOUT reaches a value close to VIN, V_621 becomes large enough (e.g., 0.7V) to turn on transistor Q3. When transistor Q3 is on, the base of transistor Q2 is pulled to ground through transistor Q3, thereby turning off transistor Q2. When transistor Q2 is off, current inrush limiting circuit 310 is decoupled from ground reference 360, thereby turning off the current path from the gate of transistor Q1 through resistor R2 and capacitor C3 to ground. In this state, current inrush limiting circuit 310 is disabled and does not cause either or both of the above-mentioned problems that can occur during a VIN transient.

[0033] FIG. 7 is a schematic diagram similar to that of FIG. 6, but with differences. The difference is that the disable circuit 510 in the example of FIG. 7 includes an enable input 714 coupled to the enable input 509 of the controller 250. An enable signal (EN) may be provided to enable the inputs 509 and 714. In response to the enable signal EN being in a first logic state (e.g., logic 0 / low), the controller 250 and the disable circuit 510 are disabled, thereby reducing quiescent current, for example, when the car is parked (off). In response to the enable signal EN being in a second logic state (e.g., logic 1 / high), the controller 250 and the disable circuit 510 are enabled, thereby causing the controller 250 and the disable circuit 510 to perform their functionality as described herein.

[0034] 8 is a schematic diagram similar to that of FIG. 6, but the disable circuit 510 includes a deactivation circuit 810 to respond to the logic state of the enable signal EN. In this example, the deactivation circuit 810 includes transistors Q4 and Q5 and resistors R6 and R7. In this example, transistor Q4 is an NPN BJT and transistor Q5 is a PNP BJT. The emitter of transistor Q5 is coupled to VIN. Resistor R3 is coupled between the collector of transistor Q5 and the base of transistor Q2 and the collector of transistor Q3. Resistor R7 is coupled between the base of transistor Q5 and the collector of transistor Q4. Resistor R6 is coupled between the base of transistor Q4 and the enable input 714.

[0035] When the enable signal EN is a logic high, transistor Q4 is on, pulling the base of transistor Q5 to ground, thereby turning transistor Q5 on. When transistor Q5 is on, the disable circuit 510 operates as described above to couple the first input 511 to ground terminal 513 when VOUT is less than a threshold set by resistor divider 620, and to decouple the first input 511 from ground terminal 513 to disable the current limit circuit 310 when VOUT is greater than the threshold. When the enable signal EN is a logic low, transistor Q4 is off, which also turns transistor Q5 off. When transistor Q5 is off, the disable circuit 510 is disabled and consumes little or no quiescent current.

[0036] FIG. 9 includes example waveforms illustrating the operation of the disable circuits of FIGS. 6 and 8. The waveforms in FIG. 9 include VIN, VOUT, EN (related to FIG. 8 and not FIG. 6), Vgs_Q1, and Vds_Q1. In this example, VIN experiences a transient 410 as described above. VOUT responds with a transient 912. During the VIN transient 410, the enable signal EN is logic high, thereby enabling the disable circuit 510 (and the disable circuit 510 of FIG. 6 is always enabled). Vgs_Q1 does not experience a downward transient 413 as in FIG. 4 where there is no disable circuit 510. With no droop in Vgs_Q1, transistor Q1 remains intact and avoids being unintentionally turned off, as may occur without the disable circuit 510. Also, because Vgs_Q1 does not droop, the on-resistance of transistor Q1 does not increase substantially, so Vds_Q1 remains relatively constant during a VIN transient 410. Because Vds_Q1 does not experience a transient of its own, there is substantially less risk that controller 250 will falsely detect an overcurrent condition and turn off transistor Q1.

[0037] In the example of FIG. 9, enable signal EN is forced low (915). This may occur, for example, when the car is parked. When EN is in a logic low state, controller 250 turns off transistor Q1, thereby causing VOUT to drop to 0V (916). The drain voltage of transistor Q1 is VIN and its source voltage is 0V. Thus, Vds_Q1 increases to approximately VIN at 918. At 920, enable signal EN is forced back to a logic high state (e.g., the car is transitioned from PARKED to RUNNING). Controller 250 responds by forcing current I1 from its output 352 to turn on transistor Q1. Vgs_Q1 increases in response (925), and Vds_Q1 decreases as transistor Q1 turns on (927).

[0038] The example disable circuit 510 of Figures 6 and 8 includes a BJT. In other examples, one or more of the transistors of the disable circuit may be a field effect transistor (FET). For example, in Figure 8, transistors Q2 and Q3 may be BJTs and transistors Q4 and Q5 may be FETs. Alternatively, transistors Q2 and Q3 may be FETs and transistors Q4 and Q5 may be BJTs. In yet another example, transistors Q2-Q5 may be FETs.

[0039] FIG. 10 is a schematic diagram of a system 1000 including a primary power circuit 1020 coupled to an auxiliary power circuit 1060. Each power circuit 1020, 1060 may be substantially similar to that shown in FIG. 5. The disable circuit 510 in each of the primary and auxiliary power circuits 1020, 1060 may be implemented as shown in the examples of FIGS. 6 and 8 discussed above. The inputs to the power circuits 1020, 1060 are coupled to different voltage sources, although the voltage sources may be the same magnitude. The primary power circuit 1020 is coupled to a primary voltage (V PRIMARY ), and the auxiliary power circuit 1060 receives the auxiliary voltage (V AUX ). The outputs of the primary and auxiliary power circuits 1020, 1060 are coupled together to provide an output voltage (VOUT) to a load.

[0040] Each of the controllers 250 includes a voltage sense input (VSNS). The VSNS input of the controllers 250 of the primary power circuit 1020 is connected to the primary voltage V PRIMARY , and the VSNS input of the controller 250 of the auxiliary power circuit 1060 is coupled to the auxiliary voltage V AUX The primary voltage V PRIMARY While is active (e.g., above a threshold), the primary power circuit 1020 provides an output voltage VOUT to the load, and the controller 250 responds to sensing the primary voltage by turning off transistor Q1 of the auxiliary power circuit 1060. PRIMARY When falls below the threshold, the controller 250 of the primary power circuit 1020 turns off the transistor Q1 of the primary power circuit, and the controller 250 of the auxiliary power circuit 1060 turns on the transistor Q1 of the auxiliary power circuit.

[0041] In some examples, the second transistor is coupled to a voltage source (e.g., V PRIMARY Or V AUX ) and the load. For example, such a second transistor may be coupled in series with transistor Q1 in each of power circuits 1020 and 1060. PRIMARY Or V AUX ) and the drain of each of the transistors Q1, and the drain of the second transistor and the transistor Q1 are coupled together. Thus, the polarity of the backgate diode of the second transistor is opposite to the polarity of the backgate diode of the transistor Q1. PRIMARY and V AUX Such back-to-back transistors in the respective power circuits 1020, 1060 help reduce the risk of feedback current from the primary side to the auxiliary side, and vice versa, when a voltage difference exists between the primary side and the auxiliary side. For example, PRIMARY V AUXIf VOUT is greater than 1 V, the backgate diode of the second transistor in the auxiliary power circuit 1060 is turned off (the channel of the second transistor is also turned off), so that any feedback current from VOUT in the primary power supply circuit 1020 is fed to the voltage VOUT through the auxiliary power circuit. AUX Similarly, the voltage V AUX V PRIMARY If VOUT is greater than VOUT, the backgate diode of the second transistor in the primary power circuit 1020 is turned off, thereby preventing any feedback current from VOUT in the auxiliary power circuit 1060 from reaching the voltage VOUT. PRIMARY feedback to the

[0042] Each power circuit 1020, 1060 benefits from including a combination of the current inrush limiting circuit 310 and the disabling circuit 510, as described above. Additionally, by the disabling circuit 510 disabling the current inrush limiting circuit 310 of the primary power circuit, as described above, switchover from the primary power circuit 1020 to the auxiliary power circuit 1060 is faster than if the current inrush limiting circuit 310 was not disabled.

[0043] In this description, the term "couple" may encompass a connection, communication, or signal path that enables a functional relationship consistent with this description. For example, (a) in a first example, device A is coupled to device B by a direct connection, where device A generates a signal that controls device B to perform an action, or (b) in a second example, device A is coupled to device B via an intervening component C, where intervening component C does not change the functional relationship between device A and device B, and device B is controlled by device A via a control signal generated by device A.

[0044] Also, in this description, the phrase "based on" means "based at least in part on," so if X is based on Y, then X can be a function of Y as well as any number of other factors.

[0045] A device that is "configured to" perform a certain task or function may be configured (e.g., programmed and / or hardwired) at the time of manufacture by a manufacturer to perform that function and / or may be configurable (or reconfigurable) by a user after manufacture to perform that function and / or other additional or alternative functions. Such configuration may be through firmware and / or software programming of the device, through the construction and / or layout of the hardware components, through the interconnections of the device, or through a combination thereof.

[0046] As used in this description, the terms "terminal," "node," "interconnect," "pin," and "lead" are used interchangeably. Unless otherwise noted, these terms are used generally to mean an interconnection between, or the termination of, a device element, a circuit element, an integrated circuit, a device, or other electronic or semiconductor component.

[0047] A circuit or device described herein as including certain components may instead be adapted to be coupled to those components to form the described circuit element or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and / or inductors), and / or one or more sources (such as voltage and / or current sources) may instead include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or integrated circuit (IC) package) and may be adapted to be coupled to at least some of the passive elements and / or sources during or after manufacture, e.g., by an end user and / or a third party, to form the described structure.

[0048] Although the use of certain transistors is described herein, other transistors (or equivalent devices) may be used instead with little or no change to the remaining circuitry. For example, field effect transistors ("FETs") (e.g., n-channel FETs (NFETs) or p-channel FETs (PFETs)), bipolar junction transistors (BJTs, e.g., NPN or PNP transistors), insulated gate bipolar transistors (IGBTs), and / or junction field effect transistors (JFETs) may be used in place of or in conjunction with the devices described herein. The transistors may be depletion mode devices, drain extension devices, enhancement mode devices, natural transistors, or other types of device structure transistors. Additionally, the devices may be implemented in / on silicon substrates (Si), silicon carbide substrates (SiC), gallium nitride substrates (GaN), or gallium arsenide substrates (GaAs).

[0049] In the claims, reference may be made to a transistor's control input and its current terminals. In the context of a FET, the control input is the gate and the current terminals are the drain and source. In the context of a BJT, the control input is the base and the current terminals are the collector and emitter.

[0050] Reference in this description to a FET being "on" or "enabled" means that the FET's conductive channel is present and drain current may flow through the FET. Reference in this description to a FET being "off" or "disabled" means that the FET's conductive channel is not present and therefore no drain current may flow through the FET. However, a FET that is "off" may pass current through the transistor's body diode.

[0051] The circuits described herein are reconfigurable to include additional or different components to provide at least partially similar functionality to that available prior to component replacement. A component shown as a resistor generally represents any one or more elements coupled in series and / or parallel to provide the amount of impedance represented by the resistor shown, unless otherwise noted. For example, a resistor or capacitor shown and described in this description as a single component may instead be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described in this description as a single component may instead be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as a single resistor or capacitor.

[0052] While some elements of the described examples are included in the integrated circuit and others are external to the integrated circuit, in other example embodiments, additional or fewer features may be incorporated into the integrated circuit. Also, some or all of the features illustrated as being external to the integrated circuit may be included in the integrated circuit, and / or some features illustrated as being internal to the integrated circuit may be incorporated outside the integrated circuit. As used in this description, the term "integrated circuit" refers to one or more circuits that are (1) incorporated in / on a semiconductor substrate, (2) incorporated in a single semiconductor package, (3) incorporated in the same module, and / or (4) incorporated on / on the same printed circuit board.

[0053] Use of the term "ground" in the preceding description includes chassis ground, earth ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection applicable or suitable for the teachings of the present description. In this description, unless otherwise specified, "about," "approximately," or "substantially" preceding a parameter means within + / - 10 percent of that parameter, or, if the parameter is zero, a reasonable range of values ​​around zero.

[0054] Modifications may be made to the described embodiments, and other embodiments are possible, within the scope of the claims.

Claims

1. An apparatus comprising: a transistor having a first control input and a first current terminal; a controller having a controller output coupled to the first control input; a current inrush limiting circuit having an input and an output, the input of the current inrush limiting circuit being coupled to the first control input; a disable circuit having a first input, a sense input, and a supply reference terminal, the first input of the disable circuit being coupled to the output of the current inrush limiting circuit and the sense input being coupled to the first current terminal; Including, The disable circuit comprises: in response to the voltage at the first current terminal falling below a threshold, coupling the output of the current inrush limiting circuit to the supply reference terminal; decoupling the output of the current inrush limiting circuit from the supply reference terminal in response to the voltage at the first current terminal exceeding the threshold. It is configured as follows: Device.

2. 2. The apparatus of claim 1, wherein the transistor is a first transistor and the disable circuit includes a second transistor coupled between the output of the current inrush limiting circuit and the supply reference terminal; The disable circuit comprises: coupling the output of the current inrush limiting circuit to the supply reference terminal by turning on the second transistor; decoupling the output of the current inrush limiting circuit from the supply reference terminal by turning off the second transistor; It is configured as follows: Device.

3. 2. The apparatus of claim 1, wherein the disable circuit further comprises: a resistor divider coupled between the sense input and the supply reference terminal; a third transistor having a control input coupled to the resistor divider and having a second current terminal coupled to a control input of the second transistor; a resistor coupled between a voltage input of the device and the control input of the second transistor; 13. An apparatus comprising:

4. 4. The apparatus of claim 3, further comprising a deactivation circuit having an enable input, the deactivation circuit being coupled between the voltage input of the apparatus and the resistor.

5. 5. The apparatus of claim 4, wherein the controller has a controller enable input coupled to the enable input of the deactivation circuit.

6. 5. The apparatus of claim 4, wherein the deactivation circuitry includes a fourth transistor coupled between the voltage input of the apparatus and the resistor.

7. 2. The apparatus of claim 1, wherein the current inrush limiting circuit includes a resistor coupled in series with a capacitor between the input and the output of the inrush limiting circuit.

8. 2. The apparatus of claim 1, wherein the disable circuit is configured to implement the threshold with hysteresis.

9. 2. The apparatus of claim 1, wherein the transistor is a first transistor, the controller is a first controller, the inrush current limiting circuit is a first inrush current limiting circuit, and the disable circuit is a first disable circuit, the apparatus further comprising: a second transistor having a second control input and a second current terminal; a second controller having a second controller output coupled to the second control input; a second current inrush limiting circuit having a second input and a second output, the second input of the current inrush limiting circuit being coupled to the second control input; and a second disable circuit coupled to the second output; Further comprising: the second disable circuit having a second sense input and a second supply reference terminal, the second sense input coupled to the second current terminal; the second disable circuit comprising: in response to a second voltage at the second current terminal falling below a second threshold, coupling the second output of the second current inrush limiting circuit to the second supply reference terminal; decoupling the second output of the second current inrush limiting circuit from the second supply reference terminal in response to the second voltage at the second current terminal exceeding the second threshold. It is configured as follows: Device.

10. 1. A power control circuit comprising: a first transistor having a first control input and a first current terminal; a controller having a controller output coupled to the first control input; a second transistor having a second control input terminal and second and third current terminals, the third current terminal being coupled to a supply reference terminal; a current inrush limiting circuit having an input and an output, the input of the current inrush limiting circuit being coupled to the first control input and the output of the current inrush limiting circuit being coupled to the second current terminal; a first resistor coupled between a voltage input of the power control circuit and the second control input; a third transistor having a third control input and a fourth current terminal, the third control input coupled to the first current terminal and the fourth current terminal coupled to the second control input; a power control circuit comprising:

11. 11. The power control circuit of claim 10, further comprising a resistor divider coupled between the first current terminal and the supply reference terminal, the resistor divider having an output coupled to the third control input.

12. 11. The power control circuit of claim 10, further comprising a fourth transistor coupled between the voltage input of the power control circuit and the first resistor.

13. 13. The power control circuit of claim 12, wherein the fourth transistor has a fourth control input, the power control circuit further comprising: a fifth transistor having a fifth control input and a fifth current terminal, the fifth control input coupled to an enable input; a second resistor coupled between the fifth current terminal and the fourth control input; a power control circuit comprising:

14. 14. The power control circuit of claim 13, wherein the controller is coupled to the enable input.

15. 11. The power control circuit of claim 10, wherein the current inrush limiting circuit includes a first resistor coupled in series with a capacitor between the input of the current inrush limiting circuit and the output of the current inrush limiting circuit.

16. 1. A circuit comprising: a first transistor having a first control input, a first current terminal and a second current terminal, the second current terminal being coupled to a supply reference terminal; a first resistor coupled between a first voltage input and the first control input; a second transistor having a second control input and a third current terminal, the second control input coupled to a second voltage input and the third current terminal coupled to the first control input; The circuit includes:

17. 17. The circuit of claim 16, further comprising a resistor divider coupled between the second voltage input and the supply reference terminal, the resistor divider having an output coupled to the second control input.

18. 17. The circuit of claim 16, further comprising a third transistor coupled between the first voltage input and the first resistor.

19. 20. The circuit of claim 18, wherein the third transistor has a third control input, the circuit further comprising: a fourth transistor having a fourth control input and a fourth current terminal, the fourth control input coupled to an enable input; a second resistor coupled between the fourth current terminal and the third control input; The circuit includes:

20. 17. The circuit of claim 16, wherein the second transistor has a fourth current terminal coupled to the supply reference terminal.

21. 17. The circuit of claim 16, further comprising: a third transistor having a third control input and a fourth current terminal; a current inrush limiting circuit having an input and an output; Including, the input of the current inrush limiting circuit is coupled to the third control input and the output of the current inrush limiting circuit is coupled to the first current terminal. circuit.

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