Uninterruptible power supply system and power supply method using uninterruptible power supply system
The uninterruptible power supply system addresses synchronization challenges by using detection and communication units to manage voltage synchronization across multiple units, ensuring stable power supply even with abnormalities.
Patent Information
- Application Number
- JP2023096979
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-13
- Publication Date
- 2024-12-25
- Estimated Expiration
- 2043-06-13
AI Technical Summary
Existing uninterruptible power supply systems fail to provide appropriate synchronization control when abnormalities occur in multiple systems, leading to potential inappropriate power supply due to unsynchronized voltage outputs.
An uninterruptible power supply system with multiple units that include detection, information communication, and synchronization control units to manage voltage synchronization across systems, even when one or more units experience abnormalities.
Ensures synchronized power supply to loads by adjusting voltage outputs based on detection and communication of operating states, preventing unsynchronized voltage synchronization and maintaining power supply integrity.
Smart Images

Figure 2024178665000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to an uninterruptible power supply system. [Background technology]
[0002] Conventionally, there is known an uninterruptible power supply system that supplies power to three or more loads using one of two uninterruptible power supplies connected to an AC power supply (see, for example, Patent Document 1). The uninterruptible power supply system described in Patent Document 1 includes two uninterruptible power supply devices that supply power to three loads. Each of the uninterruptible power supply devices includes an uninterruptible power supply including a bypass power supply circuit that supplies power from the AC power supply directly to the load, a power conversion unit that adjusts the power supplied to the load, a voltage detector that detects the output of the power conversion unit of its own system and the output of the power conversion unit of the other system, and a synchronization selection circuit that acquires the voltage via the voltage detector.
[0003] In addition, in the above Patent Document 1, each of the uninterruptible power supplies further includes a signal relay circuit for mutually communicating the voltages acquired by the synchronization selection circuits.The uninterruptible power supply system described in the above Patent Document 1 discloses a configuration in which, when an abnormality occurs in the voltage of a bypass power supply circuit included in one of the two uninterruptible power supplies due to a power outage or the like, a power conversion unit is controlled so that the voltage of the bus bar output by the system is synchronized with the voltage of a bypass power supply circuit of normal voltage included in the other uninterruptible power supply of the two uninterruptible power supplies. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Patent No. 5347415 Summary of the Invention [Problem to be solved by the invention]
[0005] On the other hand, the above Patent Document 1 does not specify a method for controlling the synchronization targets in an uninterruptible power supply device with three or more systems, or a control method when an abnormality occurs in any of the uninterruptible power supplies. Therefore, in the configuration of the above Patent Document 1, when any of the uninterruptible power supplies among the three or more systems becomes abnormal, it is unclear how to synchronize them to supply appropriate power to the load, and there is a possibility that each of the uninterruptible power supplies may synchronize with an inappropriate voltage and supply power.
[0006] The present invention has been made to solve the above-mentioned problems, and one object of the present invention is to provide an uninterruptible power supply system that, when three or more uninterruptible power supplies are synchronously controlled to supply power to a load, can appropriately synchronize the outputs of each of three or more uninterruptible power supplies even if the output of any of the uninterruptible power supplies cannot be synchronously controlled. [Means for solving the problem]
[0007] In order to achieve the above object, an uninterruptible power supply system according to a first aspect of the present invention is an uninterruptible power supply system that uses three or more systems of uninterruptible power supplies, each system including a power conversion unit that converts power of an AC power supply and outputs it to a load, and a bypass circuit that directly outputs the power of the AC power supply to the load, and supplies power to three or more loads, and each of the uninterruptible power supplies includes a detection unit that detects a voltage of the bypass circuit of its own system in the uninterruptible power supply and a bus voltage output from the power conversion unit of its own system, and a detection information obtained based on the detection result of the detection unit and an operating state of the uninterruptible power supply. The system includes an information communication unit that communicates operating state information related to the detection information and the operating state information, and a synchronization control unit that performs control to switch and synchronize the voltage output by the power conversion unit of the own system with the voltage of the bypass circuit of the own system or the bus voltage of the other system based on the detection information and the operating state information, and the synchronization control unit is configured to control the voltage output by the power conversion unit of the own system to be synchronized with the bus voltage of the uninterruptible power supply of the other system whose bus voltage cannot be synchronously controlled when operating state information is obtained that indicates that there is an uninterruptible power supply of the other system whose bus voltage cannot be synchronously controlled.
[0008] In the uninterruptible power supply system according to the first aspect of the present invention, as described above, the synchronization control unit included in each of the three or more systems of uninterruptible power supplies is configured to perform control to synchronize the voltage output by the power conversion unit of the system with the bus voltage of the other system of uninterruptible power supplies in a state in which the bus voltage cannot be synchronously controlled when operating state information is acquired indicating that there is an uninterruptible power supply of another system in which the bus voltage cannot be synchronously controlled. In this way, when using a plurality of uninterruptible power supplies of three or more systems, even if the voltage output by any of the uninterruptible power supplies of the system becomes uncontrollable, the voltage of each bus of the system in which the voltage can be controlled can be synchronized with the voltage of the bus of the system in which the bus voltage cannot be controlled. As a result, when the three or more systems of uninterruptible power supplies are synchronously controlled to supply power to a load, even if the output of any of the uninterruptible power supplies of the system cannot be synchronously controlled, the output of each of the three or more systems of uninterruptible power supplies can be appropriately synchronized.
[0009] In the uninterruptible power supply system according to the first aspect, the synchronization control unit is preferably configured to control the voltage output by the power conversion unit of the system to be synchronized with the bus voltage of the uninterruptible power supply of the other system in which the synchronous control of the bus voltage cannot be performed when the operation state information is acquired indicating that there is an uninterruptible power supply of another system in which the synchronous control of the bus voltage cannot be performed due to a malfunction of some of the components included in the uninterruptible power supply. With this configuration, when using a plurality of uninterruptible power supplies of three or more systems, even if an uninterruptible power supply of any system becomes unable to control the output voltage due to a malfunction of some of the components included in the uninterruptible power supplies, each uninterruptible power supply of the system that can control the voltage is synchronized with the output voltage of the system that cannot control the voltage. As a result, when three or more uninterruptible power supplies are synchronously controlled to supply power to three or more loads, even if an uninterruptible power supply of any system becomes unable to synchronously control the output due to a malfunction of some of the components included in the uninterruptible power supplies, the outputs of each of the three or more uninterruptible power supplies can be synchronized.
[0010] In the uninterruptible power supply system according to the first aspect, preferably, an information communication unit included in each of the uninterruptible power supplies generates interlock information for preventing the bus voltage of the own system from being selected as a target for synchronization by other systems, and the operation state information includes information that the information communication unit in the uninterruptible power supply of the own system has not generated interlock information. With this configuration, the synchronization control unit included in each of the uninterruptible power supplies performs control for switching and synchronizing the voltage output by the power conversion unit of the own system with the bus voltage of the system outputting operation state information not including the interlock information, based on the operation state information including the interlock information. As a result, the synchronization control unit of each of the three or more uninterruptible power supplies can suppress synchronization of the output of each of the three or more uninterruptible power supplies with the bus voltage of an inappropriate system.
[0011] In the uninterruptible power supply system according to the first aspect, preferably, the synchronization control unit included in each of the uninterruptible power supplies is configured to control the synchronization of the voltage output by the power conversion unit of the own system with the voltage of the bus of the uninterruptible power supply having information including at least one of the following: operation state information that the uninterruptible power supply of the other system is feeding power using a bypass circuit; operation state information that the priority synchronization information for the uninterruptible power supply of the other system to be preferentially selected as a target to be synchronized has not been generated; and operation state information indicating that the own system is in a state in which the voltage of the bus of the other system cannot be detected normally. With this configuration, when the synchronization control unit included in each of the uninterruptible power supplies detects based on the operation state information that the uninterruptible power supply of the other system is feeding power using a bypass circuit, it can switch the synchronization target to the system that outputs the operation state information that the uninterruptible power supply of the other system is feeding power using a bypass circuit. Also, when the synchronization control unit detects based on the operation state information that the priority synchronization information for the uninterruptible power supply of the other system to be preferentially selected as a target to be synchronized has not been generated, it can prevent synchronization with the system for which the priority synchronization information has not been generated. Furthermore, when the operation state information indicates that the own system is in a state where it cannot normally detect the bus voltage of the other system, the synchronization target can be switched to the system that outputs the operation state information indicating that the own system is in a state where it cannot normally detect the bus voltage of the other system. As a result, each synchronization control unit of the three or more uninterruptible power supplies can appropriately synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the system having information including at least one of the following among a plurality of pieces of operation state information: operation state information indicating that the uninterruptible power supplies of the other systems are supplying power using a bypass circuit; operation state information indicating that priority synchronization information for preferentially selecting the uninterruptible power supplies of the other systems as the synchronization target has not been generated; and operation state information indicating that the own system is in a state where it cannot normally detect the bus voltage of the other system.
[0012] In the uninterruptible power supply system according to the above aspect, the operation state information indicating that there is an uninterruptible power supply of another system in a state in which the bus voltage cannot be synchronously controlled preferably includes bypass power supply information indicating that the uninterruptible power supply of the own system is supplying power using a bypass circuit. With this configuration, the synchronization control unit included in each of the uninterruptible power supplies can synchronize with the bus voltage of the system to be synchronized based on the operation state information including the bypass power supply information indicating that the bus voltage cannot be synchronously controlled. As a result, the synchronization control unit of each of the three or more uninterruptible power supplies can synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the system to which bypass power supply is being performed, thereby synchronizing the outputs of each of the three or more uninterruptible power supplies.
[0013] In this case, preferably, the bypass circuit included in each of the uninterruptible power supplies includes a bypass switch that is turned off when power is supplied to the load via the power conversion unit and turned on when power is supplied to the load via the bypass circuit, the information communication unit included in each of the uninterruptible power supplies is configured to generate and communicate bypass power supply information when the bypass switch of the own system is turned on, and the synchronization control unit included in each of the uninterruptible power supplies is configured to perform control to synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the uninterruptible power supply of the other system that outputs the bypass power supply information, based on the bypass power supply information of the other system acquired from the information communication unit of the own system. With this configuration, the synchronization control unit included in each of the uninterruptible power supplies can synchronize the bus voltage with the bus voltage of the system in which synchronous control is not possible, based on the bypass power supply information generated by a simple operation of turning on or off the bypass switch. As a result, the synchronization control unit of each of the three or more uninterruptible power supplies can easily synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the appropriate system, based on the bypass power supply information generated by a simple operation of turning on or off the bypass switch.
[0014] In an uninterruptible power supply system in which an information communication unit included in each of the above-mentioned uninterruptible power supplies generates interlock information to prevent the bus voltage of its own system from being selected as a target to be synchronized by another system, preferably, the synchronization control unit included in each of the uninterruptible power supplies is configured to determine whether the detection information is normal, generate bus normal state information when it is determined that the bus voltage of its own system is normal, and generate bus abnormal state information and communicate this to the information communication unit when it is determined that the bus voltage of its own system is not normal, and the information communication unit included in each of the uninterruptible power supplies is configured to generate priority synchronization information to prevent the bus voltage of its own system from being preferentially selected as a target to be synchronized by the other system when it acquires operating state information from the other system including bypass power supply information that the uninterruptible power supply of its own system is supplying power using a bypass circuit, bus normal state information, priority synchronization information, and bus voltage detection abnormality information indicating that the uninterruptible power supply of the other system is no longer able to detect the bus voltage. With this configuration, each synchronization control unit of the uninterruptible power supplies can switch the synchronization target based on the interlock information generated based on the bypass power supply information, the bus normal state information, and the operation state information including the priority synchronization information. As a result, each synchronization control unit of the three or more uninterruptible power supplies can synchronize the voltage output by the power conversion unit of its own system with the bus voltage of the system for which the interlock information is not generated.
[0015] In this case, preferably, the information communication unit included in each of the uninterruptible power supplies is configured to generate priority synchronization information when the bus normal state information is acquired through communication with the other system in a state in which the own system is not generating interlock information, and the synchronization control unit included in each of the uninterruptible power supplies is configured to perform control to synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the other system of the uninterruptible power supply outputting the priority synchronization information. With this configuration, the synchronization control unit of each of the uninterruptible power supplies can appropriately select which system's bus voltage to synchronize based on the priority synchronization information. As a result, each synchronization control unit of three or more systems of uninterruptible power supplies can easily synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the system outputting the priority synchronization information based on the priority synchronization information.
[0016] In order to achieve the above object, a power supply method using an uninterruptible power supply system according to a second aspect of the present invention is a power supply method using an uninterruptible power supply system for supplying power to three or more loads using three or more uninterruptible power supplies, each including a power conversion unit that converts power of an AC power supply and outputs it to a load, and a bypass circuit that directly outputs the power of the AC power supply to the load, the method including a detection step of detecting a voltage of a bypass circuit of the uninterruptible power supply and a bus voltage output from the power conversion unit of the uninterruptible power supply, detection information obtained based on a detection result of the detection step, and The method includes an information communication step of communicating operating state information regarding the operating state of the power source, and a synchronization control step of controlling the voltage output by the power conversion unit of the own system to be switched to and synchronized with the voltage of the bypass circuit of the own system or the bus voltage of the other system based on the detection information and the operating state information, and the synchronization control step, when operating state information is obtained that there is an uninterruptible power supply of the other system in which the bus voltage cannot be synchronously controlled, controls the voltage output by the power conversion unit of the own system to be synchronized with the bus voltage of the uninterruptible power supply of the other system in which the bus voltage cannot be synchronously controlled.
[0017] In the power supply method using the uninterruptible power supply system according to the second aspect of the present invention, as described above, when the operation state information is acquired indicating that there is an uninterruptible power supply of another system in which the bus voltage cannot be synchronously controlled, the synchronization control step controls the voltage output by the power conversion unit of the own system to be synchronized with the bus voltage of the uninterruptible power supply of the other system in which the bus voltage cannot be synchronously controlled. In this way, even if the voltage output by the uninterruptible power supply of any system becomes uncontrollable when three or more systems of multiple uninterruptible power supplies are used, the voltage of each bus of the system in which the voltage can be controlled can be synchronized with the voltage of the bus of the system in which the bus voltage cannot be controlled. As a result, it is possible to provide a power supply method that can appropriately synchronize the outputs of each of the three or more uninterruptible power supplies when supplying power to a load by synchronously controlling the three or more uninterruptible power supplies, even if the output of any of the uninterruptible power supplies of the systems cannot be synchronously controlled. Effect of the Invention
[0018] According to the present invention, when three or more uninterruptible power supplies are synchronously controlled to supply power to a load, an uninterruptible power supply system is provided that can appropriately synchronize the outputs of three or more uninterruptible power supplies even if the outputs of any of the uninterruptible power supplies cannot be synchronously controlled. [Brief description of the drawings]
[0019] [Figure 1] 1 is a diagram showing a configuration of an uninterruptible power supply system according to an embodiment of the present invention. [Diagram 2] 2 is a diagram showing a circuit configuration of an information communication unit in the uninterruptible power supply according to one embodiment of the present invention. FIG. [Diagram 3] FIG. 11 is a diagram showing an example of each signal in a switching operation of a synchronization target according to an embodiment of the present invention. [Figure 4] 11 is a flowchart illustrating processing of a switching operation of a synchronization target according to an embodiment of the present invention. [Diagram 5]FIG. 11 is a diagram showing an example of each signal in a switching operation of a synchronization target according to an embodiment of the present invention. [Figure 6] FIG. 13 is a diagram showing a configuration of an uninterruptible power supply system provided with a bypass unit according to a modified example of the present invention. [Figure 7] FIG. 13 is a diagram showing a configuration of an uninterruptible power supply system in which uninterruptible power supplies are connected in parallel according to a modified example of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0020] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
[0021] The configuration of an uninterruptible power supply system 200 according to this embodiment will be described with reference to FIG.
[0022] (Configuration of uninterruptible power supply system 200) As shown in FIG. 1, the uninterruptible power supply system 200 is a system that supplies power output from an AC power supply S to three loads 50a, 50b, and 50c through a first system A, a second system B, and a third system C. The uninterruptible power supply system 200 includes transformers 1a, 1b, and 1c for converting the power supplied from the AC power supply S, and switches 40a, 40b, and 40c for switching the system that supplies power to the loads 50a, 50b, and 50c. The uninterruptible power supply system 200 also includes a first bypass circuit 30a and an uninterruptible power supply 100a in the first system A. The uninterruptible power supply system 200 also includes a first bypass circuit 30b and an uninterruptible power supply 100b in the second system B. The uninterruptible power supply system 200 also includes a first bypass circuit 30c and an uninterruptible power supply 100c in the third system C. In the following explanation, the configuration of the first system A will be explained, but the same explanation can be applied to the second system B and the third system C.
[0023] The first bypass circuit 30a is configured to be partly included in the uninterruptible power supply 100a of the first system A, and is a circuit for transmitting the power output from the transformer 1a to the connection point Aout on the bus bar 10a of the first system A. The first bypass circuit 30a is configured to include a switch 31a, a power line 32a, a thyristor switch 33a, and a first bypass switch 34a. In the uninterruptible power supply 100a of the first system A, when the power conversion unit 20a cannot operate normally due to an abnormality, the switch 31a is turned on, and power is supplied to the connection point Aout on the bus bar 10a of the first system A through the thyristor switch 33a. Then, when a current flows through the thyristor switch 33a and the first bypass switch 34a is turned on, the power is switched to be supplied via the first bypass switch 34a. The power line 32a used in the first bypass circuit 30a may be a cable wire with a coated solid wire or a coated twisted wire, or a metal bus bar.
[0024] The second bypass circuit 2a is a circuit for transmitting power supplied from the AC power source S to the loads 50a to 50c via the second bypass circuit 2a when the uninterruptible power source 100a of the first system A is removed for maintenance, replacement, or the like. The second bypass circuit 2a is a power line for transmitting the power output from the transformer 1a to a connection point Aout in the bus bar 10a of the first system A. The second bypass circuit 2a also includes a second bypass switch 3a that opens and closes as necessary. As the power line used in the second bypass circuit 2a, a cable wire coated with a solid wire or a twisted wire, or a metal bus bar is used.
[0025] The uninterruptible power supply 100a is a power supply for supplying power to the loads 50a to 50c even in an emergency such as a power outage, and is also called a UPS (Uniterruptible Power System). The uninterruptible power supply 100a includes a first bypass circuit 30a, a power conversion unit 20a including a converter unit 21a and an inverter unit 22a, a detection unit 7a for detecting the voltage of the first bypass circuit 30a and the voltage of a connection point Aout in the bus bar 10a, a synchronization control unit 8a for controlling the operation of the power conversion unit 20a, and an information communication unit 9a for communicating information obtained based on the results detected by the detection unit 7a.
[0026] The detection unit 7a is composed of a voltage dividing resistor and detects the voltage of the first bypass circuit 30a supplied via the transformer 12a and the voltage of the connection point Aout in the bus bar 10a supplied via the transformer 11a. The detection unit 7a is also connected to the synchronization control unit 8a, and detection information including information such as the voltage value, frequency, and phase of the detected voltage is transmitted to the synchronization control unit 8a.
[0027] The synchronization control unit 8a is connected to the detection unit 7a, the information communication unit 9a, and the power conversion unit 20a, and controls the operation of the power conversion unit 20a based on detection information based on the voltage detected by the detection unit 7a and detection information from other systems acquired from the information communication unit 9a. More specifically, the synchronization control unit 8a controls the operation of the inverter unit 22a so that the voltage at the connection point Aout on the bus 10a output from the inverter unit 22a of the power conversion unit 20a is synchronized with either the voltage of the first bypass circuit 30a, the voltage at the connection point Bout on the bus 10b of the B system, or the voltage at the connection point Cout on the bus 10c of the C system. The synchronization control unit 8a also determines whether the detection information transmitted from the detection unit 7a is within a normal range, and performs control such as switching the synchronization target of the voltage output by the inverter unit 22a based on the result of the determination. The synchronization control unit 8a is implemented, for example, on a PCB board, using a microcomputer or the like. The synchronization control unit 8a includes a CPU (Central Processing Unit) as a processor, a ROM (Read Only Memory), and a RAM (Random Access Memory).
[0028] The information communication unit 9a is connected to the synchronization control unit 8a in the first system A, the bypass information communication unit 15a, and the information communication unit 9b in the second system B, and communicates detection information obtained based on the results detected by the detection unit 7a and operation state information generated by the synchronization control unit 8a. The information communication units 9a, 9b, and 9c are connected in a loop. The information communication unit 9a acquires detection information obtained based on the results detected by the detection units 7b and 7c by communicating with the other information communication units 9b and 9c connected in a loop, and transmits the detection information to the synchronization control unit 8a. The information communication units 9a to 9c are composed of electronic circuits including logic circuits.
[0029] The information communication units 9a to 9c included in the uninterruptible power supplies 100a to 100c are configured to form a loop (annular) when viewed as a whole, and each of the information communication units 9a to 9c can acquire information output by all of the information communication units 9a to 9c by communicating information with the other information communication units 9a to 9c connected to it. Here, a description will be given assuming that an uninterruptible power supply 100d is added, and the information communication units 9a to 9d included in each of the uninterruptible power supplies 100a to 100d are connected in a loop in the order of 9a, 9b, 9c, and 9d. In this case, the information communication units 9a and 9d are not directly connected to each other, but communicate information to each other via the information communication units 9b and 9c connected in a loop. Also, the information communication units 9b and 9c are not directly connected to each other, but communicate information to each other via the information communication units 9a and 9d connected in a loop. In this way, even if the number of uninterruptible power supplies is increased to four or more, information can be communicated by connecting the information communication units included in each of the uninterruptible power supplies in a loop, without connecting all of the information communication units to each other.
[0030] Also, a case where a communication line connecting the information communication unit 9a of the uninterruptible power supply 100a and the information communication unit 9d of the uninterruptible power supply 100d fails to communicate information due to a breakdown or the like will be described. In this case, the information communication unit 9a of the uninterruptible power supply 100a and the information communication unit 9d of the uninterruptible power supply 100d cannot communicate information using the communication lines connecting them to each other, but they communicate information to each other using the communication line connecting the information communication unit 9a of the uninterruptible power supply 100a and the information communication unit 9b of the uninterruptible power supply 100b, the communication line connecting the information communication unit 9b of the uninterruptible power supply 100b and the information communication unit 9c of the uninterruptible power supply 100c, and the communication line connecting the information communication unit 9c of the uninterruptible power supply 100c and the information communication unit 9d of the uninterruptible power supply 100d. In this way, even if a communication failure occurs at one point among the information communication units 9a to 9d connected in a loop, the information communication units 9a to 9d can communicate information to each other.
[0031] Here, the internal configuration of the information communication unit 9a will be described with reference to FIG. 2. The information communication unit 9a is configured to include logic circuits L1 to L11, switches sw1L to sw3L, delay circuits L12 and L13, and a block diode L14. When the switches are in an open state (off state), a signal of "0" is input to the information communication unit 9a from various switches, and when the switches are in a closed state (on state), a signal of "1" is input to the information communication unit 9a. The information communication unit 9a is configured to generate operating state information based on the state of each open / close switch input to a hardware circuit using the logic circuits L1 to a11 and the like, and to communicate with the information communication units 9b and 9c of other systems. When the power output switch 16a is closed, the power output switch 16a signal "1" is input to the information communication unit 9a, and sw1a and sw2a are turned on. This allows the information communication unit 9a to communicate with the information communication units 9b and 9c of other systems.
[0032] (Generation of bypass power supply information) The information communication unit 9a generates bypass power supply information indicating that power is being supplied using the first bypass circuit 30a in the first system A, which is the local system. When the power output switch 16a signal "1" is input and the switch sw2L is on, the information communication unit 9a receives a bypass switch 34a signal "1" as bypass power supply information when the first bypass switch 34a is closed. When the bypass switch 34a signal "1" is input, the information communication unit 9a transmits the signal to the information communication units 9b and 9c of the other systems. Note that for the information communication units 9b and 9c, the bypass power supply information acquired from the information communication unit 9a is included in the operation state information indicating that "there is an uninterruptible power supply of another system in a state in which the bus voltage cannot be synchronously controlled."
[0033] (Generating interlock information) The information communication unit 9a also generates interlock information for preventing the voltage of the busbar 10a of the own system from being selected as a target for synchronization by the other system. The information communication unit 9a generates the interlock information when the power output switch 16a signal "1" is not input and the switches sw1L and sw2L are off. The information communication unit 9a also generates the interlock information when at least one of the first bypass switches 34b and 34c of the other system is turned on and the first bypass switch 34b signal "1" or the first bypass switch 34c signal "1", which is bypass power supply information, is acquired from the information communication unit 9b or 9c, or when the first bypass switch 34a of the own system is turned on and the first bypass switch 34a signal "1" is input. The information communication unit 9a also generates the interlock information when it acquires "priority synchronization information" (described later) from the information communication unit 9b or the information communication unit 9c. Here, the information communication unit 9a receives a bus voltage detection abnormality signal, which is bus voltage detection abnormality information, and outputs "0" when the uninterruptible power supply 100a of the own system can normally detect the voltages of the bus bars 10b and 10c of the other systems, and outputs "1" when the uninterruptible power supply 100a of the own system cannot normally detect the voltages. The information communication unit 9a also generates interlock information when any of the inverter switch signal "1" indicating that the inverter switch 6a is on, the inverter power supply 6a signal "1" indicating that the inverter unit 22a is supplying power, and the bus normal state signal "1" indicating that the voltage of the bus bar 10a is normal is not input, the bus voltage detection abnormality signal of the own system is "0", and the bus voltage detection signal "1" is acquired from at least one of the uninterruptible power supply 100b of the second system B and the uninterruptible power supply 100c of the third system C. The interlock information is output as a "1" signal from logic circuit L7 by delay circuit L12 as an input to logic circuit L10 after a predetermined time has elapsed.
[0034] (Generating priority synchronization information) The information communication unit 9a generates priority synchronization information for preferentially selecting the bus 10a of the own system as a system having a right to be synchronized, which is a target for synchronization of the voltage of the bus 10a of the own system from the other system. When the bus voltage detection signal "1" indicating that the bus voltage has been detected in the first system A and either the inverter switch signal "1" or the bypass switch signal "1" are input in the first system A, which is the own system, in a state where the signal "1" is not output from the logic circuit L7, the information communication unit 9a outputs a signal "1" from the logic circuit L10 as priority synchronization information. The signal "1" output from the logic circuit L10 is transmitted to the information communication unit 9b and the information communication unit 9c of the other system via the switch sw1L by the delay circuit L13 after a predetermined time has elapsed. In addition, when a signal "1" is output from logic circuit L8, a signal "0" is input to switch sw3L by logic circuit L9, turning switch sw3L off, thereby preventing the first system A, which is its own system, from outputting priority synchronization information and thereby generating interlock information.
[0035] As shown in FIG. 1, the power conversion unit 20a is for outputting power from the AC power source S, supplied via the transformer 1a, as a voltage to the connection point Aout on the bus bar 10a. The power conversion unit 20a is configured to be able to be disconnected from the AC power source S and the load 50a by opening (turning off) the switches 4a, 5a and the inverter switch 6a. When power is output using the power conversion unit 20a, the switches 4a, 5a and the inverter switch 6a are closed (turned on) to supply power to the converter unit 21a. The converter unit 21a is a so-called AC-DC converter that can convert supplied AC power into DC power. The DC power output from the converter unit 21a is stored in a storage unit (not shown) and is output to the inverter unit 22a. When DC power is supplied from the converter unit 21a or the storage unit (not shown), the inverter unit 22a is controlled by the synchronization control unit 8a to output the desired AC power as a voltage at the connection point Aout on the bus bar 10a. The converter section 21a and the inverter section 22a are each configured with an electronic circuit that combines a diode bridge, a switch, and the like.
[0036] The switch 40a is connected to a connection point Aout on the bus bar 10a, a connection point Bout on the bus bar 10a, and a load 50a. The switch 40a is for switching between the power at the connection point Aout on the bus bar 10a and the power at the connection point Bout on the bus bar 10a so as to supply either the power to the load 50a. The switch 40a is a switch using, for example, a relay, and switches the power to be supplied to the load 50a under desired conditions according to settings. The load 50a is an electric device that operates using AC power, such as a motor or a pump.
[0037] (Power supply method with synchronous control by uninterruptible power supply system 200) Next, a process of switching the synchronization target in the uninterruptible power supply system 200 in this embodiment will be described with reference to Figures 2 to 5. This operation of switching the synchronization target is performed at any timing or at predetermined time intervals.
[0038] In this description, first, it is assumed that each of the first system A, the second system B, and the third system C supplies power to the load side using the power conversion units 20a, 20b, and 20c of the uninterruptible power supplies 100a to 100c without using the first bypass circuits 30a to 30c and the second bypass circuits 2a to 2c. Here, in this embodiment, the second system B has a right to be synchronized so as to be a target for synchronization from the first system A and the third system C. Specifically, the synchronization control unit 8a of the uninterruptible power supply 100a controls the operation of the inverter unit 22a so as to synchronize with the voltage of the connection point Bout on the bus 10b of the second system B. Similarly, the synchronization control unit 8c of the uninterruptible power supply 100c controls the operation of the inverter unit 22c so as to synchronize with the voltage of the connection point Bout on the bus 10b of the second system B. In addition, power supply output switch 16a included in first system A, power supply output switch 16b included in second system B, and power supply output switch 16c included in third system C are closed (turned on), and power is supplied to loads 50a to 50c.
[0039] (When the uninterruptible power supply 100a supplies power using the first bypass circuit 30a due to an abnormality) Here, a case where the uninterruptible power supply 100a supplies power using the first bypass circuit 30a due to an abnormality will be described with reference to Figs. 2 and 3. Note that the circuit obtained by interchanging "a" and "b" in Fig. 2 and replacing "system B" with "system A" is the information communication unit 9b of the second system B, and the information communication unit 9b will also be used in the description. Each of the uninterruptible power supplies 100a to 100c detects the voltage of the first bypass circuits 30a to 30c of its own system and the voltage of the bus bars 10a to 10c output from the power conversion units 20a to 20c of its own system as a detection step. Furthermore, each of the uninterruptible power supplies 100a to 100c communicates detection information based on the detection result and operating state information related to the uninterruptible power supplies 100a to 100c as an information communication step.
[0040] Here, at t1 in FIG. 3, for example, if an abnormality occurs in the power conversion unit 20a of the first system A and the first bypass switch 34a is closed (turned on) to perform bypass power supply, the first bypass switch 34a signal "1" as an operation state signal is input to the logic circuit L1 of the information communication unit 9b. As a result, the logic circuit L2 outputs a signal of "1", and at time t2 in FIG. 3, the logic circuit L7 of the first system A outputs an interlock signal "1" which is interlock information. In addition, as the interlock signal "1" is output, the priority synchronization signal which is the priority synchronization information of the logic circuit L10 of the second system B changes from "1" to "0". After that, the signal input to the logic circuit L3 of the information communication unit 9a of the first system A becomes "0", so that at time t3, the interlock signal which is the output of the logic circuit L7 as interlock information changes from "1" to "0". In the first system A, the priority synchronization signal changes from "0" to "1" at time t4 after the time set by the delay circuit L13 has elapsed due to the release of the interlock information. In this way, the first system A acquires the right to be synchronized from the other systems, and as a synchronization control step, the synchronization target of the outputs of the power conversion units 20a-20c included in each of the uninterruptible power supplies 100a-100c is switched from the voltage of the bus bar 10b of the second system B to the voltage of the bus bar 10a of the first system A.
[0041] (When the uninterruptible power supply 100a cannot observe the bus voltage of another system due to an abnormality) Next, a case where the uninterruptible power supply 100a cannot observe the bus voltage of the other system due to an abnormality will be described with reference to Figs. 2, 4, and 5. The circuit in Fig. 2 in which "a" and "b" are swapped and "system B" is replaced with "system A" is the information communication unit 9b, and the information communication unit 9b will also be used in the description. When the synchronization target switching operation is started, as step S1 in Fig. 4, the information communication unit 9a in the uninterruptible power supply 100a of the first system A acquires detection information of the voltage of the connection point Bout on the bus 10b of the second system B and the connection point Cout on the bus 10b of the third system C. Here, for example, in the case where the synchronization control unit 8a cannot detect the voltage of the connection point Bout on the bus 10b of the other system and the connection point Cout on the bus 10c due to a failure of the uninterruptible power supply 100a in the first system A, the operation processing of the uninterruptible power supply 100a in the first system A will be described. When there is an abnormality in detecting the voltages at the bus bars 10b and 10c of the other systems, the uninterruptible power supply 100a in the first system A receives a bus bar voltage detection abnormality signal "1" and proceeds to Yes in step S1 of Fig. 4. Then, the process proceeds to step S2.
[0042] In step S2, the uninterruptible power supply 100a of the first system A outputs an alarm. This alarm is output from the main body of the uninterruptible power supply 100a by sound, screen display, etc. so that an operator can notice a failure in the uninterruptible power supply 100a. Then, the process proceeds to step S3.
[0043] In step S3, the voltage of the bus 10a of the first system A acquires a right to be synchronized, which indicates that the voltage of the bus 10a of the first system A is to be synchronized by the uninterruptible power supplies 100b and 100c of the other systems. Here, the operation when the voltage of the bus 10a of the first system A acquires the right to be synchronized will be specifically described with reference to FIG. 3 and FIG. 5. First, it is assumed that the synchronization control unit 8a of the uninterruptible power supply 100a in the first system A is unable to detect the voltage of the connection point Bout on the bus 10b of the other system and the connection point Cout on the bus 10c at time t11 in FIG. 5. At this time, as shown in FIG. 2, the information communication unit 9b of the uninterruptible power supply 100b of the second system B receives an input of "1" as the other system bus voltage detection abnormality signal, and the interlock information is output from the logic circuit L7 as "1" to the logic circuit L10 via the delay circuit L12. When the interlock information signal "1" is input, the logic circuit L10 outputs the priority synchronization information as a signal "0". As a result, at time t12 in FIG. 5, the second system B switches the interlock signal from "0" to "1" and the priority synchronization signal from "1" to "0". Also, since the priority synchronization signal in the second system B has changed from "1" to "0", at time t13, the output signal of the logic circuit L3 of the information communication unit 9a of the first system A becomes "0", and the interlock signal of the information communication unit 9a changes from "1" to "0". As the interlock information (interlock signal "1") is released, the information communication unit 9a of the first system A outputs the priority synchronization signal from the logic circuit L10, and after the time set by the delay circuit L13 has elapsed, at time t14, the first system A acquires the right to be synchronized. This completes the process of switching the synchronization target.
[0044] Next, the operation of the uninterruptible power supply 100b of the second system B will be described when the uninterruptible power supply 100a cannot observe the bus voltage of the other system due to an abnormality. The information communication unit 9b in the uninterruptible power supply 100b of the second system B acquires detection information of the voltage of the connection point Aout on the bus 10a of the first system A and the connection point Cout on the bus 10b of the third system C. When the uninterruptible power supply 100b in the second system B can normally detect the bus voltage of the other system, it selects No in the flowchart of FIG. 4 and proceeds to the process of step S4.
[0045] In step S4, the information communication unit 9b of the uninterruptible power supply 100b judges whether the uninterruptible power supplies 100a and 100c of the other systems can detect the bus voltage of the other system. The information communication unit 9b of the uninterruptible power supply 100b acquires through communication that the other system bus voltage detection abnormality signal "1" indicating that the bus voltage of the other system cannot be detected normally in the first system A has been input, selects Yes, and proceeds to the processing of step S5.
[0046] In step S5, the information communication unit 9b of the uninterruptible power supply 100b judges whether or not its own system has the right to be synchronized, which indicates that its own system is the target for synchronization from the other system. Since the information communication unit 9b of the uninterruptible power supply 100b outputs a signal "1" which is priority synchronization information from the logic circuit L10 and is synchronized from the other system, it selects Yes and proceeds to the processing of step S6.
[0047] In step S6, the information communication unit 9b of the uninterruptible power supply 100b operates so that its own system abandons the asynchronous right. "1" is input to the other system bus voltage detection abnormality signal, and the interlock information is output as "1" from the logic circuit L7 to the logic circuit L10 via the delay circuit L12. The logic circuit L10, which had been outputting the priority synchronization information "1", switches the priority synchronization information from "1" to "0" based on the input interlock information. As a result, the priority synchronization information becomes "0" and the asynchronous right is abandoned. Thereafter, the synchronization target switching process is completed.
[0048] (When the uninterruptible power supplies 100a to 100c normally detect the bus voltage of other systems) Next, a case where the uninterruptible power supplies 100a to 100c are operating normally in each of the systems A to C will be described. The operation of the uninterruptible power supply 100a in the first system A will be described. When the synchronization target switching operation is started, as step S1 in FIG. 4, the information communication unit 9a in the uninterruptible power supply 100a in the first system A acquires detection information of the voltage of the connection point Bout on the bus 10b of the second system B and the connection point Cout on the bus 10b of the third system C. When the information communication unit 9a of the uninterruptible power supply 100a in the first system A can normally detect the bus voltage of the other system, the bus voltage detection abnormality signal "0" is input to the logic circuits L5 and L6, and the flow chart in FIG. 4 proceeds to No. Then, the flow proceeds to the processing of step S4.
[0049] In step S4, the information communication unit 9a of the first system A acquires the bus voltage detection abnormality signals of the uninterruptible power supplies 100b and 100c of the other systems by communicating with the information communication unit 9b of the uninterruptible power supplies 100b and 100c of the other systems. If there is no abnormality in the uninterruptible power supplies 100b and 100c of the other systems, the information communication unit 9a of the first system A acquires the bus voltage detection abnormality signals "0" from both the second system B and the third system C and inputs them to the logic circuit L5, and the flow chart of FIG. 4 proceeds to No, and the switching operation of the synchronization target is completed. Specifically, the information communication unit 9a generates the interlock signal "0" of the logic circuit L7, which is interlock information, based on the bus detection abnormality signal "0" of the other system being input to the logic circuit L5, and the priority synchronization information "0" is output from the logic circuit L10. As a result, the operation is completed without switching the synchronization target.
[0050] In this manner, even when three or more uninterruptible power supplies 100a-100c are used to supply power to loads 50a-50c, each of systems A to C performs an operation of switching the synchronization target to the voltage of the bus bars 10a-10c of the system that is unable to synchronize its own system's voltage with the voltage of the bus bars 10a-10c of the other system.
[0051] (Effects of this embodiment) Next, the effects of this embodiment will be described.
[0052] The uninterruptible power supply system 200 of the present embodiment supplies power to the three or more loads 50a-50c using three or more systems of uninterruptible power supplies 100a-100c, each of which includes power conversion units 20a-20c that convert power of an AC power supply S and output the power to the loads 50a-50c, and first bypass circuits 30a-30c that directly output the power of the AC power supply S to the loads 50a-50c. Each of the uninterruptible power supplies 100a-100c includes detection units 7a-7c that detect the voltage of the first bypass circuit 30a-30c of its own system in the uninterruptible power supplies 100a-100c and the voltage of the bus bars 10a-10c output from the power conversion units 20a-20c of its own system, detection information obtained based on the detection results of the detection units 7a-7c, and The system includes information communication units 9a to 9c which communicate operating state information relating to the operating state, and synchronization control units 8a to 8c which perform control to switch and synchronize the voltage output by the power conversion units 20a to 20c of the own system with the voltage of the first bypass circuit 30a to 30c of the own system or the voltage of the bus bars 10a to 10c of the other system based on the detection information and the operating state information, and the synchronization control units 8a to 8c are configured to perform control to synchronize the voltage output by the power conversion units 20a to 20c of the own system with the voltage of the bus bars 10a to 10c of the uninterruptible power supplies 100a to 100c of the other system which is in a state where the voltage of the bus bars 10a to 10c cannot be synchronously controlled when operating state information is obtained that indicates that there is an uninterruptible power supply 100a to 100c of the other system which is in a state where the voltage of the bus bars 10a to 10c cannot be synchronously controlled. Thus, when three or more systems of uninterruptible power supplies 100a-100c are used, even if the voltage output by any of the uninterruptible power supplies 100a-100c of the systems cannot be controlled, the voltage of each of the bus bars 10a-10c of the system whose voltage can be controlled can be synchronized with the voltage of the bus bar 10a-10c of the system whose voltage cannot be controlled. As a result, when the three or more systems of uninterruptible power supplies 100a-100c are synchronously controlled to supply power to the loads 50a-50c, even if the outputs of any of the uninterruptible power supplies 100a-100c of the systems cannot be synchronously controlled, the outputs of the three or more systems of uninterruptible power supplies 100a-100c can be appropriately synchronized.
[0053] In the uninterruptible power supply system 200 of this embodiment, the synchronization control units 8a to 8c are configured, when operating status information is acquired indicating that there is an uninterruptible power supply 100a to 100c of another system in which the voltage of the bus bars 10a to 10c cannot be synchronously controlled due to a malfunction of some of the components contained in the uninterruptible power supplies 100a to 100c, to perform control to synchronize the voltage output by the power conversion units 20a to 20c of the own system with the voltage of the bus bars 10a to 10c of the uninterruptible power supplies 100a to 100c of the other system in which the voltage of the bus bars 10a to 10c cannot be synchronously controlled. Thus, when three or more systems of uninterruptible power supplies 100a-100c are used, even if any of the systems of the uninterruptible power supplies 100a-100c cannot control the output voltage due to malfunction of some of the components included in the uninterruptible power supplies 100a-100c, each of the systems of the uninterruptible power supplies 100a-100c that can control the voltage synchronizes with the output voltage of the system that cannot control the voltage. As a result, when the three or more systems of the uninterruptible power supplies 100a-100c are synchronously controlled to supply power to the three or more loads 50a-50c, even if any of the systems of the uninterruptible power supplies 100a-100c cannot synchronously control the output due to malfunction of some of the components included in the uninterruptible power supplies 100a-100c, the outputs of the three or more systems of the uninterruptible power supplies 100a-100c can be synchronized.
[0054] In this embodiment, the information communication units 9a to 9c included in each of the uninterruptible power supplies 100a to 100c generate interlock information for preventing the voltage of the busbars 10a to 10c of the own system from being selected as a target for synchronization by other systems, and the operation state information includes information that the information communication units 9a to 9c in the uninterruptible power supplies 100a to 100c of the own system have not generated interlock information. As a result, the synchronization control units 8a to 8c included in each of the uninterruptible power supplies 100a to 100c perform control to switch the voltage output by the power conversion units 20a to 20c of the own system to the voltage of the busbars 10a to 10c of the system that outputs operation state information not including interlock information, based on the operation state information including the interlock information, to synchronize the voltage. As a result, the synchronization control units 8a to 8c of each of the three or more systems of uninterruptible power supplies 100a to 100c can prevent the output of each of the three or more systems of uninterruptible power supplies 100a to 100c from being synchronized with the voltage of the bus bars 10a to 10c of an inappropriate system.
[0055] In addition, in this embodiment, the synchronization control units 8a to 8c included in each of the uninterruptible power supplies 100a to 100c are configured to control the synchronization of the voltage output by the power conversion units 20a to 20c of the own system with the voltage of the bus bars 10a to 10c of the uninterruptible power supplies 100a to 100c having information including at least one of the following: operating state information that the uninterruptible power supplies 100a to 100c of the other system are supplying power using the first bypass circuits 30a to 30c; operating state information that the uninterruptible power supplies 100a to 100c of the other system have not generated priority synchronization information for being preferentially selected as a target to be synchronized; and operating state information indicating that the own system is in a state where it cannot normally detect the voltage of the bus bars 10a to 10c of the other system. Thus, the uninterruptible power supplies 100a-100c are configured to control synchronization with the voltages of the buses 10a-10c of the uninterruptible power supplies 100a-100c having information including at least one of the operation state information indicating that the uninterruptible power supplies 100a-100c of the other systems cannot normally detect the voltages of the buses 10a-10c of the other systems. With this configuration, when the synchronization control units 8a-8c included in each of the uninterruptible power supplies 100a-100c detect the operation state information indicating that the uninterruptible power supplies 100a-100c of the other systems are feeding power using the first bypass circuits 30a-30c, the synchronization target can be switched to the system that outputs the operation state information indicating that the uninterruptible power supplies 100a-100c of the other systems are feeding power using the first bypass circuits 30a-30c. Also, when the synchronization control units 8a-8c detect the operation state information indicating that the uninterruptible power supplies 100a-100c of the other systems have not generated priority synchronization information for preferentially selecting the uninterruptible power supplies 100a-100c as a synchronization target, the uninterruptible power supplies 100a-100c of the other systems can be prevented from synchronizing with the system for which priority synchronization information has not been generated. In addition, when the information is based on operating status information indicating that the local system is in a state where it cannot normally detect the voltages of the bus bars 10a to 10c of the other system, the synchronization target can be switched to the system that is outputting operating status information indicating that the local system is in a state where it cannot normally detect the voltages of the bus bars 10a to 10c of the other system.As a result, the synchronization control units 8a to 8c of each of the three or more systems of uninterruptible power supplies 100a to 100c can appropriately synchronize the voltage output by the power conversion units 20a to 20c of their own system with the voltage of the bus bars 10a to 10c of a system having information including at least one of the following among multiple operating state information: operating state information that the uninterruptible power supplies 100a to 100c of the other systems are supplying power using the first bypass circuits 30a to 30c; operating state information that priority synchronization information has not been generated in the uninterruptible power supplies 100a to 100c of the other systems to be preferentially selected as targets to be synchronized; and operating state information indicating that the own system is in a state where it cannot normally detect the voltage of the bus bars 10a to 10c of the other systems.
[0056] In this embodiment, the operation state information indicating that there is an uninterruptible power supply 100a-100c of another system in which the voltages of the buses 10a-10c cannot be synchronously controlled includes bypass power supply information indicating that the uninterruptible power supplies 100a-100c of the own system are supplying power using the first bypass circuits 30a-30c. This allows the synchronization control units 8a-8c included in each of the uninterruptible power supplies 100a-100c to synchronize with the voltages of the buses 10a-10c of the system to be synchronized, based on the operation state information including the bypass power supply information indicating that the voltages of the buses 10a-10c cannot be synchronously controlled. As a result, the synchronization control units 8a to 8c of each of the three or more systems of uninterruptible power supplies 100a to 100c can synchronize the voltage output by the power conversion units 20a to 20c of their own system with the voltage of the bus bars 10a to 10c of the system providing bypass power supply, thereby synchronizing the outputs of each of the three or more systems of uninterruptible power supplies 100a to 100c.
[0057] In the present embodiment, the first bypass circuits 30a to 30c included in each of the uninterruptible power supplies 100a to 100c include first bypass switches 34a to 34c that are turned off when power is supplied to the loads 50a to 50c via the power conversion units 20a to 20c and that are turned on when power is supplied to the loads 50a to 50c via the first bypass circuits 30a to 30c. The information communication units 9a to 9c included in each of the uninterruptible power supplies 100a to 100c include the first bypass switches 34a to 34c of their own system. When the first bypass switches 34a-34c are turned on, the synchronization control units 8a-8c included in each of the uninterruptible power supplies 100a-100c are configured to generate and communicate bypass power supply information, and the synchronization control units 8a-8c included in each of the uninterruptible power supplies 100a-100c are configured to perform control to synchronize the voltage output by the power conversion units 20a-20c of the own system with the voltage of the bus bars 10a-10c of the uninterruptible power supplies 100a-100c of the other system that outputs the bypass power supply information, based on the bypass power supply information of the other system acquired from the information communication units 9a-9c of the own system. This allows the synchronization control units 8a-8c included in each of the uninterruptible power supplies 100a-100c to synchronize the voltage of the bus bars 10a-10c with the voltage of the bus bars 10a-10c of the system in which synchronous control is not possible, based on the bypass power supply information generated by the simple operation of turning on or off the first bypass switches 34a-34c. As a result, the synchronization control units 8a to 8c of each of the three or more systems of uninterruptible power supplies 100a to 100c can easily synchronize the voltage output by the power conversion units 20a to 20c of their own system with the voltage of the bus bars 10a to 10c of the appropriate system, based on the bypass power supply information generated by the simple on / off operation of the first bypass switches 34a to 34c.
[0058] In the present embodiment, the synchronization control units 8a to 8c included in each of the uninterruptible power supplies 100a to 100c are configured to determine whether or not the detection information is normal, generate bus bar normal state information when it is determined that the voltages of the bus bars 10a to 10c of the own system are normal, and generate bus bar abnormal state information and communicate it to the information communication units 9a to 9c when it is determined that the voltages of the bus bars 10a to 10c of the own system are not normal. The information communication units 9a to 9c included in each of the uninterruptible power supplies 100a to 100c are configured to control the voltages of the bus bars 10a to 10c of the own system to be preferentially selected as targets for synchronization from other systems. and when it receives from the other system operation state information including bypass power supply information that the uninterruptible power supplies 100a-100c of its own system are supplying power using the first bypass circuits 30a-30c, bus normal state information, priority synchronization information, and bus voltage detection abnormality information indicating that the uninterruptible power supplies 100a-100c of the other system are unable to detect the voltage of the buses 10a-10c, it generates interlock information for preventing the voltage of the buses 10a-10c of its own system from being selected as a target to be synchronized by the other system. This allows the synchronization control units 8a-8c of the uninterruptible power supplies 100a-100c to switch the target to be synchronized based on the interlock information generated based on the operation state information including the bypass power supply information, bus normal state information, priority synchronization information, and bus voltage detection abnormality information. As a result, each of the synchronization control units 8a to 8c of the three or more uninterruptible power supplies 100a to 100c can synchronize the voltage output by the power conversion units 20a to 20c of its own system with the voltage of the bus bars 10a to 10c of the system that does not generate interlock information.
[0059] In this embodiment, the information communication units 9a to 9c included in each of the uninterruptible power supplies 100a to 100c are configured to generate priority synchronization information when the bus normal state information is acquired through communication with another system in a state in which the own system is not generating interlock information, and the synchronization control units 8a to 8c included in each of the uninterruptible power supplies 100a to 100c are configured to perform control to synchronize the voltage output by the power conversion units 20a to 20c of the own system with the voltage of the bus 10a to 10c of the uninterruptible power supplies 100a to 100c of the other system outputting the priority synchronization information. This allows the synchronization control units 8a to 8c of each of the uninterruptible power supplies 100a to 100c to appropriately select the voltage of the bus 10a to 10c of which system to synchronize based on the priority synchronization information. As a result, each synchronization control unit 8a to 8c of three or more uninterruptible power supplies 100a to 100c can easily synchronize the voltage output by the power conversion units 20a to 20c of its own system with the voltage of the bus bars 10a to 10c of the system that is outputting the priority synchronization information, based on the priority synchronization information.
[0060] [Variations] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present invention is indicated by the claims, not by the description of the embodiments above, and further includes all modifications (variations) within the meaning and scope of the claims.
[0061] For example, in the above embodiment, an example of the uninterruptible power supply system 200 that uses three uninterruptible power supplies 100a-100c to supply power to three loads 50a-50c is shown, but the present invention is not limited to this. The present invention may be configured to use four or more uninterruptible power supplies to supply power to four or more loads 50a-50c, and the number of uninterruptible power supplies may be increased according to the number of loads 50a-50c.
[0062] In the above embodiment, the systems A to C each include the second bypass circuit 2a separately from the uninterruptible power supplies 100a to 100c, but the present invention is not limited to this. In the present invention, each of the systems A to C may be configured to include only the uninterruptible power supplies 100a to 100c.
[0063] In the above embodiment, an example of the uninterruptible power supply system 200 is shown in which the three uninterruptible power supplies 100a to 100c are used to supply power to the three loads 50a to 50c, but the present invention is not limited to this. In the present invention, as in an uninterruptible power supply system 201 shown in a modified example in FIG. 6, each of systems A to C further includes bypass units 110a to 110c that are provided separately from the uninterruptible power supplies 100a to 100c and are connected to the bus bars 10a to 10c on the load 50a to 50c side relative to the power supply output switches 16a to 16c, and that directly output power of the AC power supply S to the loads 50a to 50c, bypass voltage detection units 13a to 13c that detect voltages of the second bypass circuits 2a to 2c, and bypass information communication units 15a to 15c that communicate detection information obtained by the bypass voltage detection units 13a to 13c, and the bypass information communication units 15a to 15c may be configured to communicate information by being connected to other information communication units 9a to 9c.
[0064] In the above embodiment, the uninterruptible power supplies 100a to 100c are operated individually in each of the systems A to C, but the present invention is not limited to this. In the present invention, each of the systems A to C may be configured such that two of the uninterruptible power supplies 101a, 102a, 101b, 102b, 101c, and 102c are connected in parallel, or three or more of them are connected in parallel, as in the uninterruptible power supply system 202 shown in a modified example in FIG.
[0065] In the above embodiment, the information communication units 9a to 9c included in each of the uninterruptible power supplies 100a to 100c are connected in a loop to communicate with each other, but the present invention is not limited to this. In the present invention, it is sufficient that each of the information communication units 9a to 9c included in each of the uninterruptible power supplies 100a to 100c can communicate with each other, and the information communication units 9a to 9c may be configured to communicate with each other by providing a mechanism for aggregating information, such as a central monitoring panel.
[0066] In addition, in the above embodiment, an example was shown in which the synchronization control units 8a to 8c are configured to perform control to synchronize the voltage output by the power conversion units 20a to 20c of their own system with the voltage of the bus bars 10a to 10c of the uninterruptible power supplies 100a to 100c of the other system in which the voltage of the bus bars 10a to 10c cannot be synchronously controlled due to a malfunction of some of the components included in the uninterruptible power supplies 100a to 100c, but the present invention is not limited to this. In the present invention, when operating status information is acquired indicating that there is another system of uninterruptible power supplies 100a-100c in which the voltage of the bus bars 10a-10c cannot be synchronously controlled due to maintenance or replacement of a portion of the uninterruptible power supplies 100a-100c, control may be performed to synchronize the voltage output by the power conversion units 20a-20c of the own system with the voltage of the bus bars 10a-10c of the other system of uninterruptible power supplies 100a-100c in which the voltage of the bus bars 10a-10c cannot be synchronously controlled.
[0067] In the above embodiment, the information communication units 9a to 9c generate various information by a hardware circuit using the logic circuits L1 to a11 and the delay circuits L12 and a13, but the present invention is not limited to this. In the present invention, the information communication units 9a to 9c or a separately provided control unit may be configured to include a CPU and may generate various information by a program based on each signal. [Explanation of symbols]
[0068] 7a, 7b, 7c detection section 8a, 8b, 8c Synchronization control section 9a, 9b, 9c Information and Communication Department 13a, 13b, 13c Bypass voltage detection section 15a, 15b, 15c Bypass information and communication section 16a, 16b, 16c power output switch 17a, 17b, 17c parallel communication circuit 20a, 20b, 20c Power conversion unit 21a, 21b, 21c Converter section 22a, 22b, 22c Inverter section 30a, 30b, 30c First bypass circuit 40a, 40b, 40c switch 50a, 50b, 50c load 100a~102a, 100b~102b, 100c~102c uninterruptible power supply 110a, 110b, 110c Bypass section 200a~202a, 200b~202b, 200c~202c Uninterruptible Power System L1~L11 Logic circuit L12, L13 Delay circuit L14 Blocking diode A. First lineage B. Second line C. The third lineage S AC power supply
Claims
1. An uninterruptible power supply system that uses three or more uninterruptible power supplies, each of which includes a power conversion unit that converts power of an AC power supply and outputs the power to a load, and a bypass circuit that directly outputs the power of the AC power supply to the load, and supplies power to the three or more loads, Each of the uninterruptible power supplies comprises: A detection unit that detects a voltage of the bypass circuit of the own system in the uninterruptible power supply and a voltage of a bus output from the power conversion unit of the own system; an information communication unit that communicates detection information acquired based on a detection result of the detection unit and operating state information related to an operating state of the uninterruptible power supply; a synchronization control unit that performs control to switch and synchronize a voltage output by the power conversion unit of the own system with a voltage of the bypass circuit of the own system or a voltage of the bus bar of the other system based on the detection information and the operation state information, An uninterruptible power supply system, wherein the synchronization control unit is configured to, when the operating status information is acquired indicating that there is an uninterruptible power supply of another system in which the bus voltage cannot be synchronously controlled, control the voltage output by the power conversion unit of the own system to be synchronized with the bus voltage of the uninterruptible power supply of the other system in which the bus voltage cannot be synchronously controlled.
2. 2. The uninterruptible power supply system according to claim 1, wherein the synchronization control unit is configured to, when the operating status information is acquired indicating that there is an uninterruptible power supply of another system in which the bus voltage cannot be synchronously controlled due to a malfunction of some of the components included in the uninterruptible power supply, perform control to synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the uninterruptible power supply of the other system in which the bus voltage cannot be synchronously controlled.
3. the information communication unit included in each of the uninterruptible power supplies generates interlock information for preventing a voltage of the bus bar of the own system from being selected as a target for synchronization by another system; The uninterruptible power supply system according to claim 1 , wherein the operating state information includes information that the information communication unit in the uninterruptible power supply of its own system has not generated the interlock information.
4. The synchronization control unit included in each of the uninterruptible power supplies adjusts a voltage output by the power conversion unit of the own system to:
2. The uninterruptible power supply system according to claim 1, wherein the uninterruptible power supply system has information including at least one of the following: the operating state information that the uninterruptible power supply of another system is supplying power using the bypass circuit; the operating state information that priority synchronization information has not been generated in the uninterruptible power supply of the other system for preferentially selecting it as a target for synchronization; and the operating state information indicating that the own system is in a state in which it cannot normally detect the voltage of the bus bar of the other system.
5. The uninterruptible power supply system according to claim 1, wherein the operating status information indicating that there is an uninterruptible power supply of another system in which the voltage of the bus bar cannot be synchronously controlled includes bypass power supply information indicating that the uninterruptible power supply of the own system is supplying power using the bypass circuit.
6. the bypass circuit included in each of the uninterruptible power supplies includes a bypass switch that is turned off when power is supplied to the load via the power conversion unit and is turned on when power is supplied to the load via the bypass circuit, the information communication unit included in each of the uninterruptible power supplies is configured to generate and communicate the bypass power supply information when the bypass switch of the own system is turned on, 6. The uninterruptible power supply system according to claim 5, wherein the synchronization control unit included in each of the uninterruptible power supplies is configured to perform control to synchronize a voltage output by the power conversion unit of one system with a bus voltage of the uninterruptible power supply of the other system that outputs the bypass power supply information, based on the bypass power supply information of the other system acquired from the information communication unit of the one system.
7. the synchronization control unit included in each of the uninterruptible power supplies is configured to determine whether the detection information is normal, generate busbar normal state information when it is determined that the busbar voltage of the own system is normal, and generate busbar abnormal state information when it is determined that the busbar voltage of the own system is not normal, and communicate the information to the information communication unit; 4. The uninterruptible power supply system of claim 3, wherein the information communication unit included in each of the uninterruptible power supplies is configured to generate priority synchronization information for preferentially selecting the bus voltage of its own system as a target for synchronization from another system, and when it acquires from the other system the operating status information including bypass power supply information indicating that the uninterruptible power supply of its own system is supplying power using the bypass circuit, the bus normal status information, the priority synchronization information, and bus voltage detection abnormality information indicating that the uninterruptible power supply of the other system is in a state where it cannot detect the bus voltage, generate the interlock information for preventing the bus voltage of its own system from being selected as a target for synchronization from the other system.
8. the information communication unit included in each of the uninterruptible power supplies is configured to generate the priority synchronization information when the bus normal state information is acquired through communication with another system in a state in which the own system is not generating the interlock information, The uninterruptible power supply system according to claim 7, wherein the synchronization control unit included in each of the uninterruptible power supplies is configured to perform control to synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the uninterruptible power supply of the other system that outputs the priority synchronization information.
9. A power supply method using an uninterruptible power supply system, which uses three or more systems of uninterruptible power supplies including a power conversion unit that converts power of an AC power supply and outputs the power to a load, and a bypass circuit that directly outputs the power of the AC power supply to the load, and supplies power to the three or more systems of the load, comprising: a detection step of detecting a voltage of the bypass circuit of the own system in the uninterruptible power supply and a voltage of a bus bar output from the power conversion unit of the own system; an information communication step of communicating detection information acquired based on a detection result of the detection step and operating state information relating to an operating state of the uninterruptible power supply; and a synchronization control step of performing control to switch and synchronize a voltage output by the power conversion unit of the own system with a voltage of the bypass circuit of the own system or a voltage of the bus bar of the other system based on the detection information and the operation state information, The synchronization control step is a power supply method using an uninterruptible power supply system, in which, when the operating status information is acquired indicating that there is an uninterruptible power supply of another system in which the bus voltage cannot be synchronously controlled, the synchronization control step performs control to synchronize the voltage output by the power conversion unit of the own system with the bus voltage of the uninterruptible power supply of the other system in which the bus voltage cannot be synchronously controlled.
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