Hybrid Semiconductor Devices

Abstract

The semiconductor device includes a switch element (120) having a surface and first and second regions (121, 122) and comprising a first semiconductor material having a bandgap. The first region (121) of the switch element (120) is coupled to a source contact (110). A floating electrode (130) has first and second ends (131, 132). The first end (131) of the floating electrode (130) is coupled to the second region (122) of the switch element (120). A voltage support structure (140) includes a second semiconductor material having a bandgap larger than the bandgap of the first semiconductor material. The voltage support structure is in contact with the second end (132) of the floating electrode (140). A drain contact (150) is coupled to the voltage support structure (140).

Description

[Technical field]

[0001] Semiconductor switching devices, such as silicon switching devices, have a wide range of applications. Semiconductor switching devices include diodes, bipolar transistors, field effect transistors (FETs), etc. For example, silicon laterally diffused metal oxide semiconductor (LDMOS) field effect transistors (FETs) can be used as power switches in the power electronics industry. Summary of the Invention

[0002] In some examples, a semiconductor device includes a switch element having a surface and first and second regions and including a first semiconductor material having a bandgap. The first region of the switch element is coupled to a source contact. A floating electrode has first and second ends. The first end of the floating electrode is coupled to the second region of the switch element. A voltage support structure includes a second semiconductor material having a bandgap larger than the bandgap of the first semiconductor material. The voltage support structure is in contact with the second end of the floating electrode. A drain contact is coupled to the voltage support structure.

[0003] In one example, a semiconductor device includes a source contact. A switch element has a surface. A first semiconductor region is of a first doping polarity and includes a channel region. A source region is of a second doping polarity and is in contact with the source contact and the first semiconductor region. A drain region is of a second doping polarity and is in contact with the first semiconductor region. A gate corresponds to the channel region of the first semiconductor region. The first semiconductor region, the source region, and the drain region each include a first semiconductor material having a bandgap. A floating electrode has first and second ends. The first end of the floating electrode is coupled to the drain region of the switch element. A voltage support structure includes a second semiconductor material having a bandgap larger than the bandgap of the first semiconductor material. The voltage support structure is in contact with the second end of the floating electrode. A drain contact is coupled to the voltage support structure.

[0004] In one example, a method for forming a semiconductor device includes forming a switch element including a first semiconductor material having a bandgap. A floating electrode having first and second ends is formed. The first end of the floating electrode is coupled to the switch element. A voltage support structure is formed. The voltage support structure includes a second semiconductor material having a bandgap larger than the bandgap of the first semiconductor material. A source contact is formed and coupled to the switch element. A drain contact is formed and coupled to the voltage support structure. A field control element is formed. [Brief description of the drawings]

[0005] For a detailed description of various examples, reference is now made to the accompanying drawings.

[0006] [Figure 1] 1 shows a block diagram of an example hybrid semiconductor device in accordance with described examples.

[0007] [Diagram 2] 1 shows a flow chart of an example method for forming a hybrid semiconductor device.

[0008] [Diagram 3] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples. [Figure 4] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples. [Diagram 5] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples. [Figure 6] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples. [Figure 7] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples. [Figure 8] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples. [Figure 9] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples. [Figure 10] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples. [Figure 11] 1A-1D show cross-sectional views of a structure at various stages in the formation of an example hybrid semiconductor device in accordance with described examples.

[0009] [Figure 12] 12 shows a flow chart of another exemplary method for forming the hybrid semiconductor device of FIG.

[0010] [Figure 13] 12 illustrates another exemplary cross-sectional view of the hybrid semiconductor device of FIG. 11.

[0011] [Figure 14]12 illustrates another exemplary cross-sectional view of the hybrid semiconductor device of FIG. 11.

[0012] [Figure 15] 4 illustrates a cross-sectional view of another exemplary hybrid semiconductor device in accordance with described examples.

[0013] [Figure 16] 5A-5C illustrate cross-sectional views of a structure at various stages in the formation of another example hybrid semiconductor device. [Figure 17] 5A-5C illustrate cross-sectional views of a structure at various stages in the formation of another example hybrid semiconductor device. [Figure 18] 5A-5C illustrate cross-sectional views of a structure at various stages in the formation of another example hybrid semiconductor device. [Figure 19] 5A-5C illustrate cross-sectional views of a structure at various stages in the formation of another example hybrid semiconductor device. [Figure 20] 5A-5C illustrate cross-sectional views of a structure at various stages in the formation of another example hybrid semiconductor device. [Figure 21] 5A-5C illustrate cross-sectional views of a structure at various stages in the formation of another example hybrid semiconductor device. [Figure 22] 5A-5C illustrate cross-sectional views of a structure at various stages in the formation of another example hybrid semiconductor device.

[0014] [Diagram 23] 23 shows a flowchart of an example method for forming the hybrid semiconductor device of FIG. 22.

[0015] [Figure 24] 1 illustrates another example hybrid semiconductor device, in accordance with described examples. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Silicon device progress has slowed and is ultimately limited by the properties of the silicon material. After more than 30 years of silicon processing development, the ability to use current semiconductor manufacturing techniques provides a path to rapid adoption and improved cost performance when producing semiconductor devices such as laterally diffused metal-oxide-semiconductor (LDMOS) field effect transistors (FETs).

[0017] The described examples include hybrid semiconductor devices as well as formation methods for forming the hybrid semiconductor devices. The illustrated hybrid semiconductor devices include a source contact, a switch element having a first semiconductor material with a bandgap, a voltage support structure including a second semiconductor material with a bandgap larger than the bandgap of the first semiconductor material, a floating electrode between the switch element and the voltage support structure coupling the switch element to the voltage support structure, a drain contact coupling the voltage support structure, and one or more field control elements. The hybrid semiconductor devices may combine a reliable switch element such as a silicon switch element with a wide bandgap (WBG) semiconductor. The WBG semiconductor in the hybrid semiconductor device may provide a voltage support region for the hybrid semiconductor device to take some or most of the applied voltage so that the voltage applied to other parts of the hybrid semiconductor device, such as the silicon switch element / portion, may be reduced. Thus, the critical voltage of the hybrid semiconductor device may be increased.

[0018] 1 shows a block diagram of an exemplary hybrid semiconductor device according to a described example. The hybrid semiconductor device 100 includes a source contact 110, a switch element 120 having a first semiconductor material with a bandgap (i.e., energy bandgap), a voltage support structure 140 including a wide bandgap (WBG) semiconductor material with a bandgap larger than the bandgap of the first semiconductor material of the switch element 120, a floating electrode 130 between the switch element 120 and the voltage support structure 140 and coupling the switch element 120 to the voltage support structure 140, a drain contact 150 coupling the voltage support structure 140, and a field control element 160. The floating electrode 130 has a first end 131 and a second end 132, the first end 131 of the floating electrode 130 being coupled to and in ohmic contact with the switch element 120, and the second end 132 of the floating electrode 130 being coupled to and in ohmic contact with the voltage support structure 140. The floating electrode may electrically couple the first component to the second component without contacting any additional voltage or current terminals other than the coupled components. In some examples, the first semiconductor material of the switch element 120 includes at least one of silicon, germanium, or gallium arsenide.

[0019] In some examples, a first end 131 of the floating electrode 130 is in ohmic contact with a second region 122 of the switch element 120, a second end 132 of the floating electrode 130 is in ohmic contact with the voltage support structure 140, and a first region of the switch element 120 is in ohmic contact with the source contact 110. In some examples, the field control element 160 extends from the switch element 120 towards the drain contact 150.

[0020] The structures / components 110, 120, 130, 140, 150, and 160 may be configured in various orientations relative to one another, such as, for example, in-plane, out-of-plane, and / or any other suitable orientation, depending on the application scenario. In one example, the voltage support structure 140 is on the floating electrode 130 and the switch element 120 is along the out-of-plane direction. In another example, the voltage support structure 140 is adjacent to the floating electrode 130 and the switch element 120 is along the in-plane direction.

[0021] The doped semiconductors can be p-type semiconductors doped with electron acceptor dopants or n-type semiconductors doped with electron donor dopants. Any of the following doping levels can be chosen for the components of the hybrid semiconductor device depending on various application scenarios. The doping level of p-type semiconductors is 3×10 16 cm -3 p-doping level less than 3×10 16 cm -3 ~1×10 19 cm -3 or 1×10 19 cm -3 The doping level of the n-type semiconductor is 3×10 16 cm -3 n-doping level less than 3×10 16 cm -3 ~1×10 19 cm -3 n-doping levels in the range of 1×10 19 cm -3 There may be a higher n+ doping level. The doping polarity may refer to p-type doping or n-type doping.

[0022] FIG. 2 illustrates a flow chart of an exemplary method for forming a hybrid semiconductor device, as hereinafter described with reference to FIG.

[0023] In S701, a switch element is formed including a first semiconductor material having a bandgap. In some examples, the switch element (e.g., 120) is formed by, for example, vapor deposition, ion implantation, and / or etching. In some examples, the switch element 120 includes at least one of a diode, a bipolar transistor, a field effect transistor (FET), or an insulated gate bipolar transistor (IGBT), and the material of the switch element 120 includes silicon having a bandgap. In some examples, the field effect transistor is a p-type field effect transistor or an n-type field effect transistor including a gate. In some examples, the switch element includes a laterally diffused metal oxide semiconductor (LDMOS) field effect transistor. In some examples, the switch element includes an insulated gate bipolar transistor (IGBT), such as a lateral insulated gate bipolar transistor (LIGBT).

[0024] At S702, a floating electrode having first and second ends is formed. In some examples, a floating electrode 130 having first and second ends (131, 132) is formed, for example by deposition, where the first end 131 of the floating electrode 130 is coupled to and in ohmic contact with the switch element 120 and the second end 32 of the floating electrode 130 is coupled to and in ohmic contact with the voltage support structure 140.

[0025] At S703, a voltage support structure is formed that includes a second semiconductor material having a bandgap larger than the bandgap of the first semiconductor material. In some examples, the voltage support structure 140 is formed by deposition and / or ion implantation, and the voltage support structure 140 includes a WBG semiconductor material having a bandgap larger than the bandgap of the first semiconductor material, such as silicon of the switch element 120.

[0026] At S704, a drain contact is formed that is coupled to the voltage support structure. In some examples, the drain contact 150 is formed by deposition, where the drain contact 150 is coupled to the voltage support structure 140 and is in ohmic contact with the voltage support structure 140.

[0027] In S705, a source contact is formed which is coupled to the switch element 120. In some examples, the source contact 110 is formed by deposition, and the source contact 110 is coupled to the switch element 120 and in ohmic contact with the switch element 120.

[0028] In S706, the electric field control element is formed. In some examples, the electric field control element 160 includes a field plate, and the field plate is formed by deposition. In other examples, the electric field control element 160 includes a component of the switch element 120 that is formed during the formation of the switch element 120.

[0029] In this description, steps or processes may be performed in any suitable order. In some examples, forming a switch element including a first semiconductor material (S701) may be performed before forming a voltage support structure including a second semiconductor material (S703). In other examples, forming a switch element including a first semiconductor material (S701) may be performed after forming a voltage support structure including a second semiconductor material (S703). For example, after a voltage support structure including a second semiconductor material is formed, a switch element including a first semiconductor material is formed, for example, via a process for forming an LDMOS FET.

[0030] Figures 3-11 show cross-sectional views of a structure at various stages in the formation of an exemplary hybrid semiconductor device 300, and Figure 12 shows a corresponding flow chart of an exemplary method for forming the hybrid semiconductor device 300. Figures 3-11 will be described with reference to the flow chart of Figure 12.

[0031] FIG. 3 illustrates a semiconductor layer 310 including source region 320, drift region 330, body region 315 including channel region 316, and body contact region 340, and in FIG. 12 this step is illustrated as step 801 in FIG. 12 as forming the source region, drift region, body region, and body contact region in the semiconductor layer.

[0032] The semiconductor layer 310 has a first surface 311 and an opposing second surface 312. The semiconductor layer 310 may be a substrate or an epitaxial layer grown on a substrate. FIG. 3 also shows a coordinate system with X, Y, and Z axes. The X and Y axes are mutually orthogonal and parallel to a certain surface of the semiconductor layer 310, for example the first surface 311 or the second surface 312. Therefore, the X and Y axes are referred to as "in-plane directions". The Z axis is perpendicular to the X and Y axes and thus perpendicular to the plane of the semiconductor layer 310. Therefore, the Z axis is referred to as "out-of-plane direction". Along the in-plane direction (X axis), the channel region 316 of the body region 315 is between the source region 320 and the drift region 330 and acts as a conductive channel between the source region 320 and the drift region 330.

[0033] In some examples, the semiconductor layer 310 is formed by epitaxial growth and / or ion implantation to form, for example, a p-type layer at a p-doping level, and the semiconductor layer 310 includes a body region 315 at a p-doping level. The source region 320, the drift region 330, and the body contact region 340 may be formed by ion implantation of dopants into the semiconductor layer 310. In the example of FIG. 3, the source region 320 is an n-type semiconductor region having an n+ doping level, the drift region 330 is an n-type semiconductor region having an n-doping level, the body region 315 is a p-type semiconductor region having a p-doping level, and the body contact region 340 is a p-type semiconductor region having a p+ doping level. Other suitable doping polarities and doping levels for these structures (e.g., 315, 320, 330, 315, 340) may be selected depending on various application scenarios. In the example of FIG. 3, the body contact region 340 is a recessed body contact region. In another example, the body contact region is a planar body contact region.

[0034] Figure 4 illustrates a dielectric layer 350 on the second surface 312 of the semiconductor layer 310, and in Figure 12 this step is shown as adding a dielectric layer onto the semiconductor layer at step 802 in Figure 12. The material of the dielectric layer 350 may include a nitride material, such as silicon nitride, aluminum nitride, and / or an oxide material, such as silicon oxide, aluminum oxide, etc. The dielectric layer may be added by vapor deposition or bonding onto the semiconductor layer.

[0035] Figure 5 illustrates a gate (e.g., gate terminal) 355 on the second surface 312 of the semiconductor layer 310, and in Figure 12 this step is shown as forming a gate on the semiconductor layer in step S803 of Figure 12. In the example of Figure 5, the gate 355 corresponds to the channel region 316 of the body region 315 and is configured to turn the channel region 316 on and off, and a dielectric portion 351 of the dielectric layer 350 is between the gate 355 and the second surface 312 of the semiconductor layer 310, thus separating the gate 355 from the second surface 312 of the semiconductor layer 310.

[0036] Gate 355 may be formed by etching a trench (not shown in FIG. 5) in dielectric layer 350 and depositing a gate material in the trench. In one example, the gate material of gate 355 may include polysilicon and / or metal. In some examples, a dielectric material, such as a nitride or oxide, is further deposited in the trench and over gate 355.

[0037] Figure 6 illustrates a trench 356 in the dielectric layer 350, and in Figure 12 this step is shown as forming a trench in the dielectric layer as step S804 in Figure 12. The trench 356 may be formed by etching away a portion of the dielectric layer 350.

[0038] Figure 7 illustrates a floating electrode 360 ​​in the trench 356 and on the second surface 312 of the semiconductor layer 310, and in Figure 12 this step is shown as forming a floating electrode in the trench and on the semiconductor layer in step S805 of Figure 12. The floating electrode 360 ​​may be formed by vapor deposition, such as chemical vapor deposition (CVD).

[0039] The floating electrode 360 ​​has a first end 361 and a second end 362, the first end 361 being coupled to and in contact with the drift region 330. The floating electrode can be used to electrically couple the first component to the second component to provide an ohmic contact between the first and second components comprising different band gap materials without a barrier voltage. The doping level of the portions of the first and second components in contact with the floating electrode can be increased compared to other portions of the first and second components. The material of the floating electrode can include at least one of a metal or a silicide. The floating electrode can be used between two components, for example, two components having materials with different band gaps or different energy band structures, for an uninterrupted barrier voltage between the two components.

[0040] FIG. 8 illustrates the voltage support structure 370 in the trench 356 and on the floating electrode 360, and in FIG. 12 this step is shown as forming the voltage support structure on the floating electrode in step S806 of FIG. 12. The voltage support structure 370 may include a WBG semiconductor having a larger bandgap than the semiconductor of the semiconductor layer 310. In some examples, the WBG semiconductor of the voltage support structure 370 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor. The voltage support structure 370 may be formed by vapor deposition, such as chemical vapor deposition (CVD), and / or by ion implantation.

[0041] Figure 9 illustrates a drain contact 380 in the trench 356 and on the voltage support structure 370, and in Figure 12 this step is shown as forming a drain contact in the trench and on the voltage support structure as step S807 in Figure 12. In some examples, the drain contact 380 includes a silicide portion in contact with the voltage support structure 370 and includes an aluminum portion on the silicide portion. The drain contact 380 may be formed using vapor deposition.

[0042] Figure 10 illustrates a trench 357 in the dielectric layer 350, and in Figure 12 this step is shown as forming a trench in the dielectric layer as step S808 in Figure 12. The trench 357 may be formed by etching the dielectric layer 350 with a mask.

[0043] FIG. 11 illustrates a source contact 390 and a field plate 395 in trench 357, and in FIG. 12 this step is shown as forming the source contact and field plate in the trench in step S809 of FIG. 12. The source contact and field plate may be formed by vapor deposition. In the example of FIG. 11, the source contact 390 contacts the source region 320 and the body contact region 340. In some examples, the source contact 390 includes a silicide portion and an aluminum portion on the silicide portion, and the field plate includes a silicide portion and an aluminum portion on the silicide portion.

[0044] 11, the field plate 395 and the source contact 390 are structurally integrated as a single piece. In other examples, the field plate and the source contact are separate pieces of structure, with the field plate being electrically coupled to the source contact or another voltage contact.

[0045] FIG. 11 illustrates an exemplary hybrid semiconductor device 300 according to a described example. The hybrid semiconductor device 300 includes a semiconductor layer 310 having a source region 320, a drift region 330, a body region 315 including a channel region 316, and a body contact region 340. The material of the semiconductor layer 310 may include at least one of silicon, germanium, or gallium arsenide. The semiconductor layer 310 has a first surface 311 and an opposing second surface 312. Along the in-plane direction (X-axis), the channel region 316 of the body region 315 is between the source region 320 and the drift region 330. The hybrid semiconductor device 300 further includes a dielectric layer 350 and a gate 355 on the second surface 312 of the semiconductor layer 310. A dielectric portion 351 of the dielectric layer 350 is between the gate 355 and the second surface 312 of the semiconductor layer 310, and thus separates the gate 355 from the second surface 312 of the semiconductor layer 310. The gate 355 extends along an in-plane direction (X-axis) and is configured to turn on and off a channel region 316 between the source region 320 and the drift region 330 along the in-plane direction (X-axis), and thus the gate 355 is a lateral gate extending along the in-plane direction (X-axis).

[0046] The hybrid semiconductor device 300 further includes a floating electrode 360 ​​on the drift region 330, a voltage support structure 370 on the floating electrode 360, a drain contact 380 on the voltage support structure 370, a source contact 390, and a field plate 395 that is an implementation of a field control element, such as the field control element 160 of FIG. 1. The voltage support structure 370 includes a first region 371 in ohmic contact with a second end 362 of the floating electrode 360 ​​and a second region 372 in ohmic contact with the drain contact 380. In the example of FIG. 11, the body region 315 is electrically coupled to the source contact 390 via the body contact region 340 and extends from a region at or near the source contact 390 toward the drain contact 380, e.g., approximately along an in-plane direction (X-axis), and the body region 315 acts as an implementation of a field control element, such as the field control element 160 of FIG. 1.

[0047] 11, the floating electrode 360 ​​has a first end 361 and a second end 362, the first end 361 being on and in ohmic contact with the drift region 330, and the voltage support structure 370 being on and in ohmic contact with the second end 362 of the floating electrode 360. The drain contact 380 is on the voltage support structure 370. The voltage support structure 370 and the floating electrode 360 ​​may be disposed on the drift region 330 of the semiconductor layer 310 along an out-of-plane direction (Z-axis), e.g., vertical direction, to reduce the device size along an in-plane direction (e.g., along the X-axis). The source contact 390 is in ohmic contact with the source region 320 and the body contact region 340, and the field plate 395 extends from the source contact 390 toward the drain contact 380 and the voltage support structure 370.

[0048] The voltage support structure 370 may include a WBG semiconductor having a larger bandgap than the semiconductor of the semiconductor layer 310. In some examples, the WBG semiconductor of the voltage support structure 370 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor. In some examples, the WBG semiconductor of the voltage support structure 370 includes a nanomaterial having a WBG, such as a silicon carbide nanotube material or any other suitable WBG nanomaterial.

[0049] 11, the hybrid semiconductor device 300 includes a switch element 319 including a source region 320, a drift region 330, a body region 315 or a portion of the body region 315 including a channel region 316, a body contact region 340, a gate 355, and a dielectric portion 351 of a dielectric layer 350. The hybrid semiconductor device 300 further includes a source contact 390, a floating electrode 360, a voltage support structure 370, a drain contact 380, a field plate 395, and a field control element including the body region 315 extending from the source contact 390 or a region nearby it toward the drain contact 380, e.g., approximately along an in-plane direction (X-axis). The voltage support structure 370 is on the switch element 319 and extends, e.g., vertically, in a direction perpendicular to a surface of the switch element 319 (e.g., the second surface 312 of the semiconductor layer 310).

[0050] In some examples, a first end 361 of the floating electrode 360 ​​is in ohmic contact with the drift region 330 of the switch element 319, a second end 362 of the floating electrode 360 ​​is in ohmic contact with the voltage support structure 370, and a body contact region 340 of the switch element 319 is in ohmic contact with the source contact 390. In some examples, the regions (e.g., 371, 372) of the voltage support structure 370 that contact the floating electrode 360 ​​and the drain contact 380 are doped at an elevated doping level relative to other regions of the voltage support structure 370 to form ohmic contact with the floating electrode 360 ​​and the drain contact 380. A region 331 of the drift region 330 that contacts the floating electrode 360 ​​is doped at an elevated doping level relative to other regions of the drift region 330 to form ohmic contact with the floating electrode 360.

[0051] FIG. 13 illustrates an example cross-sectional view along A1-A2 of the hybrid semiconductor device 300 of FIG. 11 according to an example being described. In the example of FIG. 13, the source contact 390, the source region 320, the body region 315 including the channel region 316, and the drift region 330 extend along the in-plane direction (Y-axis) in a striped configuration. FIG. 14 illustrates another example cross-sectional view along B1-B2 of the hybrid semiconductor device 300 of FIG. 11 according to an example being described. In the example of FIG. 14, the source contact 390, the dielectric layer 350, the field plate 395, and the voltage support structure 370 extend along the in-plane direction (Y-axis) in a striped configuration.

[0052] 13 and 14, certain components of the hybrid semiconductor device 300 (e.g., 390, 320, 315, 316, 330, 350, 395, etc.) extend along an in-plane direction (Y-axis) in a stripe configuration. In another example, certain components of the hybrid semiconductor device 300 (e.g., 390, 320, 316, 315, 330, 350, 395, 370, etc.) extend in-plane (e.g., parallel to the XY plane) in a circular or toroidal configuration. For example, certain components of the hybrid semiconductor device 300 (e.g., 390, 320, 316, 315, 330, 350, 395, 370, etc.) extend around an axis O1-O2, e.g., in a circular or toroidal configuration.

[0053] 15 illustrates a cross-sectional view of another exemplary hybrid semiconductor device 400 according to an example described. The hybrid semiconductor device 400 includes a semiconductor layer 410 having a source region 420, a drift region 430, a body region 415 including one or more channel regions 416, and a body contact region 440. The semiconductor layer 410 has a first surface 411 and an opposing second surface 412. Along an out-of-plane direction (Z-axis), a channel region 416 of the body region 415 extends between the source region 420 and the drift region 430. The hybrid semiconductor device 400 further includes a gate 455 and a dielectric layer 451 separating the gate 455 from the body region 415 of the semiconductor layer 410. The gate 455 extends along an out-of-plane direction (Z-axis) and is configured to turn on and off the channel region 416 along the out-of-plane direction (Z-axis) between the source region 420 and the drift region 430; therefore, the gate 455 is a lateral gate extending along the out-of-plane direction.

[0054] The hybrid semiconductor device 400 further includes a dielectric layer 450 on the second surface 412 of the semiconductor layer 410, a floating electrode 460 on the drift region 430, a voltage support structure 470 on the floating electrode 460, a drain contact 480, a source contact 490, and a field plate 495 on the voltage support structure 470.

[0055] 15, a floating electrode 460 has a first end 461 and a second end 462, where the first end 461 is on and in ohmic contact with the drift region 430, and a voltage support structure 470 is on and in ohmic contact with the second end 462 of the floating electrode 460. A drain contact 480 is on the voltage support structure 470. A source contact 490 is in ohmic contact with the source region 420 and the body contact region 440, and a field plate 495 extends from the source contact 490 towards the drain contact 480 and the voltage support structure 470.

[0056] Voltage support structure 470 includes a WBG semiconductor having a larger bandgap than the semiconductor of semiconductor layer 410. In some examples, the WBG semiconductor of voltage support structure 470 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor. In some examples, the WBG semiconductor of voltage support structure 470 includes a nanomaterial having a WBG, such as a silicon carbide nanotube material, or any other suitable nanomaterial.

[0057] 16-22 show cross-sectional views of a structure at various stages in the formation of another exemplary hybrid semiconductor device 500, and FIG 23 shows a corresponding flow chart of an exemplary method for forming the hybrid semiconductor device 500. FIG 16-22 will now be described with reference to the flow chart of FIG 23.

[0058] FIG. 16 illustrates a semiconductor layer 510 including a source region 520, a drift region 530, a body region 515 including a channel region 516, and a body contact region 540, and in FIG. 23 this step is shown as step S901 of FIG. 12 as forming the source region, drift region, body region, and body contact region in the semiconductor layer.

[0059] The semiconductor layer 510 has a first surface 511 and an opposing second surface 512. The material of the semiconductor layer 510 may include at least one of silicon, germanium, or gallium arsenide. FIG. 16 also shows a coordinate system having X, Y, and Z axes. The X and Y axes are mutually orthogonal and parallel to a plane of the semiconductor layer 510, e.g., the first surface 511 or the second surface 512. Thus, the X and Y axes are referred to as "in-plane directions." The Z axis is perpendicular to the X and Y axes and thus perpendicular to the plane of the semiconductor layer 510. Thus, the Z axis is referred to as "out-of-plane direction." Along the in-plane direction (X axis), the channel region 516 of the body region 515 is between the source region 520 and the drift region 530.

[0060] In some examples, the semiconductor layer 510 is formed by epitaxial growth and / or ion implantation to form, for example, a p-type layer with a p doping level, and the semiconductor layer 510 includes a body region 515. The source region 520, the drift region 530, and the body contact region 540 may be formed by ion implantation of dopants into the semiconductor layer 510. In the example of FIG. 16, the source region 520 is an n-type semiconductor region with an n+ doping level, the drift region 530 is an n-type semiconductor region with an n doping level, the body region 515 is a p-type semiconductor region with a p doping level, and the body contact region 540 is a p-type semiconductor region with a p+ doping level. Other suitable doping polarities and doping levels may be selected for the structure (e.g., 515, 520, 530, 540) of the hybrid semiconductor device 500 depending on various application scenarios. In the example of FIG. 16, the body contact region 540 is a recessed body contact region. In another example, the body contact region is a planar body contact region.

[0061] FIG. 17 illustrates the voltage support structure 570 and the dielectric layer 575 in the semiconductor layer 510, and in FIG. 23 this step is shown as forming the dielectric layer and the voltage support structure in the semiconductor layer in step S902 of FIG. 23. The dielectric layer 575 and the voltage support structure 570 may be formed by etching away a portion of the semiconductor layer 510 to form a trench, forming the dielectric layer 575 by vapor deposition or oxidation on the inner wall of the trench, and depositing material of the voltage support structure 570 on the trench and the dielectric layer 575. In the example of FIG. 17, the voltage support structure 570 is adjacent to the drift region 530 along an in-plane direction (X-axis), e.g., laterally. The dielectric layer 575 is between the voltage support structure 570 and the body region 515 and separates the voltage support structure 570 from the body region 515.

[0062] The voltage support structure 570 may include a WBG semiconductor having a larger bandgap than the body region 515 of the semiconductor layer 510. In some examples, the WBG semiconductor of the voltage support structure 570 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor.

[0063] Figure 18 illustrates a floating electrode 560 between the drift region 530 and the voltage support structure 570, and in Figure 23 this step is shown as forming a floating electrode between the drift region and the voltage support structure in step S903 of Figure 23. The floating electrode 560 may be formed by etching away portions of the drift region 530, the dielectric layer 575, and the voltage support structure 570 to form a trench, and depositing material for the floating electrode 560 into the trench via vapor deposition, such as chemical vapor deposition (CVD). The material for the floating electrode may include at least one of a metal or a silicide.

[0064] Floating electrode 560 has a first end 561 and a second end 562, where first end 561 is coupled to and in ohmic contact with drift region 530 and second end 562 is coupled to and in ohmic contact with voltage support structure 570. In the example of Figure 18, voltage support structure 570, drift region 530, and floating electrode 560 are disposed along an in-plane direction (X-axis), e.g., a lateral direction, relative to one another.

[0065] Figure 19 illustrates a dielectric layer 550 on the second surface 512 on the semiconductor layer 510, and in Figure 23 this step is shown as adding a dielectric layer on top of the semiconductor layer in step S904 of Figure 23. The material of the dielectric layer 550 may include a nitride material, such as silicon nitride, aluminum nitride, and / or an oxide material, such as silicon oxide, aluminum oxide, etc. The dielectric layer 550 may be added by vapor deposition or bonding onto the semiconductor layer 510.

[0066] 20 illustrates a gate (e.g., gate terminal) 555 on the second surface 512 of the semiconductor layer 510, and in FIG. 23 this step is shown as step S905 of FIG. 23 as forming a gate on the semiconductor layer 510. In the example of FIG. 20, the gate 555 corresponds to the channel region 516 of the body region 515, and the dielectric portion 551 of the dielectric layer 550 is between the gate 555 and the second surface 512 of the semiconductor layer 510, thereby isolating the gate 555 from the second surface 512 of the semiconductor layer 510.

[0067] The gate 555 may be formed by etching a trench in the dielectric layer 550 and depositing a gate material in the trench. In one example, the material of the gate 555 may include polysilicon and / or metal. In some examples, a dielectric material, such as a nitride or oxide, is further deposited in the trench and over the gate 555.

[0068] Figure 21 illustrates trenches 556 and 557 in dielectric layer 550, and in Figure 23 this step is shown as forming trenches in the dielectric layer in step S906 of Figure 23. Trenches 556 and 557 may be formed by etching dielectric layer 550 with a mask.

[0069] FIG. 22 illustrates the source contact 590, the field plate 595, and the drain contact 580, and in FIG. 23 this step is shown as forming the source contact, the field plate, and the drain contact in step S907 of FIG. 23. In the example of FIG. 22, the source contact 590 is in ohmic contact with the source region 520 and the body contact region 540. In some examples, the source contact 590 includes a silicide portion and an aluminum portion on the silicide portion, and the field plate 595 includes a silicide portion and an aluminum portion on the silicide portion. The drain contact 580 is on the voltage support structure 570. In some examples, the drain contact 580 includes a silicide portion in contact with the voltage support structure 570 and an aluminum portion on the silicide portion. The source contact 590, the field plate 595, and the drain contact 580 may be formed using vapor deposition.

[0070] 22 illustrates an example hybrid semiconductor device 500 according to a described example. The hybrid semiconductor device 500 includes a semiconductor layer 510. The semiconductor layer 510 includes a source region 520, a drift region 530, a body region 515 including a channel region 516, and a body contact region 540. The semiconductor layer 510 has a first surface 511 and an opposing second surface 512.

[0071] The hybrid semiconductor device 500 further includes a voltage support structure 570 and a dielectric layer 575, a floating electrode 560 between the drift region 530 and the voltage support structure 570, a dielectric layer 550 and a gate 555 on a second surface of the semiconductor layer 510, a source contact 590, a field plate 595, and a drain contact 580 in a trench formed in the dielectric layer 550.

[0072] The voltage support structure 570 is adjacent to the drift region 530 along an in-plane direction (X-axis), e.g., laterally. A dielectric layer 575 is between the voltage support structure 570 and the body region 515 and separates the voltage support structure 570 from the body region 515. The voltage support structure 570 may include a WBG semiconductor having a larger bandgap than the semiconductors of the source region 520, the drift region 530, the body region 515 including the channel region 516, and the body contact region 540. In some examples, the WBG semiconductor of the voltage support structure 570 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor.

[0073] Floating electrode 560 has a first end 561 and a second end 562, where first end 561 is coupled to and in ohmic contact with drift region 530 and second end 562 is coupled to and in ohmic contact with voltage support structure 570. Voltage support structure 570, drift region 530, and floating electrode 560 are disposed along an in-plane direction (X-axis), e.g., a lateral direction, relative to one another.

[0074] The gate 555 corresponds to the channel region 516 of the body region 515, and the dielectric portion 551 of the dielectric layer 550 is between the gate 555 and the second surface 512 of the semiconductor layer 510, thus separating the gate 555 from the second surface 512 of the semiconductor layer 510.

[0075] A source contact 590 is in ohmic contact with the source region 520 and the body contact region 540. In some examples, the source contact 590 includes a silicide portion and an aluminum portion on the silicide portion, and the field plate 595 includes a silicide portion and an aluminum portion on the silicide portion. The field plate 595 extends from the source contact 590 to a drain contact 580. The drain contact 580 is on the voltage support structure 570. In some examples, the drain contact 580 includes a silicide portion in contact with the voltage support structure 570 and includes an aluminum portion on the silicide portion.

[0076] 22, the field plate 595 and the source contact 590 are structurally integrated as a single piece. In other examples, the field plate and the source contact are separate pieces of structure, with the field plate being electrically coupled to the source contact or another voltage contact.

[0077] In some examples, certain components of the hybrid semiconductor device 500 (e.g., 590, 520, 516, 515, 530, 550, 595, 570) extend along an in-plane direction (Y-axis) in a stripe configuration. In other examples, certain components of the hybrid semiconductor device 500 (e.g., 590, 520, 516, 515, 530, 550, 595, 570) extend in-plane (e.g., parallel to the XY plane) in a circular or annular shape. For example, certain components of the hybrid semiconductor device 500 (e.g., 590, 520, 516, 515, 530, 550, 595, 570) extend around the axis O3-O4, for example, in a circular or annular configuration.

[0078] 22, the hybrid semiconductor device 500 includes a switch element 519, which includes a source region 520, a drift region 530, a body region 515 or a portion of the body region 515 including a channel region 516, a body contact region 540, a gate 555, and a dielectric portion 551 of a dielectric layer 550. The hybrid semiconductor device 500 further includes a floating electrode 560, a voltage support structure 570, a drain contact 580, a source contact 590, and a field control element including a field plate 595 and the body region 515 extending, e.g., along a substantially in-plane direction (X-axis) from the source contact 590 or a region nearby the source contact 590 toward the drain contact 580. The voltage support structure 570 is adjacent to the switch element 519 along the in-plane direction (X-axis) and extends, e.g., laterally, in a direction parallel to a surface of the switch element 519 (e.g., a portion of the second surface 512 of the semiconductor layer 510). In some examples, the voltage support structure 570 is at least partially surrounded by the switch element 519 .

[0079] In some examples, a first end 561 of the floating electrode 560 is in ohmic contact with the drift region 530 of the switch element 519, a second end 562 of the floating electrode 560 is in ohmic contact with the voltage support structure 570, and a body contact region 540 of the switch element 519 is in ohmic contact with the source contact 590. In some examples, regions (e.g., 571, 572) of the voltage support structure 570 in contact with the floating electrode 560 and the drain contact 580 are doped at an elevated doping level relative to other regions of the voltage support structure 570 to form ohmic contacts with the floating electrode 560 and the drain contact 580, and a region 531 of the drift region 530 in contact with the floating electrode 560 is doped at an elevated doping level relative to other regions of the drift region 530 to form ohmic contacts with the floating electrode 560.

[0080] 24 illustrates another example hybrid semiconductor device 600 in accordance with described examples. Hybrid semiconductor device 600 includes a semiconductor layer 610. Semiconductor layer 610 includes a source region 620, a drift region 630, a body region 615 including a channel region 616, and a body contact region 640. Semiconductor layer 610 has a first surface 611 and an opposing second surface 612.

[0081] The hybrid semiconductor device 600 further includes a voltage support structure 670, a floating electrode 660 between the drift region 630 and the voltage support structure 670, a dielectric layer 650 and a gate 655 on the second surface 612 of the semiconductor layer 610, a source contact 690, a field plate 695, and a drain contact 680.

[0082] The voltage support structure 670 is adjacent to the drift region 630 along an in-plane direction (X-axis), e.g., laterally. The voltage support structure 670 is in contact with the body region 615. The voltage support structure 670 may be formed by implanting dopants into the semiconductor layer 610 or by etching away portions of the semiconductor layer 610 to form trenches and depositing the material of the voltage support structure 670 into the trenches. In some examples, the semiconductor layer 610 is a silicon layer and the voltage support structure 670 is formed by implanting carbon into the semiconductor layer 610 and activating the implanted regions to form silicon carbide as the voltage support structure 670. The voltage support structure 670 may include a WBG semiconductor having a larger bandgap than the semiconductor of the semiconductor layer 610. In some examples, the WBG semiconductor of the voltage support structure 670 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor.

[0083] Certain components of hybrid semiconductor device 600 are the same as or similar to components of the hybrid semiconductor devices described above and may refer to the components of the hybrid semiconductor devices described above, such as the components of hybrid semiconductor device 500.

[0084] Modifications, additions, or omissions may be made to the devices, systems, apparatus, and methods described herein without departing from the scope of the present specification. Also, the operations of the devices, systems, and apparatus described herein may be performed with more, fewer, or other components, and the methods described may include more, fewer, or other steps. Also, steps may be performed in any suitable order.

[0085] The term "coupled" is used throughout the specification. This term may encompass any connection, communication, or signal path that allows for a functional relationship consistent with the explanation of this description. For example, in a first example, device A is coupled to device B if device A generates a signal to control device B to perform a certain action, or in a second example, device A is coupled to device B through an intervening component C, where the intervening component C does not substantially change the functional relationship between device A and device B such that device B is controlled by device A via a control signal generated by device A.

[0086] Modifications in the described embodiments are possible, and other embodiments are possible, within the scope of the appended claims.

Claims

1. 1. A semiconductor device comprising: a switch element having a surface, a first region coupled to a source contact, and a second region, the switch element comprising a first semiconductor material having a bandgap; a floating electrode having a first end coupled to the second region of the switch element and a second end; a voltage support structure including a second semiconductor material having a bandgap larger than a bandgap of the first semiconductor material, the voltage support structure contacting a second end of the floating electrode; a drain contact coupled to the voltage support structure; 13. A semiconductor device comprising:

2. 2. The semiconductor device of claim 1, The floating electrode comprises at least one of a metal or a silicide.

3. 2. The semiconductor device of claim 1, a first end of the floating electrode in ohmic contact with a second region of the switch element, and a second end of the floating electrode in ohmic contact with the voltage support structure.

4. 2. The semiconductor device of claim 1, The semiconductor device, wherein the switch element is at least one of a diode, a bipolar transistor, a field effect transistor, or an insulated gate bipolar transistor.

5. 5. The semiconductor device of claim 4, The semiconductor device, wherein the switch element includes a field effect transistor, the field effect transistor being a p-type field effect transistor or an n-type field effect transistor.

6. 6. The semiconductor device of claim 5, The semiconductor device, wherein the switch element is a laterally diffused metal oxide semiconductor field effect transistor.

7. 6. The semiconductor device of claim 5, The semiconductor device, wherein the switch element further includes a gate.

8. 8. The semiconductor device of claim 7, A semiconductor device, wherein a gate of the switch element extends in a direction perpendicular to a surface of the switch element or extends in a direction parallel to a surface of the switch element.

9. 2. The semiconductor device of claim 1, The second semiconductor material comprises at least one of silicon carbide or gallium nitride.

10. 2. The semiconductor device of claim 1, The second semiconductor material comprises a nanotube material.

11. 2. The semiconductor device of claim 1, The first semiconductor material comprises at least one of silicon, germanium, or gallium arsenide.

12. 2. The semiconductor device of claim 1, The semiconductor device further includes a field control element extending toward the drain contact.

13. 13. The semiconductor device of claim 12, A semiconductor device, wherein the field control element is a field plate electrically coupled to the source contact or another voltage contact.

14. 13. The semiconductor device of claim 12, A semiconductor device, wherein the field control element is a third region of the switch element, the third region of the switch element being coupled to the source contact and extending toward the drain contact.

15. 2. The semiconductor device of claim 1 , A semiconductor device, wherein the voltage support structure overlies the switch element and extends in a direction perpendicular to the surface of the switch element.

16. 2. The semiconductor device of claim 1, A semiconductor device, wherein the voltage support structure extends in a direction parallel to a surface of the switch element, the voltage support structure being at least partially surrounded by the switch element.

17. 1. A semiconductor device comprising: Source contact; A switching element, a first semiconductor region of a first doping polarity, the first semiconductor region including a channel region; a source region of a second doping polarity in contact with the source contact and the first semiconductor region; a drain region of the second doping polarity in contact with the first semiconductor region; a gate corresponding to a channel region of the first semiconductor region, the first semiconductor region, the source region, and the drain region each comprising a first semiconductor material having a bandgap; The switch element having a floating electrode having a first end coupled to a drain region of the switch element and a second end; a voltage support structure including a second semiconductor material having a bandgap larger than a bandgap of the first semiconductor material, the voltage support structure contacting a second end of the floating electrode; a drain contact coupled to the voltage support structure; 13. A semiconductor device comprising:

18. 20. The semiconductor device of claim 17, A semiconductor device, wherein the voltage support structure overlies the switch element and extends in a direction perpendicular to a surface of the switch element.

19. 1. A method for forming a semiconductor device, comprising: forming a switch element comprising a first semiconductor material having a bandgap; forming a floating electrode having a first end and a second end, the first end of the floating electrode being coupled to the switch element; forming a voltage support structure comprising a second semiconductor material having a bandgap larger than a bandgap of the first semiconductor material; forming a source contact coupled to the switch element; forming a drain contact coupled to the voltage support structure; forming an electric field control element; A method comprising:

20. 20. The method of claim 19, The method, wherein the first semiconductor material comprises at least one of silicon, germanium, or gallium arsenide.

Images