Light emitting system, micro LED and method for manufacturing an array of micro light emitting diodes

Abstract

The light emitting system includes an array of micro light emitting diodes (micro LEDs). The array of micro LEDs includes a semiconductor substrate, a prep layer formed on at least a portion of the semiconductor substrate, and an active region formed on the prep layer. The array of micro LEDs also includes a plurality of thick substructures forming an array on the active region, and a plurality of thin substructures formed on the active region, each of the thin substructures being disposed between each adjacent pair of thick substructures. Each of the thick substructures defines a shape and size of a corresponding one of the micro LEDs. Each of the thin substructures is configured to prevent movement of free electron carriers through the plurality of thin substructures to electrically isolate each of the thick substructures from each of all others of the thick substructures. Additionally, the plurality of micro LEDs share an active region.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Patent Application No. 63 / 137,355, filed January 14, 2021, the entire contents of which are incorporated herein by reference.

[0002] background Aspects of the present disclosure relate generally to light emitting structures, such as light emitting diode structures, used in various types of displays and other devices. [Background technology]

[0003] Increasing the number of picture elements (or pixels) in light emitting devices and displays can improve user experience and enable new applications. However, increasing the number or density of light emitting elements that make up a pixel is challenging. Reducing the size of light emitting diodes (LEDs) makes it possible to increase both the total number and density of light emitting elements that make up a pixel.

[0004] Recent developments in LED manufacturing techniques have enabled the fabrication of micro light emitting diodes (micro-LEDs), where each LED has a pitch on the order of a few microns to a fraction of a micron. See, for example, International Patent Publications WO2019 / 209945A1, WO2019 / 209957A1, WO2019 / 209961A1, and WO2020 / 210563A1 to He et al., all of which are incorporated by reference in their entirety. Such micro-LEDs enable a host of new configurations for displays and other applications that use light emitting devices.

[0005] A commonly implemented epitaxial layer structure for LEDs is shown in FIG. 1. The LED structure 100 includes a semiconductor substrate or template 110 supporting one or more bulk or prep layers 120. In one example, the semiconductor template is an n-type GaN template formed on an n-type epitaxial substrate. An active quantum well (QW) 130 is formed on the bulk or prep layer 120. The bulk or prep layer 120 may be, for example, a thick layer of one material or a structure of two or more materials configured to provide a thermal expansion coefficient transition and / or lattice matching from the semiconductor template 110 to the active QW 130. Adjusting the material composition of the bulk or prep layer 120 allows more flexibility in the material selection for the active QW 130, thus allowing the formation of an active region with desired light-emitting properties. Finally, one or more p-layers 140 are deposited on the active QW 130 to provide electronic contacts to the LED structure 100. The p-layer 140 includes a p-doped layer and / or a contact layer. The LED structure 100 can then be etched or otherwise shaped to form a desired micro-LED form factor for a specified application.

[0006] In some implementations, techniques such as epitaxial growth and dry etching, or selective area growth (SAG), may be used to define the location, shape, and size of the LED structures 100 on the semiconductor template 110. That is, one way to form an array of micro LEDs on a substrate is to epitaxially grow the layer structure required for light emission (e.g., lattice-matched or strain-managed prep layers, active quantum well layers, electron blocking layers, p-layers, and other functional layers shown in FIG. 1 ), and then use a masked etching process (e.g., dry or wet etching) to define and separate the desired array of micro LEDs from the layer structure. The etching typically involves etching the entire layer structure, including the active light emitting region, to separate the active light emitting region of each micro LED from the surrounding micro LEDs. Summary of the Invention [Problem to be solved by the invention]

[0007] This conventional micro LED manufacturing process has drawbacks, such as wavelength shift from the LED layer structure before etching and separation, and reduced quantum efficiency. Therefore, techniques and devices are presented herein that enable the effective and efficient design and manufacturing of micro LEDs. [Means for solving the problem]

[0008] Disclosure Summary SUMMARY OF THE DISCLOSURE The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive summary of all possible aspects, and is not intended to identify key or critical elements of all aspects or to delineate the scope of any or all aspects. The purpose of the summary is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description.

[0009] In one aspect of the disclosure, a light emitting system is described. The light emitting system includes an array of micro light emitting diodes (micro LEDs). The array of micro LEDs includes a semiconductor substrate, at least one prep layer formed on at least a portion of the semiconductor substrate, and an active region formed on the at least one prep layer. The array of micro LEDs also includes a plurality of thick substructures forming an array on the active region, and a plurality of thin substructures formed on the active region, each of the plurality of thin substructures being disposed between each adjacent pair of thick substructures. Each of the plurality of thick substructures defines a shape and size of a corresponding one of the micro LEDs. Each of the plurality of thin substructures is configured to prevent movement of free electron carriers through the plurality of thin substructures to electrically isolate each of the thick substructures from each of all others of the thick substructures. Furthermore, the plurality of micro LEDs share an active region.

[0010] In another aspect, a method of fabricating an array of micro light emitting diodes (micro LEDs) on a semiconductor substrate is described. The method includes depositing at least one prep layer on at least a portion of the semiconductor substrate, forming an active region on the at least one prep layer, depositing at least one p layer on the active region, and depositing at least one mask structure on the at least one p layer, the mask structure being configured to define a size and shape of each of a plurality of micro LEDs. The method further includes partially etching away the at least one p layer where the at least one p layer is not covered by the at least one mask structure, and removing the at least one mask structure.

[0011] The accompanying drawings depict only some embodiments and therefore should not be considered limiting of the scope. [Brief description of the drawings]

[0012] [Figure 1]FIG. 1 illustrates an example of a commonly implemented micro LED structure, according to an embodiment of the present disclosure. [Diagram 2] FIG. 1 illustrates a top view of a portion of an LED array including multiple micro LED structures as part of an array for use in a display, according to an embodiment of the present disclosure. [Diagram 3] 1 is a cross-sectional view of an epitaxial layer structure for an LED according to an embodiment of the present disclosure. [Figure 4] FIG. 2 is a cross-sectional view of a plurality of micro LEDs formed by selectively etching an epitaxial layer structure for the LEDs according to an embodiment of the present disclosure. [Diagram 5] FIG. 2 is a cross-sectional view of a plurality of micro LEDs formed by selectively etching an epitaxial layer structure for the LEDs according to an embodiment of the present disclosure. [Figure 6] 1A-1D illustrate a process for forming a micro LED according to an embodiment of the present disclosure. [Figure 7] 1A-1C illustrate alternative processes for forming micro LEDs according to an embodiment of the present disclosure. [Figure 8] 1A-1C illustrate alternative processes for forming micro LEDs according to an embodiment of the present disclosure. [Figure 9] 1A-1C illustrate alternative processes for forming micro LEDs according to an embodiment of the present disclosure. [Figure 10] 1A-1C illustrate alternative processes for forming micro LEDs according to an embodiment of the present disclosure. [Figure 11] FIG. 2 is a cross-sectional view of a plurality of micro LEDs according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Detailed Description The detailed description set forth below in connection with the accompanying drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. It will be apparent to one of ordinary skill in the art that these concepts may be practiced without these specific details. In some instances, well-known components are shown in block diagram form in order to avoid obscuring such concepts.

[0014] The present disclosure provides LED embodiments that allow for improved efficiency emission at desired wavelength ranges including various wavelengths in the visible spectrum, including red, green, and blue wavelengths. The embodiments presented herein allow for the application of micro-LED technology that maintains high efficiency and emission at specified wavelength ranges at reduced device sizes. In some examples, the light emitters may have micron-scale or even sub-micron-scale sizes.

[0015] FIG. 2 illustrates a top view of a portion of an LED array 200 including multiple micro LED structures as part of an array for use in a display, according to an embodiment of the disclosure. As shown in FIG. 2, the LED array 200 includes multiple micro LED structures 210, 220, and 230 supported on a substrate 240, which, by way of example, emit light in red, green, and blue wavelengths, respectively. Alternatively, all of the micro LED structures may emit light within a single wavelength range, such as the red wavelength range. Although only a 4×4 array of LEDs is shown in FIG. 2, the LED array 200 may be part of a larger array of emitters forming, for example, a display, where the pixel arrangement, shape, number, size, and corresponding wavelength emission may be tailored for a particular application. For example, a particular application may implement circular or hexagonal emitters, which may be grouped into groups of two, three, or more. The display may be a high-resolution and high-density display, such as those used in light field applications.

[0016] Planar epitaxial deposition and subsequent etching processes as described above may be used to define and shape the micro LED structure of FIG. 2. As an example, FIG. 3 shows a cross-sectional view of an epitaxial layer structure 300 for an LED. The epitaxial layer structure is essentially a simplified larger planar version of the micro LED structure 100 shown in FIG. 1. As shown in FIG. 3, the epitaxial layer structure 300 includes a semiconductor substrate or template 310 that supports one or more prep layers 320 thereon. An active region 330 is formed, for example by epitaxial deposition, on top of the prep layers 320. In an embodiment, the active region 330 includes one or more quantum wells, quantum dots, or double heterojunction structures configured to emit light therefrom. In a particular embodiment, the active region 310 is an example of an active QW region 130. A p-layer 340 is formed on top of the active region 330. Each of the semiconductor substrate 310, the prep layer 320, the active region 330, and the p-layer 340 may include multiple layers therein potentially incorporating various material compositions.

[0017] A dry or wet etching process may be used to define and shape the array of micro LED structures from the epitaxial layer structure 300. For example, a mask 350 may be deposited, printed, or formed on the epitaxial layer structure 300 over areas corresponding to the micro LED structures. A dry or wet etching process is then used to remove portions of the epitaxial structure 300 not protected by the mask 350 to a specific depth, thus defining and isolating the plurality of micro LED structures from the epitaxial layer structure 300. In an embodiment, the mask 350 is one or more layers of material that include a patterned array of openings therethrough.

[0018] The result of a conventional etching process is shown in Figure 4. Figure 4 shows a cross-sectional view of a plurality of micro LEDs 400 (indicated by curly brackets) resulting from selectively etching an LED epitaxial layer structure such as that shown in Figure 3. The plurality of micro LEDs 400 are separated by openings 410 etched to a depth 412 (indicated by double arrows). During formation of the micro LEDs 400, in the conventional method described above, the depth 412 of the openings 410 extends into the prep layer 320', thus separating the active region 330' and the p-layer 340'. While isolating the p-layer 340' for each micro-LED 400 is desired so that each micro-LED 400 can be individually electrically addressed, etching into the prep layer 320' to isolate the active region has been shown to lead to a reduction in the internal quantum efficiency (IQE) and a blue shift (i.e., a shift in the emission wavelength towards shorter wavelengths) in the resulting micro-LEDs 400 compared to the epitaxial layer structure 300.

[0019] In contrast, Figure 5 illustrates a cross-sectional view of multiple micro LEDs formed using an alternative method for separating the micro LEDs from the epitaxial layer structure illustrated in Figure 3, according to one embodiment. As illustrated in Figure 5, the micro LEDs 500 (indicated by the curly brackets) are formed by etching an opening 510, which is etched to a depth 512 (indicated by the double arrow). In other words, the opening 510 is etched into what was originally the p-layer 340 to form a thick substructure 542 and a thin substructure 544 within the opening 510, the thick substructure 542 defining the size and shape of the individual micro LEDs 500. The thick substructure 542 is configured to electrically address the individual micro LEDs 500, and the thin substructure 544 is configured to prevent the movement of free carriers through the thin substructure 544. Meanwhile, the active region 330 and the prep layer 320 remain intact. In this manner, the micro-LED 500 maintains the IQE and emission wavelength of the original epitaxial layer structure 300 of Figure 3 while having the form factor of a micro-LED and operation as a separated, individually addressable micro-LED. Furthermore, the micro-LED 500 including the intact active region 330 and prep layer 320 has been shown to have a much higher light extraction efficiency (LEE) than the micro-LED 400 of Figure 4 with the separated active region 330' and p-layer 340'.

[0020] The dimensions of the openings 510 shown in Figure 5 may be customized according to the spacing required between the micro LEDs 500 for a particular application. For example, the spacing between the micro LEDs 500 may be on the order of a fraction of a micron (e.g., for high density micro LED applications), to 3-5 microns (e.g., for applications where additional structures are required between the micro LEDs 500), or even wider (e.g., for low density micro LED applications). Also, in certain embodiments, only a portion of a given semiconductor substrate contains micro LEDs formed in the manner shown in Figures 3 and 5, thus leaving space on the semiconductor substrate for fabrication of different types of processes or devices.

[0021] As one particular example, a 0.5 micron layer of p-layer 340 left on top of the active region 330 as the thin substructure 544 has been shown to be sufficient to ensure that the thin substructure 544 in the opening 510 is depleted of free electron carriers and therefore electrically isolates each micro-LED 500 from each other. For example, the p-layer 340 may be formed of a p-type material including an Al(In)GaN electron blocking layer (EBL). In this manner, the p-layer is shaped into an array of substructures that define the shape and size of the micro-LEDs. Each p-layer substructure corresponding to each micro-LED 500 can then be individually addressed so that each micro-LED 500 can be individually controlled. The micro-LEDs 500 share a continuous active QW structure and the light emitting performance of the original planar LED structure of the epitaxial layer structure 300 is maintained. Such a structure may be formed, for example, by performing a shallow etch on the structure shown in FIG. 3 and then stopping the etching process before reaching the active region 330.

[0022] FIG. 6 illustrates a process for forming micro LEDs on a semiconductor substrate or semiconductor template, according to one embodiment. As shown in FIG. 6, the process 600 begins with a start step 602, followed by deposition of a prep layer on a semiconductor substrate or semiconductor template in step 610. Active regions are formed on the prep layer in step 612, followed by deposition of a p-layer in step 614. One or more mask structures are deposited on the p-layer in step 616 to define the size and shape of each micro LED to be formed. A shallow etch step is then performed in step 620 to form the micro LEDs, and the mask structures are removed in step 622. The process 600 ends in an end step 630.

[0023] Step 620 may include monitoring the layer structure being etched, for example, to ensure that the etch is stopped before the active areas are exposed. For example, step 620 may include precise etch depth monitoring (e.g., optical or other sensing devices) to stop the etch at a specific known depth so as not to etch into the active areas. Alternatively, if the prep layer includes a unique layer (such as an electron blocking layer) made of a specific known material, the etching equipment may be configured to monitor that material (e.g., with optical or other sensing devices) to indicate that the etching process should be stopped when the specific known material is sensed.

[0024] It is noted that shallow etch processes are known in transistor technologies such as those involving heterojunction bipolar transistors (HBTs). For example, the use of passivation ledges in the formation of HBTs has been discussed in the literature (see, for example, https: / / parts.jpl.nasa.gov / mmic / 3-V.PDF accessed 2020-12-21). However, this type of etching operation is not currently used to form microLEDs.

[0025] An alternative micro LED array structure is shown in Figures 7-9. As shown in Figure 7, a semiconductor substrate or semiconductor template 310 supports thereon a prep layer 320 and an active region 330. Then, rather than depositing a p-layer structure directly on the active region, an electron blocking layer 744 is deposited on the active region 330. A mask 750 is then formed on the electron blocking layer 744 to define the shape and size of the micro LEDs to be formed. In one example, the mask 750 is essentially the negative of the mask 350 of Figure 3. In an embodiment, the mask 750 is one or more layers of material that include a patterned array of openings therethrough, the size and shape of each opening at least partially defining the size and shape of the micro LEDs to be formed.

[0026] Referring to FIG. 8, a p-layer 842 is deposited on top of the electron blocking layer 744. The p-layer 842 may be configured to cooperate with the electron blocking layer 744 to define the shape and size of the micro LEDs while allowing individual addressing of each micro LED via the p-layer 842. The mask structure 750 is then removed as shown in FIG. 9, leaving the micro LEDs 900 separated by the openings 910. The micro LEDs 900, like the micro LEDs 500 of FIG. 5, share a continuous active area while remaining individually addressable via the p-layer 842 and the electron blocking layer 744 which prevents the movement of free electron carriers between adjacent micro LEDs 900. Thus, the integrity of the prep layer 320 and the active area 330 remains intact, thus preserving the IQE and emission wavelength of the original planar structure while defining the individually addressable micro LEDs.

[0027] FIG. 10 illustrates an alternative process for forming micro LEDs on a semiconductor substrate or semiconductor template as illustrated in FIGS. 7-9 according to an embodiment of the present disclosure. As illustrated in FIG. 10, process 1000 begins at start step 1002 and proceeds to step 1010 where one or more prep layers are deposited onto a semiconductor substrate or semiconductor template. An active region (e.g., an active QW region) is then formed on the prep layers at step 1012. An electron blocking layer is deposited on the active region at step 1014. One or more mask structures are deposited on the electron blocking layer at step 1016 to define the shape and size of the micro LEDs. An additional p-layer is then deposited at step 1020. At step 1022, the mask structures are removed and process 1000 ends at end step 1030.

[0028] FIG. 11 illustrates an alternative arrangement of micro LEDs formed on a semiconductor substrate or template according to an embodiment of the present disclosure. As shown in FIG. 11, a plurality of micro LEDs 1100A-1100C separated by spacings 1105 are formed on a semiconductor substrate or template 1110. Within each micro LED 1100A-1100C are one or more prep layers 1120, an active region 1130, and one or more p layers 1160. Also shown on each of the micro LEDs 1100A-1100C are electrical contacts 1150 for electrically addressing that micro LED. Note that although spacings 1105 are shown as extending into the semiconductor substrate 1110, separating adjacent micro LEDs including the active regions 1130, each of the micro LEDs 1100A-1100C also includes a shallow step 1160. In this manner, the dimensions of the light emitting portion (i.e., active area 1130) of each micro LED can potentially be maximized while customizing the device space required for electrical addressing of each of the micro LEDs 1100A-1100C to the requirements for a particular device application. Furthermore, in the configuration shown in FIG. 11, all of the micro LEDs may be configured to emit light in the same wavelength range, or each of the micro LEDs 1100A-1100C may be configured to emit light in a distinct wavelength. For example, the micro LED 1100A may be configured to emit light in red wavelengths, the micro LED 1100B may be configured to emit light in green wavelengths, and the micro LED 1100C may be configured to emit light in blue wavelengths. The shallow step 1160 may be incorporated into all of the micro LEDs 1100A-1100C or only into certain micro LEDs.

[0029] The techniques described above may be used in configurations where multiple types of micro LEDs (e.g., configured to emit light in different wavelength ranges) are monolithically integrated on a common substrate. In such an embodiment, one or more of the micro LEDs may be based on shallow isolation structures formed by the shallow etching process described above. Furthermore, the shallow isolation structures may be combined with conventional deep isolation structures (e.g., as shown in FIG. 4) for different types of micro LEDs. Such deep isolation structures may be used, for example, outside of shallow isolation areas. Such combinations of shallow and deep isolation structures may be optimized for specific desired properties of the micro LEDs, such as optical isolation and light extraction.

[0030] While the techniques described above may be particularly attractive for forming micro-LEDs operating in the red wavelength range, the same techniques may be used to form micro-LEDs operating in other wavelength ranges, such as blue, green, infrared, etc. That is, the embodiments of the micro-LED structures presented herein enable higher efficiency over a broader range of wavelengths. For example, the embodiments presented herein may improve efficiency at longer wavelength emission while minimizing blue shift from planar LED structures to micro-LED formats. It is noted that the device configurations and techniques presented herein may be applicable to any semiconductor QW structures and devices.

[0031] Furthermore, the shallow etching techniques described above may be used in combination with other micro LED formation techniques. For example, additional micro LEDs may be formed in the openings (e.g., openings 510 and 910) between the micro LEDs formed using the shallow etching techniques. As an example, the shallow etching techniques described above may be used to form a first set of micro LEDs operating in a first wavelength range, leaving sufficient space between the first set of micro LEDs to form the additional micro LEDs in the openings. The additional micro LEDs may be configured to cooperate with the active regions of the first set of micro LEDs to emit light in a wavelength range outside the first wavelength range. Alternatively, additional semiconductor devices (e.g., sensors, transistors, or other non-emitting devices) may be disposed in the openings between the micro LEDs formed using the shallow etching techniques described above.

[0032] The preceding description is provided to enable any person skilled in the art to practice the various aspects described herein. Those skilled in the art will readily appreciate various modifications to these aspects, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not intended to be limited to the aspects set forth herein, but should be accorded the full scope consistent with the language of the claims. Reference to an element in the singular does not mean "one and only one" unless otherwise specified, but rather means "one or more." Unless otherwise specified, the term "some" refers to one or more. Combinations such as "at least one of A, B, or C," "one or more of A, B, or C," "at least one of A, B, and C," "one or more of A, B, and C," and "A, B, C, or any combination thereof" may include any combination of A, B, and / or C, or may include multiple A, multiple B, or multiple C. In particular, combinations such as "at least one of A, B, or C," "one or more of A, B, or C," "at least one of A, B, and C," "one or more of A, B, and C," and "A, B, C, or any combination thereof" may be A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C, and any such combination may include one or more components of A, B, or C. All structural and functional equivalents known or later to become known by those skilled in the art to the elements of the various embodiments described throughout this disclosure are expressly incorporated herein by reference and are intended to be covered by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public, whether or not such disclosure is expressly set forth in the claims.

Claims

1. An array of micro light emitting diodes (micro LEDs), the array of micro LEDs comprising: A semiconductor substrate; at least one prep layer disposed over at least a portion of the semiconductor substrate; an active area disposed on the at least one prep layer; a thick substructure disposed over the active region; a thin substructure disposed over the active region, the thin substructure disposed adjacent to the thick substructure; the thick substructure defines a shape and size of at least one of the micro LEDs in the array of micro LEDs; A light emitting system, wherein the thin substructure is configured to prevent movement of free electron carriers through the thin substructure.

2. The light emitting system of claim 1 , wherein the thin substructure comprises an electron blocking layer.

3. 3. A light emitting system according to claim 1 or 2, wherein the thin substructure is made of p-type Al(In)GaN.

4. 4. The light emitting system of claim 1, wherein the thin substructure has a thickness of less than 1 micron.

5. The lighting system of claim 1 , wherein the thin substructure has a thickness of about 0.5 microns.

6. 6. The light emitting system of claim 1, wherein the active region comprises at least one of a quantum well structure, a plurality of quantum dots, and a double heterojunction structure.

7. 1. A method for fabricating an array of micro light emitting diodes (micro LEDs) on a semiconductor substrate, the method comprising: depositing at least one prep layer over at least a portion of the semiconductor substrate; forming an active area on the at least one prep layer; depositing at least one p-layer over the active region; and depositing at least one mask structure over the at least one p-layer, the at least one mask structure configured to define a size and shape of each of the array of micro LEDs; partially etching away the at least one p-layer by thinning areas of the at least one p-layer that are not covered by the at least one mask structure; and removing the at least one mask structure.

8. 8. The method of claim 7, wherein partially etching away the at least one p-layer comprises reducing a thickness of the at least one p-layer to less than 1 micron where the at least one p-layer is not covered by the at least one mask structure.

9. 9. The method of claim 8, wherein reducing the thickness of the at least one p-layer comprises reducing a thickness of the at least one p-layer to approximately 0.5 microns where the at least one p-layer is not covered by the at least one mask structure.

10. the combination of the semiconductor substrate, the at least one prep layer, the active region, and the at least one p-layer exhibits emission at a first wavelength; 10. The method of claim 7, wherein each of the micro-LEDs exhibits emission at the first wavelength after removing the at least one mask structure.

11. the combination of the semiconductor substrate, the at least one prep layer, the active region, and the at least one p-layer exhibits a first internal quantum efficiency (IQE) value at a given wavelength; 11. The method of claim 7, wherein each of the micro LEDs exhibits an IQE value substantially similar to the first IQE value at the given wavelength after removal of the at least one mask structure.

12. 12. The method of claim 7, wherein partially etching away the at least one p-layer leaves the active area and the at least one prep layer intact.

13. 13. The method of claim 7, wherein forming the active region comprises forming at least one of a quantum well structure, a plurality of quantum dots, and a double heterojunction structure.

14. A plurality of micro LEDs, A semiconductor substrate; at least one prep layer disposed over at least a portion of the semiconductor substrate; an active area disposed on the at least one prep layer; an electron blocking layer disposed over the active region; a first thick substructure disposed over the electron blocking layer; the first thick substructure is physically separate from a second thick substructure and defines a shape and size of a corresponding one of the plurality of micro LEDs; the electron blocking layer is configured to prevent movement of free electron carriers through the electron blocking layer to electrically isolate the first thick substructure from the second thick substructure.

15. 1. A method for fabricating an array of micro light emitting diodes (micro LEDs) on a semiconductor substrate, the method comprising: depositing at least one prep layer over at least a portion of the semiconductor substrate; forming an active area on the at least one prep layer; depositing an electron blocking layer over the active region; depositing at least one p-layer over said electron blocking layer; and depositing at least one mask structure over the at least one p-layer, the at least one mask structure configured to define a size and shape of each of the micro-LEDs; etching away the at least one p-layer without penetrating the electron blocking layer where the at least one p-layer is not covered by the at least one mask structure; and removing the at least one mask structure.

16. The plurality of micro-LEDs of claim 14, wherein the electron blocking layer is formed of p-type Al(In)GaN.

17. A plurality of micro-LEDs as described in claim 14, wherein the thickness of the electron blocking layer is less than 1 micron.

18. A plurality of micro-LEDs as described in claim 14, wherein the thickness of the electron blocking layer is about 0.5 microns.

19. The plurality of micro-LEDs of claim 14, wherein the active region comprises at least one of a quantum well structure, a plurality of quantum dots, and a double heterojunction structure.

20. The light emitting system of claim 1, wherein the array of micro LEDs share the active area.

21. The light emitting system of claim 1, wherein the thick substructure is a first thick substructure, and the thin substructure is configured to prevent movement of free electron carriers through the thin substructure to electrically isolate the first thick substructure from a second thick substructure.

22. A semiconductor substrate; at least one prep layer disposed over at least a portion of the semiconductor substrate; an active area disposed on the at least one prep layer; a substructure disposed over the active region and having a thick portion and a thin portion, the thin portion of the substructure configured to prevent movement of free electron carriers through the thin portion of the substructure.

23. The microLED of claim 22, wherein the thin portion of the substructure is formed of p-type Al(In)GaN.

24. The microLED of claim 22, wherein the thin portion of the substructure has a width that is less than a height of the thin portion of the substructure.

25. The microLED of claim 22, wherein the thin portion of the substructure has a thickness of less than 1 micron.

26. The microLED of claim 22, wherein the thin portion of the substructure has a thickness of about 0.5 microns.

27. The microLED of claim 22, wherein the thin portion of the substructure is a first thin portion of the substructure, and the thick portion of the substructure is disposed between the first thin portion of the substructure and a second thin portion of the substructure.

28. The microLED of claim 22, wherein the active region comprises at least one of a quantum well structure, a plurality of quantum dots, and a double heterojunction structure.

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