Power supply control device

Abstract

To provide a power supply control device which allows reference of use environment history.SOLUTION: A power supply control device controls an operation of a power unit which generates output voltage from input voltage and comprises: a temperature determination circuit configured to determine the temperature range to which the power control device belongs from any of a plurality of temperature ranges (R[1] to R[5]); a measurement circuit which measures time in which the temperature of the power supply control device belongs to the temperature range for every temperature range; and a nonvolatile memory which stores a measurement result by the measurement circuit.SELECTED DRAWING: Figure 10

Description

[Technical field]

[0001] The present disclosure relates to a power supply control device. [Background technology]

[0002] 2. Description of the Related Art Various power supply control devices have been put into practical use as devices for controlling the operation of a power supply device that generates an output voltage from an input voltage. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-089043 A

[0004] [overview] Power supply control devices and power supplies are used in various environments. The environments in which the power supply control devices and power supplies are used are important information related to determining their life spans, etc. Technology that allows such information to be referenced is useful.

[0005] The power supply control device of the present disclosure is a power supply control device configured to control the operation of a power supply device that generates an output voltage from an input voltage, and includes a temperature determination circuit configured to determine which of a plurality of temperature ranges the temperature of the power supply control device belongs to, a measurement circuit configured to measure, for each temperature range, the time that the temperature of the power supply control device belongs to that temperature range, and a non-volatile memory configured to store the measurement results by the measurement circuit. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic configuration block diagram of a power supply device according to an embodiment of the present disclosure. [Diagram 2] FIG. 2 is an external perspective view of the power supply control device according to the embodiment of the present disclosure. [Diagram 3] FIG. 3 is a diagram showing a state in which a regulator with multiple channels is provided in a power supply device according to an embodiment of the present disclosure. [Figure 4] FIG. 4 is a diagram showing a state in which a regulator with multiple channels is provided in a power supply device according to an embodiment of the present disclosure. [Diagram 5] FIG. 5 is a configuration diagram of two regulators in a power supply device according to an embodiment of the present disclosure. [Figure 6] FIG. 6 is a partial block diagram of a power supply control device according to an embodiment of the present disclosure. [Figure 7] FIG. 7 is a diagram illustrating the relationship between a number of boundary temperatures and a number of temperature ranges according to an embodiment of the present disclosure. [Figure 8] FIG. 8 is a diagram illustrating the operation of the measurement circuit of FIG. 6 according to an embodiment of the present disclosure. [Figure 9] FIG. 9 is a structural diagram of temperature history information stored in a non-volatile memory according to an embodiment of the present disclosure. [Figure 10] FIG. 10 is a diagram illustrating an example of temperature history information stored in a non-volatile memory according to an embodiment of the present disclosure.

[0007] [Detailed Description] Hereinafter, examples of the embodiments of the present disclosure will be specifically described with reference to the drawings. In each of the drawings, the same parts are given the same reference numerals, and duplicated descriptions of the same parts are omitted as a rule. In this specification, for the sake of simplicity, a symbol or code referring to information, signal, physical quantity, functional part, circuit, element, or part, etc. may be written, and the name of the information, signal, physical quantity, functional part, circuit, element, or part, etc. corresponding to the symbol or code may be omitted or abbreviated. For example, the non-volatile memory referred to by "26" described later (see FIG. 6) may be written as non-volatile memory 26 or abbreviated as memory 26, but they all refer to the same thing.

[0008] First, some terms used in the description of the embodiments of the present disclosure will be explained. Ground refers to a reference conductive part having a reference potential of 0V (zero volts) or refers to the potential of 0V itself. The reference conductive part may be formed using a conductor such as a metal. In the embodiments of the present disclosure, a voltage shown without a particular reference represents a potential seen from ground.

[0009] For any transistor configured as a FET (field effect transistor) including a MOSFET, the on state refers to a state in which the drain and source of the transistor are conductive, and the off state refers to a state in which the drain and source of the transistor are non-conductive (cut-off state). The same applies to transistors not classified as FETs. Unless otherwise specified, a MOSFET is understood to be an enhancement type MOSFET. MOSFET is an abbreviation for "metal-oxide-semiconductor field-effect transistor". Also, unless otherwise specified, in any MOSFET, the backgate can be considered to be short-circuited to the source. Hereinafter, the on state and off state of any transistor may be simply expressed as on and off.

[0010] Unless otherwise specified, the connection between multiple parts that form a circuit, such as any circuit elements, wiring, nodes, etc., may be understood to refer to an electrical connection.

[0011] 1 is a schematic configuration block diagram of a power supply device 1 according to an embodiment of the present disclosure. The power supply device 1 includes a power supply control device 2 and a discrete component group 3 made up of a plurality of discrete components externally connected to the power supply control device 2. The power supply control device 2 may be an electronic component classified as a PMIC (Power Management IC).

[0012] Fig. 2 shows an external perspective view of the power supply control device 2. The power supply control device 2 is an electronic component including a semiconductor chip having a semiconductor integrated circuit formed on a semiconductor substrate, a housing (package) that houses the semiconductor chip, and a plurality of external terminals that are exposed from the housing to the outside of the power supply control device 2. The power supply control device 2 is formed by sealing the semiconductor chip in a housing (package) made of resin. Note that the number of external terminals of the power supply control device 2 and the type of housing of the power supply control device 2 shown in Fig. 2 are merely examples, and can be designed as desired.

[0013] As shown in FIG. 3, the power supply device 1 is provided with regulators 4 for n channels, that is, n regulators 4 are provided. Each regulator 4 is provided with a control block 10. n represents an arbitrary integer of 2 or more. The n channels are made up of a first channel to an n-th channel. Each regulator 4 is connected to an input voltage V IN The input voltage V IN The output voltage V OUT The input voltage V IN and the output voltage V OUT are different DC voltages. The input voltage V IN or output voltage V OUT can be a negative DC voltage, but in the following, the input voltage V IN and the output voltage V OUT is a positive DC voltage.

[0014] The regulator 4 of one or more of the first to n-th channels may be a switching regulator. IN By stepping down the input voltage V IN Lower output voltage V OUT A step-down switching regulator that generates an input voltage V IN By boosting the input voltage V IN Higher output voltage V OUTThe regulators 4 of one or more of the first to n-th channels may be linear regulators. The total of n regulators 4 of the first to n-th channels may all be switching regulators or all be linear regulators. The total of n regulators 4 of the first to n-th channels may include a mixture of one or more switching regulators and one or more linear regulators.

[0015] A total of n output voltages V for the first to nth channels OUT are different DC voltages. A The output voltage V at the channel OUT and the value of the i B The output voltage V at the channel OUT In some cases, the value of i A and i B represents any different natural numbers less than or equal to n.

[0016] A total of n input voltages V for the first to nth channels IN In other words, a common DC voltage is the input voltage V IN It can be used as both. A The input voltage V at the channel IN is the i B The input voltage V at the channel IN It may be the same as or different from the input voltage V of any one of the first to nth channels. IN may be the power supply voltage of the power supply control device 2.

[0017] A total of n control blocks 10 for the first to n-th channels are provided in the power supply control device 2. In each channel, a regulator 4 is formed by the control block 10 and discrete components connected to the control block 10. As shown in FIG. 4, the regulator 4, the control block 10, and the input voltage V IN , output voltage V OUT, respectively, in particular the regulator 4[i], the control block 10[i], and the input voltage V IN [i], output voltage V OUT It is written as [i], where i represents any integer (e.g., any natural number less than or equal to n).

[0018] Power supply 1 has an input voltage V IN to output voltage V OUT The power control device 2 controls the operation (power conversion) of the power supply device 1. That is, the power control device 2 controls the operation (power conversion) of the regulator 4 for each channel.

[0019] FIG. 5 shows two arbitrary regulators 4[i A ] and 4[i B ] is shown below. A ] is the control block 10 [i A ] and output coil L[i A ] and output capacitor C[i A Regulator 4 [i B ] is control block 10[i B ] and output capacitor C[i B ]. Regulator 4 [i B ] may be an LDO (Low Dropout) regulator. A ] and 10[i B ] is provided in the power supply control device 2. The output coil L[i A ] and output capacitor C[i A ] and C[i B ] is a component of the disk lead component group 3 (see FIG. 1).

[0020] Control block 10[i A The input voltage VIN [i A ] is supplied to the drain of each of the transistors 11 and 12. A ] are connected in common to the first ends of the output coils L[i A The second end of OUT[i A The source of the transistor 12 is connected to ground. The output node OUT[i A ] and an output capacitor C[i A That is, an output capacitor C[i A ] is connected to the output node OUT[i A ] and the output capacitor C[i A The second end of the output node OUT[i A ] is the output voltage V OUT [i A ].

[0021] Output voltage V OUT [i A ] is input. In FIG. 5, the output node OUT[i A ] is connected to the control drive circuit 13, the output voltage V OUT [i A ] is itself the output voltage V OUT [i A ] is input to the control drive circuit 13 as feedback information. However, the output voltage V OUT [i A ] feedback information is the output voltage V OUT [i A The control drive circuit 13 is connected to the gates of the transistors 11 and 12, and controls the gate potentials of the transistors 11 and 12 to turn the transistors 11 and 12 on or off individually. The control drive circuit 13 outputs an output voltage V OUT [i A ], the output voltage V OUT [i A] is stabilized at a predetermined target voltage. By this switching control, a square wave voltage (approximately 0V and the input voltage V IN [i A ]) is generated. A ] and output capacitor C[i A ] rectifies and smoothes the square wave voltage at the output node OUT[i A ] to output voltage V OUT [i A ] occurs.

[0022] Control block 10[i B The input voltage V IN [i B The drain of transistor 14 is connected to output node OUT[i B ] is connected to the output node OUT[i B ] and an output capacitor C[i B That is, an output capacitor C[i B ] is connected to the output node OUT[i B ] and the output capacitor C[i B The second end of the output node OUT[i B ] is the output voltage V OUT [i B ].

[0023] Output voltage V to the control drive circuit 15 OUT [i B ] is input. In FIG. 5, the output node OUT[i B ] is connected to the control drive circuit 15, the output voltage V OUT [i B ] is itself the output voltage V OUT [i B ] is input to the control drive circuit 15 as feedback information. However, the output voltage VOUT [i B ] feedback information is the output voltage V OUT [i B The control drive circuit 15 is connected to the gate of the transistor 14. The control drive circuit 15 outputs an output voltage V OUT [i B ], the gate potential of the transistor 14 is controlled based on the feedback information of the output node OUT[i B ], which controls the amount of current supplied to the output voltage V OUT [i B ] is stabilized at a predetermined target voltage.

[0024] Regulator 4 [i A The power supply device 1 may be provided with two or more regulators 4 having the same configuration as the regulator 4[i B ] may be provided in the power supply device 1.

[0025] FIG. 6 is a block diagram for realizing the characteristic functions of the power supply control device 2, showing a block diagram of a part of the power supply control device 2. The power supply control device 2 comprises a temperature sensor 21, a temperature determination circuit 22, a measurement circuit 23, an abnormality detection circuit 24, a memory controller 25, a non-volatile memory 26, a volatile memory 27, and a signal output control circuit 28. The abnormality detection circuit 24 includes a temperature abnormality detection circuit 24a. FIG. 6 also shows an external device 5 provided outside the power supply control device 2. The external device 5 includes, for example, an MPU (Micro Processing Unit). The power supply control device 2 and the external device 5 are connected to each other via a predetermined communication bus so that they can communicate with each other bidirectionally. For example, an I 2 Bidirectional communication between the power supply control device 2 and the external device 5 is realized through a communication bus based on an Inter-Integrated Circuit (C) or a Serial Peripheral Interface (SPI).

[0026] The temperature sensor 21 detects the target temperature TEMP and outputs a temperature signal S according to the target temperature TEMP. TEMPThe object temperature TEMP is the temperature of the power supply control device 2. More specifically, the object temperature TEMP is the temperature at a predetermined measurement target position in the power supply control device 2. That is, the temperature sensor 21 is installed at a predetermined measurement target position in the power supply control device 2, and outputs a temperature signal S corresponding to the temperature at the measurement target position. TEMP Output.

[0027] The temperature sensor 21 uses a temperature detection diode formed by a semiconductor PN junction to generate a temperature signal S TEMP More specifically, for example, the temperature sensor 21 includes a temperature detection diode, a constant current circuit that supplies a constant current to the temperature detection diode in a forward direction, and a temperature signal S based on a forward voltage Vf of the temperature detection diode. TEMP The forward voltage Vf is a forward voltage generated in the temperature detection diode during a period in which a constant current is supplied to the temperature detection diode in the forward direction. TEMP may be the forward voltage Vf itself, or may be a signal obtained by amplifying the forward voltage Vf. Since the forward voltage Vf increases or decreases according to the target temperature TEMP, the temperature signal S is obtained by detecting the forward voltage Vf. TEMP The temperature signal S TEMP is supplied to the temperature determination circuit 22 and the temperature abnormality detection circuit 24a.

[0028] The temperature determination circuit 22 detects the temperature signal S TEMP Based on this, it is determined which of the temperature ranges R[1] to R[m] the target temperature TEMP belongs to. m represents an arbitrary integer of 2 or more. The temperature ranges R[1] to R[m] are m types of temperature ranges that do not overlap with each other. See FIG. 7. In the temperature determination circuit 22, a boundary temperature T B [1]~T B [m-1] is defined. Boundary temperature T B [j+1] is the boundary temperature T B [j]. j represents any integer. For any integer j that satisfies “2≦j≦m-1”, the temperature range R[j] is higher than the boundary temperature T B [j-1] or more and boundary temperature TB The temperature range is less than [j]. The boundary temperature T B Temperatures below [1] belong to the temperature range R[1]. The boundary temperature T B Temperatures above [m] belong to the temperature range R[m].

[0029] The temperature determination circuit 22 may be configured with an AD converter. In this case, the AD converter converts the temperature signal S TEMP is converted into a digital signal, the temperature signal S TEMP The temperature determination circuit 22 obtains a voltage value of the temperature signal S, and determines which of the temperature ranges R[1] to R[m] the target temperature TEMP belongs to based on the obtained voltage value. Alternatively, the temperature determination circuit 22 may be configured with (m-1) comparators. In this case, the temperature determination circuit 22 uses the (m-1) comparators to generate the temperature signal S. TEMP The voltage of is compared with (m-1) kinds of judgment voltages, and the temperature signal S TEMP Based on the high / low relationship between this voltage and the (m-1) types of judgment voltages, it is determined to which of the temperature ranges R[1] to R[m] the target temperature TEMP belongs.

[0030] A classification signal S indicating which of the temperature ranges R[1] to R[m] the target temperature TEMP belongs to CLS is output from the temperature determination circuit 22 to the measurement circuit 23.

[0031] The measurement circuit 23 outputs a classification signal S CLS For convenience, a classification signal S indicating that the target temperature TEMP belongs to the temperature range R[j] is used. CLS Classify the signal S CLS Therefore, for example, during a period when the target temperature TEMP belongs to the temperature range R[1], the temperature determination circuit 22 sends a classification signal S CLS [1] is output, and during the period when the target temperature TEMP belongs to the temperature range R[2], the temperature judgment circuit 22 outputs a classification signal S to the measurement circuit 23. CLS[2] is output. The same applies to the period during which the target temperature TEMP belongs to other temperature ranges. The measurement circuit 23 can be configured with a counter. The count value for measuring the time during which the target temperature TEMP belongs to the temperature range R[j] is called the count value VAL[j]. The initial value of the count value VAL[j] is zero.

[0032] 8 shows how the count VAL[j] changes during the period when the target temperature TEMP belongs to the temperature range R[j]. CLS During the period during which the target temperature TEMP is supplied to the measurement circuit 23 (i.e., the period during which the target temperature TEMP is in the temperature range R[j]), the measurement circuit 23 adds 1 to the count value VAL[j] every time a predetermined short time elapses. MAX When the count value VAL[j] reaches the temperature range R[j], the count value VAL[j] is reset and an up-count signal UP[j] is output to the memory controller 25. Then, during the period when the target temperature TEMP belongs to the temperature range R[j], UNIT For example, during a period in which the target temperature TEMP belongs to the temperature range R[1], the up-count signal UP[j] is output to the memory controller 25. UNIT When the target temperature TEMP is in the temperature range R[2], the up-count signal UP[1] is output from the measurement circuit 23 to the memory controller 25. UNIT The up-count signal UP[2] is output from the measurement circuit 23 to the memory controller 25 every time the unit time t UNIT is the above-mentioned minute time and upper limit value VAL MAX and is, for example, several minutes to several hours. The up-count signal UP[j] may be, for example, a one-shot pulse signal.

[0033] Note that resetting the count value VAL[j] means substituting the initial value, zero, for the count value VAL[j]. MAX has an integer value sufficiently greater than zero (e.g., 255 or 65535).

[0034] The abnormality detection circuit 24 detects a predetermined abnormality (more specifically, detects whether or not a predetermined abnormality has occurred). The abnormality detected by the abnormality detection circuit 24 is an abnormality in the power supply control device 2 or an abnormality in the power supply device 1. The detection targets of the abnormality detection circuit 24 include at least a temperature abnormality. A temperature abnormality is detected by a temperature abnormality detection circuit 24a. TSD The first temperature abnormality occurs when the target temperature TEMP reaches the specified warning temperature T TW There is a second temperature anomaly that reaches (T TSD >T TW ) 。 The temperature abnormality detection circuit 24a outputs a temperature signal S TEMP Based on this, the first or second temperature anomaly is detected (more specifically, the occurrence or nonoccurrence of the first or second temperature anomaly is detected).

[0035] The detection target of the abnormality detection circuit 24 includes an output voltage abnormality for each channel. OUT Detects an output voltage abnormality of the i-th channel based on the feedback information [i]. Output voltage V OUT The feedback information of [i] is the output voltage V OUT [i] itself or the output voltage V OUT [i]. There are OVP abnormality, OVD abnormality, UVP abnormality, and UVD abnormality as output voltage abnormality for each channel. The OVP abnormality of the i-th channel is OUT [i] is the predetermined upper protection voltage V OVP The OVD abnormality of the i-th channel is the state where the output voltage V OUT [i] is the upper detection voltage V OVD The UVD abnormality of the i-th channel is the output voltage V OUT [i] is a given lower warning voltage V UVD [i] refers to the state where the output voltage V OUT [i] is the predetermined lower protection voltage V UVP [i] refers to the state where “V OVP [i]>V OVD [i]>V TG[i]>V UVD [i]>V UVP [i]>0” holds. V TG [i] is the output voltage V OUT [i] represents the target voltage to be stabilized.

[0036] In addition, the abnormality detection circuit 24 may be able to detect various types of abnormalities. For example, the abnormality detection circuit 24 can detect an abnormality where the power supply voltage supplied to the power supply control device 2 is too high or too low, an abnormality in communication between the external device 5 and the power supply control device 2, and an abnormality in a watchdog timer used between the external device 5 or another circuit and the power supply control device 2. The abnormality detection circuit 24 outputs the detection results of various abnormalities to the memory controller 25.

[0037] The memory controller 25 can write any information to the non-volatile memory 26 and can also write any information to the volatile memory 27. At this time, the memory controller 25 can write information according to the measurement results by the measurement circuit 23 or information according to the detection results of various abnormalities by the abnormality detection circuit 24 to the memories 26 and 27. The memory controller 25 can also read any information stored in the memory 26 or 27.

[0038] The non-volatile memory 26 is a multi-time programmable memory (MTP) memory that allows information stored therein to be rewritten multiple times. The non-volatile memory 26 retains its stored contents even when the supply of power supply voltage to the power supply control device 2 is interrupted. In contrast, the stored contents of the volatile memory 27 are lost when the supply of power supply voltage to the power supply control device 2 is interrupted. The volatile memory 27 is a random access memory (RAM) and may be classified as a register. The signal output control circuit 28 can output various information based on the stored contents of the memory 26 or 27 to the external device 5 via the communication bus. The signal output control circuit 28 may read the stored contents of the memory 26 or 27 via the memory controller 25.

[0039] When any abnormality is detected by the abnormality detection circuit 24, the memory controller 25 can store the information indicating that the first temperature abnormality has been detected in the memories 26 and 27 for each type of abnormality detected. For example, when a first temperature abnormality is detected by the temperature abnormality detection circuit 24a, the memory controller 25 stores information indicating that the first temperature abnormality has been detected in the memories 26 and 27. The same applies when a second temperature abnormality is detected. Also, for example, when an OVP abnormality of the first channel is detected by the abnormality detection circuit 24, the memory controller 25 stores information indicating that the OVP abnormality of the first channel has been detected in the memories 26 and 27. Similarly, when an OVP abnormality of the second channel is detected by the abnormality detection circuit 24, the memory controller 25 stores information indicating that the OVP abnormality of the second channel has been detected in the memories 26 and 27. The same applies when an OVP abnormality of another channel is detected. The same applies when an OVD abnormality, UVP abnormality, or UVD abnormality of any channel is detected. The same applies when another type of abnormality is detected.

[0040] In addition, the memory controller 25 can perform a process for storing the temperature history information in the non-volatile memory 26. FIG. 9 shows the structure of the temperature history information stored in the non-volatile memory 26. The temperature history information is stored in the non-volatile memory 26 over a cumulative drive time t ACM [1] ACM Contains information representing [m].

[0041] The power supply control device 2 operates only during the period when the power supply voltage is supplied to the power supply control device 2. The cumulative value of the time during which the temperature TEMP is within the temperature range R[j] during the operation of the power supply control device 2 is the cumulative operation time t ACM [j]. For example, the cumulative driving time t ACM [1] is the cumulative value of the time during which the temperature TEMP is in the temperature range R[1] during the operating time of the power supply control device 2 (specifically, the total operating time). Similarly, for example, the cumulative operating time t ACM [2] is the cumulative value of the time during which the temperature TEMP is in the temperature range R[2] during the operating time of the power supply control device 2 (specifically, the total operating time). ACM [3] ACMThe same applies to the cumulative drive time t ACM [j] represents the total length of the period during which the temperature TEMP was in the temperature range R[j] within the operating time of the power control device 2 (specifically, within the total operating time).

[0042] In practice, the non-volatile memory 26 stores the cumulative drive time t ACM [1] ACM Cumulative drive value N [m] ACM [1]~N ACM [m] may be stored separately. ACM [1] ACM [m] and cumulative drive value N ACM [1]~N ACM [m] corresponds one-to-one. That is, the cumulative drive value N ACM [j] is the cumulative driving time t ACM [j]. In the initial state of the power supply control device 2, the cumulative driving value N ACM [1]~N ACM [m] are all zero. Every time the memory controller 25 receives an up-count signal UP[j] (see FIG. 8) from the measurement circuit 23, the memory controller 25 increments the cumulative drive value N ACM [j] by 1. That is, for example, every time the memory controller 25 receives the up-count signal UP[1] from the measurement circuit 23, the memory controller 25 increments the cumulative drive value N ACM [1] is incremented by 1, and each time an up-count signal UP[2] is received from the measurement circuit 23, the cumulative drive value N ACM [2] Increase by 1. Accumulative drive value N ACM [j] and the above unit time t UNIT The product of this is the cumulative drive time t ACM [j]. Cumulative drive value N ACM [j] memory and cumulative drive time t ACM The memories of [j] are equivalent.

[0043] FIG. 10 shows an example of temperature history information at a certain time of interest. In the example of FIG. 10, “m=5” and the boundary temperature T B [1], T B [2], T B [3], T B[4] are assumed to be 0°C, 75°C, 100°C, and 125°C, respectively. In the period from the initial state to the target time, the power control device 2 operates for a total of 1 hour with the target temperature TEMP belonging to the temperature range R[1], for a total of 200 hours with the target temperature TEMP belonging to the temperature range R[2], for a total of 10 hours with the target temperature TEMP belonging to the temperature range R[3], for a total of 5 hours with the target temperature TEMP belonging to the temperature range R[4], and for a total of 1 hour with the target temperature TEMP belonging to the temperature range R[5]. Then, at the target time, the cumulative operating time t ACM [1], t ACM [2], t ACM [3], ACM [4],t ACM [5] Temperature history information indicating that the times are 1 hour, 200 hours, 10 hours, 5 hours, and 1 hour, respectively, is stored and held in the non-volatile memory 26.

[0044] The signal output control circuit 28 can output the temperature history information stored in the nonvolatile memory 26 to the external device 5 via the communication bus. The external device 5 can transmit a command requesting the temperature history information to the power supply control device 2, and in response to the power supply control device 2 receiving the command, the signal output control circuit 28 transmits the temperature history information to the external device 5.

[0045] Furthermore, the signal output control circuit 28 can output any information stored in the memory 26 or 27 (for example, information corresponding to the results of various abnormalities detected by the abnormality detection circuit 24) to the external device 5 via the communication bus. In this case as well, in response to receiving a predetermined command from the external device 5, the signal output control circuit 28 transmits to the external device 5 the information specified by the command (the information in the memory 26 or 27).

[0046] By storing the temperature history information as described above in the non-volatile memory 26, even if the supply of power supply voltage to the power supply control device 2 is frequently interrupted, it becomes possible to accumulate data on the operating environment of the power supply control device 2, and to make judgments regarding the lifespan of the power supply control device 2. In addition, by storing information regarding abnormalities in the non-volatile memory 26, subsequent failure analysis, etc. becomes easier (i.e., information regarding abnormalities can be used to aid in failure analysis, etc.).

[0047] The signal output control circuit 28 can also perform a lifespan determination process. This will be described. In the lifespan determination process, the signal output control circuit 28 calculates the cumulative driving time t ACM [1] ACM Based on [m], it is determined whether the power supply control device 2 has reached the end of its life.

[0048] In the design stage of the power supply control device 2, a design value of the operating time during which the power supply control device 2 can continue to operate according to specifications (hereinafter referred to as the durable design time) is determined. However, the durable design time varies depending on the operating temperature of the power supply control device 2. Basically, the higher the operating temperature of the power supply control device 2, the shorter the durable design time. Taking this into consideration, in the life determination process, the signal output control circuit 28 determines the cumulative operating time t ACM [1] ACM [m] is weighted and added to obtain the weighted sum W SUM Derive the weighted sum W SUM The weighted sum W SUM As increases from zero, the life of the power supply control device 2 approaches its end.

[0049] Weighted sum W SUM is derived according to the following formula (1): SUM is the sum of the first to mth products. The jth product is (k[j]×t ACM[j]). k[1] to k[m] represent predetermined coefficients. The coefficients k[1] to k[m] are all different from each other. However, among the coefficients k[1] to k[m], the values ​​of some of the coefficients may be the same as the values ​​of some of the other coefficients. At least, the coefficients k[1] to k[m] include two or more types of coefficients having different values ​​from each other. For example, at least the coefficients k[1] and k[m] have different values ​​from each other. As described above, the higher the operating temperature of the power supply control device 2, the shorter the durable design time. For this reason, it is basically better that the value of the coefficient k[j+1] is larger than the value of the coefficient k[j] (at least "k[m]>k[1]").

[0050]

number

[0051] In the life judgment process, the signal output control circuit 28 calculates the weighted sum W SUM is a predetermined life determination threshold TH LIM Compared with the weighted sum W SUM is the life determination threshold TH LIM When the weighted sum W SUM is the life determination threshold TH LIM If it is less than this, it is not determined that the power supply control device 2 has reached the end of its life. The signal output control circuit 28 decides whether to output (transmit) a predetermined life end signal to the external device 5 based on the result of the determination as to whether the power supply control device 2 has reached its life. If the signal output control circuit 28 determines that the power supply control device 2 has reached its life, it outputs (transmits) a predetermined life end signal to the external device 5. If it is not determined that the power supply control device 2 has reached its life, the output (transmission) of the life end signal is not executed.

[0052] In addition, in the life determination process, the signal output control circuit 28 calculates the weighted sum W SUM The predetermined life warning threshold TH W and life determination threshold TH LIM Compared to each of the "TH LIM >W SUM ≧TH W" is established, a predetermined life warning signal may be output (transmitted) to external device 5. The life end signal is a signal indicating that the power supply control device 2 has reached its life, while the life warning signal is a signal indicating that the power supply control device 2 will soon reach the end of its life. By being able to output a life end signal or a life warning signal, it becomes possible to know when it is time to replace the power supply control device 2 or the equipment including the power supply control device 2.

[0053] The memories 26 and 27 may store end of life information and end of life warning information, respectively. The end of life information and end of life warning information each have a value of "1" or "0". The initial value of the end of life information and end of life warning information is "0". The signal output control circuit 28 is SUM ≧TH W When "W" is established, "1" is written to each of the end-of-life warning information in the memories 26 and 27 via the memory controller 25. The signal output control circuit 28 writes "1" to each of the end-of-life warning information in the memories 26 and 27 via the memory controller 25. SUM ≧TH LIM When the condition "is met," "1" is written to each of the life end information in memories 26 and 27 via the memory controller 25. Life warning information of "1" is information indicating that the power supply control device 2 will soon reach the end of its life. Life end information of "1" is information indicating that the power supply control device 2 has reached the end of its life.

[0054] The life end signal and the life warning signal may be signals that can be distinguished from each other by the external device 5, but the following signal output configuration may be adopted. That is, a signal output circuit with an open drain configuration is provided in the power supply control device 2, and an error signal can be output from the power supply control device 2 to the external device 5 using the signal output circuit. The error signal is a binary signal that expresses a value of "1" or "0". In principle, the signal output control circuit 28 gives the error signal a value of "0" and sets it to "W". SUM ≧TH LIM When the condition "W" is satisfied, the signal output control circuit 28 outputs an error signal of "1". In this case, the error signal of "1" functions as a life end signal. Alternatively, the signal output control circuit 28 may, in principle, set the error signal to a value of "0" and set the error signal to a value of "W". SUM ≧TH W" is established. In this case, the error signal "1" functions as a life warning signal. In addition, the signal output control circuit 28 also outputs an error signal "1" when a specific abnormality (for example, a temperature abnormality or an output voltage abnormality) is detected by the abnormality detection circuit 24. In this case, the external device 5 cannot determine the cause of the error signal "1" in detail at the stage when the error signal "1" is received. However, after receiving the error signal "1", the external device 5 can determine the cause of the error signal "1" in detail by sending a command to the power supply control device 2 requesting the stored information in memory 26 or 27 and receiving the information sent from the power supply control device 2 in response to the command (the stored information in memory 26 or 27). Incidentally, when a specified error reset command from the external device 5 is received by the power supply control device 2, the value of the error signal may be returned to "0" in the power supply control device 2.

[0055] [Applications, transformations, etc.] Some applied or modified techniques for the above-described embodiment will be described.

[0056] The memory controller 25 may store temperature history information including time-series data of the target temperature TEMP in the non-volatile memory 26. That is, for example, consider a case where the power supply control device 2 is operated for a total of three hours with the target temperature TEMP belonging to the temperature range R[1], and then the power supply control device 2 is operated for a total of ten hours with the target temperature TEMP belonging to the temperature range R[2]. In this case, time-series data that can specify that the power supply control device 2 is operated for a total of three hours with the target temperature TEMP belonging to the temperature range R[1], and then the power supply control device 2 is operated for a total of ten hours with the target temperature TEMP belonging to the temperature range R[2] may be stored in the non-volatile memory 26.

[0057] A plurality of temperature sensors 21 may be provided in the power supply control device 2. In this case, the plurality of temperature sensors 21 are installed at a plurality of different measurement target positions within the power supply control device 2, and the temperatures at the plurality of measurement target positions are detected individually by the plurality of temperature sensors 21. The temperatures at the plurality of measurement target positions are a plurality of target temperatures TEMP. In this case, the above-mentioned operations may be performed for each target temperature TEMP, thereby storing temperature history information for each target temperature TEMP in the non-volatile memory 26.

[0058] The total number of regulators 4 provided in the power supply device 1 may be 1. That is, "n=1" may be acceptable.

[0059] The power supply device 1 may be mounted on a vehicle such as an automobile. In this case, the input voltage V IN The power supply voltage of the power supply control device 2 is the output voltage of a battery mounted on the vehicle, or is generated based on the output voltage of the battery. However, the use of the power supply device 1 is not limited to in-vehicle use, and is arbitrary.

[0060] The channel types of FETs (field effect transistors) shown in each embodiment are merely examples, and the channel type of any FET may be changed between P-channel and N-channel without departing from the spirit of the above.

[0061] Any of the transistors described above may be any type of transistor, provided that no disadvantage occurs. For example, any of the transistors described above as MOSFETs may be replaced with junction FETs, IGBTs (Insulated Gate Bipolar Transistors), or bipolar transistors, provided that no disadvantage occurs. Any of the transistors has a first electrode, a second electrode, and a control electrode. In a FET, one of the first and second electrodes is a drain, the other is a source, and the control electrode is a gate. In an IGBT, one of the first and second electrodes is a collector, the other is an emitter, and the control electrode is a gate. In a bipolar transistor that does not belong to an IGBT, one of the first and second electrodes is a collector, the other is an emitter, and the control electrode is a base.

[0062] The embodiments of the present disclosure can be modified in various ways as appropriate within the scope of the technical ideas set forth in the claims. The above embodiments are merely examples of the embodiments of the present disclosure, and the meanings of the terms of the present disclosure or each component are not limited to those described in the above embodiments. The specific numerical values ​​shown in the above description are merely examples, and can be changed to various numerical values ​​as a matter of course.

[0063] <<Additional Notes>> Regarding the present disclosure, specific configuration examples of which have been shown in the above-mentioned embodiments, additional notes will be provided.

[0064] A power supply control device according to one aspect of the present disclosure is a device for controlling an input voltage (V IN ) to output voltage (V OUT The power supply control device (2) is configured to control the operation of a power supply device (1) that generates a temperature (TEMP), and includes a temperature determination circuit (22) configured to determine which of a plurality of temperature ranges (R[1] to R[m]) the temperature (TEMP) of the power supply control device belongs to, a measurement circuit (23) configured to measure, for each of the temperature ranges, the time during which the temperature of the power supply control device belongs to that temperature range, and a non-volatile memory (26) configured to store the measurement results by the measurement circuit (first configuration).

[0065] This makes it possible to accumulate data on the operating environment of the power supply control device, even if the supply of power supply voltage to the power supply control device is frequently interrupted, and also makes it possible to make judgments regarding the lifespan of the power supply control device.

[0066] In the power supply control device according to the first configuration, the non-volatile memory stores a cumulative drive time (t ACM [1] ACM [m]) for each temperature range, and ACM The temperature range (R[j]) may be configured (second configuration) to represent the accumulated value of the time during which the temperature of the power supply control device is within the temperature range (R[j]) during the operation time of the power supply control device.

[0067] The power supply control device according to the second configuration may further include a signal output control circuit (28) configured to be capable of outputting a specific signal (e.g., a life end signal) to an external device (5) of the power supply control device, and the signal output control circuit may be configured (third configuration) to determine whether to output the specific signal based on each accumulated drive time stored in the non-volatile memory.

[0068] In the power supply control device of the third configuration, the signal output control circuit may be configured to determine whether the power supply control device has reached the end of its life based on the accumulated driving time stored in the non-volatile memory, and to decide whether to output the specific signal based on the result of the determination (fourth configuration).

[0069] This makes it possible to inform an external device whether the power supply control device has reached the end of its life.

[0070] In the power supply control device according to the fourth configuration, the signal output control circuit performs weighted addition of a plurality of cumulative drive times for the plurality of temperature ranges to obtain a weighted sum (W SUM ) and judges whether the power supply control device has reached the end of its life based on a result of comparing the weighted sum with a predetermined threshold (fifth configuration).

[0071] This allows accurate estimation of whether the power supply control device has reached the end of its life.

[0072] In the power supply control device according to any one of the first to fifth configurations, a signal (S TEMP ), and a temperature abnormality detection circuit (24a) configured to detect a temperature abnormality of the power supply control device based on an output signal of the temperature sensor, and the temperature determination circuit may be configured to determine which of the plurality of temperature ranges the temperature of the power supply control device belongs to using the temperature sensor (sixth configuration).

[0073] This makes it possible to use a temperature sensor prepared for detecting temperature abnormalities to classify temperatures for storing information in a non-volatile memory.

[0074] The power supply control device according to any of the above first to fifth configurations may be configured (seventh configuration) to include an abnormality detection circuit (24) configured to detect a predetermined abnormality, and when the abnormality is detected by the abnormality detection circuit, information indicating that the abnormality has been detected is stored in the non-volatile memory.

[0075] This makes it easier to carry out post-mortem failure analysis, etc. (that is, information relating to the abnormality can be used to aid in failure analysis, etc.).

[0076] In the power supply control device according to any of the above first to seventh configurations, the power supply device may have a regulator (4) for multiple channels, generating the output voltage from the input voltage for each channel, and the power supply control device may be configured to control the operation of the regulator for each channel (eighth configuration). [Explanation of symbols]

[0077] 1 Power supply 2 Power supply control device 3 Disc lead parts group 4, 4[1]~4[n], 4[i A ], 4[i B ] Regulator 5 External device 10, 10[1]~10[n], 10[i A ], 10[i B ] Control Block 11, 12, 14 Transistors 13, 15 Control drive circuit L[i A ] Output coil C[i A ], C[i B ] Output Capacitor V IN , V IN [1]~V IN [n], V IN[i A ], V IN [i B ] Input voltage V OUT , V OUT [1]~V OUT [n], V OUT [i A ], V OUT [i B ] Output voltage OUT[i A ], OUT[i B ] Output node 21 Temperature Sensor 22 Temperature judgment circuit 23 Measurement circuit 24 Abnormality detection circuit 24a Abnormal temperature detection circuit 25 Memory Controller 26 Non-volatile memory 27 Volatile Memory 28 Signal output control circuit S TEMP temperature signal S CLS [j] Classification signal UP[j] Up count signal TEMP Target temperature T B [1]~T B [m-1] Boundary temperature R[1]~R[m] Temperature range t ACM [1] ACM [m] Cumulative drive time N ACM [1]~N ACM [m] Accumulative drive value

Claims

1. 1. A power supply control device configured to control an operation of a power supply device that generates an output voltage from an input voltage, a temperature determination circuit configured to determine to which of a plurality of temperature ranges the temperature of the power supply control device belongs; a measurement circuit configured to measure, for each of the temperature ranges, a time during which the temperature of the power supply control device falls within the temperature range; a non-volatile memory configured to store the measurement results by the measurement circuit. , power control device.

2. the non-volatile memory stores an accumulated driving time for each of the temperature ranges; The accumulated operating time for each temperature range indicates an accumulated value of the time during which the temperature of the power supply control device falls within the temperature range among the operating times of the power supply control device. The power supply control device according to claim 1 .

3. A signal output control circuit configured to be able to output a specific signal to an external device of the power supply control device, The signal output control circuit determines whether to output the specific signal based on each accumulated driving time stored in the nonvolatile memory. The power supply control device according to claim 2 .

4. The signal output control circuit judges whether the power supply control device has reached the end of its life based on the accumulated driving time stored in the nonvolatile memory, and determines whether to output the specific signal based on the result of the judgment. The power supply control device according to claim 3 .

5. The signal output control circuit derives a weighted sum by weighting and adding a plurality of cumulative drive times for the plurality of temperature ranges, and determines whether the power supply control device has reached the end of its life based on a result of comparing the weighted sum with a predetermined threshold value. The power supply control device according to claim 4 .

6. a temperature sensor configured to output a signal corresponding to a temperature of the power supply control device; a temperature abnormality detection circuit configured to detect a temperature abnormality of the power supply control device based on an output signal of the temperature sensor, The temperature determination circuit determines which of the plurality of temperature ranges the temperature of the power supply control device belongs to by using the temperature sensor.

6. A power supply control device according to claim 1.

7. An abnormality detection circuit configured to detect a predetermined abnormality, When the abnormality is detected by the abnormality detection circuit, information indicating that the abnormality has been detected is stored in the non-volatile memory.

6. A power supply control device according to claim 1.

8. the power supply device has a regulator for each channel, and generates the output voltage from the input voltage for each channel; The power supply control device controls the operation of the regulator for each of the channels.

6. A power supply control device according to claim 1.

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