Data processing device, program and data processing method
By treating groups of binary variables as equivalent spins and using holding circuits and coupling coefficients, the data processing device efficiently evaluates multiple-bit transitions, enhancing search efficiency and solution-solving performance in Ising machines.
Patent Information
- Application Number
- JP2023105888
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-28
- Publication Date
- 2025-01-17
AI Technical Summary
Conventional multi-bit transition processing in Ising machines is complicated and inefficient due to the complexity in calculating the change in the evaluation function and propagating data, making it difficult to escape local solutions and speed up the search process.
A data processing device and method that treats groups of binary variables as equivalent spins, using a holding circuit, local fields, and coupling coefficients to efficiently evaluate transitions by calculating and updating the value of these groups, allowing parallel trials similar to single-bit transitions.
This approach enables efficient evaluation of multiple-bit transitions, improving search efficiency and solution-solving performance by allowing parallel trials and flexible switching between single-bit and equivalent spin transition processing.
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Figure 2025005635000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a data processing device, a program, and a data processing method. [Background technology]
[0002] An Ising machine using an Ising-type evaluation function is a device that calculates large-scale discrete optimization problems that von Neumann-type computers are not good at. When using an Ising machine, a combinatorial optimization problem is converted into an Ising model that represents the behavior of the spin of a magnetic material. The Ising machine searches for a state of the Ising model where the value of the Ising-type evaluation function is minimized by a Markov chain Monte Carlo method such as simulated annealing or replica exchange (also called parallel tempering). Hereinafter, the Markov chain Monte Carlo method is abbreviated as the MCMC (Markov-Chain Monte Carlo) method. The state where the minimum value of the evaluation function is the minimum value is the optimal solution. The state of the Ising model can be expressed by a combination of the values of multiple binary variables. The value of each binary variable can be 0 or 1. For this reason, the binary variables may be expressed as bits.
[0003] The Ising-type evaluation function is defined, for example, by the following equation (1).
[0004]
number
[0005] The term on the right side is the sum of the values of the two binary variables (0 or 1) and the weights (also called coupling coefficients) for all combinations of all binary variables in the Ising model, without any omissions or duplications. x i is a binary variable with identification number i, x j is a binary variable with identification number j, and W ij is the coupling coefficient that represents the magnitude of interaction between the binary variables with identification numbers i and j. The two terms on the right side are the sum of the products of the bias coefficients for each identification number and the binary variables. iindicates the bias coefficient for identification number = i.
[0006] Also, x i The change in the value of the evaluation function due to the change in the value of i ) is expressed by the following equation (2).
[0007]
number
[0008] In formula (2), x i When changes from 1 to 0, Δx i is -1, and x i When changes from 0 to 1, Δx i is 1. Note that h i is called the local field, and ΔE i is a variable that specifies Δx i Depending on h i Multiplying by the sign (+1 or -1) is ΔE i It becomes.
[0009] An Ising machine, for example, ΔE i If x is smaller than the noise value obtained based on the random number and temperature parameter values, i The solution is searched for by repeating the process of updating the local field by inverting the value of the evaluation function. Note that by changing the sign of the evaluation function, it is possible to search for a state where the evaluation function value is maximized.
[0010] ΔE i Calculation of x i Processes such as determining whether to invert the value of can be performed multiple times in parallel, allowing parallel trials on multiple binary variables. Conventionally, there is a process (hereinafter referred to as single-bit transition process) in which the number of changes in the value of a binary variable (hereinafter also referred to as transition) allowed per trial in MCMC processing is set to 1. However, with single-bit transition process, if the solution gets stuck in a local solution, it becomes difficult to escape from the local solution, and the search speed may decrease.
[0011] Therefore, a process has been proposed in which, based on the calculation result of the amount of change in the value of the evaluation function when a multiple-bit transition occurs, whether or not the multiple-bit transition is possible is determined, and if the transition is permitted, the multiple-bit transition is caused (see, for example, Patent Documents 1-3). Hereinafter, such a process is referred to as multiple-bit transition processing. Multiple-bit transition processing can promote the escape of the solution from a local solution, thereby accelerating the search speed. [Prior art documents] [Patent documents]
[0012] [Patent Document 1] JP 2020-021209 A [Patent Document 2] JP 2020-064536 A [Patent Document 3] Patent Publication No. 2021-165965 Summary of the Invention [Problem to be solved by the invention]
[0013] In conventional multi-bit transition processing, the configuration for calculating the amount of change in the value of the evaluation function when a multi-bit transition occurs and the configuration for propagating the data are complex, making it difficult to efficiently evaluate multi-bit transitions through parallel trials.
[0014] In one aspect, the present invention aims to provide a data processing device, a program, and a data processing method capable of efficiently evaluating transitions of multiple bits. [Means for solving the problem]
[0015] In one embodiment, there is provided a data processing device having: a first holding circuit that holds a representative value, which is one of a plurality of sets of variables consisting of two or more binary variables having distinct or identical values included in an evaluation function of a combinatorial optimization problem; a first memory that stores a plurality of first coupling coefficients that represent the magnitude of interaction between the plurality of sets of variables; a second holding circuit that holds a first local field used to specify a first change amount in a value of the evaluation function accompanying a change in the representative value of each of the plurality of sets of variables; a change amount calculation circuit that calculates the first change amount for each of the plurality of sets of variables using the first local field; a selection circuit that accepts a change in the representative value of any of the plurality of sets of variables based on the first change amount calculated for each of the plurality of sets of variables; a first update circuit that updates the representative value of a first set of variables among the plurality of sets of variables, the change in the representative value being accepted; and a second update circuit that updates the first local field using a second coupling coefficient that is read out based on a first identification number of the first set of variables from among the plurality of first coupling coefficients stored in the first memory.
[0016] Also, in one embodiment, a program is provided. Also provided in one embodiment is a method for processing data. Effect of the Invention
[0017] In one aspect, the present invention allows for efficient evaluation of multi-bit transitions. [Brief description of the drawings]
[0018] [Figure 1] FIG. 13 is a diagram showing an example of equivalent spin. [Diagram 2] FIG. 13 is a diagram showing an example of a pair of binary variables selected as equivalent spins. [Diagram 3] FIG. 13 is a diagram showing an example of state transition when using equivalent spins of different values. [Figure 4] FIG. 13 is a diagram showing an example of state transition when equivalent spins of the same value are used. [Diagram 5]FIG. 13 is a diagram showing an example of a matrix representing items contributing to an inequality constraint and a generated neighbor list. [Figure 6] FIG. 13 shows an example of parallel trials using equivalent spins. [Figure 7] FIG. 1 illustrates an example of a data processing device according to a first embodiment; [Figure 8] FIG. 13 is a diagram illustrating an example of generation of an enable signal. [Figure 9] 10 is a flowchart illustrating an example of a process for generating an enable signal. [Figure 10] 4 is a timing chart showing an example of the overall operation of the data processing device according to the first embodiment; [Figure 11] 1 is a flowchart illustrating an example of an overall processing procedure of the data processing device according to the first embodiment. [Figure 12] 13 is a flowchart illustrating an example of a processing procedure for single bit transition processing. [Figure 13] 13 is a flowchart showing an example of a processing procedure for equivalent spin transition processing. [Figure 14] FIG. 1 illustrates an example of a data processing device according to a second embodiment. [Figure 15] FIG. 13 is a diagram illustrating coupling coefficients stored in an update coupling coefficient memory. [Figure 16] 13 is a timing chart showing an example of the overall operation of the data processing device according to the second embodiment. [Figure 17] 10 is a timing chart showing an example of processing timing of an update process. [Figure 18] 13 is a flowchart illustrating an example of an overall processing procedure of the data processing device according to the second embodiment. [Figure 19] 13 is a flowchart illustrating an example of a processing procedure for single-bit transition processing in the data processing device according to the second embodiment. [Figure 20] FIG. 13 illustrates an example of a data processing device according to a third embodiment. [Figure 21] 13 is a timing chart showing an example of the overall operation of the data processing device according to the third embodiment. [Figure 22]FIG. 1 illustrates an example of hardware of a computer that is an example of a data processing device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0019] Hereinafter, an embodiment of the invention will be described with reference to the drawings. The data processing device of each embodiment described below treats a set of variables consisting of two or more binary variables with distinct or equivalent values included in an evaluation function for a combinatorial optimization problem as a binary variable corresponding to one spin. For this reason, the above set of variables will be referred to as an equivalent spin below.
[0020] In the following, equivalent spins consisting of two or more binary variables with different values are sometimes called equivalent spins with different values, and equivalent spins consisting of two or more binary variables with the same value are sometimes called equivalent spins with the same value. By treating such a set of binary variables as equivalent spins, it becomes possible to perform parallel trials similar to single-bit transition processing, as explained below.
[0021] In the following description, the equivalent spin is described as being made up of two binary variables, but the equivalent spin may include three or more binary variables. FIG. 1 is a diagram showing an example of equivalent spins.
[0022] Figure 1 shows an equivalent spin consisting of two binary variables, i1 and i2. i In the following examples, the equivalent spin value is expressed as formula (3).
[0023]
number
[0024] In other words, the value of the equivalent spin is represented by one of the two binary variables contained in the equivalent spin. Therefore, the value of formula (3) can be said to be the representative value of a variable group consisting of two binary variables.
[0025] In the following, the variable that specifies the amount of change in the value of the evaluation function associated with the change in the value of the equivalent spin is called the equivalent local field. In the following example, the value of the equivalent local field of different values of equivalent spin is expressed by equation (4), and the value of the equivalent local field of the same value of equivalent spin is expressed by equation (5).
[0026]
number
[0027]
number
[0028] In equations (4) and (5), the variable with the identification number i1 attached to the hatched h is an equivalent local field that specifies the amount of change in the value of the evaluation function associated with a change in one of the two binary variables included in the equivalent spin. The variable with the identification number i2 attached to the hatched h is an equivalent local field that specifies the amount of change in the value of the evaluation function associated with a change in the other of the two binary variables included in the equivalent spin.
[0029] In the following, the coupling coefficient indicating the magnitude of interaction between multiple equivalent spins (hereinafter referred to as equivalent coupling coefficient) is expressed by equation (6).
[0030]
number
[0031] In formula (6), the coupling coefficient of W with the identification number i1j1 indicates the magnitude of interaction that the first binary variable included in the equivalent spin of identification number i has with the first binary variable included in the equivalent spin of identification number j. The coupling coefficient of W with the identification number i1j2 indicates the magnitude of interaction that the first binary variable included in the equivalent spin of identification number i has with the second binary variable included in the equivalent spin of identification number j. The coupling coefficient of W with the identification number i2j1 indicates the magnitude of interaction that the second binary variable included in the equivalent spin of identification number i has with the first binary variable included in the equivalent spin of identification number j. The coupling coefficient of W with the identification number i2j2 indicates the magnitude of interaction that the second binary variable included in the equivalent spin of identification number i has with the second binary variable included in the equivalent spin of identification number j.
[0032] In equations (4) and (5), the two equivalent local fields on the right-hand side can be expressed by the following equations (7) and (8), respectively.
[0033]
number
[0034]
number
[0035] In equations (7) and (8), D represents the set of identification numbers for all binary variables. The variable h with identification number i1 is a local field that specifies the amount of change in the value of the evaluation function associated with a change in the value of the binary variable with identification number i1. The variable h with identification number i2 is a local field that specifies the amount of change in the value of the evaluation function associated with a change in the value of the binary variable with identification number i2. The equivalent local field in equations (7) and (8) is the same as the local field when the coupling coefficient between the two binary variables included in the equivalent spin is set to 0.
[0036] The value of the equivalent local field of different or equal equivalent spins does not change regardless of how the values of the two binary variables included in the equivalent spins change, but changes when the value of the equivalent spin whose equivalent coupling coefficient with the equivalent spin is not 0 changes. The initial value of the equivalent local field of the equivalent spins is calculated using equations (7) and (8). The value of the equivalent local field of the equivalent spins when the value of the equivalent spin changes can be updated by difference calculation.
[0037] The change in the value of the equivalent spin of the different values can be expressed by the following formula (9).
[0038]
number
[0039] The change in the value of the evaluation function associated with a change in the value of the equivalent spin of the different values can be expressed by the following equation (10).
[0040]
number
[0041] As shown in equation (10), the change in the value of the evaluation function accompanying a change in the value of the equivalent spin can be calculated as the product of the equivalent local field of the equivalent spin and the change in the value of the equivalent spin. With the change of the equivalent spin of the different values, the equivalent local field can be updated according to the following equation (11).
[0042]
number
[0043] The change in the value of the equivalent spin can be expressed by the following equation (12).
[0044]
number
[0045] The change in the value of the evaluation function associated with a change in the value of the equivalent spin can be expressed by the following equation (13).
[0046]
number
[0047] As shown in equation (13), the change in the value of the evaluation function accompanying a change in the value of the equivalent spin can be calculated as the product of the equivalent local field of the equivalent spin and the change in the value of the equivalent spin. As the value of the equivalent spin changes, the equivalent local field can be updated according to the following equation (14).
[0048]
number
[0049] FIG. 2 is a diagram showing an example of a pair of binary variables selected as equivalent spins. Fig. 2(A) shows a first selection example of equivalent spins, and Fig. 2(B) shows a second selection example of equivalent spins. In the first selection example, equivalent spin 1 consisting of x1 and x2, equivalent spin 2 consisting of x1 and x6, equivalent spin 3 consisting of x4 and x5, and equivalent spin 4 consisting of x6 and x7 are obtained. In the second selection example, equivalent spin 5 consisting of x2 and x3, equivalent spin 6 consisting of x3 and x4, equivalent spin 7 consisting of x5 and x9, and equivalent spin 8 consisting of x7 and x8 are obtained.
[0050] In the data processing device of each embodiment shown below, some of all binary variables are selected as equivalent spins as shown in Fig. 2. The data processing device may change the binary variables selected as equivalent spins during the solution search, as in the first selection example to the second selection example. All binary variables may be selected to belong to any of the equivalent spins.
[0051] Whether to use equivalent spins of different values or equivalent spins of the same value is determined in consideration of, for example, the following points. Fig. 3 is a diagram showing an example of state transition when using equivalent spins with different values. The vertical axis represents the value of the evaluation function, and the horizontal axis represents the state of the equivalent spin. In this example, the state of the equivalent spin that results in a smaller value of the evaluation function is searched for as a solution.
[0052] In combinatorial optimization problems with inequality constraints, such as the knapsack problem, it is effective to treat a set of binary variables linked by inequality constraints as equivalent spins. The knapsack problem is a problem of finding the arrangement of items that maximizes total profit when multiple items with given values and weights (or capacity) are placed into a knapsack with a weight (or capacity) limit.
[0053] For example, as a pair of binary variables representing whether two items of similar weight have been placed in a knapsack, two binary variables represented by identification numbers i1 and i2 can be used as shown in Figure 3. In the following explanation, when the value of the binary variable is 1, it represents that the items have been selected and placed in the knapsack, and when the value of the binary variable is 0, it represents that the items have not been selected and placed in the knapsack.
[0054] In the example of Figure 3, when the above two binary variables transition from a state in which the values are 1 and 0 to a state in which the values of both binary variables are 1, the value of the evaluation function increases. This state transition may be a state transition in which both items are put into the knapsack, causing the weight limit to no longer be satisfied and resulting in a violation of the inequality constraint.
[0055] In such a case, it is preferable to set the two binary variables in Fig. 3 as equivalent spins with different values. When the values of the equivalent spins with different values are inverted, the values of the two binary variables change to (1,0) or (0,1), and the state transition that increases the value of the evaluation function as described above can be avoided.
[0056] 4 is a diagram showing an example of state transition when using equivalent spins of the same value, where the vertical axis represents the value of the evaluation function and the horizontal axis represents the state of the equivalent spin. Depending on the method of formulating the evaluation function, such as how to determine the sign of the coefficient of the constraint term of the inequality constraint included in the evaluation function, it may be preferable to adopt an equivalent spin of the same value even in combinatorial optimization problems that have inequality constraints.
[0057] As shown in Figure 4, when two binary variables transition from a state in which both have a value of 1 to a state in which one of the two binary variables has a value of 1 and the other has a value of 0, the value of the evaluation function in the example of Figure 4 increases. In such a case, it is preferable to set the two binary variables in Fig. 4 to have the same equivalent spin. When the value of the same equivalent spin is inverted, the values of the two binary variables change to (1,1) or (0,0), which avoids the state transition that increases the value of the evaluation function as described above.
[0058] When there are multiple inequality constraints, a set of binary variables having many inequality constraints that contribute in common may be preferentially set as an equivalent pair. As an example of a method for generating a neighborhood list representing state variables having many inequality constraints that contribute in common, there is a method described in the following document.
[0059] (Reference) S. Umetani, "Exploiting variable associations to configure efficient local search algorithms in large-scale binary integer programs," European Journal of Operational Research 263 (2017) 72-81 FIG. 5 is a diagram showing an example of a matrix representing items contributing to an inequality constraint and a generated neighbor list.
[0060] In Figure 5, an example is shown in which there are 10 items and 6 inequality constraints. In Figure 5, the matrix on the left indicates whether each of the 10 items contributes to each of the 6 inequality constraints. ijThe value of is 1 if the jth item contributes to the ith inequality constraint, and 0 if it does not. In the example in Figure 5, the 1st item contributes to the 2nd, 3rd, and 5th inequality constraints.
[0061] The number of inequality constraints that contribute in common with the first item is two for the second, seventh, eighth, and tenth items, and one for the third through sixth items. In this case, the binary variables corresponding to the 2nd, 7th, 8th, and 10th items are defined in the neighborhood list as neighboring binary variables for the binary variable corresponding to the 1st item. Note that in the example of Figure 5, the binary variables corresponding to the 1st to 10th items are denoted as x1 to x10.
[0062] By converting a combinatorial optimization problem into an Ising model using the above-mentioned equivalent spins, multiple bit transitions can be performed in parallel trials similar to single bit transition processing. Note that the problem converted into the Ising model is almost the same as a problem called QUBO (Quadratic Unconstrained Binary Optimization) and can be converted into either, so in the following explanation, no distinction will be made between the two.
[0063] 6 is a diagram showing an example of parallel trials using equivalent spins. In FIG. 6, an example of parallel trials using M equivalent spins is shown. The parallel trials are performed using, for example, the storage circuits 10a1, 10a2, . . . , 10aM, the change amount calculation circuits 10b1, 10b2, .
[0064] Each of the storage circuits 10a1 to 10aM stores an equivalent coupling coefficient between one of the M equivalent spins and the other equivalent spins. For example, the storage circuit 10a1 stores an equivalent coupling coefficient between an equivalent spin consisting of two binary variables represented by the identification numbers 11 and 12 and the other equivalent spins. The equivalent coupling coefficient does not depend on the state, so it can be calculated in advance.
[0065] Each of the change amount calculation circuits 10b1 to 10bM calculates the change amount of the evaluation function value accompanying the change in each value of the M equivalent spins. The change amount is calculated by calculating the product of the equivalent local field and the change amount of the equivalent spin value, as shown in formula (10) or formula (13). When equivalent spins of different values are used, the equivalent local field expressed by formula (4) is used. When equivalent spins of the same value are used, the equivalent local field expressed by formula (5) is used.
[0066] The selection circuit 10c selects one of the M equivalent spins based on the M amount of change, and outputs an identification number j of the selected equivalent spin. j is used to read out the equivalent coupling coefficient from the storage circuits 10a1 to 10aM when updating the equivalent local field in accordance with the change in the value of the selected equivalent spin.
[0067] When the value of the equivalent spin of identification number j changes, the equivalent local field is updated according to the following equation (15).
[0068]
number
[0069] In the formula (15), when different-value equivalent spins are used, the equivalent coupling coefficient is expressed by the above formula (6). When an equivalent spin consisting of two binary variables with the same value is used, the equivalent coupling coefficient is expressed by the following formula (16).
[0070]
number
[0071] Even if different-value equivalent spins and the same-value equivalent spins are mixed, the processing contents of the parallel trials are the same as those described above, except that the initial values of the equivalent local fields and the equivalent coupling coefficients are different. The initial value of the equivalent local field of the different-value equivalent spin is expressed by the following equation (17).
[0072]
number
[0073] The initial value of the equivalent local field of the equivalent spin is expressed by the following equation (18).
[0074]
number
[0075] The equivalent coupling coefficient between an equivalent spin of different value and an equivalent spin of the same value is expressed by the following equations (19) and (20).
[0076]
number
[0077]
number
[0078] Equation (19) represents the equivalent coupling coefficient when j is the identification number of equivalent spins of different values. Equation (20) represents the equivalent coupling coefficient when j is the identification number of equivalent spins of the same value.
[0079] When i is an identification number of equivalent spins with different values, the upper sign is used among signs with - on the top and + on the bottom. When i is an identification number of equivalent spins with the same value, the lower sign is used among signs with - on the top and + on the bottom.
[0080] Next, a data processing device according to a first embodiment will be described. (First embodiment) The data processing device of the first embodiment includes a function for performing single bit transition processing and a function for performing transition processing using equivalent spins as described above (hereinafter referred to as equivalent spin transition processing), as shown below. Both functions are switchable.
[0081] FIG. 7 illustrates an example of the data processing device according to the first embodiment. The data processing device 20 has an equivalent spin transition circuit section 20a that performs equivalent spin transition processing, and a single bit transition circuit section 20b that performs single bit transition processing.
[0082] The equivalent spin transition circuit unit 20a has an equivalent coupling coefficient memory 21, an equivalent spin update circuit 22, an equivalent spin holding circuit 23, an equivalent local field update circuit 24, an equivalent local field holding circuit 25, a ΔE calculation circuit 26, and a ΔE holding circuit 27. Furthermore, the equivalent spin transition circuit unit 20a has an enable processing circuit 28 and a transition equivalent spin selection circuit 29.
[0083] The single-bit transition circuit section 20b has a coupling coefficient memory 30, a binary variable updating circuit 31, a binary variable holding circuit 32, a local field updating circuit 33, a local field holding circuit 34, a ΔE calculation circuit 35, a ΔE holding circuit 36, and a transition binary variable selection circuit 37.
[0084] Furthermore, the data processing device 20 includes an equivalent spin decoder circuit 38, a selection circuit 39, an equivalent spin enable determination circuit 40, and an initial equivalent local field calculation circuit 41. These are used to achieve consistency between the single bit transition process and the equivalent spin transition process.
[0085] The data processing device 20 also includes a ΔE selection circuit 42, an E update and hold circuit 43, a comparison circuit 44, a minimum value update and hold circuit 45, and a control circuit 46. Each element will be explained below.
[0086] The equivalent coupling coefficient memory 21 stores M×M equivalent coupling coefficients that represent the magnitude of interaction between each of a plurality of (hereinafter, M) equivalent spins. The equivalent coupling coefficients are expressed by the above-mentioned formula (6), formula (16), formula (19), or formula (20). The equivalent coupling coefficient memory 21 corresponds to the storage circuits 10a1 to 10aM in FIG. 6. The equivalent coupling coefficient memory 21 can be realized by, for example, a dynamic random access memory (DRAM), a static random access memory (SRAM), or a volatile storage device that is an electronic circuit such as a register. The equivalent coupling coefficient memory 21 may be a non-volatile storage device that is an electronic circuit such as a flash memory, or a storage device such as a hard disk drive (HDD). A storage device to be applied as the equivalent coupling coefficient memory 21 can be appropriately selected from the above storage devices according to the number of equivalent spins (=M) and the number of bits of the equivalent coupling coefficient.
[0087] The equivalent spin update circuit 22 updates the value of an equivalent spin that has accepted a change in value (a representative value that is one of two or more binary variables that constitute an equivalent spin) among the M equivalent spins. The equivalent spin update circuit 22 updates the value of an equivalent spin that is designated by an identification number output by the transition equivalent spin selection circuit 29 among the M equivalent spin values held in the equivalent spin holding circuit 23 by inverting (flipping) the value from 1 to 0 or from 0 to 1.
[0088] The equivalent spin holding circuit 23 has a holding circuit such as a register and holds the values of M equivalent spins. The equivalent spin holding circuit 23 also outputs the amount of change in the value of the equivalent spin used to update the equivalent local field and calculate the amount of change in the evaluation function.
[0089] The equivalent local field update circuit 24 updates the equivalent local field held in the equivalent local field holding circuit 25 using the equivalent coupling coefficients read from the equivalent coupling coefficient memory 21 based on the identification number output by the transition equivalent spin selection circuit 29. In order to update the equivalent local field according to the above-mentioned equation (15), the equivalent local field update circuit 24 can be implemented using, for example, a multiplier and an adder.
[0090] The equivalent local field holding circuit 25 has a holding circuit such as a register, and holds M equivalent local fields. The equivalent local fields of equivalent spins of different values are expressed by the above-mentioned formula (4), and the equivalent local fields of equivalent spins of the same value are expressed by the above-mentioned formula (5).
[0091] The ΔE calculation circuit 26 calculates the amount of change in the value of the evaluation function for each of the M equivalent spins, using the equivalent local field stored in the equivalent local field storage circuit 25. The ΔE calculation circuit 26 corresponds to the change amount calculation circuits 10b1 to 10bM in Fig. 6. In order to calculate the amount of change according to the above-mentioned equation (13), the ΔE calculation circuit 26 can be implemented, for example, using a multiplier.
[0092] The ΔE holding circuit 27 has a holding circuit such as a register, and holds the amount of change in the value of the evaluation function calculated for each of the M equivalent spins. The enable processing circuit 28 disables the processing of the transition equivalent spin selection circuit 29, which will be described next, for equivalent spins whose values are not permitted to change, based on an enable signal, which will be described later.
[0093] The transition equivalent spin selection circuit 29 accepts a change in the value of any of the M equivalent spins based on the amount of change in the value of the evaluation function calculated for each of the M equivalent spins (excluding those that are disabled). The transition equivalent spin selection circuit 29 determines the equivalent spin that will accept a change in value according to the MCMC method. The transition equivalent spin selection circuit 29 also outputs the identification number of the determined equivalent spin and the amount of change in the value of the evaluation function that accompanies the change in the value of the equivalent spin.
[0094] For example, if the greater of the amount of change in the value of the evaluation function accompanying a change in the value of a certain equivalent spin and 0 is smaller than a threshold value obtained based on a random number and the value of the temperature parameter, the transition equivalent spin selection circuit 29 allows the change in the value of the equivalent spin. For example, -log(rand)×T is used as the threshold value, where rand is a uniform random number ranging from 0 to 1, and T is the value of the temperature parameter. When changes in the values of multiple equivalent spins are allowed, the transition equivalent spin selection circuit 29 may select one equivalent spin randomly or according to a predetermined rule, and output its identification number.
[0095] The transition equivalent spin selection circuit 29 may select one equivalent spin that allows a change in value based on M amounts of change in the evaluation function value and a threshold value. Such a selection method is sometimes called rejection-free. In this method, for example, the transition equivalent spin selection circuit 29 calculates M max function values that output 0 and the larger value of the amounts of change for each of the M amounts of change. The transition equivalent spin selection circuit 29 applies Tlog(-log(rand i )) where rand i is a uniform random number ranging from 0 to 1 generated for each equivalent spin. Then, the transition equivalent spin selection circuit 29 outputs the identification number of the equivalent spin that brings about the smallest addition result when the value changes, among the M equivalent spins.
[0096] The coupling coefficient memory 30 stores N×N coupling coefficients that represent the magnitude of interaction between each of a plurality of (hereinafter referred to as N) binary variables included in the evaluation function. The coupling coefficient memory 30 can be realized by, for example, a volatile storage device that is an electronic circuit such as a DRAM, an SRAM, or a register. The coupling coefficient memory 30 may also be a non-volatile storage device that is an electronic circuit such as a flash memory, or a storage device such as an HDD.
[0097] The binary variable update circuit 31 updates the value of a binary variable whose change has been accepted. The binary variable update circuit 31 updates the value of the binary variable designated by the identification number output by the transition binary variable selection circuit 37, among the values of the N binary variables held in the binary variable holding circuit 32, by flipping the value of the binary variable.
[0098] The binary variable holding circuit 32 has a holding circuit such as a register, and holds the values of N binary variables. The binary variable holding circuit 32 also outputs the amount of change in the binary variables used to update the local field and calculate the amount of change in the evaluation function.
[0099] The local field update circuit 33 updates the local field using one of the coupling coefficients read from the coupling coefficient memory 30 based on the identification number output by the transition binary variable selection circuit 37. The local field is updated according to the change in the value of the binary variable with the identification number j by the following equation (2): i To, W ij Δx j To perform such an update, the local field update circuit 33 can be implemented, for example, using multipliers and adders.
[0100] The local field holding circuit 34 has a holding circuit such as a register, and holds N local fields. The ΔE calculation circuit 35 calculates the amount of change in the value of the evaluation function for each of the N binary variables using the local fields stored in the local field storage circuit 34. In order to calculate the amount of change according to the above-mentioned equation (2), the ΔE calculation circuit 35 can be implemented using, for example, a multiplier.
[0101] The ΔE holding circuit 36 has a holding circuit such as a register, and holds the amount of change in the value of the evaluation function calculated for each of the N binary variables. The transition binary variable selection circuit 37 accepts a change in the value of any of the N binary variables based on the amount of change in the value of the evaluation function calculated for each of the N binary variables. The transition binary variable selection circuit 37 determines the binary variable whose value it will accept according to the MCMC method. The transition binary variable selection circuit 37 also outputs the identification number of the determined binary variable and the amount of change in the value of the evaluation function associated with the change in the value of the binary variable.
[0102] For example, if the greater of the amount of change in the value of the evaluation function accompanying a change in the value of a binary variable and 0 is smaller than a threshold value obtained based on a random number and a temperature parameter, the transition binary variable selection circuit 37 allows the change in the value of the binary variable. If changes in the values of multiple binary variables are allowed, the transition binary variable selection circuit 37 may select one binary variable randomly or according to a predetermined rule and output its identification number. The transition binary variable selection circuit 37 may also be a circuit that determines the binary variables whose value changes are accepted by using the above-mentioned rejection-free technique.
[0103] The equivalent spin decoder circuit 38 generates and outputs the identification numbers of two binary variables included in the equivalent spin of the identification number based on the identification number output by the transition equivalent spin selection circuit 29. The equivalent spin decoder circuit 38 can be implemented using, for example, a holding circuit or memory that holds information indicating the correspondence between the identification numbers of the equivalent spins and the identification numbers of the binary variables.
[0104] When a single-bit transition process is being performed, the selection circuit 39 selects and outputs the identification number of the binary variable output by the transition binary variable selection circuit 37. When a transition process using an equivalent spin is being performed, the selection circuit 39 selects and outputs the identification numbers of the two binary variables output by the equivalent spin decoder circuit 38. The selection circuit 39 performs the above selection under the control of the control circuit 46, for example.
[0105] The equivalent spin enable determination circuit 40 generates an enable signal indicating whether or not to permit a change in the value of each equivalent spin, based on the identification number of the binary variable output by the transition binary variable selection circuit 37 or the equivalent spin decoder circuit 38. An example of the generation process of the enable signal will be described later (see FIG. 8 and FIG. 9).
[0106] When switching from single-bit transition processing to equivalent spin transition processing, the initial equivalent local field calculation circuit 41 calculates an initial value of the equivalent local field expressed by, for example, equation (17) or equation (18) using the values of the binary variables, the coupling coefficients, and the local field. The initial equivalent local field calculation circuit 41 can be implemented by using, for example, an adder and a multiplier.
[0107] When a single-bit transition process is being performed, the ΔE selection circuit 42 selects and outputs the amount of change in the value of the evaluation function output by the transition binary variable selection circuit 37. When a transition process using an equivalent spin is being performed, the ΔE selection circuit 42 selects and outputs the amount of change in the value of the evaluation function output by the transition equivalent spin selection circuit 29. The ΔE selection circuit 42 performs the above selection under the control of the control circuit 46, for example.
[0108] The E update and hold circuit 43 has a hold circuit such as a register and holds the value of the evaluation function. The E update and hold circuit 43 acquires the amount of change selected by the ΔE selection circuit 42, updates the value of the evaluation function with the amount of change, and outputs it.
[0109] The comparison circuit 44 compares the value of the evaluation function held in the E update holding circuit 43 with the minimum value of the evaluation function held in the minimum value update holding circuit 45 . Minimum value update and hold circuit 45 has a hold circuit such as a register, and holds the minimum value of the evaluation function obtained so far. When comparison circuit 44 outputs a comparison result indicating that the value of the evaluation function held in E update and hold circuit 43 is smaller than the minimum value obtained so far, minimum value update and hold circuit 45 updates the minimum value with the value of the evaluation function. Minimum value update and hold circuit 45 also holds the values of the N binary variables when the minimum value was obtained. Then, for example, the values of the N binary variables held when a predetermined termination condition is satisfied are output as a solution to the combinatorial optimization problem.
[0110] The control circuit 46 controls each part of the data processing device 20. The control circuit 46 controls switching between single bit transition processing and equivalent spin transition processing. For example, in the single bit transition processing, if a change in the value of a binary variable is not accepted for a predetermined period of time, the control circuit 46 switches to the equivalent spin transition processing because there is a possibility that the solution is stuck in a local solution.
[0111] The control circuit 46 may acquire evaluation function information input from the outside and store N×N coupling coefficients included in the evaluation function information in the coupling coefficient memory 30. The control circuit 46 may also calculate equivalent coupling coefficients expressed by the above-mentioned formula (6), formula (16), formula (19) or formula (20) based on the N×N coupling coefficients and store the equivalent coupling coefficients in the equivalent coupling coefficient memory 21. The control circuit 46 may also determine initial values of N binary variables and store them in the binary variable holding circuit 32. The control circuit 46 may also generate M equivalent spins, determine their initial values, and store the determined initial values in the equivalent spin holding circuit 23.
[0112] The control circuit 46 may also generate thresholds that the transition equivalent spin selection circuit 29 and the transition binary variable selection circuit 37 use to determine the equivalent spins or binary variables that will accept a change in value.
[0113] Each circuit of the data processing device 20 described above can be realized by an electronic circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array).
[0114] (Example of generating an enable signal) Next, an example of the process of generating an enable signal will be described. FIG. 8 is a diagram illustrating an example of generation of an enable signal.
[0115] The equivalent spin enable determination circuit 40 generates an enable signal for each equivalent spin, as shown in Fig. 8. In Fig. 8, a first binary variable and a second binary variable included in the equivalent spin are shown. In addition, the type of the equivalent spin (indicating whether it is an equivalent spin of different value or an equivalent spin of the same value) is shown.
[0116] Enable signal for different equivalent spins (En i ) is obtained by the exclusive OR of the values of the binary variables with identification numbers i1 and i2. The enable signal (En i ) is obtained by NORing the values of the binary variables with subscripted identifiers i1 and i2.
[0117] The equivalent spin enable determination circuit 40 holds information on the enable signals in a memory (not shown), for example, as table data as shown in FIG. If the identification number of the binary variable output by the transition binary variable selection circuit 37 is an identification number indicating a binary variable included in the equivalent spin, the equivalent spin enable determination circuit 40 inverts the value of the enable signal of that equivalent spin.
[0118] The equivalent spin enable determination circuit 40 performs inversion processing of the value of the enable signal of the equivalent spin according to the identification numbers of the two binary variables output by the equivalent spin decoder circuit 38. This inversion processing is performed, for example, as follows.
[0119] Suppose there are equivalent spin Y0 of the same value consisting of binary variables X0 and X1, equivalent spin Y1 of different value consisting of binary variables X0 and X1, equivalent spin Y2 of different value consisting of binary variables x1 and x2, and equivalent spin Y3 of different value consisting of binary variables X2 and X3. Also, assume that the enable signals of Y0 to Y3 are En0 to En3. If we consider (X0, X1, X2, X3) = (0, 1, 1, 1) as the initial values, the initial values of the enable signals of each equivalent spin are (En0, En1, En2, En3) = (0, 1, 0, 0).
[0120] When the value of Y1 changes, the state of the binary variables transitions to (X0, X1, X2, X3)=(1, 0, 1, 1). At this time, the equivalent spin enable determination circuit 40 sets the enable signal to (En0, En1, En2, En3)=(0, 1, 1, 0).
[0121] In the inversion process of the value of the enable signal of an equivalent spin, if one of two binary variables included in a certain equivalent spin is included in another equivalent spin, the value of the enable signal of the other equivalent spin is inverted. In the above example, the value of the enable signal (En2) of Y2, which includes one (X1) of X0 and X1 included in Y1, is inverted.
[0122] Furthermore, in the process of inverting the value of the enable signal for equivalent spins, if the value of one of two equivalent spins that contain the same two binary variables but only differ in the type of equivalent spin is inverted, the value of the enable signal is not inverted. In the above example, Y0 and Y1 both contain X0 and X1 but only differ in type. The values of the enable signals (En0, En1) of both equivalent spins remain 0 and 1 and are not inverted. Furthermore, the value of the enable signal for an equivalent spin that does not contain either of the two binary variables contained in an equivalent spin whose value is allowed to change (En3 for Y3 in the above example) is also not inverted.
[0123] By the above-described process for generating an enable signal, an appropriate enable signal is obtained. FIG. 9 is a flowchart illustrating an example of the flow of a process for generating an enable signal. The processes of steps S10 to S14 are performed in the initialization process of the data processing device 20.
[0124] Step S10: Loop processing regarding M equivalent spins starts. The loop processing is performed while i = 1 and i < M + 1 are satisfied. Step S11: The type of the equivalent spin with identification number i is determined. For example, the control circuit 46 determines whether the equivalent spin with identification number i is an equivalent spin with different values or an equivalent spin with the same value based on the information of each pre-generated equivalent spin and its type.
[0125] Step S12: When it is determined that the equivalent spin is an equivalent spin with different values, the initial value of En i is obtained by the exclusive OR of the values of the two binary variables with identification numbers i1 and i2 included in the equivalent spin with identification number i.
[0126] Step S13: When it is determined that the equivalent spin is an equivalent spin with the same value, the initial value of En i is obtained by the exclusive NOR of the values of the binary variables with identification numbers i1 and i2. The processes of steps S12 and S13 are performed, for example, by the control circuit 46 performing a logical operation of exclusive OR or exclusive NOR on the initial values of the two binary variables with identification numbers i1 and i2. The obtained initial value of En i is stored, for example, as table data as shown in FIG. 8 in a memory (not shown) of the equivalent spin enable determination circuit 40.
[0127] Step S14: After the processes of steps S12 and S13, when i < M, i is incremented by 1, and the process from step S11 is repeated. The processes of steps S15 to S25 are performed during the search for a solution by the data processing device 20.
[0128] Step S15: The equivalent spin enable determination circuit 40 determines whether the value of the binary variable flips based on the output of the transition binary variable selection circuit 37. For example, when the transition binary variable selection circuit 37 outputs the identification number of the binary variable that allows a change in value, the equivalent spin enable determination circuit 40 determines that the value of the binary variable flips. If the equivalent spin enable determination circuit 40 determines that the value of the binary variable flips, it performs the process of step S16. If it determines that the value of the binary variable does not flip, it performs the process of step S20.
[0129] Step S16: Loop processing regarding M equivalent spins starts. The loop processing is performed while i satisfies 1 ≤ i < M + 1, starting from i = 1. Step S17: The equivalent spin enable determination circuit 40 determines whether the binary variable to flip is included in any of the M equivalent spins. For example, the equivalent spin enable determination circuit 40 can perform the above determination based on the identification number of the binary variable output by the transition binary variable selection circuit 37 and the table data as shown in FIG. 8. If the equivalent spin enable determination circuit 40 determines that the binary variable to flip is included in any of the M equivalent spins, it performs the process of step S18. If it determines that the binary variable to flip is not included in any of the M equivalent spins, it performs the process of step S19.
[0130] Step S18: The equivalent spin enable determination circuit 40 inverts the value of En i Step S19: After the process of step S17 or step S18, if i < M, i is incremented by 1, and the process from step S17 is repeated.
[0131] Step S20: The equivalent spin enable determination circuit 40 determines whether the value of the equivalent spin flips based on the output of the equivalent spin decoder circuit 38. For example, when the equivalent spin decoder circuit 38 outputs the identification numbers of two binary variables included in the equivalent spin that allows a change in value, the equivalent spin enable determination circuit 40 determines that the value of the equivalent spin flips. When the equivalent spin enable determination circuit 40 determines that the value of the equivalent spin flips, it performs the process of step S21. When it determines that the value of the equivalent spin does not flip, it performs the process of step S25.
[0132] Step S21: Loop processing regarding M equivalent spins starts. The loop processing is performed while i satisfies i = 1 to i < M + 1. Step S22: The equivalent spin enable determination circuit 40 determines whether one of the two binary variables included in the equivalent spin to flip is included in another equivalent spin. For example, the equivalent spin enable determination circuit 40 can perform the above determination based on the identification numbers of the two binary variables output by the equivalent spin decoder circuit 38 and the table data as shown in FIG. 8. When the equivalent spin enable determination circuit 40 determines that one of the two binary variables included in the equivalent spin to flip is included in another equivalent spin, it performs the process of step S23. When the equivalent spin enable determination circuit 40 determines that one of the two binary variables included in the equivalent spin to flip is not included in another equivalent spin, it performs the process of step S24.
[0133] Step S23: The equivalent spin enable determination circuit 40 inverts the value of En i of. Step S24: After the process of step S22 or step S23, when i < M, i is incremented by 1, and the process from step S22 is repeated.
[0134] Step S25: The control circuit 46 judges whether or not a predetermined end condition of the process of searching for a solution is satisfied. If it is judged that the predetermined end condition is satisfied, the process of searching for a solution is terminated. If it is judged that the predetermined end condition is not satisfied, the process from step S15 is repeated.
[0135] It should be noted that the processing order shown in FIG. 9 is merely an example, and the processing order may be changed as appropriate. (Example of Overall Operation of Data Processing Device 20) FIG. 10 is a timing chart illustrating an example of the overall operation of the data processing device according to the first embodiment.
[0136] FIG. 10 shows an example in which single bit transition processing or equivalent spin transition processing is performed using up to eight replicas. The single bit transition processing is repeated T times per unit processing, and the equivalent spin transition processing is repeated Tp times per unit processing. Each of the eight replicas is an Ising model represented by the same evaluation function. The same equivalent spin is used for the eight replicas. Processing for each replica can be performed by pipeline processing in a data processing device 20 as shown in FIG. 7.
[0137] Between timings t1 and t2, single bit transition processing is performed. When T single bit transition processing operations are completed (timing t2), initialization processing of the local field and equivalent local field is performed between timings t2 and t3. During the initialization processing of the local field and equivalent local field, the repetition of the single bit transition processing and equivalent spin transition processing is stopped.
[0138] When the initialization process of the local field and the equivalent local field is completed (timing t3), the equivalent spin transition process is performed for the replicas with replica numbers 2 and 5 in the example of Fig. 10 (timings t3 to t4). On the other hand, for the replicas with replica numbers 0, 1, 3, 4, 6, and 7 for which the equivalent spin transition process has not been performed, single-bit transition process is performed in parallel with the equivalent spin transition process for the replicas with replica numbers 2 and 5.
[0139] Suppose that the value of the equivalent spin of the replica with replica number=2 or replica number=5 is allowed to change in the equivalent spin transition process. At this time, the values of the two binary variables included in the equivalent spin of the replica with replica number=2 or replica number=5, which are held in the binary variable holding circuit 32, are also updated. In addition, the N local fields of the replica with replica number=2 or replica number=5, which are held in the local field holding circuit 34, are also updated twice corresponding to the update of the values of the two binary variables. The above update process of the replica with replica number=2 or replica number=5 is performed during one iteration of the single bit transition process.
[0140] The equivalent spin transition process is repeated Tp times (timing t4), and when the reflection of the changes in the equivalent spin values of replicas with replica numbers = 2 and 5 on the single-bit transition process side is completed (timing t5), the initialization process of the local field and equivalent local field is performed again.
[0141] When the initialization process of the local field and the equivalent local field is completed (timing t6), in the example of Figure 10, equivalent spin transition processes are performed for replicas with replica numbers = 0, 3, and 7, and single-bit transition processes are performed for replicas with replica numbers = 1, 2, 4, 5, and 6.
[0142] FIG. 11 is a flowchart illustrating an example of an overall processing procedure of the data processing device according to the first embodiment. Step S30: First, an initialization process is performed under the control of the control circuit 46. In the initialization process, the initial values of N binary variables are generated, and the initial values of the evaluation function and the initial values of the local field are calculated.
[0143] Step S31: The control circuit 46 generates M equivalent spins. For example, as described with reference to Fig. 3, when searching for a solution to the knapsack problem, the control circuit 46 may treat two binary variables corresponding to two items with similar weights as one equivalent spin. Also, as described with reference to Fig. 5, the control circuit 46 may preferentially treat a group of binary variables having many inequality constraints that contribute in common as an equivalent pair.
[0144] Furthermore, in the process of step S31, the control circuit 46 calculates the equivalent coupling coefficient and the initial value of the enable signal shown in FIG. Step S32: The control circuit 46 performs data and operation setting. For example, in the process of step S32, the control circuit 46 sets the initial values of N binary variables in the binary variable holding circuit 32, sets the initial values of N local fields in the local field holding circuit 34, and sets the initial values of the evaluation function in the E update holding circuit 43 and the minimum value update holding circuit 45. The control circuit 46 also sets the initial values of M equivalent spins in the equivalent spin holding circuit 23, and stores M×M equivalent coupling coefficients in the equivalent coupling coefficient memory 21. Furthermore, the control circuit 46 sets table data related to enable signals as shown in FIG. 8 in the equivalent spin enable determination circuit 40.
[0145] Furthermore, the control circuit 46 sets operation conditions such as the end condition of the solution search as the operation settings. When the simulated annealing method is used as the MCMC method, the control circuit 46 sets, for example, the start value and end value of the temperature parameter, the value by which the temperature parameter is multiplied for each predetermined temperature change period, etc. When the replica exchange method is used as the MCMC method, the control circuit 46 sets, for example, the value of the temperature parameter for each replica, the replica exchange period, etc.
[0146] Step S33: Single bit transition processing is performed under the control of the control circuit 46. An example of the procedure of the single bit transition processing will be described later (see FIG. 12). Step S34: The control circuit 46 judges whether or not to end the single bit transition process. For example, the control circuit 46 judges to end the single bit transition process when a predetermined number of repetitions of the single bit transition process are completed. If it is judged to end the single bit transition process, the process of step S35 is performed, and if it is judged not to end the single bit transition process, the process of step S33 is repeated.
[0147] Step S35: The control circuit 46 judges whether or not to execute the equivalent spin transition process. For example, in the single-bit transition process, if a change in the value of the binary variable is not accepted for a predetermined period, the control circuit 46 judges to execute the equivalent spin transition process since there is a possibility that the solution is stuck in a local solution. If it is judged to execute the equivalent spin transition process, the process of step S36 is performed, and if it is judged not to execute the equivalent spin transition process, the process of step S40 is performed.
[0148] Step S36: The control circuit 46 performs a matching process for matching the values of the M equivalent spins held in the equivalent spin holding circuit 23 with the values of the N binary variables held in the binary variable holding circuit 32.
[0149] Step S37: The initial equivalent local field calculation circuit 41 uses the values of the binary variables, the coupling coefficients, and the local field to calculate an initial value of the equivalent local field expressed by, for example, equation (17) or equation (18). The calculated initial value of the equivalent local field is held in the equivalent local field holding circuit 25.
[0150] Step S38: Equivalent spin transition processing is performed under the control of the control circuit 46. An example of the procedure of the equivalent spin transition processing will be described later (see FIG. 13). Step S39: The control circuit 46 judges whether or not to end the equivalent spin transition process. For example, the control circuit 46 judges to end the equivalent spin transition process when a predetermined number of repetitions of the equivalent spin transition process are completed. If it is judged to end the equivalent spin transition process, the process of step S40 is performed, and if it is judged not to end the equivalent spin transition process, the process of step S38 is repeated.
[0151] When the simulated annealing method is used as the MCMC method, the control circuit 46 decreases the value of the temperature parameter according to a predetermined temperature parameter change schedule while the single bit transition process or the equivalent spin transition process is repeated. This updates the thresholds used by the transition equivalent spin selection circuit 29 and the transition binary variable selection circuit 37.
[0152] When the replica exchange method is used as the MCMC method, a single bit transition process or an equivalent spin transition process is repeated in each of a plurality of replicas to which different temperature parameter values are set. The control circuit 46 performs replica exchange for each predetermined number of iterations. For example, the control circuit 46 randomly selects two of the plurality of replicas. Then, the control circuit 46 exchanges the temperature parameter values between the two selected replicas with a predetermined exchange probability based on the difference in the evaluation function values between the replicas or the difference in the temperature parameter values. Instead of exchanging the temperature parameter values, the control circuit 46 may exchange the values of N binary variables or M equivalent spin values between the two selected replicas.
[0153] Step S40: The control circuit 46 judges whether or not the end condition of the solution search is satisfied. If it is judged that the end condition of the solution search is satisfied, the process of step S41 is performed, and if it is judged that the end condition of the solution search is not satisfied, the process from step S33 is repeated.
[0154] Step S41: Under the control of the control circuit 46, the search result of the solution search is output. Then, the search process ends. In the process of step S41, for example, when a termination condition is satisfied, the values of the N binary variables held in the minimum value update holding circuit 45 are output as a solution to the combinatorial optimization problem. The control circuit 46 may display the solution on a display device (not shown), or may transmit the solution to an external device via a communication circuit (not shown).
[0155] (Single bit transition processing procedure) FIG. 12 is a flowchart illustrating an example of a processing procedure for single-bit transition processing. Step S50: The ΔE calculation circuit 35 uses the local fields held in the local field holding circuit 34 to calculate the amount of change in the value of the evaluation function for each of the N binary variables.
[0156] Step S51: The transition binary variable selection circuit 37 determines whether or not a change in value (transition acceptance) is possible for each of the N binary variables, for example, based on the amount of change in the value of the evaluation function calculated for each of the N binary variables.
[0157] Step S52: When changes in the values of a plurality of binary variables are permitted, the transition binary variable selection circuit 37 selects one binary variable randomly or in accordance with a predetermined rule. Step S53: The control circuit 46 determines whether or not the value of the binary variable can be flipped based on the output of the transition binary variable selection circuit 37. If it is determined that the flip is possible, the process of step S54 is performed, and if it is determined that the flip is not possible, one single-bit transition process ends.
[0158] Step S54: The binary variable update circuit 31 updates the value of the binary variable selected by the transition binary variable selection circuit 37. Step S55: E The update holding circuit 43 uses the amount of change in the evaluation function output by the transition binary variable selection circuit 37 to update the value of the evaluation function.
[0159] Step S56: The local field update circuit 33 updates the N local fields using any one of the multiple coupling coefficients read out from the coupling coefficient memory 30 based on the identification number output by the transition binary variable selection circuit 37.
[0160] Step S57: The equivalent spin enable determination circuit 40 updates the enable signal in accordance with the process shown in FIG. This completes one single bit transition process.
[0161] (Procedure for equivalent spin transition processing) FIG. 13 is a flowchart showing an example of a processing procedure for the equivalent spin transition processing. Step S60: The ΔE calculation circuit 26 uses the equivalent local field held in the equivalent local field holding circuit 25 to calculate the amount of change in the value of the evaluation function for each of the M equivalent spins.
[0162] Step S61: The transition equivalent spin selection circuit 29 judges whether or not the value can be changed (whether or not the transition can be accepted) for each of the equivalent spins whose enable signal is 1, based on the amount of change in the value of the evaluation function calculated for each of the M equivalent spins. Note that for equivalent spins whose enable signal is 0, the judgment of whether or not the transition can be accepted is not performed.
[0163] Step S62: When changes in the values of a plurality of equivalent spins are permitted, the transition equivalent spin selection circuit 29 selects one equivalent spin randomly or according to a predetermined rule.
[0164] Step S63: The control circuit 46 determines whether or not the equivalent spin value can be flipped based on the output of the transition equivalent spin selection circuit 29. If it is determined that the flip is possible, the process of step S64 is performed, and if it is determined that the flip is not possible, one equivalent spin transition process ends.
[0165] Step S64: The equivalent spin update circuit 22 updates the value of the equivalent spin selected by the transition equivalent spin selection circuit 29. Step S65: E The update holding circuit 43 uses the amount of change in the evaluation function output by the transition equivalent spin selection circuit 29 to update the value of the evaluation function.
[0166] Step S66: The binary variable update circuit 31 updates the values of the two binary variables included in the equivalent spin selected by the transition equivalent spin selection circuit 29. Step S67: The local field update circuit 33 updates the N local fields twice using any of the multiple coupling coefficients read from the coupling coefficient memory 30 based on the two identification numbers output by the equivalent spin decoder circuit 38. Furthermore, the equivalent local field update circuit 24 updates the M equivalent local fields using any of the multiple equivalent coupling coefficients read from the equivalent coupling coefficient memory 21 based on the identification number output by the transition equivalent spin selection circuit 29.
[0167] Step S68: The equivalent spin enable determination circuit 40 updates the enable signal in accordance with the process shown in FIG. This completes one equivalent spin transition process.
[0168] It should be noted that the order of the processes shown in FIGS. 11 to 13 is merely an example, and the order of the processes may be changed as appropriate. As described above, the equivalent spin holding circuit 23 of the data processing device 20 holds a representative value (value of equivalent spin) which is one of two or more binary variables of each of a plurality of variable groups (equivalent spins) consisting of two binary variables of different or equal values included in the evaluation function. The equivalent coupling coefficient memory 21 stores a plurality of equivalent coupling coefficients which represent the magnitude of interaction between each of the equivalent spins. The equivalent local field holding circuit 25 holds an equivalent local field used to specify a first change amount of the value of the evaluation function accompanying a change in each value of the plurality of equivalent spins. The ΔE calculation circuit 26 uses the equivalent local field to calculate the first change amount for each of the plurality of equivalent spins. The transition equivalent spin selection circuit 29 accepts a change in the value of any of the plurality of spins based on the change amount calculated for each of the plurality of equivalent spins. The equivalent spin update circuit 22 updates the value of the equivalent spin of the plurality of equivalent spins whose value change has been accepted. Furthermore, the equivalent local field update circuit 24 updates the equivalent local field by using an equivalent coupling coefficient read out from the multiple equivalent coupling coefficients stored in the equivalent coupling coefficient memory 21 based on the identification number of the equivalent spin whose value change has been accepted.
[0169] According to such a data processing device 20, an equivalent spin consisting of two binary variables can be treated as one binary variable, so that a two-bit transition process (a change in the value of an equivalent spin corresponds to a two-bit transition) can be processed by parallel trials similar to single-bit transition processes. This makes it possible to efficiently evaluate two-bit transitions by parallel trials. Furthermore, since parallel trials are possible, search efficiency increases, and solution-finding performance improves.
[0170] Furthermore, the data processing device 20 has a single bit transition circuit unit 20b that accepts a change in the value of any one of a plurality of binary variables based on the amount of change in the value of the evaluation function accompanying the change in each of the values of a plurality of binary variables of the evaluation function including the above-mentioned plurality of variable groups, and a control circuit 46. The control circuit 46 switches between the equivalent spin transition processing by the equivalent spin transition circuit unit 20a and the single bit transition processing by the single bit transition circuit unit 20b. This makes it possible to efficiently execute flexible searches according to the situation, such as switching to the equivalent spin transition processing when the solution becomes stuck in a local solution by the single bit transition processing.
[0171] The data processing device 20 further includes an equivalent spin decoder circuit 38 that outputs an identification number that identifies two binary variables included in the equivalent spin identified by the identification number output by the transition equivalent spin selection circuit 29, based on the identification number output by the transition equivalent spin selection circuit 29. The single bit transition circuit unit 20b then updates the values of the two binary variables that correspond to these identification numbers. This allows the change in the value of the equivalent spin in the equivalent spin transition circuit unit 20a to be reflected in the binary variables handled by the single bit transition circuit unit 20b.
[0172] Furthermore, the data processing device 20 has an equivalent spin enable determination circuit 40 as described above. The equivalent spin enable determination circuit 40 generates an enable signal indicating whether or not to allow a change in the value of a plurality of equivalent spins. When the single-bit transition circuit unit 20b accepts a change in the value of a binary variable among the plurality of binary variables, the equivalent spin enable determination circuit 40 inverts the value of an enable signal related to the equivalent spin including the binary variable among the plurality of equivalent spins. This allows the binary variable handled by the equivalent spin transition circuit unit 20a to be matched with the equivalent spin of a different value or the same value handled by the single-bit transition circuit unit 20b.
[0173] The data processing device 20 also has an initial equivalent local field calculation circuit 41. The initial equivalent local field calculation circuit 41 calculates an initial value of the equivalent local field using the values of multiple binary variables and multiple coupling coefficients and local fields obtained by the processing of the single-bit transition circuit section 20b. This enables equivalent spin transition processing that reflects the result of the single-bit transition processing.
[0174] The data processing device 20 can also handle transition processing of 3 or more bits by using an equivalent spin consisting of three or more binary variables. In that case, the equivalent coupling coefficients and the formula for calculating the equivalent local field can be appropriately changed.
[0175] For example, the data processing device 20 first calculates the equivalent coupling coefficient and the equivalent local field of an equivalent spin consisting of two binary variables of different values or the same value among three binary variables. After that, the data processing device 20 regards this equivalent spin as one binary variable and calculates the equivalent coupling coefficient and the equivalent local field between the other binary variables in the same way, thereby realizing an equivalent spin consisting of three binary variables.
[0176] Such a data processing device 20 is expected to be useful as a means for quickly obtaining accurate solutions when solving various problems in modern society that can be converted into combinatorial optimization problems.
[0177] (Second embodiment) Fig. 14 is a diagram illustrating an example of a data processing device according to the second embodiment. In Fig. 14, the same elements as those in the data processing device 20 illustrated in Fig. 7 are denoted by the same reference numerals. Note that in Fig. 14, the ΔE selection circuit 42, the E update holding circuit 43, the comparison circuit 44, and the minimum value update holding circuit 45 illustrated in Fig. 7 are omitted.
[0178] The data processing device 50 of the second embodiment has a function of reflecting a change in the value of the equivalent spin and the equivalent local field every time a change in the value of a binary variable occurs during single-bit transition processing.
[0179] A data processor 50 of the second embodiment has an equivalent spin transition circuit section 50a which is different from the equivalent spin transition circuit section 20a of the data processor 20 of the first embodiment. The equivalent spin transition circuit section 50a has an equivalent coupling coefficient memory 21, a memory section 51 including update coupling coefficient memories 51a and 51b, and a binary variable pair update holding circuit 52.
[0180] The update coupling coefficient memories 51a and 51b store, among the N×N coupling coefficients, a plurality of coupling coefficients related to binary variables included in the M equivalent spins. FIG. 15 is a diagram for explaining the coupling coefficients stored in the update coupling coefficient memory.
[0181] The update coupling coefficient memory 51a stores coupling coefficients representing the magnitude of interaction between the binary variable with the identification number i1 and other binary variables among the N binary variables. The update coupling coefficient memory 51b stores coupling coefficients representing the magnitude of interaction between the binary variable with the identification number i2 and other binary variables among the N binary variables.
[0182] These coupling coefficients are used to update the equivalent local field in response to changes in the values of the binary variables that occur during single-bit transition processing. The binary variable pair update and hold circuit 52 holds two binary variables (binary variable pairs) included in each of the M equivalent spins. Furthermore, the binary variable pair update and hold circuit 52 updates the values of the binary variables held therein that correspond to one or two identification numbers output by the selection circuit 39. Furthermore, the binary variable pair update and hold circuit 52 outputs the amount of change in the value of the binary variable that occurs during the single-bit transition process.
[0183] The equivalent local field update circuit 53 updates the equivalent local field in response to changes in the value of the equivalent spin, similar to the equivalent local field update circuit 24 of the data processing device 20 of the first embodiment. Furthermore, the equivalent local field update circuit 53 updates the equivalent local field in response to a change in the value of the binary variable due to the single-bit transition process. The equivalent local field update circuit 53 updates the equivalent local field held in the equivalent local field holding circuit 25 using coupling coefficients read from update coupling coefficient memories 51a, 51b based on the identification number of the binary variable selected by the selection circuit 39 during the single-bit transition process. If the identification number selected at this time is j, the equivalent local field is updated based on the following equation (21).
[0184]
number
[0185] The equivalent spin enable determination circuit 54 performs the process shown in FIG. 9 in the same manner as the equivalent spin enable determination circuit 40 of the data processing device 20 of the first embodiment, based on one or two identification numbers output by the selection circuit 39.
[0186] (Example of Overall Operation of Data Processing Device 50) FIG. 16 is a timing chart illustrating an example of the overall operation of the data processing device according to the second embodiment.
[0187] In Fig. 16, an example is shown in which single bit transition processing or equivalent spin transition processing is performed using up to eight replicas. The single bit transition processing and equivalent spin transition processing are each repeated T times per unit processing. Processing for each replica can be performed by pipeline processing in the data processing device 50 shown in Fig. 14.
[0188] At timing t10 to t11, single bit transition processing is performed. On the equivalent spin transition processing side, the values of the binary variables included in the equivalent spin and M equivalent local fields are updated according to the change in the value of the binary variable due to the single bit transition processing. However, the equivalent spin transition processing itself is not performed.
[0189] When T single bit transition processes are completed (timing t11), the initialization processes of the local field and the equivalent local field are not performed, and the next unit process (timing t11 to t12) is performed. 16, at timings t11 to t12, the equivalent spin transition process is performed on the replicas with replica numbers 2 and 5. On the other hand, for the replicas with replica numbers 0, 1, 3, 4, 6, and 7 for which the equivalent spin transition process is not performed, single bit transition processes are performed in parallel with the equivalent spin transition process of the replicas with replica numbers 2 and 5.
[0190] When the value of the equivalent spin of the replica with replica number=2,5 is allowed to change in the equivalent spin transition process, the values of the two binary variables contained in the equivalent spin of the replica with replica number=2,5, which are held in the binary variable holding circuit 32, are also updated. The values of the two binary variables of the replica with replica number=2,5 can be updated during one iteration of the single bit transition process. Similarly, the values of the two binary variables contained in the equivalent spin of the replica with replica number=2,5, which are held in the binary variable pair update holding circuit 52, are also updated.
[0191] Among the binary variables of replicas with replica numbers=0, 1, 3, 4, 6, 7 held in the binary variable pair update holding circuit 52, those whose values have changed due to single bit transition processing are updated. In addition, the equivalent local field is also updated along with the update.
[0192] In the example of FIG. 16, as the next unit process (timing t12~), equivalent spin transition processes are performed on replicas with replica numbers 0, 3, and 7, and single bit transition processes are performed on replicas with replica numbers 1, 2, 4, 5, and 6.
[0193] Fig. 17 is a timing chart showing an example of the processing timing of the update process. Note that Fig. 17 shows a FIFO (First In First Out) for adjusting the processing timing.
[0194] A trial (such as a transition acceptance decision) is performed in the single bit transition process (timing t20), and if there is a binary variable whose value is allowed to change, the value of that binary variable and N local fields are updated (timing t21). At this time, the equivalent spin transition process also updates the values of the binary variables included in the equivalent spin and M equivalent local fields in response to the change in the value of the binary variable due to the single bit transition process.
[0195] In the trial of the equivalent spin transition process (timing t22), if there is an equivalent spin whose value is allowed to change, the value of the equivalent spin and M equivalent local fields are updated (timings t23 to t24). At this time, the values of the two binary variables included in the equivalent spin and N local fields are updated on the single bit transition process side as well (timings t23 to t25).
[0196] FIG. 18 is a flowchart illustrating an example of an overall processing procedure of the data processing device according to the second embodiment. The processing in steps S70 to S72 is the same as the processing in steps S30 to S32 shown in FIG.
[0197] Step S73: Single bit transition processing is performed under the control of the control circuit 46. An example of the procedure of the single bit transition processing will be described later (see FIG. 19). Step S74: The control circuit 46 judges whether or not to end the single bit transition process. For example, the control circuit 46 judges to end the single bit transition process when a predetermined number of repetitions of the single bit transition process are completed. If it is judged to end the single bit transition process, the process of step S75 is performed, and if it is judged not to end the single bit transition process, the process of step S73 is repeated.
[0198] Step S75: The control circuit 46 judges whether or not to execute the equivalent spin transition process. If it is judged that the equivalent spin transition process is to be executed, the process of step S76 is performed, and if it is judged that the equivalent spin transition process is not to be executed, the process of step S78 is performed.
[0199] The processing in steps S76 to S79 is the same as the processing in steps S38 to S41 shown in FIG. (Single bit transition processing procedure) FIG. 19 is a flowchart illustrating an example of a processing procedure for single-bit transition processing in the data processing device according to the second embodiment.
[0200] The processing in steps S80 to S86 is the same as the processing in steps S50 to S56 shown in FIG. Step S87: The binary variable pair update holding circuit 52 updates the values of the binary variables that change during the single-bit transition process among the binary variables included in the held equivalent spin.
[0201] Step S88: The equivalent local field update circuit 53 updates the equivalent local field in response to the change in the value of the binary variable due to the single-bit transition process. Step S89: The equivalent spin enable determination circuit 54 updates the enable signal in response to the change in the value of the binary variable that occurs in the process of step S87, thereby completing one single-bit transition process.
[0202] It should be noted that the order of the processes shown in FIGS. 18 and 19 is merely an example, and the order of the processes may be changed as appropriate. According to the data processing device 50 of the second embodiment as described above, the same effect as that of the data processing device 20 of the first embodiment can be obtained. Furthermore, the equivalent spin transition circuit unit 50a includes update coupling coefficient memories 51a and 51b that store, among the multiple coupling coefficients, multiple coupling coefficients related to the binary variables included in the equivalent spin. Then, when the single bit transition circuit unit 20b accepts a change in the value of a binary variable among the multiple binary variables, the equivalent local field update circuit 53 updates the equivalent local field using the amount of change in the value of the binary variable and any one of the multiple coupling coefficients related to the binary variable. This makes it unnecessary to initialize the equivalent local field when switching from the single bit transition process to the equivalent spin transition process.
[0203] (Third embodiment) Fig. 20 is a diagram showing an example of a data processing device according to the third embodiment. In Fig. 20, the same elements as those in the data processing device 50 shown in Fig. 14 are denoted by the same reference numerals. Note that in Fig. 20, the E update holding circuit 43, the comparison circuit 44, and the minimum value update holding circuit 45 shown in Fig. 7 are omitted.
[0204] A data processing device 60 of the third embodiment is obtained by sharing a part of the circuitry between the equivalent spin transition circuit section 50a and the single bit transition circuit section 20b shown in FIG. The data processing device 60 has a memory unit 61 including the equivalent coupling coefficient memory 21, the coupling coefficient memory 30, and update coupling coefficient memories 51a and 51b, an equivalent spin / binary variable updating circuit 62, and an equivalent spin / binary variable holding circuit 63. Furthermore, the data processing device 60 has an equivalent local field / local field updating circuit 64, an equivalent local field / local field holding circuit 65, a ΔE calculation circuit 66, a ΔE holding circuit 67, and a transition equivalent spin / binary variable selection circuit 68.
[0205] The equivalent spin / binary variable updating circuit 62 is a common circuit that combines the equivalent spin updating circuit 22 and the binary variable updating circuit 31 shown in FIG. The equivalent spin / binary variable holding circuit 63 is a combination of the equivalent spin holding circuit 23 and the binary variable holding circuit 32 shown in Fig. 14. In other words, the equivalent spin / binary variable holding circuit 63 holds M equivalent spin values and N binary variable values.
[0206] The equivalent local field / local field updating circuit 64 is a common circuit that combines the equivalent local field updating circuit 53 and the local field updating circuit 33 shown in FIG. The equivalent local field / local field holding circuit 65 is a combination of the equivalent local field holding circuit 25 and the local field holding circuit 34 shown in Fig. 14. In other words, the equivalent local field / local field holding circuit 65 holds M equivalent local fields and N local fields.
[0207] The ΔE calculation circuit 66 is a common circuit that combines the ΔE calculation circuits 26 and 35 shown in FIG. The ΔE holding circuit 67 is a combination of the ΔE holding circuits 27 and 36 shown in Fig. 14. That is, the ΔE holding circuit 67 holds the amount of change in the evaluation function accompanying changes in the values of the M equivalent spins and the amount of change in the value of the evaluation function accompanying changes in the values of the N binary variables.
[0208] The transition equivalent spin / binary variable selection circuit 68 is a common circuit that combines the transition equivalent spin selection circuit 29 and the transition binary variable selection circuit 37 shown in FIG. (Example of Overall Operation of Data Processing Device 60) FIG. 21 is a timing chart showing an example of the overall operation of the data processing device according to the third embodiment.
[0209] In the data processing device 60 of the third embodiment, the update process in the single bit transition process and the update process in the equivalent spin transition process are performed in a time-division manner. As in the timing chart shown in Fig. 16, in Fig. 21, the single bit transition process or the equivalent spin transition process is performed using a maximum of eight replicas.
[0210] In the example of Figure 21, in the first unit process, single bit transition processing is performed in all replicas. In the second unit process, equivalent spin transition processing is performed in replicas with replica numbers = 2 and 5, and single bit transition processing is performed in the other replicas. In the third unit process, equivalent spin transition processing is performed in replicas with replica numbers = 0, 3, and 7, and unit bit transition processing is performed in the other replicas. "S" represents processing related to single bit transition processing, and "P" represents processing related to equivalent spin.
[0211] In the first unit process, a trial in single bit transition processing (such as determining whether or not the transition can be accepted) is performed (timing t30), and if there is a binary variable whose value is allowed to change, its value and N local fields are updated (timing t31 to t32). Furthermore, on the equivalent spin transition processing side, the values of the binary variables included in the equivalent spin and the equivalent local fields are updated in response to the change in the value of the binary variable due to the single bit transition processing (timing t32 to t33). Note that the periods shaded in black indicate idle periods.
[0212] In the second unit process, the update process accompanying the change in the value of the binary variable in the single bit transition process is performed in the same manner as in the first unit process. If there is an equivalent spin whose value is allowed to change in the trial (timing t34) in the equivalent spin transition process, the value of the equivalent spin and M equivalent local fields are updated (timings t35 to t36). Then, in the single bit transition process, the values of the two binary variables included in the equivalent spin and N local fields are updated (timings t36 to t37).
[0213] According to the data processing device 60 of the third embodiment as described above, the same effects as those of the data processing device 50 of the second embodiment can be obtained. Furthermore, by sharing the circuit that performs unit bit transition processing and the circuit that performs equivalent spin transition processing, the amount of circuitry (the number of arithmetic units, etc.) can be reduced.
[0214] Incidentally, the above-mentioned circuit commonality may also be achieved for the data processing device 20 of the first embodiment. The processing contents of each of the above-described embodiments (eg, FIGS. 9, 11 to 13, 18, 19, etc.) can be realized by software by causing a data processing device to execute a program.
[0215] The program may be recorded on a computer-readable recording medium. For example, a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory may be used as the recording medium. Magnetic disks include flexible disks (FDs) and HDDs. Optical disks include compact discs (CDs), recordable CD-Rs (recordable) / rewritable RWs (rewritable), digital versatile discs (DVDs) and DVD-Rs / RWs. The program may be recorded on a portable recording medium and distributed. In that case, the program may be copied from the portable recording medium to another recording medium and executed.
[0216] FIG. 22 is a diagram illustrating an example of hardware of a computer, which is an example of a data processing device. The computer 70 includes a processor 71, a RAM 72, a HDD 73, a GPU (Graphics Processing Unit) 74, an input interface 75, a media reader 76, and a communication interface 77. The above units are connected to a bus.
[0217] The processor 71 loads at least a part of the programs and data stored in the HDD 73 into the RAM 72 and executes the programs. The processor 71 may include, for example, multiple processor cores. The computer 70 may include multiple processors. A set of multiple processors (multiprocessor) may be called a "processor." The processor 71 may be a CPU (Central Processing Unit), a GPU, a DSP (Digital Signal Processor), or the like.
[0218] The RAM 72 is a volatile semiconductor memory that temporarily stores programs executed by the processor 71 and data used in calculations by the processor 71. Note that the computer 70 may include a type of memory other than the RAM 72, or may include multiple memories.
[0219] The HDD 73 is a non-volatile storage device that stores software programs such as an OS (Operating System), middleware, and application software, as well as data. The programs include, for example, a program that causes the computer 70 to execute a process for searching for a solution to the combinatorial optimization problem as described above. The computer 70 may be provided with other types of storage devices, such as a flash memory or an SSD (Solid State Drive), or may be provided with multiple non-volatile storage devices.
[0220] The GPU 74 outputs an image (for example, an image showing a calculation result of a combinatorial optimization problem) to a display 74a connected to the computer 70 in accordance with an instruction from the processor 71. As the display 74a, a CRT (Cathode Ray Tube) display, a liquid crystal display (LCD: Liquid Crystal Display), a plasma display (PDP: Plasma Display Panel), an organic EL (OEL: Organic Electro-Luminescence) display, etc. can be used.
[0221] The input interface 75 acquires an input signal from an input device 75a connected to the computer 70 and outputs the signal to the processor 71. The input device 75a may be a pointing device such as a mouse, a touch panel, a touch pad, or a trackball, a keyboard, a remote controller, a button switch, etc. Furthermore, a plurality of types of input devices may be connected to the computer 70.
[0222] The medium reader 76 is a reading device that reads programs and data recorded on a recording medium 76a. For example, a magnetic disk, an optical disk, a magneto-optical disk (MO: Magneto-Optical disk), a semiconductor memory, etc. can be used as the recording medium 76a. Magnetic disks include FDs and HDDs. Optical disks include CDs and DVDs.
[0223] The medium reader 76 copies the program and data read from the recording medium 76a to another recording medium such as the RAM 72 or the HDD 73. The read program is executed by the processor 71, for example. The recording medium 76a may be a portable recording medium, and may be used for distributing the program and data. The recording medium 76a and the HDD 73 may also be referred to as computer-readable recording media.
[0224] The communication interface 77 is an interface that is connected to a network 77a and communicates with other information processing devices via the network 77a. The communication interface 77 may be a wired communication interface that is connected to a communication device such as a switch by a cable, or may be a wireless communication interface that is connected to a base station by a wireless link.
[0225] While one aspect of the data processing device, the program, and the data processing method of the present invention has been described above based on the embodiment, these are merely examples and the present invention is not limited to the above description.
[0226] For example, in the above explanation, the state variables have values of 0 or 1, but by appropriately converting the equations, it is also possible to use variables having values of -1 or +1 as state variables. [Explanation of symbols]
[0227] 1~8 equivalent spin 10a1~10aM Memory circuit 10b1~10bM Change amount calculation circuit 10c Selection circuit 20 Data Processing Device 20a Equivalent spin transition circuit section 20b Single bit transition circuit section 21 Equivalent coupling coefficient memory 22 Equivalent spin update circuit 23 Equivalent spin retention circuit 24 Equivalent local field update circuit 25 Equivalent local field holding circuit 26,35 ΔE calculation circuit 27,36 ΔE holding circuit 28 Enable Processing Circuit 29 Transition equivalent spin selection circuit 30 Coupling coefficient memory 31 Binary variable update circuit 32 Binary variable holding circuit 33 Local Field Update Circuit 34 Local Field Maintenance Circuit 37 Transition binary variable selection circuit 38 Equivalent Spin Decoder Circuit 39 Selection circuit 40 Equivalent spin enable determination circuit 41 Initial equivalent local field calculation circuit 42 ΔE selection circuit 43 E update holding circuit 44 Comparison circuit 45 Minimum value update and hold circuit 46 Control circuit
Claims
1. a first holding circuit that holds a representative value, which is one value of each of a plurality of variable groups each including two or more binary variables having distinct or equal values included in an evaluation function for the combinatorial optimization problem; a first memory for storing a plurality of first coupling coefficients representing the magnitude of interaction between the plurality of sets of variables; a second holding circuit that holds a first local field used to specify a first amount of change in the value of the evaluation function associated with a change in the representative value of each of the plurality of variable groups; a change amount calculation circuit that calculates the first change amount for each of the plurality of sets of variables by using the first local field; a selection circuit that accepts a change in the representative value of any of the plurality of variable groups based on the first change amount calculated for each of the plurality of variable groups; a first update circuit that updates the representative value of a first variable group among the plurality of variable groups, the first variable group having received a change in the representative value; a second update circuit that updates the first local field by using a second coupling coefficient that is read out based on a first identification number of the first variable set from among the plurality of first coupling coefficients stored in the first memory; A data processing device having:
2. a first circuit unit including the first holding circuit, the first memory, the second holding circuit, the change amount calculation circuit, the selection circuit, the first update circuit, and the second update circuit; a second circuit unit that receives a change in the value of any one of the plurality of binary variables based on a second change amount of the value of the evaluation function that accompanies a change in each value of the plurality of binary variables of the evaluation function including the plurality of variable groups; a control circuit that switches between a process by the first circuit unit and a process by the second circuit unit; 2. The data processing apparatus according to claim 1, comprising:
3. a decoder circuit that outputs, based on the first identification number, two or more second identification numbers that identify the two or more binary variables included in the first variable group; the second circuit unit updates values of the two or more binary variables corresponding to the two or more second identification numbers; 3. A data processing apparatus according to claim 2.
4. an enable determination circuit that generates an enable signal indicating whether or not to allow a change in the representative value of the plurality of variable groups; the enable determination circuit inverts a value of the enable signal for a second variable group including the first binary variable among the plurality of variable groups when the second circuit unit receives a change in a value of a first binary variable among the plurality of binary variables; 3. A data processing apparatus according to claim 2.
5. The second circuit portion is a third holding circuit that holds each value of the plurality of binary variables of the evaluation function; a second memory for storing a plurality of third coupling coefficients representing the magnitude of interaction between each of the plurality of binary variables; a fourth holding circuit that holds a second local field used to identify the second change amount; having the data processing device further includes an initial value calculation circuit that calculates an initial value of the first local field using values of the plurality of binary variables, the plurality of third coupling coefficients, and the second local field obtained by the processing of the second circuit unit.
3. A data processing apparatus according to claim 2.
6. The second circuit portion is a third holding circuit that holds each value of the plurality of binary variables of the evaluation function; a second memory for storing a plurality of third coupling coefficients representing the magnitude of interaction between each of the plurality of binary variables; a fourth holding circuit that holds a second local field used to identify the second change amount; having The first circuit portion is a third memory configured to store a plurality of fourth coupling coefficients related to binary variables included in the plurality of variable groups, among the plurality of third coupling coefficients; the second update circuit, when the second circuit unit receives a change in a value of a first binary variable among the plurality of binary variables, updates the first local field by using an amount of change in the value of the first binary variable and any one of the plurality of fourth coupling coefficients related to the first binary variable.
3. A data processing apparatus according to claim 2.
7. 3. The data processing device according to claim 2, wherein a part of said first circuit section and a part of said second circuit section are shared.
8. holding a representative value, which is one value of each of a plurality of variable groups consisting of two or more binary variables having distinct or equal values included in an evaluation function for the combinatorial optimization problem; storing a plurality of first coupling coefficients in a memory, the first coupling coefficients representing the magnitude of interaction between the plurality of sets of variables; A first local field is stored for use in identifying a first change amount of the value of the evaluation function associated with a change in the representative value of each of the plurality of variable groups; calculating the first change amount for each of the plurality of sets of variables using the first local field; Accepting a change in the representative value of any of the plurality of variable groups based on the first change amount calculated for each of the plurality of variable groups; updating the representative value of a first variable set among the plurality of variable sets in which the change in the representative value has been accepted; updating the first local field by using a second coupling coefficient read out based on the first identification number of the first variable set from among the plurality of first coupling coefficients stored in the memory; A program that causes a computer to carry out processing.
9. The computer holding a representative value, which is one value of each of a plurality of variable groups consisting of two or more binary variables having distinct or equal values included in an evaluation function for the combinatorial optimization problem; storing a plurality of first coupling coefficients in a memory, the first coupling coefficients representing the magnitude of interaction between the plurality of sets of variables; A first local field is stored for use in identifying a first change amount of the value of the evaluation function associated with a change in the representative value of each of the plurality of variable groups; calculating the first change amount for each of the plurality of sets of variables using the first local field; Accepting a change in the representative value of any of the plurality of variable groups based on the first change amount calculated for each of the plurality of variable groups; updating the representative value of a first variable set among the plurality of variable sets in which the change in the representative value has been accepted; updating the first local field by using a second coupling coefficient read out based on the first identification number of the first variable set from among the plurality of first coupling coefficients stored in the memory; Data processing methods.
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