Power supply device

Abstract

To provide a power supply device capable of improving the resolution of current detection while restraining an increase in cost.SOLUTION: When current is supplied from a drive power supply VB to a load 1 via FET 4a, an off-chip detection resistor R converts current based on that current into a voltage by passing the current through a detection resistor. An A / D converter 12 converts the voltage converted by the off-chip detection resistor R into a data value. When a calculated value based on that data value exceeds a threshold, an output control unit 15 performs a protective operation for stopping the current supply to the load 1 by the FET 4a. A gain switching unit 33 is installed in a control unit 11 in which the gain switching unit 33 is configured by IC, thereby improving the resolution of current detection in the A / D converter 12.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a power supply apparatus including a power device that supplies a current from a driving power supply to a load. [Background technology]

[0002] For example, Patent Documents 1 and 2 propose a method of implementing a fuse function using a semiconductor switch to protect a wire harness and a load. Hereinafter, such a protection function may be referred to as eFuse control. To implement eFuse control, it is necessary to shut off the current in a short time when a large current occurs due to the thermal time constant of the wire harness, while it is necessary to improve the accuracy of current detection near the limit current that can be steadily passed through the harness in order to reduce costs by thinning the harness. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 4624400 [Patent Document 2] Patent No. 4762044 Summary of the Invention [Problem to be solved by the invention]

[0004] There is a method to prepare two types of I / V conversion resistors for the output to monitor the current flowing through the semiconductor switch and switch them according to the current range. In this case, in the current range where it is necessary to switch from high resistance to low resistance for measurement, the current measurement resolution decreases, and it becomes necessary to operate the protection by cutting off the fuse earlier than the ideal fusing characteristic. In addition, it is necessary to select a resistance value on the high resistance side that can ensure the current detection accuracy near the current that can be steadily flowed through the harness, and due to the decrease in measurement resolution in the range where the load current is small and the A / D conversion error, it is difficult to judge the quality of the load and grasp the load state such as wake-up / sleep. As a countermeasure, increasing the number of resistance values ​​increases the cost.

[0005] The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a power supply device that can improve the resolution of current detection while suppressing an increase in costs. [Means for solving the problem]

[0006] According to the power supply device of claim 1, when a current is supplied from the driving power source (VB) to the load (1) via the power device (4a), a current based on the current is passed through the off-chip detection resistor (6) and converted into a voltage. The power device is a semiconductor element that constitutes a power conversion circuit such as an inverter and is capable of switching a relatively large amount of power. The data converter (12) converts the voltage converted by the off-chip detection resistor into a data value based on a predetermined characteristic.

[0007] When a calculated value based on the data value exceeds a threshold, a protection operation unit (13-15) performs a protection operation to stop the power device from supplying current to the load. The data converter and the protection operation unit are mounted on an IC chip (11, 11A, 11B, 11C, 11D, 11E, 11I, 11R), and the IC chip has a configuration capable of switching the voltage level obtained in multiple stages for a current based on the current.

[0008] In order to be able to detect the current even when the maximum load current flows, it is necessary to switch the voltage level so that the I / V conversion voltage becomes the maximum input voltage of the data converter. To realize a configuration capable of switching the voltage level in multiple stages, the resistors used in the chip are all configured to have each resistance value by arranging reference resistors. Therefore, although the absolute value of the resistance value varies due to variations in the semiconductor manufacturing process, it is possible to reduce the variation in the resistance ratio, making it possible to switch the voltage level with high precision.

[0009] According to the power supply device of claim 2, the gain switching unit (33) switches the voltage level obtained by switching the gain for the current based on the current. The data converter performs data conversion with the gain set to the minimum, and determines the gain for detecting the current according to the converted data value. With this configuration, it is possible to select an appropriate gain, and the current flowing through the load can be detected by performing data conversion a maximum of two times.

[0010] According to the power supply device of claim 3, when the power supply to the load by the power device is stopped, an abnormality in the connection state of the off-chip detection resistor can be determined according to the data value converted when the source side current supply unit (29I, 29R) supplies current to the off-chip detection resistor. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram showing a configuration of a power supply device in a first embodiment; [Diagram 2] A diagram showing the relationship between the load current and the A / D conversion value when only low resistance I / V conversion resistors are used. [Diagram 3] A diagram showing the relationship between the load current and the A / D conversion value when the resistance value of the I / V conversion resistor can be switched between low and high resistance. [Figure 4] Diagram showing the configuration of the gain switching section (part 1) [Diagram 5] Diagram showing the configuration of the gain switching section (part 2) [Figure 6] Diagram showing the configuration of the gain switching section (part 3) [Figure 7] The relationship between the load current and the A / D conversion value when the gain is switched. [Figure 8] A flowchart showing the processing contents of the control unit in the second embodiment. [Figure 9] FIG. 1 is a diagram showing a configuration of a power supply device in a third embodiment; [Figure 10] Diagram showing the configuration of the power supply device (part 2) [Figure 11] FIG. 13 is a diagram showing a configuration of a power supply device in a fourth embodiment. [Figure 12] 11 is a flowchart showing the processing contents of the control unit in the fifth, twelfth or thirteenth embodiment. [Figure 13] A flowchart showing the processing contents of the control unit in the sixth or fourteenth embodiment. [Figure 14] A diagram showing an example of a table used to determine the IPD type [Figure 15] A flowchart showing the processing contents of the control unit in the seventh or fifteenth embodiment. [Figure 16] A diagram explaining the process of applying a linear function to the A / D conversion result for correction. [Figure 17] FIG. 13 is a diagram showing a configuration of a power supply device in an eighth embodiment. [Figure 18] Flowchart showing the processing contents of the control unit [Figure 19] FIG. 13 is a diagram showing a configuration of a power supply device in a ninth embodiment. [Figure 20] FIG. 13 is a diagram showing a combined resistance value in the chip that is applied according to the on / off states of the switches SW1 to SW4. [Figure 21] The figure shows the relationship between the load current and the A / D conversion value when the combined resistance value of the off-chip detection resistor and the on-chip detection resistor is changed. [Figure 22] FIG. 23 is a diagram showing the configuration of a power supply device in a tenth embodiment. [Figure 23]A diagram showing the combined resistance value within the chip given according to the on / off state of the switches sw1 to sw4. [Figure 24] A flowchart showing the process of the control unit in the eleventh embodiment. [Diagram 25] The figure shows the relationship between the load current and the A / D conversion value when the combined resistance value of the off-chip detection resistor and the on-chip detection resistor is changed. [Figure 26] FIG. 12 is a diagram showing a configuration of a power supply device in a twelfth embodiment (part 1); [Figure 27] Diagram showing the configuration of the power supply device (part 2) [Figure 28] Diagram showing the configuration of the power supply device (part 3) [Figure 29] FIG. 13 is a diagram showing a configuration of a power supply device in a thirteenth embodiment (part 1); [Diagram 30] Diagram showing the configuration of the power supply device (part 2) [Diagram 31] FIG. 16 is a diagram showing a configuration of a power supply device according to a sixteenth embodiment (part 1); [Diagram 32] Diagram showing the configuration of the power supply device (part 2) DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] (First embodiment) As shown in Fig. 1, the power supply device of this embodiment supplies current to a load 1, one end of which is connected to ground, from a power source VB via an IPD 2 and a harness 3. The IPD 2 has a drain connected to the power source VB and includes N-channel MOSFETs 4a and 4b, the gates of which are commonly connected. The source of the FET 4a, which is an example of a power device, is connected to the load 1 via the harness 3, and the source of the FET 4b is connected to ground via a P-channel MOSFET 5 and an off-chip detection resistor with a resistance value R. Hereinafter, this will be referred to as the off-chip detection resistor R.

[0013] The source of FET 4b, together with the source of FET 5, is connected to the inverting input terminal of an operational amplifier 7, and the non-inverting input terminal is connected to the source of FET 4a. The FETs 4a and 4b form a transistor pair 4. The FET 4b is a so-called sense MOS, and the FETs 4b and 5 and the operational amplifier 7 form a current output circuit 8. The gate of the transistor pair 4 is driven by the control unit 11.

[0014] Inside the control unit 11, which is composed of an IC, an A / D converter 12, an eFuse (I 2 , t) characteristic calculation unit 13, interruption determination unit 14, and output control unit 15 are connected in series. An input terminal of an A / D converter 12, which is an example of a data converter, is connected to a common connection point of the IPD 2 and the off-chip detection resistor 6. Data converted by the A / D converter 12 is input to an eFuse (I 2 , t) are input to a characteristic calculation unit 13. The result of the calculation by the calculation unit 13 is input to a tripping determination unit 14, and the determination result of the tripping determination unit 14 is input to an output control unit 15.

[0015] eFuse (I 2 ,t) The characteristic calculation unit 13 calculates and outputs the data converted by the A / D converter 12 based on data proportional to the square of the detected current, for example, as in the "multiplication circuit 200" shown in FIG. 1 of JP 2023-18957 A. This is based on the fact that the smoke generation time t of the harness 3 has a characteristic that depends on the square of the current passed through it, as described in the publication.

[0016] The shutoff determination unit 14 compares the data calculated as above with a threshold value to determine whether or not to issue a shutoff instruction. The output control unit 15 drives the gates of the transistor pair 4 of the IPD 2 in response to an output instruction input from a higher-level control device (not shown). When a shutoff instruction is input from the shutoff determination unit 14, the output control unit 15, which corresponds to a protection operation unit, turns off the transistor pair 4.

[0017] A gain switching unit 33 is connected between the input terminal of the A / D converter 12 and the off-chip detection resistor 6. The gain switching unit 33 allows the gain to be switched in two or more stages. The gain switching control is performed by an eFuse (I 2 , t) are performed by the characteristic calculation unit 13. In the above, the portion excluding the harness 3 and the load 1 constitutes the power supply device 17.

[0018] Next, the operation of this embodiment will be described. As shown in Fig. 2, in the load current-I / V conversion characteristic when low gain is selected, in region (1) where the load current value is small, due to the influence of errors caused by A / D conversion, it becomes difficult to judge the quality of the load and to judge the wake-up / sleep state. Note that the numbers in parentheses correspond to the circled numbers in the figure. Also, in region (2), the current measurement resolution is low, so it becomes necessary to perform a protective operation so that the IPD 2 is cut off earlier than the ideal fusing characteristic of the harness 3. Region (3) indicates the current value that can be steadily passed through the harness 3.

[0019] If we add the characteristics when a high gain is selected to Figure 2, we get Figure 3. As shown above, it is necessary to select the gain so that the current detection accuracy can be ensured near region (3).

[0020] The gain switching unit 33 can be configured with a circuit as shown in FIG. 4 or FIG. 5. The gain can be changed to 1x, 2x, or 4x by combining the on / off of the switches SW10 to SW11 or selectively turning on SW20 to SW22. This gain switching results in a load current-I / V conversion characteristic as shown in FIG. 7. Here, the load current is IL, the monitor current flowing to the off-chip detection resistor 6 side is IS, the resistance value of the off-chip detection resistor 6 is R, the current ratio is KILIS, and the maximum input voltage of the A / D converter 12 is V_ADMAX. In the case of a gain of 1x, it is possible to detect a current up to V_ADMAX / R*KILIS, in the case of a gain of 2x, it is possible to detect a current up to V_ADMAX / R*KILIS / 2, and in the case of a gain of 4x, it is possible to detect a current up to V_ADMAX / R*KILIS / 4. 6, and the output voltage can be changed to 1 / 4, 1 / 2, or 1 by selectively turning on the switches SW30 to SW32. Using the lowest output voltage as a reference, the gain can be changed to 1, 2, or 4 in the same way.

[0021] In order to be able to detect the current even when the maximum load current ILMAX flows, it is necessary to set the lowest gain so that the I / V conversion voltage is equal to or lower than the maximum input voltage V_ADMAX of the A / D converter 12.

[0022] Assuming that the configuration of this embodiment is applied to, for example, an ECU (Electronic Control Unit), in order to improve detection accuracy, it is necessary to pass a load current when correcting the characteristics of the IPD 2 and the off-chip detection resistor 6 in the manufacturing process. At that time, correction is performed within the constraints of the inspection jig and device, and at a current value that provides sufficient A / D conversion accuracy, and at least one condition is set by the gain switching unit 33, and preferably, the most current accuracy is required, and the gain setting that ensures the highest resolution at point D (see FIG. 7) near the upper limit current (3) that can be steadily passed through the harness is set. When other gain switching settings are used, correction is performed based on the gain ratio, making it possible to shorten the inspection time of the ECU.

[0023] Here, when the gain switching unit 33 switches the gain to 1x, 2x, and 4x, if it is desired to obtain the characteristics of a square of the current, the input is multiplied by 1x, 4x, and 16x. 4x and 16x can be achieved by shifting the digital data by 2 bits and 4 bits, respectively, and can be configured with a simple arithmetic circuit. The gain may also be switched to 1x, √2x, 2x, etc. Similarly, with these switching settings, if it is desired to obtain the characteristics of a square of the current, the input is multiplied by 1x, 2x, and 4x. 2x and 4x can be achieved by shifting the digital data by 1 bit and 2 bits, respectively, and can be configured with a simple arithmetic circuit.

[0024] Furthermore, by considering the error in the gain of the gain switching unit 33 and setting the gain to be slightly higher as the gain becomes lower, for example, ((4 / 2)+α) / 2+β, (4 / 2)+α, or 4 times, a data conversion result corresponding to a larger current value can be obtained when the gain is switched to a lower level in a region where the load current is large. Since the calculated value based on the data value increases more quickly, the calculated value is more likely to exceed the threshold value more quickly, enabling a protective operation to stop the current supply from the power device to the load more quickly. Therefore, even if there is variation in the gain of the gain switching unit 33, it is possible to achieve protection more safely.

[0025] As described above, according to this embodiment, when a current is supplied from the drive power supply VB to the load 1 via the FET 4a and the harness 3, a current based on that current is converted into a voltage by passing it through the off-chip detection resistor 6. The gain switching unit 33 selects a gain that can ensure the highest resolution for the voltage within the input voltage range of the downstream A / D converter 12. This makes it possible to improve the resolution of data conversion in the A / D converter 12 in a pseudo manner. This makes it possible to improve the current detection accuracy in the small current region where the highest accuracy is required and near the upper limit current that can be steadily passed through the harness 3.

[0026] Second embodiment Hereinafter, the same parts as those in the first embodiment are denoted by the same reference numerals and explanations are omitted, and differences will be explained. As shown in FIG. 8, the second embodiment shows the control contents in the control unit 11. When processing starts, the gain of the gain switching unit is set to 1x the lowest value (S51), and A / D conversion is performed (S52). This corresponds to the first data conversion. Then, when the maximum output value of the A / D conversion circuit is admax, it is determined whether the A / D conversion result is equal to or greater than admax / 2 (S53).

[0027] If the A / D conversion result is equal to or greater than the conversion value admax / 2 (S53; Yes), the A / D conversion result is multiplied by four to become the final digital value according to the detected current (S61). Note that, for the sake of simplicity, the "ideal characteristics" shown in the figure ignores the case where the conversion characteristics of the current output circuit 8 are actually nonlinear in the low current region.

[0028] If the A / D conversion result is less than the conversion value admax / 4 (S54; No), the gain switcher is switched to a gain (4x) (S55), and A / D conversion is performed as in step S2 (S56). Then, the A / D conversion result is used as the final digital value (S57). If the A / D conversion result is less than the conversion value admax / 2 and greater than or equal to the conversion value admax / 4 (S54; Yes), the gain switcher is switched to a gain (2x) (S58), and A / D conversion is performed (S59). Then, the A / D conversion result is doubled and used as the final digital value according to the detected current (S60).

[0029] The conversion values ​​admax / 2 to admax / 4 may be finely adjusted according to the characteristics of the gain switching circuit in the chip, and may be stored in advance in a storage unit 11M (not shown) included in the control unit 11.

[0030] As described above, according to the second embodiment, the conversion resolution in the current domains (1) and (3) can be improved by performing A / D conversion a maximum of two times.

[0031] Third embodiment 9, a power supply device 28D of the third embodiment includes a source-side current supply unit 29I in a control unit 11D. The source-side current supply unit 29I is configured with a series circuit of a current source 30 and a switch 31 connected between the internal power supply and the source-side current supply unit 29I. 10, a source-side current supply unit 29I is disposed inside the IPD 2I. The source-side current supply unit 29I here is for diagnostics within the chip of the IPD 2I.

[0032] 9 and 10, when no current is applied to the load 1 from the IPD2 or 2I, a current Itest is supplied from the source side current supply unit 29I to the off-chip detection resistor 6, and the resulting voltage V_val1 is detected by the A / D converter 12. Similarly, when no current is applied to the load 1 from the IPD2 or 2I, a current is supplied from the source side current supply unit 29I to the off-chip detection resistor 6, and the resulting voltage V_val2 is detected by the A / D converter 12.

[0033] In the case of the configuration shown in FIG. 9, the voltage V_val1 generated when the gain switching unit 33 is set to a gain of 1 is expressed as V_val1=R×Itest. In the configuration shown in FIG. 10, when no current is applied to the load 1 from the IPD2I and the gain switching unit 33 is set to a gain of 1, if a current Idiag is supplied from the source side current supply unit 29I, the resulting voltage V_val1 is V_val1=R×Idiag. By comparing V_val1 or V_val2 with the expected value under normal conditions, it is possible to determine whether there is an abnormality in the connection state of the off-chip detection resistor 6, and to distinguish the type of resistance value of the off-chip detection resistor 6, thereby making it possible to set various control parameters, which will be described later, without having them set by a microcomputer or the like.

[0034] (Fourth embodiment) 11, a power supply device 28F of the fourth embodiment is provided with a source-side current supply unit 29R in a control unit 11F. The source-side current supply unit 29R includes a resistive element 32 having a resistance value Rtest instead of the current source 30.

[0035] In the case of the configuration shown in FIG. 11, when the IPD 2 is not energizing the load 1 and the gain switching unit is set to a gain of 1, when the switch 31 of the source side current supply unit 29R is turned on, the generated voltage V_val1 is V_val1=VCC×R / (R+Rtest) It becomes.

[0036] Fifth embodiment FIG. 12 shows the fifth embodiment. The control contents shown in FIG. 12 can be similarly applied to the configuration of the fourth embodiment. As shown in the figure, the process starts in a self-check mode with the output control unit 15 turning off the IPD2 or in standby. First, the switch 31 of the source side current supply unit 29I or 29R is turned on to pass a current through a resistor for I / V conversion, here the off-chip detection resistor 6 (S21). Then, A / D conversion is performed by the A / D converter 12, and the resistance value that can be read from the conversion result is determined (S22). A comparator may be used for the determination.

[0037] If the determined resistance value is equal to or greater than the upper threshold (S23; Yes), it is determined that an abnormality has occurred since the I / V conversion resistor is suspected to be open or shorted to the power supply (S28). Then, for example, a command to execute a diagnosis is sent to a higher-level control device or the like, or the IPD2 is maintained in the off state (S29).

[0038] If the determined resistance value is equal to or less than the lower threshold (S24; Yes), it is determined that there is an abnormality (S26) since there is a possibility that the connection of the I / V conversion resistor is shorted to ground. Then, the same process as in step S29 is performed (S27). On the other hand, if the determined resistance value is greater than the lower threshold (S24; No), it is determined that there is a normality (S25).

[0039] As described above, according to the fourth or fifth embodiment, by determining the resistance value when a source current is passed through the I / V conversion resistor via the source side current supply unit 29 while the supply of current to the load 1 by the IPD 2 is stopped, it is possible to determine whether the connection of the I / V conversion resistor is normal or abnormal.

[0040] Sixth embodiment 13 and 14, in the sixth embodiment, the control unit 11F of the fourth or fifth embodiment determines the type of the connected IPD 2 based on the resistance value of the off-chip detection resistor 6. As shown in FIG. 13, when processing is started in a self-check mode in the same state as in the fourth embodiment, etc., processing similar to step S21 is performed (S31). Then, A / D conversion is performed by the A / D converter 12, and the conversion result is obtained as resistance value data ValR (S32). Control parameters are set based on the resistance value data ValR (S33).

[0041] 14, for example, the data table for determining the type of the IPD 2. For example, if the resistance value R is in the range of 5 kΩ to 7.5 kΩ, the type of the IPD 2 is KILIS=500, the wire cross-sectional area of ​​the harness 3 is 0.15 mm 2 Also, if the resistance value R is in the range of 10 kΩ to 12.5 kΩ, the type of IPD2 is KILIS = 1000, the wire cross-sectional area is 0.3 mm 2 These are set as parameters to be used in eFuse control. This information can also be used to start control with rough parameters before obtaining information such as accurate conversion ratios and correction values ​​from a higher-level microcomputer, for example.

[0042] By providing the gain switching unit 33 inside the chip, there is no problem even if the resistance value of the external detection resistor 6 is high. Therefore, parameter setting and current monitoring can be achieved with one terminal, and terminals that were previously provided exclusively for parameters are no longer necessary. This makes it possible to reduce the number of terminals and components such as resistors dedicated to parameter setting.

[0043] Seventh embodiment As shown in Fig. 15, in the seventh embodiment, the connection state of the off-chip detection resistor 6 is judged as good or bad in the same manner as in the fourth embodiment etc. Then, after steps S26 and S28 are executed, for example, when performing correction on the A / D conversion result using a linear function, Bh shown in Fig. 16, which is an intercept; offset parameter, is changed to a value larger than the value normally used (S42). Here, the functional part that performs correction using the linear function corresponds to the correction unit.

[0044] Thereafter, when current is started by IPD2, the correction value of the A / D conversion result makes it possible to recognize that a large current is flowing regardless of the actual load current IL. As a result, the eFuse control function or the power monitoring function operates in a short time to provide protection to cut off the current, making it possible to safely protect the load 1. Also, if the result of step S24 is "No," the source-side current supply source 29 is turned off to start eFuse control, etc.

[0045] Eighth embodiment The eighth embodiment is a variation of the seventh embodiment. As shown in Fig. 17, a normally-closed switch 36 is inserted between the off-chip detection resistor 6 and the gain switching unit 33, and the source-side current supply unit 29I of the sixth embodiment is connected to a common connection point between the gain switching unit 33 and the switch 36.

[0046] 18, step S42 is replaced with step S43. In step S43, the switch 36 is turned off, and the switch 31 of the source-side current supply unit 29I is turned on. As a result, when the IPD2 starts to energize thereafter, the voltage input to the A / D converter 12 becomes higher than the normal input range, causing the load 1 to recognize that a large current is flowing regardless of the actual load current IL. As a result, the eFuse control function or the power monitoring function provides protection to cut off the current in a short time, thereby making it possible to safely protect the load 1.

[0047] (Other embodiments) The gain change in the gain switching unit 33 may be set to two stages, or three or more stages. 2 , t) The characteristics calculation unit 13 may be integrated to configure a data converter that outputs a conversion result according to the two-wire characteristics of the current.

[0048] Ninth embodiment As shown in FIG. 19, in the ninth embodiment, a resistance value changing unit 16 is connected between the input terminal of the A / D converter 12 and the ground. The resistance value changing unit 16 includes a series circuit in which a resistive element having a resistance value r corresponding to an on-chip detection resistor is connected to each of the switches SW1 to SW4. Hereinafter, this will be referred to as the on-chip detection resistor r. "On-chip" and "off-chip" refer to being inside and outside the IC chip, respectively. It is possible to include five or more pairs of switches and on-chip detection resistors. The on / off control of the switches S1 to S4 is performed by an eFuse (I 2 , t) are performed by the characteristic calculation unit 13. In the above, the portion excluding the harness 3 and the load 1 constitutes the power supply device 17.

[0049] Next, the operation of the ninth embodiment will be described. As shown in Fig. 2, in the load current-I / V conversion characteristic when the resistance value is set low, in region (1) where the load current value is small, there is also the effect of errors due to A / D conversion, making it difficult to judge the quality of the load and to judge the wake-up / sleep state. In region (2), the current measurement resolution is low, so it becomes necessary to perform a protective operation so that the IPD 2 is cut off earlier than the ideal fusing characteristic of the harness 3. Region (3) indicates a current value that can be steadily passed through the harness 3.

[0050] If we add the characteristics when the resistance value is set higher to Figure 2, we get Figure 3. As shown above, even if you simply switch to a high resistance, it is necessary to select the resistance value so that the current detection accuracy near region (3) can be ensured.

[0051] In the ninth embodiment, in the resistance value changing unit 16, the combined resistance value of the on-chip detection resistor r is changed to infinity, r, r / 2, r / 3, and r / 4 by selectively turning on the switches S1 to S4 as shown in Fig. 20. By adding the combined resistance value of the on-chip detection resistor r in parallel from the high resistance value setting using only the off-chip detection resistor R, the load current-I / V conversion characteristic becomes as shown in Fig. 21.

[0052] In order to be able to detect the current even when the maximum load current ILMAX flows, the resistance value of each of the on-chip detection resistors r is set so that the I / V conversion voltage is equal to or less than the maximum input voltage V_ADMAX of the A / D converter 12 when all the on-chip detection resistors r are connected. Also, each of the on-chip detection resistors r is configured to have each resistance value by arranging reference resistors. Therefore, although the absolute value of the resistance value varies due to variations in the semiconductor manufacturing process, it is possible to reduce the variation in the resistance ratio.

[0053] Assuming that the configuration of the ninth embodiment is applied to, for example, an ECU (Electronic Control Unit), in order to improve detection accuracy, in the manufacturing process, it is necessary to pass a load current when correcting the characteristics of the IPD 2 and the off-chip detection resistor R. At that time, correction is performed under at least two conditions, within the constraints of the inspection jig and device, a current value that provides sufficient A / D conversion accuracy, and the setting of the resistance value change unit 16. When other switching settings are used, correction is performed based on the resistance ratio, making it possible to shorten the inspection time of the ECU.

[0054] Here, if the load current is IL, the monitor current flowing through the off-chip detection resistor R is IS, and the current ratio of the off-chip detection resistor R is KILIS, the relationship between the currents IL and IS is (IL=KILIS×IS). As an example, as shown in Figure 21, the on-chip detection resistor r is not connected, and a constant load current IL flows only through the off-chip detection resistor R. In this case, the value of (R×KILIS) can be corrected by performing A / D conversion at point A. Furthermore, it is possible to correct the value of r by connecting only one on-chip detection resistor r in parallel and performing A / D conversion at point B.

[0055] As another method, the load current IL is made variable, current is passed only through the off-chip detection resistor R, and the load current that reaches a certain A / D conversion value corresponding to point A is obtained to correct the value of R. Furthermore, it is also possible to connect only one on-chip detection resistor r in parallel and correct the value of r by obtaining the load current that reaches a certain A / D conversion value corresponding to point C.

[0056] When detecting the load current IL, the combined resistance value is gradually decreased by sequentially connecting one to four on-chip detection resistors r in parallel with the off-chip detection resistor R, starting from a state in which the on-chip detection resistor r is not connected. When the on-chip detection resistor r is not connected, the load current IL can only be detected in the range of IL=0 to V_ADMAX / (R×KILIS).

[0057] In the ninth embodiment, in the resistance value changing section 16, the in-chip detection resistors r are connected in series in parallel, so that the load current IL is controlled to the above upper limit. +V_ADMAX / (r×KILIS) +2V_ADMAX / (r×KILIS) +3V_ADMAX / (r×KILIS) +4V_ADMAX / (r×KILIS) It will be possible to detect up to this range.

[0058] As described above, according to the ninth embodiment, when a current is supplied from the driving power supply VB to the load 1 via the FET 4a and the harness 3, a current based on the current is passed through the off-chip detection resistor R to convert the current into a voltage. The A / D converter 12 converts the voltage converted by the off-chip detection resistor R into a data value. When a calculated value based on the data value exceeds a threshold, the output control unit 15 performs a protection operation to stop the current supply to the load 1 by the FET 4a. A resistance value changing unit 16 having a plurality of on-chip detection resistors r is mounted on the control unit 11 formed by an IC, and is made connectable in parallel to the off-chip detection resistors 6.

[0059] In this way, even if the number of on-chip detection resistors r is increased in the control unit 11 composed of an IC, it does not lead to an increase in costs. By changing the combined resistance value with the off-chip detection resistor R by the resistance value changing unit 16, it is possible to further reduce the voltage input to the A / D converter 12. This makes it possible to virtually improve the resolution of data conversion in the A / D converter 12. It is also possible to improve the current detection accuracy in the small current region where the highest accuracy is required and near the upper limit current that can be steadily passed through the harness 3.

[0060] Tenth embodiment 22, a power supply device 21 of the tenth embodiment includes a resistance value changing unit 22 replacing the resistance value changing unit 16. In the resistance value changing unit 22, in-chip detection resistors having resistance values ​​r1 to r4 are connected to the switches swS1 to sw4, respectively.

[0061] The resistance values ​​r1 to r4 are set, for example, as follows. r1=4r r2=2r=r1 / 2 r3=r=r1 / 4 r4=r / 2=r1 / 8

[0062] That is, the combined resistance value is set to be a power of (1 / 2) of the reference resistance value r1, and the switches sw1 to sw4 are selectively turned on to change the combined resistance value as shown in Fig. 23. Note that the resistance value may be changed by turning on two or more switches simultaneously, or the resistance value may be switched between infinity, r, r / 2, ... as in the first embodiment.

[0063] Eleventh embodiment As shown in Fig. 24, the eleventh embodiment shows the control contents in the control unit 11. When the process starts, the combined resistance value for I / V conversion is set to the lowest value {1 / (1 / R+4 / r)} (S1), and A / D conversion is performed (S2). This corresponds to the first data conversion. Then, the A / D conversion result is compared with each of the conversion values ​​adl4 to adl1 shown in Fig. 9, and it is determined whether or not it is equal to or greater than each of the conversion values ​​adl4 to adl1 (S3 to S6).

[0064] If the A / D conversion result is equal to or greater than the conversion value adl4 (S3; Yes), it belongs to the current region E shown in FIG. 25. In this case, the A / D conversion result is multiplied by (R+4r) / R to obtain the final digital value according to the detected current (S19). The above (R+4r) / R is the ratio between the combined resistance value of the off-chip detection resistor R and the four on-chip detection resistors r, and the resistance value of the off-chip detection resistor R alone. Note that the "case of ideal characteristics" shown in the figure ignores the case where the conversion characteristics of the current output circuit 8 are nonlinear in the low current region, in order to simplify the explanation.

[0065] If the A / D conversion result is less than the conversion value adl1 (S5; No), it belongs to the current domain A, the on-chip detection resistor r is not connected, the resistor for I / V conversion is switched to only the off-chip detection resistor R (S7), and A / D conversion is performed as in step S2 (S8). Then, the A / D conversion result is used as the final digital value (S9). If the A / D conversion result is less than the conversion value adl2 and is greater than or equal to the conversion value adl1 (S5; Yes), it belongs to the current domain B, the resistor for I / V conversion is switched to a parallel connection of the off-chip detection resistor R and one on-chip detection resistor r (S10), and A / D conversion is performed (S11). Then, the A / D conversion result is multiplied by (R+r) / R to use as the final digital value according to the detected current (S12).

[0066] If the A / D conversion result is equal to or greater than the conversion value adl2 and less than the conversion value adl3 (S6; No), it belongs to current domain C, and the resistance for I / V conversion is switched to a parallel connection of the off-chip detection resistor R and the two on-chip detection resistors r (S13) and A / D conversion is performed (S14). The A / D conversion result is then multiplied by (R+2r) / R to obtain the final digital value according to the detected current (S15).

[0067] If the A / D conversion result is less than the conversion value adl4 and greater than or equal to the conversion value adl3 (S6; Yes), it belongs to the current domain D, and the resistance for I / V conversion is switched to a parallel connection of the off-chip detection resistor R and the three on-chip detection resistors r (S16) to perform A / D conversion (S17). Then, the A / D conversion result is multiplied by (R+3r) / R to obtain a final digital value according to the detected current (S18). Steps S8, S11, S14S, and S17 correspond to the second data conversion. The conversion values ​​adh1 to adh4 are stored in advance in a storage unit 11M (not shown) provided in the control unit 11.

[0068] As described above, according to the eleventh embodiment, the A / D conversion results adi1 to adi4 when the resistance value for I / V conversion is set to the lowest are stored in advance, and the actual A / D conversion results are compared with these to classify the current regions A to E, and for the current regions A to D, the resistance for I / V conversion is switched to an off-chip detection resistor R alone, or an off-chip detection resistor R and an on-chip detection resistor r of the resistance value change unit 16 connected in parallel in sequence, and A / D conversion is performed again. This makes it possible to artificially increase the conversion resolution in the current regions A to D by performing A / D conversion a maximum of two times.

[0069] Twelfth embodiment As shown in Fig. 26 and Fig. 27, the power supply devices 28I, 21I of the 12th embodiment include a source side current supply unit 29I in each of the control units 11I, 11B. The control unit 11B includes the resistance value change unit 22 of the 10th embodiment. The source side current supply unit 29I is composed of a series circuit of a current source 30 and a switch 31 connected between a power supply VB and ground. In the power supply device 28Ia shown in Fig. 28, the source side current supply unit 29I is disposed inside the IPD2I. The source side current supply unit 29I here is for diagnosis in the chip of the IPD2I.

[0070] 26 and 27, when no current is passed through the load 1 from the IPD2, all on-chip detection resistors r are disconnected, a current Itest is supplied from the source side current supply unit 29I to the off-chip detection resistor R, and the resulting voltage V_val1 is detected by the A / D converter 12. Similarly, when no current is passed through the load 1 from the IPD2 and one or more on-chip detection resistors r are connected, a current is supplied from the source side current supply unit 29I to the I / V conversion resistor, and the resulting voltage V_val2 is detected by the A / D converter 12.

[0071] In the case of the configuration shown in FIG. 26, the voltage V_val1 generated when the switches S1 to S4 are all turned off is V_val1=R×Itest. When only the switch S1 is turned on, V_val2=1 / (1 / R+1 / r)×Itest =R×r / (R+r)×Itest It becomes.

[0072] In the case of the configuration shown in FIG. 27, the voltage V_val1 generated when the switches S1 to S4 are all turned off is V_val1=R×Itest. When only the switch S4 is turned on, the voltage V_val2 generated is V_val2=1 / (1 / R+1 / r4)×Itest =R×r4 / (R+r4)×Itest It becomes.

[0073] Here, the in-chip detection resistors r1 to r4 are resistors in the same semiconductor chip, and the resistance ratios of the resistors can be considered to be constant. Therefore, if the resistance value of any of the resistors is known, for example, The resistance values ​​can be calculated from relationships such as r1 = 4r, r2 = 2r, r3 = r, and r4 = r / 2.

[0074] 28, when the switches S1 to S4 are all turned off and a current Idiag is supplied from the source side current supply unit 29I while no current is being applied to the load 1 from the IPD2I, the voltage V_val1 generated is V_val1=R×Idiag. From this, the voltage V_val2 generated when only the switch S1 is turned on is V_val2=1 / (1 / R+1 / r)×Idiag =R×r / (R+r)×Idiag The resistance values ​​of the on-chip detection resistors r, r1 to r4 can be corrected based on the values ​​of the voltages Vval1 and Vval2, respectively, with the value of the off-chip detection resistor R being used as a reference.

[0075] Thirteenth embodiment 29 and 30, in the power supply devices 28R and 21R of the thirteenth embodiment, the source side current supply unit 29I in the control units 11R and 11C is replaced with a source side current supply unit 29R. The source side current supply unit 29R includes a resistive element 32 having a resistance value Rtest instead of the current source 30.

[0076] In the case of the configuration shown in FIG. 29, when the switches S1 to S4 are all turned off and the switch 31 of the source side current supply unit 29R is turned on in a state where no current is applied to the load 1 from the IPD 2, the generated voltage V_val1 is V_val1=VCC×R / (R+Rtest) From this, the voltage V_val2 generated when only the switch S1 is turned on is V_val2= VCC×R×r / (Rtest×r+r×R+Rtest×R) It becomes.

[0077] Here, since the resistor Rtest and the in-chip detection resistor r are resistors within the same semiconductor chip, the resistance ratio can be considered to be constant. If r=Rtest×a, then V_val1=VCC×R / (R+Rtest), V_val2 = VCC × R × Rtest × a / (a×Rtest 2 +a×Rtest×R+Rtest×R) It becomes.

[0078] In the case of the configuration shown in FIG. 30, when the switches S1 to S4 are all turned off and the switch 31 of the source side current supply unit 29R is turned on in a state where no current is applied to the load 1 from the IPD 2, the generated voltage V_val1 is V_val1=VCC×R / (R+Rtest) From this, the voltage V_val2 generated when only the switch S3 is turned on is V_val2=VCC×R×r3 / (Rtest×r3+r3×R+Rtest×R) It becomes.

[0079] Here, the resistance ratio of the resistor Rtest and the in-chip detection resistors r1 to r4 can be considered to be constant, as described above. If r3=Rtest×a, then V_val1=VCC×R / (R+Rtest) V_val2 = VCC × R × Rtest × a / (a×Rtest 2+a×Rtest×R+Rtest×R) The resistance ratios of the in-chip detection resistors r1 to r4 can be considered to be constant. Therefore, if any of the resistance values ​​is known, for example, r1=4r, r2=2r, The resistance values ​​of each resistor can be calculated using relationships such as r3=r, r4=r / 2.

[0080] Next, the operation of the thirteenth embodiment will be described. The same operation can be achieved in the configuration of the twelfth embodiment. As shown in FIG. 12, the output control unit 15 turns off the IPD2 or puts it in standby, and starts processing in a self-check mode. First, the switch 31 of the source side current supply unit 29I or 29R is turned on to pass a current through a resistor for I / V conversion, here the off-chip detection resistor R (S21). Then, A / D conversion is performed by the A / D converter 12, and the resistance value that can be read from the conversion result is determined (S22). A comparator may be used for the determination.

[0081] If the determined resistance value is equal to or greater than the upper threshold (S23; Yes), it is determined that an abnormality has occurred since the I / V conversion resistor is suspected to be open or shorted to the power supply (S28). Then, for example, a command to execute a diagnosis is sent to a higher-level control device or the like, or the IPD2 is maintained in the off state (S29).

[0082] If the determined resistance value is equal to or less than the lower threshold (S24; Yes), it is determined that there is an abnormality (S26) since there is a possibility that the connection of the I / V conversion resistor is shorted to ground. Then, the same process as in step S29 is performed (S27). On the other hand, if the determined resistance value is greater than the lower threshold (S24; No), it is determined that there is a normality (S25).

[0083] As described above, according to the twelfth or thirteenth embodiment, the resistance values ​​of the on-chip detection resistors r, r1 to r4 are corrected according to the data value converted when the source side current supply unit 29I or the like supplies current to the off-chip detection resistor R while the IPD2 is stopped from supplying current to the load 1. In addition, by determining the resistance value when a source current is supplied to the I / V conversion resistor via the source side current supply unit 29 while the IPD2 is turned off or the like, it is possible to determine whether the connection of the I / V conversion resistor is normal or abnormal. If the resistance value of the off-chip detection resistor is configured to be switchable, an abnormality only on the high resistance side can also be detected by comparing the A / D conversion results on the low resistance side and the high resistance side after the start of current supply. Therefore, it is necessary to detect the presence or absence of an abnormality on the low resistance side at least before taking the above-mentioned measures. In addition, it is desirable to determine whether the resistance value on the high resistance side after switching is also normal, and take similar measures if there is an abnormality.

[0084] Fourteenth embodiment As shown in Fig. 13 and Fig. 14, in the 14th embodiment, the control unit 11I, 11R, 11B or 11C of the 12th or 13th embodiment determines the type of the connected IPD 2 based on the resistance value of the off-chip detection resistor R. As shown in Fig. 13, when processing is started in a self-check mode in the same state as the 4th embodiment, processing similar to step S21 is performed (S31). Then, A / D conversion is performed by the A / D converter 12, and the conversion result is obtained as resistance value data ValR (S32). Control parameters are set based on the resistance value data ValR (S33).

[0085] The control unit 11I etc. holds a data table for determining the type of the IPD 2, for example, as shown in Fig. 14. For example, if the resistance value R is in the range of 5 kΩ to 7.5 kΩ, the type of the IPD 2 is KILIS=500, the wire cross-sectional area of ​​the harness 3 is 0.15 mm 2 Also, if the resistance value R is in the range of 10 kΩ to 12.5 kΩ, the type of IPD2 is KILIS = 1000, the wire cross-sectional area is 0.3 mm 2These are set as parameters to be used in eFuse control. This information can also be used to start control with rough parameters before obtaining information such as accurate conversion ratios and correction values ​​from a higher-level microcomputer, for example.

[0086] By making it possible to switch the connection combination with the on-chip detection resistor, it is no problem if the resistance value of the off-chip detection resistor is high. Therefore, parameter setting and current monitoring can be achieved with one terminal, eliminating the need for terminals that were previously provided exclusively for parameters. This makes it possible to reduce the number of terminals and components such as resistors dedicated to parameter setting.

[0087] Fifteenth embodiment As shown in Fig. 15, the fifteenth embodiment judges whether the connection state of the off-chip detection resistor R is good or bad in the same manner as the twelfth embodiment etc. Then, when steps S26 and S28 are executed, for example, when performing correction on the A / D conversion result using a linear function, Bh shown in Fig. 16, which is an intercept; offset parameter, is changed to a value larger than the value normally used (S42). Here, the functional part that performs correction using the linear function corresponds to the correction unit.

[0088] Thereafter, when current is started by IPD2, the correction value of the A / D conversion result makes it possible to recognize that a large current is flowing regardless of the actual load current IL. As a result, the eFuse control function or the power monitoring function operates in a short time to provide protection to cut off the current, making it possible to safely protect the load 1. Also, if the result of step S24 is "No," the source-side current supply source 29 is turned off to start eFuse control, etc.

[0089] Sixteenth embodiment The sixteenth embodiment is a variation of the fifteenth embodiment. As shown in Fig. 31, a normally-closed switch 36 is inserted between the input terminal of the A / D converter 12 and the resistance value changing unit 16, and a source side current supply unit 29I of the sixth embodiment is connected to a common connection point between the input terminal and the switch 36. Fig. 32 shows a configuration in which the switch 36 and a source side current supply source 29R are connected to the same positions as in Fig. 31 in a control unit 11C having the resistance value changing unit 22 shown in Fig. 30, to form a control unit 11H.

[0090] 18, step S42 is replaced with step S43. In step S43, the switch 36 is turned off, and the switch 31 of the source side current supply unit 29I or 29R is turned on. As a result, when the IPD 2 starts to energize thereafter, the voltage input to the A / D converter 12 becomes higher than the normal input range, causing the load 1 to recognize that a large current is flowing regardless of the actual load current IL. As a result, the eFUSE control function or the power monitoring function provides protection to cut off the current in a short time, thereby making it possible to safely protect the load 1.

[0091] (Other embodiments) The resistance value of the off-chip detection resistor may be changed in three or more stages. Also, the resistance value does not necessarily have to be changed. The number of current sources provided in the sink side current source section may be "3" or less, or "5" or more. A / D Converter 12 and eFuse I 2t It may be possible to configure a data converter that outputs a conversion result according to the two-wire characteristic of the current by integrating it with the characteristic calculation unit 13 .

[0092] In addition to the inventions described in the claims, this case includes the following inventions: [1] a power device (4a) that supplies current from a drive power supply (VB) to a load (1); an external chip detection resistor (6) through which a current based on the current flows; a data converter (12) for converting the voltage converted by the off-chip detection resistor into a data value based on a predetermined characteristic; a protection operation unit (13 to 15) that performs a protection operation to stop a current supply to a load by the power device when a calculated value based on the data value exceeds a threshold value, an IC chip (11, 11A, 11B, 11C, 11D, 11E, 11F, 11G, 11H, 11I, 11R) on which the data converter and the protection operation unit are mounted, The power supply device further includes a configuration in which the IC chip is capable of switching the voltage level obtained in multiple stages in response to a current based on the current. [2] a gain switching unit (33) that switches a voltage level obtained by switching a gain for a current based on the current, The power supply device according to [1], wherein the data converter performs data conversion with a minimum gain, and determines a gain for detecting the current according to the converted data value. [3] a source-side current supply source (29I, 29R) for supplying current to the off-chip detection resistor in a state where the power device stops supplying current to the load; The power supply device according to claim [1] or [2], wherein an abnormality in the connection state of the off-chip detection resistor is determined based on the data value converted when the current is applied. [4] A power supply device as described in [3], further comprising a correction unit that corrects the output data of the data converter, and when an abnormality is detected in the detection resistor, a correction parameter of the correction unit is set so that the protective operation unit starts protective operation more quickly. [5] The power supply device according to [3], wherein when an abnormality is detected in the detection resistor, the input voltage of the data converter is set to a higher potential than a normal input range. [6] a source-side current supply source (29I, 29R) for supplying current to the off-chip detection resistor in a state where the power device stops supplying current to the load; The control unit determines a resistance value of the off-chip detection resistor based on a result of data conversion associated with the energization, and sets a control parameter according to the determined resistance value. [7] the IC chip includes a resistance value changing unit (16) having a plurality of in-chip detection resistors (r, r1 to r4) connectable in parallel to the out-chip detection resistor; The power supply device according to any one of [1] to [6], wherein the data converter performs data conversion while keeping the combined resistance value of the off-chip detection resistor and the on-chip detection resistor at a minimum, and determines the combined resistance value for detecting the current according to the converted data value. [8] a source-side current supply unit (29I, 29R) for supplying current to the off-chip detection resistor in a state where the power device stops supplying current to the load; A power supply device as described in any one of claims [1] to [7], wherein the resistance value of the on-chip detection resistor is corrected according to a data value converted when the source side current source passes current through the off-chip detection resistor. [9] A power supply device as described in [8], further comprising a correction unit that corrects the output data of the data converter, and when an abnormality is detected in the detection resistor, a correction parameter of the correction unit is set so that the protective operation unit starts protective operation more quickly.

[10] The power supply device according to [8], wherein when an abnormality is detected in the detection resistor, the input voltage of the data converter is set to a higher potential than a normal input range.

[0093] Although the present disclosure has been described based on the embodiment, it is understood that the present disclosure is not limited to the embodiment or structure. The present disclosure also includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, and other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and concept of the present disclosure. [Explanation of symbols]

[0094] In the drawing, 1 is a load, 2 is an IPD, 3 is a harness, 4a and 4b are N-channel MOSFETs, 6 is an external detection resistor, 8 is a current output circuit, 9 is a P-channel MOSFET, 11 is a control unit, 12 is an A / D converter, and 13 is an eFuse (I 2 , t) a characteristic calculation section, 14 indicates a cutoff determination section, 15 indicates an output control section, and 33 indicates a gain switching section.

Claims

1. a power device (4a) that supplies current from a driving power supply (VB) to a load (1); an external chip detection resistor (6) through which a current based on the current flows; a data converter (12) for converting the voltage converted by the off-chip detection resistor into a data value based on a predetermined characteristic; a protection operation unit (13 to 15) that performs a protection operation to stop a current supply to a load by the power device when a calculated value based on the data value exceeds a threshold value; an IC chip (11, 11A, 11B, 11C, 11D, 11E, 11F, 11G, 11H, 11I, 11R) on which the data converter and the protection operation unit are mounted, The power supply device further includes a configuration in which the IC chip is capable of switching an obtained voltage level in multiple stages in response to a current based on the current.

2. a gain switching unit (33) for switching a voltage level obtained by switching a gain for a current based on the current; 2. The power supply device according to claim 1, wherein the data converter performs data conversion with a minimum gain, and the gain for detecting the current is determined in accordance with the converted data value.

3. a source-side current supply source (29I, 29R) for supplying current to the off-chip detection resistor in a state where the power device stops supplying current to the load; 3. The power supply device according to claim 1, wherein an abnormality in a connection state of the off-chip detection resistor is determined based on a data value converted when the current is passed through the power supply.

4. 4. The power supply device according to claim 3, further comprising a correction unit that corrects the output data of the data converter, and that sets a correction parameter of the correction unit so that the protective operation unit starts the protective operation more quickly when an abnormality is detected in the detection resistor.

5. 4. The power supply device according to claim 3, wherein when it is determined that the detection resistor is abnormal, the input voltage of the data converter is set to a potential higher than a normal input range.

6. a source-side current supply source (29I, 29R) for supplying current to the off-chip detection resistor in a state where the power device stops supplying current to the load; 3. The power supply device according to claim 1, wherein the control unit determines a resistance value of the off-chip detection resistor based on a result of the data conversion associated with the energization, and sets a control parameter according to the determined resistance value.

7. the IC chip includes a resistance value changing unit (16) having a plurality of on-chip detection resistors (r, r1 to r4) connectable in parallel to the off-chip detection resistor; 2. The power supply device according to claim 1, wherein the data converter performs data conversion while keeping the combined resistance value of the off-chip detection resistor and the on-chip detection resistor at a minimum, and determines the combined resistance value for detecting the current according to the converted data value.

8. a source-side current supply unit (29I, 29R) for supplying current to the off-chip detection resistor in a state where the power device stops supplying current to the load; 8. The power supply device according to claim 1, wherein the resistance value of the on-chip detection resistor is corrected in accordance with a data value converted when the source-side current supply unit applies current to the off-chip detection resistor.

9. 9. The power supply device according to claim 8, further comprising a correction unit that corrects the output data of the data converter, and that sets a correction parameter of the correction unit so that the protective operation unit starts the protective operation more quickly when an abnormality is detected in the detection resistor.

10. 9. The power supply device according to claim 8, wherein when it is determined that the detection resistor is abnormal, the input voltage of the data converter is set to a potential higher than a normal input range.

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