Printed circuit board

Abstract

To provide a printed circuit board that can secure excellent signal characteristics substantially without increasing a thickness of the entire layer.SOLUTION: A printed circuit board includes an insulation layer, and a plurality of wiring layers arranged in the insulation layer, the plurality of wiring layers includes a first wiring layer, a second wiring layer arranged on the first wiring layer, and a third wiring layer arranged on the second wiring layer, where the second wiring layer is thicker than each of the first wiring layer and third wiring layer, and the second wiring layer includes one or more fine circuit patterns having 2.4 to 3.6 of an aspect ratio being a ratio of a height to a line width.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to printed circuit boards. [Background technology]

[0002] Recently, as the market has changed from the traditional mobile device-centered business to the high-capacity server-centered market, data volume has increased dramatically and servers, networks, and storage have increased at a faster rate. Therefore, new highly multi-layered structure boards including fine circuits are expanding. For example, FOMCM (Fan-out multi chip module), FOEB (Fan-out Embedded Bridge), EMIB (Embedded multi-die interconnect bridge), etc. have been developed. Summary of the Invention [Problem to be solved by the invention]

[0003] One of several objects of the present invention is to provide a printed circuit board that can ensure excellent signal characteristics without substantially increasing the thickness of all layers. [Means for solving the problem]

[0004] One of the solutions proposed through the present invention is to increase the thickness of the wiring layer including the fine circuit, for example by increasing the aspect ratio of the fine circuit to a certain level to reduce signal loss while controlling the overall thickness.

[0005] For example, a printed circuit board according to one example includes an insulating layer and a plurality of wiring layers arranged in the insulating layer, the plurality of wiring layers including a first wiring layer, a second wiring layer arranged on the first wiring layer, and a third wiring layer arranged on the second wiring layer, the second wiring layer being thicker than each of the first and third wiring layers, and the second wiring layer including one or more fine circuit patterns having an aspect ratio, which is the ratio of height to line width, of 2.4 to 3.6.

[0006] Another of several solutions proposed through the present invention is to increase the thickness of a wiring layer including fine circuits to a certain level relative to the insulation distance with a wiring layer that is not a fine circuit, thereby reducing signal loss and controlling the overall thickness.

[0007] For example, a printed circuit board according to one example includes an insulating layer and a plurality of wiring layers arranged in the insulating layer, the plurality of wiring layers including a first wiring layer, a second wiring layer arranged on the first wiring layer, and a third wiring layer arranged on the second wiring layer, the second wiring layer being thicker than each of the first and third wiring layers, the thickness of the second wiring layer being greater than each of the insulation distance between the first and second wiring layers and the insulation distance between the second and third wiring layers, and when the thickness of the second wiring layer is t2, the insulation distance between the first and second wiring layers is d1, and the insulation distance between the second and third wiring layers is d2, t2, d1, and d2 may satisfy (1.4×d1)≦t2≦(2.6×d1) and (1.4×d2)≦t2≦(2.6×d2). Effect of the Invention

[0008] Among the various advantages of the present invention, one advantage is that it provides a printed circuit board that can ensure excellent signal characteristics without increasing the thickness of substantially all layers. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram illustrating a schematic example of an electronic device system. [Diagram 2] FIG. 1 is a perspective view illustrating an example of an electronic device. [Diagram 3] FIG. 1 is a cross-sectional view illustrating an example of a printed circuit board. [Figure 4] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Diagram 5] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 6] FIG. 2 is a cross-sectional view showing a schematic image of a wiring layer including a fine circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] The present invention will now be described with reference to the accompanying drawings, in which the shapes and sizes of elements may be exaggerated or reduced for clarity.

[0011] electronic equipment FIG. 1 is a block diagram illustrating an example of an electronic device system.

[0012] Referring to the drawing, an electronic device 1000 accommodates a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are also connected to other electronic components described below to form various signal lines 1090.

[0013] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphic processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Needless to say, the chip-related components 1020 may include other types of chip-related electronic components. Needless to say, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the above-mentioned chips and electronic components.

[0014] The network-related components 1030 may include, but are not limited to, any other wireless and wired protocols designated as Wi-Fi (e.g., IEEE 802.11 family), WiMAX (e.g., IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and beyond, as well as any of a number of other different wireless or wired standards and protocols. It should be understood that the network-related components 1030 may also be combined with the chip-related components 1020 and with each other.

[0015] The other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, the other components 1040 are not limited to these, and may also include passive elements in the form of chip components used for various other different applications. It goes without saying that the other components 1040 may be combined with the chip-related components 1020 and / or the network-related components 1030.

[0016] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically coupled to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. The other electronic components may include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. Needless to say, other electronic components used for various purposes may be included depending on the type of electronic device 1000.

[0017] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.

[0018] FIG. 2 is a perspective view that illustrates an example of an electronic device.

[0019] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. A motherboard 1110 is housed inside the smartphone 1100, and various components 1120 are physically and / or electrically connected to the motherboard 1110. In addition, other components such as a camera module 1130 and / or a speaker 1140 that may or may not be physically and / or electrically connected to the motherboard 1110 are housed inside the smartphone 1100. Some of the components 1120 may be the above-mentioned chip-related components, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and / or passive components are surface-mounted. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active components and / or passive components are built-in. Meanwhile, it goes without saying that the electronic device is not necessarily limited to the smartphone 1100, and may be other electronic devices as described above.

[0020] Printed Circuit Board FIG. 3 is a cross-sectional view that illustrates an example of a printed circuit board.

[0021] Referring to the drawing, a printed circuit board 100A according to an example includes an insulating layer 110 and a plurality of wiring layers 120, 130, 140 disposed within the insulating layer 110. The plurality of wiring layers 120, 130, 140 include a first wiring layer 120, a second wiring layer 130 disposed on the first wiring layer 120, and a third wiring layer 140 disposed on the second wiring layer 130. The second wiring layer 130 may include a fine circuit pattern 131, for example, a signal pattern 131, and the first and third wiring layers 120, 140 may include ground patterns 121, 141, respectively.

[0022] Meanwhile, the second wiring layer 130 may include one or more fine circuit patterns 131 having an aspect ratio, which is a ratio of height to line width, of 2.4 to 3.6. For example, the fine circuit pattern 131 may have a line width w of substantially 1 μm, a spacing s between patterns of substantially 1 μm, and a height h of substantially 3 μm, but is not limited thereto. In this case, the signal pattern can be maintained as a fine circuit pattern while increasing the cross-sectional area to reduce signal loss and improve signal characteristics. If the aspect ratio of the fine circuit pattern 131 is less than 2.4, it may not be sufficient to reduce signal loss, and if it exceeds 3.6, the yield may decrease due to process defects, and further, the thickness of the fine circuit layer may become excessively thick, making it difficult to control the overall thickness.

[0023] For example, as shown in Table 1 below, in Experimental Examples 3 to 7 in which the aspect ratio of the fine circuit pattern 131 is 2.4 or more, the signal loss is low at less than about -0.10db, while in Experimental Examples 1 and 2 in which the aspect ratio is less than 2.4, the signal loss is considerable at about -0.10db or more. In addition, in Experimental Examples 1 to 6 in which the aspect ratio is 3.6 or less, the expected yield is excellent at about 0.70 to 0.90, but in Experimental Example 7 in which the aspect ratio is more than 3.6, the expected yield is poor at about 0.30. Meanwhile, the line width, interval, height, etc. of the pattern are measured using a scanning microscope, an electron microscope, and / or an optical microscope based on the polished or cut cross section of the printed circuit board, and when the line width, interval, height, etc. of the pattern are not constant, the values ​​are measured by averaging the values ​​measured at any five points. Copper (Cu) was used as the material of the pattern.

[0024] [Table 1]

[0025] Also, the second wiring layer 130 may be thicker than each of the first and third wiring layers 120 and 140. For example, when the thickness of the first wiring layer 120 is t1 and the thickness of the second wiring layer 130 is t2, t1 and t2 can satisfy (2.1×t1)≦t2≦(3.9×t1) in consideration of a process variance of about ±30%. When the thickness of the third wiring layer 140 is t3, t1 and t3 can satisfy (2.1×t3)≦t2≦(3.9×t3) in consideration of a process variance of about ±30%. In this case, the thickness of the wiring layer including the fine circuit is increased to reduce signal loss, and the overall thickness can be easily controlled. If t2 is less than 2.1 times t1 and / or t3, the thickness of the wiring layer including the fine circuit may not be sufficient to improve the signal characteristics, and if t2 is more than 3.9 times t1 and / or t3, there may be problems with yield due to process defects, etc., and it may be difficult to control the thickness.

[0026] For example, as shown in Table 2 below, it can be seen that Experimental Example 9, which satisfies the above-mentioned conditions, has a superior effect of reducing signal loss compared to Experimental Example 8, which does not. It can also be seen that the expected yield is lower in the case of Experimental Example 10. Meanwhile, the thickness of the wiring layer was measured using a scanning microscope, an electron microscope and / or an optical microscope based on the polished or cut cross section of the printed circuit board, and when the thickness of the wiring layer was not constant, the thickness value of the wiring layer was measured by averaging the values ​​measured at any five points. Copper (Cu) was used as the material for the pattern.

[0027] [Table 2]

[0028] Also, the thickness of the second wiring layer 130 may be greater than the insulation distance between the first and second wiring layers 120, 130 and the insulation distance between the second and third wiring layers 130, 140. For example, when the thickness of the second wiring layer 130 is t2 and the insulation distance between the first and second wiring layers 120, 130 is d1, t2 and d1 can satisfy (1.4×d1)≦t2≦(2.6×d1) in consideration of a process variance of about ±30%. When the insulation distance between the second and third wiring layers 130, 140 is d2, t2 and d2 can satisfy (1.4×d2)≦t2≦(2.6×d2) in consideration of a process variance of about ±30%. In this case, the thickness of the wiring layer including the fine circuit is increased to reduce signal loss and the overall thickness can be easily controlled. If t2 is less than 1.4 times d1 and / or d2, it may not be sufficient to improve the signal characteristics, and if t2 is more than 2.6 times d1 and / or d2, there may be problems with yield due to process defects, etc., and there may be difficulties in controlling the thickness.

[0029] For example, as shown in Table 3 below, it can be seen that experimental example 12, which satisfies the above-mentioned conditions, has a superior effect of reducing signal loss compared to experimental examples 11 and 13, which do not. It can also be seen that the expected yield is lower in the case of experimental example 13. Meanwhile, the thickness of the wiring layer and the insulation distance between the wiring layers were measured using a scanning microscope, an electron microscope and / or an optical microscope based on the polished or cut cross section of the printed circuit board, and when the thickness of the wiring layer was not constant, the thickness of the wiring layer and the insulation distance between the wiring layers were measured by averaging the values ​​measured at any five points. Copper (Cu) was used as the material for the pattern.

[0030] [Table 3]

[0031] Meanwhile, the printed circuit board 100A according to the example may be used independently, or may be attached to or embedded in another substrate.

[0032] The components of the example printed circuit board 100A are described in more detail below with reference to the drawings.

[0033] The insulating layer 110 may include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or a glass fiber (glass fiber, glass cloth, glass fabric) together with a resin. For example, the insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other different polymer materials may be used. The insulating material may also be a photosensitive insulating material such as PID (Photo Imageable Dielectric). The insulating layer 110 may have a multi-layer structure, and there may be no boundaries between layers.

[0034] Each of the first to third wiring layers 120, 130, 140 may include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal material may include copper (Cu), but is not limited thereto. Each of the first to third wiring layers 120, 130, 140 may perform various functions according to the design. For example, the first to third wiring layers 120, 130, 140 may include a signal pattern, a power pattern, a ground pattern, and the like. Each of these patterns may have various forms, such as a line, a plane, and a pad. Each of the first to third wiring layers 120, 130, 140 may include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). Alternatively, the first to third wiring layers 120, 130, 140 may include a metal foil (or copper foil) and an electrolytic plating layer (or electrolytic copper). Alternatively, it may include a metal foil (or copper foil), an electroless plating layer (or chemical copper), and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included as necessary. If necessary, the first to third wiring layers 120, 130, and 140 may be electrically connected to each other through one or more connection vias that each penetrate at least a portion of the insulating layer 110.

[0035] FIG. 4 is a cross-sectional view that illustrates another example of a printed circuit board.

[0036] Referring to the drawings, the printed circuit board 100B according to another example includes a fourth wiring layer 150 in which a plurality of wiring layers 120, 130, 140, 150, 160 are arranged on the third wiring layer 140, and a fifth wiring layer 160 arranged on the fourth wiring layer 150 in the printed circuit board 100A according to the above example. The fourth wiring layer 150 may include a fine circuit pattern 151, for example, a signal pattern 151, and the third and fifth wiring layers 140 and 160 may include ground patterns 141 and 161, respectively.

[0037] Meanwhile, the second and fourth wiring layers 130 and 150 may each include one or more fine circuit patterns 131 and 151 having an aspect ratio, which is the ratio of height to line width, of 2.4 to 3.6. For example, the fine circuit patterns 131 and 151 may each have line widths w1 and w2 of substantially 1 μm, spacings s1 and s2 between patterns of substantially 1 μm, and heights h1 and h2 of substantially 3 μm, but are not limited thereto. In this case, the signal pattern may be maintained as a fine circuit pattern while increasing the cross-sectional area to reduce signal loss, thereby improving signal characteristics, as described above in detail.

[0038] Also, the fourth wiring layer 150 may be thicker than each of the third and fifth wiring layers 140 and 160. For example, when the thickness of the third wiring layer 140 is t3 and the thickness of the fourth wiring layer 150 is t4, t3 and t4 can satisfy (2.1×t3)≦t4≦(3.9×t3) in consideration of a process variance of about ±30%. When the thickness of the fifth wiring layer 160 is t5, t4 and t5 can satisfy (2.1×t5)≦t4≦(3.9×t5) in consideration of a process variance of about ±30%. In this case, the thickness of the wiring layer including the fine circuit is increased to reduce signal loss and the overall thickness can be easily controlled, as described above in detail.

[0039] Also, the thickness of the fourth wiring layer 150 may be greater than the insulation distance between the third and fourth wiring layers 140, 150 and the insulation distance between the fourth and fifth wiring layers 150, 160. For example, when the thickness of the fourth wiring layer 150 is t4 and the insulation distance between the third and fourth wiring layers 140, 150 is d3, t4 and d3 can satisfy (1.4×d3)≦t4≦(2.6×d3) in consideration of a process variance of about ±30%. When the insulation distance between the fourth and fifth wiring layers 150, 160 is d4, t4 and d4 can satisfy (1.4×d4)≦t4≦(2.6×d4) in consideration of a process variance of about ±30%. In this case, the thickness of the wiring layer including the fine circuit is increased to reduce signal loss and the overall thickness can be easily controlled, as described above in detail.

[0040] The components of the printed circuit board 100B according to another example will be described in more detail below with reference to the drawings.

[0041] The fourth and fifth wiring layers 150 and 160 may each include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal material may include copper (Cu), but is not limited thereto. The fourth and fifth wiring layers 150 and 160 may each perform various functions according to the design. For example, the fourth and fifth wiring layers 150 and 160 may include a signal pattern, a power pattern, a ground pattern, and the like. These patterns may each have various forms such as a line, a plane, and a pad. The fourth and fifth wiring layers 150 and 160 may each include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). Alternatively, the fourth and fifth wiring layers 150 and 160 may include a metal foil (or copper foil) and an electrolytic plating layer (or electrolytic copper). Alternatively, the fourth and fifth wiring layers 150 and 160 may include a metal foil (or copper foil), an electroless plating layer (or chemical copper), and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included as necessary. If necessary, the first to fifth wiring layers 120, 130, 140, 150, and 160 may be electrically connected to each other through one or more connection vias that penetrate at least a portion of the insulating layer 110, respectively.

[0042] The other details are substantially the same as those described in the printed circuit board 100A according to the above-mentioned example, and therefore will not be described again.

[0043] FIG. 5 is a cross-sectional view that illustrates a schematic diagram of still another example of a printed circuit board.

[0044] Referring to the drawings, a printed circuit board 200 according to another example includes a core layer 211, first and second core wiring layers 221a and 221b disposed on the upper and lower surfaces of the core layer 211, a through via 231 penetrating the core layer 211 and connecting the first and second core wiring layers 221a and 221b to each other, a plurality of first build-up insulating layers 212 disposed on the upper surface of the core layer 211, a plurality of first build-up wiring layers 222a, 222b, 222c, and 222d disposed on or within the plurality of first build-up insulating layers 212, and at least one of the plurality of first build-up insulating layers 212. The core layer 211 includes a plurality of first built-up via layers 232 each penetrating and connected to at least one of the plurality of first built-up wiring layers 222a, 222b, 222c, and 222d, a plurality of second built-up insulating layers 213 disposed on the lower surface of the core layer 211, a plurality of second built-up wiring layers 223 each disposed on or within the plurality of second built-up insulating layers 213, and a plurality of second built-up via layers 233 each penetrating at least one of the plurality of second built-up insulating layers 213 and each connected to at least one of the plurality of second built-up wiring layers 223. If necessary, the core layer 211 may further include a first resist layer 241 disposed on the plurality of first built-up insulating layers 212 and / or a second resist layer 242 disposed on the plurality of second built-up insulating layers 213.

[0045] Meanwhile, the plurality of first build-up insulating layers 212 may include the insulating layer 110 of the printed circuit board 100A according to the above-mentioned example, or the insulating layer 110 of the printed circuit board 100B according to the above-mentioned other example. Also, the plurality of first build-up wiring layers 222a, 222b, 222c, 222d may include the plurality of wiring layers 120, 130, 140 of the printed circuit board 100A according to the above-mentioned example, or the plurality of wiring layers 120, 130, 140, 150, 160 of the printed circuit board 100B according to the above-mentioned other example. For example, the printed circuit board 200 according to the further example may have a first region R1 and / or a second region R2 to which the printed circuit board 100A according to the above-mentioned example or the printed circuit board 100B according to the other example may be applied. For example, the printed circuit board 200 according to the further example may be a package substrate, and may have the above-mentioned fine circuit layer in the first region R1 and / or the second region R2.

[0046] Meanwhile, if necessary, the printed circuit board 100A according to the above-mentioned example or the printed circuit board 100B according to the above-mentioned other example may be embedded in the printed circuit board 200 according to the other example in the form of a separate microcircuit board in the first region R1 and / or the second region R2. For example, after forming cavities in the plurality of first build-up insulating layers 212 of the printed circuit board 200 according to the other example, the printed circuit board 100A according to the above-mentioned example or the printed circuit board 100B according to the above-mentioned other example may be inserted and embedded. For example, the printed circuit board 100A according to the above-mentioned example or the printed circuit board 100B according to the above-mentioned other example may function as an organic bridge for interconnection.

[0047] The components of yet another example of the printed circuit board 200 will now be described in more detail with reference to the drawings.

[0048] The core layer 211 may include an insulating material. The insulating material may be, but is not limited to, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, a material in which these insulating resins are mixed with an inorganic filler such as silica, or a resin impregnated into a core material such as glass fiber (glass fiber, glass cloth, glass fabric) together with an inorganic filler, for example, an insulating material such as CCL (Copper Clad Laminate). The core layer 211 may be thicker than each of the first and second build-up insulating layers 212 and 213, but is not limited to this.

[0049] Each of the first and second build-up insulating layers 212, 213 may include an insulating material. The insulating material may be, but is not limited to, a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or a material in which these insulating resins are mixed with an inorganic filler such as silica, or a resin impregnated into a core material such as glass fiber together with an inorganic filler, for example, an insulating material such as ABF (Ajinomoto Build-up Film), prepreg, RCC (Resin Coated Copper), or PID (Photo Imageable Dielectric). The number of layers of the first and second build-up insulating layers 212, 213 may be the same, but is not limited to this.

[0050] The first and second core wiring layers 221a and 221b may each include a metal. The metal may be copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. The first and second core wiring layers 221a and 221b may each include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper), but is not limited thereto. A sputtering layer may be formed instead of the electroless plating layer, or both may be included. In addition, a copper foil may be further included. The first and second core wiring layers 221a and 221b may each perform various functions according to the design of the layer. For example, they may include a ground pattern, a power pattern, a signal pattern, etc. Each of these patterns may include a line pattern, a plane pattern, and / or a pad pattern.

[0051] The first and second build-up wiring layers 222a, 222b, 222c, 222d, and 223 may each include a metal. The metal may be copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. The first and second build-up wiring layers 222a, 222b, 222c, 222d, and 223 may each include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper), but are not limited thereto. A sputtering layer may be formed instead of the electroless plating layer, or both may be included. In addition, a copper foil may be further included. The first and second build-up wiring layers 222a, 222b, 222c, 222d, and 223 may each perform various functions according to the design of the corresponding layer. For example, it may include a ground pattern, a power pattern, a signal pattern, etc. Each of these patterns may include a line pattern, a plane pattern, and / or a pad pattern.

[0052] The through via 231 may include a metal layer formed on the wall of the through hole and a plug filling the metal layer. The metal layer may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. The plug may include an ink of an insulating material. The metal layer may include, but is not limited to, an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be formed instead of the electroless plating layer, or both may be included. The through via 231 may perform various functions according to the design. For example, it may include a ground via, a power via, a signal via, etc.

[0053] The first and second build-up via layers 232 and 233 may include microvias. The microvias may be filled vias that fill a via hole, or may be conformal vias that are arranged along the wall surface of a via hole. The microvias may be arranged in a stacked type and / or staggered type. The first and second build-up via layers 232 and 233 may each include a metal, and the metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. The first and second build-up via layers 232 and 233 may each include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper), but is not limited thereto. A sputtering layer may be formed instead of the electroless plating layer, or both may be included. The first and second build-up via layers 232, 233 can perform various functions depending on the design of the layers, such as ground vias, power vias, signal vias, and the like.

[0054] The first and second resist layers 241, 242 may include, but are not limited to, a liquid or film type solder resist, and other types of insulating materials may be used. The first resist layer 241 may have an opening that exposes at least a portion of the uppermost first build-up wiring layer 222d. The second resist layer 242 may have an opening that exposes at least a portion of the lowermost second build-up wiring layer 223.

[0055] The other contents are substantially the same as those described in the printed circuit boards 100A and 100B according to the above-mentioned one example and another example, so that a duplicated description will be omitted.

[0056] FIG. 6 is a cross-sectional view that illustrates an image of a wiring layer including a fine circuit.

[0057] Referring to the drawings, the fine circuit according to the present invention may have a line / space of about 1 μm / 1 μm and a thickness or height of about 3 μm. For example, the aspect ratio may be about 3. In this case, the cross-sectional area can be increased despite the fine circuit, thereby reducing signal loss and providing excellent signal characteristics. Meanwhile, a cross-sectional image of the wiring layer can be obtained using a known scanning microscope, electron microscope and / or optical microscope.

[0058] In the present invention, the term "substantially" can be used to include process errors, positional deviations, measurement errors, etc. that occur during the manufacturing process. For example, when a line width, interval, thickness, height, etc., has a specific value, it includes not only the case where the line width, interval, thickness, height, etc. has the specific value, but also the case where the line width, interval, thickness, height, etc. has a similar value.

[0059] In the present invention, the same insulating material may mean not only completely the same insulating material but also the same type of insulating material. Therefore, although the compositions of the insulating materials are substantially the same, the specific composition ratios thereof may differ slightly.

[0060] In the present invention, the term "cross section" may refer to the cross-sectional shape of an object cut vertically or the cross-sectional shape of an object when viewed from the side, and the term "plane" may refer to the planar shape of an object cut horizontally or the planar shape of an object when viewed from the top or bottom.

[0061] In the present invention, for convenience, terms such as "lower side, lower part, lower surface" are used to mean a downward direction based on a cross section of a drawing, and terms such as "upper side, upper part, upper surface" are used to mean the opposite direction. However, these are merely definitions of directions for convenience of explanation, and the scope of the claims is not particularly limited by such directional descriptions, and the concepts of up / down can be changed at any time.

[0062] In the present invention, "connected" is a concept including not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept including both physical connection and no connection. Furthermore, expressions such as "first, second" are used to distinguish one component from another component, and do not limit the order and / or importance of the components. In some cases, the first component may be named the second component, and similarly, the second component may be named the first component, within the scope of the right.

[0063] The term "one example" used in the present invention does not mean the same embodiment, but is provided to emphasize and describe unique features that are different from each other. However, the above-mentioned one example does not exclude that it is realized in combination with the features of another example. For example, even if the matter described in a specific example is not described in another example, it can be understood as a description related to the other example, unless there is a description in the other example that is opposite or contradictory to the matter.

[0064] The terms used in the present invention are merely used to describe an example and are not intended to limit the present invention. In this case, a singular expression includes a plural expression unless the context clearly indicates otherwise. [Explanation of symbols]

[0065] 1000:Electronic equipment 1010: Main board 1020: Chip related parts 1030: Network related parts 1040:Other parts 1050: Camera 1060:Antenna 1070:Display 1080: Battery 1090: Signal line 1100: Smartphone 1110: Motherboard 1120: Parts 1121: Parts package 1130: Camera module 1140: Speaker 100A, 100B, 200: Printed circuit boards 110: Insulating layer 120, 130, 140, 150, 160: Wiring layer 121, 141, 161: Ground pattern 131, 151: Signal pattern (fine circuit pattern) 211: Core layer 212, 213: Build-up insulating layer 221a, 221b: core wiring layer 222a, 222b, 222c, 222d, 223: build-up wiring layers 231:Through via 232, 233: build-up via layer 241, 242: resist layer

Claims

1. An insulating layer; a plurality of wiring layers disposed within the insulating layer; the plurality of wiring layers include a first wiring layer, a second wiring layer disposed on the first wiring layer, and a third wiring layer disposed on the second wiring layer; the second wiring layer is thicker than the first wiring layer and the third wiring layer, The second wiring layer includes at least one fine circuit pattern having an aspect ratio, which is the ratio of height to line width, of 2.4 to 3.

6.

2. the first wiring layer and the third wiring layer each include a ground pattern; The printed circuit board according to claim 1 , wherein the fine circuit pattern of the second wiring layer is a signal pattern.

3. 2. The printed circuit board according to claim 1, wherein the fine circuit pattern of the second wiring layer has a line width of substantially 1 μm, a spacing between patterns of substantially 1 μm, and a height of substantially 3 μm.

4. 2. The printed circuit board according to claim 1, wherein t1 is a thickness of the first wiring layer and t2 is a thickness of the second wiring layer, and t1 and t2 satisfy (2.1 x t1) ≤ t2 ≤ (3.9 x t1).

5. 5. The printed circuit board according to claim 4, wherein t1 is a thickness of the first wiring layer and t3 is a thickness of the third wiring layer, and t1 and t3 satisfy (2.1 x t3) ≤ t2 ≤ (3.9 x t3).

6. 2 . The printed circuit board according to claim 1 , wherein a thickness of the second wiring layer is greater than an insulation distance between the first wiring layer and the second wiring layer and an insulation distance between the second wiring layer and the third wiring layer.

7. 7. The printed circuit board according to claim 6, wherein when a thickness of the second wiring layer is t2 and an insulation distance between the first wiring layer and the second wiring layer is d1, the t2 and d1 satisfy (1.4×d1)≦t2≦(2.6×d1).

8. 8. The printed circuit board according to claim 7, wherein when a thickness of the second wiring layer is t2 and an insulation distance between the second wiring layer and the third wiring layer is d2, the t2 and d2 satisfy (1.4×d2)≦t2≦(2.6×d2).

9. the plurality of wiring layers further includes a fourth wiring layer disposed on the third wiring layer, and a fifth wiring layer disposed on the fourth wiring layer; The printed circuit board according to claim 1 , wherein the fourth wiring layer is thicker than each of the third wiring layer and the fifth wiring layer.

10. 10. The printed circuit board according to claim 9, wherein a thickness of the fourth wiring layer is greater than an insulation distance between the third wiring layer and the fourth wiring layer and an insulation distance between the fourth wiring layer and the fifth wiring layer.

11. The printed circuit board includes a plurality of build-up insulating layers, a plurality of build-up wiring layers, and a plurality of build-up via layers; the plurality of build-up insulating layers includes the insulating layer, The printed circuit board according to claim 1 , wherein the plurality of build-up wiring layers includes the plurality of wiring layers.

12. An insulating layer; a plurality of wiring layers disposed within the insulating layer; the plurality of wiring layers include a first wiring layer, a second wiring layer disposed on the first wiring layer, and a third wiring layer disposed on the second wiring layer; the second wiring layer is thicker than the first wiring layer and the third wiring layer, a thickness of the second wiring layer is greater than an insulation distance between the first wiring layer and the second wiring layer and an insulation distance between the second wiring layer and the third wiring layer; A printed circuit board, wherein t2, d1, and d2 satisfy (1.4×d1)≦t2≦(2.6×d1) and (1.4×d2)≦t2≦(2.6×d2), where t2 is a thickness of the second wiring layer, d1 is an insulation distance between the first wiring layer and the second wiring layer, and d2 is an insulation distance between the second wiring layer and the third wiring layer.

13. 13. The printed circuit board according to claim 12, wherein when the thicknesses of the first wiring layer and the third wiring layer are t1 and t3, respectively, the thicknesses t1, t2, and t3 satisfy (2.1×t1)≦t2≦(3.9×t1) and (2.1×t3)≦t2≦(3.9×t3).

14. each of the first wiring layer and the third wiring layer includes one or more ground patterns; The printed circuit board according to claim 12 , wherein the second wiring layer includes one or more signal patterns.

15. 15. The printed circuit board of claim 14, wherein the signal traces have a line width of substantially 1 μm, spacing between traces of substantially 1 μm, and a height of substantially 3 μm.

Images