Plasma processing apparatus

The plasma processing apparatus addresses high manufacturing costs and complex wiring by using a sample stage with film-like heaters connected in sets and shared return paths, reducing wire count and enhancing assembly efficiency while maintaining effective temperature control.

JP2025010796AActive Publication Date: 2025-01-23HITACHI HIGH TECH CORP
View PDF 6 Cites 0 Cited by

Patent Information

Application Number
JP2023113012
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-07-10
Publication Date
2025-01-23
Estimated Expiration
2043-07-10

AI Technical Summary

Technical Problem

Existing plasma processing apparatuses face challenges with high manufacturing costs and complex wiring due to the need for multiple wires per heater, especially when numerous heaters are required, making assembly difficult.

Method used

A plasma processing apparatus with a sample stage design that includes a dielectric film covering film-like heaters arranged in multiple regions, where four adjacent heaters form a set connected to a single power supply point, and a shared return path to reduce wiring complexity and cost.

Benefits of technology

This configuration reduces the cost of the electrode system and improves manufacturing workability by minimizing the number of wires and cables, allowing for efficient temperature control of the wafer during processing.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025010796000001_ABST
    Figure 2025010796000001_ABST
Patent Text Reader

Abstract

To provide a plasma processing apparatus capable of improving a low cost of an electrode system, and a manufacturing operability.SOLUTION: One of plasma processing apparatuses of the present invention, comprises:a first heater layer having a plurality of film-like heaters arranged to a plurality of different regions; and a plurality of heater power supplies that supplies a DC power to each of the plurality of film-like heaters. A collector comprises: four power supply paths that are electrically connected to one place of the plurality of film-like heaters and is for supplying a power from the DC power supply; and a return path that be feedbacked to the plurality of heater power supplies from each of the plurality of film-like heaters by using the adjacent four film-like heaters from the plurality of film-like heaters as one collection. The feedback path comprises: a part that is electrically connected to another place of each of the film-like heaters and a base material; and a part that is electrically connected to a common terminal that is electrically connected to the base material and one terminal of the plurality of heater power supplies.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to a plasma processing apparatus. [Background technology]

[0002] In a plasma processing apparatus, a so-called multilayer film etching process is performed in which a plurality of films are formed on the surface of a plate-like sample such as a semiconductor wafer (hereinafter, simply referred to as a wafer).In order to shorten the etching process time for such a multilayer film, films stacked adjacent to each other vertically are successively processed in the same processing chamber without removing the wafer from the processing chamber between each process.

[0003] In such processes, it is important to adjust the temperature of the sample stage placed in the processing chamber to an appropriate temperature for processing the wafer. For this reason, a heater is built into the sample stage of the plasma processing device, and when processing the wafer, the temperature is adjusted to an appropriate temperature for each process, thereby improving the processing accuracy.

[0004] One example of such a plasma processing apparatus is disclosed in Patent Document 1. Patent Document 1 discloses that a ceramic film 21 is formed on a substrate of an electrostatic chucking device by a thermal spraying method, electrode films 33, 34 for electrostatic chucking are formed on the surface of the ceramic film by a thermal spraying method, and a ring-shaped heater film 22 is formed between the electrode films 34 in the radial direction by a thermal spraying method, and the ceramic film 21 is formed on the upper surfaces of the ceramic film 21, the electrode films 33, 34, and the heater film 22 by a thermal spraying method. Patent Document 1 discloses a plasma processing apparatus in which a refrigerant flows through a refrigerant passage arranged in multiple concentric rows inside a metal disc or cylindrical substrate constituting a sample stage arranged in a processing chamber inside a vacuum vessel, and a ring-shaped heater film is formed by thermal spraying on the top of the metal disc or cylindrical substrate, and the temperature distribution in the wafer surface can be changed for each etching condition.

[0005] Another known example is disclosed in Patent Document 2. Patent Document 2 discloses a plasma processing apparatus having multiple heater regions, with power being supplied to each heater region by two or more power supply lines and two or more power return lines, with each power supply line connected to at least two of the heater regions, and each power return line connected to at least two of the heater regions. The technology of Patent Document 2 allows semiconductor wafers to be processed while controlling the temperature of the semiconductor wafers by independently supplying time-averaged power to each heater region through time-division multiplexing of multiple switches. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2007-67036 A [Patent Document 2] JP 2014-112672 A Summary of the Invention [Problem to be solved by the invention]

[0007] In the prior art (Patent Document 2), time-division control has been used to reduce the wiring required for heaters in the electrode. However, the technology of Patent Document 2 requires the implementation of diodes in the electrode, which tends to increase costs because the implementation of diodes in the electrode is complicated and difficult to manufacture. On the other hand, if a multi-zone electrode in which many heaters are arranged is adopted without providing diodes in the electrode, each heater in the electrode requires a total of two wires, one for power supply and one for current return, and twice the number of wires as the number of heaters. Therefore, if 100 or more heaters are required, a total of 200 wires are required, making it difficult to implement them in the electrode. SUMMARY OF THE PRESENT INVETION The present invention has been made in consideration of the above problems, and an object of the present invention is to provide a plasma processing apparatus which reduces the cost of an electrode system and improves the ease of manufacture. [Means for solving the problem]

[0008] In order to solve the above problems, one representative plasma processing apparatus of the present invention comprises a processing chamber arranged inside a vacuum vessel, inside which a wafer to be processed is placed to generate plasma, a sample stage arranged inside the processing chamber and on whose upper surface the wafer is placed, a first heater layer arranged inside the sample stage, inside a dielectric film covering the upper surface of a substrate made of a conductive material, and having a plurality of film-shaped heaters arranged in a plurality of different regions when viewed from above, and a plurality of heater power supplies electrically connected to each of the plurality of film-shaped heaters and supplying DC power, wherein four adjacent film-shaped heaters among the plurality of film-shaped heaters are regarded as one group, and the group comprises four power supply paths electrically connected to one location of each of the plurality of film-shaped heaters and supplying power from a DC power supply, and a return path returning from each of the film-shaped heaters to the plurality of heater power supplies, and the return path comprises a portion electrically connected to another location of each of the film-shaped heaters and the substrate, and a portion electrically connected to a common terminal electrically connected to the substrate and one terminal of each of the plurality of heater power supplies. Effect of the Invention

[0009] According to the present invention, it is possible to provide a plasma processing apparatus which reduces the cost of the electrode system and improves the manufacturing workability. Problems, configurations and effects other than those described above will become apparent from the description of the following embodiments. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a cross-sectional view that illustrates a schematic configuration of a plasma processing apparatus according to an embodiment. [Diagram 2] FIG. 2 is a cross-sectional view that diagrammatically shows a part of the configuration of the sample stage. [Diagram 3] FIG. 3 is an enlarged schematic cross-sectional view of a portion of the configuration of the sample stage. [Figure 4] FIG. 4 is a schematic diagram of the connection path between the heater in the sample stage and the heater power supply. [Diagram 5] FIG. 5 is a diagram showing an example of a heater in the sample stage. [Figure 6] FIG. 6 is a diagram showing an example of a configuration of a heater. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The present invention will be described with reference to the drawings. Note that the present invention is not limited to the embodiments. In the drawings, the same parts are denoted by the same reference numerals. In the following description, "upper" means the vertically upward direction when a plate-like member or layer is placed horizontally. "Lower" means the opposite direction to "upper". Note that the surface of a plate-like member that is on the upper side may be referred to as the "upper surface", and the surface that is on the opposite side to the upper surface may be referred to as the "lower surface".

[0012] Hereinafter, an embodiment will be described with reference to the drawings. Fig. 1 is a cross-sectional view showing a schematic configuration of a plasma processing apparatus according to the embodiment. In particular, Fig. 1 shows a plasma etching apparatus that uses a microwave electric field as an electric field for forming plasma, generates ECR (Electron Cyclotron Resonance) between the microwave electric field and magnetic field to form plasma, and uses the plasma to etch a substrate-like sample such as a semiconductor wafer.

[0013] (Configuration of Plasma Processing Apparatus) A plasma etching apparatus (plasma processing apparatus) 100 shown in Fig. 1 will be described. The plasma etching apparatus 100 includes a processing chamber 104 arranged inside a vacuum vessel 101, in which a wafer 109 to be processed is arranged inside to generate plasma, a sample stage 120 arranged inside the processing chamber 104 and on whose upper surface the wafer is placed, a first heater layer 212 arranged inside the sample stage 120 and inside a dielectric film covering the upper surface of a base material made of a conductive material, the first heater layer 212 including a plurality of film-like heaters 202 arranged in a plurality of different regions as viewed from above, and a plurality of heater power sources (heater power sources (DC power sources) 307) electrically connected to each of the plurality of film-like heaters 202 to supply DC power. A specific description will be given below.

[0014] The plasma etching apparatus 100 has a vacuum vessel 101 equipped with an internal processing chamber 104 in which plasma is generated. The vacuum vessel 101 has a cylindrical shape with an open upper portion, and a dielectric window 103 (e.g., made of quartz) for introducing microwaves is disposed on the upper portion as a lid member, forming the processing chamber 104 in which the inside and outside are airtightly separated.

[0015] Furthermore, the vacuum vessel 101 has a vacuum exhaust port 110 disposed at the bottom, which is connected to a vacuum exhaust device (not shown) disposed below and connected to the vacuum vessel 101. Furthermore, a shower plate 102 forming the ceiling surface of a processing chamber 104 is provided below the lower surface of a dielectric window 103 forming a cover member at the top of the vacuum vessel 101. The shower plate 102 has a plurality of gas introduction holes 102a disposed in the center, and etching gas is introduced into the processing chamber 104 through the plurality of gas introduction holes 102a. The shower plate 102 is a circular plate made of a dielectric material such as quartz.

[0016] An electric field and magnetic field generating unit 160 for generating an electric field and a magnetic field for generating plasma 116 is disposed at an upper portion outside vacuum vessel 101. Electric field and magnetic field generating unit 160 is provided in plasma etching apparatus 100 and includes the following configuration. That is, electric field and magnetic field generating unit 160 includes a waveguide 105 disposed above dielectric window 103 and through which an electric field is transmitted to supply a high frequency electric field of a predetermined frequency for generating plasma 116 to processing chamber 104. Furthermore, the electric field transmitted through the inside of waveguide 105 is generated by oscillation in electric field generating power supply 106. The frequency of the electric field is not particularly limited, but in this embodiment, a microwave of 2.45 GHz is used.

[0017] Moreover, the upper part of the dielectric window 103 of the processing chamber 104, the side wall of the vacuum vessel 101 constituting the cylindrical part of the processing chamber 104, and the outer periphery of the lower end of the waveguide 105 are arranged so as to be surrounded by a magnetic field generating coil 107 which generates a magnetic field. Then, the electric field of the microwave generated by the electric field generating power source 106 propagates inside the waveguide 105, passes through the dielectric window 103 and the shower plate 102, and is supplied to the processing chamber 104 from above. Furthermore, ECR is generated by the interaction between the magnetic field generated by the magnetic field generating coil 107 and supplied into the processing chamber 104 and the electric field of the microwave. Then, the atoms or molecules of the processing gas introduced into the processing chamber 104 through the gas introduction hole 102a of the shower plate 102 are excited and dissociated, thereby generating high-density plasma 116 in the processing chamber 104.

[0018] A sample stage 120 is provided at the bottom of the processing chamber 104 and below the space where the plasma 116 is formed. The sample stage 120 has a mounting surface 120a on which a semiconductor wafer (hereinafter, simply referred to as a wafer) 109, which is a sample (processing target), is mounted. The sample stage 120 is arranged so that the mounting surface 120a faces the shower plate 102 or the dielectric window 103. The mounting surface 120a of the sample stage 120 is formed of a dielectric film 140 that covers the sample stage 120, as shown in FIG. 1. Inside the dielectric film 140, a plurality of conductor films 111 for electrostatic attraction are arranged, which are connected to a DC power source 126 via a high-frequency filter 125 shown in FIG. 1. Here, the conductor film 111 has a film-shaped electrostatic attraction electrode inside, and DC power for attracting the semiconductor wafer by static electricity is supplied. In this case, the conductive film 111 may be bipolar, in which one of the multiple film-like electrodes is given a different polarity from the other, or may be unipolar, in which the same polarity is given, but in this embodiment, it is shown as unipolar. The conductive film 111 will be described in detail later.

[0019] The high frequency power supply 124 and the matching box 129 are connected to a conductive circular or cylindrical substrate 108 arranged inside the sample stage 120. The high frequency power supply 124 is connected to the ground 112. High frequency power of a predetermined frequency is supplied from the high frequency power supply 124 to the substrate 108, and a bias potential is formed above the wafer 109 attracted and held on the mounting surface 120a of the sample stage 120 during processing of the wafer 109. In other words, it is also possible that the sample stage 120 has a wafer mounting electrode (electrode) 120 to which high frequency power is supplied from the high frequency power supply 124 while the plasma 116 is being generated.

[0020] Inside the base material 108, in order to remove the transferred heat and cool the sample stage 120, multiple coolant channels 152 are arranged in a spiral or concentric manner around the central axis in the vertical direction of the base material 108 or the sample stage 120. A cooling coolant for cooling the base material 108 flows through the coolant channels 152.

[0021] 1, the sample stage 120 has a convex shape in cross section, and a concave portion 120d is formed at the top of the convex shape, which has a surface parallel to the mounting surface 120a and has a shape surrounding the outer periphery of the mounting surface 120a in plan view. The susceptor ring 113 is a ring-shaped member made of a dielectric material such as quartz or ceramics such as alumina. The susceptor ring 113 has a shape that surrounds the convex sample stage 120, that is, that contacts the outer periphery of the sample stage 120 and the concave portion 120d. The upper surface of the susceptor ring 113 has a dimension that is positioned above the mounting surface 120a of the sample stage 120. It is also possible that the susceptor ring 113 is disposed on the outer periphery of the mounting surface 120a of the sample stage 120 and covers the surface of the sample stage 120. Specifically, the susceptor ring 113 is configured to cover the recess 120d, the side wall surface of the sample stage 120 connecting the mounting surface 120a and the recess 120d, and the cylindrical side wall surface of the sample stage 120 below the recess 120d.

[0022] (Plasma treatment procedure) In such a plasma processing apparatus 100, in a vacuum transfer chamber that is depressurized to the same pressure as that of a processing chamber 104 inside a vacuum transfer vessel that is another vacuum vessel connected to the side wall of the vacuum vessel 101, an unprocessed wafer 109 is placed on the arm tip of a robot for transferring a wafer, which is disposed in the vacuum transfer chamber. Then, a gate, which is a passage that communicates between the vacuum transfer chamber and the processing chamber 104, is opened by the operation of a valve disposed in the vacuum transfer chamber, and the unprocessed wafer 109 is transferred into the processing chamber 104 while being placed on the arm tip of the robot. Furthermore, the wafer 109 transferred to above the mounting surface 120a of the sample stage 120 in the processing chamber 104 is transferred onto the lift pins by the vertical movement of the lift pins, and is then placed on the mounting surface 120a, and is then attracted to and held on the mounting surface 120a of the sample stage 120 by an electrostatic force formed by DC power applied from a DC power source 126.

[0023] With the wafer 109 placed on the sample stage 120, the etching gas has its flow rate or speed adjusted by a mass flow controller (not shown) and is introduced into the space between the dielectric window 103 and the quartz shower plate 102, and after being diffused in this space, is introduced into the processing chamber 104 through the gas inlet hole 102a of the shower plate 102. Thereafter, the gas and particles in the processing chamber 104 are exhausted through the vacuum exhaust port 110 by the operation of the vacuum exhaust device. Depending on the balance between the amount of gas supplied from the gas inlet hole 102a of the shower plate 102 and the amount of gas exhausted from the vacuum exhaust port 110, the pressure in the processing chamber 104 is adjusted to a predetermined value within a range suitable for processing the wafer 109.

[0024] A gap is provided between the wafer 109 and the dielectric film 140, which is the mounting surface 120a of the sample stage 120. A thermally conductive gas such as He (helium) is supplied to this gap from an opening (not shown) on the upper surface of the dielectric film 140 while the wafer 109 is being attracted and held, thereby promoting heat transfer between the wafer 109 and the sample stage 120. It is also possible to adjust the temperatures of the sample stage 120 and the substrate 108 in advance before the wafer 109 is mounted by circulating a coolant whose temperature is adjusted to a predetermined range through a coolant flow passage 152 arranged in the substrate 108 of the sample stage 120 before the wafer 109 is mounted. In this way, by heat transfer between the wafer 109 and the sample stage 120 or the substrate 108, which has a large heat capacity, the temperature of the wafer 109 is adjusted to be close to these temperatures before the plasma processing is performed, and even after the start of the plasma processing, the heat generated from the wafer 109 is dissipated to adjust the temperature of the wafer 109.

[0025] With the temperature of the wafer 109 set to a predetermined range, an electric field and a magnetic field of microwaves are supplied into the processing chamber 104, and plasma 116 is generated from the processing gas. When the plasma 116 is formed, radio frequency (RF) bias power is supplied from the radio frequency power supply 124 to the substrate 108, and charged particles such as ions in the plasma 116 are attracted to the upper surface of the wafer 109 according to the potential difference between the bias potential applied to the wafer 109 and the potential of the plasma 116. Furthermore, the charged particles collide with, for example, a mask arranged in advance on the upper surface of the wafer 109 and the surface of the film layer to be processed of a film structure including the film layer to be processed, thereby performing an etching process. During the etching process, the processing gas introduced into the processing chamber 104 and particles of reaction products generated during the process are exhausted from the vacuum exhaust port 110.

[0026] In the plasma etching apparatus 100, during plasma processing, high-frequency power is supplied from the high-frequency power source 127 to a conductor ring 131 arranged on the upper part of the outer periphery of the sample stage 120 via a power supply connector 161 provided on the sample stage 120 and having an elastic conductive member.

[0027] In the sample stage 120, the high frequency power generated from the high frequency power source 127 is introduced into a conductor ring 131 made of a conductor arranged in the susceptor ring 113 via a load matching box 128 and a load impedance variable box 130. With this configuration, the impedance value for the high frequency power from the high frequency power source 127 through the substrate 108 to the outer periphery of the wafer 109 is relatively low by a combination of the load impedance variable box 130 adjusted to a suitable impedance value and a relatively high impedance portion arranged on the upper part of the susceptor ring 113. This makes it possible to effectively supply high frequency power to the outer periphery and outer periphery of the wafer 109, to reduce the concentration of the electric field at the outer periphery or outer periphery, and to attract charged particles such as ions in the plasma to the upper surface of the wafer 109 in a desired direction. The high frequency power source 127 is connected to the ground 112. The frequency of the high frequency power source 127 in this embodiment is preferably set to the same value as that of the high frequency power source 124 or a constant multiple value.

[0028] (Configuration of sample stage) Next, the configuration of the sample stage 120 according to the present embodiment will be described in detail with reference to FIGS. 1, 2, and 3. FIG. 2 is a cross-sectional view that shows a schematic view of a part of the configuration of the sample stage. FIG. 3 is a cross-sectional view that shows a schematic view of an enlarged part of the configuration of the sample stage. FIG. 3 particularly shows an enlarged view of the end of the sample stage 120, and also shows a power source for supplying power to the electrode members included in the sample stage 120. The dielectric film 140 in FIG. 1 corresponds to the dielectric films 201, 203, 205, and 207 in FIGS. 2 and 3. The conductive film 111 in FIG. 1 corresponds to the heater 202, the shield film 204, and the electrode film 206 in FIGS. 2 and 3.

[0029] As shown in FIG. 2, the substrate 108 is disposed inside the sample stage 120 and has a disk or cylinder shape. The substrate 108 is made of a metal material such as titanium, aluminum, or a compound thereof. The substrate 108 is electrically connected to the ground 114 and is conductively connected to the wall surface of the vacuum vessel 101 shown in FIG. 1 and fixed to the ground potential. The substrate 108 has a convex shape in a cross-sectional view. The substrate 108 is divided into a convex portion Tp, which is a portion located below the mounting surface 120a of the wafer 109 and has a surface parallel to the mounting surface 120a, and a concave portion Rp, which is a portion of the substrate 108 excluding the convex portion Tp and has a diameter larger than that of the convex portion Tp when viewed from above. The side wall portion covering the outer periphery of the convex portion Tp is called a step portion Dp. The step portion of the convex shape of the base material 108, in other words, the portion excluding the convex portion Tp from the concave portion Op when viewed from above, forms the concave portion 120d of the sample stage 120, and the shape of this portion is adapted to fit the shape of the susceptor ring 113 as described above. In other words, the susceptor ring 113 is arranged so as to be placed on the step portion Dp of the convex shape of the base material 108.

[0030] A dielectric film 201 made of a dielectric material such as ceramics is disposed on the flat upper surface of the protruding portion Tp of the base material 108. Furthermore, on the upper layer of this dielectric film 201, a plurality of film-shaped heaters 2021-2022 are film-shaped electrodes made of a conductive material and generate heat when DC power is supplied. N (N is a positive integer) are arranged to cover a plurality of regions on the upper surface of the base material 108. That is, a dielectric film 201 is arranged on the upper surface of the base material 108, and film-like heaters 2021-202 are arranged on the upper layer of the dielectric film 201. N In the following description, the heaters 2021 to 2022 are formed as the heater layer 212. N When there is no need to specify which heater is which, it is simply referred to as "heater 202."

[0031] The heater 202 is further covered with an upper dielectric film 203, and is surrounded by a dielectric member (dielectric film 203). In other words, the heater 202 surrounded by the dielectric films 201 and 203 is disposed on the upper surface of the base material .

[0032] 3, the heater 202 is connected to a heater power supply 307 via a power supply cable (power supply line, power supply path) 308, and configured so that DC power can be supplied from the heater power supply 307. That is, the power supply cable 308 is a cable that electrically connects the heater 202 to a heater power supply 307 that supplies DC power to the heater 202. However, the power supply cable 308 does not include a filter for high frequency power. Thus, the inside of the dielectric film 201 arranged on the upper surface of the sample stage 120 in this embodiment is configured to have a plurality of heaters 202 that can adjust the amount of heat generated and therefore the temperature of the upper surface of the dielectric film 201 for each region (zone). The heater power supply 307 is communicably connected to a controller 309 via a signal cable. The operation of the heater power supply 307 is adjusted in response to a command signal from the controller 309.

[0033] As described above, in the sample stage 120 of this embodiment, the heater 202 surrounded by the dielectric films 201 and 203 is disposed on the upper surface of the substrate 108. Furthermore, the shielding film 204, which is a film-like conductive member disposed around the upper surface and outer periphery of the dielectric film 203, is provided, and the heater 202 is surrounded (covered) by the shielding film 204. In other words, the structure in which the heater 202 is surrounded by the shielding film 204 is encapsulated by the dielectric material constituting a part of the dielectric films 201 and 203. The shielding film 204 is formed so as to contact the step portion Dp of the substrate 108 as shown in FIG. 2 and FIG. 3, and is electrically connected to the substrate 108. As a result, the shielding film 204 is fixed to the ground potential S, the same as the substrate 108, and as a result, the inflow of high frequency waves into the heater 202 can be suppressed. The ground potential S may be the same as the ground 112 in FIG. 1, or may be formed by an earth provided separately from the ground 112.

[0034] Furthermore, a dielectric film 205 is disposed on the upper surface of the shielding film 204, and an electrode film 206 is disposed on the upper portion of this dielectric material member, which is an electrode for electrostatic attraction and an electrode to which high frequency power for forming a high frequency bias is supplied. In other words, the electrode film 206 is a film made of a conductive material, and is electrically connected to a high frequency bias power supply 306 that supplies high frequency power of a predetermined frequency. The electrode film 206 is also electrically connected to a DC power supply 305, and by applying a DC voltage, the wafer 109 placed on the mounting surface 120a of the sample stage 120 can be attracted by static electricity.

[0035] Further, on the upper surface of the electrode film 206, a dielectric film (electrostatic adsorption member) 207 made of a ceramic material constituting the uppermost surface of the sample stage 120 and the mounting surface 120a on which the wafer 109 is mounted is disposed so as to cover the upper surface of the protrusion Tp, the step portion Dp which is the side wall of the protrusion Tp, and the upper surface of the recess Op. That is, on the uppermost surface of the sample stage 120, a dielectric film 207 is disposed on the shielding film 204 and includes an electrode film 206 which adsorbs the wafer 109 by electrostatic force.

[0036] Also, inside the sample stage 120, there are arranged an electrostatic adsorption power supply hole 301, inside which a power supply cable and connector for applying power to the electrode film 206 are arranged, and a heater power supply hole 302, inside which a power supply cable and connector for supplying power to the heater 202 are arranged.

[0037] Of these holes, insulating bosses 303, 304, which are cylindrical members made of a dielectric material or an insulating material, are formed on the wall surfaces of the portions that penetrate into the substrate 108. These insulating bosses 303, 304 can suppress the occurrence of discharge in the space inside the holes that is exposed to an electric field due to high frequency power during processing of the wafer 109. The insulating bosses 303, 304 can be made of ceramic materials such as alumina and yttria, and resin materials.

[0038] (Heater connection path) 4 is a schematic diagram of a connection path between the heater 202 in the sample stage 120 and the heater power supply 307. The dielectric film 201 has a via 401 that penetrates between the lower surface of the heater 202 and the upper surface of the substrate 108. That is, the heater 202 and the substrate 108 are electrically connected by the via wiring. The substrate 108 is then connected by a common cable 402 to a terminal block 403 mounted on the wall surface of the housing of the heater power supply 307.

[0039] As will be described later in detail, a power supply 404 that supplies power of a positive potential and a power supply 405 that supplies power of a negative potential are arranged inside the heater power supply 307 so that power of different polarities can be supplied to the heater 202 in order to reduce the return current of the heater 202. The heaters 202 are divided into two groups so that the sum of the rated current values ​​is equal, and a power supply 404 that supplies power of a positive potential is arranged for the heaters 202 in one group, and a power supply 405 that supplies power of a negative potential is arranged for the heaters 202 in the other group. The low potential side of the power supply 404 that supplies power of a positive potential and the high potential side of the power supply 405 that supplies power of a negative potential are each connected to a terminal block 403 by a common cable 406 arranged inside the heater power supply 307. The common cable 406 inside the heater power supply 307 and the common cable 402 arranged outside the heater power supply 307 are electrically connected by this terminal block 403.

[0040] In the connection path shown in this embodiment, the current supplied to the heaters 202 from the heater power supply 307 via the power supply cable 308 flows to the substrate 108 through the vias 401. The current that has flowed through each of the heaters 202 is collected in the substrate 108, which is grounded and electrically set to the ground potential, and returns to each of the power supply 404 that supplies power of a positive potential inside the heater power supply 307 and the power supply 405 that supplies power of a negative potential, via the common cable 402, the terminal block 403, and the common cable 406. With this configuration, the number of cables for returning the current from the heaters 202 to the heater power supply 307 is reduced.

[0041] Next, a configuration for reversing the polarity of the current supplied to the heaters 202 will be described. The heaters 202 in one group, which have the same total rated current value, are supplied with power by a power supply 404 that supplies power of a positive potential. At this time, the current flows from the power supply 404 that supplies power of a positive potential through the power supply cable 308 to the heaters 202, passes through the via 401, the substrate 108, the common cable 402, the terminal block 403, and the common cable 406, in that order, and returns to the power supply 404.

[0042] In contrast, the heaters 202 in the other group, which have the same sum of rated current values, are supplied with power by a power supply 405 that supplies negative potential power. At this time, the current flows from the power supply 405 that supplies negative potential power through the common cable 406, the terminal block 403, the common cable 402, the substrate 108, and the via 401 in that order to the heaters 202, and then returns to the power supply 405 through the power supply cable 308.

[0043] Here, when power is supplied at the same time to heater 202 supplied with power from power supply 404 supplying power of a positive potential and heater 202 supplied with power from power supply 405 supplying power of a negative potential, the directions of the currents flowing in each are opposite, so that at least a portion of the currents flowing in substrate 108 and common cable 402 where the currents are concentrated are offset, making it possible to reduce the currents flowing in substrate 108 and common cable 402. This reduces the current capacity required for common cable 402, and allows the cable to be made thinner.

[0044] In the case of the polarity reversal configuration, the case where the largest current flows is when only the heater 202 to which power of either the positive or negative potential is supplied is used. The current flowing through the substrate 108 and the common cable 402, which is the case where the largest current flows in the configuration without polarity reversal, is at most half in the case of the polarity reversal configuration compared to when the total number of heaters 202 is used.

[0045] Furthermore, under the condition that the sums of the current consumption of the two groups are equal, the magnitudes of the currents with opposite signs flowing through the substrate 108 and the common cable 402 become equal, and no current flows through the substrate 108 or the common cable 402 .

[0046] (Heater configuration) FIG. 5 is a diagram showing an example of a heater 202 in the sample stage 120. The heater arrangement shown in this figure shows an example of the configuration of a plurality of heaters 202 arranged inside the dielectric films 201, 203 of the sample stage 120. Each of the plurality of film-like heaters 202 is arranged in a plurality of rectangular regions. The plurality of regions are arranged corresponding to the circuit patterns of the plurality of semiconductor devices formed on the upper surface of the wafer 109, and each region includes four regions arranged with one side of a rectangle facing the adjacent region. A specific description will be given below.

[0047] The heater 202 in this embodiment is a metal film-like heater arranged inside the dielectric films 201, 203 that cover the circular upper surface of the substrate 108 in a plurality of layers. The heater 202 is arranged in a plurality of regions corresponding to each of the circuit patterns (dies) of a plurality of semiconductor devices formed in advance on the upper surface of the wafer 109 placed on the upper surface of the dielectric film 207 when viewed from above, and is arranged over the entire dielectric film 201 that covers the central protrusion Tp of the substrate 108. That is, the heater 202 (shown as a solid square in FIG. 5) is an area on the upper surface of the dielectric film 201, and is divided into a plurality of rectangular regions 5011-5012 in a grid shape by a plurality of line segments (shown as dashed lines in FIG. 5) that extend parallel to the shape of the semiconductor device dies at equal intervals corresponding to the shape of the dies and a plurality of line segments that are perpendicular to the above and extend at equal intervals. N The areas 5011 to 5012 are arranged inside each other and have shapes that match the outer shapes of the areas when viewed from above. N When there is no need to specify the region, it is simply referred to as "region 501." At the outer periphery of the upper surface of dielectric film 201 having a circular shape, region 501 is not a perfect rectangle but has a partially arcuate shape. Note that in Fig. 5, region 501 surrounded by a dashed line and heater 202 surrounded by a solid line are depicted in different sizes for the sake of explanation, but the contents of the present disclosure are not limited to the sizes depicted in the figure.

[0048] Inside the region 501 of the heater 202, a rectangular film-like heater wire is arranged, which is a thin metal film having a predetermined resistance and which is folded back horizontally multiple times along the sides of the rectangular outer shape. The rectangle showing the region where the heater (grid-shaped heater) shown in this figure represents the region where the heater 202 is arranged. The heater 202 itself does not need to be made of a film occupying such a rectangular region, and a conductor wire of a predetermined width may be arranged inside each region so as to occupy most of the rectangular region. The dimensions of the rectangle of the heater 202 in the case of the grid shape shown in this embodiment are made similar to the region (die) where each pattern of a plurality of semiconductor devices formed in advance on the wafer 109 is arranged.

[0049] In this embodiment, although not shown in the figure, a plurality of temperature sensors are disposed inside the base material 108 below the rectangular region 501 of the first heater layer 212. In addition, the control unit (controller 309) adjusts the output of the plurality of heaters 202 constituting the first heater layer 212 according to the output from the plurality of temperature sensors. With such a configuration, the controller 309 adjusts the power supplied to each of the plurality of film-like heaters 202 formed along the shape of the region 501 corresponding to the die of the semiconductor device during plasma processing, and the temperature of the wafer 109 is precisely adjusted for each location on the upper surface of the wafer 109 corresponding to each of the wafer dies. As a result, the heaters 202 adjust the temperature of the wafer 109 region of each die during processing of the wafer 109 to within a desired range suitable for processing, and the temperature is adjusted according to each of the plurality of patterns corresponding to the semiconductor device to be manufactured, thereby realizing a temperature distribution of the wafer 109 that can reduce the variation in the result of the etching process on the wafer 109 and improve the yield.

[0050] Each of the heaters 202 is electrically connected to a heater power source 307 shown in Fig. 3, and the amount of power supplied to or the amount of heat generated by each heater 202 can be adjusted individually and independently. In particular, for the heaters 202 shown in the figure, four adjacent rectangular regions 501 of each heater are arranged with their sides facing each other as a group 502, and the amount of power supplied to each of the heaters 202 is adjusted to adjust the amount of heat generated by each of the heaters 202 belonging to the group.

[0051] Next, a configuration in which the polarity of the power supply unit 601 of the film heater wire constituting the heater 202 in a group (region 502) of four regions 501 is inverted will be described with reference to Fig. 6. Fig. 6 is a diagram showing an example of the heater configuration. In the configuration of the present disclosure, four adjacent film heaters among the multiple film heaters 202 are considered as one group (region 502), and the group includes four power supply paths (power supply units 6011-6014) electrically connected to one location of each of the multiple film heaters 202 and supplying power from a DC power source, and a return path (common cable 402) returning from each of the film heaters to the multiple heater power sources (heater power source 307), and the return path includes a portion (common cable 402) electrically connected to another location of each of the film heaters and the substrate 108, and a portion electrically connected to a common terminal (return unit 602) electrically connected to the substrate 108 and one terminal of each of the multiple heater power sources. In addition, return paths are arranged at the locations where the four corners of each of the four adjacent regions (502) are adjacent to each other when viewed from above, and a power supply path is connected to a corner diagonally opposite the corner to which the return path is connected in each of the four regions. A specific description will be given below.

[0052] FIG. 6(a) is a top view showing a schematic outline of the configuration of the heater 202 in the region 502, which is a collection of regions including four adjacent heaters 202 in the sample stage shown in FIG. 5. In particular, the heater wire 603 of the heater 202 in each region 501 is shown enlarged. FIG. 6(b) is a diagram showing a schematic current flowing through the heater 202 between the power supply parts 6011 to 6014 and the return part 602 in the region 502, which is a collection of the four regions shown in FIG. 5. Note that the subscripts are given for convenience to facilitate understanding, and are not intended to refer to the same ones as those given in FIG. 2 to FIG. 5. For example, the power supply parts 6011 and 6013 are each connected to the power supply 404 that supplies power of a positive potential. Also, the power supply parts 6012 and 6014 are each connected to the power supply 405 that supplies power of a negative potential. Also, the return part 602 is connected to the substrate 108 and the common cable 402 that are connected to the ground potential.

[0053] In particular, Fig. 6(b) shows the heater wire 603 shown in Fig. 6(a) in an equivalent circuit diagram as resistors 6031-6034 having resistance values ​​R1-R4, and shows the relative magnitude of the potential of the power supply part 601 with respect to the potential of the return part 602 (ground potential in this embodiment) as positive and negative polarities. The positive and negative signs and arrangement in Fig. 6 indicate that the potential of the power supply part 601 is higher than the potential of the return part 602 as +, and lower as -.

[0054] As shown in the figure, when viewed from above, the return section 602, which is set to ground potential, is located below the ends of the heaters 202 at or near the locations where the corners of the four regions 501 are adjacent to each other, and is electrically connected to these ends. Connectors of the power supply sections 6011 to 6014 are electrically connected to the connectors of the return section 602 at positions corresponding to the diagonal corners of the rectangular shape of each of the four regions 501 of the heater 202. Furthermore, at least one of the four power supply sections 601 of the region 502 has a negative potential. In this embodiment, in particular, the polarity of the connector potential, which is set to a positive value in two power supply sections 601, is reversed and set to a negative value in the other two power supply sections 601.

[0055] With this configuration, in a set of four heaters 202, the current flowing from the power supply unit 601, which is set to a positive value, through the heaters 202 to the return unit 602 and the current flowing from the return unit 602 through the heaters 202 to the power supply unit 601 are at least partially offset, making it possible to reduce the current flowing through the return path from the return unit 602 to the heater power supply 307. This makes it possible to reduce the size of members such as cables that constitute the return path, and suppresses an increase in the volume of the sample stage 120.

[0056] Next, a case will be described in which the number of power supply sections 601 whose polarity is inverted (low potential relative to the return section 602) is equal to the number of power supply sections 601 whose polarity is not inverted (high potential relative to the return section 602) in the four regions 501 belonging to the region 502. In Fig. 6(b), the direction of the arrow in the figure indicates the direction of current flow. In the example of Fig. 6, in the set of four regions 501, the number of power supply sections 601 whose polarity is high relative to the return section 602 is the same as the number of power supply sections 601 whose polarity is low, that is, two.

[0057] In this configuration, in the four rectangular regions 501 in which the return section 602 is disposed at the center as viewed from above, the heaters 202 are disposed with rotational symmetry. In this configuration, if the number of power supply sections 601 and the number of power supply sections that are not reversed are equal, the magnitude of the current flowing through the heaters that are positioned line-symmetrically or point-symmetrically about the center point is equal, and it is guaranteed that the current flowing through the substrate 108 is apparently half that in the case where the polarity is not reversed.

[0058] Furthermore, under conditions (flat temperature conditions) where the temperature distribution on the surface of the wafer 109 or the dielectric film 207 is within a predetermined allowable range of a specific value in the in-plane direction of the surface, the currents flowing in the regions 502 are equal, and no current flows in the return portion 602. In other words, the multiple film heaters 202 are divided into two groups so that the sums of the rated current values ​​are equal, and each group is provided with a heater power supply that applies a voltage of a different polarity, and the currents flowing in the return paths returning to the heater power supply 307 are offset by the difference in polarity of the power supplies.

[0059] Furthermore, in the area corresponding to the outer periphery of the upper surface of the convex portion Tp at the upper center of the substrate 108 of the sample stage 120, there is a region 502 in which three or two heaters 202 are connected to one return portion 602. Under flat temperature conditions in such outer periphery region 502 or temperature conditions where the temperature near the center of the convex portion is higher, the temperatures of the heaters 202 become approximately equal, and it is expected that the return current can be reduced to about one-third compared to the case where the polarity is not reversed.

[0060] If the above polarity reversal is not performed, the current flowing through the substrate 108 increases as the number of heaters 202 increases, and Joule heat is generated in proportion to the square of the magnitude of the current flowing through the substrate 108, which may affect the temperature control of the wafer 109. Alternatively, a worker may receive an electric shock during maintenance due to the large amount of current flowing through the substrate.

[0061] In the present disclosure, the heaters in the four regions are grouped together to reduce the return current, but the present disclosure is not limited to this. It is also possible to configure one group to include a number of heaters other than four. It is also possible to configure the controller 309 to switch the polarity of the voltage applied to each film heater so that the current flowing through the return path returning to the heater power supply 307 does not exceed the rated current capacity of the return path.

[0062] (Action and effect) In the present disclosure, the current return lines between each heater and the heater power supply are shared, and the connection between the electrode and the heater power supply is one, so that the total number of wires between the electrodes and the heater power supply can be reduced by half compared to the conventional configuration. However, if the current return lines are shared while maintaining the + potential output of the conventional technology, the current is concentrated and becomes a large current, and the cable needs to be thickened. Therefore, by dividing the heaters into two groups so that the sum of the rated current values ​​is equal, and reversing the polarity of the power supply potential of one group, the maximum current flowing through the current return line can be reduced by half, and the cable thickness of the current return line can be prevented from becoming large.

[0063] In this way, by reducing the number of required wiring lines by about half, it is possible to easily fabricate a multi-zone electrode system including the electrodes and the power supply at low cost. In addition, by reversing the polarity of the power supply potential to the heater, the return current can be offset, allowing the cable thickness of the current return line to be reduced. According to the present invention, by improving the heater wiring, it is possible to realize a plasma processing apparatus that reduces the cost of the electrode system and improves the fabrication workability. [Explanation of symbols]

[0064] 100: plasma etching apparatus (plasma processing apparatus), 101: vacuum vessel, 102: shower plate, 102a: gas inlet hole, 103: dielectric window, 104: processing chamber, 105: waveguide, 106: power source for generating electric field, 107: magnetic field generating coil, 108: substrate, 109: semiconductor wafer (wafer), 110: vacuum exhaust port, 111: conductive film, 112, 114: ground, 113: susceptor ring, 116: Plasma, 120: sample stage, 120a: mounting surface, 120d: recessed portion, 124: high frequency power source, 125: high frequency filter, 126: DC power source, 127: high frequency power source, 128, 129: matching device, 130: load impedance variable box, 131: conductor ring, 140: dielectric film, 152: refrigerant flow path, 160: electric field / magnetic field generating portion, 161: power supply connector, 201: dielectric film, 202, 2021-202 N: heater, 203: dielectric film, 204: shielding film, 205: dielectric film, 206: electrode film, 207: dielectric film (electrostatic attraction member), 212: first heater layer, 301: electrostatic attraction power supply hole, 302: heater power supply hole, 303, 304: insulating boss, 305: DC power supply, 306: high frequency bias power supply, 307: heater power supply, 308: power supply cable, 309: controller, 401: via, 402: common cable, 403: terminal block, 404, 405: power supply, 406: common cable, 501, 5011 to 501 N 502: area, 601, 6011 to 6014: power supply section, 602: return section, 603: heater wire, 6031 to 6034: resistors

Claims

1. a processing chamber disposed within the vacuum vessel and in which a wafer to be processed is disposed to generate plasma; a sample stage disposed within the processing chamber and on an upper surface of which the wafer is placed; A first heater layer is disposed inside the sample stage, is disposed inside a dielectric film covering an upper surface of a substrate made of a conductive material, and includes a plurality of film-shaped heaters disposed in a plurality of different regions as viewed from above; a plurality of heater power sources electrically connected to the plurality of film heaters and supplying DC power to the plurality of film heaters, four adjacent film heaters among the plurality of film heaters are regarded as one group, and the group is electrically connected to one location of each of the plurality of film heaters, and includes four power supply paths for supplying power from a DC power source and a return path for returning from each of the film heaters to the plurality of heater power sources; A plasma processing apparatus, wherein the return path includes a portion electrically connected to another portion of each of the film-shaped heaters and the substrate, and a portion electrically connected to the substrate and a common terminal electrically connected to one terminal of each of the multiple heater power sources.

2. 2. The plasma processing apparatus according to claim 1, Each of the plurality of film heaters is disposed in each of a plurality of rectangular regions, a plurality of temperature sensors disposed within the substrate below the rectangular region of the first heater layer; The plasma processing apparatus includes four regions, each of which is arranged in correspondence with a circuit pattern of a plurality of semiconductor devices formed on the upper surface of the wafer, with one side of each region being arranged facing an adjacent region.

3. 3. The plasma processing apparatus according to claim 2, A plasma processing apparatus in which the return path is arranged at the location where the four corners of each of the four adjacent areas are adjacent when viewed from above, and the power supply path is connected to the corner of each of the four areas diagonally opposite the corner to which the return path is connected.

4. 2. The plasma processing apparatus according to claim 1, The plasma processing apparatus in which the substrate is at ground potential.

5. 3. The plasma processing apparatus according to claim 2, a plurality of temperature sensors disposed within the substrate below the rectangular region; a control unit that adjusts outputs of the plurality of film-like heaters that constitute the first heater layer in response to outputs from the plurality of temperature sensors.

6. 3. The plasma processing apparatus according to claim 2, a plurality of temperature sensors disposed within the substrate below the rectangular region; a control unit that adjusts outputs of the plurality of film-like heaters that constitute the first heater layer in response to outputs from the plurality of temperature sensors; A plasma processing apparatus in which the potential at at least one point where each of the film heaters is connected to each of four power supply paths is made lower than the potential at a point where each of the film heaters is connected to one return path.

Citation Information

Patent Citations

  • Heating plate with flat heating zone for semiconductor processing

    JP2013508968A

  • Multiple heater arrays using AC drive for semiconductor processing

    JP2015515713A

  • Holding device

    JP2020194800A

  • Support unit, heating unit, and substrate processing apparatus including the same

    JP2023020980A

  • Vacuum processing device

    JP2007067036A