Method for manufacturing solar cell

Abstract

To provide a method for manufacturing a solar cell, which can appropriately determine the end point of heat treatment and manufacture a solar cell having high photoelectric conversion efficiency.SOLUTION: The method for manufacturing the solar cell according to one aspect of the present invention is a method for manufacturing a solar cell that includes a semiconductor substrate having a first conductivity type, a plurality of first semiconductor layers which have the first conductivity type and are separately stacked on one main surface of the semiconductor substrate, a second semiconductor layer which is stacked on the semiconductor substrate complementarily to the first semiconductor layers, a plurality of first transparent electrode layers which are respectively stacked on the first semiconductor layers, a second transparent electrode layer which is stacked on the second semiconductor layer, a plurality of first metal electrodes which are respectively stacked on the first transparent electrode layers, and a second metal electrode which is stacked on the second transparent electrode layer. The method includes a step of heat-treating an intermediate product which has the first semiconductor layer, the second semiconductor layer, the first transparent electrode layer, the second transparent electrode layer, the first metal electrode and the second metal electrode stacked on the semiconductor substrate; and determines the end of the heat treatment on the basis of electrical resistances between the plurality of first metal electrodes.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a solar cell. [Background technology]

[0002] There is a known technology for forming solar cell electrodes by heating an ink or paste containing metal particles. For example, Patent Document 1 discloses that optimizing the temperature and time of heat treatment of the paste allows the paste to penetrate the anti-reflective coating and mechanically adhere to the semiconductor substrate, forming a low-resistance electrical contact. In forming such solar cell electrodes, if the heating time is too short or too long, the maximum performance of the solar cell cannot be achieved. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Special Publication No. 06-500671 Summary of the Invention [Problem to be solved by the invention]

[0004] The optimal conditions for the paste heat treatment may vary depending on the film to which the paste is applied, the state of the paste, the temperature and humidity of the atmosphere, etc. Therefore, even when the same product is repeatedly manufactured using the same manufacturing equipment, it is difficult to maintain optimal heat treatment conditions using a method that determines the heating temperature and heating time based on past performance. Therefore, an object of the present invention is to provide a solar cell manufacturing method that can appropriately determine the end point of the heat treatment and can manufacture solar cells with high photoelectric conversion efficiency. [Means for solving the problem]

[0005] A solar cell manufacturing method according to one embodiment of the present invention is a method for manufacturing a solar cell comprising: a semiconductor substrate having a first conductivity type; a plurality of first semiconductor layers having a first conductivity type, which are separately stacked on one main surface of the semiconductor substrate; a second semiconductor layer stacked on the semiconductor substrate in a complementary manner to the first semiconductor layers; a plurality of first transparent electrode layers stacked on the first semiconductor layers, a second transparent electrode layer stacked on the second semiconductor layer, a plurality of first metal electrodes stacked on the first transparent electrode layers, and a second metal electrode stacked on the second transparent electrode layer, the method comprising the steps of: heat-treating an intermediate product in which the first semiconductor layer, the second semiconductor layer, the first transparent electrode layer, the second transparent electrode layer, the first metal electrode and the second metal electrode are stacked on the semiconductor substrate; and determining the end of the heat treatment based on the electrical resistance between the plurality of first metal electrodes.

[0006] In the above-described solar cell manufacturing method, the end of the heat treatment may be determined based on an approximation line of the relationship between the distance between the first metal electrodes and the electrical resistance.

[0007] 3. The solar cell manufacturing method according to claim 2, wherein the heat treatment is terminated when it is determined that the intercept of the approximation line has recorded a minimum value.

[0008] In the above-mentioned solar cell manufacturing method, the heat treatment step may include a step of heating the intermediate product under predetermined basic heating conditions, a step of measuring the electrical resistance between the first metal electrodes, a step of determining whether or not further heating of the intermediate product is necessary based on the measured value of the electrical resistance between the first metal electrodes, and a step of heating the intermediate product under predetermined additional heating conditions when it is determined that further heating of the intermediate product is necessary.

[0009] In the above-described solar cell manufacturing method, the heating under the additional heating conditions may be performed by irradiation with energy rays. Effect of the Invention

[0010] According to the present invention, the end point of the heat treatment can be appropriately determined, and a solar cell with high photoelectric conversion efficiency can be manufactured. [Brief description of the drawings]

[0011] [Figure 1] 1 is a schematic back view showing a configuration of a solar cell manufactured by a solar cell manufacturing method according to one embodiment of the present invention. [Diagram 2] 2 is a cross-sectional view of the solar cell shown in FIG. 1 taken along line XX. [Diagram 3] 2 is a flowchart showing the steps of a solar cell manufacturing method according to one embodiment of the present invention for manufacturing the solar cell of FIG. [Figure 4] 2 is a graph illustrating the relationship between the electrical resistance between first electrodes of the solar cell of FIG. 1 and the heat treatment time. [Diagram 5] 5 is a graph showing the relationship between the intercept of the approximation line of the electrical resistance in FIG. 4 and the heat treatment time. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. For convenience, hatching and component symbols may be omitted. In such cases, other drawings shall be referred to. Furthermore, the dimensions of various components in the drawings have been adjusted for ease of viewing.

[0013] Fig. 1 is a schematic rear view showing the configuration of a solar cell 1 according to one embodiment of the present invention Fig. 2 is a cross-sectional view of the solar cell 1 taken along line XX in Fig. 1.

[0014] The solar cell 1 is a so-called heterojunction back-contact type solar cell. The solar cell 1 includes a semiconductor substrate 10 having a first conductivity type, a plurality of first semiconductor layers 21 having a first conductivity type that are separated and stacked on one main surface (back surface) of the semiconductor substrate 10, a plurality of second semiconductor layers 22 having a second conductivity type that are stacked complementarily to the first semiconductor layers 21 of the semiconductor substrate 10, a plurality of first transparent electrode layers 31 stacked on the first semiconductor layers 21, a second transparent electrode layer 32 stacked on the second semiconductor layers 22, a plurality of first metal electrodes 41 stacked on the first transparent electrode layers 31, a plurality of second metal electrodes 42 stacked on the second semiconductor layers 22, a first wiring member 51 connecting the plurality of first metal electrodes 41, and a second wiring member 52 connecting the plurality of second metal electrodes 42.

[0015] The semiconductor substrate 10 is formed of a crystalline silicon material such as single crystal silicon or polycrystalline silicon. For example, the semiconductor substrate 10 may be an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant. An example of the n-type dopant is phosphorus (P). The semiconductor substrate 10 functions as a photoelectric conversion substrate that absorbs incident light from the light-receiving surface side and generates photocarriers (electrons and holes). By using crystalline silicon as the material of the semiconductor substrate 10, a relatively high output (stable output regardless of illuminance) can be obtained even when the dark current is relatively small and the intensity of the incident light is low.

[0016] The first semiconductor layer 21 has the same polarity of conductivity as the semiconductor substrate 10 and has higher conductivity than the semiconductor substrate 10. The first semiconductor layer 21 selectively extracts only photocarriers (electrons or holes) of one polarity among the photocarriers generated in the semiconductor substrate 10. The first semiconductor layer 21 is formed from a thin film of amorphous silicon, and may contain a dopant similar to that of the semiconductor substrate 10 described above at a higher content than that of the semiconductor substrate 10. The multiple first semiconductor layers 21 are formed to be separated from each other in a planar view. For example, in the illustrated embodiment, the first semiconductor layers 21 are formed in strips extending in a first direction and aligned in a second direction intersecting the first direction.

[0017] The second semiconductor layer 22 has a second conductivity type different from the polarity of the semiconductor substrate 10 and the first semiconductor layer 21. As a result, the second semiconductor layer 22 selectively extracts only photocarriers generated in the semiconductor substrate 10 that have a polarity different from that of the photocarriers extracted by the first semiconductor layer 21. The second semiconductor layer 22 may be formed from a thin film of amorphous silicon and may contain a dopant that imparts a second conductivity type (e.g., p-type). An example of the p-type dopant is boron (B). The second semiconductor layer 22 is laminated complementary to the first semiconductor layer 21. In the illustrated embodiment, the second semiconductor layer 22 is formed in a plurality of strip shapes laminated between the first semiconductor layers 21 in a plan view. That is, one main surface of the semiconductor substrate 10 is substantially entirely covered by the plurality of first semiconductor layers 21 and the plurality of second semiconductor layers 22.

[0018] The first transparent electrode layer 31 is laminated so as to extend in the first direction on the back side of the center portion in the second direction of each of the first semiconductor layers 21. The first transparent electrode layer 31 is a thin layer that collects the first semiconductor layer 21 and connects to the first metal electrode 41. The first transparent electrode layer 31 also functions as an intermediate layer that prevents a decrease in adhesion and an increase in electrical resistance at the interface caused by differences in materials between the first semiconductor layer 21 and the first metal electrode 41. Examples of materials that can be used to form the first transparent electrode layer 31 include indium oxide, tin oxide, zinc oxide, titanium oxide, and composite oxides thereof, and among these, ITO (Indium Tin Oxide) in which tin is added to indium oxide is particularly preferably used.

[0019] The second transparent electrode layer 32 is laminated so as to extend in the first direction on the rear surface side of the center portion in the second direction of each second semiconductor layer 22. Like the first transparent electrode layer 31, the second transparent electrode layer 32 is a thin layer that collects current from the second semiconductor layer 22 and connects to the second metal electrode 42, and functions as an intermediate layer that improves the mechanical and electrical connection strength between the second semiconductor layer 22 and the second metal electrode 42. The second transparent electrode layer 32 is formed from the same material as the first transparent electrode layer 31, usually the same material.

[0020] The first metal electrodes 41 are laminated on the first transparent electrode layer 31, respectively, and collect the electric charge taken out by the first semiconductor layer 21. The first metal electrodes 41 can be formed mainly from a low-electrical resistance material containing metal particles and a binder thereof, such as silver paste. Examples of the material of the metal particles include silver, copper, and nickel. Examples of the binder include resins such as epoxy resins, and a thermosetting resin composition containing a crosslinking agent that is activated by heating is particularly preferably used. The first metal electrodes 41 may be formed so that the height of the portion where the first wiring member 51 is connected is large and the height of the portion where the second wiring member 52 intersects is small. The first metal electrodes 41 may also be formed by dividing them into a plurality of parts on the first transparent electrode layer 31.

[0021] The second metal electrodes 42 are laminated on the second transparent electrode layer 32, and collect the charges extracted by the second semiconductor layer 22. The second metal electrodes 42 may be formed from the same material as the first metal electrodes 41. The second metal electrodes 42 may be formed so that the height of the portion where the second wiring members 52 are connected is large and the height of the portion where the first wiring members 51 intersect is small, or the second metal electrodes 42 may be formed on the second transparent electrode layer 32 by dividing them into multiple parts.

[0022] The first wiring member 51 connects the first metal electrodes 41 on the multiple first semiconductor layers 21, and outputs the charge collected by the first metal electrodes 41 to the outside. The first wiring member 51 may be formed of, for example, multiple metal wires extending in the second direction. As a specific example, the first wiring member 51 may be, for example, a copper solid wire, a copper braid, a copper twisted wire, or the like. The first wiring member 51 may be connected to the first metal electrodes 41 by, for example, solder, a conductive adhesive, or the like. For this reason, the first wiring member 51 may be made of a material in which a metal wire is previously coated with solder. In order to prevent a short circuit between the first wiring member 51 and the second metal electrode 42, the first wiring member 51 may be connected to a portion of the first metal electrode 41 where the thickness is locally increased, and an insulating material may be disposed between the first wiring member 51 and the second metal electrode 42.

[0023] The second wiring member 52 connects the first metal electrodes 41 on the multiple second semiconductor layers 22, and outputs the charge collected by the first metal electrodes 41 to the outside. The second wiring members 52 may be arranged alternately with the first wiring members 51 in the first direction, and each may extend in the second direction. The material and other configuration of the second wiring members 52 may be the same as that of the first wiring members 51. In addition, in order to connect multiple solar cells 1, the first wiring members 51 and the second wiring members 52 may be integrated with the first wiring members 51 or the second wiring members 52 of adjacent solar cells 1. For this reason, the first wiring members 51 and the second wiring members 52 may be connected to the first metal electrodes 41 and the second metal electrodes 42 during the manufacture of a solar cell module including multiple solar cells 1.

[0024] Next, a method for manufacturing the above-mentioned solar cell 1, that is, a solar cell manufacturing method according to one embodiment of the present invention will be described. Fig. 3 is a flowchart showing the steps of the solar cell manufacturing method according to one embodiment of the present invention, which can manufacture the solar cell 1.

[0025] The solar cell manufacturing method of this embodiment includes a first semiconductor layer forming step (step S01), a second semiconductor layer forming step (step S02), a transparent electrode layer forming step (step S03), a metal electrode forming step (step S04), a basic heating step (step S05), a resistance measuring step (step S06), a heating end determining step (step S07), an additional heating step (step S08), and a wiring material connecting step (step S09). Note that steps S05 to S08, i.e., the basic heating step, the resistance measuring step, the heating end determining step, and the additional heating step, are subdivisions of a single heat treatment procedure.

[0026] In the first semiconductor layer formation process of step S01, the first semiconductor layer 21 is laminated in a desired pattern on the back surface of the semiconductor substrate 10. Specifically, the first semiconductor layer 21 can be formed by laminating semiconductor materials using a film formation technique such as CVD. The first semiconductor layer 21 can be patterned by a well-known method such as an etching process using an etching mask or a lift-off process using a patterned lift-off layer. In addition, a thin layer of an intrinsic semiconductor (amorphous silicon containing no dopant) or the like for passivation to suppress recombination of photocarriers may be laminated at the interface between the semiconductor substrate 10 and the first semiconductor layer 21.

[0027] In the second semiconductor layer forming process of step S02, the second semiconductor layer 22 is laminated in an area of ​​the back surface of the semiconductor substrate 10 where the first semiconductor layer 21 is not laminated. The lamination and patterning of the second semiconductor layer 22 can be performed by a film forming technique similar to that of the first semiconductor layer forming process. A thin layer of an intrinsic semiconductor or the like may be provided at the interface between the semiconductor substrate 10 and the first semiconductor layer 21 and the second semiconductor layer 22 for the purpose of passivation, insulation, or the like.

[0028] In the transparent electrode layer forming process of step S03, the first transparent electrode layer 31 and the second transparent electrode layer 32 are laminated on the back surface of the first semiconductor layer 21 and the second semiconductor layer 22. The first semiconductor layer 21 and the second semiconductor layer 22 can be formed by a film forming technique such as CVD or PVD. Typically, the first semiconductor layer 21 and the second semiconductor layer 22 can be formed by forming an integral film and then removing the boundary portion by etching. In this etching, a dedicated etching mask may be formed, but the first metal electrode 41 and the second metal electrode 42 can also be used as the etching mask.

[0029] In the metal electrode forming step of step S04, a conductive paste is laminated on the back surface of each of the first transparent electrode layer 31 and the second transparent electrode layer 32 to form the first metal electrode 41 and the second metal electrode 42. The conductive paste can be selectively laminated by, for example, screen printing. More specifically, in the metal electrode forming step, the first metal electrode 41 and the second metal electrode 42 can be formed by printing the conductive paste on the semiconductor substrate 10 arranged with the first semiconductor layer 21 and the second semiconductor layer 22 facing up using a printing plate including a mesh base material and an emulsion material supported by the mesh base material, having a certain thickness, and having an opening in the printing area. In addition, in the metal electrode forming step, it is preferable to perform drying to volatilize the solvent contained in the conductive paste and to prevent the formed first metal electrode 41 and second metal electrode 42 from easily deforming. In order to obtain the desired height of the first metal electrode 41 and the second metal electrode 42, the printing and drying of the conductive paste may be repeated.

[0030] In the basic heating process of step S05, an intermediate product in which the first semiconductor layer 21, the second semiconductor layer 22, the first transparent electrode layer 31, the second transparent electrode layer 32, the first metal electrode 41, and the second metal electrode 42 are laminated on the semiconductor substrate 10 is heated under a predetermined basic heating condition. As a result, the first metal electrode 41 and the second metal electrode 42 are fired, and the first transparent electrode layer 31 and the second transparent electrode layer 32 are crystallized. The appropriate crystallization of the first transparent electrode layer 31 and the second transparent electrode layer 32 increases the mechanical and electrical bond strength between the first semiconductor layer 21 and the first transparent electrode layer 31, the second semiconductor layer 22 and the second transparent electrode layer 32, the first transparent electrode layer 31 and the first metal electrode 41, and the second transparent electrode layer 32 and the second metal electrode 42. Note that excessive crystallization may rather reduce the mechanical and electrical bond strength between the layers.

[0031] The heating method in the basic heating step includes a method using a heating furnace to raise the atmospheric temperature of the intermediate product to a high temperature, a method of contacting a heating element such as a heater plate with the intermediate product, a method of irradiating the intermediate product with energy rays such as infrared rays, visible light, X-rays, electron beams, and neutron beams, etc. The basic heating conditions are set to conditions that prevent the intermediate product from being overheated, resulting in a decrease in the mechanical and electrical bond strength between the layers of the semiconductor substrate 10 and the first metal electrode 41 and the second metal electrode 42, even due to manufacturing errors such as the lamination state of the first transparent electrode layer 31 and the second transparent electrode layer 32 and the composition of the conductive paste forming the first metal electrode 41 and the second metal electrode 42.

[0032] In the resistance measurement process of step S06, the electrical resistance between the multiple first metal electrodes 41 laminated in the separated regions of the first semiconductor layer 21 is measured. Since there is electrical conductivity between the semiconductor substrate 10 and the first semiconductor layer 21 having the same first conductivity type, there is also electrical conductivity between the multiple first metal electrodes 41 laminated on different first semiconductor layers 21, and it is possible to measure the electrical resistance of the electric path including the semiconductor substrate 10. In other words, the electrical resistance between the multiple first metal electrodes 41 is the electrical resistance of the electric path passing through the first metal electrode 41, the first transparent electrode layer 31, the first semiconductor layer 21, the semiconductor substrate 10 on one side, and the first semiconductor layer 21, the first transparent electrode layer 31, and the first metal electrode 41 on the other side in this order. As shown in FIG. 3, this resistance measurement process can be performed repeatedly.

[0033] At least one pair of first metal electrodes 41 for measuring the electrical resistance is sufficient, but in order to improve the accuracy of the determination, it is preferable to have multiple pairs, more preferably multiple pairs with different distances. When multiple pairs of first metal electrodes 41 are set, the same first metal electrode 41 may be shared as a common electrode. Note that even for the same laminate, the measured value may vary greatly depending on the selection of the pair of first metal electrodes 41 for measuring the electrical resistance. For this reason, in the resistance measurement process, it is possible to ensure that the electrical resistance between predetermined first metal electrodes 41 is measured using a jig or the like that holds multiple probes that contact the first metal electrodes 41 and can be positioned relative to the semiconductor substrate 10.

[0034] In the heating end determination step of step S07, the end of the heat treatment is determined based on the electrical resistance between the multiple first metal electrodes 41. That is, in the heating end determination step, it is determined whether or not further heating of the intermediate product by performing the additional heating step is necessary based on the measured value in the resistance measurement step. As a simple determination method, it can be determined that the heat treatment is to be ended when the electrical resistance between a pair of first metal electrodes 41, or the electrical resistivity (a value obtained by dividing the electrical resistance by the distance between the first metal electrodes 41) calculated from the electrical resistance between one or more pairs of first metal electrodes 41 is smaller than a preset threshold value. However, in order to more reliably obtain a highly efficient solar cell 1, it is preferable to perform the resistance measurement step multiple times and determine the end of the heat treatment based on the change in the electrical resistance between the first metal electrodes 41. That is, it is preferable to end the heat treatment when it is determined that the electrical resistance between the first semiconductor layer 21 and the first metal electrode 41 has recorded a minimum value. As an example, FIG. 4 illustrates the relationship between the electrical resistance between a pair of first metal electrodes 41 and the heating time in the heat treatment (heating temperature is constant at 190° C.) of two intermediate product samples. Thus, the electrical resistance between first metal electrodes 41 decreases in the early stage of the heat treatment, but starts to increase as the heat treatment progresses.

[0035] In addition, an approximation line (linear approximation formula) of the relationship between the distance between the first metal electrodes 41 and the electrical resistance is derived from the measured values ​​of the electrical resistance between a plurality of pairs of first metal electrodes 41 with different distances, and the end of the heat treatment is determined based on this approximation line, thereby reducing the influence of measurement errors. In particular, the intercept of the approximation line indicates the electrical resistance in the thickness direction in the laminated structure of the first semiconductor layer 21, the first transparent electrode layer 31, and the first metal electrode 41. Therefore, by ending the heat treatment when it is determined that the intercept of the approximation line has recorded a minimum value, it is possible to maximize the mechanical and electrical bonding strength between the first semiconductor layer 21 and the first transparent electrode layer 31, and between the first transparent electrode layer 31 and the first metal electrode 41. Specifically, when the intercept value of the latest approximation line starts to increase, it can be determined that the intercept of the approximation line has recorded a minimum value. As an example, FIG. 5 shows an example of the intercept of the approximation line calculated from the heat treatment data of the same sample as in FIG. 4. The intercept of the approximation line also decreases in the early stage of the heat treatment, but starts to increase as the heat treatment progresses.

[0036] The additional heating step of step S08 is performed when it is determined in the heating end determination step that further heating of the intermediate product is necessary. In the additional heating step of step S08, the intermediate product is heated under a predetermined additional heating condition. The additional heating condition is set to a degree that the mechanical and electrical bonding strength between the first semiconductor layer 21 and the first transparent electrode layer 31, the second semiconductor layer 22 and the second transparent electrode layer 32, the first transparent electrode layer 31 and the first metal electrode 41, and the second transparent electrode layer 32 and the second metal electrode 42 is not significantly reduced even if the additional heating step is performed from a state in which the mechanical and electrical bonding strength between each layer is at its maximum. As a result, by performing the resistance measurement step and the heating end determination step again after performing the additional heating step, it is possible to search for the maximum points of the mechanical and electrical bonding strength between the first semiconductor layer 21 and the first transparent electrode layer 31 and between the first transparent electrode layer 31 and the first metal electrode 41.

[0037] The heating in the additional heating step is preferably performed by irradiating energy rays. This allows heating to be performed easily and efficiently for a relatively short period of time, so that the amount of heat input to the intermediate product in each additional heating step can be set to a relatively small amount, and the maximum points of the mechanical and electrical bonding strength between the first semiconductor layer 21 and the first transparent electrode layer 31, and between the first transparent electrode layer 31 and the first metal electrode 41 can be more accurately found.

[0038] In the wiring member connecting step S09, first wiring member 51 and second wiring member 52 connect first metal electrodes 41 aligned in the second direction and second metal electrodes 42 aligned in the second direction, respectively. In this way, solar cell 1 shown in Figures 1 and 2 can be obtained. As described above, the wiring member connecting step may be performed during the manufacture of the solar cell module.

[0039] As described above, in the solar cell manufacturing method according to one embodiment of the present invention, the optimal end point of the heat treatment is determined from the measured electrical resistance between the first metal electrodes 41, so that a solar cell 1 can be manufactured that has high mechanical and electrical bond strength between layers and high photoelectric conversion efficiency.

[0040] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-mentioned embodiments, and various modifications and variations are possible. For example, in the solar cell manufacturing method according to the present invention, instead of performing basic heating and additional heating separately, the electrical resistance between the first metal electrodes may be measured during heating of an intermediate product having electrical resistance, and heating may be terminated at the point when it is determined that the heat treatment should be terminated based on the electrical resistance. In addition, in a solar cell manufactured by the solar cell manufacturing method according to the present invention, the second semiconductor layer is not divided into a plurality of parts, but may be integrally formed in a shape such as a sea-like shape surrounding a plurality of first semiconductor layers, or a comb-like shape in which one ends of a plurality of strip-shaped parts are connected. [Explanation of symbols]

[0041] 1. Solar Cell 10. Semiconductor Substrate 21 First semiconductor layer 22 Second semiconductor layer 31 First transparent electrode layer 32 Second transparent electrode layer 41 1st metal electrode 42 Second metal electrode 51 1st wiring material 52 2nd wiring material S01: First semiconductor layer formation process S02 Second semiconductor layer formation process S03 Transparent electrode layer formation process S04 Metal electrode formation process S05 Basic heating process S06 Resistance measurement process S07 Heating end determination process S08 Additional heating process S09 Wiring material connection process

Claims

1. a semiconductor substrate having a first conductivity type; a plurality of first semiconductor layers having a first conductivity type, the first semiconductor layers being stacked separately on one main surface of the semiconductor substrate; a second semiconductor layer laminated on the semiconductor substrate in a complementary manner to the first semiconductor layer; a plurality of first transparent electrode layers respectively stacked on the first semiconductor layers; a second transparent electrode layer laminated on the second semiconductor layer; a plurality of first metal electrodes respectively stacked on the first transparent electrode layer; a second metal electrode laminated on the second transparent electrode layer; A method for manufacturing a solar cell comprising: a step of heat-treating an intermediate product in which the first semiconductor layer, the second semiconductor layer, the first transparent electrode layer, the second transparent electrode layer, the first metal electrode, and the second metal electrode are laminated on the semiconductor substrate, The end of the heat treatment is determined based on an electrical resistance between a plurality of the first metal electrodes.

2. The method for manufacturing a solar cell according to claim 1 , further comprising the step of determining whether or not to terminate the heat treatment based on an approximation line of a relationship between a distance between the first metal electrodes and an electric resistance.

3. The method for manufacturing a solar cell according to claim 2 , wherein the heat treatment is terminated when it is determined that the intercept of the approximation line has recorded a minimum value.

4. The heat treatment step includes: heating the intermediate product under predetermined basic heating conditions; measuring the electrical resistance between the first metal electrodes; determining whether further heating of the intermediate product is required based on a measurement of the electrical resistance between the first metal electrodes; When it is determined that further heating of the intermediate product is necessary, a step of heating the intermediate product under a predetermined additional heating condition; The method for manufacturing a solar cell according to claim 1 , comprising:

5. The method for producing a solar cell according to claim 4 , wherein the heating under the additional heating conditions is performed by irradiation with energy rays.

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