Chip communication circuit, method, and apparatus based on automatic clock synchronization

Abstract

To provide a chip communication circuit, a method and an apparatus based on automatic clock synchronization.SOLUTION: A method includes the steps of: determining clock synchronization information of the first battery management chip in response to a received control instruction; replacing a chip selection enable signal in the control instruction with a clock synchronization signal carrying the clock synchronization information of the first battery management chip to obtain a new control instruction; and transmitting the new control instruction to other battery management chips so that the other battery management chips perform automatic clock synchronization based on the clock synchronization information carried in the new control instruction, the other battery management chips being battery management chips among the multiple battery management chips except for the first battery management chip, and a daisy chain with a sinusoidal sawtooth waveform being used for isolated communication between different battery management chips, thereby solving the problem of high communication power consumption and unsynchronized clocks of battery management chips in existing daisy chain communication methods.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present application relates to communication technology, and more particularly to a chip communication circuit, method and apparatus based on clock automatic synchronization. [Background technology]

[0002] Conventional technical solutions for daisy chain communication are all realized by converting general-purpose serial communication into separated serial communication of differential signals. For example, they can be mainly divided into two types: one that converts a universal asynchronous transmitter-receiver (UART) into separated serial communication of differential signals, and one that converts a serial peripheral interface (SPI) into separated serial communication of differential signals.

[0003] The entire communication process is that the microcontroller MCU sends data to the battery management chip AFE, where the communication process is mainly divided into two modes: read and write. However, read and write in the daisy chain cannot be performed simultaneously, and data must be written first and then read.

[0004] However, the conventional daisy chain communication method has problems such as high power consumption for communication, mis-synchronization of the clocks of the battery management chips, and inability to achieve both interference resistance and signal recognition in communication. Summary of the Invention [Problem to be solved by the invention]

[0005] The present application solves the problems of high communication power consumption and unsynchronized clocks of each battery management chip in the conventional daisy chain communication method, and provides a chip communication circuit, method and apparatus based on automatic clock synchronization to reduce the power consumption of daisy chain communication, maintain clock synchronization of each battery management chip, and achieve both the technical effects of communication interference resistance and signal recognition. [Means for solving the problem]

[0006] In one aspect, the present application provides a chip communication method based on clock automatic synchronization, the chip communication method comprising: determining clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; replacing a chip select enable signal in the control command with a clock synchronization signal having clock synchronization information of the first battery management chip to obtain a new control command; and a step of transmitting the new control command to another battery management chip to cause the other battery management chip to perform automatic clock synchronization based on the clock synchronization information contained in the new control command, the other battery management chip being a battery management chip other than the first battery management chip among a plurality of battery management chips, and performing separated communication between different battery management chips using a daisy chain with a sinusoidal sawtooth waveform.

[0007] In an optional embodiment, the chip communication method further comprises: configuring a scheduling mode parameter of each of the battery management chips at the initialization of the battery management chips, the scheduling mode parameter including at least one of an equalization on time, a resting time after equalization, a preparation time before a self-test of an equalization circuit, a preparation time before an open circuit self-test of a battery sampling line, and a time required to collect a voltage or a temperature of a battery; In response to the battery management chip receiving a scheduling mode start command, repeatedly executing a communication task based on the scheduling mode parameters.

[0008] In another aspect, the present application provides a chip communication circuit based on clock automatic synchronization, the chip communication circuit comprising: A controller used for transmitting control instructions; a plurality of battery management chips including a first battery management chip and another battery management chip other than the first battery management chip, the first battery management chip and the controller being connected via a serial peripheral interface, and different battery management chips are separated from each other by a daisy chain having a sinusoidal sawtooth waveform; The first battery management chip is used to respond to the received control command, determine clock synchronization information of the first battery management chip, replace the chip select enable signal in the control command with a clock synchronization signal having the clock synchronization information of the first battery management chip, obtain a new control command, and further transmit the new control command to another battery management chip, thereby causing the other battery management chip to perform clock automatic synchronization based on the clock synchronization information contained in the new control command.

[0009] In an optional embodiment, the controller is further used to configure scheduling mode parameters of the battery management chips at the initialization of each of the battery management chips, and send a scheduling mode start command to the battery management chips, thereby controlling the battery management chips to repeatedly execute communication tasks based on the scheduling mode parameters, where the scheduling mode parameters include at least one of an equalization on time, a resting time after equalization, a preparation time before a self-test of the equalization circuit, a preparation time before an open circuit self-test of a battery collection line, and a time required to collect a battery voltage or temperature.

[0010] In an optional embodiment, the other battery management chip further determines whether the clock synchronization information contained in the new control command is the same as the clock information of the other battery management chip each time it receives the new control command, and if it determines that the clock synchronization information is different from the clock information of the other battery management chip, it is used to perform a calibration process on the clock information of the other battery management chip based on the clock synchronization information to perform automatic clock synchronization.

[0011] In an optional embodiment, the other battery management chip is further used to determine whether the clock synchronization information held in the at least two new control commands is the same when receiving the at least two new control commands, and if it determines that the clock synchronization information held in the at least two new control commands is different, perform a calibration process on the clock information of the other battery management chip based on the last received clock synchronization information, to perform automatic clock synchronization.

[0012] In another aspect, the present application provides a chip communication device based on clock automatic synchronization, the chip communication device comprising: a determination module used to determine clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; a replacement module used to replace a chip select enable signal in the control command with a clock synchronization signal having clock synchronization information of the first battery management chip to obtain a new control command; and a synchronization module used to transmit the new control command to another battery management chip to cause the other battery management chip to perform automatic clock synchronization based on the clock synchronization information contained in the new control command, the other battery management chip being a battery management chip other than the first battery management chip among a plurality of battery management chips, and performing separate communication between different battery management chips using a daisy chain with a sinusoidal sawtooth waveform.

[0013] In another aspect, the present application provides an electronic device comprising a processor and a memory coupled to the processor, the memory storing computer executable instructions, the processor executing the computer executable instructions stored in the memory to implement any of the methods described above.

[0014] In another aspect, the present application provides a computer readable storage medium having stored thereon computer executable instructions used to implement any of the above methods when executed by a processor.

[0015] In another aspect, the present application provides a computer program product comprising a computer program which, when executed by a processor, implements any of the above methods. Effect of the Invention

[0016] The present application provides a chip communication circuit, method and device based on clock automatic synchronization, in which a control command is sent by a controller to a first battery management chip among a plurality of battery management chips via a serial peripheral interface, i.e., the controller and the first battery management chip communicate with each other using the serial peripheral interface, and the other battery management chips are battery management chips other than the first battery management chip among the plurality of battery management chips, and separate communication is performed between different battery management chips using a daisy chain with a sinusoidal sawtooth waveform; and, in response to the received control command, determine clock synchronization information of the first battery management chip, replace a chip select enable signal in the control command with a clock synchronization signal having the clock synchronization information, obtain a new control command, and transmit the new control command to the other battery management chips, thereby making the other battery management chips perform clock automatic synchronization according to the clock synchronization information in the new control command.

[0017] In this way, the embodiment of the present application uses a serial peripheral interface for communication between the controller and the first battery management chip, and uses a daisy chain with a sine sawtooth waveform for separate communication between different battery management chips. After receiving a control command, the first battery management chip determines the current clock synchronization information, and then replaces the chip select enable signal in the control command with a clock synchronization signal having the clock synchronization information to obtain a new control command, thereby helping the subsequent battery management chips to perform clock automatic synchronization based on the clock synchronization information in the new control command. In addition, the daisy chain used for separate communication between different battery management chips is a sine sawtooth wave, which has the advantage of high signal interference resistance and is easy to recognize. This can solve the problem of high communication power consumption and unsynchronized clocks of each battery management chip in the conventional daisy chain communication method, and can not only reduce the power consumption of daisy chain communication, but also maintain the clock synchronization of each battery management chip, achieving both the technical effects of communication interference resistance and signal recognition. [Brief description of the drawings]

[0018] The drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments consistent with the present application and, together with the specification, serve to explain the principles of the present application. [Figure 1] FIG. 2 is a schematic diagram of the architecture of a chip communication circuit based on clock automatic synchronization provided in an embodiment of the present application. [Diagram 2] FIG. 2 is a schematic diagram of a location for writing optional clock synchronization information provided in an embodiment of the present application. [Diagram 3] FIG. 2 is a sequence diagram of an optional scheduling mode of operation provided in an embodiment of the present application. [Figure 4] FIG. 2 is a waveform diagram of an optional sinusoidal sawtooth waveform provided in an embodiment of the present application. [Diagram 5]FIG. 2 is a circuit schematic diagram of the connection relationship between a controller and a first battery management chip provided in an embodiment of the present application. [Figure 6] 4 is a flowchart of a chip communication method based on clock automatic synchronization provided in an embodiment of the present application; [Figure 7] FIG. 2 is a block diagram of the structure of a chip communication device based on clock automatic synchronization provided in an embodiment of the present application. [Figure 8] FIG. 2 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0019] Specific examples of the present application are shown in the figures above and are described in more detail below: These figures and the written description are not intended to limit the scope of the concepts of the present application in any way, but rather to explain the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Exemplary embodiments will now be described in detail, examples of which are illustrated in the drawings. Where the following description refers to the drawings, the same numerals in different figures represent the same or similar elements unless otherwise noted. The embodiments described in the following exemplary embodiments are not representative of all embodiments consistent with the present application. On the contrary, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0021] The terms used in this application will be interpreted as follows.

[0022] The daisy chain communication mode means connecting devices in a serial communication network like a single daisy chain, hence the name daisy chain.

[0023] Battery Management System (BMS), commonly known as Battery Nurse or Battery Manager, is primarily used to intelligently manage and maintain each battery cell, prevent overcharging and over-discharging, extend the battery's service life, and monitor the battery status.

[0024] Battery Master Control Unit (BMU) is the core component of the battery management system, which has the functions of detecting the voltage of N series lithium batteries, detecting the battery temperature, and automatically equalizing the battery power, and provides a separate CAN communication interface, and provides voltage, temperature, monitoring and alarm information to the BMS.

[0025] The battery slave control unit CSC is a monitor attached to a battery cell, and is used to collect battery information of the string and then transmit it to the BMU for processing.

[0026] Bus extenders (GENERAL PURPOSE INPUT OUTPUT, GPIO) simplify the expansion of IO ports using industry standard I2C, SMBUS or SPI interfaces. When a microcontroller or chipset does not have enough IO ports, or when a system requires the adoption of far-end serial communication or control, GPIO products can provide additional control and monitoring functions.

[0027] Battery management chips (Analog Front End, AFE), also known as analog front ends, are used in the new energy industry to collect the voltage and temperature of battery modules and perform battery equalization, and can realize functions such as battery collection line disconnection diagnosis and equalization circuit diagnosis.

[0028] The Scheduler Mode is an analog front-end scheduling mode that completes the voltage and temperature collection, equalization control, and diagnostic functions of the battery modules according to specific rules.

[0029] Serial Peripheral Interface (SPI) is a synchronous serial communication interface specification for chip communication.

[0030] Master In Slave Out (MISO) is an antenna technology used in wireless communication, for example, in the serial peripheral interface (SPI), and is a channel signal that transmits commands or data from a slave to a master.

[0031] Master Out Slave In (MOSI) is a channel signal that transmits commands or data from a master to a slave.

[0032] A differential line is a signal transmission technology. A differential line refers to the differential wiring in a differential signal, which uses two parallel wires of equal length to transmit the same signal with a phase difference of 180 degrees, and the two signals have the same amplitude and opposite phase. The signal transmitted on these two wires is a differential signal.

[0033] Universal Asynchronous Receiver / Transmitter, commonly referred to as UART, is an asynchronous receiver / transmitter that is a piece of computer hardware. It converts data between serial and parallel communication. UART is a chip that converts parallel input signals to serial output signals and is generally integrated into the connection of other communication interfaces.

[0034] Conventional technical solutions for daisy chain communication are all realized by converting general-purpose serial communication into separated serial communication of differential signals. For example, they can be mainly divided into two types: one that converts a universal asynchronous transmitter-receiver (UART) into separated serial communication of differential signals, and one that converts a serial peripheral interface (SPI) into separated serial communication of differential signals.

[0035] The first method is that the battery main control unit BMU transmits and receives data through a serial port, which is an asynchronous communication method. After the microcontroller MCU transmits data, the battery management chip AFE converts the serial signal into a differential signal designed like a daisy chain, and the differential signal is transmitted stepwise through the AFEs to the last AFE, which then transmits the data that the MCU needs to read to the previous AFE, and so on to the first AFE stepwise, and the first AFE receives the data, converts it into serial communication, and transmits it to the MCU.

[0036] The second method is to communicate through SPI, MCU is the master, AFE is the slave, the communication process strictly follows the SPI sequence, the AFE transmits data to MCU for the next SPI clock signal SCK after MCU transmits, the waveform on the daisy chain is specially designed, the 4-wire SPI signal is converted to a 2-wire differential signal for transmission, this method is designed to satisfy the SPI sequence between MCU and the first AFE or Transfer, the baud rate of the daisy chain is designed to be twice the SPI baud rate.

[0037] To solve the above problems, the embodiments of the present application add a configurable automatic scheduling system to the battery management chip, a multi-chip clock automatic synchronization technology, and realize a daisy-chain physical layer solution of the multi-chip clock automatic synchronization technology.

[0038] The embodiment of the present application adds an automatic scheduling system Scheduler System configured on the conventional battery management chip AFE, and in this mode, the Scheduler can automatically schedule functions such as voltage collection, temperature collection, bus extension device GPIO configuration, equalization on, equalization off, fault diagnosis, etc. Here, the controller MCU needs to configure the Scheduler System first, and then turn on the Scheduler System. Since the configuration units and specific sequences in the scheduling can have various combinations, this application only takes the following one combination as an example, but the method in the embodiment of the present application can be applied to all other automatic scheduling systems.

[0039] Example 1 The technical solution of the present application and how the technical solution of the present application solves the above problems are described in detail below through specific examples. The following specific examples can be combined with each other, and the same or similar concepts or processes may be omitted in some examples. The following examples are described with reference to the drawings.

[0040] The chip communication method based on automatic clock synchronization provided in the present application has been made to solve the above problems of the prior art. The chip communication method based on automatic clock synchronization can be applied to the schematic diagram of the architecture of a chip communication circuit based on automatic clock synchronization shown in Figure 1. As shown in Figure 1, the chip communication circuit based on automatic clock synchronization includes: It includes a controller (eg, the microcontroller shown in FIG. 1) that is used to send control instructions.

[0041] Optionally, the control command is an ISO-SPI command, which is a register read or write command sent to the battery management chip AFE, such as a voltage collection command, a sampling result read command, an equalization command, an equalization stop command, etc.

[0042] In an optional embodiment, for example, when the MCU needs to read the voltage data of the battery cell, it sends a voltage collection command to the AFE, the MCU waits for the AFE to complete the sampling, the MCU sends a sampling result read command to the AFE and reads the corresponding result. Also, for example, the MCU sends an equalization command, the AFE performs equalization, the MCU sends an equalization stop command, the AFE stops equalization. The fault diagnosis function also has a similar mechanism, and in the whole process, the MCU plays a scheduling role and controls the stopping and starting of the AFE function.

[0043] The multiple battery management chips (battery management chip 1, battery management chip 2, battery management chip 3, ... battery management chip n) include a first battery management chip 1 and other battery management chips other than the first battery management chip (e.g., battery management chip 2, battery management chip 3, ... battery management chip n), among which the first battery management chip and the controller are connected via a serial peripheral interface, and separate communication is performed between different battery management chips using a daisy chain with a sinusoidal sawtooth waveform.

[0044] The first battery management chip responds to the received control command by determining clock synchronization information of the first battery management chip, replacing the chip select enable signal in the control command with a clock synchronization signal having the clock synchronization information of the first battery management chip, and obtaining a new control command, in which other data in the original control command is transmitted unchanged to the subsequent battery management chip, and the subsequent battery management chip obtains the clock synchronization information from the clock synchronization signal (also called a synchronization signal) and obtains control information from the other data, and transmits the new control command to the other battery management chip, thereby causing the other battery management chip to perform clock automatic synchronization based on the clock synchronization information held in the new control command.

[0045] FIG. 1 shows the hardware connection interface between the microcontroller MCU and multiple battery management chips AFE, and between the first battery management chip AFE1 and other subsequent battery management chips AFE. As for the connection method of the entire system, the microcontroller MCU and the first battery management chip AFE1 communicate via SPI, and the first battery management chip AFE1 and the second battery management chip AFE2, and all subsequent battery management chips communicate separately using a daisy chain, which is specifically a sine sawtooth waveform.

[0046] In an optional embodiment, each battery management chip AFE generally includes an ADC sampling module, an equalization control module, a fault diagnosis module, a register module and a data storage module, where the ADC sampling module is mainly used for cell voltage sampling, cell temperature sampling and total voltage sampling of the battery pack, the equalization control module is used for active and passive equalization control, the fault diagnosis module is used for fault diagnosis such as detection of open circuit of the voltage collection line, open circuit of the equalization line, battery over-protection and the like, the register module is used for configuring the AFE, and the data storage module is used for storing sampling results and system state information.

[0047] In an embodiment of the present application, after receiving a control command sent from a controller MCU, a first battery management chip among the plurality of battery management chips analyzes the control command to determine a chip select enable signal in the control command, determines the waveform of the chip select enable signal CS as shown in FIG. 2, and based on the falling edge and rising edge of the waveform of the chip select enable signal, replaces the chip select enable signal with the clock synchronization information automatically generated by the first battery management chip connected to the MCU in the form of a clock synchronization signal, and transmits the new control command to other battery management chips among the plurality of battery management chips through a daisy chain of a sine sawtooth waveform until it is transmitted to the last battery management chip, and thus automatic sequence synchronization can be realized among the plurality of battery management chips.

[0048] In the embodiment of the present application, the daisy chain used for the isolated communication between different battery management chips is a sine sawtooth wave, which has the advantages of high signal interference resistance and is also easy to recognize.

[0049] In an optional embodiment, the controller is further used to configure scheduling mode parameters of the battery management chip when initializing each of the battery management chips, and to control the battery management chip to repeatedly execute a communication task based on the scheduling mode parameters by sending a scheduling mode start command to the battery management chip.

[0050] In one example, the scheduling mode parameters include at least one of an equalization on time, a rest time after equalization, a warm-up time before a self-test of the equalization circuit, a warm-up time before an open circuit self-test of the battery collection line, and a time required to collect the battery voltage or temperature.

[0051] In an embodiment of the present application, when the battery management chip is initialized, scheduling mode parameters such as voltage collection, temperature collection, GPIO configuration, passive equalization, and fault diagnosis can be configured, and then a reduced command can be used to cause the battery management chip to collect data according to the configured manner.

[0052] The sequence diagram of the operation of the optional scheduling mode as shown in FIG. 3 is optimized and designed according to the actual operating situation in order to reduce the power consumption of the communication between the battery management chips. As shown in FIG. 3, the battery management chip state of the battery management chip can be divided into an operating state and a standby state, the diagnostic mode state of the battery management chip can be divided into an on state and an off state, and the normal mode state of the battery management chip can be divided into an on state and an off state. In FIG. 3, the commands executed in the operating state of the battery management chip include, but are not limited to, voltage sampling, even channel equalization, equalization stop, voltage sampling, odd channel equalization, equalization stop, etc., and after the standby state, the commands executed in the operating state of the battery management chip can include, but are not limited to, even channel equalization (pre-sampling, voltage sampling), odd channel equalization (pre-sampling, voltage sampling), and open circuit detection (pre-sampling, voltage sampling). As shown in FIG. 3, after the chip configuration setting, the equalization register acting line can also be sampled and the corresponding equalization processing command can be executed. The voltage pre-sampling register can then be sampled to execute a corresponding stop equalization command, and the voltage sampling register can then be sampled to execute a corresponding sampling command.

[0053] In one example, after setting the above scheduling mode parameters, the MCU may send a command to start the scheduling mode Scheduler System, and the battery management chip may repeatedly execute according to the scheduling period according to the configuration time of the initialization parameters. The voltage and temperature information collected at each stage is automatically stored in a register, for example, the voltage and temperature information in the normal collection mode may be stored, and the voltage information which is the data source for realizing the diagnostic function in the self-diagnosis process of the equalization circuit may be stored, and the voltage information (data source for realizing the diagnostic function) in the open circuit self-diagnosis process of the battery collection line may be stored. In the embodiment of the present application, when the battery management chip is initialized, the function parameters such as voltage collection, temperature collection, GPIO configuration, passive equalization, and fault diagnosis are configured, and then the battery management chip can be made to collect data according to the configuration manner by the reduction command. Compared with the case where the MCU alone sends the above commands to realize these functions, the number of communication messages can be reduced by 60%, and the communication power consumption can be reduced by 60%.

[0054] According to the embodiment of the present application, the MCU uses reduced commands to realize the battery voltage collection, temperature collection, passive equalization and diagnostic functions, reducing the number of commands sent by the MCU message, thereby reducing the communication power consumption by 60%.The multi-chip clock automatic synchronization technology can ensure the collection synchronism of all batteries <1ms (assuming that the MCU sends a command to the battery management chip at least every 1s), and the daisy chain used to perform isolated communication between different battery management chips in the solution of the present application is a sine sawtooth wave, which has the advantages of high signal interference resistance and easy recognition.

[0055] In an optional embodiment, each battery unit has multiple battery slave control units CSC to monitor cell voltage, temperature information of each battery cell or battery pack therein, and the CSC can also report the collected related information to the battery control unit BMU, and then the CSC performs cell voltage equalization according to the command of the BMU.

[0056] In an optional embodiment, the other battery management chip further determines whether the clock synchronization information in the new control command is the same as its own clock information each time it receives a new control command, and if it determines that the clock synchronization information and the own clock information are different, performs a calibration process on the own clock information based on the clock synchronization information to perform clock automatic synchronization.

[0057] In another optional embodiment, the other battery management chip is further used to determine whether the clock synchronization information held in the at least two new control commands is the same when receiving at least two new control commands, and if it determines that the clock synchronization information held in the at least two new control commands is different, perform a calibration process on its own clock information based on the last received clock synchronization information to perform clock automatic synchronization.

[0058] The clock automatic synchronization daisy-chain communication method provided in the embodiment of the present application allows the controller MCU to control the battery management chip with reduced instructions to realize battery voltage collection, temperature collection, passive equalization and diagnosis functions, and ensures that the collection synchronism of all batteries is less than 1 ms (assuming that the MCU sends a control command to the battery management chip at most once every other second), reducing the number of control commands sent by the MCU message and reducing communication power consumption by 60%.

[0059] In an optional embodiment, the daisy-chain communication technology of the embodiment of the present application adds a sequence automatic synchronization design, and after the first battery management chip receives a control command from the controller, the data analyzer in the first battery management chip can analyze the control command to determine a chip select enable signal in the control command, and determine the waveform of the chip select enable signal CS as shown in FIG. 2. Based on the falling edge and rising edge of the waveform of the chip select enable signal, the clock synchronization information automatically generated by the first battery management chip connected to the MCU can be replaced with the chip select enable signal in the form of a clock synchronization signal at, but not limited to, 0xAA, 0x55 (0xAA, 0x55 are just examples) shown in FIG. 2, so as to obtain a new control command.

[0060] In an embodiment of the present application, a daisy chain of a sine sawtooth waveform is used to perform decoupled communication between different battery management chips. In one example, the waveform diagram of the sine sawtooth waveform is as shown in FIG. 4. The correspondence between the pulse, level, and waveform in FIG. 4 is as shown in Table 1 below. Here, the design for the level is Vp2=2*Vp1, and the design for the time is t2=2*t1.

[0061] [Table 1]

[0062] In an optional embodiment, in the optional circuit schematic diagram for showing the connection relationship between the controller and the first battery management chip as shown in FIG. 5, in the embodiment of the present application, the controller MCU is a main station (master), and the battery management chip is a sub station (slave), where SPI is a serial peripheral interface, MISO is a master receive slave transmit signal line of the SPI, MOSI is a master transmit slave receive signal line of the SPI, SCK is a clock signal line of the SPI, CS is a chip select enable line of the SPI, TX is transmit, RX is receive, SP is a high side of the daisy chain differential communication, SM is a low side of the daisy chain differential communication, and SS is a CS signal of the SPI.

[0063] Still as shown in FIG. 5, the controller and the first battery management chip respectively include a data transmission analyzer, a two-stage parallel current generator, a data analyzer, and a sequence controller. Here, the data transmission analyzer is used to convert the data bit 0 or 1 into a three-level sawtooth pulse with half the pulse width t1. The two-stage parallel current generator is used to generate a three-level 0V, Vp1 and Vp2 sawtooth waveform. The data analyzer is used to detect the pulse with pulse width t1 from the data received by the master port and timing controller, and trigger a comparator to compare the input voltage with two reference voltages Vp1 and Vp2, and determine that it is data 0 or 1. The sequence controller is used to control the sequence synchronization between multiple battery management chips.

[0064] The master controller also includes a system synchronization signal generator for filling the front and rear ends of the data area with a 16-bit synchronous clock synchronization signal and sending it to the slave port, where each data bit has a pulse width of half t2, and uses a two-stage current generator to generate a three-stage sawtooth waveform for modulating the data bits.

[0065] The slave battery management chip includes a system synchronization signal analyzer that detects a pulse with pulse width=t2 from the data received by the master port and timing controller, and triggers a two-level voltage comparator to determine whether the data is 0 or 1 when it finds half the pulse width t2.

[0066] In the conventional MCU controls the battery management chip by sending related commands such as voltage collection, temperature collection, GPIO configuration, equalization on, equalization off, fault diagnosis control, etc. via messages to control the battery management chip, which requires a lot of commands. The embodiment of the present application can reduce these commands by configuring automatic scheduling function parameters, so that the MCU only needs to configure the scheduling function parameters of these functions at initialization, pre-set the behavior and sequence of these scheduling function parameters, and periodically read the data stored in the battery management chip.

[0067] According to the embodiment of the present application, the MCU uses reduced commands to realize the battery voltage collection, temperature collection, passive equalization and diagnostic functions, reducing the number of commands sent by the MCU message, thereby reducing the communication power consumption by 60%.The multi-chip clock automatic synchronization technology can ensure the collection synchronism of all batteries <1ms (assuming that the MCU sends a command to the battery management chip at least every 1s), and the daisy chain used to perform isolated communication between different battery management chips in the solution of the present application is a sine sawtooth wave, which has the advantages of high signal interference resistance and easy recognition.

[0068] Example 2 An embodiment of the present application further provides an embodiment of a chip communication method based on automatic clock synchronization, and FIG. 6 is a flowchart of the chip communication method based on automatic clock synchronization provided in the embodiment of the present application. As shown in FIG. 6, the method includes the following S101 to S103.

[0069] In S101, in response to a received control command, the clock synchronization information of the first battery management chip is determined.

[0070] In S102, the chip select enable signal in the control command is replaced with a clock synchronization signal having the clock synchronization information of the first battery management chip, to obtain a new control command.

[0071] In S103, the new control command is transmitted to another battery management chip, so that the other battery management chip performs clock automatic synchronization according to the clock synchronization information carried in the new control command.

[0072] In one example, the control command is sent by the controller to a first battery management chip of the multiple battery management chips via a serial peripheral interface, and separate communication is performed between the different battery management chips using a daisy chain of a sinusoidal sawtooth waveform.

[0073] Optionally, the other battery management chip is a battery management chip other than the first battery management chip of a plurality of battery management chips.

[0074] Unlike the conventional sine wave or square wave (sine wave has relatively high interference resistance but is difficult to analyze and recognize by the chip and is prone to misjudgment of the waveform, while square wave is easy to recognize but has low interference resistance and is prone to waveform distortion), in the embodiment of the present application, separate communication is performed between different battery management chips using a daisy chain of a sine sawtooth waveform, which has the advantage of high interference resistance and is easy to recognize, and has relatively high practical value and innovation.

[0075] In an embodiment of the present application, after a first battery management chip among the multiple battery management chips receives a control command transmitted from a controller MCU, the first battery management chip can supplement its own clock synchronization information in the control command by replacing the chip select enable signal CS in the control command, and transmit the new control command to other battery management chips among the multiple battery management chips via a daisy chain until it is transmitted to the last battery management chip.

[0076] The daisy-chain communication technology of the embodiments of the present application adds an automatic sequence synchronization design, thus not only realizing a reduction in the power consumption of daisy-chain communication, but also maintaining the clock synchronization of each battery management chip, and achieving both the technical effects of communication interference resistance and signal recognition.

[0077] More importantly, the daisy chain used for the isolated communication between different battery management chips is a sine sawtooth wave, which has the advantages of high signal interference resistance and easy recognition. This can solve the problems of high communication power consumption and unsynchronized clocks between each battery management chip in the conventional daisy chain communication method, and not only can it reduce the power consumption of daisy chain communication, but also it can maintain the clock synchronization of each battery management chip, and achieve both the technical effects of communication interference resistance and signal recognition.

[0078] In the embodiment of the present application, the controller and the first battery management chip communicate using a serial peripheral interface, and the different battery management chips communicate separately using a daisy chain with a sine sawtooth waveform. After the first battery management chip receives a control command, it determines the current clock synchronization information, and then replaces the chip select enable signal in the control command with the clock synchronization signal having the clock synchronization information, and obtains a new control command, so that the subsequent battery management chips can automatically synchronize their clocks according to the clock synchronization information in the new control command. This solves the problem of high communication power consumption and unsynchronized clocks of each battery management chip in the conventional daisy chain communication method, and not only realizes the reduction of power consumption of daisy chain communication, but also maintains the clock synchronization of each battery management chip, and achieves both the technical effects of anti-interference in communication and signal recognition.

[0079] In the conventional MCU controls the battery management chip by sending related commands such as voltage collection, temperature collection, GPIO configuration, equalization on, equalization off, and fault diagnosis control via messages to control the battery management chip, which requires a lot of commands. The embodiments of the present application can reduce these commands by configuring automatic scheduling function parameters. The MCU configures the scheduling function parameters of these functions only at initialization, and by presetting the behavior and sequence of these scheduling function parameters, it only needs to periodically read the data stored in the battery management chip.

[0080] In an optional embodiment, the above chip communication method based on clock automatic synchronization further includes the following method steps before determining the clock synchronization information of the first battery management chip in response to the received control command:

[0081] Upon initialization of each said battery management chip, a scheduling mode parameter of said battery management chip is configured.

[0082] In response to receiving a scheduling mode start command, the battery management chip repeatedly executes a communication task based on the scheduling mode parameters.

[0083] In one example, the scheduling mode parameters include at least one of an equalization on time, a rest time after equalization, a warm-up time before a self-test of the equalization circuit, a warm-up time before an open circuit self-test of the battery collection line, and a time required to collect the battery voltage or temperature.

[0084] In one example, after setting the above scheduling mode parameters, the MCU may send a command to start the scheduling mode Scheduler System, and the battery management chip may repeatedly execute according to the scheduling period according to the configuration time of the initialization parameters. The voltage and temperature information collected at each stage is automatically stored in the register, for example, the voltage and temperature information in the normal collection mode may be stored, and the voltage information (data source for realizing the diagnosis function) in the self-diagnosis process of the equalization circuit may be stored. In the embodiment of the present application, the function parameters such as voltage collection, temperature collection, GPIO configuration, passive equalization, and fault diagnosis are configured when the battery management chip is initialized, and then the reduction command is used to make the battery management chip collect data according to the configuration mode. Compared with the case where the MCU alone sends the above commands to realize these functions, the number of communication messages can be reduced by 60%, and the communication power consumption can be reduced by 60%.

[0085] According to the embodiment of the present application, the MCU uses reduced commands to realize the battery voltage collection, temperature collection, passive equalization and diagnostic functions, reducing the number of commands sent by the MCU message, thereby reducing the communication power consumption by 60%.The multi-chip clock automatic synchronization technology can ensure the collection synchronism of all batteries <1ms (assuming that the MCU sends a command to the battery management chip at least every 1s), and the daisy chain used to perform isolated communication between different battery management chips in the solution of the present application is a sine sawtooth wave, which has the advantages of high signal interference resistance and easy recognition.

[0086] In an optional embodiment, the step of causing the other battery management chip to perform clock automatic synchronization based on the clock synchronization information carried in the new control instruction includes the steps of:

[0087] Each time the other battery management chip receives the new control command, it compares whether the clock synchronization information contained in the new control command is the same as its own clock information.

[0088] If it is determined that the clock synchronization information and the local clock information are different, a calibration process is performed on the local clock information based on the clock synchronization information, thereby executing automatic clock synchronization.

[0089] In an optional embodiment, every time another battery management chip receives a new control command, it compares whether the clock synchronization information in the new control command is the same as its own clock information, and if it determines that the clock synchronization information and the own clock information are different, it performs a calibration process on the own clock information based on the clock synchronization information to perform automatic clock synchronization.

[0090] In an optional embodiment, the method further comprises the steps of:

[0091] When the other battery management chip receives the at least two new control commands, it compares whether the clock synchronization information carried in the at least two new control commands is the same.

[0092] If it is determined that the clock synchronization information included in at least two of the new control commands is different, a calibration process is performed on the local clock information based on the last received clock synchronization information, thereby executing automatic clock synchronization.

[0093] In another optional embodiment, when another battery management chip receives at least two new control commands, it compares whether the clock synchronization information held in the at least two new control commands is the same, and if it determines that the clock synchronization information held in the at least two new control commands is different, it performs a calibration process on its own clock information based on the last received clock synchronization information, and performs clock automatic synchronization.

[0094] The clock automatic synchronization daisy-chain communication method provided in the embodiment of the present application allows the controller MCU to control the battery management chip with reduced instructions to realize battery voltage collection, temperature collection, passive equalization and diagnosis functions, and ensures that the collection synchronism of all batteries is less than 1 ms (assuming that the MCU sends a control command to the battery management chip at most once every other second), reducing the number of control commands sent by the MCU message and reducing communication power consumption by 60%.

[0095] In addition, the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) related to this application are all information and data authorized by the user or fully authorized by each party, and the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and a corresponding operation portal must be provided to allow the user to select approval or rejection.

[0096] Example 3 According to one or more embodiments of the present application, a chip communication device based on clock automatic synchronization is provided. FIG. 7 is a structural block diagram of a chip communication device based on clock automatic synchronization provided in an embodiment of the present application. As shown in FIG. 7, the chip communication device includes: a determining module 601 used for determining clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; a replacement module 602, which is used to write clock synchronization information of the first battery management chip into the control instruction according to the chip select enable signal, and obtain a new control instruction; a synchronization module 603 used to transmit the new control command to another battery management chip to cause the other battery management chip to perform automatic clock synchronization based on the clock synchronization information contained in the new control command, where the other battery management chip is a battery management chip other than the first battery management chip among a plurality of battery management chips, and a synchronization module 603 for performing separated communication between different battery management chips using a daisy chain with a sinusoidal sawtooth waveform.

[0097] According to one or more embodiments of the present application, the chip communication device further comprises: A configuration module used to configure a scheduling mode parameter of each of the battery management chips when the battery management chips are initialized, the scheduling mode parameter including at least one of an equalization on time, a resting time after equalization, a preparation time before a self-test of an equalization circuit, a preparation time before an open circuit self-test of a battery sampling line, and a time required to collect a battery voltage or temperature; and an execution module used for repeatedly executing a communication task based on the scheduling mode parameters in response to the battery management chip receiving a scheduling mode start command.

[0098] According to one or more embodiments of the present application, the synchronization module comprises: a comparison unit used for comparing whether the clock synchronization information in the new control command is the same as the self-clock information in the new control command every time the other battery management chip receives the new control command; and a synchronization unit used for performing a calibration process on the local clock information based on the clock synchronization information to perform automatic clock synchronization if it is determined that the clock synchronization information and the local clock information are different.

[0099] According to one or more embodiments of the present application, the chip communication device further comprises: a comparison module, which is used for comparing whether the clock synchronization information in the at least two new control commands is the same when the other battery management chip receives the at least two new control commands; and a post-calibration synchronization module, which is used to perform a calibration process on the self-clock information based on the last received clock synchronization information to perform automatic clock synchronization if it is determined that the clock synchronization information held in at least two of the new control commands is different.

[0100] In an exemplary embodiment, the present invention includes a processor and a memory coupled to the processor, the memory storing computer executable instructions; There is further provided an electronic device in which the processor executes computer executable instructions stored in the memory to implement any of the methods described above.

[0101] In an exemplary embodiment, embodiments of the present application further provide a computer readable storage medium having stored thereon computer executable instructions that, when executed by a processor, are used to implement any of the above methods.

[0102] In an exemplary embodiment, embodiments of the present application further provide a computer program product including a computer program which, when executed by a processor, implements any of the above methods.

[0103] In order to realize the above embodiment, the embodiment of the present application further provides an electronic device. Referring to Figure 8, a schematic diagram of the structure of an electronic device 700 applied to realize the embodiment of the present application is shown, and the electronic device 700 may be a terminal device or a server.

[0104] 8, the electronic device 700 may include a processing unit (e.g., a central processing unit, a graphics processing unit) 701 that can execute various appropriate operations and processes based on programs stored in a read only memory (ROM) 702 or programs loaded from a storage device 708 into a random access memory (RAM) 703. The RAM 703 further stores various programs and data necessary for the operation of the electronic device 700. The processing unit 701, the ROM 702, and the RAM 703 are interconnected via a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0105] Typically, input devices 706 including, for example, a touch panel, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc., output devices 707 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc., storage devices 708 including, for example, a magnetic tape, a hard disk, etc., and communication devices 709 can be connected to the I / O interface 705. The communication devices 709 allow the electronic device 700 and other devices to communicate wirelessly or via wires to exchange data. Although FIG. 8 shows the electronic device 700 having various devices, it should be understood that it is not necessary to implement or include all of the devices shown. Alternatively, more or fewer devices can be implemented or included.

[0106] In particular, according to an embodiment of the present application, the process described above with reference to the flowcharts may be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product including a computer program loaded onto a computer-readable medium, the computer program including a program code for performing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via the communication device 709, or installed from the storage device 708, or installed from the ROM 702. When the computer program is executed by the processing device 701, it performs the functions defined in the method of the embodiment of the present application.

[0107] In this application, the computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above. The computer-readable storage medium may be, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or any combination of the above. More specific examples of the computer-readable storage medium include, but are not limited to, an electrical connection having one or more leads, a portable computer magnetic disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), optical fiber, a compact disk read-only memory (CD-ROM), an optical storage element, a magnetic storage element, or any suitable combination of the above. In this application, the computer-readable storage medium may be any tangible medium that contains or stores a program that can be used in or in conjunction with an instruction execution system, device, or element. In this application, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, into which computer-readable program code is loaded. Such propagated data signals may take a variety of forms, including, but not limited to, electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may be any computer-readable medium other than a computer-readable storage medium, capable of transmitting, propagating, or transmitting a program for use in or in conjunction with an instruction execution system, apparatus, or device. The program code contained in the computer-readable medium may be transmitted by any suitable medium, including, but not limited to, wire, optical cable, RF (radio frequency), etc., or any suitable combination of these.

[0108] The computer readable medium may be included in the electronic device or may exist separately and not integrated into the electronic device.

[0109] The computer-readable medium has one or more programs loaded thereon, which, when executed by the electronic device, causes the electronic device to perform the methods shown in the above embodiments.

[0110] Computer program code for carrying out the operations of the present application may be written in one or more programming languages, or any combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and even conventional process-oriented programming languages ​​such as "C" or similar programming languages. The program code may run entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (e.g., via the Internet by an Internet Service Provider).

[0111] The flowcharts and block diagrams in the drawings illustrate possible system architectures, functions, and operations of the systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flowcharts or block diagrams may represent a module, program segment, or part of code, which includes one or more executable instructions for implementing a certain logical function. It should also be noted that in some alternative implementations, the functions depicted in the blocks may be implemented in a different order than that depicted in the drawings. For example, two blocks shown in succession may be executed substantially in parallel, or may be executed in a reverse order depending on the function. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that executes a certain function or operation, or by a combination of dedicated hardware and computer instructions.

[0112] The units according to the embodiments of the present application may be realized in the form of software or in the form of hardware, and the names of the units do not limit the units themselves in some cases.

[0113] The functions described herein above may be performed at least in part by one or more hardware logic components, including, but not limited to, exemplary hardware logic components including field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard components (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), and the like.

[0114] In the context of this application, a machine-readable medium may be a tangible medium that can contain or store a program for use in or in connection with an instruction execution system, device, or apparatus. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or apparatus, or any suitable combination of the above. More specific examples of machine-readable storage media include an electrical connection by one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0115] Those skilled in the art will readily contemplate other embodiments of the present application from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any modifications, uses or adaptations of the present application, which modifications, uses or adaptations follow the general principles of the present application and include means well known or commonly used in the art that are not disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the present application being indicated by the following claims.

[0116] It will be understood that the present application is not limited to the exact construction described above and shown in the drawings, and various modifications and changes can be made without departing from the scope thereof, which is limited only by the appended claims.

Claims

1. In a chip communication circuit based on clock automatic synchronization, the chip communication circuit comprises: A controller used for transmitting control instructions; a plurality of battery management chips including a first battery management chip and another battery management chip other than the first battery management chip, the first battery management chip and the controller are connected via a serial peripheral interface, and different battery management chips perform isolated communication using a daisy chain of a sinusoidal sawtooth waveform; the first battery management chip responds to the received control command by determining clock synchronization information of the first battery management chip, replacing a chip select enable signal in the control command with a clock synchronization signal having the clock synchronization information of the first battery management chip, obtaining a new control command, and transmitting the new control command to another battery management chip, thereby causing the other battery management chip to perform automatic clock synchronization based on the clock synchronization information in the new control command.

2. 2. The chip communication circuit of claim 1, wherein the controller is further used to configure scheduling mode parameters of the battery management chips when initializing each of the battery management chips, and to control the battery management chips to repeatedly execute communication tasks based on the scheduling mode parameters by sending a scheduling mode start command to the battery management chips, and the scheduling mode parameters include at least one of an equalization on time, a resting time after equalization, a preparation time before a self-test of an equalization circuit, a preparation time before an open circuit self-test of a battery collection line, and a time required to collect a battery voltage or temperature.

3. 2. The chip communication circuit according to claim 1, wherein the other battery management chip further determines whether the clock synchronization information contained in the new control command is the same as the clock information of the other battery management chip each time the other battery management chip receives the new control command, and if it determines that the clock synchronization information is different from the clock information of the other battery management chip, performs a calibration process on the clock information of the other battery management chip based on the clock synchronization information, thereby performing automatic clock synchronization.

4. The chip communication circuit according to any one of claims 1 to 3, characterized in that, when the other battery management chip receives at least two of the new control commands, it determines whether the clock synchronization information held in the at least two new control commands is the same, and if it determines that the clock synchronization information held in the at least two new control commands is different, it is used to perform a calibration process on the clock information of the other battery management chip based on the last received clock synchronization information, thereby performing automatic clock synchronization.

5. determining clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; replacing a chip select enable signal in the control command with a clock synchronization signal having clock synchronization information of the first battery management chip to obtain a new control command; a step of transmitting the new control command to another battery management chip, causing the other battery management chip to perform automatic clock synchronization based on the clock synchronization information contained in the new control command, the other battery management chip being a battery management chip other than the first battery management chip among a plurality of battery management chips, and a step of performing separated communication between different battery management chips using a daisy chain with a sinusoidal sawtooth waveform.

6. configuring a scheduling mode parameter of each of the battery management chips at the initialization of the battery management chips, the scheduling mode parameter including at least one of an equalization on time, a resting time after equalization, a preparation time before a self-test of an equalization circuit, a preparation time before an open circuit self-test of a battery sampling line, and a time required to collect a battery voltage or temperature; 6. The chip communication method of claim 5, further comprising: in response to the battery management chip receiving a scheduling mode start command, repeatedly executing a communication task based on the scheduling mode parameters.

7. a determination module used to determine clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; a replacement module used to replace a chip select enable signal in the control command with a clock synchronization signal having clock synchronization information of the first battery management chip to obtain a new control command; a synchronization module used to transmit the new control command to another battery management chip to cause the other battery management chip to perform automatic clock synchronization based on the clock synchronization information contained in the new control command, the other battery management chip being a battery management chip other than the first battery management chip among a plurality of battery management chips, and a synchronization module which performs separate communication between different battery management chips using a daisy chain with a sinusoidal sawtooth waveform.

8. a processor and a memory coupled to the processor; the memory storing computer executable instructions; 7. An electronic device, comprising: a processor that executes computer-executable instructions stored in the memory to implement the chip communication method according to claim 5 or 6.

9. A computer-readable storage medium having stored thereon computer-executable instructions that are used to implement the chip communication method according to claim 5 or 6 when executed by a processor.

10. A computer program product which, when executed by a processor, implements the chip communication method according to claim 5 or 6.

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