Electronic structure, electronic structure substrate, electronic device, display device, and manufacturing method for electronic device

The electronic structure's optimized insulating layer with protrusions simplifies the manufacturing process by allowing complete sacrificial layer removal and reliable bonding to a circuit board, addressing the complexity of precise etching control in conventional methods.

JP2025018048APending Publication Date: 2025-02-06OKI ELECTRIC INDUSTRY CO LTD
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Patent Information

Application Number
JP2023121445
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-07-26
Publication Date
2025-02-06

AI Technical Summary

Technical Problem

Conventional methods for manufacturing electronic devices require precise control of sacrificial layer etching, complicating the process and making it difficult to bond the electronic structure to a substrate, leading to potential variations and complexity.

Method used

The electronic structure is designed with an insulating layer having protrusions that do not overlap with functional elements, where the protruding length and thickness ratios are optimized (D1≦D2×1/2 and D1≦D3×1/2) to minimize stress and simplify the bonding process, allowing complete removal of the sacrificial layer without precise etching control.

Benefits of technology

This design simplifies the manufacturing process by eliminating the need for precise etching control, ensures reliable bonding to a circuit board, and reduces stress on functional elements, thereby improving manufacturing efficiency and consistency.

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Abstract

To simplify a manufacturing process of an electronic device.SOLUTION: A functional film 10 as an electronic structure includes: a base layer 13 as an insulating layer; and a functional element provided on a first surface C1 of the base layer 13. The base layer 13 has a protrusion 13a at a position not overlapping with the functional element when viewed in the Z-direction (first direction) perpendicular to the first surface C1 on the second surface C2 on the opposite side of the first surface C1. The protrusion 13a has a third surface C3 which faces the same direction as the second surface C2. The thickness D2 between the first surface C1 and the second surface C2 of the base layer 13, and the shortest distance D3 in the surface parallel to the first surface C1 from the protrusion 13a to the functional element satisfy D1≤D2×1 / 2 and D1≤D3×1 / 2.SELECTED DRAWING: Figure 9
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Description

[Technical field]

[0001] The present disclosure relates to an electronic structure, an electronic structure substrate, an electronic device, a display device, and a method for manufacturing an electronic device. [Background technology]

[0002] There is known an electronic device having a functional film (electronic structure) including a functional element and a circuit board. For example, Patent Document 1 discloses a technique in which a functional film is formed on a sacrificial layer on a substrate (formation substrate) separate from the circuit board, the sacrificial layer is etched to reduce the adhesive strength, and then the functional film is separated from the sacrificial layer and transferred to the circuit board. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2023-74428 A (see abstract) Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the conventional technology, the amount of etching of the sacrificial layer must be precisely controlled, which complicates the manufacturing process. Therefore, there is a need to simplify the manufacturing process of electronic devices and to simplify the bonding of electronic structures to a substrate (circuit board) to which they are transferred.

[0005] The present disclosure aims to simplify the manufacturing process of electronic devices. [Means for solving the problem]

[0006] The electronic structure of the present disclosure includes an insulating layer and a functional element formed on a first surface of the insulating layer. The insulating layer has a convex portion on a second surface opposite to the first surface at a position that does not overlap with the functional element when viewed in a first direction perpendicular to the first surface. The convex portion has a third surface facing the same side as the second surface. A thickness D2 between the first and second surfaces of the insulating layer and a shortest distance D3 from the convex portion to the functional element in a plane parallel to the first surface satisfy D1≦D2×1 / 2 and D1≦D3×1 / 2. Effect of the Invention

[0007] The electronic structure of the present disclosure is manufactured by forming an insulating layer on a substrate so as to cover a sacrificial layer, providing a functional element on the insulating layer, and removing the sacrificial layer. The electronic structure can be bonded to a circuit board on the first and second surfaces. Since the sacrificial layer can be completely removed during the manufacture of the electronic structure, precise control of the amount of etching is not required, and the manufacturing process can be simplified. In addition, since D1≦D2×1 / 2 and D1≦D3×1 / 2 are satisfied, the stress acting on the functional element during bonding to the transfer substrate (circuit board) can be minimized. In other words, bonding of the electronic structure to the circuit board can be simplified. [Brief description of the drawings]

[0008] [Figure 1] 3 is a flowchart showing a method for manufacturing the electronic device according to the first embodiment. [Diagram 2] 4A is a cross-sectional view showing a step of forming a sacrificial layer in the first embodiment, and FIG. 4B is a cross-sectional view showing a step of forming a base layer. [Diagram 3] 2 is a plan view showing a state in which a sacrificial layer and a base layer are formed on a substrate in the first embodiment. FIG. [Figure 4] 5A and 5B are cross-sectional views showing a bonding step of the functional element in the first embodiment. [Diagram 5] 2 is a plan view showing a state in which a functional element is bonded to a base layer on a substrate in the first embodiment. FIG. [Figure 6]4A and 4B are cross-sectional views showing a step of forming an opening in an underlayer in the first embodiment, FIG. 4C is a cross-sectional view showing a step of forming a vertical wiring, and FIG. 4D is a cross-sectional view showing a step of forming a lead-out wiring. [Figure 7] 1 is a plan view showing an electronic structure substrate including a functional film as the electronic structure of the first embodiment. [Figure 8] 1A and 1B are cross-sectional views showing an electronic structure substrate according to a first embodiment. [Figure 9] 4A is a cross-sectional view showing a step of removing a sacrificial layer in the first embodiment, and FIG. 4B and FIG. 4C are cross-sectional views showing a step of separating a functional film. [Figure 10] 1A and 1B are cross-sectional views showing a functional film transfer step in the first embodiment, and FIG. 1C and 1D are cross-sectional views showing a stamp removal step. [Figure 11] FIG. 1 is a plan view showing an electronic device according to a first embodiment. [Figure 12] 1A and 1B are cross-sectional views showing an electronic device according to a first embodiment. [Figure 13] 5A to 5F are cross-sectional views illustrating a method for manufacturing the electronic device according to the first embodiment. [Figure 14] 5A to 5E are cross-sectional views illustrating a method for manufacturing an electronic device according to a comparative example. [Figure 15] 1A and 1B are plan views showing electronic devices according to first and second modified examples of the first embodiment. [Figure 16] 1A and 1B are plan views showing electronic devices according to third and fourth modified examples of the first embodiment. [Figure 17] FIG. 11 is a plan view showing an electronic device according to a second embodiment. [Figure 18] 1A and 1B are cross-sectional views showing an electronic device according to a second embodiment. [Figure 19] 13A is a cross-sectional view showing a bonding step of a functional element in embodiment 2, FIG. 13B is a cross-sectional view showing a sacrificial layer removal step, and FIG. 13C is a cross-sectional view showing a functional film separation step. [Figure 20]13A is a cross-sectional view showing a transfer step of a functional film in accordance with the second embodiment, and FIG. 13B is a cross-sectional view showing a stamp removal step. [Figure 21] FIG. 1 is a plan view showing an example of a display device to which the electronic devices according to the first and second embodiments and the modified examples can be applied. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing an electronic device according to an embodiment will now be described with reference to the accompanying drawings. An electronic device has a functional element that performs a predetermined function.

[0010] The functional element of the electronic device is, for example, a photoelectric conversion element (light emitting element, light receiving element) such as an LED (light emitting diode). In this case, the electronic device can be used in a display device such as an LED display, an image sensor, or the like.

[0011] Furthermore, the functional element of the electronic device may be a diode, a transistor, a thyristor, etc. In this case, the electronic device can be used in a control IC (integrated circuit), a power semiconductor device, a logic circuit, etc.

[0012] The functional element of the electronic device may be a piezoelectric element, in which case the electronic device may be used as a pressure sensor, an actuator, a MEMS (Micro Electro Mechanical Systems), etc.

[0013] First Embodiment <Electronic device manufacturing method> Fig. 1 is a flowchart showing a method for manufacturing an electronic device according to embodiment 1. In step S101 (Fig. 1), a sacrificial layer 12 is formed on a substrate 11. Fig. 2(A) is a cross-sectional view showing a step of forming the sacrificial layer 12 on the substrate 11.

[0014] 2A is formed of an inorganic material such as Si, glass, sapphire, etc. The substrate 11 is also called a first substrate. The surface of the substrate 11 (the upper surface in the figure) is a smooth surface with a surface roughness of 5 nm or less.

[0015] For surface roughness, JIS_B_0601 specifies "arithmetic mean roughness Ra," "maximum height difference Ry," "root mean square roughness Rq," and "n-point average roughness Rz," but in this specification, "n-point average roughness Rz" is used as the surface roughness of each surface. For example, an atomic force microscope (AFM) is used to measure an area of ​​5 μm × 5 μm on the surface to be measured, and the calculated value of the n-point average roughness is obtained.

[0016] Specifically, from the planar image of the surface to be measured obtained by AFM, the n-point average roughness Rz is calculated using the following formula as the average value of the height (Rti) of the profile curve element over the reference length, in accordance with the measurement method of n-point average roughness Rz specified in JIS_B_0601.

[0017]

number

[0018] As a measuring instrument, for example, an AFM "L-trace II" manufactured by Hitachi High-Tech Fielding Corporation can be used, and as a measuring condition (measurement mode), for example, the "tapping AFM mode" of the "L-trace II" manufactured by Hitachi High-Tech Fielding Corporation can be used.

[0019] The measurement range is an arbitrary 5μm x 5μm range on the measurement target surface, the resolution is 512 pixels x 512 pixels, and the scan speed is 1μm / sec. From the planar image obtained by AFM, a step profile with a reference length of 5μm is obtained in an arbitrary horizontal direction (the same direction as the probe scanning direction), and the n-point average roughness Rz is calculated.

[0020] The sacrificial layer 12 is formed of, for example, SiO2 (silicon oxide) or Si3N4 (silicon nitride). Furthermore, the material is not limited to these, and may be, for example, an organic material. The sacrificial layer 12 is formed on the surface of the substrate 11 by sputtering, and then patterned into a predetermined shape (for example, a rectangular shape). The thickness of the sacrificial layer 12 is 10 nm to 2 μm. Furthermore, the surface of the sacrificial layer 12 is a smooth surface with a surface roughness of 5 nm or less.

[0021] In step S102 (FIG. 1), an underlying layer 13 serving as an insulating layer is formed on the substrate 11 so as to cover the sacrificial layer 12. FIG. 2(B) is a cross-sectional view showing a step of forming the underlying layer 13.

[0022] The base layer 13 is formed of, for example, an organic material, more specifically, an organic resist. However, the base layer 13 is not limited to an organic resist, and may be formed of any material that is not corroded by the etching solution used in the process of removing the sacrificial layer 12 (step S107 described later).

[0023] The underlayer 13 is formed on the surface of the substrate 11 by spin coating, and then patterned into the shape shown in Fig. 3. The thickness of the underlayer 13 (the thickness from the first surface C1 to the second surface C2 described below) is 100 nm to 10 µm.

[0024] Fig. 3 is a plan view showing a state in which an underlayer 13 is formed on a substrate 11 so as to cover a sacrificial layer 12. In Fig. 3, an X direction and a Y direction are defined as being perpendicular to each other in a plane parallel to the surface of the substrate 11. The direction perpendicular to the surface of the substrate 11 is defined as a Z direction. The underlayer 13 is, for example, rectangular with two sides in the X direction and two sides in the Y direction.

[0025] The length of the base layer 13 in the X direction is longer than the length of the sacrificial layer 12 in the X direction. On the other hand, the length of the base layer 13 in the Y direction is equal to the length of the sacrificial layer 12 in the Y direction. Therefore, the base layer 13 has convex parts 13a that protrude towards the substrate 11 on both sides of the sacrificial layer 12 in the X direction. On the other hand, the ends of the sacrificial layer 12 in the Y direction are not covered by the base layer 13 and are exposed.

[0026] 2(B), the surface of the base layer 13 opposite the substrate 11 is referred to as a first surface C1. The back surface of the base layer 13 in contact with the sacrificial layer 12 is referred to as a second surface C2. The protrusions 13a protrude toward the substrate 11 side beyond the second surface C2. The surface of the protrusions 13a in contact with the substrate 11 is referred to as a third surface C3.

[0027] The first surface C1, the second surface C2, and the third surface C3 of the underlayer 13 are all smooth surfaces with a surface roughness of 5 nm or less. This is because the underlayer 13 is formed on the surface of the substrate 11 (surface roughness of 5 nm or less) so as to cover the surface of the sacrificial layer 12 (surface roughness of 5 nm or less).

[0028] In step S103 (FIG. 1), functional elements 20R, 20G, and 20B are bonded to the surface of underlayer 13. Figures 4(A) and (B) are cross-sectional views showing the process of bonding functional elements 20R, 20G, and 20B to the surface of underlayer 13. Figure 4(A) is a cross-sectional view taken along line 4A-4A (XZ plane) in FIG. 5, which will be described later, and Figure 4(B) is a cross-sectional view taken along line 4B-4B (YZ plane) in FIG. 5.

[0029] 4(A) and (B), functional elements 20R, 20G, and 20B are bonded to the surface of the base layer 13. The functional elements 20R, 20G, and 20B are semiconductor thin films constituting LEDs (light-emitting diodes) and are also referred to as light-emitting elements (or functional parts). The functional elements 20R, 20G, and 20B are arranged side by side in the X direction and emit red, green, and blue light, respectively.

[0030] The functional elements 20R, 20G, and 20B are each formed by epitaxial growth on a semiconductor substrate, and then separated (peeled off) from the semiconductor substrate and individually transferred to the base layer 13. The functional elements 20R, 20G, and 20B are desirably bonded to the surface of the base layer 13 by intermolecular forces.

[0031] When there is no particular need to distinguish between the functional elements 20R, 20G, and 20B, they will be described as "functional element 20."

[0032] The functional element 20 has an upper contact layer 21, an emission layer 22, and a lower contact layer 23. Note that the emission layer 22 is formed by laminating an upper cladding layer, an active layer, and a lower cladding layer, but is illustrated in a simplified form.

[0033] The functional element 20 is patterned in advance before bonding to the underlayer 13 so that the lower contact layer 23 has a larger area than the upper contact layer 21 and the light emitting layer 22, as shown in FIG. 4(B).

[0034] The functional element 20 provided on the base layer 13 is not limited to a light-emitting element, but may be a diode, a transistor, a thyristor, or a piezoelectric element. The functional element 20 is not limited to one transferred from a semiconductor substrate, but may be formed on the base layer 13.

[0035] Fig. 5 is a plan view showing a state in which functional elements 20R, 20G, and 20B are bonded to the base layer 13 on the substrate 11. As shown in Fig. 5, the functional elements 20R, 20G, and 20B are disposed in the region between the convex portions 13a at both ends in the X direction of the base layer 13. In other words, when viewed in the Z direction, the functional elements 20R, 20G, and 20B and the convex portions 13a of the base layer 13 are positioned so as not to overlap each other.

[0036] In step S104 (FIG. 1), an opening 13h is formed in the underlayer 13. FIGS. 6(A) and 6(B) are cross-sectional views in the YZ plane showing the process of forming the opening 13h in the underlayer 13. As shown in FIGS. 6(A) and 6(B), the underlayer 13 is patterned to form the opening 13h that reaches from the first surface C1 to the second surface C2 of the underlayer 13. The opening 13h is also called a through hole.

[0037] The openings 13h are formed so that their positions in the X direction coincide with the positions in the X direction of the functional elements 20R, 20G, and 20B (see FIG. 7, which will be described later). The openings 13h are also formed on both sides of the functional element 20 in the Y direction.

[0038] In step S105 (FIG. 1), vertical wiring 14 is formed as a conductive member in opening 13h of underlayer 13. FIG. 6(C) is a cross-sectional view in the YZ plane showing a process of forming vertical wiring 14 in opening 13h of underlayer 13. Vertical wiring 14 is formed of, for example, gold (Au), aluminum (Al), or an alloy containing at least one of them. Vertical wiring 14 may also include a barrier layer or buffer layer of titanium (Ti), platinum (Pt), or the like. Vertical wiring 14 is formed to fill opening 13h by, for example, sputtering.

[0039] In step S106 (FIG. 1), lead wires 25, 26 are formed as a wiring layer from the functional element 20 to the vertical wire 14. FIG. 6D is a cross-sectional view in the YZ plane showing the process of forming the lead wires 25, 26.

[0040] 6(D) are formed of, for example, gold, aluminum, or an alloy containing at least one of them. The lead-out wiring 25 is formed so as to reach the vertical wiring 14 on one side in the Y direction (here, the +Y direction) from the upper contact layer 21 of the functional element 20. In addition, before forming the lead-out wiring 25, an interlayer insulating film 27 is formed from the side of the functional element 20 to the surface of the base layer 13.

[0041] The lead-out wiring 26 is formed so as to reach the vertical wiring 14 on the other side in the Y direction (here, the -Y direction) from the lower contact layer 23 of the functional element 20. In addition, before the lead-out wiring 26 is formed, an interlayer insulating film 28 is formed from the side surface of the lower contact layer 23 to the surface of the base layer 13.

[0042] Fig. 7 is a plan view showing a state in which the vertical wiring 14 and the lead-out wirings 25, 26 are formed on the underlayer 13. As shown in Fig. 7, the vertical wiring 14 is formed on both sides in the Y direction of each of the functional elements 20R, 20G, 20B. The functional elements 20R, 20G, 20B, the vertical wiring 14, and the lead-out wirings 25, 26 are disposed between two protrusions 13a of the underlayer 13 in the X direction.

[0043] In step S107 (FIG. 1), the sacrificial layer 12 is removed. FIG. 9(A) is a cross-sectional view in the XZ plane showing the process of removing the sacrificial layer 12. The sacrificial layer 12 is removed by, for example, wet etching. The etchant penetrates between the substrate 11 and the base layer 13 from both sides of the base layer 13 in the Y direction.

[0044] 9(A), by removing the sacrificial layer 12, a gap 15 is formed between the substrate 11 and the underlayer 13. The gap 15 is formed between two protrusions 13a in the X direction. The dimension of the gap 15 in the Z direction is, for example, 10 nm to 2 μm.

[0045] A functional film 10 serving as an electronic structure is formed by the base layer 13, the functional elements 20R, 20G, and 20B, the vertical wiring 14, and the lead wirings 25 and 26. The functional film 10 is supported on the substrate 11 by the convex portions 13a of the base layer 13. The functional film 10 and the substrate 11 are collectively referred to as the electronic structure substrate 1.

[0046] The protruding length of the convex portion 13a of the underlayer 13 in the Z direction is defined as length D1. In other words, length D1 is the dimension of the gap 15 in the Z direction. Also, length D1 is the distance in the Z direction from the second surface C2 to the third surface C3. In this embodiment, length D1 is, for example, 100 nm. However, it is not limited to this value.

[0047] The thickness of the underlayer 13 in the Z direction is defined as thickness D2. Thickness D2 is the distance in the Z direction from the first surface C1 to the second surface C2. As described above, thickness D2 is 100 nm to 10 μm. In this embodiment, thickness D2 is, for example, 1 μm. However, thickness D2 is not limited to this value.

[0048] The distance in the X direction from the convex portion 13a of the underlayer 13 to the functional element 20 is defined as a distance D3. The distance D3 is also the shortest distance from the convex portion 13a to the functional element 20 in the XY plane. In this embodiment, the distance D3 is, for example, 500 nm. However, it is not limited to this value.

[0049] As described later, it is desirable that the length D1 be equal to or less than 1 / 2 the thickness D2. It is also desirable that the length D1 be equal to or less than 1 / 2 the distance D3. In other words, it is desirable that D1≦D2×1 / 2 and D1≦D3×1 / 2 are satisfied.

[0050] In step S108 (FIG. 1), the functional film 10 is separated (peeled) from the substrate 11. FIGS. 9(B) and 9(C) are cross-sectional views in the XZ plane showing the process of separating the functional film 10 from the substrate 11.

[0051] 9(B) and (C), a stamp 41 is used as a holding member to separate the functional film 10. The stamp 41 is made of an organic material, has elasticity, and has tack or adhesiveness on the surface.

[0052] More specifically, the stamp 41 is formed of elastomer, rubber, resin, photosensitive resist, etc. Furthermore, the stamp 41 may be a material whose properties change under specific conditions, such as a heat release sheet or an ultraviolet release sheet.

[0053] When separating the functional film 10 from the substrate 11, first, as shown in Fig. 9(B), a stamp 41 is brought into contact with the surface of the functional film 10. Although the functional elements 20R, 20G, and 20B and the lead-out wirings 25 and 26 are formed on the surface of the functional film 10, the stamp 41 is elastically deformable, so that the functional elements 20R, 20G, and 20B are not damaged.

[0054] The stamp 41 is pressed against the functional film 10 so that the bonding strength between the stamp 41 and the functional film 10 exceeds the bonding strength between the functional film 10 and the substrate 11, and is heated to a predetermined temperature.

[0055] 9(C), the stamp 41 is moved in a direction away from the substrate 11. Since the adhesive force between the stamp 41 and the functional film 10 exceeds the adhesive force between the functional film 10 and the substrate 11, the functional film 10 is separated from the substrate 11.

[0056] In step S109 (FIG. 1), the functional film 10 is transferred to the circuit board 31. Figures 10(A) and (B) are cross-sectional views showing the process of transferring the functional film 10 to the circuit board 31. Figure 10(A) is a cross-sectional view in the XZ plane, and Figure 10(B) is a cross-sectional view in the YZ plane.

[0057] 10(A) and (B), the surface of the circuit board 31 is a smooth surface with a surface roughness of 5 nm or less. A wiring pattern 32 is formed on the surface of the circuit board 31. The circuit board 31 is also referred to as a second board.

[0058] The stamp 41 is moved onto the circuit board 31, and the functional film 10 held by the stamp 41 is pressed against the surface of the circuit board 31 and heated to a predetermined temperature. As shown in Fig. 10(A), the third surface C3 of the protrusion 13a of the underlayer 13 is pressed most strongly against the surface of the circuit board 31, and is therefore firmly bonded to the surface of the circuit board 31.

[0059] Furthermore, the base layer 13 is curved so as to be convex toward the circuit board 31 side due to the pressing force from the stamp 41. As a result, the gap 15 is crushed from the center, and most of the second surface C2 of the base layer 13, including the center, is pressed against the surface of the circuit board 31.

[0060] On the other hand, a portion of the second surface C2 of the base layer 13 near the protrusion 13a does not contact the circuit board 31, forming a gap 16. That is, the gap 16 is surrounded by the second surface C2 of the base layer 13, the side surface of the protrusion 13a, and the surface of the circuit board 31.

[0061] As described above, the second surface C2 of the base layer 13 and the third surface C3 of the protrusion 13a are smooth surfaces with a surface roughness of 5 nm or less, and the surface of the circuit board 31 is also a similarly smooth surface, so that the surfaces C2 and C3 of the base layer 13 and the surface of the circuit board 31 are bonded to each other by intermolecular forces. The surface roughness of these surfaces C2 and C3 is preferably, for example, 2 nm.

[0062] In step S110, the stamp 41 is removed from the functional film 10. Figures 10(C) and (D) are cross-sectional views showing the process of removing the stamp 41. Figure 10(C) is a cross-sectional view in the XZ plane, and Figure 10(D) is a cross-sectional view in the YZ plane.

[0063] Since the stamp 41 is attached to the functional film 10 by its tackiness or adhesiveness, it can be easily peeled off from the functional film 10 by applying force to pull it away from the functional film 10 on the circuit board 31, as shown in Figures 10(C) and (D).

[0064] Through the above process, an electronic device 30 is completed, which includes the functional film 10 and the circuit board 31. In the electronic device 30, by applying a voltage to the functional elements 20R, 20G, and 20B via the wiring pattern 32 of the circuit board 31, red, green, and blue light are emitted from the functional elements 20R, 20G, and 20B.

[0065] Fig. 11 is a plan view showing an electronic device 30. Fig. 12(A) is a cross-sectional view taken along line 12A-12A shown in Fig. 11. Fig. 12(B) is a cross-sectional view taken along line 12B-12B shown in Fig. 11.

[0066] 12(A), in the electronic device 30, the third surface C3 of the protruding portion 13a of the base layer 13 is firmly bonded to the surface of the circuit board 31. In addition, most of the second surface C2 of the base layer 13, including the central portion, is bonded to the surface of the circuit board 31.

[0067] The distance from the surface of the circuit board 31 to the highest position of the base layer 13 (i.e., the position farthest from the circuit board 31 in the Z direction) is defined as distance L1. The distance from the surface of the circuit board 31 to the bonding surface of the functional element 20 (i.e., the surface bonded to the first surface C1 of the base layer 13) is defined as distance L2.

[0068] The distance L1 and the distance L2 satisfy L1>L2. This is because the base layer 13 is curved so that the second surface C2 is in contact with the circuit board 31.

[0069] Furthermore, as explained with reference to Figure 9 (A), the Z-direction protrusion length D1 of the convex portion 13a of the underlayer 13, the Z-direction thickness D2 of the underlayer 13, and the X-direction distance D3 from the convex portion 13a of the underlayer 13 to the functional element 20 satisfy D1 < D2 x 1 / 2 and D1 < D3 x 1 / 2.

[0070] Therefore, by setting the Z-direction protruding length D1 of the convex portion 13a to half or less of the Z-direction thickness D2 of the base layer 13, it is possible to reduce the amount of curvature (deformation) of the base layer 13 according to the protruding length D1 of the convex portion 13a. Furthermore, by setting the X-direction distance D3 from the convex portion 13a of the base layer 13 to the functional element 20 to be at least twice the length of D1 (setting the protruding length D1 to half or less of the distance D3), it is possible to reduce the curvature of the base layer 13 extending up to the region where the functional element 20 is provided.

[0071] This makes it possible to minimize the stress on the functional element 20 caused by the curvature of the base layer 13. Furthermore, the vertical wiring 14, which is located at the same position in the X direction as the functional element 20, can be joined to the wiring pattern 32 of the circuit board 31 as shown in FIG.

[0072] <effect> Next, a description will be given of the operation of the embodiment 1. Figures 13(A) to 13(F) are cross-sectional views of each process showing a basic flow of a method for manufacturing the electronic device 30 of the embodiment 1.

[0073] In the above description, the functional elements 20 (20R, 20G, 20B) which are light-emitting elements are formed on the base layer 13, but the functional elements 20 are not limited to light-emitting elements. Also, the openings 13h and the vertical wiring 14 do not necessarily have to be formed in the base layer 13.

[0074] In Fig. 13(A), a sacrificial layer 12 is formed on a substrate 11, and an underlayer 13 is formed so as to cover the sacrificial layer 12. Furthermore, a functional element 20 is bonded to a first surface C1 of the underlayer 13. Although one functional element 20 is shown on the sacrificial layer 12 in Fig. 13(A), two or more functional elements 20 may be provided.

[0075] The base layer 13 and the functional element 20 constitute a functional film 10. If necessary, a wiring layer may be formed on the functional film 10. The functional film 10 is supported on the substrate 11 by the convex portions 13a of the base layer 13.

[0076] Next, as shown in Fig. 13(B), the sacrificial layer 12 is removed by etching. By removing the sacrificial layer 12, a gap 15 is formed between the base layer 13 of the functional film 10 and the substrate 11. Next, as shown in Fig. 13(C), the functional film 10 is separated from the substrate 11 using a stamp 41.

[0077] 13(D), the functional film 10 is pressed against the circuit board 31 using a stamp 41 and bonded to the circuit board 31. At this time, the third surface C3 of the convex portion 13a of the base layer 13 is firmly bonded to the circuit board 31. In addition, the base layer 13 is deformed so as to be convex toward the circuit board 31, and the second surface C2 of the base layer 13 is bonded to the surface of the circuit board 31.

[0078] 13(E), the stamp 41 is removed from the functional film 10. In this way, the electronic device 30 consisting of the functional film 10 and the circuit board 31 is completed.

[0079] 14(A) to (E) are diagrams showing a manufacturing method of an electronic device of a comparative example. In the comparative example, as shown in FIG. 14(A), a sacrificial layer 62 is formed on a substrate 61, a base layer 63 is formed on the sacrificial layer 62, and a functional element 64 is formed on the base layer 63. The base layer 63 and the functional element 64 constitute a functional film 60. The functional film 60 is held on the sacrificial layer 62.

[0080] Next, as shown in Fig. 14(B), the sacrificial layer 62 is etched to reduce the degree of adhesion between the sacrificial layer 62 and the functional film 60. However, the functional film 60 is held on the sacrificial layer 62. Then, as shown in Fig. 14(C), the functional film 60 is separated from the sacrificial layer 62 using a stamp 71.

[0081] Next, as shown in Fig. 14(D), stamp 71 is used to press functional film 60 against circuit board 81 to bond it to circuit board 81. Thereafter, as shown in Fig. 14(E), stamp 71 is removed from functional film 60. In this way, electronic device 80 consisting of functional film 60 and circuit board 81 is completed.

[0082] In the manufacturing method of the comparative example, if the amount of etching of the sacrificial layer 62 is insufficient in the etching step shown in Fig. 14(B), it may not be possible to separate the functional film 60 in the separation step shown in Fig. 14(C). Therefore, it is necessary to accurately control the amount of etching of the sacrificial layer 62, which makes the etching step complicated.

[0083] In particular, when multiple functional films 60 are separated from a common substrate 61, the amount of etching of the sacrificial layer is likely to vary for each functional film 60. This causes variation in the ease with which the functional films 60 can be separated from the substrate 61 (peelability), making the separation process complicated.

[0084] Furthermore, in the functional film 60, the pressure of the stamp 71 is easily applied to the central region of the base layer 63 (i.e., the region where the functional element 64 is arranged), but the pressure is not easily applied to the edge of the base layer 63. Therefore, as shown by the arrow E in Fig. 14(E), the bonding strength between the edge of the base layer 63 and the circuit board 81 becomes insufficient, and the edge of the functional film 60 may peel off.

[0085] In contrast, in the present embodiment, the functional film 10 is supported on the substrate 11 by the convex portions 13a of the base layer 13, so that the sacrificial layer 12 can be completely removed (FIGS. 9(A) and 13(B)). This eliminates the need to precisely control the amount of etching of the sacrificial layer 12, simplifying the manufacturing process. Furthermore, even when multiple functional films 10 are separated from a common substrate 11, each functional film 10 can be reliably separated.

[0086] Furthermore, in the transfer process of the functional film 10, the convex portions 13a of the underlayer 13 are firmly bonded to the surface of the circuit board 31, so that peeling at the ends of the functional film 10 is prevented.

[0087] In addition, when the functional film 10 is bonded to the circuit board 31, the second surface C2 comes into contact with the surface of the circuit board 31 due to the curvature of the base layer 13. At this time, the second surface C2 comes into contact with the surface of the circuit board 31 starting from the center (i.e., the position farthest from the convex portion 13a), so air can easily escape. Therefore, air bubbles are unlikely to remain between the second surface C2 of the base layer 13 and the surface of the circuit board 31.

[0088] <Advantages of the First Embodiment> As described above, the functional film 10 as the electronic structure of the first embodiment has the base layer 13 as an insulating layer and the functional element 20 formed on the first surface C1 of the base layer 13, and the base layer 13 has a convex portion 13a on the second surface C2 opposite to the first surface C1 at a position that does not overlap with the functional element 20 when viewed in the Z direction. The convex portion 13a has a third surface C3 facing the same side as the second surface C2. The protruding length D1 of the convex portion 13a of the base layer 13 from the second surface C2, the thickness D2 between the first surface C1 and the second surface C2 of the base layer 13, and the shortest distance D3 in the XY plane from the convex portion 13a to the functional element 20 satisfy D1≦D2×1 / 2 and D1≦D3×1 / 2.

[0089] Because of this configuration, the functional film 10 is manufactured by forming the base layer 13 on the substrate 11 so as to cover the sacrificial layer 12, providing the functional element 20 on the base layer 13, and then removing the sacrificial layer 12. This eliminates the need for precise control of the amount of etching of the sacrificial layer 12, simplifying the manufacturing process and improving the bonding strength between the functional film 10 and the circuit board 31. Furthermore, by satisfying D1≦D2×1 / 2 and D1≦D3×1 / 2, the stress acting on the functional element 20 due to the curvature of the base layer 13 can be minimized. In other words, the bonding of the functional film 10 to the circuit board 31 can be simplified.

[0090] The surface roughness of the second surface C2 and the surface roughness of the third surface C3 are both 5 nm or less, so that the functional film 10 can be firmly bonded to the circuit board 31 at the second surface C2 and the third surface C3 by, for example, intermolecular forces.

[0091] Moreover, the base layer 13 has an opening 13h formed from the first surface C1 to the second surface C2 at a position not overlapping with the functional element 20 when viewed in the Z direction, and the opening 13h has a vertical wiring 14 formed therein as a conductive member. Therefore, the functional element 20 on the base layer 13 and the wiring pattern 32 of the circuit board 31 can be electrically connected by the vertical wiring 14.

[0092] Furthermore, since the convex portions 13a of the base layer 13 are formed at the ends of the base layer 13 in the X direction, peeling at the ends of the functional film 10 can be prevented.

[0093] In addition, the base layer 13 is curved so as to be convex toward the circuit board 31, and a gap 16 is formed between the circuit board 31, the second surface C2 of the base layer 13, and the convex portion 13a. Therefore, the second surface C2 of the base layer 13 is bonded to the surface of the circuit board 31 at a location (e.g., the center) other than the immediate vicinity of the convex portion 13a. This allows the functional element 20 to be bonded to the wiring pattern 32 of the circuit board 31, etc.

[0094] Furthermore, since the distance L1 from the circuit board 31 to the highest point of the base layer 13 and the distance L2 from the circuit board 31 to the functional element 20 satisfy L1≦L2, the second surface C2 of the base layer 13 can be reliably joined to the surface of the circuit board 31.

[0095] Variations. 15(A), (B) and 16(A) and (B) are plan views showing modified electronic devices 30A, 30B, 30C and 30D.

[0096] 15(A), convex portions 13a are provided on both ends of the underlayer 13 in the X direction, and each convex portion 13a extends from one end to the other end of the underlayer 13 in the Y direction. However, groove portions 13b are formed penetrating each convex portion 13a in the X direction. Here, groove portion 13b is formed at the center of convex portion 13a in the Y direction, but it does not necessarily have to be at the center in the Y direction.

[0097] In the first modification, by forming the grooves 13b in the protrusions 13a, the etching liquid can easily penetrate between the substrate 11 and the base layer 13 in the etching process of step S107 (FIG. 1), thereby improving the etching rate. Note that the grooves 13b may be formed in only one of the two protrusions 13a of the base layer 13.

[0098] 15(B), convex portions 13a are formed on both ends in the X direction of the underlayer 13, and convex portions 13c are also formed on both ends in the Y direction of the underlayer 13. A gap 13d is formed between the X direction ends of the convex portions 13c and the convex portions 13a.

[0099] In the second modification, since the base layer 13 has the convex portions 13a and 13c, the etching rate in the sacrificial layer 12 removal step (step S107) is slightly decreased, but the contact area between the base layer 13 and the circuit board 31 is increased, thereby improving the bonding strength between the functional film 10 and the circuit board 31. Note that it is sufficient that the base layer 13 is provided with at least one (more preferably two or more) of the two convex portions 12a and two convex portions 13c.

[0100] In the third modification shown in Fig. 15(C), instead of the protrusions 13a in the first embodiment, protrusions 13e are formed at the four corners of the underlayer 13. Each protrusion 13e has a portion extending in the X direction and a portion extending in the Y direction, and is formed in an L shape, but it does not necessarily have to be L-shaped. A groove 13f is formed between the protrusions 13e adjacent to each other in the Y direction, and a gap 13g is formed between the protrusions 13e adjacent to each other in the X direction.

[0101] In the third modification, the protrusions 13e are formed at the four corners of the base layer 13, so that the bonding strength between the functional film 10 and the circuit board 31 is uniform in the XY plane. The grooves 13f and the gaps 13g serve as paths for the etching solution. Note that it is sufficient that the base layer 13 has at least one of the four protrusions 13a (more preferably two or more).

[0102] It is possible to appropriately combine the first embodiment and the first to third modifications. For example, as shown in Fig. 15(D), the convex portion 13a (Fig. 3) of the first embodiment may be formed at one end of the base layer 13 in the X direction, and the convex portions 13e (Fig. 15(C)) of the third modification may be formed at two corners of the other end of the base layer 13 in the X direction.

[0103] Other combinations are also possible. For example, the groove 13b shown in Fig. 15(A) may be formed in at least one of the protrusions 13a and 13c shown in Fig. 15(B). Also, the groove 13b shown in Fig. 15(A) may be formed in at least one of the protrusions 13e shown in Fig. 15(C).

[0104] Embodiment 2 17 is a plan view showing an electronic device 30E of embodiment 2. The electronic device 30E has a functional film 10E as an electronic structure, and a circuit board 31. The functional film 10E has an underlayer 13, functional elements 20R, 20G, and 20B, vertical wiring 14, lead wiring 25 and 26, and interlayer insulating films 27 and 28.

[0105] In the electronic device 30 of the first embodiment (FIG. 11), the convex portions 13a are formed on both ends in the X direction of the underlayer 13. In contrast, in the electronic device 30E of the second embodiment, the convex portions 13a are formed on both ends in the Y direction of the underlayer 13.

[0106] The functional elements 20R, 20G, and 20B are disposed between two protruding portions 13a in the Y direction. In other words, the functional elements 20R, 20G, and 20B are disposed at positions that do not overlap with the protruding portions 13a when viewed in the Z direction.

[0107] Fig. 18(A) is a cross-sectional view taken along line 18A-18A shown in Fig. 17. Fig. 18(B) is a cross-sectional view taken along line 18A-18A shown in Fig. 17. As shown in Figs. 18(A) and (B), a wiring pattern 32 is formed on a circuit board 31 at a position where a convex portion 13a of a base layer 13 is joined.

[0108] The third surface C3 of the protrusion 13a of the base layer 13 is joined to the wiring pattern 32 of the circuit board 31. Moreover, most of the second surface C2 of the base layer 13, including its central portion, is joined to the surface of the circuit board 31.

[0109] Moreover, an opening 13h is formed in the convex portion 13a of the base layer 13. The opening 13h is formed from the first surface C1 of the base layer 13 to the third surface C3 of the convex portion 13a. A vertical wiring 14 is formed in the opening 13h. The vertical wiring 14 is joined to a wiring pattern 32 of the circuit board 31.

[0110] The protrusion length D1 of the convex portion 13a, the thickness D2 of the base layer 13, the distance D3 in the Y direction from the base layer 13 to the functional element 20, the distance L1 from the surface of the circuit board 31 to the highest point of the base layer 13, and the distance L2 from the surface of the circuit board 31 to the bonding surface of the functional element 20 are as described in embodiment 1.

[0111] 19(A) to (C) and 20(A) and (B) are cross-sectional views taken along a plane parallel to the YZ plane, illustrating each process of a manufacturing method for an electronic device 30E according to the second embodiment.

[0112] 19(A), a sacrificial layer 12 is formed on a substrate 11, and an underlayer 13 is formed to cover the sacrificial layer 12. The underlayer 13 is formed so that its length in the Y direction is longer than that of the sacrificial layer 12. On the underlayer 13, a functional element 20, vertical wiring 14, lead wirings 25 and 26, and interlayer insulating films 27 and 28 are formed.

[0113] 19(B), the sacrificial layer 12 is removed by etching. By removing the sacrificial layer 12, a gap 15 is formed between the base layer 13 of the functional film 10E and the substrate 11. The functional film 10E and the substrate 11 form an electronic structure substrate 1E.

[0114] Next, as shown in FIG. 19(C), the functional film 10E is separated from the substrate 11 using a stamp 41.

[0115] 20(A), the functional film 10 is pressed against the circuit board 31 using a stamp 41 and bonded to the circuit board 31. At this time, the third surface C3 of the protrusion 13a of the base layer 13 is firmly bonded to the wiring pattern 32 of the circuit board 31. In addition, the pressing force of the stamp 41 deforms the base layer 13, and the second surface C2 is bonded to the surface of the circuit board 31.

[0116] 20(B), the stamp 41 is removed from the functional film 10E, thereby obtaining an electronic device 30E consisting of the functional film 10E and the circuit board 31.

[0117] Except for the above-mentioned points, the electronic device 30E, functional film 10E, and electronic structure substrate 1E of the second embodiment, and the manufacturing methods thereof, are the same as those of the first embodiment.

[0118] As described above, in the manufacturing method of the electronic device 30E of the second embodiment, the opening 13h is formed from the first surface C1 to the third surface C3 of the base layer 13, and the vertical wiring 14 is formed in the opening 13h. That is, the vertical wiring 14 is formed on the protruding portion 13a of the base layer 13. Therefore, the vertical wiring 14 and the wiring pattern 32 of the circuit board 31 can be firmly joined. This allows the functional element 20 and the wiring pattern 32 of the circuit board 31 to be electrically connected more reliably, and connection failures can be prevented.

[0119] Note that the electronic device 30E of the second embodiment may be provided with an opening 13h (FIG. 6(B)) extending from the first surface C1 to the second surface C2 as described in the first embodiment, and the vertical wiring 14 may be formed in the opening 13h. The modified examples described with reference to FIGS. 15(A) to 16(B) may be applied to the electronic device 30E of the second embodiment.

[0120] <Display device> 21 is a diagram showing a basic configuration of a display device (e.g., an LED display) 5 to which the electronic devices 30, 30A to 30E of the first and second embodiments and each of the modifications can be applied. The display device has a light-emitting element array 50 in which the electronic devices 30 of the first embodiment are two-dimensionally arranged.

[0121] In the light-emitting element array 50, the electronic devices 30 are arranged in a matrix in the X direction (row direction) and the Y direction (column direction). In Fig. 21, each electronic device 30 has one functional element 20, but each electronic device 30 may have functional elements 20R, 20B, and 20G as shown in Fig. 11.

[0122] The display device 5 also has anode wiring 51 extending in the X direction and cathode wiring 52 extending in the Y direction. The electronic devices 30 are arranged on a common cathode wiring 52. The electronic devices 30 in each row are connected by the common anode wiring 51.

[0123] Each anode wire 51 is connected to an anode wire lead pad 55, which is electrically connected to a drive circuit (not shown). Each cathode wire 52 is connected to a cathode wire lead pad 56, which is electrically connected to a drive circuit.

[0124] In response to a signal from the drive circuit, a drive current flows through the electronic device 30 in a specific row and a specific column via the anode wiring 51 and the cathode wiring 52, causing light to be generated in the functional element 20 of the electronic device 30. This allows the display device 5 to display a two-dimensional image. The display device 5 shown in Fig. 21 can be applied to wearable products such as smart glasses.

[0125] The light-emitting element array 50 of the display device 5 is not limited to the electronic device 30 of the first embodiment, but may be the electronic devices 30, 30A to 30E of the second embodiment and each of the modified examples. Since the manufacturing process of the electronic devices of the first and second embodiments and each of the modified examples can be simplified, the manufacturing cost of the display device 5 can be reduced.

[0126] Although the display device using the electronic device has been described here, the electronic device can be used in various appliances depending on its function.

[0127] Although the preferred embodiments have been specifically described above, the present disclosure is not limited to the above-described embodiments, and various improvements and modifications can be made.

[0128] Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) An insulating layer; A functional element formed on a first surface of the insulating layer; having The insulating layer is a protrusion on a second surface opposite to the first surface at a position not overlapping with the functional element when viewed in a first direction perpendicular to the first surface; the protrusion has a third surface facing the same side as the second surface, A protruding length D1 of the protruding portion from the second surface; a thickness D2 between the first surface and the second surface of the insulating layer; and The shortest distance D3 from the convex portion to the functional element in a plane parallel to the first surface is D1 ≦ D2 × 1 / 2, and D1≦D3×1 / 2 Satisfy 1. An electronic structure comprising: (Appendix 2) The surface roughness of the second surface and the surface roughness of the third surface are both 5 nm or less. 2. The electronic structure of claim 1 . (Appendix 3) the insulating layer has an opening formed from the first surface to the second surface at a position not overlapping with the functional element when viewed in the first direction, A conductive member is formed in the opening. 3. The electronic structure according to claim 1 or 2, (Appendix 4) the insulating layer has an opening formed from the first surface to the third surface at a position not overlapping with the functional element when viewed in the first direction; A conductive member is formed in the opening. 4. The electronic structure according to claim 1, (Appendix 5) The protrusion is formed at an end of the insulating layer in a second direction parallel to the first surface. 5. The electronic structure according to claim 1, (Appendix 6) the insulating layer has a rectangular shape in a plane parallel to the first surface, The protrusions are formed at the corners of the rectangular insulating layer. 6. An electronic structure according to any one of claims 1 to 5. (Appendix 7) An electronic structure according to any one of claims 1 to 6; a substrate that abuts against the protrusion and supports the electronic component; An electronic component substrate having (Appendix 8) A display device comprising the electronic structure according to any one of claims 1 to 7, which has a light-emitting element as the functional element. (Appendix 7) the insulating layer has a rectangular shape in a plane parallel to the first surface, The protrusions are formed at the corners of the rectangular insulating layer. 7. The electronic structure according to claim 1, (Appendix 9) A circuit board; An insulating layer; A functional element formed on a first surface of the insulating layer; having The insulating layer is a protrusion on a second surface opposite to the first surface at a position not overlapping with the functional element when viewed in a first direction perpendicular to the first surface; the protrusion has a third surface facing the same side as the second surface, The second surface and the third surface are joined to the circuit board. 1. An electronic device comprising: (Appendix 10) A distance L1 from the circuit board to the first surface and a distance L2 from the circuit board to the functional element satisfy L1≦L2. 10. The electronic device according to claim 9, (Appendix 11) A gap is formed between the circuit board, the second surface, and the protrusion. 11. The electronic device according to claim 9 or 10. (Appendix 12) The second surface of the insulating layer is curved so as to be convex toward the circuit board. 12. An electronic device according to any one of claims 9 to 11, (Appendix 13) forming a sacrificial layer on a substrate; forming an insulating layer on the substrate so as to cover the sacrificial layer; forming a functional element on a first surface of the insulating layer opposite to the substrate; removing the sacrificial layer; separating the insulating layer and the functional element from the substrate; transferring the insulating layer and the functional element to a circuit board; having In the step of removing the sacrificial layer, The insulating layer is supported on the substrate by a convex portion formed on a second surface opposite to the first surface at a position not overlapping with the functional element when viewed in a first direction perpendicular to the first surface. 2. A method for producing an electronic device comprising the steps of: (Appendix 14) After the step of forming the insulating layer and before the step of separating the insulating layer and the functional element from the substrate, forming an opening from the first surface to the second surface of the insulating layer at a position that does not overlap with the functional element when viewed in the first direction; 14. A method for producing an electronic device according to claim 13, comprising the steps of: (Appendix 15) After the step of forming the insulating layer and before the step of separating the insulating layer and the functional element from the substrate, forming an opening from the first surface of the insulating layer to a third surface of the protrusion facing the same side as the second surface; 15. The method for producing an electronic device according to claim 13 or 14, comprising: [Explanation of symbols]

[0129] 1,1E Electronic structure substrate, 5 Display device, 10,10E Functional film (electronic structure), 11 Substrate, 12 Sacrificial layer, 13 Underlayer (insulating layer), 13a,13c,13e Convex portion, 13b Groove portion, 13d Gap, 13f Groove portion, 13g Gap, 13h Opening (through hole), 14 Vertical wiring (conductive member), 15,16 Void, 20,20R,20G,20B Functional element, 21 Upper contact layer, 22 Light-emitting layer, 23 Lower contact layer, 25,26 Lead wiring (wiring layer), 27,28 Interlayer insulating film, 30,30A,30B,30C,30D,30E Electronic device, 31 Circuit board, 32 Wiring pattern, 41 Stamp (holding member), 50 light-emitting element array (functional element array), C1 first surface, C2 second surface, C3 third surface.

Claims

1. An insulating layer; a functional element formed on a first surface of the insulating layer; having The insulating layer is a protrusion on a second surface opposite to the first surface, the protrusion being located at a position not overlapping with the functional element when viewed in a first direction perpendicular to the first surface; the protrusion has a third surface facing the same side as the second surface, A protruding length D1 of the protruding portion from the second surface; a thickness D2 between the first surface and the second surface of the insulating layer; The shortest distance D3 from the convex portion to the functional element in a plane parallel to the first surface is D1≦D2×1 / 2, and D1≦D3×1 / 2 An electronic structure characterized by satisfying the above.

2. The surface roughness of the second surface and the surface roughness of the third surface are both 5 nm or less.

2. The electronic structure of claim 1.

3. the insulating layer has an opening formed from the first surface to the second surface at a position not overlapping with the functional element when viewed in the first direction; A conductive member is formed in the opening.

2. The electronic structure of claim 1.

4. the insulating layer has an opening formed from the first surface to the third surface at a position not overlapping with the functional element when viewed in the first direction; A conductive member is formed in the opening.

2. The electronic structure of claim 1.

5. The protrusion is formed at an end of the insulating layer in a second direction parallel to the first surface.

2. The electronic structure of claim 1.

6. the insulating layer has a rectangular shape in a plane parallel to the first surface, The protrusions are formed at the corners of the rectangular insulating layer.

2. The electronic structure of claim 1.

7. An electronic structure according to any one of claims 1 to 6; a substrate that abuts against the protrusion and supports the electronic component; An electronic component substrate having

8. A display device comprising the electronic structure according to claim 1 , which comprises a light-emitting element as the functional element.

9. A circuit board; An insulating layer; a functional element formed on a first surface of the insulating layer; having The insulating layer is a protrusion on a second surface opposite to the first surface, the protrusion being located at a position not overlapping with the functional element when viewed in a first direction perpendicular to the first surface; the protrusion has a third surface facing the same side as the second surface, The second surface and the third surface are joined to the circuit board.

1. An electronic device comprising:

10. A distance L1 from the circuit board to the first surface and a distance L2 from the circuit board to the functional element satisfy L1≦L2.

10. The electronic device according to claim 9.

11. A gap is formed between the circuit board, the second surface, and the protruding portion.

10. The electronic device according to claim 9.

12. The second surface of the insulating layer is curved so as to be convex toward the circuit board.

10. The electronic device according to claim 9.

13. forming a sacrificial layer on a substrate; forming an insulating layer on the substrate so as to cover the sacrificial layer; forming a functional element on a first surface of the insulating layer opposite the substrate; removing the sacrificial layer; separating the insulating layer and the functional element from the substrate; transferring the insulating layer and the functional element to a circuit board; having In the step of removing the sacrificial layer, The insulating layer is supported on the substrate by a convex portion formed on a second surface opposite to the first surface at a position not overlapping with the functional element when viewed in a first direction perpendicular to the first surface.

2. A method for producing an electronic device comprising the steps of:

14. After the step of forming the insulating layer and before the step of separating the insulating layer and the functional element from the substrate, forming an opening from the first surface to the second surface of the insulating layer at a position that does not overlap with the functional element when viewed in the first direction; The method for producing an electronic device according to claim 13, further comprising the steps of:

15. After the step of forming the insulating layer and before the step of separating the insulating layer and the functional element from the substrate, forming an opening from the first surface of the insulating layer to a third surface of the protrusion facing the same side as the second surface; The method for producing an electronic device according to claim 13, further comprising the steps of:

Citation Information

Patent Citations

  • Electronic structure and manufacturing method of electronic structure

    JP2023074428A