Semiconductor light-emitting device

Abstract

To provide a semiconductor light-emitting device with a high protection function against overcurrent, being suitable for size reduction and able to be densely disposed in grid or matrix.SOLUTION: A semiconductor light-emitting device includes a support substrate 30 including at least a pair of placement electrodes 36A an 36B including an anode and a cathode and provided on a first main surface of a base material 31 with a flat plate shape including a semiconductor of a first conductivity type, and at least a pair of package electrodes 37A and 37B including an anode and a cathode and provided on a second main surface of the base material that faces the first main surface, a semiconductor light-emitting element 20 placed with a p-electrode 26 and an n-electrode 25 electrically connected in accordance with the pair of placement electrodes 36A and 36B on the pair of placement electrodes 36A and 36B, a pair of conductive vias 34 electrically connecting the pair of package electrodes 37A and 37B and the pair of placement electrodes 36A and 36B, respectively, and a diffusion region of a second conductivity type, which is an opposite conductivity type to a first conductivity type, provided on an inner wall surface of the base material in contact with the conductive via 34.SELECTED DRAWING: Figure 2A

Description

[Technical field]

[0001] The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device including a semiconductor light emitting element and a protection element. [Background technology]

[0002] In recent years, semiconductor light-emitting elements such as light-emitting diodes (LEDs) are often arranged in a single device to achieve higher output and light distribution control. In addition, protective elements are often provided in light-emitting devices to improve their resistance to ESD (electrostatic discharge).

[0003] For example, in the field of automobile headlights, there are known headlamps with variable light distribution (ADB: Adaptive Driving Beam) that arrange multiple semiconductor light emitting elements to control the light distribution. In addition, LED packages for high-output lighting and LED packages for information and communication devices in which LEDs are densely arranged are also known.

[0004] Moreover, Patent Document 1 discloses an optoelectronic semiconductor device in which an ESD protection element is arranged between a carrier and a semiconductor body.

[0005] Patent document 2 discloses a light-emitting device including a light-emitting element and a mounting substrate including a semiconductor electrostatic discharge protection element section provided on a surface opposite to the surface on which the light-emitting element is mounted and connected to the light-emitting element.

[0006] Patent Document 3 discloses a light-emitting element package including a semiconductor substrate having first and second conductive vias, a diode formed by doping impurities on a second surface of the semiconductor substrate and having a Zener breakdown voltage in both directions, and first and second external electrodes formed on the second surface so as to connect the first and second conductive vias to both ends of a bidirectional Zener diode region, respectively. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Special Publication No. 2018-519669 [Patent Document 2] WO2013 / 187318 publication [Patent Document 3] US 2013 / 0020298A1 publication Summary of the Invention [Problem to be solved by the invention]

[0008] The present invention has been made in consideration of the above-mentioned points, and aims to provide a semiconductor light-emitting device that is suitable for miniaturization, can be densely arranged in a grid or matrix shape, and has high protection performance against overcurrent. [Means for solving the problem]

[0009] A semiconductor light emitting device according to one embodiment of the present invention comprises: a support substrate including a flat-plate-shaped base material made of a first conductive type semiconductor, the first main surface of which is provided with at least one pair of mounting electrodes consisting of an anode and a cathode, and a second main surface of the base material facing the first main surface of the base material, the second main surface being provided with at least one pair of mounting electrodes consisting of an anode and a cathode; a semiconductor light emitting element mounted on the pair of mounting electrodes, the p-electrode and the n-electrode being electrically connected to each other in correspondence with the pair of mounting electrodes; a pair of conductive vias electrically connecting each of the pair of mounting electrodes to each of the pair of placement electrodes; The conductive via has a diffusion region of a second conductivity type opposite to the first conductivity type, the diffusion region being provided on an inner wall surface of the base material that contacts the conductive via. [Brief description of the drawings]

[0010] [Figure 1A] 1 is a diagram illustrating a top surface of the semiconductor light emitting device according to the first embodiment. [Figure 1B] 1 is a diagram illustrating a side view of the semiconductor light emitting device according to the first embodiment. [Figure 1C] 2 is a diagram illustrating a schematic rear surface of the semiconductor light emitting device according to the first embodiment. FIG. [Figure 2A] 1B is a cross-sectional view showing a cross section taken along line AA shown in FIG. 1A. [Figure 2B] 1B is a cross-sectional view showing a cross section along line BB shown in FIG. 1A. [Diagram 3] 2B corresponds to the cross section of the semiconductor light emitting device shown in FIG. 2A and shows bonding of a light emitting element to a supporting substrate. [Figure 4A] 1 is an equivalent circuit diagram of a semiconductor light emitting device. [Figure 4B] 1 is a diagram showing a schematic diagram of VI characteristics of a pair of Zener diodes ZD1 and ZD2 formed on a light-emitting element and a supporting substrate. FIG. [Figure 5A] 5A to 5C are cross-sectional views showing steps S0 to S4 of the manufacturing method. [Figure 5B] 5A to 5C are cross-sectional views showing steps S5 to S8 of the manufacturing method. [Figure 5C] 5 is a cross-sectional view showing steps S9 to S10 of the manufacturing method. [Figure 6A] 1 is a cross-sectional view illustrating a semiconductor light-emitting device according to a first modified example of the first embodiment. [Figure 6B] 1 is a cross-sectional view illustrating a semiconductor light-emitting device according to a second modified example of the first embodiment. [Figure 7A] 1 is a diagram illustrating a top view of a semiconductor light emitting device according to a second embodiment. [Figure 7B] FIG. 7B is a cross-sectional view showing a cross section taken along line AA shown in FIG. 7A. [Figure 7C] FIG. 2 is a rear view of the semiconductor light emitting device. [Figure 7D] FIG. 2 is a diagram showing a wiring pattern of a circuit board. [Figure 7E] FIG. 2 is a diagram showing an equivalent circuit when the semiconductor light emitting device is mounted on a circuit board. [Figure 8A] FIG. 11 is a cross-sectional view illustrating a semiconductor light-emitting device according to a modified example of the second embodiment. [Figure 8B] 11 is a cross-sectional view showing a wiring pattern of a circuit board on which the semiconductor light emitting device of this modified example is mounted. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] In the following, preferred embodiments of the present invention will be described, which may be modified and combined as appropriate. In the following description and accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals.

[0012] [First embodiment] 1. Structure of semiconductor light emitting device 1A, 1B, and 1C are schematic diagrams showing the top, side, and back surfaces, respectively, of a semiconductor light-emitting device 10 according to a first embodiment of the present invention, and Fig. 2A and Fig. 2B are cross-sectional views taken along lines AA and BB, respectively, shown in Fig. 1A.

[0013] As shown in FIGS. 1B, 2A, and 2B, a semiconductor light emitting device 10 has a structure in which a light emitting element 20, which is an LED, is bonded to a support substrate 30.

[0014] Fig. 3 corresponds to the cross section of the semiconductor light emitting device 10 shown in Fig. 2A, and is a diagram showing bonding of the light emitting element 20 to the support substrate 30. Hereinafter, with reference to Fig. 3, the configurations of the light emitting element 20 and the support substrate 30, and the bonding between the light emitting element 20 and the support substrate 30 will be described in detail.

[0015] (1) Light-emitting element 3, the light emitting element 20 has an element substrate 11 and a light emitting semiconductor structure layer SL formed on the element substrate 11. The light emitting semiconductor structure layer SL has an n-type semiconductor layer 21, a light emitting layer 22 formed on the n-type semiconductor layer 21, and a p-type semiconductor layer 23 formed on the light emitting layer 22.

[0016] In this embodiment, the light emitting device 20 is a so-called flip chip, and is provided on one side of the device with a p-type electrode 26 and an n-type electrode 27. The device structure will be described in detail below.

[0017] The element substrate 11 is a sapphire substrate, and is a substrate that is transparent to the light emitted from the light emitting layer 22. The light emitting semiconductor structure layer SL is formed by crystal growth on the element substrate 11. The light emitting semiconductor structure layer SL is, for example, a gallium nitride (GaN)-based LED structure layer that emits blue light, but the crystal system is not limited to this.

[0018] The n-type semiconductor layer 21 is, for example, a GaN or AlGaN layer doped with silicon (Si). The light emitting layer 22 has, for example, a single quantum well (SQW) or multiple quantum well (MQW) structure. Alternatively, the light emitting layer 22 may have a so-called bulk structure. The p-type semiconductor layer 23 is, for example, a GaN or AlGaN layer doped with magnesium (Mg).

[0019] Each of the n-type semiconductor layer 21 and the p-type semiconductor layer 23 is composed of at least one semiconductor layer. The n-type semiconductor layer 21 and the p-type semiconductor layer 23 may be provided with various semiconductor layers, such as a carrier barrier layer such as an electron blocking layer (EBL), a current diffusion layer, and a contact layer. The n-type semiconductor layer 21 and the p-type semiconductor layer 23 may be provided with an undoped layer (or an i-layer).

[0020] 1A and 3, the light-emitting functional layer 20 is provided with a p-electrode 24 (p-ohmic electrode) which is an element electrode. Also, as shown in Fig. 1A, the light-emitting semiconductor structure layer SL is provided with recesses 23H (three recesses in this embodiment) which penetrate the p-type semiconductor layer 23 and the light-emitting layer 22 and expose the n-type semiconductor layer 21. An n-electrode 25 (n-ohmic electrode) is formed on the exposed surface of the n-type semiconductor layer 21.

[0021] The p-electrode 24 is formed as a light-reflective electrode. The p-electrode 24 is made of, for example, an indium tin oxide (ITO) ohmic electrode of a translucent conductive film, a nickel (Ni) / silver (Ag) reflective film, and an ITO / Ni / Ag / Pt / Ti / Au layer in which platinum (Pt), titanium (Ti) and gold (Au) are formed in this order on the p-type semiconductor layer 23. Note that, although it is preferable that the p-electrode 24 is provided with a reflective film having a high reflectance such as an Ag film, the reflective film may not be provided.

[0022] 2A, the reflected light Lr emitted from the light emitting layer 22 and reflected by the p-electrode 24 is emitted from the surface 10S of the element substrate 11 together with the direct light Ld from the light emitting layer 22. That is, the surface 10S of the element substrate 11 is the light emission surface of the semiconductor light emitting device 10. Note that it is preferable that the surface 10S of the element substrate 11 is roughened in terms of improving the light extraction efficiency.

[0023] The n-electrode 25 is made of, for example, a Ti / Al layer in which titanium (Ti) and aluminum (Al) are formed in this order on the n-type semiconductor layer 21.

[0024] The materials and layer structures of the p-electrode 24 and the n-electrode 25 are not limited to those described above, and may be appropriately selected in consideration of various characteristics such as ohmic characteristics, light extraction efficiency by light reflection, and element reliability (lifetime).

[0025] An element protective film 28A made of an insulating film (SiO2) is provided on the side surface and the outer edge of the upper surface of the light emitting semiconductor layer SL composed of the n-type semiconductor layer 21, the light emitting layer 22, and the p-type semiconductor layer 23. In addition, as shown in Figures 2A and 2B, the element protective film 28A is also provided on the inner wall surface of the light emitting semiconductor structure layer SL exposed in the recess 23H.

[0026] Also provided are a p-element electrode (a first element electrode which is an electrode of the light-emitting element 20) 26 electrically connected to the p-electrode 24, and an n-element electrode (a second element electrode which is an electrode of the light-emitting element 20) 27 electrically connected to the n-electrode 25. An element protective film 28B made of an insulating film (e.g., SiO2) is provided on the side and upper outer edges of the p-element electrode 26 and the n-element electrode 27.

[0027] 1A, a plurality of n-electrodes 25 (three in this embodiment) are provided along the central axis CX of the light-emitting element 20. The plurality of n-electrodes 25 are preferably provided at positions symmetrical with respect to the center C of the light-emitting element 20. Although the example shows a case in which a plurality of n-electrodes 25 are provided, it is sufficient that at least one n-electrode 25 is provided. Furthermore, the n-electrodes 25 may be provided symmetrically in two rows (six electrodes) on either side of the line segment CX.

[0028] The p-electrode 26 and the n-electrode 27 are formed as rectangular regions along the central axis CX, sandwiching a region in which a plurality of n-electrodes 25 are formed.

[0029] 3, n-electrode 27 is formed on element protective film 28A (insulating film) and insulated from p-electrode 24. n-electrode 27 has jumper wiring portion 27T electrically connected to n-electrode 25, and is electrically connected to n-electrode 25 via jumper wiring portion 27T.

[0030] The p element electrode 26 and the n element electrode 27 are each made of, for example, a Ti / Al / Ni / Pt / Ti / Au layer including a reflective layer made of Ti and Al, a barrier layer made of nickel (Ni) and platinum (Pt) provided on the reflective layer, and a pad layer made of Ti / Au provided on the barrier layer.

[0031] (2) Support substrate 3 again, the support substrate 30 has a base material 31, and the base material 31 has a first main surface MS1 and a second main surface MS2 facing the first main surface. A p-mounted electrode 36A and an n-mounted electrode 36B (a pair of mounted electrodes) are provided on the first main surface MS1 (upper surface) side of the base material 31, and a p-mounted electrode 37A and an n-mounted electrode 37B (a pair of mounted electrodes) are provided on the second main surface MS2 (rear surface) side of the base material 31. The support substrate 30 will be described in more detail below.

[0032] The base material 31 is a conductive n-type silicon substrate made of silicon (Si) doped with phosphorus (P), arsenic (As), etc. Note that the base material 31 may also be a p-type semiconductor substrate.

[0033] Metal plating layers 34P and 35P electrically isolated from each other are formed on the upper surface side (i.e., the bonding side with the light emitting element 20) of the base material 31. A p-mounted electrode 36A and an n-mounted electrode 36B electrically connected to the metal plating layers 34P and 35P, respectively, are formed on the metal plating layers 34P and 35P.

[0034] The metal plating layers 34P and 35P, and the p-mounted electrode 36A and the n-mounted electrode 36B are insulated from the substrate 31 by an insulating film 32A (first insulating film), and the side surfaces and outer edges of the upper surface of the p-mounted electrode 36A and the n-mounted electrode 36B are protected by a protective film 38A (second insulating film), which is an insulating film.

[0035] Metal plating layers 34Q and 35Q electrically isolated from each other are formed on the back surface side of the base material 31, i.e., on the mounting surface side of the support substrate 30 to a circuit board (not shown). A p-mounting electrode 37A (anode) and an n-mounting electrode 37B (cathode) are formed on the metal plating layers 34Q and 35Q and are electrically connected to the metal plating layers 34Q and 35Q, respectively.

[0036] The metal plating layers 34Q and 35Q, and the p mounting electrode 37A and the n mounting electrode 37B are insulated from the substrate 31 by an insulating film 32B (third insulating film), and the p mounting electrode 36A and the n mounting electrode 36B have their side surfaces and upper outer edges protected by a protective film 38B (fourth insulating film), which is an insulating film.

[0037] The base material 31 is provided with conductive vias 34 that fill the through holes of the base material 31 and electrically connect the metal plating layers 34P and 34Q. The base material 31 is also provided with conductive vias 35 that fill the through holes of the base material 31 and electrically connect the metal plating layers 35P and 35Q.

[0038] The metal plating layers 34P, 35P, 34Q, and 35Q, and the conductive vias 34 and 35 are made of a nickel / gold (Ni / Au) electroless plating layer and a copper (Cu) electrolytic plating layer formed on the electroless plating layer. The p mounting electrode 36A, the n mounting electrode 36B, the p mounting electrode 37A, and the n mounting electrode 37B are provided with a nickel / gold (Ni / Au) electrolytic plating layer so as to cover the metal plating layers 34P, 35P, 34Q, and 35Q.

[0039] 1C, a p-mounted electrode 37A (anode) and an n-mounted electrode 37B (cathode) are exposed on the back surface of the support substrate 30. For convenience during mounting, a cathode mark 39 is also formed.

[0040] (3) Structure of the protection element In this embodiment, p-doped regions 33A and 33B are provided on the inner wall surfaces of the through holes in which the conductive vias 34 and 35 are provided. The p-doped regions 33A and 33B are regions that have been made p-type by diffusing p-type impurities such as boron (B) or aluminum (Al), and pn junctions formed between the p-doped regions 33A and 33B and the substrate 31 (n-type silicon) function as Zener diodes ZD1 and ZD2, respectively.

[0041] When a p-type semiconductor substrate is used as the base material 31, the Zener diodes ZD1 and ZD2 can be formed by doping n-type impurities to form n-doped regions.

[0042] Fig. 4A is an equivalent circuit diagram of the semiconductor light emitting device 10. Fig. 4B is a diagram showing a schematic diagram of voltage-current characteristics (VI characteristics) of the light emitting element 20 and a pair of Zener diodes ZD1 and ZD2 (hereinafter also referred to as double Zener diode DZD) formed on the supporting substrate 30.

[0043] As shown in FIG. 4A, the cathodes (K) of two Zener diodes ZD1 and ZD2 are connected in series (i.e., connected in the opposite directions to each other), and a double Zener diode DZD, both of whose terminals are anodes (A), is connected in parallel to the light-emitting element 20 to form a circuit.

[0044] As shown in Fig. 4B, the VI characteristics of the two Zener diodes ZD1 and ZD2 are combined to form a VI characteristic (ZD1+ZD2) that is a composite of the VI characteristics of both. In other words, the Zener diode ZD1 is connected in the reverse direction to the forward current of the Zener diode ZD2 (the region where V<0 in the figure, shown by the dashed line), so it provides protection against overcurrents such as surges and ESD in both positive and negative directions.

[0045] Although the case where two Zener diodes ZD1 and ZD2 are formed has been described, at least one Zener diode may be formed by providing a diffusion region on the inner wall surface of at least one of the conductive vias 34 and 35. Moreover, it is preferable that the diffusion region is formed on the entire inner wall surface of the through holes V1, V2 (see FIG. 5A) in which the conductive vias 34, 35 are provided, because this can improve the Zener characteristics.

[0046] (3) Bonding the light-emitting element and the supporting substrate The positional relationship when bonding the light emitting element 20 and the supporting substrate 30 will be described below. 3, 2A, and 2B, the p-electrode 26 of the light-emitting element 20 is joined to the p-mounted electrode 36A of the supporting substrate 30 by a conductive bonding layer 41A. The n-electrode 27 of the light-emitting element 20 is joined to the n-mounted electrode 36B of the supporting substrate 30 by a conductive bonding layer 41B.

[0047] Therefore, by this bonding, the p mounting electrode 36A is electrically connected to the p electrode 24 of the light emitting element 20 via the p element electrode 26, and the n mounting electrode 36B is electrically connected to the n element electrode 27. Also, as shown in Fig. 3 and Fig. 2A, the n mounting electrode 36B is electrically connected to the multiple n electrodes 25 of the light emitting element 20 via the transition wiring portion 27T of the n element electrode 27. That is, the p electrode 24 and the n electrode 25 of the light emitting element 20 are electrically connected in correspondence with a pair of mounting electrodes (the p mounting electrode 36A and the n mounting electrode 36B). Furthermore, as shown in Figures 2A and 2B, by bonding the light-emitting element 20 to the supporting substrate 30, the insulating element protection film 28B and the insulating protection film 38A are in contact with each other all around, and the entire periphery of the bonding portions, which are the electrical connection parts, i.e., the p element electrode 26 and the n element electrode 27, the p mounting electrode 36A and the n mounting electrode 36B, and the bonding layer 41A and the bonding layer 41B are entirely covered and protected.

[0048] 2. Manufacturing method of semiconductor light emitting device (1) Method for manufacturing light-emitting element The light emitting element 20 can be formed by, for example, metal organic chemical vapor deposition (MOCVD). Specifically, the light emitting semiconductor structure layer SL can be formed by growing crystals on a transparent substrate such as a sapphire substrate by MOCVD. Note that the crystal growth method is not limited to MOCVD, and molecular beam epitaxy (MBE) or the like can also be used. The light emitting element 20 can be formed by forming electrodes and insulating films by photolithography on the semiconductor structure layer that has been subjected to crystal growth.

[0049] (2) Method for manufacturing the support substrate The manufacturing method of the support substrate 30 will be described in detail below with reference to the drawings. Fig. 5A is a cross-sectional view showing steps S0 to S4, Fig. 5B is a cross-sectional view showing steps S5 to S8, and Fig. 5C is a cross-sectional view showing steps S9 to S10 of the manufacturing method. For ease of explanation and understanding, steps S0 to S8 will be described by illustrating a portion of the support substrate wafer corresponding to one semiconductor light emitting device 10.

[0050] (S0) Preparation of substrate A conductive n-type silicon substrate 31 made of silicon (Si) doped with phosphorus (P) or arsenic (As) is prepared.

[0051] (S1) Formation of insulating film An insulating film IF made of SiO2 is formed on the upper and rear surfaces of the substrate 31. The insulating film can be formed by a method such as thermal oxidation, TEOS (Tetra Ethoxy Silane)-CVD, sputtering, or ALD (Atomic Layer Deposition).

[0052] (S2) Through-hole formation process Through holes V1 and V2 are formed by a RIE (reactive ion etching) process or mechanical drilling using a microdrill or the like, penetrating the base material 31 and the insulating films IF on the upper and rear surfaces of the base material 31. Furthermore, by forming the through holes V1 and V2, insulating films 32A and 32B (third insulating films) are formed on the upper and rear surfaces of the base material 31, respectively.

[0053] (S3) Impurity diffusion For example, p-type impurities such as boron (B) or aluminum (Al) are diffused from the inner walls of the through holes V1 and V2 into the base material 31 by thermal diffusion, making the inner walls p-type. That is, p-diffusion regions (p-Si) are formed on the inner walls of the through holes V1 and V2 of the base material 31 made of n-type silicon, and Zener diodes ZD1 and ZD2 are formed, respectively.

[0054] (S4) Formation of conductive layer Nickel (Ni) and gold (Au) are electrolessly plated to form an electroless plating layer PL1. Then, copper (Cu) is electrolytically plated to form an electrolytic plating layer PL2. This forms a plating layer PL (PL1+PL2). The insides of the through holes V1 and V2 are filled with Cu, and the plating layers PL on the upper and lower sides are electrically connected by the conductive vias 34 and 35.

[0055] (S5) Electrode patterning and sintering A mask is formed by photolithography, and then Cu, Au and Ni other than those in the electrode regions are removed by wet etching to form metal plating layers 34P and 35P on the upper insulating film 32A and metal plating layers 34Q and 35Q on the rear insulating film 32B. Next, ohmic contact is formed between the Ni / Au on the wall surfaces of the conductive vias 34 and 35 and the p-Si region by thermal sintering.

[0056] (S6) Formation of electrode surface layer A nickel Ni / Au layer is formed on the surfaces of the metal plating layers 34P and 35P, which are copper electrodes, by electrolytic plating, and a p-mounted electrode 36A and an n-mounted electrode 36B are formed on the upper surface side, respectively, and a p-mounted electrode 37A and an n-mounted electrode 37B are formed on the rear surface side, respectively.

[0057] (S7) Formation of insulating protective film By a method such as TEOS-CVD, sputtering, or ALD, a protective film 38A (second insulating film) made of SiO2 is formed on the insulating film 32A (first insulating film), and a protective film 38B (fourth insulating film) made of SiO2 is formed on the insulating film 32B (third insulating film).

[0058] (S8) Electrode formation A mask is formed by photolithography, and then the protective films 38A, 38B on part of the upper surfaces of the mounting electrodes 36A and n mounting electrodes 36B and on part of the lower surfaces of the p mounting electrodes 37A and n mounting electrodes 37B are etched away with buffered hydrofluoric acid (hydrofluoric acid buffer solution) to expose the p mounting electrodes 36A and n mounting electrodes 36B, and the p mounting electrodes 37A and n mounting electrodes 37B.

[0059] (S9) Mounting of light-emitting elements For example, the light emitting element 20 is mounted on the support substrate 30 via bonding members 41A, 41 made of a gold-tin alloy (for example, Au-20 wt % Sn). The mounting can be performed by thermocompression bonding or reflow.

[0060] (S10) Singulation Finally, the support substrate wafer is diced using a dicing blade DB to cut into individual semiconductor light emitting devices 10. The dicing direction may be from the element surface side on which the light emitting elements 20 are mounted, or from the mounting electrode surface side on which the p mounting electrode 37A and n mounting electrode 37B are provided. In particular, dicing from the mounting electrode surface side allows the light emitting elements 20 to be mounted at intervals narrower than the blade width of the dicing blade DB. With the above steps, the semiconductor light emitting device 10 is completed.

[0061] Incidentally, by making the support substrate 30 larger than the light emitting elements 20, it is possible to form street portions that can be diced. Also, the light emitting elements 20 can be mounted on the support substrate 30 before being singulated. Incidentally, when the support substrate 30 is to be equal to or smaller in size than the light emitting elements 20, it is also possible to perform a process in which the support substrate 30 is first singulated, and then the light emitting elements 20 and the support substrate 30 are individually mounted.

[0062] Here, "same size" refers to the smaller of the amount of protrusion PR (see FIG. 1A) of the support substrate 30 relative to the light emitting element 20 when viewed from above (i.e., in a direction perpendicular to the light emitting element and the support substrate) or the amount of protrusion (-PR) of the light emitting element 20 relative to the support substrate 30 being 10% or less or 10 μm or less. It is more preferable that the amount of protrusion is 5% or less or 5 μm or less, whichever is smaller.

[0063] (3) Protection circuit and device size As described above in detail, according to the semiconductor light-emitting device 10 of this embodiment, it is possible to provide a semiconductor light-emitting device 10 having a support substrate 30 that is the same size as the light-emitting element 20 when viewed from above, and having a protection circuit consisting of two Zener diodes connected in series in parallel to the light-emitting element 20.

[0064] Therefore, it is possible to provide the semiconductor light emitting device 10 having a high protection function against overcurrent such as surges in both forward and reverse directions and ESD for the light emitting element 20. In addition, since the two Zener diodes ZD1 and ZD2 are formed and connected to the inner wall surface of the base material 31 that contacts the wall surfaces of the conductive vias 34 and 35, it is possible to make the support substrate 30 equal to or smaller than the size of the light emitting element 20, and the semiconductor light emitting devices 10 can be densely arranged, for example, in a matrix.

[0065] Furthermore, by increasing the size (i.e., diameter and length) of the conductive vias 34 and 35, the performance of the two Zener diodes can be further improved, and a semiconductor light emitting device 10 with high protection function can be provided.

[0066] (4) Modifications 1 and 2 Fig. 6A is a diagram illustrating a semiconductor light emitting device 50 according to Modification 1 of the first embodiment of the present invention, and Fig. 6B is a diagram illustrating a semiconductor light emitting device 50 according to Modification 2 of the first embodiment of the present invention.

[0067] The semiconductor light emitting device 50 of this modification includes the semiconductor light emitting device 10 of the first embodiment and a device protective film 51A that covers the entire outer surface of the light emitting element 20. The device protective film 51A can be made of, for example, SiO2 or Al2O3. Note that Al2O3 is preferable in terms of weather resistance.

[0068] Furthermore, by providing a device protective film 51B that covers the exposed surface of the support substrate 30, defects such as short circuits can be prevented.

[0069] That is, except for the p mounting electrode 37A and the n mounting electrode 37B, the element substrate 11, the light emitting semiconductor structure layer SL, the supporting substrate 30, the insulating film 32A, the protective film 38A, the insulating film 32B, and the protective film 38B are covered with the device protective films 51A, 51B. Therefore, that is, there is no metal surface on the surfaces on which the device protective films 51A, 51B are formed, and the device protective films 51A, 51B have high adhesion, so that durability and airtightness are high, and reliability can be improved.

[0070] 6B is a cross-sectional view showing a semiconductor light emitting device 55 of Modification 2, and as shown in the figure, the device protective film 51A does not have to be provided on the light emitting surface 10S. In this case, the device protective films 51A and 51B may be ceramic coatings having high light reflectivity (e.g., reflectance of 80% or more), such as alumina or alumina-zirconia.

[0071] The device protection films 51A, 51B can be formed by CVD or sputtering, but are preferably formed by ALD (atomic layer deposition). The outer surface of the semiconductor light emitting device 10 has many projections and recesses, but the ALD method can be used to cover even the finely recessed surfaces. A light reflective ceramic coating can be formed by thermal spraying.

[0072] For example, the completed semiconductor light emitting device 10 can be formed by adhering the p-mounted electrode 37A and the n-mounted electrode 37B to a heat-resistant protective sheet so as to protect them, and then depositing SiO2 and / or Al2O3 on the surface by the ALD method.

[0073] Alternatively, a dielectric multilayer film (visible light reflective film) can be used for the device protective films 51A and 51B shown in Fig. 6B. For example, if the side and bottom surfaces of the light emitting element 20 except for the light emitting surface 10S are covered with a dielectric multilayer film, in addition to protecting the end surfaces of the support substrate 30, light emitted from the side surfaces of the light emitting element 20 can be suppressed, and strong light can be emitted from the light emitting surface 10S.

[0074] Such a dielectric multilayer film can be formed by ALD (atomic layer deposition). For example, the completed semiconductor light emitting device 10 is attached to a heat-resistant protective sheet so as to protect the p-electrode 37A and the n-electrode 37B, and a protective sheet is also attached to the light emitting surface 10S. The protective sheet for the light emitting surface 10S has holes through which material gas can be supplied and discharged. Then, a dielectric multilayer film that reflects light in the visible light band can be formed by depositing multiple SiO2, Al2O3, TiO2 films, etc. by the ALD method.

[0075] [Second embodiment] 1. Semiconductor light-emitting devices Fig. 7A is a diagram showing a top surface of a semiconductor light emitting device 60 according to a second embodiment of the present invention, and Fig. 7B is a cross-sectional view taken along line AA shown in Fig. 7A. Figs. 7C and 7D are a rear view of the semiconductor light emitting device 60 and a wiring pattern of the circuit board 100, respectively.

[0076] 7A and 7B, in a semiconductor light-emitting device 60, three light-emitting elements 20 of the first embodiment are mounted on a common support substrate 61. The common support substrate 61 is provided with three double Zener diodes DZD corresponding to the three light-emitting elements 20, respectively.

[0077] In this embodiment, the three light emitting elements have the same configuration, but for ease of explanation, they will be referred to as a first light emitting element 20A, a second light emitting element 20B, and a third light emitting element 20C, respectively.

[0078] As shown in Figures 7C and 7D, the first light-emitting element 20A, the second light-emitting element 20B and the third light-emitting element 20C are mounted in series with the p-mounting electrode 37A and the n-mounting electrode 37B of each of the first light-emitting element 20A to the third light-emitting element 20C straddling the anode 101, the circuit wirings 102, 103 and the cathode 104 of the circuit board 100.

[0079] 7E shows an equivalent circuit when the semiconductor light emitting device 60 is mounted on the circuit board 100. R12 and R23 are the resistance between the midpoints (i.e., the connection point of the two Zener diodes ZD1 and ZD2) of the double Zener diodes DZD connected to the first and second light emitting elements 20A and 20B, respectively, and the resistance between the midpoints of the double Zener diodes DZD of the second and third light emitting elements 20B and 20C.

[0080] As shown in FIG. 7E, when the rated current value Vf of each of the first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C is, for example, 3.5 V, the inter-terminal voltage VT between the anode 101 and the cathode 104 is VT = 3 × 3.5 V = 10.5 V.

[0081] Therefore, for example, if the Zener voltage of one Zener diode DZ is 24 V, which is higher than the driving voltage when the light-emitting elements are connected in series, a semiconductor light-emitting device 60 can be provided that has high protection function against overcurrents in both positive and negative directions even when the first light-emitting element 20A to the third light-emitting element 20C are driven.

[0082] Furthermore, according to the semiconductor light-emitting device 60 of this embodiment, by mounting multiple light-emitting elements 20 on a circuit board having a wiring pattern that can drive the multiple light-emitting elements 20 individually, it is possible to provide high protection function and cause each light-emitting element 20 to emit light individually.

[0083] In addition, since the double Zener diode DZD is provided below the light emitting element 20 in an area smaller than the footprint of the light emitting element 20, it is possible to arrange a plurality of light emitting elements 20 adjacent to each other. For example, it is possible to arrange a plurality of light emitting elements 20 in a matrix form. In addition, it is possible to configure the semiconductor light emitting device 60 by connecting a plurality of light emitting elements 20 in series or parallel, or by combining the series and parallel connections in various ways.

[0084] In the present embodiment, the three light-emitting elements 20 have the same configuration, but they may have different configurations. For example, a plurality of light-emitting elements 20 having different emission wavelengths, sizes, etc. may be mounted on a common support substrate 61.

[0085] 2. Variations FIG. 8A is a cross-sectional view that typically illustrates a semiconductor light-emitting device 70 that is a modification of the second embodiment of the present invention.

[0086] In this modification, a first phosphor plate 71, a second phosphor plate 72, and a third phosphor plate 73 are respectively attached to the light emission surfaces (upper surfaces) of the first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C by a light-transmitting adhesive 75. The first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C may have the same configuration or may have different configurations.

[0087] The first phosphor plate 71 and the second phosphor plate 72 are, for example, yellow phosphor plates with alumina as a base material and doped with YAG:Ce, while the third phosphor plate 7 is, for example, an orange phosphor plate with glass as a base material and doped with α-sialon.

[0088] Further, each side surface of the first light emitting element 20A, the second light emitting element 20B, and the third light emitting element 20C is covered with a light blocking resin 76. Further, the light blocking resin 76 is filled between each of the light emitting elements, The light-shielding resin 76 is made of, for example, a silicone resin containing titanium oxide particles, and prevents light from leaking out from the light-emitting element.

[0089] The same or different light conversion members (phosphor plates) may be provided on the first light emitting element 20A, the second light emitting element 20B, and the third light emitting element 20C. Also, instead of the light conversion members, translucent optical members may be provided.

[0090] Fig. 8B shows a wiring pattern of the circuit board 110 on which the semiconductor light emitting device 70 of this modification is mounted. As shown in Fig. 8A and Fig. 8B, the p mounting electrode 37A and the n mounting electrode 37B of the first light emitting element 20A are mounted on the circuit wirings 111 and 112 of the circuit board 110, respectively, and the p mounting electrode 37A and the n mounting electrode 37B of the second light emitting element 20B are mounted on the circuit wirings 112 and 113, so that the first light emitting element 20A and the second light emitting element 20B are connected in series.

[0091] The p-mounting electrode 37A and the n-mounting electrode 37B of the third light-emitting element 20C are mounted on the circuit wirings 114 and 115. Therefore, it is possible to drive the first light-emitting element 20A and the second light-emitting element 20B, which are connected in series, and the third light-emitting element 20C independently.

[0092] As shown in FIG. 8B, when the semiconductor light-emitting device 70 is mounted on the circuit board 110, if the rated current value Vf of each of the first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C is, for example, 3.5 V, the terminal-to-terminal voltage VT of the circuit wiring 111 and the circuit wiring 113 is VT = 2 × 3.5 V = 7 V, and the terminal-to-terminal voltage VT of the circuit wiring 114 and the circuit wiring 115 is 1 × 3.5 V = 3.5 V.

[0093] It is also possible to drive each light emitting element independently by separating the circuit wiring 112 of the circuit board 110. That is, depending on the connection form of these circuit wirings 111 to 115, serial driving or independent driving can be arbitrarily selected.

[0094] Since the first light emitting element 20A to the third light emitting element 20C are each provided with a double Zener diode DZD, it is possible to provide a semiconductor light emitting device 70 having a high protection function against overcurrents in both positive and negative directions.

[0095] As described above in detail, the semiconductor light-emitting device of the present invention can provide a semiconductor light-emitting device that is suitable for miniaturization, can be densely arranged in a grid or matrix, and has high protection performance against overcurrents in both positive and negative directions. [Explanation of symbols]

[0096] 10, 50, 55, 60, 70: Semiconductor light-emitting device 20: Light emitting element 21: n-type semiconductor layer 22: Light-emitting layer 23: p-type semiconductor layer 24: p electrode (p ohmic electrode) 25: n electrode (n ohmic electrode) 26: p-element electrode (element anode) 27: n element electrode (element cathode) 28B: Element protection film 30: Support substrate 31: Base material 36A:p-mounted electrode 36B:n Mounted electrodes 38A: Insulating protective film 41A, 41B: Bonding layer 37A: p-mounted electrode 37B:n mounting electrodes 34, 35: Conductive vias DZD: Double Zener diode ZD1, ZD2: Zener diode 71, 72, 73: Light conversion member 76: Light-shielding resin

Claims

1. a support substrate including a flat base material made of a first conductive type semiconductor, the flat base material having at least one pair of mounting electrodes formed of an anode and a cathode on a first main surface thereof, and at least one pair of mounting electrodes formed of an anode and a cathode on a second main surface thereof opposed to the first main surface thereof; a semiconductor light emitting element mounted on the pair of mounting electrodes, the p-electrode and the n-electrode being electrically connected to each other in correspondence with the pair of mounting electrodes; a pair of conductive vias electrically connecting each of the pair of mounting electrodes to each of the pair of placement electrodes; a diffusion region of a second conductivity type opposite to the first conductivity type, the diffusion region being provided on an inner wall surface of the base material in contact with the conductive via; A semiconductor light emitting device comprising:

2. The semiconductor light emitting device according to claim 1 , wherein the diffusion region of the second conductivity type is provided in both of the pair of conductive vias.

3. The semiconductor light emitting device according to claim 1 , wherein the diffusion region of the second conductivity type is formed on the entire inner wall surface of a through hole in which the conductive via is provided.

4. The semiconductor light emitting device has an element anode and an element cathode on one side, 2. The semiconductor light emitting device according to claim 1, wherein the element anode and the element cathode are electrically connected to the pair of mounting electrodes of the supporting substrate, respectively.

5. the element anode and the element cathode are joined to the pair of mounting electrodes by a conductive joining member, The anode and the cathode of the semiconductor light emitting device are covered with an insulating protective layer. The pair of mounting electrodes of the support substrate are covered with an insulating support substrate insulating layer, 2. The semiconductor light emitting device according to claim 1, wherein the element protection layer and the support substrate insulating layer are in contact with each other at joints between the element anode and the element cathode and the pair of mounting electrodes.

6. 2. The semiconductor light emitting device according to claim 1, wherein the element protection layer and the support substrate insulating layer cover the entire periphery of the joint.

7. 7. The semiconductor light emitting device according to claim 6, wherein the bonding member is a gold-tin alloy.

8. 2. The semiconductor light emitting device according to claim 1, further comprising a device protective film covering the entire outer surface of the semiconductor light emitting element.

9. the supporting substrate has a plurality of pairs of the above-mentioned mounting electrodes and a plurality of pairs of mounting electrodes, The semiconductor light emitting device according to claim 1 , wherein a plurality of the semiconductor light emitting elements are mounted on the plurality of pairs of the mounting electrodes.

10. The semiconductor light emitting device according to claim 9 , wherein the same and / or different light converting members are provided on the light emitting surfaces of the plurality of semiconductor light emitting elements.

11. 2. The semiconductor light emitting device according to claim 1, wherein the substrate is an n-type semiconductor or a p-type semiconductor.

12. a pair of Zener diodes are formed by the diffusion regions provided in both of the pair of conductive vias and the substrate; The pair of Zener diodes are connected in series in the opposite directions.

12. The semiconductor light emitting device according to claim 2.

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