Semiconductor light-emitting device

Abstract

To provide a semiconductor light-emitting device with high output and a high protection function against overcurrent, being suitable for size reduction and able to be densely disposed in matrix.SOLUTION: A semiconductor light-emitting device includes a support substrate 30 including at least a pair of placement electrodes 36A an 36B including an anode and a cathode and provided on a light-reflective dielectric multilayer film 39 provided on a first main surface of a base material 31, and at least a pair of package electrodes 37A and 37B including an anode and a cathode and provided on a second main surface of the base material 31 that faces the first main surface, a semiconductor light-emitting element 20 placed with a p-electrode 26 and an n-electrode 25 electrically connected in accordance with the pair of placement electrodes 36A and 36B, a pair of conductive vias 34 electrically connecting the pair of package electrodes 37A and 37B and the pair of placement electrodes 36A and 36B, respectively, and a diffusion region of a second conductivity type, which is an opposite conductivity type to a first conductivity type, provided on an inner wall surface of the base material 31 in contact with the conductive via 34.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device including a semiconductor light emitting element and a protection element. [Background technology]

[0002] In recent years, semiconductor light-emitting elements such as light-emitting diodes (LEDs) are often arranged in a single device to achieve higher output and light distribution control. In addition, protective elements are often provided in light-emitting devices to improve their resistance to ESD (electrostatic discharge).

[0003] For example, in the field of automobile headlights, there are known headlamps with variable light distribution (ADB: Adaptive Driving Beam) that arrange multiple semiconductor light emitting elements to control the light distribution. In addition, LED packages for high-output lighting and LED packages for information and communication devices in which LEDs are densely arranged are also known.

[0004] Moreover, Patent Document 1 discloses an optoelectronic semiconductor device in which an ESD protection element is arranged between a carrier and a semiconductor body.

[0005] Patent document 2 discloses a light-emitting device including a light-emitting element and a mounting substrate including a semiconductor electrostatic discharge protection element section provided on a surface opposite to the surface on which the light-emitting element is mounted and connected to the light-emitting element.

[0006] Patent Document 3 discloses a light-emitting element package including a semiconductor substrate having first and second conductive vias, a diode formed by doping impurities on a second surface of the semiconductor substrate and having a Zener breakdown voltage in both directions, and first and second external electrodes formed on the second surface so as to connect the first and second conductive vias to both ends of a bidirectional Zener diode region, respectively. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Special Publication No. 2018-519669 [Patent Document 2] WO2013 / 187318 publication [Patent Document 3] US2013 / 0020598A1 publication Summary of the Invention [Problem to be solved by the invention]

[0008] The present invention has been made in consideration of the above-mentioned points, and aims to provide a semiconductor light-emitting device that is suitable for miniaturization, can be densely arranged in a grid or matrix, has high output, and has high protection performance against overcurrent. [Means for solving the problem]

[0009] A semiconductor light emitting device according to one embodiment of the present invention comprises: a support substrate including a flat-plate-shaped base material made of a semiconductor of a first conductivity type, a light-reflective dielectric multilayer film provided on a first main surface of the base material, at least one pair of mounting electrodes, each consisting of an anode and a cathode, provided on the dielectric multilayer film, and at least one pair of mounting electrodes, each consisting of an anode and a cathode, provided on a second main surface opposite to the first main surface of the base material; a semiconductor light emitting element mounted on the pair of mounting electrodes, the p-electrode and the n-electrode being electrically connected to each other in correspondence with the pair of mounting electrodes; a pair of conductive vias electrically connecting each of the pair of mounting electrodes to each of the pair of placement electrodes; a diffusion region of a second conductivity type opposite to the first conductivity type, the diffusion region being provided on an inner wall surface of the base material in contact with the conductive via; It has. [Brief description of the drawings]

[0010] [Figure 1A] 1 is a diagram illustrating a top surface of the semiconductor light emitting device according to the first embodiment. [Figure 1B] 1 is a diagram illustrating a side view of the semiconductor light emitting device according to the first embodiment. [Figure 1C] 2 is a diagram illustrating a schematic rear surface of the semiconductor light emitting device according to the first embodiment. FIG. [Diagram 2] 1B is a cross-sectional view showing a cross section taken along line AA shown in FIG. 1A. [Figure 3A] 3 corresponds to a cross section of the semiconductor light emitting device shown in FIG. 2, and shows bonding of a light emitting element to a supporting substrate. [Figure 3B] FIG. 2 is a diagram showing a schematic rear surface (bonding surface) of the light-emitting element. [Figure 3C] FIG. 2 is a diagram illustrating a schematic top surface (bonding surface) of a supporting substrate. [Figure 4A] 1 is an equivalent circuit diagram of a semiconductor light emitting device. [Figure 4B] 1 is a diagram showing a schematic diagram of voltage-current characteristics of a pair of Zener diodes ZD1 and ZD2 formed on a light-emitting element and a supporting substrate. FIG. [Figure 5A] 5 is a cross-sectional view showing steps S0 to S4 of the method for manufacturing the supporting substrate. [Figure 5B] 5 is a cross-sectional view showing steps S5 to S8 of the method for manufacturing the supporting substrate. [Figure 5C] 5 is a cross-sectional view showing steps S9 to S10 of the method for manufacturing the supporting substrate. [Figure 6] 1 is a cross-sectional view illustrating a semiconductor light-emitting device according to a first modified example of the first embodiment. [Figure 7] FIG. 11 is a cross-sectional view that illustrates a semiconductor light-emitting device according to a second modified example. [Figure 8] FIG. 11 is a cross-sectional view that illustrates a semiconductor light-emitting device according to a third modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] In the following, preferred embodiments of the present invention will be described, which may be modified and combined as appropriate. In the following description and accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals. [First embodiment] 1. Structure of semiconductor light emitting device 1A, 1B, and 1C are schematic diagrams showing the top, side, and back surfaces, respectively, of a semiconductor light-emitting device 10 according to a first embodiment of the present invention, and Fig. 2 is a cross-sectional view taken along line AA in Fig. 1A.

[0012] As shown in FIG. 1B and FIG. 2, the semiconductor light emitting device 10 has a structure in which a light emitting element 20, which is an LED, is bonded to a support substrate 30.

[0013] Fig. 3A corresponds to the cross section of the semiconductor light emitting device 10 shown in Fig. 2, and is a diagram showing bonding of the light emitting element 20 to the support substrate 30. Also, Fig. 3B and Fig. 3C show the back surface (bonding surface) of the light emitting element 20 and the upper surface (bonding surface) of the support substrate 30, respectively.

[0014] Hereinafter, the configurations of the light emitting element 20 and the supporting substrate 30, and the bonding between the light emitting element 20 and the supporting substrate 30 will be described in detail with reference to FIGS. 3 to 3C. (1) Light-emitting element 3A, the light-emitting element 20 has an element substrate 11 and a light-emitting semiconductor structure layer SL formed on the element substrate 11. The light-emitting semiconductor structure layer SL has an n-type semiconductor layer 21, a light-emitting layer 22 formed on the n-type semiconductor layer 21, and a p-type semiconductor layer 23 formed on the light-emitting layer 22.

[0015] In this embodiment, the light emitting device 20 is a so-called flip chip, and has a p-element electrode 26 (element anode) and an n-element electrode 27 (element cathode) provided on one side of the element. The element structure will be described in detail below.

[0016] The element substrate 11 is a sapphire substrate, and is a substrate that is transparent to the light emitted from the light emitting layer 22. The light emitting semiconductor structure layer SL is formed by crystal growth on the element substrate 11. The light emitting semiconductor structure layer SL is, for example, a gallium nitride (GaN)-based LED structure layer that emits blue light, but the crystal system is not limited to this.

[0017] The n-type semiconductor layer 21 is, for example, a GaN or AlGaN layer doped with silicon (Si). The light emitting layer 22 has, for example, a single quantum well (SQW) or multiple quantum well (MQW) structure. Alternatively, the light emitting layer 22 may have a so-called bulk structure. The p-type semiconductor layer 23 is, for example, a GaN or AlGaN layer doped with magnesium (Mg).

[0018] Each of the n-type semiconductor layer 21 and the p-type semiconductor layer 23 is composed of at least one semiconductor layer. The n-type semiconductor layer 21 and the p-type semiconductor layer 23 may be provided with various semiconductor layers, such as a carrier barrier layer such as an electron blocking layer (EBL), a current diffusion layer, and a contact layer. The n-type semiconductor layer 21 and the p-type semiconductor layer 23 may be provided with an undoped layer (or an i-layer).

[0019] 1A and 3A, a p-electrode 24 (p-ohmic electrode) is provided on the light-emitting functional layer 20. Also, as shown in Fig. 1A, in the light-emitting semiconductor structure layer SL, the periphery and corners of the p-type semiconductor layer 23 and the light-emitting layer 22 are removed to form a recess 23H (one recess in this embodiment) where the n-type semiconductor layer 21 is exposed.

[0020] In this embodiment, the light emitting element 20 has a rectangular parallelepiped shape, and the recesses 23H are provided at the corners of the light emitting element 20. An n-electrode 25 (n-ohmic electrode) is formed on the exposed surface of the n-type semiconductor layer 21.

[0021] The p-electrode 24 is formed as a light-reflective electrode. The p-electrode 24 is made of, for example, an indium tin oxide (ITO) ohmic electrode of a translucent conductive film, a nickel (Ni) / silver (Ag) reflective film, and an ITO / Ni / Ag / Pt / Au layer in which platinum (Pt) and gold (Au) are formed in this order on the p-type semiconductor layer 23. Note that, although it is preferable that the p-electrode 24 is provided with a reflective film having a high reflectance such as an Ag film, the reflective film may not be provided.

[0022] 2, reflected light Lr emitted from the light emitting layer 22 and reflected by the p-electrode 24 is emitted from the surface 10S of the element substrate 11 together with direct light Ld from the light emitting layer 22. In other words, the surface 10S of the element substrate 11 is the light emission surface of the semiconductor light emitting device 10.

[0023] Furthermore, the light emitted from the light emitting layer 22 and directed toward the support substrate 30 through the recess 23H is reflected by the dielectric multilayer film 39 and is emitted from the surface 10S of the element substrate 11 together with the direct light Ld (reflected light Lr). It is preferable that the surface 10S of the element substrate 11 is roughened in order to improve the light extraction efficiency.

[0024] The n-electrode 25 is made of, for example, a Ti / Al layer in which titanium (Ti) and aluminum (Al) are formed in this order on the n-type semiconductor layer 21.

[0025] The materials and layer structures of the p-electrode 24 and the n-electrode 25 are not limited to those described above, and may be appropriately selected in consideration of various characteristics such as ohmic characteristics, light extraction efficiency by light reflection, and element reliability (lifetime).

[0026] An element protective film 28 made of an insulating film (SiO2) is provided on the side surface and the outer edge of the upper surface of the light emitting semiconductor layer SL composed of the n-type semiconductor layer 21, the light emitting layer 22, and the p-type semiconductor layer 23. In addition, as shown in Fig. 2, an element protective film 28 is also provided on the wall surface of the light emitting semiconductor structure layer SL exposed in the recess 23H.

[0027] Also provided is a p-element electrode (a first element electrode which is an electrode of the light-emitting element 20) 26 electrically connected to the p-electrode 24, and an n-element electrode (a second element electrode which is an electrode of the light-emitting element 20) 27 electrically connected to the n-electrode 25. An element protective film 28 made of an insulating film (e.g., SiO2) is provided on the side surfaces of the p-element electrode 26 and the n-element electrode 27.

[0028] As shown in FIG. 1A, the n-electrode 25 is formed in a circular region at the corner, and the p-electrode 26 is formed as a substantially rectangular region excluding the corner.

[0029] In the present embodiment, the case where one n-element electrode 27 is provided has been described as an example, but there may be provided a plurality of n-element electrodes 27. When a plurality of n-element electrodes 27 are provided, they are preferably provided at positions (e.g., four corners) that are rotationally symmetric with respect to the center C (FIG. 1A) of the light-emitting element 20, or at positions that are symmetric with respect to a line passing through the center C.

[0030] The p-electrode 26 and the n-electrode 27 are pad electrode layers made of, for example, Ti / Au layers. (2) Support substrate 3A again, the support substrate 30 has a base material 31, and the base material 31 has a first main surface MS1 and a second main surface MS2 facing the first main surface. In this embodiment, a dielectric multilayer film 39, which is a reflective film, is formed on the first main surface MS1 of the base material 31 over the entire main surface MS1. In other words, the dielectric multilayer film 39 is formed so as to include an area overlapping the light emitting element 20 (i.e., the footprint of the light emitting element 20) in a top view. By providing the dielectric multilayer film 39 on the first main surface MS1 of the base material 31 in this way, the dielectric multilayer film 39 is provided flatly, thereby obtaining excellent reflective characteristics.

[0031] The dielectric multilayer film 39 is made of, for example, (Al2O3 / TiO2)n, which is a multiplicity (n layers) of alumina (Al2O3) films and titanium oxide (TiO2) films stacked alternately. For example, n=5 to 30, and reflects light in the visible light range with a reflectance of 70% or more. The dielectric multilayer film 39 may be a film made of (Al2O3 / SiO2)n, which is a multiplicity of Al2O3 and silicon oxide (SiO2) stacked alternately.

[0032] A p-mounted electrode 36A and an n-mounted electrode 36B (a pair of mounted electrodes) are provided on the dielectric multilayer film 39, and a p-mounted electrode 37A and an n-mounted electrode 37B (a pair of mounted electrodes) are provided on the second main surface MS2 (rear surface) side of the base material 31. The support substrate 30 will be described in more detail below.

[0033] The base material 31 is a conductive n-type silicon substrate made of silicon (Si) doped with phosphorus (P), arsenic (As), etc. Note that the base material 31 may also be a p-type semiconductor substrate.

[0034] Metal plating layers 34P and 35P electrically isolated from each other are formed on the upper surface side (i.e., the bonding side with the light emitting element 20) of the base material 31. A p-mounted electrode 36A and an n-mounted electrode 36B electrically connected to the metal plating layers 34P and 35P, respectively, are formed on the metal plating layers 34P and 35P.

[0035] The metal plating layers 34P and 35P, and the p-mounted electrode 36A and the n-mounted electrode 36B are insulated from the substrate 31 by a dielectric multilayer film 39 and an insulating film 32A (first insulating film), and the side surfaces and outer edges of the upper surface of the p-mounted electrode 36A and the n-mounted electrode 36B are protected by a protective film 38A (second insulating film), which is an insulating film.

[0036] Metal plating layers 34Q and 35Q electrically isolated from each other are formed on the back surface side of the base material 31, i.e., on the mounting surface side of the support substrate 30 to a circuit board (not shown). A p-mounting electrode 37A (anode) and an n-mounting electrode 37B (cathode) are formed on the metal plating layers 34Q and 35Q and are electrically connected to the metal plating layers 34Q and 35Q, respectively.

[0037] The metal plating layers 34Q and 35Q, and the p mounting electrode 37A and the n mounting electrode 37B are insulated from the substrate 31 by an insulating film 32B (third insulating film), and the p mounting electrode 36A and the n mounting electrode 36B have their side surfaces and upper outer edges protected by a protective film 38B (fourth insulating film), which is an insulating film.

[0038] The base material 31 is provided with conductive vias 34 that fill the through holes of the base material 31 and electrically connect the metal plating layers 34P and 34Q. The base material 31 is also provided with conductive vias 35 that fill the through holes of the base material 31 and electrically connect the metal plating layers 35P and 35Q.

[0039] The metal plating layers 34P, 35P, 34Q, and 35Q, and the conductive vias 34 and 35 are made of a nickel / gold (Ni / Au) electroless plating layer and a copper (Cu) electrolytic plating layer formed on the electroless plating layer. The p mounting electrode 36A, the n mounting electrode 36B, the p mounting electrode 37A, and the n mounting electrode 37B are made of a nickel / gold (Ni / Au) electrolytic plating layer.

[0040] 1C, a p-mounted electrode 37A (anode) and an n-mounted electrode 37B (cathode) are exposed on the back surface of the support substrate 30. For convenience during mounting, a cathode mark 37M is also formed. (3) Structure of the protection element In this embodiment, p-doped regions 33A and 33B are provided on the inner wall surfaces of the through holes in which the conductive vias 34 and 35 are provided. The p-doped regions 33A and 33B are regions that have been made p-type by diffusing p-type impurities such as boron (B) or aluminum (Al), and pn junctions formed between the p-doped regions 33A and 33B and the substrate 31 (n-type silicon) function as Zener diodes ZD1 and ZD2, respectively.

[0041] When a p-type semiconductor substrate is used as the base material 31, the Zener diodes ZD1 and ZD2 can be formed by doping n-type impurities to form n-doped regions.

[0042] Fig. 4A is an equivalent circuit diagram of the semiconductor light emitting device 10. Fig. 4B is a diagram showing a schematic diagram of voltage-current characteristics (VI characteristics) of the light emitting element 20 and a pair of Zener diodes ZD1 and ZD2 (hereinafter also referred to as double Zener diode DZD) formed on the supporting substrate 30.

[0043] As shown in FIG. 4A, the cathodes (K) of two Zener diodes ZD1 and ZD2 are connected in series (i.e., connected in the opposite directions to each other), and a double Zener diode DZD, both of whose terminals are anodes (A), is connected in parallel to the light-emitting element 20 to form a circuit.

[0044] As shown in Fig. 4B, the VI characteristics of the two Zener diodes ZD1 and ZD2 are combined to form a VI characteristic (ZD1+ZD2) that is a composite of the VI characteristics of both. In other words, the Zener diode ZD1 is connected in the reverse direction to the forward current of the Zener diode ZD2 (the region where V<0 in the figure, shown by the dashed line), so it provides protection against overcurrents such as surges and ESD in both positive and negative directions.

[0045] Although the case where two Zener diodes ZD1 and ZD2 are formed has been described, at least one Zener diode may be formed by providing a diffusion region on the inner wall surface of at least one of the conductive vias 34 and 35.

[0046] Moreover, it is preferable that the diffusion region is formed on the entire inner wall surface of the through holes V1, V2 (see FIG. 5A) in which the conductive vias 34, 35 are provided, because this can improve the Zener characteristics. (3) Bonding the light-emitting element and the supporting substrate The positional relationship when bonding the light emitting element 20 and the supporting substrate 30 will be described below.

[0047] 3A to 3C and 2, the p-electrode 26 of the light-emitting element 20 is joined to the p-mounted electrode 36A of the supporting substrate 30 by a conductive bonding layer 41A. Moreover, the n-electrode 27 of the light-emitting element 20 is joined to the n-mounted electrode 36B of the supporting substrate 30 by a conductive bonding layer 41B.

[0048] Therefore, by this joining, the p mounting electrode 36A is electrically connected to the p electrode 24 of the light-emitting element 20 via the p element electrode 26, and the n mounting electrode 36B is electrically connected to the n element electrode 27, i.e., the p electrode 24 and the n electrode 25 of the light-emitting element 20 are electrically connected to correspond to a pair of mounting electrodes (p mounting electrode 36A and n mounting electrode 36B). 2. Manufacturing method of semiconductor light emitting device (1) Method for manufacturing light-emitting element The light emitting element 20 can be formed by, for example, metal organic chemical vapor deposition (MOCVD). Specifically, the light emitting semiconductor structure layer SL can be formed by growing crystals on a transparent substrate such as a sapphire substrate by MOCVD. Note that the crystal growth method is not limited to MOCVD, and molecular beam epitaxy (MBE) or the like can also be used.

[0049] The light emitting element 20 can be formed by forming electrodes and insulating films by photolithography on the semiconductor structure layer that has been subjected to crystal growth. (2) Method for manufacturing the support substrate The manufacturing method of the support substrate 30 will be described in detail below with reference to the drawings. Fig. 5A is a cross-sectional view showing steps S0 to S4, Fig. 5B is a cross-sectional view showing steps S5 to S8, and Fig. 5C is a cross-sectional view showing steps S9 to S10 of the manufacturing method. For ease of explanation and understanding, steps S0 to S8 will be described by illustrating a portion of the support substrate wafer corresponding to one semiconductor light emitting device 10. (S0) Preparation of substrate Insulating films are formed on the front and back surfaces of the substrate 31 to form insulating films 32A and 32B, respectively. The substrate 31 can be made of conductive n-type silicon (Si) doped with phosphorus (P) or arsenic (As). Methods such as thermal oxidation, TEOS (Tetra Ethoxy Silane)-CVD, sputtering, and ALD (Atomic Layer Deposition) can be used to form the insulating films. (S1) Formation of dielectric multilayer film A dielectric multilayer film 39 is formed on the insulating film 32A. The dielectric multilayer film 39 is, for example, an (Al2O3 / TiO2)n film in which a large number of Al2O3 films and TiO2 films are alternately laminated. Note that the dielectric multilayer film 39 may be formed on the base material 31 after removing the insulating film 32A. In this case, it is possible to reduce the thermal resistance.

[0050] The dielectric material used for the dielectric multilayer film 39 is not limited to these materials, and may be formed by alternately laminating at least two dielectric layers having different refractive indices. For example, SiO2 or the like may be used. (S2) Through-hole formation process Through holes V1 and V2 penetrating the base material 31, the insulating film 32A, the dielectric multilayer film 39, and the insulating film 32B are formed by a RIE (reactive ion etching) process or mechanical drilling using a microdrill or the like. (S3) Impurity diffusion For example, p-type impurities such as boron (B) or aluminum (Al) are diffused from the inner walls of the through holes V1 and V2 into the base material 31 by thermal diffusion, making the inner walls p-type. That is, p-diffusion regions (p-Si) 33A and 33B are formed on the inner walls of the through holes V1 and V2 of the base material 31 made of n-type silicon, and Zener diodes ZD1 and ZD2 are formed, respectively. (S4) Formation of conductive layer Nickel (Ni) and gold (Au) are electrolessly plated to form an electroless plating layer PL1. Then, copper (Cu) is electrolytically plated to form an electrolytic plating layer PL2. This forms a plating layer PL (PL1+PL2). The insides of the through holes V1 and V2 are filled with Cu, and the plating layers PL on the upper and lower sides are electrically connected by the conductive vias 34 and 35. (S5) Electrode patterning and sintering A mask is formed by photolithography, and then Cu, Au and Ni other than those in the electrode regions are removed by wet etching to form metal plating layers 34P and 35P on the upper dielectric multilayer film 39 and metal plating layers 34Q and 35Q on the rear insulating film 32B.

[0051] Next, ohmic contact is formed between the Ni / Au on the wall surfaces of the conductive vias 34 and 35 and the p-Si region by thermal sintering. (S6) Formation of electrode surface layer By electrolytic plating, a nickel Ni / Au layer is formed on the surfaces of metal plating layers 34P and 35P, which are electrodes with exposed copper, and p-mounted electrodes 36A and n-mounted electrodes 36B are formed on the upper surface side, respectively, and p-mounted electrodes 37A and n-mounted electrodes 37B are formed on the rear surface side, respectively. (S7) Formation of insulating protective film By a method such as TEOS-CVD, sputtering, or ALD, the upper surface side is covered with a protective film 38A (second insulating film) made of SiO 2 , and the rear surface side is covered with a protective film 38B (fourth insulating film) made of SiO 2 . (S8) Electrode formation A mask is formed by photolithography, and then the protective films 38A and 38B are removed by etching with buffered hydrofluoric acid (hydrofluoric acid buffer solution) to expose the p mounted electrode 36A, the n mounted electrode 36B, the p mounted electrode 37A and the n mounted electrode 37B. (S9) Mounting of light-emitting elements For example, the light emitting element 20 is mounted on the support substrate 30 via bonding members 41A and 41B made of a gold-tin alloy (for example, Au-20 wt % Sn). The mounting can be performed by thermocompression bonding or reflow. (S10) Singulation Finally, the support substrate wafer is diced using a dicing blade DB to cut it into individual semiconductor light emitting devices 10. In this way, the semiconductor light emitting devices 10 are completed.

[0052] In addition, by making the support substrate 30 larger than the light emitting element 20, a street portion that can be diced can be formed, so that the light emitting element 20 can be mounted on the support substrate 30 before singulation. When the support substrate 30 is to be equal to or smaller than the size of the light emitting element 20, the support substrate 30 can be singulated first, and the light emitting element 20 and the support substrate 30 can be mounted individually.

[0053] Here, "same size" refers to the smaller of the amount of protrusion PR (see FIG. 1A) of the support substrate 30 relative to the light emitting element 20 when viewed from above (i.e., in a direction perpendicular to the light emitting element and the support substrate) or the amount of protrusion (-PR) of the light emitting element 20 relative to the support substrate 30 being 10% or less or 10 μm or less. It is more preferable that the amount of protrusion is 5% or less or 5 μm or less, whichever is smaller. (3) Protection circuit and device size As described above in detail, according to the semiconductor light-emitting device 10 of this embodiment, it is possible to provide a semiconductor light-emitting device 10 having a support substrate 30 that is the same size as the light-emitting element 20 when viewed from above, and having a protection circuit consisting of two Zener diodes connected in series in parallel to the light-emitting element 20.

[0054] Therefore, it is possible to provide the semiconductor light emitting device 10 having a high protection function against overcurrent such as surges in both forward and reverse directions and ESD for the light emitting element 20. In addition, since the two Zener diodes ZD1 and ZD2 are formed and connected to the inner wall surface of the base material 31 that contacts the wall surfaces of the conductive vias 34 and 35, it is possible to make the support substrate 30 equal to or smaller than the size of the light emitting element 20, and the semiconductor light emitting devices 10 can be densely arranged, for example, in a matrix.

[0055] Furthermore, since a dielectric multilayer film 39, which is a light-reflecting film, is provided, light leaking between the element electrodes 26, 27 of the light-emitting element 20 is reflected by the dielectric multilayer film 39 and returned to the light-emitting element 20, and can be emitted from the light-emitting surface 10S, thereby improving the light output.

[0056] Furthermore, by increasing the size (i.e., diameter and length) of the conductive vias 34 and 35, the performance of the two Zener diodes can be further improved, and a semiconductor light emitting device 10 with high protection function can be provided. (4) Variation 1 FIG. 6 is a cross-sectional view that typically illustrates a semiconductor light-emitting device 50 that is Modification 1 of the first embodiment of the present invention.

[0057] The semiconductor light emitting device 50 of the first modification has a wavelength conversion member 51 that covers the upper and side surfaces of the semiconductor light emitting device 10 of the first embodiment. The wavelength conversion member 51 can be made of, for example, a phosphor-containing resin in which phosphor particles such as cerium-activated yttrium aluminum garnet (YAG:Ce) are dispersed in a medium such as a light-transmitting silicone resin or epoxy resin.

[0058] In particular, when a phosphor having a particle size of several μm to several tens of μm is used, the conversion efficiency of the excitation light can be improved. By providing a wavelength conversion member 51 having phosphor particles dispersed in a silicone resin around the semiconductor light emitting device 10, it is possible to provide a semiconductor light emitting device 50 that emits, for example, white light or a phosphor emission color.

[0059] Also, as in the semiconductor light emitting device 10, the dielectric multilayer film 39 that reflects the light emitted toward the supporting substrate 30 is provided, thereby improving the light output. Also, the side surface of the supporting substrate 30 is protected by the wavelength converting member 51, thereby preventing defects such as short circuits. (5) Variation 2 FIG. 7 is a cross-sectional view that typically illustrates a semiconductor light-emitting device 60 that is Modification 2 of the first embodiment of the present invention.

[0060] The semiconductor light-emitting device 60 of variant example 2 has a wavelength conversion member 61 that covers the entire light emission surface 10S (upper surface) and side surfaces of the light-emitting element 20, and a light-shielding layer 62 that covers the wavelength conversion member 61 as well as the side surfaces of the wavelength conversion member 61 and the supporting substrate 30.

[0061] In the present modified example 2, quantum dots (QD: Quantum Dots) are used for the wavelength conversion member 61. The converted wavelength of the QD light conversion member is determined by its particle size.

[0062] Since QDs are ultrafine particles with a particle size of nano-order size, for example, several nm to several tens of nm, they can be densely attached to the light emitting surface 10S and side surfaces of the light emitting element 20 of the semiconductor light emitting device 10. This makes it possible to suppress localized color unevenness caused by unevenness in the mixed color of the blue light of the excitation light and the yellow light of the phosphor, and to obtain uniform mixed light and converted monochromatic light.

[0063] A light-reflecting layer in which TiO2 particles are added to a silicone resin, or a light-absorbing layer in which TiO2 particles and carbon black are added to a silicone resin, can be used for the light-shielding layer 62. The resin, reflective particles, absorbing material, etc. used for the light-shielding layer 62 can be appropriately selected and applied.

[0064] Since the light-shielding layer 62 is provided, optical crosstalk and the like can be prevented even if multiple semiconductor light-emitting devices 60 are arranged so that their sides are in contact with each other or arranged closely to each other. Therefore, multiple semiconductor light-emitting devices 60 can be arranged adjacent to each other, and many semiconductor light-emitting devices 60 can also be arranged in a matrix.

[0065] In addition, since the dielectric multilayer film 39 that reflects the light emitted toward the supporting substrate 30 is provided, the light output can be improved. Furthermore, since the side surface of the semiconductor light emitting device 60 is protected by the light shielding layer 62, defects such as short circuits can be prevented.

[0066] Furthermore, since the double Zener diode DZD is provided, it is possible to provide the semiconductor light emitting device 60 with a high level of protection against overcurrents in both positive and negative directions. (6) Variation 3 FIG. 8 is a cross-sectional view that typically shows a semiconductor light-emitting device 70 that is a third modification of the first embodiment of the present invention.

[0067] A semiconductor light-emitting device 70 of the third modification is provided with a wavelength conversion plate 71 adhered with a light-transmitting adhesive 71A onto a light emission surface 10S of a light-emitting element 20. The wavelength conversion plate 71 is a phosphor plate, and may be, for example, a ceramic phosphor plate formed by dispersing cerium-activated yttrium aluminum garnet (YAG:Ce) in an alumina base material and sintering the dispersed material.

[0068] A phosphor plate can be used as a wavelength conversion material. For example, there is a ceramic phosphor plate made by dispersing cerium-activated yttrium aluminum garnet (YAG:Ce) in an alumina base material and sintering it. The phosphor plate has phosphor particles uniformly dispersed, so it produces uniform light emission without localized color unevenness.

[0069] In addition, since a light-shielding layer 72 is provided to cover the side surfaces of the semiconductor light-emitting device 10 and the wavelength conversion plate 71, optical crosstalk and the like can be prevented even if multiple semiconductor light-emitting devices 70 are arranged with their side surfaces in contact with each other or arranged closely to each other.

[0070] Furthermore, since the dielectric multilayer film 39 that reflects the light emitted toward the support substrate 30 is provided, the light output can be improved. Also, since the side surface of the support substrate 30 is protected by the light shielding layer 72, defects such as short circuits can be prevented. Furthermore, since the double Zener diode DZD is provided, it is possible to provide the semiconductor light emitting device 70 with high protection against overcurrents in both positive and negative directions.

[0071] As described above in detail, the semiconductor light-emitting device of the present invention can provide a semiconductor light-emitting device that is suitable for miniaturization, can be densely arranged in a grid or matrix, has high output, and has high protection performance against overcurrents in both positive and negative directions.

[0072] 10, 50, 60, 70: Semiconductor light-emitting device 20: Light emitting element 21: n-type semiconductor layer 22: Light-emitting layer 23: p-type semiconductor layer 24: p electrode (p ohmic electrode) 25: n electrode (n ohmic electrode) 26: p-element electrode (element anode) 27: n element electrode (element cathode) 28B: Element protection film 30: Support substrate 31: Base material 36A:p-mounted electrode 36B:n Mounted electrodes 38A: Insulating protective film 39: Dielectric multilayer film 37A: p-mounted electrode 37B:n mounting electrodes 34, 35: Conductive vias 41A, 41B: Bonding layer DZD: Double Zener diode ZD1, ZD2: Zener diode 51, 61: Wavelength conversion material 62, 72: Light shielding layer 71: Wavelength conversion plate

Claims

1. a support substrate including a flat-plate-shaped base material made of a semiconductor of a first conductivity type, a light-reflective dielectric multilayer film provided on a first main surface of the base material, at least one pair of mounting electrodes, each consisting of an anode and a cathode, provided on the dielectric multilayer film, and at least one pair of mounting electrodes, each consisting of an anode and a cathode, provided on a second main surface of the base material opposite to the first main surface; a semiconductor light emitting element mounted on the pair of mounting electrodes, the p-electrode and the n-electrode being electrically connected to each other in correspondence with the pair of mounting electrodes; a pair of conductive vias electrically connecting each of the pair of mounting electrodes to each of the pair of placement electrodes; a diffusion region of a second conductivity type opposite to the first conductivity type, the diffusion region being provided on an inner wall surface of the base material in contact with the conductive via; A semiconductor light emitting device comprising:

2. 2 . The semiconductor light emitting device according to claim 1 , wherein the dielectric multilayer film is provided between an upper surface of the substrate that is the second main surface and lower surfaces of the pair of mounting electrodes.

3. The dielectric multilayer film is made of Al ２ O ３ , TiO ２ , SiO ２ The semiconductor light emitting device is a multilayer film in which at least two of the above are alternately stacked.

4. The semiconductor light emitting device has an element anode and an element cathode on one side, 2. The semiconductor light emitting device according to claim 1, wherein the element anode and the element cathode are electrically connected to the pair of mounting electrodes of the supporting substrate, respectively.

5. 5. The semiconductor light emitting device according to claim 4, wherein said element anode and said element cathode are joined to said pair of mounting electrodes by a conductive joining member, said joining member being made of a gold-tin alloy.

6. The semiconductor light emitting device according to claim 1 , further comprising a wavelength conversion member covering an upper surface and a side surface of the semiconductor light emitting device.

7. The semiconductor light emitting device according to claim 1 , further comprising a wavelength conversion member covering the entire light emitting surface and side surfaces of the light emitting element.

8. The semiconductor light emitting device according to claim 7 , wherein the wavelength conversion member comprises a quantum dot light conversion member.

9. 2. The semiconductor light emitting device according to claim 1, further comprising a wavelength conversion plate provided on a light emitting surface of the light emitting element.

10. The semiconductor light emitting device according to claim 1 , wherein the diffusion region of the second conductivity type is provided in both of the pair of conductive vias.

11. The semiconductor light emitting device according to claim 1 , wherein the diffusion region of the second conductivity type is formed on the entire inner wall surface of a through hole in which the conductive via is provided.

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