Printed wiring board

Abstract

To provide a printed wiring board having high quality.SOLUTION: A printed wiring board includes: a first conductor layer; a resin insulation layer which has a first surface, a second surface, and an opening, and is laminated on the first conductor layer; a second conductor layer which is formed on the resin insulation layer; and a via conductor which is formed in the opening and connects the first conductor layer and the second conductor layer. The second conductor layer and the via conductor are formed of a seed layer and an electrolytic plating layer. The seed layer has a first layer and a second layer. The first layer is formed of an alloy containing copper and aluminum. The second layer is formed of copper. The resin insulation layer includes a resin and inorganic particles. The inorganic particles include first inorganic particles partially embedded in the resin and second inorganic particles embedded in the resin. The first inorganic particles each are formed of a first portion protruding from the resin and a second portion embedded in the resin. The first surface is formed of an upper surface of the resin and an exposed surface of the first portion exposed from the upper surface.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The technology disclosed in this specification relates to printed wiring boards. [Background technology]

[0002] Patent Document 1 discloses a printed wiring board having a resin substrate, a resin insulating layer formed on the resin substrate, and a conductor circuit. The conductor circuit is formed on the resin insulating layer via an alloy layer containing a specific metal. For example, the specific metal is shown in paragraph 8 of Patent Document 1. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2000-124602 A Summary of the Invention

[0004] [Problem of Patent Document 1] In the printed wiring board having the alloy layer of Patent Document 1, it is believed that the adhesion between the conductor circuit and the resin insulating layer is insufficient. [Means for solving the problem]

[0005] The printed wiring board of the present invention comprises a first conductor layer, a resin insulating layer having a first surface, a second surface opposite to the first surface, and an opening extending from the first surface to the second surface, the resin insulating layer being laminated on the first conductor layer such that the second surface faces the first conductor layer, a second conductor layer formed on the first surface of the resin insulating layer, and a via conductor formed in the opening and connecting the first conductor layer and the second conductor layer. The second conductor layer and the via conductor are formed by a seed layer and an electrolytic plating layer formed on the seed layer. The seed layer has a first layer and a second layer formed on the first layer. The first layer is made of an alloy containing copper and aluminum. The second layer is made of copper. The resin insulation layer includes resin and inorganic particles, the inorganic particles including first inorganic particles partially embedded in the resin and second inorganic particles embedded in the resin, the first inorganic particles are formed of a first portion protruding from the resin and a second portion embedded in the resin, and the first surface is formed by an upper surface of the resin and an exposed surface of the first portion exposed from the upper surface.

[0006] In the printed wiring board of the embodiment of the present invention, almost no recesses are formed on the first surface of the resin insulating layer. Therefore, when a seed layer is formed on the resin insulating layer by sputtering, the embodiment can form a continuous seed layer even if the thickness of the sputtering film is thin. As a result, when the seed layer is removed, the embodiment can reduce the amount of etching. The embodiment can form fine wiring on the resin insulating layer. The first layer of the seed layer is formed of an alloy containing copper and aluminum. Aluminum has high ductility and high malleability. Therefore, the adhesion between the resin insulating layer and the seed layer is high. A printed wiring board with stable performance is obtained. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a cross-sectional view illustrating a printed wiring board according to an embodiment. [Diagram 2] FIG. 2 is an enlarged cross-sectional view illustrating a portion of the printed wiring board according to the embodiment. [Diagram 3]FIG. 2 is an enlarged cross-sectional view illustrating a portion of the printed wiring board according to the embodiment. [Figure 4A] FIG. 2 is an enlarged cross-sectional view illustrating a portion of the printed wiring board according to the embodiment. [Figure 4B] FIG. 4 is an enlarged cross-sectional view showing a schematic view of a part of an inner wall surface. [Figure 4C] FIG. 4 is an enlarged cross-sectional view illustrating a schematic view of a portion of a seed layer. [Diagram 5] 1 is a cross-sectional photograph showing a schematic view of a portion of a printed wiring board according to an embodiment. [Figure 6A] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6B] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6C] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6D] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6E] 1A to 1C are enlarged cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6F] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6G] 1A to 1C are enlarged cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6H] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6I] 1A to 1C are enlarged cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] [Embodiment] FIG 1 is a cross-sectional view showing a printed wiring board 2 of an embodiment. As shown in FIG 1, the printed wiring board 2 has an insulating layer 4, a first conductor layer 10, a resin insulating layer 20, a second conductor layer 30, and a via conductor 40. The via conductor 40 is formed in an opening 26 formed in the resin insulating layer 20. The printed wiring board 2 has an adhesive layer 100 on the first conductor layer 10. The adhesive layer 100 is sandwiched between the first conductor layer 10 and the resin insulating layer 20. The first conductor layer 10 and the second conductor layer 30 are adjacent to each other. There is no conductor layer between the first conductor layer 10 and the second conductor layer 30.

[0009] The insulating layer 4 is formed using a thermosetting resin. The insulating layer 4 may be a photocurable resin. The insulating layer 4 may contain inorganic particles such as silica. The insulating layer 4 may contain a reinforcing material such as glass cloth. The insulating layer 4 has a third surface 6 and a fourth surface 8 opposite to the third surface 6.

[0010] The first conductor layer 10 is formed on the third surface 6 of the insulating layer 4. The first conductor layer 10 includes a signal wiring 12 and a pad 14. Although not shown in the figure, the first conductor layer 10 also includes a conductor circuit other than the signal wiring 12 and the pad 14. The first conductor layer 10 is mainly made of copper. The first conductor layer 10 is formed of a seed layer 10a on the insulating layer 4 and an electrolytic plating layer 10b on the seed layer 10a. The seed layer 10a is formed by sputtering. The seed layer 10a has a thickness of less than 0.5 μm. The seed layer 10a is formed of a first layer 11a on the third surface 6 and a second layer 11b on the first layer 11a. The ratio of the thickness of the first layer 11a to the thickness of the second layer 11b (thickness of the first layer / thickness of the second layer) is 0.25 or more and 0.7 or less. The thickness of the second layer 11b is thicker than the thickness of the first layer 11a. The first layer 11a is in contact with the third surface 6 of the insulating layer 4. For example, the seed layer 10a and the first layer 11a are formed of a copper alloy, and the second layer 11b is formed of copper. The second layer 11b is not essential. The first layer 11a and the second layer 11b are formed by sputtering. Both are sputtering films.

[0011] The first layer 11a is made of an alloy containing copper and aluminum. The alloy may further contain a specific metal. Examples of the specific metal are nickel, zinc, gallium, silicon, and magnesium. The alloy preferably contains one type of specific metal, two types of specific metals, or three types of specific metals. The content of aluminum in the alloy is 1.0 at% or more and 15.0 at% or less. An example of the specific metal is silicon. The content of the specific metal in the alloy is 0.5 at% or more and 10.0 at% or less. The first layer 11a may contain impurities. Examples of the impurities are oxygen and carbon. The first layer 11a may contain oxygen or carbon. The first layer 11a may contain oxygen and carbon. In the embodiment, the alloy further contains carbon. The content of carbon in the alloy is 50 ppm or less. The alloy further contains oxygen. The content of oxygen in the alloy is 100 ppm or less. The content values ​​of the above elements are examples. The amount of copper is the largest among the elements forming the first layer 11a. The next largest amount is aluminum. The amount of the specific metal is smaller than the amount of aluminum. Therefore, copper is the main metal, aluminum is the first minor metal, and the specific metal is the second minor metal. The amount of impurities is smaller than the amount of the specific metal.

[0012] Second layer 11b is formed of copper. The copper content forming second layer 11b is 99.9 at% or more. It is preferable that the copper content in second layer 11b is 99.95 at% or more. Electrolytically plated layer 10b is formed of copper. The copper content forming electrolytically plated layer 10b is 99.9 at% or more. It is preferable that the copper content in electrolytically plated layer 10b is 99.9 at% or more.

[0013] The surface of the first conductor layer 10 is formed by a first surface 14a and a second surface 14b. The surface of the pad 14 is formed by a first surface 14a and a second surface 14b. The first surface 14a is exposed from an opening 26 formed in the resin insulating layer 20. The second surface 14b is a surface other than the first surface 14a. The first surface 14a is not covered with an adhesive layer 100. The second surface 14b is covered with an adhesive layer 100. The surface (top and side surfaces) of the signal wiring 12 is covered with an adhesive layer 100. The side surfaces of the first conductor layer 10 are covered with an adhesive layer 100.

[0014] The adhesive layer 100 is formed of a resin. The adhesive layer 100 is formed of an organic material (organic resin). The organic material is a nitrogen-based organic compound. An example of the nitrogen-based organic compound is a tetrazole compound. Examples of nitrogen-based organic compounds are disclosed in JP 2015-54987 A. The adhesive layer 100 does not cover the third surface 6 exposed from the first conductor layer 10. The adhesive layer 100 is sandwiched between the first conductor layer 10 and the resin insulating layer 20. The adhesive layer 100 bonds the first conductor layer 10 and the resin insulating layer 20.

[0015] 2 is an enlarged cross-sectional view showing a part of the adhesive layer 100 formed on the second surface 14b of the pad 14. As shown in FIG. 2, the adhesive layer 100 is formed of a substantially smooth film 110 and a plurality of protrusions 120 protruding from the smooth film 110. The adhesive layer 100 formed on the side surface of the pad 14 is formed of a smooth film 110 and a plurality of protrusions 120 similar to the adhesive layer 100 shown in FIG. 2. The shape is also similar. The adhesive layer 100 formed on the upper surface and side surface of the signal wiring 12 is formed of a smooth film 110 and a plurality of protrusions 120 similar to those in FIG. 2. The shape is also similar.

[0016] The smooth film 110 has a substantially uniform thickness T. The thickness T of the smooth film 110 is 10 nm or more and 120 nm or less. The ratio (S1 / S2) of the area (S1) of the smooth film 110 exposed from the protrusion 120 to the area (S2) of the adhesive layer 100 is 0.1 or more and 0.5 or less. The smooth film 110 on the second surface 14b of the pad 14 is formed so as to substantially conform to the shape of the second surface 14b of the pad 14. If the second surface 14b of the pad 14 is undulated, the smooth film 110 follows the undulation. Similarly, the smooth film 110 on the upper surface and side surface of the signal wiring 12 is formed so as to substantially conform to the shape of the upper surface and side surface of the signal wiring 12. If the upper surface and side surface of the signal wiring 12 are undulated, the smooth film 110 follows the undulation.

[0017] The protruding portion 120 is formed of a plurality of protrusions 122. The plurality of protrusions 122 form unevenness on the upper surface of the protruding portion 120. 2 The number of protrusions 122 per unit area is 5 or more and 15 or less. The protrusions 120 have heights H1, H2 between the upper surface of the smooth film 110 and the tops of the protrusions 120. The maximum values ​​of the heights H1, H2 are 10 times or more and 30 times or less the thickness T of the smooth film 110. The heights H1, H2 are 200 nm or more and 450 nm or less.

[0018] As shown in FIG. 1, the resin insulating layer 20 is formed on the first conductor layer 10 via an adhesive layer 100. The resin insulating layer 20 is bonded to the first conductor layer 10 by the adhesive layer 100. The resin insulating layer 20 has a first surface 22 and a second surface 24 opposite to the first surface 22. The second surface 24 of the resin insulating layer 20 faces the first conductor layer 10. The resin insulating layer 20 has an opening 26. The opening 26 exposes the first surface 14a of the pad 14. The resin insulating layer 20 is formed of a resin 80 and a large number of inorganic particles 90 dispersed in the resin 80. The resin 80 is an epoxy resin. Examples of the resin are a thermosetting resin and a photocurable resin. The inorganic particles 90 are, for example, silica or alumina. The average particle size of the inorganic particles 90 is 0.5 μm or less. The amount of the inorganic particles 90 in the resin insulating layer 20 is 75 wt % or more.

[0019] 1 and 3, the inorganic particles 90 include first inorganic particles 91 partially embedded in the resin 80 and second inorganic particles 92 embedded in the resin 80. The second inorganic particles are completely embedded in the resin 80. The first inorganic particles 91 and the second inorganic particles 92 are spherical in shape. As shown in FIG. 3, the first inorganic particles 91 are formed of a first portion 91a protruding from the resin 80 and a second portion 91b embedded in the resin 80. The first surface 22 of the resin insulation layer 20 is formed of an upper surface 80R of the resin 80 and an exposed surface 91aR of the first portion 91a exposed from the upper surface 80R of the resin 80.

[0020] The ratio R of the volume of the first portion 91a to the volume of the first inorganic particles 91 (volume of the first portion 91a / volume of the first inorganic particles 91) is greater than 0 and equal to or less than 0.4. The ratio R is preferably equal to or less than 0.2. The ratio R is more preferably equal to or less than 0.1. The ratio R is most preferably equal to or less than 0.05. When the first portion 91a protrudes from the resin 80, the first surface 22 of the resin insulating layer 20 has slight irregularities. However, the upper surface 80R of the resin 80 is not roughened. The upper surface 80R of the resin 80 forming the first surface 22 of the resin insulating layer 20 is almost flat. The upper surface 80R of the resin 80 has almost no recesses. Therefore, the first surface 22 has almost no recesses. The arithmetic mean roughness (Ra) of the first surface 22 is less than 0.08 μm. The roughness Ra of the first surface 22 is preferably equal to or less than 0.05 μm. It is more preferable that the roughness Ra of the first surface 22 is 0.03 μm or less. The arithmetic mean roughness (Ra) of the upper surface 80R of the resin 80 forming the first surface 22 of the resin insulation layer 20 is less than 0.08 μm. It is preferable that the roughness Ra of the upper surface 80R of the resin 80 is 0.05 μm or less. It is more preferable that the roughness Ra of the upper surface 80R of the resin 80 is 0.03 μm or less.

[0021] As shown in FIG. 1 and FIG. 4A, the inorganic particles 90 further include third inorganic particles 93 forming the inner wall surface 27 of the opening 26. The shape of the third inorganic particles 93 is obtained by cutting a sphere with a plane. The shape of the third inorganic particles 93 is obtained by cutting the second inorganic particles 92 with a plane. The shape of the third inorganic particles 93 is substantially a spherical incision. The shape of the third inorganic particles 93 is different from the shape of the second inorganic particles 92. The shape of the third inorganic particles 93 is different from the shape of the first inorganic particles 91. The shape of the first inorganic particles 91 is similar to the shape of the second inorganic particles 92.

[0022] FIG. 5 is a cross-sectional photograph showing an example of the inner wall surface 27 of the opening 26. As shown in FIG. 4A and FIG. 5, the inner wall surface 27 of the opening 26 is formed of the resin 80 and the third inorganic particles 93. The third inorganic particles 93 have a flat portion 93a. The flat portion 93a forms the inner wall surface 27. The inner wall surface 27 is formed of the resin 80 and the flat portion 93a. The flat portion 93a and the surface of the resin 80 forming the inner wall surface 27 form a substantially common surface. No irregularities are formed on the resin 80 forming the inner wall surface 27. The surface of the resin 80 forming the inner wall surface 27 is smooth. No irregularities are formed on the exposed surface 93b of the flat portion 93a (the surface forming the inner wall surface 27). The exposed surface 93b of the flat portion 93a is smooth. The inner wall surface 27 is formed smoothly. The arithmetic mean roughness (Ra) of the inner wall surface 27 is 1.0 μm or less. The arithmetic mean roughness (Ra) of the surface 80a of the resin 80 forming the inner wall surface 27 is 1.0 μm or less. As shown in FIG. 5, a step 28 is formed at the boundary between the surface 80a of the resin 80 and the flat portion 93a of the third inorganic particle 93. The amount of the step 28 is preferably 3.0 μm or less. The amount of the step 28 is more preferably 1.5 μm or less. The amount of the step 28 is further preferably 0.5 μm or less. For example, the distance between the exposed surface 93b and the surface 80a of the resin 80 indicates the amount of the step 28. Even if the inner wall surface 27 has the step 28, the amount of the step 28 is small, so that the exposed surface 93b and the surface 80a of the resin 80 (the surface forming the inner wall surface 27) substantially form a common surface.

[0023] The flat portion 93a of the third inorganic particle 93 approximately coincides with a surface obtained by extending the surface 80a (the surface forming the inner wall surface 27) of the resin 80 formed around the third inorganic particle 93. The flat portion 93a depicted as a substantially straight line in Figures 1 and 4A means a flat surface. In the cross section shown in Figures 1 and 4A, the flat portion 93a is a flat surface. The flat portion 93a does not have to be a perfect flat surface. The flat portion 93a is a substantially flat surface, which is an approximately smooth surface.

[0024] Fig. 4B is an enlarged cross-sectional view showing a part of the inner wall surface 27 in Fig. 4A. As shown in Fig. 4B, the surface 80a of the resin 80 located between the reference surface 200 connecting the flat portions 93a of the two third inorganic particles 93 forming the inner wall surface 27 may be recessed or protruding (see the dashed line). It is preferable that there are no other third inorganic particles 93 between the two third inorganic particles 93 forming the reference surface 200. The distance between the reference surface 200 and the surface 80a of the resin 80 may be used as a representative value of the amount of the step 28.

[0025] 4A, inner wall surface 27 of opening 26 tapers from first surface 22 of resin insulation layer 20 toward the upper surface of pad 14. An angle (inclination angle) θ between inner wall surface 27 and pad 14 is equal to or greater than 70° and equal to or less than 90°.

[0026] 1 and 4A, the shape of opening 26 is shown as a substantially inverted trapezoid. However, the actual shape of opening 26 is a substantially inverted truncated cone. Therefore, inner wall surface (side wall) 27 of actual opening 26 is a substantially curved surface. In other words, the common surface formed by flat portion 93a and resin 80 includes inner wall surface (side wall) 27 formed as a substantially curved surface.

[0027] As shown in FIG. 1, the second conductor layer 30 is formed on the first surface 22 of the resin insulating layer 20. The second conductor layer 30 includes a first signal wiring 32, a second signal wiring 34, and a land 36. Although not shown in the figure, the second conductor layer 30 also includes a conductor circuit other than the first signal wiring 32, the second signal wiring 34, and the land 36. The first signal wiring 32 and the second signal wiring 34 form a pair wiring. The first signal wiring 32 and the second signal wiring 34 are adjacent to each other. As shown in FIG. 3, the distance D1 between the first signal wiring 32 and the second signal wiring 34 is 1.5 μm or more and 10 μm or less. It is preferable that the distance D1 is 1.5 μm or more and 8 μm or less.

[0028] The second conductor layer 30 is mainly made of copper. The second conductor layer 30 is formed of a seed layer 30a on the first surface 22 and an electrolytic plating layer 30b on the seed layer 30a. The seed layer 30a is formed of a first layer 31a on the first surface 22 and a second layer 31b on the first layer 31a. The thickness of the seed layer 30a is less than 0.5 μm. The relationship between the thickness of the first layer 31a and the thickness of the second layer 31b is similar to the relationship between the thickness of the first layer 11a and the thickness of the second layer 11b. The first layer 31a and the second layer 31b form the second conductor layer 30, and the first layer 11a and the second layer 11b form the first conductor layer 10. The first layer 31a forming the second conductor layer 30 and the first layer 11a forming the first conductor layer 10 are similar. The second layer 31b forming the second conductor layer 30 is similar to the second layer 11b forming the first conductor layer 10. The electrolytically plated layer 30b forming the second conductor layer 30 is similar to the electrolytically plated layer 10b forming the first conductor layer 10. The first layer 31a is in contact with the first surface 22.

[0029] The via conductor 40 is formed in the opening 26. The via conductor 40 connects the first conductor layer 10 and the second conductor layer 30. In FIG. 1, the via conductor 40 connects the pad 14 and the land 36. The via conductor 40 is formed of a seed layer 30a and an electrolytic plating layer 30b on the seed layer 30a. The seed layer 30a forming the via conductor 40 is formed of a first layer 31a formed on the inner wall surface 27 of the opening 26 and on the pad 14 exposed from the opening 26, and a second layer 31b on the first layer 31a. The first layer 31a is in contact with the upper surface and the inner wall surface 27 of the pad 14. The seed layer 30a forming the via conductor 40 and the seed layer 30a forming the second conductor layer 30 are common. The first layer 31a forming the via conductor 40 and the first layer 31a forming the second conductor layer 30 are common. The second layer 31b forming the via conductor 40 and the second layer 31b forming the second conductor layer 30 are common. The electrolytic plating layer 30b forming the via conductor 40 and the electrolytic plating layer 30b forming the second conductor layer 30 are common.

[0030] FIG. 4C is an enlarged cross-sectional view showing a schematic view of a part of the seed layer 30a on the inner wall surface 27 of FIG. 4A. FIG. 5 shows an example of the seed layer 30a. The seed layer 30a on the inner wall surface 27 is in contact with the inner wall surface 27. As shown in FIG. 4A, FIG. 4C, and FIG. 5, the seed layer 30a forming the via conductor 40 has a substantially smooth first film 60 and a substantially smooth second film 70. The first film 60 and the second film 70 are electrically connected. The first film 60 and the second film 70 are continuous. As shown in FIG. 5, a part of the first film 60 is formed on the second film 70. The leading end 62 of the first film 60 is formed on the trailing end 72 of the second film 70. The first film 60 and the second film 70 are formed simultaneously. The cross section of the seed layer 30a covering the inner wall surface 27 has a substantially stepped shape.

[0031] As shown in FIG. 4C, the first layer 31a of the seed layer 30a has a first film 60a and a second film 70a. The first film 60a and the second film 70a are electrically connected. The first film 60a and the second film 70a are continuous. The leading end 62a of the first film 60a is formed on the trailing end 72a of the second film 70a. The cross section of the first layer 31a covering the inner wall surface 27 has a substantially stepped shape. The first layer 31a on the inner wall surface 27 is in contact with the inner wall surface 27.

[0032] The second layer 31b of the seed layer 30a has a first film 60b and a second film 70b. The first film 60b and the second film 70b are electrically connected. The first film 60b and the second film 70b are continuous. The leading end 62b of the first film 60b is formed on the trailing end 72b of the second film 70b. The cross section of the second layer 31b formed on the inner wall surface 27 has a substantially stepped shape.

[0033] In the embodiment, a portion of the first film 60 is laminated on the second film 70. A portion of the first film 60 overlaps the second film 70. A leading end 62 of the first film 60 is laminated on a trailing end 72 of the second film 70. A leading end 62 of the first film 60 overlaps on a trailing end 72 of the second film 70.

[0034] In the embodiment, the inner wall surface 27 is formed with a substantially smooth surface. If the first layer 31a follows the shape of the inner wall surface 27, the first layer 31a on the inner wall surface 27 has a substantially smooth surface. The cross section of the first layer 31a has a linear shape. The seed layer 30a on the inner wall surface 27 has a substantially smooth surface. The cross section of the seed layer 30a has a linear shape. In this case, the electrolytic plating layer 30b forming the via conductor 40 is formed on a smooth surface. For example, when the printed wiring board 2 receives a large impact, peeling occurs between the first layer 31a on the inner wall surface 27 and the second layer 31b on the first layer 31a. Alternatively, peeling occurs between the seed layer 30a on the inner wall surface 27 and the electrolytic plating layer 30b forming the via conductor 40. In contrast, the cross sections of the seed layer 30a and the first layer 31a in the embodiment have a stepped shape. Therefore, peeling is unlikely to occur.

[0035] The length of each side of the printed wiring board 2 is 50 mm or more. The length of each side is preferably 100 mm or more. The length of each side is 250 mm or less. The length of the signal wiring formed according to the embodiment is 5 mm or more. The length of the signal wiring may be 10 mm or more and 20 mm or less.

[0036] [Method of manufacturing printed wiring board 2 according to embodiment] 6A to 6I show a method for manufacturing a printed wiring board 2 of an embodiment. FIGS. 6A to 6D, 6F, 6H, and 6I are cross-sectional views. FIGS. 6E, 6G, and 6I are enlarged cross-sectional views. FIG. 6A shows an insulating layer 4 and a first conductor layer 10 formed on a third surface 6 of the insulating layer 4. The first conductor layer 10 is formed by a semi-additive method. The first layer 11a and the second layer 11b are formed by sputtering. The first layer 11a and the second layer 11b are formed in a vacuum. The electrolytic plating layer 10b is formed by electrolytic plating.

[0037] As shown in FIG. 6B, an adhesive layer 100 is formed on the upper surface and side surface of the first conductor layer 10. The adhesive layer 100 is formed by immersing the intermediate substrate shown in FIG. 6A in a chemical solution containing a nitrogen-based organic compound. The pH of the chemical solution is 7 or less. By immersing the intermediate substrate in the chemical solution, an adhesive layer 100 having a smooth film 110 and a protruding portion 120 is formed on the upper surface and side surface of the first conductor layer 10. Before the intermediate substrate is immersed in the chemical solution, the oxide film on the upper surface and side surface of the first conductor layer 10 is removed. In the modified example, the adhesive layer 100 is formed by applying a chemical solution onto the first conductor layer 10. When the adhesive layer 100 is formed, the intermediate substrate is removed from the chemical solution. The adhesive layer 100 is dried. The upper surface of the adhesive layer 100 before drying may be smooth. In that case, a part of the adhesive layer is coagulated by drying. By coagulation, an adhesive layer 100 including the smooth film 110 and the protruding portion 120 is formed.

[0038] 6C, a resin insulating layer 20 and a protective film 50 are formed on the first conductor layer 10 covered with an adhesive layer 100. The second surface 24 of the resin insulating layer 20 faces the third surface 6 of the insulating layer 4. The protective film 50 is formed on the first surface 22 of the resin insulating layer 20. The resin insulating layer 20 has resin 80 and inorganic particles (second inorganic particles 92) 90. The inorganic particles 90 are embedded in the resin 80.

[0039] The protective film 50 completely covers the first surface 22 of the resin insulating layer 20. An example of the protective film 50 is a film made of polyethylene terephthalate (PET). A release agent is formed between the protective film 50 and the resin insulating layer 20.

[0040] As shown in FIG. 6D, laser light L is irradiated from above the protective film 50. The laser light L penetrates the protective film 50 and the resin insulating layer 20 at the same time. The laser light L penetrates the adhesive layer 100 covering the pad 14 and reaches the pad 14. Alternatively, the adhesive layer 100 is not completely removed by the laser light L. The bottom of the opening 26 is formed by the adhesive layer 100. An opening 26 for a via conductor leading to the pad 14 is formed. Alternatively, an opening 26 for a via conductor leading to the adhesive layer 100 is formed. The adhesive layer 100 covering the pad 14 is exposed by the opening 26. The laser light L is, for example, a UV laser light or a CO2 laser light. The pad 14 is exposed by the opening 26. When the opening 26 is formed, the first surface 22 is covered with the protective film 50. Therefore, even if the resin scatters when the opening 26 is formed, the resin is prevented from adhering to the first surface 22.

[0041] FIG. 6E shows the inner wall surface 27b of the opening 26 after the laser light irradiation. The inner wall surface 27b is formed of the resin 80 and the inorganic particles 90 protruding from the resin 80. In order to control the shape of the inner wall surface, the inner wall surface 27b after the laser light irradiation is treated. It is preferable to selectively remove the inorganic particles 90 protruding from the resin 80. As a result, the third inorganic particles 93 are formed from the inorganic particles 90. For example, the inorganic particles 90 protruding from the resin 80 are selectively removed by treating the inner wall surface 27b after the laser light irradiation with a chemical. Alternatively, the inorganic particles 90 protruding from the resin 80 are selectively removed by treating the inner wall surface 27b after the laser light irradiation with plasma. The selective removal includes that the etching rate of the inorganic particles 90 is higher than the etching rate of the resin 80. For example, the difference in etching rate between the two is 10 times or more. Alternatively, the difference in etching rate between the two is 50 times or more. Alternatively, the difference in etching rate between the two is 100 times or more. By processing the inner wall surface 27b after the laser beam irradiation, the third inorganic particles 93 having the flat portion 93a are obtained. By controlling the conditions for processing the inner wall surface 27b after the laser beam irradiation, the embodiment can control the shape of the inner wall surface 27. Examples of the conditions are temperature, concentration, time, and type and pressure of the gas. The etching rate of the inorganic particles 90 and the etching rate of the resin are controlled.

[0042] By irradiating the resin insulating layer 20 with laser light L, a part of the second inorganic particles 92 buried in the resin 80 forms the inner wall surface 27b after the laser light irradiation. The second inorganic particles 92 forming the inner wall surface 27b after the laser light irradiation are formed by a protruding portion P protruding from the resin 80 and a portion E buried in the resin 80. The particles having the protruding portion P are called protruding particles. The inner wall surface 27b after the laser light irradiation is treated. For example, the inner wall surface 27b is treated with plasma of a gas containing tetrafluoromethane. The protruding portion P is selectively removed to form the inner wall surface 27 of the embodiment. The third inorganic particles 93 are formed from the second inorganic particles 92. The protruding portion P is selectively removed to form the third inorganic particles 93 having a flat portion 93a. The flat portion 93a is a flat surface. When the second inorganic particles 92 having a spherical shape are cut by a flat surface, the shape of the third inorganic particles 93 is obtained. The shape of the third inorganic particles 93 is substantially a spherical indentation. The inner wall surface 27 is formed by the flat portion 93a and the surface 80a of the resin 80. The exposed surface 93b of the flat portion 93a and the surface 80a of the resin 80 are located on approximately the same plane. As shown in FIG. 5, a step 28 is formed at the boundary between the surface 80a of the resin 80 forming the inner wall surface 27 and the flat portion 93a of the third inorganic particle 93. For example, when a seed layer 30a is formed on the inner wall surface 27b by sputtering, the protruding portion P inhibits the growth of the film formed by sputtering. For example, a continuous seed layer 30a is not formed on the inner wall surface 27b. Alternatively, it is necessary to increase the thickness of the seed layer 30a. It is considered difficult to form a fine conductor circuit on a printed wiring board including protruding particles. In the embodiment, the protruding portion P is removed. In the embodiment, the thickness of the seed layer 30a formed by sputtering can be thinned. Even if the thickness of the seed layer 30a formed by sputtering is thin, a continuous seed layer 30a can be obtained. When the step 28 exists, it is preferable that the surface 80a of the resin is recessed from the exposed surface 93b of the flat portion 93a.

[0043] Forming the opening 26 includes forming inorganic particles (second inorganic particles 92) 90 having protruding portions P. The protruding portions P protrude from the resin 80 forming the inner wall surface 27b of the opening 26. The third inorganic particles 93 are formed by removing the protruding portions P of the inorganic particles (second inorganic particles 92) 90. The inner wall surface 27 of the opening 26 includes the exposed surfaces 93b of the third inorganic particles 93. The exposed surfaces 93b of the third inorganic particles 93 are formed by removing the protruding portions P.

[0044] Obtaining the shape of the third inorganic particle 93 by cutting the spherical second inorganic particle 92 on a plane includes removing the protruding portion P of the inorganic particle 90. The inner wall surface 27 of the actual opening 26 is a substantially curved surface. Since the flat portion 93a is formed by removing the protruding portion P, the exposed surface 93b of the flat portion 93a includes a curved surface. In other words, forming a common surface between the flat portion 93a and the resin 80 includes forming the inner wall surface 27 that is substantially formed as a curved surface.

[0045] By controlling the conditions for processing the inner wall surface 27b after the laser beam irradiation, the size of the irregularities and the size of the steps can be controlled.

[0046] The inside of the opening 26 is cleaned. If the adhesive layer 100 is not completely removed by the laser light L, the adhesive layer 100 exposed from the opening 26 is removed by cleaning the inside of the opening 26. The first surface 14a of the pad 14 is exposed from the opening 26. Resin residue generated when the opening 26 is formed is removed. The inside of the opening 26 is cleaned by plasma. That is, the cleaning is performed by a dry process. The cleaning includes a desmear process. Since the first surface 22 of the resin insulation layer 20 is covered with the protective film 50, the first surface 22 is not affected by the plasma. At this point, no irregularities are formed on the first surface 22 of the resin insulation layer 20. The inorganic particles 90 are not exposed on the first surface 22. The first surface 22 is not roughened.

[0047] In the case where processing the inner wall surface 27b after the laser light irradiation includes cleaning the inside of the opening 26, the embodiment can omit cleaning the inside of the opening 26.

[0048] 6F, after cleaning the inside of opening 26, protective film 50 is removed from resin insulating layer 20. When treating inner wall surface 27b after laser light irradiation includes cleaning the inside of opening 26, protective film 50 is removed from resin insulating layer 20 after treating inner wall surface 27b after laser light irradiation. When inner wall surface 27b after laser light irradiation is treated, protective film 50 covers first surface 22 of resin insulating layer 20.

[0049] After removing the protective film 50, the first surface 22 of the resin insulating layer 20 is cleaned. The resin 80 forming the first surface 22 is removed by a dry process. For example, the first surface 22 of the resin insulating layer 20 is cleaned by reverse sputtering. For example, cleaning the first surface 22 of the resin insulating layer 20 is performed by sputtering using argon gas (argon sputtering). Figures 6G(a) and 6G(b) show the first surface 22 of the resin insulating layer 20 before and after cleaning. As shown in Figures 6G(a) and 6G(b), the resin 80 forming the resin insulating layer 20 is removed by about 20 nm by cleaning by sputtering or the like. For example, the adhesive for bonding the protective film 50 to the resin insulating layer 20 is removed. The resin 80 is selectively removed by cleaning. The thickness of the resin 80 is reduced. A part of the inorganic particles (second inorganic particles 92) 90 is partially exposed from the upper surface 80R of the resin 80 by cleaning. The first inorganic particles 91 are obtained by exposing the second inorganic particles 92 embedded in the resin 80 from the upper surface 80R of the resin 80. The first inorganic particles 91 are formed from the second inorganic particles 92. The first inorganic particles 91 and the second inorganic particles 92 have the same shape. Both are spherical. As shown in FIG. 6G(b), the first inorganic particles 91 are formed of a first portion 91a protruding from the resin 80 and a second portion 91b embedded in the resin 80. The first surface 22 of the resin insulating layer 20 is formed of the upper surface 80R of the resin 80 and an exposed surface 91aR of the first portion 91a protruding from the upper surface 80R of the resin 80. The exposed surface 91aR of the first portion 91a is exposed by cleaning. The first surface 22 of the resin insulating layer 20 is not roughened. Therefore, almost no recesses are formed on the first surface 22. The first surface 22 has almost no recesses. The upper surface 80R of the resin 80 is almost flat. The upper surface 80R of the resin 80 does not have any recesses.

[0050] The ratio R is calculated, for example, using a cross-sectional view of the first inorganic particle 91 shown in FIG. 6G(b). FIG. 6G(b) is obtained by cutting the resin insulating layer 20 on a plane perpendicular to the upper surface 80R. The second conductor layer 30 is omitted in FIG. 6G(b). The second conductor layer 30 is formed on the first inorganic particle 91 in FIG. 6G(b). The exposed surface 91aR in FIG. 6G(b) is covered with the second conductor layer 30. Using FIG. 6G(b), the cross-sectional area 91aS of the first portion 91a is obtained. Similarly, the cross-sectional area 91S of the first inorganic particle 91 is obtained. For example, the ratio R is represented by the ratio of the cross-sectional area 91aS to the cross-sectional area 91S (cross-sectional area 91aS of the first portion 91a / cross-sectional area 91S of the first inorganic particle 91). For example, when the ratio R is evaluated, 50 first inorganic particles 91 are observed. Fifty of the first inorganic particles 91 satisfy the ratio R.

[0051] As shown in FIG. 6H, a seed layer 30a is formed on the first surface 22 of the resin insulating layer 20. The seed layer 30a is formed by sputtering. The seed layer 30a is formed by a dry process. The first layer 31a is formed on the first surface 22 by sputtering. At the same time, the first layer 31a is formed on the inner wall surface 27 exposed from the opening 26 and on the pad 14 by sputtering. The second layer 31b is formed on the first layer 31a by sputtering. The inner wall surface 27 of the opening 26 is formed by the exposed surface 93b of the third inorganic particles 93 and the surface 80a of the resin 80. The exposed surface 93b and the surface 80a of the resin 80 are substantially on the same plane. The inner wall surface 27 of the opening 26 is substantially flat. Therefore, the embodiment can reduce the thickness of the first layer 31a and the thickness of the second layer 31b on the inner wall surface 27. Since the thickness is small, the embodiment can reduce the variation in the thickness of the seed layer 30a. The first layer 31a on the inner wall surface 27 and the first layer 31a on the first surface 22 of the resin insulating layer 20 are formed simultaneously. The second layer 31b on the inner wall surface 27 and the second layer 31b on the first surface 22 of the resin insulating layer 20 are formed simultaneously. Therefore, the embodiment can reduce the thickness of the first layer 31a and the thickness of the second layer 31b on the first surface 22 of the resin insulating layer 20. Almost no recesses are formed on the first surface 22. Therefore, the first layer 31a on the first surface 22 is formed almost flat. The embodiment can reduce the variation in the thickness of the first layer 31a and the thickness of the second layer 31b on the first surface 22 of the resin insulating layer 20. The widths of the signal wirings 32 and 34 on the first surface 22 of the resin insulating layer 20 satisfy the target values. The width of the space between adjacent signal wirings 32, 34 satisfies the target value. The embodiment can reduce the variation in the width of the signal wirings 32, 34. The embodiment can reduce the variation in the width of the space between the signal wirings. Even if a plurality of signal wirings 32, 34 are formed on the first surface 22 of the resin insulation layer 20, data transmitted via each of the signal wirings 32, 34 reaches the electronic component with almost no delay.

[0052] As shown in FIG. 6I, the first layer 31a formed on the inner wall surface 27 has a first film 60a and a second film 70a. The first film 60a and the second film 70a are formed simultaneously. The first film 60a and the second film 70a are electrically connected. The leading end 62a of the first film 60a is formed on the rear end 72a of the second film 70a. The cross section of the first layer 31a formed on the inner wall surface 27 has a substantially stepped shape. Examples of sputtering conditions are as follows: The distance between the target and the first surface 22 of the resin insulating layer 20 is 50 mm or more and 250 mm or less. The voltage is 15 eV or more and 50 eV or less. The gas concentration is 0.1 Pa or more and 1.0 Pa or less.

[0053] The second layer 31b formed on the first layer 31a covering the inner wall surface 27 has a first film 60b and a second film 70b. The first film 60b and the second film 70b are formed simultaneously. The first film 60b and the second film 70b are electrically connected. The leading end 62b of the first film 60b is formed on the trailing end 72b of the second film 70b. The cross section of the second layer 31b formed on the inner wall surface 27 has a substantially stepped shape. The sputtering conditions are substantially the same as those described above.

[0054] The inner wall surface 27 of the embodiment is formed by the surface 80a of the resin 80 and the exposed surface 93b of the third inorganic particle 93. Both of them form an almost common surface. The surface 80a of the resin and the exposed surface 93b are formed of different materials. The first layer 31a is formed by sputtering. It is considered that the growth of the first layer 31a formed on the surface 80a of the resin 80 is different from the growth of the first layer 31a formed on the exposed surface 93b. It is considered that the growth of the seed layer 30a formed on the surface 80a of the resin 80 is different from the growth of the seed layer 30a formed on the exposed surface 93b. Therefore, in the embodiment, it is considered that the first film 60a and the second film 70a are formed. It is considered that the leading end 62a of the first film 60a is formed on the rear end 72a of the second film 70a. It is considered that the cross section of the first layer 31a has a substantially stepped shape. It is considered that the second layer 31b follows the first layer 31a. Therefore, the second layer 31b is considered to have a first film 60b and a second film 70b. The leading end 62b of the first film 60b of the second layer 31b is considered to be formed on the trailing end 72b of the second film 70b of the second layer 31b. The cross section of the second layer 31b is considered to have a substantially stepped shape. Similarly, the seed layer 30a is considered to have a first film 60 and a second film 70. The leading end 62 of the first film 60 of the seed layer 30a is considered to be formed on the trailing end 72 of the second film 70 of the seed layer 30a. The cross section of the seed layer 30a is considered to have a substantially stepped shape.

[0055] When the inner wall surface 27 has the step 28 shown in FIG. 5, the first layer 31a having the first film 60a and the second film 70a can be easily formed using sputtering. The embodiment can easily form the seed layer 30a having the first film 60 and the second film 70. The embodiment can form the leading end 62a of the first film 60a on the trailing end 72a of the second film 70a. The embodiment can form the leading end 62 of the first film 60 on the trailing end 72 of the second film 70. The embodiment can easily form the first layer 31a having a substantially stepped shape. The embodiment can easily form the seed layer 30a having a substantially stepped shape.

[0056] The first layer 31a on the inner wall surface 27 is formed on the substantially smooth inner wall surface 27. Therefore, in the embodiment, the surface of the first film 60a of the first layer 31a and the surface of the second film 70a of the first layer 31a can be formed substantially smooth. Similarly, in the embodiment, the surface of the first film 60b of the second layer 31b and the surface of the second film 70b of the second layer 31b can be formed substantially smooth. In the embodiment, the surface of the first film 60 of the seed layer 30a and the surface of the second film 70 of the seed layer 30a can be formed substantially smooth. A smooth surface can reduce transmission loss.

[0057] For example, the first layer 31a is formed of a copper alloy. The first layer 31a of the seed layer 30a is formed of an alloy containing copper and aluminum. Aluminum has high ductility and high malleability. Therefore, the adhesive force between the resin insulating layer 20 and the first layer 31a is high. Even if the resin insulating layer 20 expands and contracts due to heat cycles, it is considered that the seed layer 30a containing aluminum can follow the expansion and contraction. Even if the first surface 22 of the resin insulating layer 20 is smooth, the seed layer 30a is difficult to peel off from the resin insulating layer 20. It is considered that aluminum is easily oxidized. If the third inorganic particles 93 are inorganic particles 90 containing oxygen (oxygen element), it is considered that the first layer 31a formed on the inner wall surface 27 adheres to the third inorganic particles 93 via the oxygen in the inorganic particles 90 forming the inner wall surface 27. The first layer 31a and the inner wall surface 27 are strongly bonded. The embodiment can increase the adhesive force between the inner wall surface 27 and the first layer 31a. The seed layer 30a is unlikely to peel off from the inner wall surface 27. The inorganic particles 90 forming the inner wall surface 27 preferably contain oxygen elements. When the third inorganic particles 93 are glass particles and the first layer 31a further contains silicon, both contain silicon. In this case, the first layer 31a is formed of an alloy containing copper, aluminum, and silicon. Therefore, it is considered that the adhesive strength between the first layer 31a and the inorganic particles including the third inorganic particles 93 is further improved.

[0058] The first layer 31a of the seed layer 30a contacts the exposed surface 91aR of the first portion 91a of the first inorganic particles 91 forming the first surface 22 of the resin insulating layer 20. When the first layer 31a contains aluminum and the first inorganic particles 91 contain oxygen, it is considered that the adhesive strength between the first layer 31a and the first inorganic particles 91 is improved. Examples of inorganic particles (such as the first inorganic particles) 90 containing oxygen are glass particles and alumina particles. Therefore, when the first layer 31a is formed of an alloy containing copper and aluminum, the first layer 31a is unlikely to peel off from the resin insulating layer 20 even if the first surface 22 of the resin insulating layer 20 does not have a recess. The amount of aluminum in the first layer 31a is 1.0 at% or more and 15.0 at% or less. When the inorganic particles (first inorganic particles 91, second inorganic particles 92, third inorganic particles 93) 90 including the first inorganic particles 91 are glass particles and the first layer 31a further includes silicon, both of them include silicon. In this case, the first layer 31a is formed of an alloy including copper, aluminum, and silicon. The amount of silicon is 0.5 at% or more and 10.0 at% or less. It is considered that the two are strongly bonded via silicon. Therefore, it is considered that the adhesive force between the first layer 31a and the inorganic particles including the first inorganic particles 91 is further improved. In the embodiment, fine signal wiring 32, 34 can be formed. The width of the fine signal wiring 32, 34 is 1 μm or more and 3 μm or less. Even if the printed wiring board 2 having the fine signal wiring 32, 34 is subjected to a thermal shock, the signal wiring 32, 34 is unlikely to peel off from the resin insulating layer 20.

[0059] A plating resist is formed on the seed layer 30a. The plating resist has openings for forming the first signal wiring 32, the second signal wiring 34, and the land 36. If the first surface 22 has a recess, air due to the recess is likely to be trapped between the plating resist and the seed layer 30a. However, in the embodiment, the first surface 22 has almost no recess. Therefore, the seed layer 30a on the first surface 22 is formed almost flat. The seed layer 30a has almost no recess. Air is unlikely to remain between the plating resist and the seed layer 30a. The contact area between the plating resist and the seed layer 30a is large. Even if the width of the plating resist for forming the space between the first signal wiring 32 and the second signal wiring 34 is 10 μm or less, the plating resist is unlikely to peel off from the upper surface of the seed layer 30a. Even if the width of the plating resist is 3 μm or more and 8 μm or less, the embodiment can form the plating resist on the seed layer 30a. Even if the width of the plating resist is 6 μm or less, the plating resist is unlikely to peel off from the seed layer 30a.

[0060] An electrolytic plating layer 30b is formed on the seed layer 30a exposed from the plating resist. The electrolytic plating layer 30b is made of copper. The electrolytic plating layer 30b fills the opening 26. The seed layer 30a and the electrolytic plating layer 30b on the first surface 22 form a first signal wiring 32, a second signal wiring 34, and a land 36. The second conductor layer 30 is formed. The seed layer 30a and the electrolytic plating layer 30b in the opening 26 form a via conductor 40. The via conductor 40 connects the pad 14 and the land 36. The first signal wiring 32 and the second signal wiring 34 form a pair wiring.

[0061] The plating resist is removed. The seed layer 30a exposed from the electrolytic plating layer 30b is removed. The seed layer 30a is removed by wet etching. The etchant used for the wet etching is an aqueous solution containing hydrogen peroxide and sulfuric acid. The first layer 31a and the second layer 31b are simultaneously removed by wet etching. The second conductor layer 30 and the via conductor 40 are simultaneously formed. The printed wiring board 2 of the embodiment is obtained.

[0062] In the printed wiring board 2 of the embodiment, the first surface 22 of the resin insulating layer 20 is formed by the upper surface 80R of the resin 80 and the exposed surface 91aR of the first portion 91a exposed from the upper surface 80R of the resin 80. The first surface 22 does not have a recess. Therefore, when the seed layer 30a is formed on the resin insulating layer 20 by sputtering, the embodiment can form a continuous seed layer 30a even if the thickness of the sputtering film is thin. The seed layer 30a is formed thin. When the seed layer 30a is removed, the amount of etching is small. Therefore, the amount of etching of the electrolytic plating layer 30b is small. The second conductor layer 30 having the first signal wiring 32 and the second signal wiring 34 has a width as designed. Fine wiring is formed. A printed wiring board 2 having high quality is provided.

[0063] In the printed wiring board 2 of the embodiment, the inner wall surface 27 of the opening 26 is formed by the flat portion 93a of the third inorganic particles 93 and the resin 80. The flat portion 93a and the surface 80a of the resin 80 forming the inner wall surface 27 form a common surface. The inner wall surface 27 is formed smoothly. Therefore, a seed layer 30a of uniform thickness is formed on the inner wall surface 27 of the opening 26. The seed layer 30a is formed thin. When the seed layer 30a is removed, the amount of etching is small. Therefore, the amount of etching of the electrolytic plating layer 30b is small. The second conductor layer 30 having the first signal wiring 32 and the second signal wiring 34 has a width as designed. Fine wiring is formed. A printed wiring board 2 having high quality is provided.

[0064] In the printed wiring board 2 of the embodiment, the first layer 31a and the second layer 31b of the seed layer 30a are formed by sputtering. The first layer 31a and the second layer 31b are sufficiently adhered to each other. The second layer 31b is unlikely to peel off from the first layer 31a. Even if the diameter of the opening 26 is small, the connection reliability between the via conductor 40 and the pad 14 is high. The connection resistance through the via conductor 40 is unlikely to increase. As shown in FIG. 6F, the diameter D of the via conductor 40 (the diameter of the opening 26) is measured on the pad 14. The diameter D is 20 μm or more and 50 μm or less. Even if the length of each side of the printed wiring board 2 exceeds 50 mm, the connection resistance through the via conductor 40 is unlikely to increase. Even if the length of each side of the printed wiring board 2 is 100 mm or more, the connection resistance is unlikely to increase for a long period of time. A printed wiring board 2 having high quality is provided.

[0065] In the printed wiring board 2 of the embodiment, a portion of the first film 60 of the seed layer 30a covering the inner wall surface 27 of the opening 26 is formed on the second film 70. The first film 60 and the second film 70 partially overlap. Therefore, the embodiment can increase the strength of the seed layer 30a. The seed layer 30a is less likely to break. The seed layer 30a is formed of a substantially smooth first film 60 and a substantially smooth second film 70. Therefore, when a high-frequency signal is transmitted, the transmission loss is small. A high-quality printed wiring board 2 is provided.

[0066] In the printed wiring board 2 of the embodiment, the first surface 22 of the resin insulating layer 20 has almost no recesses. The standard deviation of the relative dielectric constant of the resin insulating layer 20 near the first surface 22 is suppressed from increasing. The relative dielectric constant of the first surface 22 does not vary greatly depending on the location. Even if the first signal wiring 32 and the second signal wiring 34 are in contact with the first surface 22, the embodiment can reduce the difference in the propagation speed of the electric signal between the first signal wiring 32 and the second signal wiring 34. Therefore, noise is suppressed in the printed wiring board 2 of the embodiment. Even if a logic IC is mounted on the printed wiring board 2 of the embodiment, the data transmitted by the first signal wiring 32 and the data transmitted by the second signal wiring reach the logic IC with almost no delay. The embodiment can suppress malfunction of the logic IC. Even if the length of the first signal wiring 32 and the length of the second signal wiring 34 are 5 mm or more, the embodiment can reduce the difference in the propagation speed between the two. Even if the length of the first signal wiring 32 and the length of the second signal wiring 34 are 10 mm or more and 20 mm or less, the embodiment can suppress malfunction of the logic IC. A high-quality printed wiring board 2 is provided. The length of each side of the printed wiring board 2 is 50 mm or more. The length of each side is preferably 100 mm or more. The length of each side is 250 mm or less.

[0067] [Example 1 of the embodiment] In another embodiment, the specific metal contained in the alloy forming the first sublayer 11a, 31a of the seed layer 10a, 30a is at least one of nickel, zinc, gallium, silicon, and magnesium.

[0068] [Another Example 2 of the embodiment] In the second modified embodiment, the alloy forming the first sublayer 11a, 31a of the seed layer 10a, 30a does not contain carbon.

[0069] [Example 3 of the embodiment] In the third alternative embodiment, the alloy forming the first sublayers 11a, 31a of the seed layers 10a, 30a does not contain oxygen.

[0070] In this specification, the term "plane" is used for the shape of the inner wall surface 27, the shape of the flat portion 93a, and the shape of the third inorganic particle. The meaning of the plane used for these is shown in Fig. 1 and Fig. 4A. That is, in Fig. 1 and Fig. 4A, the inner wall surface 27 is drawn almost straight. The shape of the inner wall surface 27 in Fig. 1 and Fig. 4A is almost straight. In this specification, the plane includes a substantially straight line in a cross section. As shown in the cross section of the third inorganic particle 93 in Fig. 1 and Fig. 4A, in a cross section, cutting with a plane includes cutting with a straight line. In this specification, the plane does not mean a perfect plane but includes a substantially flat plane. A substantially flat plane may include small irregularities. [Explanation of symbols]

[0071] 2: Printed wiring board 4: Insulating layer 10: First conductor layer 20: Resin insulation layer 22: 1st page 24:Second side 26 :Aperture 27: Inner wall surface 30: Second conductor layer 30a: seed layer 31a: 1st layer 31b: 2nd layer 40: Via conductor 80: Resin 90: Inorganic particles 91: 1st inorganic particle 91a :1st part 91b :Second part 92:Second inorganic particle 93:Third inorganic particle

Claims

1. A first conductor layer; a resin insulating layer having a first surface, a second surface opposite to the first surface, and an opening extending from the first surface to the second surface, the resin insulating layer being laminated on the first conductor layer such that the second surface faces the first conductor layer; a second conductor layer formed on the first surface of the resin insulating layer; a via conductor formed in the opening and connecting the first conductor layer and the second conductor layer, the second conductor layer and the via conductor are formed by a seed layer and an electrolytic plating layer formed on the seed layer, the seed layer having a first layer and a second layer formed on the first layer; the first layer is made of an alloy containing copper and aluminum, and the second layer is made of copper; The resin insulation layer includes resin and inorganic particles, the inorganic particles including first inorganic particles partially embedded in the resin and second inorganic particles embedded in the resin, the first inorganic particles are formed of a first portion protruding from the resin and a second portion embedded in the resin, and the first surface is formed by an upper surface of the resin and an exposed surface of the first portion exposed from the upper surface.

2. 2. The printed wiring board according to claim 1, wherein a ratio of a volume of the first portion to a volume of the first inorganic particles is greater than 0 and is equal to or smaller than 0.

4.

3. 2. The printed wiring board of claim 1, wherein the inorganic particles are glass particles.

4. A printed wiring board according to claim 1, wherein the inorganic particles further include third inorganic particles forming an inner wall surface of the opening, the inner wall surface being formed by the third inorganic particles and the resin, the third inorganic particles having a flat portion, and the flat portion forming the inner wall surface.

5. 5. The printed wiring board according to claim 4, wherein the flat portion and a surface of the resin forming the inner wall surface form a substantially common surface.

6. 5. The printed wiring board according to claim 4, wherein the second inorganic particles have a spherical shape, and the shape of the third inorganic particles is obtained by cutting the second inorganic particles along a plane.

7. A printed wiring board according to claim 4, wherein forming the opening includes forming the inorganic particles having protruding portions protruding from the resin forming the inner wall surface of the opening, and the third inorganic particles are formed by removing the protruding portions of the inorganic particles.

8. A printed wiring board according to claim 4, wherein forming the opening includes forming an inorganic particle having a protruding portion from the second inorganic particle, and the inner wall surface of the opening includes an exposed surface of the third inorganic particle formed by removing the protruding portion.

9. 2. The printed wiring board according to claim 1, wherein the inorganic particles contain oxygen elements.

10. 10. The printed wiring board of claim 1, wherein the alloy further comprises silicon.

11. 2. The printed wiring board according to claim 1, wherein the aluminum content in the alloy is 1.0 at % or more and 15.0 at % or less.

12. 2. The printed wiring board according to claim 1, wherein the alloy further contains carbon, and the carbon content in the alloy is 50 ppm or less.

13. 2. The printed wiring board according to claim 1, wherein the alloy further contains oxygen, and the oxygen content in the alloy is 100 ppm or less.

14. 11. The printed wiring board according to claim 10, wherein the aluminum content in the alloy is 1.0 at % or more and 15.0 at % or less, and the silicon content in the alloy is 0.5 at % or more and 10.0 at % or less.

15. 2. The printed wiring board of claim 1, wherein said alloy further comprises a specific metal, said specific metal being at least one of nickel, zinc, gallium, silicon, and magnesium.

Images