Printed wiring board

Abstract

To provide a printed wiring board having high quality.SOLUTION: A printed wiring board according to an embodiment includes: a first conductor layer; a resin insulation layer which has a first surface, a second surface on a side opposite the first surface and an opening reaching the second surface from the first surface, the resin insulation layer being laminated on the first conductor layer such that the second surface faces the first conductor layer; a second conductor layer formed on the first surface of the resin insulation layer; and a via conductor which is formed in the opening and connects the first conductor layer and the second conductor layer. The resin insulation layer includes a resin and inorganic particles. The inorganic particles include first inorganic particles forming the first surface and second inorganic particles embedded in the resin. The first inorganic particles each have a substantially flat exposed portion. The resin has an upper surface forming the first surface. The first surface is formed of the upper surface of the resin and the exposed portion of each first inorganic particle.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The technology disclosed in this specification relates to a printed wiring board. [Background technology]

[0002] Patent Document 1 discloses a printed wiring board having a first conductor layer, an insulating layer formed on the first conductor layer, and a second conductor layer formed on the insulating layer. The insulating layer has a through hole for a via conductor that exposes the first conductor layer. A via conductor that connects the first conductor layer and the second conductor layer is formed in the through hole. The via conductor is formed of an electroless plating layer and an electrolytic plating layer. The insulating layer contains a resin and inorganic particles. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-126103 A Summary of the Invention

[0004] [Problem of Patent Document 1] As shown in FIG. 17 of Patent Document 1, Patent Document 1 has an intermediate layer on the wall surface (inner peripheral surface) of the through hole. The intermediate layer has a complex uneven surface due to gaps formed between inorganic particles. The inorganic particles contained in the intermediate layer are the same as the inorganic particles contained in the insulating layer. As shown in FIG. 18 of Patent Document 1, Patent Document 1 forms an electroless plating film in the through hole. The electroless plating film follows the unevenness formed in the intermediate layer. Alternatively, the gaps formed in the intermediate layer are filled with the electroless plating film. However, if the unevenness is complex, it is considered difficult to completely fill the gaps with the electroless plating film. When the electroless plating film is precipitated, it is considered that gas generated by the reaction inhibits filling the gaps. If the gaps are not completely filled with the electroless plating film, it is considered that voids will occur between the wall surface of the through hole and the electroless plating film. It is considered that when the voids expand due to heat, the electroless plating film will peel off from the wall surface of the through hole. [Means for solving the problem]

[0005] The printed wiring board of the present invention comprises a first conductor layer, a resin insulating layer having a first surface, a second surface opposite to the first surface, and an opening extending from the first surface to the second surface, the resin insulating layer being laminated on the first conductor layer such that the second surface faces the first conductor layer, a second conductor layer formed on the first surface of the resin insulating layer, and a via conductor formed in the opening and connecting the first conductor layer and the second conductor layer. The resin insulating layer comprises a resin and inorganic particles, the inorganic particles including first inorganic particles forming the first surface and second inorganic particles embedded in the resin, the first inorganic particles having a substantially flat exposed portion, the resin having an upper surface forming the first surface, and the first surface being formed by the upper surface of the resin and the exposed portions of the first inorganic particles.

[0006] In the printed wiring board of the embodiment of the present invention, almost no recesses are formed on the first surface of the resin insulating layer. Therefore, when a seed layer is formed on the resin insulating layer by sputtering, the embodiment can form a continuous seed layer even if the thickness of the sputtering film is thin. As a result, when the seed layer is removed, the embodiment can reduce the amount of etching. The embodiment can form fine signal wiring. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a cross-sectional view illustrating a printed wiring board according to an embodiment. [Diagram 2] FIG. 2 is an enlarged cross-sectional view illustrating a portion of the printed wiring board according to the embodiment. [Diagram 3] FIG. 2 is an enlarged cross-sectional view illustrating a portion of the printed wiring board according to the embodiment. [Figure 4] FIG. 2 is an enlarged cross-sectional view illustrating a portion of the printed wiring board according to the embodiment. [Figure 5A] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 5B]1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 5C] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 5D] 1A to 1C are enlarged cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 5E] 1A to 1C are enlarged cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 5F] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6] FIG. 11 is a cross-sectional view illustrating a modified example of the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] [Embodiment] Fig. 1 is a cross-sectional view showing a printed wiring board 2 of an embodiment. Figs. 2 and 3 are enlarged cross-sectional views showing a portion of the printed wiring board 2 of an embodiment. As shown in Fig. 1, the printed wiring board 2 has an insulating layer 4, a conductor layer (first conductor layer) 10, a resin insulating layer (first resin insulating layer) 20, a conductor layer (second conductor layer) 30, a via conductor 40, a resin insulating layer (second resin insulating layer) 120, a conductor layer (third conductor layer) 130, and a via conductor 140.

[0009] The insulating layer 4 is formed using a resin. The insulating layer 4 may contain inorganic particles such as silica. The insulating layer 4 may contain a reinforcing material such as glass cloth. The insulating layer 4 has a third surface 6 and a fourth surface 8 opposite to the third surface 6.

[0010] The first conductor layer 10 is formed on the third surface 6 of the insulating layer 4. The first conductor layer 10 includes a signal wiring 12 and a pad 14. Although not shown in the figure, the first conductor layer 10 also includes a conductor circuit other than the signal wiring 12 and the pad 14. The first conductor layer 10 is mainly made of copper. The first conductor layer 10 is formed of a seed layer 10a on the insulating layer 4 and an electrolytic plating layer 10b on the seed layer 10a. The thickness of the seed layer 10a is less than 0.5 μm. The seed layer 10a is formed of a first layer 11a on the third surface 6 and a second layer 11b on the first layer 11a. The first layer 11a is in contact with the insulating layer 4. The ratio of the thickness of the first layer 11a to the thickness of the second layer 11b (thickness of the first layer / thickness of the second layer) is 0.25 or more and 0.7 or less. It is preferable that the thickness of the second layer 11b is thicker than the thickness of the first layer 11a.

[0011] The first layer 11a is formed of an alloy (copper alloy) containing copper and a metal other than copper. For example, the first layer 11a is formed of an alloy containing copper and aluminum. The first layer 11a is formed of an alloy containing copper, aluminum, and a specific metal. Examples of the specific metal are nickel, zinc, gallium, silicon, and magnesium. It is preferable that the alloy contains one type of specific metal, two types of specific metals, or three types of specific metals. An example of the specific metal is silicon. The content of aluminum in the alloy is 1.0 at% or more and 15.0 at% or less. When the alloy contains a specific metal, the content of the specific metal in the alloy is 0.5 at% or more and 10.0 at% or less. The first layer 11a may contain impurities. Examples of the impurities are oxygen and carbon. The first layer 11a can contain oxygen or carbon. The first layer 11a can contain oxygen and carbon. In an embodiment, the alloy further contains carbon. The content of carbon in the alloy is 50 ppm or less. The alloy further contains oxygen. The oxygen content in the alloy is 100 ppm or less. The above content values ​​of each element are examples. Among the elements forming the first layer 11a, the amount of copper is the largest. The amount of aluminum is the next largest. When the alloy contains a specific metal, the amount of the specific metal is smaller than the amount of aluminum. Thus, copper is the main metal, aluminum is the first minor metal, and the specific metal is the second minor metal. The amount of impurities is smaller than the amount of the specific metal.

[0012] The second layer 11b is made of copper. The electrolytic plating layer 10b is made of copper.

[0013] The copper content in the copper alloy forming first layer 11a is greater than 90 at%. The copper content in the alloy is less than 99 at%. The copper content in the copper alloy is 98 at% or less. The copper content in second layer 11b is 99.9 at% or more. It is preferable that the copper content in second layer 11b is 99.95 at% or more. Electrolytic plating layer 10b is made of copper. The copper content in electrolytic plating layer 10b is 99.9 at% or more. It is preferable that the copper content in electrolytic plating layer 10b is 99.9 at% or more.

[0014] The resin insulating layer (first resin insulating layer) 20 is formed on the third surface 6 of the insulating layer 4 and the first conductor layer 10. The first resin insulating layer 20 has a first surface 22 and a second surface 24 opposite to the first surface 22. The second surface 24 of the first resin insulating layer 20 faces the first conductor layer 10. The first resin insulating layer 20 has an opening (opening for via conductor) 26 exposing the pad 14. The diameter of the bottom of the opening 26 is 20 μm or more and 50 μm or less. The resin insulating layer (first resin insulating layer) 20 is formed of a resin 80 and a large number of inorganic particles 90 dispersed in the resin 80. The resin 80 has an upper surface 80R and a lower surface 80S opposite to the upper surface 80R. The upper surface 80R forms the first surface 22, and the lower surface 80S forms the second surface 24. The resin 80 is an epoxy resin. Examples of the resin include a thermosetting resin and a photocurable resin. The inorganic particles 90 are, for example, glass particles or alumina particles. The inorganic particles 90 preferably contain oxygen elements. The average particle size of the inorganic particles 90 is 0.5 μm or less. The amount of the inorganic particles 90 in the resin insulation layer 20 is 75 wt % or more.

[0015] As shown in FIG. 1 and FIG. 2, the inorganic particles 90 include first inorganic particles 91 forming the first surface 22 and second inorganic particles 92 embedded in the resin 80. The second inorganic particles 92 are completely embedded in the resin 80. The second inorganic particles 92 are spherical in shape. The first inorganic particles 91 are formed from the second inorganic particles 92. The first inorganic particles 91 are formed by removing a portion of the second inorganic particles 92. The shape of the first inorganic particles 91 and the shape of the second inorganic particles 92 are different. The shape of the first inorganic particles 91 is substantially a spherical depression. A portion of the surface of the first inorganic particles 91 is a substantially flat surface, and the plane is almost flat. The plane forms a surface 91c of the cut end of the spherical depression and faces the first surface 22. Alternatively, a portion of the surface of the first inorganic particles 91 is a substantially curved surface, and the curved surface is almost smooth. The curved surface forms a surface 91c of the cut end of the spherical depression and faces the first surface 22. The first inorganic particles 91 are embedded in the resin 80 so that the cut surface 91c forms the first surface 22. The cut surface 91c of the first inorganic particles 91 and the upper surface 80R of the resin 80 form the first surface 22. The cut surface 91c and the upper surface 80R form substantially the same surface. The cut surface 91c is exposed from the upper surface 80R of the resin 80. Of the surface of the first inorganic particles 91, the part exposed by the upper surface 80R of the resin 80 is the exposed portion 91P. The surface (exposed surface) 91x of the exposed portion 91P forms the first surface 22. The exposed surface (first exposed surface) 91x is a substantially flat surface or a substantially curved surface. The first exposed surface 91x is substantially flat. The first exposed surface 91x is substantially smooth. The first exposed surface 91x and the cut surface 91c are substantially the same surface. The first surface 22 is formed by the first exposed surface 91x and the upper surface 80R of the resin 80. The first exposed surface 91x and the upper surface 80R form substantially the same surface.

[0016] The arithmetic mean roughness (Ra) of the first surface 22 is less than 0.08 μm. The roughness Ra of the first surface 22 is preferably 0.05 μm or less. It is more preferable that the roughness Ra of the first surface 22 is 0.03 μm or less. The arithmetic mean roughness (Ra) of the upper surface 80R is less than 0.08 μm. It is preferable that the roughness Ra of the upper surface 80R is 0.05 μm or less. It is more preferable that the roughness Ra of the upper surface 80R is 0.03 μm or less.

[0017] The first surface 22 may have a step (first step) between the first exposed surface 91x and the upper surface 80R. The first exposed surface 91x protrudes from the upper surface 80R. Alternatively, the first exposed surface 91x is recessed from the upper surface 80R. It is preferable that the first exposed surface 91x protrudes. The size of the step (first step) (the distance between the first exposed surface 91x and the upper surface 80R of the resin 80) is 5 μm or less. It is preferable that the size of the first step is 3 μm or less. It is more preferable that the size of the first step is 1.5 μm or less. Even if a step (first step) is formed, the step is small, so that the first exposed surface 91x and the upper surface 80R of the resin 80 form a substantially common surface. For example, the size of the step is represented by a maximum value.

[0018] The ratio R (volume of first inorganic particles / volume of virtual sphere) of the volume of the first inorganic particles 91 to the volume of a sphere (virtual sphere) predicted from the first inorganic particles 91 is 0.6 or more and less than 1. The ratio R is preferably 0.8 or more. The ratio R is more preferably 0.9 or more. The ratio R is most preferably 0.95 or more. The ratio R is preferably 0.97 or less. The thermal expansion coefficient of the resin 80 near the upper surface 80R is controlled.

[0019] As shown in FIG. 1 and FIG. 3, the inorganic particles 90 further include third inorganic particles 93 that form an inner wall surface (first inner wall surface) 27 of the opening (opening for via conductor) 26. The shape of the third inorganic particles 93 is obtained by cutting a sphere with a plane. The shape of the third inorganic particles 93 is obtained by cutting the second inorganic particles 92 with a plane. The third inorganic particles 93 are formed from the second inorganic particles 92. The third inorganic particles 93 are obtained by removing a part of the second inorganic particles 92. The shape of the third inorganic particles 93 is substantially a spherical defect. The shape of the first inorganic particles 91 and the shape of the third inorganic particles 93 are almost the same. The shape of the third inorganic particles 93 and the shape of the second inorganic particles 92 are different. The third inorganic particles 93 have a flat portion 93a. The flat portion 93a forms the inner wall surface 27. The inner wall surface 27 is formed by the resin 80 and the flat portion 93a. The flat portion 93a and the surface (first resin surface) 80a of the resin 80 forming the inner wall surface 27 form an almost common surface. No unevenness is formed on the resin 80 forming the inner wall surface 27. The surface 80a of the resin 80 forming the inner wall surface 27 is almost smooth. No unevenness is formed on the exposed surface (surface forming the inner wall surface 27) 93b of the flat portion 93a. The exposed surface (second exposed surface) 93b of the flat portion 93a is smooth. The inner wall surface 27 is formed smoothly. The arithmetic mean roughness (Ra) of the inner wall surface 27 is 1.0 μm or less. The roughness (Ra) of the surface 80a of the resin 80 forming the inner wall surface 27 is 1.0 μm or less.

[0020] The inner wall surface 27 may have a step (second step) between the flat portion 93a and the surface 80a of the resin 80 forming the inner wall surface 27. The exposed surface (second exposed surface) 93b of the flat portion 93a protrudes from the surface 80a of the resin 80 forming the inner wall surface 27. Alternatively, the exposed surface 93b of the flat portion 93a is recessed from the surface 80a of the resin 80 forming the inner wall surface 27. It is preferable that the exposed surface 93b of the flat portion 93a protrudes from the surface 80a of the resin 80 forming the inner wall surface 27. The size of the step (second step) (the distance between the exposed surface 93b of the flat portion 93a and the surface 80a of the resin 80 forming the inner wall surface 27) is 5 μm or less. It is preferable that the size of the second step is 3 μm or less. It is more preferable that the size of the second step is 1.5 μm or less. Even if a step (second step) is formed, the step is small, so that the exposed surface 93b of the flat portion 93a and the surface 80a of the resin 80 forming the inner wall surface 27 form an almost common surface. When the first exposed surface 91x protrudes, the second exposed surface 93b also protrudes. When the first exposed surface 91x recesses, the second exposed surface 93b also recesses.

[0021] As shown in FIG. 1, the second conductor layer 30 is formed on the first surface 22 of the resin insulating layer (first resin insulating layer) 20. The second conductor layer 30 includes a first signal wiring 32, a second signal wiring 34, and a land 36. Although not shown in the figure, the second conductor layer 30 also includes a conductor circuit other than the first signal wiring 32, the second signal wiring 34, and the land 36. The first signal wiring 32 and the second signal wiring 34 form a pair wiring. The first signal wiring 32 and the second signal wiring 34 are adjacent to each other. As shown in FIG. 2, the distance D1 between the first signal wiring 32 and the second signal wiring 34 is 1.5 μm or more and 10 μm or less. It is preferable that the distance D1 is 1.5 μm or more and 8 μm or less. The first signal wiring 32 is an example of a first conductor circuit, and the second signal wiring 34 is an example of a second conductor circuit.

[0022] The conductor layer (second conductor layer) 30 is mainly made of copper. The second conductor layer 30 is formed of a seed layer 30a on the first surface 22 and an electrolytic plating layer 30b on the seed layer 30a. The seed layer 30a is formed of a first layer 31a on the first surface 22 and a second layer 31b on the first layer 31a. The seed layer 30a has a thickness of less than 0.5 μm. The first conductor layer 10 and the second conductor layer 30 are similar. The relationship between the thickness of the first layer 31a and the thickness of the second layer 31b and the relationship between the thickness of the first layer 11a and the thickness of the second layer 11b are similar. The first layer 31a and the second layer 31b form the second conductor layer 30, and the first layer 11a and the second layer 11b form the first conductor layer 10. The first layer 31a is formed of an alloy (copper alloy) similar to that of the first layer 11a. The second layer 31b is formed of copper. The electrolytic plating layer 30b is made of copper. The first layer 31a is in contact with the first surface 22.

[0023] The via conductor (first via conductor) 40 is formed in the opening (opening for the via conductor) 26. The opening 26 penetrates the first resin insulating layer 20 and reaches the first conductor layer 10. The via conductor (first via conductor) 40 connects the first conductor layer 10 and the second conductor layer 30. In FIG. 1, the via conductor 40 connects the pad 14 and the land 36. The via conductor 40 is formed of a seed layer 30a and an electrolytic plating layer 30b on the seed layer 30a. The seed layer 30a forming the via conductor 40 and the seed layer 30a forming the second conductor layer 30 are common. The first layer 31a forming the via conductor 40 and the first layer 31a forming the second conductor layer 30 are common. The first layer 31a is in contact with the inner wall surface 27. The second layer 31b forming the via conductor 40 and the second layer 31b forming the second conductor layer 30 are common. The electrolytic plated layer 30b forming the via conductor 40 and the electrolytic plated layer 30b forming the second conductor layer 30 are common.

[0024] The first layer 11a forming the first conductor layer 10, the first layer 31a forming the second conductor layer 30, and the first layer 31a forming the via conductor 40 are similar. Both layers 11a and 31a are formed of similar elements. The elements forming both layers 11a and 31a have similar amounts. The second layer 11b forming the first conductor layer 10, the second layer 31b forming the second conductor layer 30, and the second layer 31b forming the via conductor 40 are similar. The second layers 11b and 31b are formed of similar elements. The second layers 11b and 31b are formed of approximately the same amount of elements. The electrolytic plating layer 10b forming the first conductor layer 10, the electrolytic plating layer 30b forming the second conductor layer 30, and the electrolytic plating layer 30b forming the via conductor 40 are similar. The electrolytic plating layers 10b and 30b are formed of similar elements. The electrolytic plating layers 10b and 30b are formed of approximately the same amount of elements.

[0025] As shown in FIG. 1, in the embodiment, an adhesive layer 100 can be formed on the surface (upper surface and side surface) of the second conductor layer 30. The adhesive layer 100 is not essential. The surface of the second conductor layer 30 is formed of a first surface and a second surface. Among the surfaces, the first surface is a portion exposed by an opening 126 for the via conductor 140. The via conductor 140 penetrates the second resin insulating layer 120 and reaches the second conductor layer 30. The second surface is a portion other than the first surface. The first surface is not covered with the adhesive layer 100, and the second surface is covered with the adhesive layer 100. The adhesive layer 100 is in contact with the second conductor layer 30. The adhesive layer 100 is in contact with the second surface of the second conductor layer 30. The adhesive layer 100 is formed of a resin. The adhesive layer 100 is formed of an organic material (organic resin). An example of the organic material is a nitrogen-based organic compound. The nitrogen-based organic compound is, for example, a tetrazole compound. Examples of nitrogen-based organic compounds are disclosed in JP 2015-54987 A. The adhesive layer 100 does not cover the first surface 22 of the resin insulating layer 20 exposed from the second conductor layer 30. The adhesive layer 100 is formed between the second conductor layer 30 and the second resin insulating layer 120. The adhesive layer 100 is sandwiched between the second conductor layer 30 and the resin insulating layer (second resin insulating layer) 120. The adhesive layer 100 bonds the second conductor layer 30 and the second resin insulating layer 120.

[0026] Fig. 4 is an enlarged cross-sectional view showing a portion of the adhesive layer 100 formed on the second surface of the second conductor layer 30. As shown in Fig. 4, the adhesive layer 100 is formed of a substantially flat smooth film 102 and a plurality of protrusions 104 protruding from the smooth film 102.

[0027] The smooth film 102 has a substantially uniform thickness T. The thickness T of the smooth film 102 is 10 nm or more and 120 nm or less. The ratio (S1 / S2) of the area (S1) of the smooth film 102 exposed from the protrusion 104 to the area (S2) of the adhesive layer 100 is 0.1 or more and 0.5 or less. The smooth film 102 on the second surface of the second conductor layer 30 is formed to substantially conform to the shape of the second surface of the second conductor layer 30. When undulations are formed on the top and side surfaces of the second conductor layer 30, the smooth film 102 follows the undulations.

[0028] The protruding portion 104 is formed of a plurality of protrusions 106. The plurality of protrusions 106 form unevenness on the upper surface of the protruding portion 104. 2 The number of protrusions 106 per unit area is 5 or more and 15 or less. The protrusions 104 have heights H1, H2 between the upper surface of the smooth film 102 and the tops of the protrusions 104. The maximum values ​​of the heights H1, H2 are 10 times or more and 30 times or less the thickness T of the smooth film 102. The heights H1, H2 are 200 nm or more and 450 nm or less.

[0029] A second resin insulating layer 120 is formed on the second conductor layer 30 and the first surface 22 of the first resin insulating layer 20. The second resin insulating layer 120 is formed on the second conductor layer 30 via an adhesive layer 100. The second resin insulating layer 120 has a first surface 122 and a second surface 124 opposite the first surface 122. The second surface 124 of the second resin insulating layer 120 faces the second conductor layer 30. The second resin insulating layer 120 has an opening (opening for a via conductor) 126. The opening 126 penetrates the second resin insulating layer 120 and reaches the second conductor layer 30.

[0030] The second resin insulating layer 120 is formed of a resin 80 and inorganic particles 90. The first resin insulating layer 20 and the second resin insulating layer 120 are similar. Therefore, the resin 80 forming the second resin insulating layer 120 and the resin 80 forming the first resin insulating layer 20 are similar. The inorganic particles 90 forming the second resin insulating layer 120 and the inorganic particles 90 forming the first resin insulating layer 20 are similar. As with the first resin insulating layer 20, the inorganic particles 90 forming the second resin insulating layer 120 include first inorganic particles 91, second inorganic particles 92, and third inorganic particles 93. The first inorganic particles 91 in the first resin insulating layer 20 and the first inorganic particles 91 in the second resin insulating layer 120 are similar. The second inorganic particles 92 in the first resin insulating layer 20 and the second inorganic particles 92 in the second resin insulating layer 120 are similar. The third inorganic particles 93 in the first resin insulating layer 20 and the third inorganic particles 93 in the second resin insulating layer 120 are similar.

[0031] The first surface 22 of the first resin insulating layer 20 and the first surface 122 of the second resin insulating layer 120 are similar. The first surface 122 of the resin insulating layer (second resin insulating layer) 120 is formed by the upper surface (second upper surface) of the resin 80 forming the resin insulating layer (second resin insulating layer) 120 and the exposed surface (third exposed surface) of the exposed portion of the first inorganic particles 91 forming the resin insulating layer (second resin insulating layer) 120. The second upper surface and the third exposed surface form a substantially common surface. As with the first surface 22 of the first resin insulating layer 20, the first surface 122 of the second resin insulating layer 120 can have a step (third step) between the second upper surface and the third exposed surface. The first step and the third step are similar. The size of the first step and the size of the third step are similar. Even if the first surface 122 has a step, the size of the step is small, so that the upper surface of the resin 80 (second upper surface) and the exposed surface of the first inorganic particles 91 (third exposed surface) are positioned substantially on the same plane.

[0032] An opening (opening for via conductor) 126 penetrating the second resin insulating layer 120 is similar to an opening (opening for via conductor) 26 penetrating the first resin insulating layer 20. Therefore, an inner wall surface (second inner wall surface) 127 of the opening 126 is similar to an inner wall surface (first inner wall surface) 27 of the opening 26. The second inner wall surface 127 is formed by the resin 80 and the flat portion 93a of the third inorganic particles 93. As with the first inner wall surface 27, the second inner wall surface 127 is formed by the surface (second resin surface) of the resin 80 forming the second inner wall surface 127 and the flat portion of the third inorganic particles 93 forming the second resin insulating layer 120. As with the flat portion 93a of the third inorganic particles 93 forming the first resin insulating layer 20, the flat portion of the third inorganic particles 93 forming the second resin insulating layer 120 has an exposed surface (fourth exposed surface). The second resin surface and the fourth exposed surface forming inner wall surface 127 form a substantially common surface. Similar to first inner wall surface 27, second inner wall surface 127 can have a step (fourth step) between the second resin surface and the fourth exposed surface. The second step and the fourth step are similar. The size of the fourth step and the size of the second step are similar. Therefore, even if second inner wall surface 127 has a fourth step, the second resin surface and the fourth exposed surface form a substantially common surface.

[0033] As shown in FIG. 1, a third conductor layer 130 is formed on a first surface 122 of a second resin insulating layer 120. A via conductor (second via conductor) 140 that connects the second conductor layer 30 and the third conductor layer 130 is formed in an opening 126. The third conductor layer 130 and the second conductor layer 30 are similar. The second via conductor 140 and the first via conductor 40 are similar. The third conductor layer 130 and the second via conductor 140 are formed of a seed layer 130a consisting of a first layer 131a and a second layer 131b on the first layer 131a, and an electrolytic plating layer 130b on the seed layer 130a. The first layer 131a that forms the third conductor layer 130 and the second via conductor 140 are similar to the first layer 31a of the second conductor layer 30. The second layer 131b forming the third conductor layer 130 and the second via conductor 140 is similar to the second layer 31b of the second conductor layer 30. The electrolytic plating layer 130b forming the third conductor layer 130 and the second via conductor 140 is similar to the electrolytic plating layer 30b of the second conductor layer 30. The first layer 131a contacts the first surface 122 of the second resin insulating layer 120. The first layer 131a contacts the inner wall surface (second inner wall surface) 127. The layers (first layer 31a, second layer 31b, electrolytic plating layer 30b) forming the second conductor layer 30 and the layers (first layer 131a, second layer 131b, electrolytic plating layer 130b) forming the third conductor layer 130 have similar thicknesses and compositions. Each layer (first layer 31a, second layer 31b, electrolytically plated layer 30b) forming second conductor layer 30 and each layer (first layer 131a, second layer 131b, electrolytically plated layer 130b) forming third conductor layer 130 are formed of similar elements. The elements contained in each layer (first layer 31a, second layer 31b, electrolytically plated layer 30b) forming second conductor layer 30 and the elements contained in each layer (first layer 131a, second layer 131b, electrolytically plated layer 130b) forming third conductor layer 130 have similar amounts.

[0034] The length of each side of the printed wiring board 2 is 50 mm or more. It is preferable that the length of each side is 100 mm or more. The length of each side is 250 mm or less.

[0035] The printed wiring board 2 may have a solder resist layer on the first surface 122 of the second resin insulating layer 120 and on the third conductor layer 130. The insulating layer 4 may form a core material. The embodiment may have an adhesive layer 100 covering the second surface of the third conductor layer 130. The adhesive layer 100 is sandwiched between the third conductor layer 130 and the solder resist layer.

[0036] [Method of manufacturing printed wiring board 2 according to embodiment] 5A to 5F show a method for manufacturing a printed wiring board 2 of an embodiment. FIGS. 5A to 5C and 5F are cross-sectional views. FIGS. 5D and 5E are enlarged cross-sectional views. FIG. 5A shows an insulating layer 4 and a conductor layer (first conductor layer) 10 formed on a third surface 6 of the insulating layer 4. The first conductor layer 10 is formed by a semi-additive method. The first layer 11a and the second layer 11b are formed by sputtering. The first layer 11a and the second layer 11b are formed in a vacuum. The electrolytic plating layer 10b is formed by electrolytic plating.

[0037] As shown in Fig. 5B, a resin insulating layer (first resin insulating layer) 20 and a protective film 50 are formed on the insulating layer 4 and the first conductor layer 10. The second surface 24 of the resin insulating layer 20 faces the third surface 6 of the insulating layer 4. The protective film 50 is formed on the first surface 22 of the first resin insulating layer 20. The resin insulating layer 20 has resin 80 and inorganic particles 90. The inorganic particles 90 are embedded in the resin 80. An example of the inorganic particles 90 is glass particles.

[0038] The protective film 50 completely covers the first surface 22 of the resin insulating layer 20. An example of the protective film 50 is a film made of polyethylene terephthalate (PET). A release agent is formed between the protective film 50 and the resin insulating layer 20.

[0039] As shown in FIG. 5C, laser light L is irradiated from above the protective film 50. The laser light L penetrates the protective film 50 and the resin insulating layer 20 at the same time. An opening (opening for a via conductor) 26 is formed leading to the pad 14 of the first conductor layer 10. The laser light L is, for example, a UV laser light or a CO2 laser light. The pad 14 is exposed by the opening 26. When the opening 26 is formed, the first surface 22 is covered with the protective film 50. Therefore, even if the resin scatters when the opening 26 is formed, the resin is prevented from adhering to the first surface 22.

[0040] FIG. 5D shows the inner wall surface 27b of the opening 26 after the laser light irradiation. By irradiating the resin insulating layer 20 with the laser light L, a part of the second inorganic particles 92 embedded in the resin 80 forms the inner wall surface 27b after the laser light irradiation. The inner wall surface 27b is formed of the resin 80 and the inorganic particles 90 protruding from the resin 80. Some of the second inorganic particles embedded in the resin insulating layer 20 partially protrude from the inner wall surface 27b. The second inorganic particles 92 forming the inner wall surface 27b after the laser light irradiation are formed of a protruding part P protruding from the resin 80 and a part E buried in the resin 80. The second inorganic particles 92 forming the inner wall surface 27b are called third protruding particles.

[0041] The protective film is removed. After the protective film 50 is removed, the first surface 22 of the resin insulating layer 20 is cleaned. The resin 80 forming the first surface 22 is removed by a dry process. For example, the first surface 22 of the resin insulating layer 20 is cleaned by reverse sputtering. For example, cleaning the first surface 22 of the resin insulating layer 20 is performed by sputtering using argon gas (argon sputtering). Figures 5E(a) and (b) show the first surface 22 of the resin insulating layer 20 before and after cleaning. As shown in Figures 5E(a) and (b), the resin 80 forming the resin insulating layer 20 is removed by about 20 nm by cleaning by sputtering or the like. For example, the adhesive for bonding the protective film 50 to the resin insulating layer 20 is removed. The resin 80 is selectively removed by cleaning. The thickness of the resin 80 becomes thinner. Some of the inorganic particles 90 are partially exposed from the upper surface 80R of the resin 80 by cleaning. A portion of the second inorganic particles 92 is exposed from the upper surface 80R of the resin 80. Fig. 5E(b) shows the first surface 22b after cleaning. As shown in Fig. 5E(b), the inorganic particles (second inorganic particles 92) 90 forming the first surface 22b after cleaning are formed of first portions 91a protruding from the resin 80 and second portions 91b buried in the resin 80. The second inorganic particles 92 forming the first surface 22b after cleaning are referred to as first protruding particles.

[0042] In order to control the shape of the inner wall surface, the inner wall surface 27b after the laser light irradiation is treated. In order to control the shape of the first surface, the first surface 22b after cleaning is treated. It is preferable that the first protruding particles and the third protruding particles are selectively removed. As a result, the first inorganic particles 91 are formed from the inorganic particles 90. The third inorganic particles 93 are formed from the inorganic particles 90. For example, the first protruding particles and the third protruding particles are selectively removed by treating the inner wall surface 27b after the laser light irradiation and the first surface 22b after cleaning with a chemical. Alternatively, the first protruding particles and the third protruding particles are selectively removed by treating the inner wall surface 27b after the laser light irradiation and the first surface 22b after cleaning with plasma. The selective removal includes that the etching rate of the inorganic particles 90 is higher than the etching rate of the resin 80. For example, the difference in etching rate between the two is 10 times or more. Alternatively, the difference in etching rate between the two is 50 times or more. Alternatively, the difference in etching rate between the two is 100 times or more. By processing the first surface 22b after cleaning, first inorganic particles 91 having exposed portions 91P are obtained. By processing the inner wall surface 27b after the laser light irradiation, third inorganic particles 93 having flat portions 93a are obtained. By controlling the conditions for processing the first surface 22b after cleaning, the embodiment can control the shape of the first surface 22. By controlling the conditions for processing the inner wall surface 27b after the laser light irradiation, the embodiment can control the shape of the inner wall surface 27. Examples of the conditions are temperature, concentration, time, and type and pressure of gas. The etching rate of the inorganic particles 90 and the etching rate of the resin are controlled.

[0043] The inner wall surface 27b after the laser light irradiation is treated. For example, the inner wall surface 27b is treated with plasma of a gas containing tetrafluoromethane. The protruding portion P is selectively removed to form the inner wall surface 27 of the embodiment. The third inorganic particles 93 are formed from the second inorganic particles 92. The protruding portion P is selectively removed to form the third inorganic particles 93 having a flat portion 93a. The surface forming the flat portion 93a is an approximately flat surface. The surface forming the flat portion 93a is an approximately curved surface. When the second inorganic particles 92 having a spherical shape are cut on a flat surface, the shape of the third inorganic particles 93 is obtained. Alternatively, the second inorganic particles 92 are cut on a curved surface. The shape of the third inorganic particles 93 is approximately a spherical incision. The inner wall surface 27 is formed by the flat portion 93a and the surface 80a of the resin 80. The exposed surface 93b of the flat portion 93a and the surface 80a of the resin 80 are located on approximately the same plane. For example, when the seed layer 30a is formed on the inner wall surface 27b by sputtering, the protruding portion P inhibits the growth of the sputtering film. For example, it is difficult to form a continuous seed layer 30a on the inner wall surface 27b. Alternatively, it is necessary to increase the thickness of the seed layer 30a. It is considered that a printed wiring board having the third protruding particles cannot form a fine conductor circuit on the first surface 22. In the embodiment, the protruding portion P is removed. In the embodiment, the thickness of the seed layer 30a formed by sputtering can be reduced. Even if the thickness of the seed layer 30a formed by sputtering is thin, a continuous seed layer 30a can be obtained. The thickness of the seed layer 30a is 0.05 μm or more and less than 0.5 μm.

[0044] Forming the opening 26 includes forming inorganic particles (second inorganic particles 92) 90 having protruding portions P. The protruding portions P protrude from the resin 80 forming the inner wall surface 27b of the opening 26. The third inorganic particles 93 are formed by removing the protruding portions P of the inorganic particles (second inorganic particles 92) 90. The inner wall surface 27 of the opening 26 includes the exposed surfaces 93b of the third inorganic particles 93. The exposed surfaces 93b of the third inorganic particles 93 are formed by removing the protruding portions P.

[0045] Obtaining the shape of the third inorganic particle 93 by cutting the spherical second inorganic particle 92 on a plane includes removing the protruding portion P of the inorganic particle 90. The inner wall surface 27 of the actual opening 26 is a substantially curved surface. Since the flat portion 93a is formed by removing the protruding portion P, the exposed surface 93b of the flat portion 93a includes a curved surface. In other words, forming a common surface between the flat portion 93a and the resin 80 includes forming the inner wall surface 27 that is substantially formed as a curved surface.

[0046] The first surface 22b after cleaning is treated. For example, the first surface 22b is treated with plasma of a gas containing tetrafluoromethane. The first portion 91a is selectively removed to form the first surface 22 of the embodiment. The first inorganic particles 91 are formed from the second inorganic particles 92. As shown in FIG. 5E(c), the first portion 91a is selectively removed to form the first inorganic particles 91 having the exposed portion 91P. The exposed surface (first exposed surface) 91x of the exposed portion 91P is substantially flat. The first exposed surface 91x may be substantially curved. When the second inorganic particles 92 having a spherical shape are cut on a flat surface, the shape of the first inorganic particles 91 is obtained. Alternatively, the second inorganic particles 92 are cut on a curved surface. The first surface 22 is formed by the exposed portion 91P and the upper surface 80R of the resin 80. The first exposed surface 91x of the exposed portion 91P and the upper surface 80R of the resin 80 are located on substantially the same plane. For example, when the seed layer 30a is formed on the first surface 22b by sputtering, the first portion 91a inhibits the growth of the sputtering film. For example, it is difficult to form a continuous seed layer 30a on the first surface 22b. Alternatively, it is necessary to increase the thickness of the seed layer 30a. It is considered that a printed wiring board having the first protruding particles cannot form a fine conductor circuit on the first surface 22. In the embodiment, the first portion 91a is removed. In the embodiment, the thickness of the seed layer 30a formed by sputtering can be reduced. Even if the thickness of the seed layer 30a formed by sputtering is reduced, a continuous seed layer 30a can be obtained. The thickness of the seed layer 30a is 0.05 μm or more and less than 0.5 μm.

[0047] Forming the first surface 22 includes forming inorganic particles (second inorganic particles 92) 90 having first portions 91a. The first portions 91a protrude from the upper surface 80R of the resin 80. The first inorganic particles 91 are formed by removing the first portions 91a of the inorganic particles (second inorganic particles 92) 90. The first surface 22 includes exposed surfaces 91x of the first inorganic particles 91. The exposed surfaces 91x of the first inorganic particles 91 are formed by removing the first portions 91a.

[0048] Obtaining the shape of the first inorganic particle 91 by cutting the second inorganic particle 92 having a spherical shape with a plane includes removing the first portion 91a of the inorganic particle 90. Since the exposed portion 91P is formed by removing the first portion 91a, the exposed surface 91x of the exposed portion 91P includes a curved surface. That is, the exposed surface 91x includes a substantial curved surface.

[0049] For example, the ratio R (volume of the first inorganic particle / volume of the virtual sphere) is obtained using FIG. 5E(c). The cross-sectional view in FIG. 5E and the first surface 22 are perpendicular. The periphery of the first inorganic particle 91 is drawn with a solid line and a dashed line. The first exposed surface 91x is drawn with a dashed line, and the periphery of the portion other than the first exposed surface 91x is drawn with a solid line. A circle (virtual circle) 91M is assumed using the plan view of the first inorganic particle 91 in FIG. 5E(c). The circumference of the virtual circle 91M is drawn with a dotted line and a solid line. The portion shown with the dotted line is the portion predicted from the first inorganic particle 91. The shape of the first inorganic particle 91 is a spherical indentation. Since the origin of the shape of the first inorganic particle 91 is a sphere, the virtual circle is relatively easily predicted. The area of ​​the first inorganic particle 91 in FIG. 5E(c) is obtained. The area of ​​the virtual circle in FIG. 5E(c) is obtained. The ratio between the two (area of ​​the first inorganic particles 91 / area of ​​the virtual circle 91M) can represent the ratio R. For example, the ratio R is 0.95. The first exposed surface 91x in FIG. 5E(c) is covered with a conductive layer.

[0050] The inner wall surface 27b after the laser beam irradiation and the first surface 22b after the cleaning are processed simultaneously. Alternatively, the inner wall surface 27b after the laser beam irradiation and the first surface 22b after the cleaning are processed separately. When processed separately, both are processed by the same method. Alternatively, both are processed by different methods.

[0051] When inner wall surface 27b is processed after irradiation with laser light, inner wall surface 27b is hardly roughened. Inner wall surface 27 has almost no unevenness. Inner wall surface 27 is formed smoothly. Surface 80a of resin 80 forming inner wall surface 27 is formed smoothly. Surface 80a of resin 80 has almost no unevenness. The arithmetic mean roughness (Ra) of surface 80a of resin 80 is 0.2 μm or less. The magnitude of unevenness is controlled by controlling the conditions for processing inner wall surface 27b after irradiation with laser light.

[0052] When the cleaned first surface 22b is processed, the first surface 22 is hardly roughened. The first surface 22 has almost no unevenness. The first surface 22 is formed smoothly. The upper surface 80R of the resin 80 forming the first surface 22 is formed smoothly. The upper surface 80R of the resin 80 has almost no unevenness. The arithmetic mean roughness (Ra) of the upper surface 80R of the resin 80 is 0.2 μm or less. The magnitude of the unevenness is controlled by controlling the conditions for processing the cleaned first surface 22b.

[0053] The embodiment can clean the inside of the opening 26. The cleaning of the inside of the opening 26 is performed by plasma. That is, the cleaning is performed by a dry process. The cleaning includes a desmear process. If processing the inner wall surface 27b after the laser light irradiation includes cleaning the inside of the opening 26, the embodiment can omit cleaning the inside of the opening 26. If processing the first surface 22b after cleaning includes cleaning the inside of the opening 26, the embodiment can omit cleaning the inside of the opening 26. The embodiment can omit the desmear process.

[0054] As shown in FIG. 5F, a seed layer 30a is formed on the first surface 22 of the resin insulating layer 20. The seed layer 30a is formed by sputtering. The seed layer 30a is formed by a dry process. The first layer 31a is formed on the first surface 22 by sputtering. At the same time, the first layer 31a is formed on the inner wall surface 27 exposed from the opening 26 and on the pad 14 by sputtering. Almost no recesses are formed on the first surface 22. Therefore, the first layer 31a on the first surface 22 is formed almost flat. Then, the second layer 31b is formed on the first layer 31a by sputtering. The second layer 31b is formed almost flat. The first layer 31a and the second layer 31b are formed in a vacuum. The seed layer 30a is also formed on the upper surface of the pad 14 exposed from the opening 26 and on the inner wall surface 27 of the opening 26. The first layer 31a is formed of an alloy containing copper and aluminum. Aluminum has high ductility and high malleability. Therefore, the adhesive force between the resin insulating layer 20 and the first layer 31a is high. Even if the resin insulating layer 20 expands and contracts due to heat cycles, it is considered that the seed layer 30a containing aluminum can follow the expansion and contraction. Even if the first surface 22 of the resin insulating layer 20 is smooth, the seed layer 30a is unlikely to peel off from the resin insulating layer 20. It is considered that aluminum is easily oxidized. If the third inorganic particles 93 are inorganic particles 90 containing oxygen (oxygen element), it is considered that the first layer 31a formed on the inner wall surface 27 adheres to the third inorganic particles 93 via the oxygen in the inorganic particles 90 forming the inner wall surface 27. The first layer 31a and the inner wall surface 27 are strongly bonded. In the embodiment, the adhesive force between the inner wall surface 27 and the first layer 31a can be increased. The seed layer 30a is unlikely to peel off from the inner wall surface 27. It is preferable that the third inorganic particles 93 forming the inner wall surface 27 contain oxygen element. When the first inorganic particles 91 are inorganic particles 90 containing oxygen (oxygen element), it is considered that the first layer 31a formed on the first surface 22 adheres to the first inorganic particles 91 via the oxygen in the inorganic particles 90 forming the first surface 22. The first layer 31a and the first surface 22 are strongly bonded. In the embodiment, the adhesion between the first surface 22 and the first layer 31a can be increased. The seed layer 30a is difficult to peel off from the first surface 22. The first inorganic particles 91 forming the first surface 22 preferably contain oxygen element. The first layer 31a can further contain silicon.In this case, silicon is the specific metal, and the first layer 31a is formed of an alloy containing copper, aluminum, and silicon. When the inorganic particles 90 are glass particles, the first layer 31a and the first inorganic particles 91 both contain silicon. It is believed that the two are strongly bonded via silicon. It is believed that the embodiment can further increase the adhesive force between the first layer 31a and the first surface 22. The first layer 31a and the third inorganic particles 93 both contain silicon. It is believed that the two are strongly bonded via silicon. It is believed that the embodiment can further increase the adhesive force between the first layer 31a and the inner wall surface 27. The second layer 31b is formed of copper.

[0055] The first surface 22 has almost no recesses. The inner wall surface 27 has almost no recesses. The first surface 22 is formed almost smoothly. The inner wall surface 27 is formed almost smoothly. Therefore, even if the thickness of the sputtering film (first layer 31a, second layer 31b) is thin, the embodiment can form a continuous seed layer 30a. As a result, the embodiment can form fine wiring.

[0056] A plating resist is formed on the seed layer 30a. The plating resist has openings for forming the first signal wiring 32, the second signal wiring 34, and the land 36. If the first surface 22 has a recess, air due to the recess is likely to be trapped between the plating resist and the seed layer 30a. However, in the embodiment, the first surface 22 has almost no recess. Therefore, the seed layer 30a on the first surface 22 is formed almost flat. The seed layer 30a has almost no recess. Air is unlikely to remain between the plating resist and the seed layer 30a. The contact area between the plating resist and the seed layer 30a is large. Even if the width of the plating resist for forming the space between the first signal wiring 32 and the second signal wiring 34 is 10 μm or less, the plating resist is unlikely to peel off from the upper surface of the seed layer 30a. Even if the width of the plating resist is 3 μm or more and 8 μm or less, the embodiment can form the plating resist on the seed layer 30a. Even if the width of the plating resist is 6 μm or less, the plating resist is unlikely to peel off from the seed layer 30a.

[0057] An electrolytic plating layer 30b is formed on the seed layer 30a exposed from the plating resist. The electrolytic plating layer 30b is made of copper. The electrolytic plating layer 30b fills the opening 26. The seed layer 30a and the electrolytic plating layer 30b on the first surface 22 form a first signal wiring 32, a second signal wiring 34, and a land 36. The second conductor layer 30 is formed. The seed layer 30a and the electrolytic plating layer 30b in the opening 26 form a via conductor (first via conductor) 40. The via conductor 40 connects the pad 14 and the land 36. The first signal wiring 32 and the second signal wiring 34 form a pair wiring. The first via conductor 40 connects the conductor layer (first conductor layer) 10 and the conductor layer (second conductor layer) 30.

[0058] The plating resist is removed. The seed layer 30a exposed from the electrolytic plating layer 30b is removed. The seed layer 30a is removed by wet etching. The etchant used in the wet etching is an aqueous solution containing hydrogen peroxide and sulfuric acid. The first layer 31a and the second layer 31b are simultaneously removed by wet etching. The second conductor layer 30 and the via conductor 40 are simultaneously formed.

[0059] An adhesive layer 100 is formed on the upper surface and side surface of the second conductor layer 30. The adhesive layer 100 is formed by immersing the intermediate substrate having the second conductor layer 30 and the via conductor 40 in a chemical solution containing a nitrogen-based organic compound. The pH of the chemical solution is 7 or less. By immersing the intermediate substrate in the chemical solution, an adhesive layer 100 having a smooth film 102 and a protruding portion 104 is formed on the upper surface and side surface of the second conductor layer 30. Before the intermediate substrate is immersed in the chemical solution, the oxide film on the upper surface and side surface of the second conductor layer 30 is removed. In the modified example, the adhesive layer 100 is formed by applying a chemical solution onto the second conductor layer 30. When the adhesive layer 100 is formed, the intermediate substrate is removed from the chemical solution. The adhesive layer 100 is dried. The upper surface of the adhesive layer 100 before drying may be smooth. In that case, a part of the adhesive layer is coagulated by drying. By coagulation, an adhesive layer 100 including the smooth film 102 and the protruding portion 104 is formed.

[0060] A resin insulating layer (second resin insulating layer) 120 is formed on the second conductor layer 30 covered with the first surface 22 of the first resin insulating layer 20 and the adhesive layer 100 in the same manner as the first resin insulating layer 20. The second resin insulating layer 120 has a first surface 122, a second surface 124 opposite to the first surface 122, and an opening (opening for a via conductor) 126. The second surface 124 of the second resin insulating layer 120 faces the second conductor layer 30. When the opening 126 is formed in the resin insulating layer 120 by the laser light L, the laser light L removes the adhesive layer 100 covering the second conductor layer 30. Alternatively, the adhesive layer 100 is not completely removed by the laser light L. In that case, the adhesive layer 100 at the bottom of the opening 126 is removed by cleaning the inside of the opening 126. The second conductor layer 30 is exposed by the opening 126. A conductor layer (third conductor layer) 130 is formed on first surface 122 of second resin insulating layer 120 in a similar manner to that for second conductor layer 30. A via conductor (second via conductor) 140 connecting second conductor layer 30 and third conductor layer 130 is formed in opening (second opening) 126 in a similar manner to that for first via conductor 40. A printed wiring board 2 of the embodiment is obtained.

[0061] Each resin insulation layer is formed of resin 80 and inorganic particles 90. The resin forming each resin insulation layer is the same as the resin 80 forming the first resin insulation layer 20. The inorganic particles forming each resin insulation layer are the same as the inorganic particles 90 forming the first resin insulation layer 20. Each resin insulation layer includes first inorganic particles, second inorganic particles, and third inorganic particles, and the particles in each resin insulation layer are the same as the particles in the first resin insulation layer 20. Each resin insulation layer has a first surface, and the first surface of each resin insulation layer is the same as the first surface 22 of the first resin insulation layer 20. Each resin insulation layer has an opening (opening for via conductor), and the opening penetrating each resin insulation layer is the same as the opening 26 penetrating the first resin insulation layer. The inner wall surface of the opening penetrating each resin insulation layer is the same as the inner wall surface 27 of the opening 26 penetrating the first resin insulation layer 20.

[0062] Each conductor layer is formed of a seed layer and an electrolytic plating layer on the seed layer. The seed layer forming each conductor layer and the seed layer 30a forming the second conductor layer 30 are similar. The first layer forming each conductor layer and the first layer 31a forming the second conductor layer 30 are similar. The second layer forming each conductor layer and the second layer 31b forming the second conductor layer 30 are similar. The electrolytic plating layer forming each conductor layer and the electrolytic plating layer 30b forming the second conductor layer 30 are similar.

[0063] Each via conductor is formed of a seed layer and an electrolytic plating layer on the seed layer. The seed layer forming each via conductor and the seed layer 30a forming the first via conductor 40 are similar. The first layer forming each via conductor and the first layer 31a forming the first via conductor 40 are similar. The second layer forming each via conductor and the second layer 31b forming the first via conductor 40 are similar. The electrolytic plating layer forming each via conductor and the electrolytic plating layer 30b forming the first via conductor 40 are similar.

[0064] In the printed wiring board 2 of the embodiment, even if the thickness of the sputtering film is thin, the embodiment can form a continuous seed layer 30a. The inner wall surface 27 of the opening 26 is formed by the flat portion 93a of the third inorganic particles 93 and the resin 80. The flat portion 93a and the surface 80a of the resin 80 forming the inner wall surface 27 form a common surface. The inner wall surface 27 is formed smoothly. Therefore, the seed layer 30a of a uniform thickness is formed on the inner wall surface 27 of the opening 26. The seed layer 30a is formed thin. The first surface 22 is formed by the exposed portion 91P of the first inorganic particles 91 and the upper surface 80R of the resin 80. The exposed surface 91x and the upper surface 80R of the resin 80 form a common surface. The first surface 22 is formed smoothly. Therefore, the seed layer 30a of a uniform thickness is formed on the first surface 22. The seed layer 30a is formed thin. When the seed layer 30a is removed, the amount of etching is small. Therefore, the amount of etching of the electrolytic plating layer 30b is small. The second conductor layer 30 having the first signal wiring 32 and the second signal wiring 34 has a width as designed. Fine wiring is formed. A high-quality printed wiring board 2 is provided.

[0065] When the first layer 31a of the seed layer 30a contains aluminum and the third inorganic particles 93 contain oxygen elements, the embodiment can increase the adhesive strength between the first layer 31a and the inner wall surface 27. Even if the diameter of the opening 26 is small, the via conductor 40 is unlikely to peel off from the inner wall surface 27. Therefore, the connection resistance through the via conductor 40 is unlikely to increase. As shown in FIG. 5F, the diameter D of the via conductor 40 (diameter of the opening 26) is measured on the pad 14. The diameter D is 20 μm or more and 50 μm or less. Even if the length of each side of the printed wiring board 2 exceeds 50 mm, the connection resistance through the via conductor 40 is unlikely to increase. Even if the length of each side of the printed wiring board 2 is 100 mm or more, the connection resistance is unlikely to increase for a long period of time. A printed wiring board 2 having high connection reliability is provided.

[0066] In the embodiment, the thickness of the first layer 31a forming the via conductor 40 can be reduced. In the embodiment, the thickness of the second layer 31b forming the via conductor 40 can be reduced. The first layer 31a and the second layer 31b form a seed layer 30a. In the embodiment, the volume of the opening for the via conductor after the seed layer is formed can be increased. The opening for the via conductor after the seed layer is formed may be called the opening after the seed layer is formed. By forming an electrolytic plating layer in the opening after the seed layer is formed, a via conductor consisting of the seed layer and the electrolytic plating layer is formed. Even if the diameter of the opening for the via conductor is small, the electrolytic plating solution easily enters the opening for the via conductor after the seed layer is formed. The electrolytic plating layer forming the via conductor is unlikely to include voids. A low-resistance via conductor is formed. An example of the opening 260 after the seed layer is formed is shown in FIG. 5F. The opening 260 after the seed layer is formed is surrounded by the seed layer. The bottom and side of the opening 260 are in contact with the seed layer.

[0067] In the embodiment, the thickness of the first layer 31a made of an alloy containing aluminum can be reduced. The aluminum content in the signal wiring is small, and the copper content is large. The embodiment can provide a low-resistance signal wiring. The embodiment can provide a low-resistance signal wiring having high adhesion to a resin insulating layer.

[0068] In the printed wiring board 2 of the embodiment, the first surface 22 of the resin insulating layer 20 has almost no recesses. The standard deviation of the relative dielectric constant in the vicinity of the first surface 22 of the resin insulating layer 20 is suppressed from increasing. The relative dielectric constant of the first surface 22 of the resin insulating layer 20 does not vary greatly depending on the location. Even if a plurality of signal wirings are in contact with the first surface 22 of the resin insulating layer 20, the embodiment can reduce the difference in the propagation speed of the electric signal between the signal wirings. Therefore, the printed wiring board 2 of the embodiment can suppress noise. Even if a logic IC is mounted on the printed wiring board 2 of the embodiment, data transmitted by each signal wiring arrives at the logic IC almost simultaneously. The embodiment can suppress malfunction of the logic IC. Even if the length of each signal wiring is 5 mm or more, the embodiment can reduce the difference in propagation speed. Even if the length of each signal wiring is 10 mm or more and 20 mm or less, the embodiment can suppress malfunction of the logic IC. The first surface 122 of the second resin insulating layer 120 is similar to the first surface 22 of the resin insulating layer 20. Therefore, the signal wiring in the third conductor layer 130 has the same effect as the signal wiring in the second conductor layer 30. A high-quality printed wiring board 2 is provided.

[0069] The printed wiring board 2 of the embodiment has an adhesive layer between the conductor layer and the resin insulating layer. The adhesive layer bonds the conductor layer and the resin insulating layer. Therefore, even if the upper surface and side surface of the signal wiring are smooth, the resin insulating layer is unlikely to peel off from the signal wiring. It is preferable not to roughen the upper surface and side surface of the signal wiring. The adhesive layer 100 is formed of a substantially smooth smooth film 102 and a protruding portion 104 protruding from the smooth film 102. The adhesive layer 100 has unevenness formed by the protruding portion 104 and the smooth film 102. The adhesive layer 100 has unevenness formed by a plurality of protrusions 106. Therefore, the second conductor layer 30 and the second resin insulating layer 120 are sufficiently adhered to each other via the adhesive layer 100. A printed wiring board 2 having high quality is provided. For example, even if the length of each side of the printed wiring board 2 is 50 mm or more, the second resin insulating layer 120 is unlikely to peel off from the second conductor layer 30. Even if the length of each side of the printed wiring board 2 is 100 mm or more, cracks caused by the adhesive layer 100 are unlikely to occur in the second resin insulating layer 120. Even if the second conductor layer 30 includes a conductor circuit having a width of 5 μm or less, the second resin insulating layer 120 is unlikely to peel off from the second conductor layer 30. Even if the second conductor layer 30 includes a conductor circuit having a width of 3 μm or less, cracks caused by the adhesive layer 100 are unlikely to occur in the second resin insulating layer 120.

[0070] When the first layer contains silicon as the specific metal and the inorganic particles are glass particles, the first layer and third inorganic particles 93 on the inner wall surface contain silicon. The first layer and first inorganic particles 91 on the first surface contain silicon. It is believed that the two are strongly bonded via silicon. The seed layer made of an alloy containing copper, aluminum, and silicon is difficult to peel off from the inner wall surface. The seed layer is difficult to peel off from the first surface. The seed layer is difficult to peel off from the resin insulating layer.

[0071] It is believed that when the first layer contains aluminum and the inorganic particles (first inorganic particles 91, second inorganic particles 92, third inorganic particles 93) 90 contain oxygen, the first layer and the inorganic particles (inorganic particles containing oxygen, such as glass particles) 90 are strongly bonded. When the first layer contains aluminum and the inorganic particles 90 contain oxygen, the first layer may be formed of copper, aluminum, and impurities.

[0072] [Example 1 of the embodiment] In another embodiment, the specific metal is selected from titanium, nickel, chromium, tin, and calcium.

[0073] [Another embodiment 2] In another embodiment, the first layer 11a, 31a of the seed layer 10a, 30a is formed of copper and a second element. The second element is selected from silicon, aluminum, titanium, nickel, chromium, carbon, oxygen, tin, and calcium. The first layer 11a, 31a is formed of an alloy containing copper. The second layer 11b, 31b is formed of copper. The amount of copper forming the second layer 11b, 31b is 99.9 at% or more. The amount of copper is preferably 99.95 at% or more.

[0074] [Modifications of the embodiment] FIG. 6 shows a modified example of the embodiment. As shown in FIG. 6, a printed wiring board 502 of the modified example has a build-up layer 500 on an insulating layer 4. The build-up layer 500 has a plurality of conductor layers and a plurality of resin insulating layers. The conductor layers and the resin insulating layers are alternately laminated. The build-up layer 500 has five conductor layers and four resin insulating layers. The five conductor layers include a first conductor layer 10, a second conductor layer 30, a third conductor layer 130, a fourth conductor layer 230, and a fifth conductor layer 330. The first conductor layer 10, the second conductor layer 30, and the third conductor layer 130 are the same as those in the embodiment. The fourth conductor layer 230 and the fifth conductor layer 330 have a common configuration (seed layer and electrolytic plating layer) with the second conductor layer 30. The fourth conductor layer 230 and the fifth conductor layer 330 are formed by the same method as the second conductor layer 30.

[0075] The four resin insulating layers include a first resin insulating layer 20, a second resin insulating layer 120, a third resin insulating layer 220, and a fourth resin insulating layer 320. The first resin insulating layer 20 and the second resin insulating layer 120 are the same as those in the embodiment. The third resin insulating layer 220 and the fourth resin insulating layer 320 have a common configuration (resin and inorganic particles) with the first resin insulating layer 20. The first resin insulating layer 20, the second resin insulating layer 120, the third resin insulating layer 220, and the fourth resin insulating layer 320 are formed in the same manner as the resin insulating layer 20 in the embodiment. The first resin insulating layer 20, the second resin insulating layer 120, the third resin insulating layer 220, and the fourth resin insulating layer 320 have openings 26, 126, 226, and 326.

[0076] The build-up layer 500 has four via conductors 40, 140, 240, and 340. The via conductor 40 is formed in the opening 26 and connects the first conductor layer 10 and the second conductor layer 30. The via conductor 140 is formed in the opening 126 and connects the second conductor layer 30 and the third conductor layer 130. The via conductor 240 is formed in the opening 226 and connects the third conductor layer 130 and the fourth conductor layer 230. The via conductor 240 is formed in the opening 226 and connects the third conductor layer 130 and the fourth conductor layer 230. The via conductor 340 is formed in the opening 326 and connects the fourth conductor layer 230 and the fifth conductor layer 330. The openings (openings for via conductors) 26, 126, 226, 326 formed in the resin insulation layers 20, 120, 220, 320 are similar, and the openings (openings for via conductors) 26, 126, 226, 326 have similar inner wall surfaces. The three via conductors 140, 240, 340 are stacked directly above the via conductor 40. The four via conductors 40, 140, 240, 340 form a stacked via.

[0077] The modified printed wiring board 502 includes five conductor layers 10, 30, 130, 230, 330, and a stack via formed of four via conductors 40, 140, 240, 340. As the printed wiring board 502 is used, a large stress is applied to the connection portion between the lowest via conductor 40 and the first conductor layer 10 such as the pad 14. However, in the modified example, the connection reliability between the via conductor 40 and the first conductor layer 10 is high. The connection resistance through the via conductor 40 is unlikely to increase.

[0078] [Another example of modification] The build-up layer 500 has five or more conductor layers. The build-up layer 500 preferably has ten or more conductor layers. The number of conductor layers is 20 or less.

[0079] Each cross-sectional view is obtained by cutting printed wiring board 2 along a plane perpendicular to first surface 22. When the cross-sectional view includes a conductor circuit, the side surface of the conductor circuit is perpendicular to the cross-sectional view.

[0080] In this specification, the term "plane" is used for the shape of the inner wall surface 27, the shape of the flat portion 93a, and the shape of the third inorganic particle 93. The meaning of the plane used for these is shown in Fig. 1 and Fig. 3. That is, in Fig. 1 and Fig. 3, the inner wall surface 27 is drawn almost straight. The shape of the inner wall surface 27 in Fig. 1 and Fig. 3 is almost straight. In this specification, the plane includes a substantially straight line in a cross section. As shown in the cross section of the third inorganic particle 93 in Fig. 1 and Fig. 3, in a cross section, cutting with a plane includes cutting with a straight line. In this specification, the plane does not mean a perfect plane but includes a substantially flat plane. A substantially flat plane may include small irregularities. [Explanation of symbols]

[0081] 2: Printed wiring board 4: Insulating layer 10: First conductor layer 20: Resin insulation layer 22: 1st page 24:Second side 26 :Aperture 27: Inner wall surface 30: Second conductor layer 30a: seed layer 31a: 1st layer 31b: 2nd layer 40: Via conductor 80: Resin 90: Inorganic particles 91: 1st inorganic particle 92:Second inorganic particle 93:Third inorganic particle

Claims

1. A first conductor layer; a resin insulating layer having a first surface, a second surface opposite to the first surface, and an opening extending from the first surface to the second surface, the resin insulating layer being laminated on the first conductor layer such that the second surface faces the first conductor layer; a second conductor layer formed on the first surface of the resin insulating layer; a via conductor formed in the opening and connecting the first conductor layer and the second conductor layer, The resin insulation layer includes resin and inorganic particles, the inorganic particles including first inorganic particles forming the first surface and second inorganic particles embedded in the resin, the first inorganic particles having substantially flat exposed portions, the resin having an upper surface forming the first surface, and the first surface being formed by the upper surface of the resin and the exposed portions of the first inorganic particles.

2. 2. The printed wiring board according to claim 1, wherein the second inorganic particles have a spherical shape, and the first inorganic particles are formed from the second inorganic particles.

3. A printed wiring board according to claim 2, wherein the ratio of the volume of the first inorganic particles to the volume of a sphere assumed from the first inorganic particles (volume of the first inorganic particles / volume of a sphere assumed from the first inorganic particles) is 0.6 or more.

4. 4. The printed wiring board according to claim 3, wherein said ratio is 0.8 or more.

5. 2. The printed wiring board of claim 1, wherein said top surface is substantially flat.

6. 6. The printed wiring board according to claim 5, wherein the arithmetic mean roughness (Ra) of the upper surface is less than 0.08 μm.

7. 2. The printed wiring board according to claim 1, wherein a step is formed between the upper surface and the exposed portion.

8. A printed wiring board according to claim 1, wherein the inorganic particles further include third inorganic particles forming an inner wall surface of the opening, the inner wall surface being formed by the third inorganic particles and the resin, the third inorganic particles having a flat portion, and the flat portion forming the inner wall surface.

9. 9. The printed wiring board according to claim 8, wherein the flat portion and a surface of the resin that forms the inner wall surface form a substantially common surface.

10. 9. The printed wiring board according to claim 8, wherein the second inorganic particles have a spherical shape, and the shape of the third inorganic particles is obtained by cutting the second inorganic particles along a plane.

11. A printed wiring board according to claim 8, wherein forming the opening includes forming the inorganic particles having protruding portions protruding from the resin forming the inner wall surface of the opening, and the third inorganic particles are formed by removing the protruding portions of the inorganic particles.

12. 9. The printed wiring board of claim 8, wherein forming the opening includes forming an inorganic particle having a protruding portion from the second inorganic particle, and the inner wall surface of the opening includes an exposed surface of the third inorganic particle formed by removing the protruding portion.

13. 9. The printed wiring board according to claim 8, wherein the inorganic particles contain oxygen elements.

14. 2. The printed wiring board of claim 1, wherein the second conductor layer is formed of a seed layer consisting of a first layer and a second layer on the first layer, and an electrolytic plating layer on the seed layer, the first layer and the second layer being sputtered films, the first layer being made of an alloy containing copper and aluminum, and the second layer being formed of copper.

15. 15. The printed wiring board of claim 14, wherein the alloy further comprises silicon.

16. 2. The printed wiring board of claim 1, further comprising an adhesive layer formed on the second conductor layer.

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