Display device

Abstract

To provide a method for manufacturing a thin, light-weight and break-proof liquid crystal display device in significantly reduced manufacturing processes at low cost.SOLUTION: Etching of a semiconductor layer and formation of contact holes for connecting pixel electrodes with drain electrodes are performed in the same photolithography process and etching process when forming an element region on a substrate via a release layer. Further, by peeling the element region from the substrate to translocate the element region to a first support having high toughness and sandwiching a liquid crystal element with the first support and a second support having high toughness, a thin, light-weight and break-proof liquid crystal display device can be manufactured in significantly reduced manufacturing processes at low cost.SELECTED DRAWING: Figure 8

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a thin film transistor and a liquid crystal display device. [Background technology]

[0002] In recent years, there has been a growing need for lower-cost, thinner, and lighter liquid crystal display devices. .

[0003] One way to reduce the cost of LCD devices is to simplify the manufacturing process. One example is abbreviation.

[0004] There are two main types of driving methods for liquid crystal display devices: passive matrix type and active matrix type. In recent years, active matrix type liquid crystal displays have become popular due to their excellent compatibility with high image quality and high speed response. LCD displays have become mainstream.

[0005] In an active matrix liquid crystal display device, a switching element is provided for each pixel. Thin film transistors are mainly used as switching elements. For example, a top gate transistor is used in which a channel forming region is provided below a gate electrode. A bottom-gate transistor in which the channel formation region is provided above the gate electrode. These thin-film transistors include at least five It is generally produced using a photomask.

[0006] In order to manufacture liquid crystal displays at low cost, it is important to reduce the number of photomasks as much as possible. In order to reduce the number of photomasks used, back exposure ( For example, see US Pat. No. 5,999,333. Many of these require special equipment and are difficult to use. This has led to various problems, including a drop in the yield of liquid crystal displays and thin-film transistors. This can be a cause of deterioration of the electrical characteristics of the capacitor.

[0007] One method for making liquid crystal displays thinner and lighter is to sandwich the liquid crystal material between two electrodes. For this purpose, the substrate is thinned by techniques such as mechanical polishing or chemical polishing.

[0008] The substrates that hold the liquid crystal material are mainly glass substrates, and the substrates are mechanically polished. There is a limit to how thin the substrate can be made by polishing or chemically grinding. This reduces the strength of the LCD, making it more susceptible to damage from external impacts. Therefore, a support having high toughness (e.g., resin) is required as the substrate for sandwiching the liquid crystal material. It is considered ideal to create a liquid crystal display device using a thin film (such as a plastic film or a metal film). do. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Publication No. 05-203987 Summary of the Invention [Problem to be solved by the invention]

[0010] The present invention has been made under such technical background. This allows the use of fewer photomasks than before without using complex techniques or special equipment. Another object of the present invention is to provide a liquid crystal display device that is thin, lightweight, and not easily broken. It is an object of the present invention to provide a method for producing the above-mentioned. [Means for solving the problem]

[0011] That is, in one embodiment of the present invention, a separation layer is formed over a substrate, and a first conductive layer is formed over the separation layer. Then, a first resist mask is formed over the first conductive layer, and a second conductive layer is formed using the first resist mask. The conductive layer in step 1 is partially removed to form a gate electrode, and a gate insulating layer is formed on the gate electrode. forming a first insulating layer, forming a semiconductor layer on the first insulating layer, and forming a second conductive layer on the semiconductor layer forming a second resist mask on the second conductive layer; and The second conductive layer is then partially removed to form a source electrode and a drain electrode. A transistor having a gate electrode, a source electrode, and a drain electrode is formed. A second insulating layer is formed to cover the drain electrode and the semiconductor layer, and serves as a protective insulating layer. A third resist mask is formed on the insulating layer, and a drain electrode is formed using the third resist mask. A portion of the second insulating layer overlapping the first insulating layer is selectively removed to form a first opening, and at the same time, A portion of the second insulating layer that does not overlap with the source electrode and the drain electrode, a portion of the semiconductor layer, and the first A part of the first insulating layer is removed to form a second opening, and the first opening, the second opening, and A third conductive layer is formed so as to cover the second insulating layer, and a fourth resist mask is formed on the third conductive layer. A fourth resist mask is formed, and the third conductive layer is partially removed to form a pixel electrode. The present invention relates to a method for manufacturing a liquid crystal display device, and

[0012] According to the above aspect of the present invention, a first opening portion that functions as a contact hole is formed. By simultaneously performing the etching process of the semiconductor layer, the number of photomasks used is reduced compared to conventional methods. The thin film transistor can be fabricated without any defects, and the layer containing the thin film transistor can be peeled off from the substrate. It is possible.

[0013] In one embodiment of the present invention, a base layer is formed over the substrate in contact with the peeling layer. This is a method for manufacturing a liquid crystal display device.

[0014] According to the above aspect of the present invention, the diffusion of impurity elements from the substrate can be suppressed. It is possible to suppress changes in the characteristics of thin-film transistors caused by the diffusion of impurity elements into the semiconductor layer. .

[0015] In one embodiment of the present invention, a side surface of the semiconductor layer (a side surface of the semiconductor end portion) is covered with a pixel electrode. The present invention relates to a method for manufacturing a liquid crystal display device.

[0016] According to the above aspect of the present invention, it is possible to suppress the intrusion of impurities from the outside. This makes it possible to suppress changes in the characteristics of the thin film transistor caused by the infiltration of impurities from the substrate.

[0017] Another embodiment of the present invention is a liquid crystal display device in which a semiconductor layer contains an oxide semiconductor. This is a method for producing the above.

[0018] According to the above embodiment of the present invention, the power consumption is reduced by using an oxide semiconductor for the semiconductor layer. This makes it possible to realize a highly reliable liquid crystal display device.

[0019] Another embodiment of the present invention is a liquid crystal display device in which heat treatment is performed on an oxide semiconductor. This is a method for producing the above.

[0020] According to one aspect of the present invention, moisture or hydrogen, which serves as an electron donor (donor) for the semiconductor layer, Therefore, the off-state current of the transistor can be reduced. Cut.

[0021] In addition, oxide semiconductors with reduced impurities such as moisture and hydrogen, which act as electron donors, are In the purified OS, secondary ion mass spectrometry (SIMS) was used. The hydrogen concentration measured by hydrogen ion mass spectroscopy was 5× 10 19 / cm 3 Less than or equal to 5×10 18 / cm 3 Less than or equal to 5×10 17 / cm 3 Less than 1×10, more preferably 16 / cm 3 It is desirable that the following: The band gap of the oxide semiconductor is preferably 2 eV or more, more preferably 2.5 eV or more. It is preferable that the energy is 3 eV or more.

[0022] Here, we will discuss the SIMS analysis of the hydrogen concentration in an oxide semiconductor. In principle, it is difficult to obtain accurate data near the sample surface or near the interface between layers of different materials. It is known that it is difficult to measure the hydrogen concentration in the film. When calculating hydrogen concentration, the average value in the region where there is no extreme fluctuation and the value is almost constant is used as the hydrogen concentration. In addition, when the thickness of the film to be measured is small, the water concentration in the adjacent film is In some cases, due to the influence of the elements, it may be difficult to find a region where a nearly constant value is obtained. The maximum or minimum value of the hydrogen concentration is adopted as the hydrogen concentration in the film. If there is no peak indicating the minimum value or a valley indicating the minimum value, the value at the inflection point is taken as the hydrogen concentration. To hire.

[0023] In one embodiment of the present invention, the first conductive layer and the second conductive layer are formed of a material containing copper. The present invention relates to a method for manufacturing a liquid crystal display device.

[0024] According to one aspect of the invention, a gate electrode, a source electrode, a drain electrode, or any of these By forming the wiring connected to the electrodes from a material containing copper, the wiring resistance is reduced and the signal Delays can be prevented.

[0025] In addition, one aspect of the present invention is to provide an upper limit of the process temperature after the formation of the first conductive layer and the second conductive layer. The manufacturing method of the liquid crystal display device is characterized in that the heating temperature is 450° C. or lower.

[0026] According to one aspect of the invention, a gate electrode, a source electrode, a drain electrode, or any of these When wiring connected to electrodes is made of a material containing copper, these may be damaged due to thermal factors. The electrodes and wiring will not deform, and the components contained in the material will not be eluted. This makes it highly reliable. A liquid crystal display device can be fabricated.

[0027] In one embodiment of the present invention, the first conductive layer and the second conductive layer are made of a material containing aluminum. The present invention relates to a method for manufacturing a liquid crystal display device, and

[0028] According to one aspect of the invention, the gate electrode, the source electrode, or the drain electrode is The wiring connected to these electrodes is made of a material containing aluminum, so that the wiring resistance is This reduces the resistance and prevents signal delay.

[0029] In addition, one aspect of the present invention is to provide an upper limit of the process temperature after the formation of the first conductive layer and the second conductive layer. The manufacturing method of the liquid crystal display device is characterized in that the temperature is 380° C. or lower.

[0030] According to one aspect of the invention, a gate electrode, a source electrode, a drain electrode, or any of these When wiring connected to electrodes is made of a material containing aluminum, it is possible that thermal factors may cause This prevents the electrodes and wiring from deforming and prevents the components contained therein from eluting. A highly reliable liquid crystal display device can be manufactured.

[0031] In addition, one embodiment of the present invention is a semiconductor device including at least a gate electrode, a first insulating layer, a semiconductor layer, a source electrode, The element region having the drain electrode, the second insulating layer, and the pixel electrode is disposed on the substrate via a release layer. forming a protective layer so as to cover the surface of the element region; The process involves peeling the element region from the substrate and applying a 1.5 [MPa m 1 / 2 ] or more destruction A step of laminating a first support having a toughness value and removing the protective layer from the first support. and a process of applying 1.5 [MPa m 1 / 2 One surface of the second support having a fracture toughness value of at least forming a fourth conductive layer on the element region forming surface of the first support and the fourth conductive layer on the element region forming surface of the second support; and sandwiching a liquid crystal material between the conductive layer-forming surfaces of the liquid crystal material. A method for manufacturing a liquid crystal display device.

[0032] According to one aspect of the invention, the element region provided on the substrate is subjected to a pressure of 1.5 [MPa m 1 / 2 ] The liquid crystal material can be sandwiched between the first support and the second support having a fracture toughness value of at least 100%. The second support for this purpose is also 1.5 [MPa m 1 / 2] or higher fracture toughness value Thus, a liquid crystal display device which is thin, lightweight and not easily broken can be manufactured.

[0033] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This generally refers to semiconductor circuits, memory devices, imaging devices, display devices, electro-optical devices, and electronic equipment. All of these are semiconductor devices.

[0034] In this specification, B is formed on A, or B is formed on A. When it is explicitly stated that A is directly on top of B, it is not limited to this. It is not possible to say that there is a direct contact between A and B. Here, A and B are objects (e.g., devices, elements, circuits, wiring, electrodes, ends, etc.). The term "substrate", as used herein, may be a semiconductor, a film, a layer, or a substrate.

[0035] Thus, for example, it may be explicitly stated that layer B is formed on or above layer A. In this case, layer B is formed directly on top of layer A, and layer B is formed directly on top of layer A. A layer (such as layer C or layer D) is formed, and layer B is formed directly on top of it. The other layers (e.g., layers C and D) may be single layers or , and may be multi-layered.

[0036] In addition, ordinal numbers such as "first," "second," and "third" in this specification may cause confusion of the components. It should be noted that the numbers are added to avoid confusion and are not intended to be limiting.

[0037] In addition, the term "transistor" in this specification refers to a type of semiconductor device that amplifies current or voltage. and switching operation that controls conduction or non-conduction. T(Insulated Gate Field Effect Transistor ) and thin film transistors (TFTs).

[0038] In addition, the functions of the "source" and "drain" of a transistor in this specification may be different. When using transistors, or when the direction of current changes during circuit operation, For this reason, the terms "source" and "drain" are used interchangeably in this specification. The words may be used interchangeably.

[0039] In addition, the terms "electrode" and "wiring" used in this specification do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring." Furthermore, the term "electrode" or "wire" may be used to refer to a plurality of "electrodes" or "wires". " is also included when the two are formed as one unit.

[0040] In this specification, "toughness" is a term that indicates the property of a material to resist destruction, and The tougher a material is, the less likely it is to break down even when subjected to a large load or impact. This refers to the property of preventing damage from progressing from a small scratch that occurs in one area. can be expressed as the fracture toughness value Kc. The fracture toughness value Kc is defined in JIS R160 This can be determined by the test methods defined in Item 7. Effect of the Invention

[0041] According to the present invention, the number of photomasks used can be reduced without using complicated techniques or special equipment. In addition, the liquid crystal display is thin, lightweight, and highly durable. A method for manufacturing a display device can be provided. [Brief description of the drawings]

[0042] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of the present invention. [Diagram 2] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of the present invention. [Diagram 3] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of the present invention. [Diagram 5] 1A to 1C are cross-sectional process views illustrating one embodiment of the present invention. [Figure 6] 1A to 1C are cross-sectional process views illustrating one embodiment of the present invention. [Figure 7] FIG. 1 is a cross-sectional view illustrating one embodiment of the present invention. [Figure 8] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of the present invention. [Figure 9] 1A to 1C are cross-sectional process views illustrating one embodiment of the present invention. [Figure 10] 1A to 1C are cross-sectional process views illustrating one embodiment of the present invention. [Figure 11] 1A to 1C are cross-sectional process views illustrating one embodiment of the present invention. [Figure 12] 1A to 1C are diagrams illustrating examples of usage patterns of electronic devices. [Figure 13] 1A to 1C are diagrams illustrating examples of usage patterns of electronic devices. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0043] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various changes and modifications may be made in the form and details without departing from the spirit and scope of the present invention. It will be easily understood by those skilled in the art that the above-mentioned invention can be obtained by the following embodiments. The present invention should not be construed as being limited to the contents described below. The same reference numerals are used in different drawings to indicate the same parts or parts having similar functions. A repeated explanation thereof will be omitted.

[0044] (Embodiment 1) In this embodiment, an example of a structure of a pixel portion of a liquid crystal display device according to one embodiment of the present invention will be described. This will be explained with reference to FIGS. 1 to 6.

[0045] 3A shows an example of the configuration of a semiconductor device 100 used in a liquid crystal display device. 100 is a pixel region 102 on a substrate 101 and m terminals 105 (m is an integer of 1 or more). and a terminal portion 104 having n terminals 106 (n is an integer of 1 or more). The semiconductor device 100 also has m wirings 2 electrically connected to the terminal portion 103. 12 and n wirings 216 electrically connected to the terminal portion 104. The region 102 is made up of a plurality of pixels 110 arranged in a matrix of m vertical rows by n horizontal columns. A pixel 110(i, j) (i is an integer between 1 and m, and j is an integer between 1 and m) in the i-th row and j-th column n) are electrically connected to the wiring 212-i and the wiring 216-j, respectively. In addition, the wiring 212-i is electrically connected to the terminal 105-i, and the wiring 216-j is electrically connected to the terminal 1 It is electrically connected to 06-j.

[0046] The terminals 103 and 104 are external input terminals, and are connected to an external control circuit and It is connected via a PC (Flexible Printed Circuit) etc. A signal supplied from a control circuit provided in the semiconductor device is input to the semiconductor device through terminals 103 and 104. In FIG. 3A, the terminal portion 103 is provided on the left and right sides of the pixel region 102. The terminal portion 104 is formed on the side of the pixel area, and signals are input from two points. The configuration is shown in which the two filters are formed on the upper and lower outer sides of the region 102, and signals are input from two points. By inputting a signal, the signal supply capability is improved, and the semiconductor device 100 can operate at high speed. In addition, the increase in wiring resistance due to the increase in size and high definition of the semiconductor device 100 can be prevented. The influence of signal delay can be reduced. Also, by providing redundancy to the semiconductor device 100, This makes it possible to improve the reliability of the semiconductor device 100. In (A), the terminal portion 103 and the terminal portion 104 are provided in two places. It is also possible to provide one of each.

[0047] 3C shows a circuit configuration of the pixel 110. The pixel 110 includes a transistor 111. The transistor 111 includes a gate electrode 112 and a capacitor 113. is electrically connected to the wiring 212-i, and is a source electrode or a drain electrode of the transistor 111. One of the electrodes is electrically connected to the wiring 216-j. The other of the source electrode and the drain electrode is connected to one electrode of the liquid crystal element 112 and the capacitance element 11. The other electrode of the liquid crystal element 112 and the capacitor element 3 are electrically connected to each other. The other electrode of 113 is electrically connected to electrode 114. The potential of electrode 114 is 0 It is sufficient to set it to a fixed potential such as V, GND, or a common potential.

[0048] The transistor 111 receives an image signal supplied from a wiring 216-j to the liquid crystal element 112. The wiring 212-i has a function of selecting whether or not to turn on the transistor 111. When a signal is supplied to the wiring 216-j, an image signal is supplied to the wiring 216-j through the transistor 111. The liquid crystal element 112 changes the voltage in response to the supplied image signal (electric potential). The light transmittance is controlled. The capacitor 113 holds a potential supplied to the liquid crystal element 112. The capacitor 113 functions as a storage capacitor (also referred to as a Cs capacitor) for storing the Although it is not necessary to provide the capacitor 113, the transistor 111 can be turned on by providing the capacitor 113. The off-state current (off current) flows between the source and drain electrodes of the liquid crystal element. Fluctuations in the potential applied to the electrode 112 can be suppressed.

[0049] The size of the storage capacitor provided in the liquid crystal display device is determined by the lead of the transistor arranged in the pixel portion. The gate is set to hold charge for a certain period of time, taking into account the gate current, etc. By using a transistor including a highly purified oxide semiconductor for a semiconductor layer formed on the substrate, Therefore, the capacitance of each pixel is set to 1 / 3 or less, preferably 1 / 5 or less, of the liquid crystal capacitance. It is sufficient to provide a storage capacitor having a certain length.

[0050] The semiconductor in which the channel of the transistor 111 is formed may be a single crystal semiconductor, a polycrystalline semiconductor, or A microcrystalline semiconductor, an amorphous semiconductor, or the like can be used. Silicon, germanium, silicon germanium, silicon carbide, or gallium arsenide, etc. Some examples include:

[0051] In addition, an oxide semiconductor may be used as a semiconductor in which a channel of the transistor 111 is formed. The oxide semiconductor may be either single crystal or non-single crystal. In the latter case, it is amorphous. The crystal may be a microcrystal (microcrystal, nanocrystal, etc.) or a polycrystal. Even if the structure contains a crystalline portion in the amorphous state, it is possible to use a non-crystalline portion that does not contain a crystalline portion. The amorphous oxide semiconductor may be used. It is possible to obtain a crystalline oxide semiconductor by sputtering. Conductive films are formed by heating the substrate to a temperature above room temperature during sputtering. In addition, as described in Embodiment 2, the oxide semiconductor can be formed by using a semiconductor having a crystal axis aligned. An oxide semiconductor can also be used.

[0052] Oxide semiconductors have a large energy gap of 3.0 to 3.5 eV or more. When a transistor having the above structure is manufactured under appropriate conditions, the off-state current is For example, at 25°C, 100zA (1×10 -19 A) or less, or 10zA( 1×10 -20 A) or less, even 1zA (1×10 -21 A) It can be as follows: .

[0053] In this manner, an oxide semiconductor is used for the semiconductor layer in which the channel of the transistor 111 is formed. This makes it possible to reduce the current value in the off state (off current value). The retention time of electrical signals such as image signals can be extended without the need for new writing. Signals can be held for a long time, so the frequency of refresh operations can be reduced. In addition, the transistor using an oxide semiconductor for the semiconductor layer The resistor 111 can hold the potential applied to the liquid crystal element without providing a storage capacitor. do.

[0054] In addition, a transistor using an oxide semiconductor for a semiconductor layer in which a channel is formed has a relatively high Since a high field effect mobility can be obtained, high speed driving is possible. By using the above transistor in the pixel portion, a high-quality image can be provided. The transistors can be separately manufactured in the driver circuit section and the pixel section on the same substrate. This allows the number of components in the liquid crystal display device to be reduced.

[0055] Next, a configuration example of the pixel 110 shown in FIG. 3 will be described with reference to FIG. 1. FIG. 1(A) is a top view showing the planar configuration of the pixel 110, and FIG. 1(B) is a top view showing the layered configuration of the pixel 110. It should be noted that the cross-sectional view is taken along the lines A1-A2, B1-B2, and C1-C2 in FIG. The dashed lines correspond to the sections A1-A2, B1-B2, and C1-C2 in FIG. 1(B). do.

[0056] In the transistor 111 described in this embodiment, the drain electrode 206b is U-shaped (C-shaped, The source electrode 206a is surrounded by a U-shaped or horseshoe-shaped source electrode 206a. By doing so, it is possible to ensure a sufficient channel width even if the transistor area is small. This allows the amount of current that flows when the transistor is on (also called on-state current) to be increased. It becomes possible.

[0057] In addition, the drain electrode 206b electrically connected to the pixel electrode 210 and the gate electrode 202 If the parasitic capacitance between the liquid crystal element and the liquid crystal panel is large, the liquid crystal element is easily affected by feedthrough. The potential supplied to the pixel 112 cannot be accurately maintained, which causes a deterioration in display quality. As shown in FIG. 1, the source electrode 206a is U-shaped and surrounds the drain electrode 206b. By this, a sufficient channel width is ensured, and the distance between the drain electrode 206b and the gate electrode 202 is increased. This reduces the parasitic capacitance that occurs in the liquid crystal display device, thereby improving the display quality. It is possible.

[0058] The cross section A1-A2 in FIG. 1B shows a layered structure of the transistor 111. The transistor 111 is a bottom-gate transistor. 1 shows the laminated structure of the capacitance element 113. Also, the cross section C1-C2 shows the capacitance wiring 203 and The laminated structure at the wiring intersection of wiring 216 is shown.

[0059] In the cross section A1-A2, a release layer 250 is formed on a substrate 200, and a lower layer is formed on the release layer 250. A base layer 201 is formed, and a gate electrode 202 is formed on the base layer 201. A first insulating layer 204 and a semiconductor layer 205 are formed on the gate electrode 202. A source electrode 206a and a drain electrode 206b are formed on the conductor layer 205. A second electrode is disposed on the source electrode 206a and the drain electrode 206b and in contact with a part of the semiconductor layer 205. A pixel electrode 210 is formed on the second insulating layer 207. , the drain electrode 206 is connected to the second insulating layer 207 via a contact hole 208 formed in the second insulating layer 207. b is electrically connected to

[0060] In addition, the first insulating layer 204, the semiconductor layer 205, and a part of the second insulating layer 207 are removed. The pixel electrode 210 is connected to the first insulating layer 204, the semiconductor layer 205, and the second insulating layer 207. In this embodiment, the semiconductor layer 205 has a very low carrier concentration. The oxide semiconductor (which can be called an i-type (intrinsic) or substantially i-type oxide semiconductor) ) is used. Since the oxide semiconductor can be regarded as an insulator in the off state, Even if the pixel electrode 210 and the side surface of the end of the semiconductor layer 205 come into contact with each other, problems such as leakage current do not occur. .

[0061] In addition, the side surface of the end of the semiconductor layer 205 is covered with the pixel electrode 210, so that the impurities such as hydrogen, water, compounds with hydroxyl groups, hydrides, alkali metals (e.g. , sodium, lithium, potassium, etc.) or alkaline earth metal reaches the semiconductor layer 205. This can prevent the electrical characteristics and reliability of the transistor from being adversely affected.

[0062] In the cross section B1-B2, a release layer 250 is formed on a substrate 200, and a lower layer is formed on the release layer 250. A base layer 201 is formed, and a capacitance wiring 203 is formed on the base layer 201. A first insulating layer 204 and a semiconductor layer 205 are formed on the wiring 203. A second insulating layer 207 is formed. A pixel electrode 210 is formed on the second insulating layer 207. has been formed.

[0063] The capacitance wiring 203 and the pixel electrode 210 are connected to the first insulating layer 204, the semiconductor layer 205, and the second insulating layer 206. The overlapping portion with the layer 207 sandwiched therebetween functions as a capacitor element 113. The second insulating layer 207, the semiconductor layer 204, and the second insulating layer 207 function as a dielectric layer. By forming a multi-layer structure of the dielectric layer formed between the pixel electrode 210 and the pixel electrode 210, Even if a pinhole occurs in the capacitance element 113, the pinhole is covered by another dielectric layer. In addition, the relative dielectric constant of the oxide semiconductor is generally lower than that of an insulating film. Since the thickness of the oxide layer 205 is larger than that of silicon oxide or silicon nitride, which are commonly used, By using a solid semiconductor, the capacitance value of the capacitor 113 can be increased.

[0064] In the cross section C1-C2, a release layer 250 is formed on a substrate 200, and a lower layer is formed on the release layer 250. A base layer 201 is formed, and a capacitance wiring 203 is formed on the base layer 201. A first insulating layer 204 and a semiconductor layer 205 are formed on the wiring 203. A wiring 216 is formed on the layer 205, and a second insulating layer 207 and a pixel electrode 21 are formed on the wiring 216. 0 is formed.

[0065] In FIG. 1B, the layers formed above the release layer 250 are hereinafter referred to as the element region 2. The element region 260 includes at least a gate electrode 202, a first insulating layer 204, A semiconductor layer 205, a source electrode 206a, a drain electrode 206b, a second insulating layer 207, a pixel The element electrode 210 may also include a base layer 201 and wiring 216. The semiconductor device may have wiring 212, electrodes 221, electrodes 222, and the like.

[0066] Next, a pixel configuration having a different capacitance element configuration from the pixel 110 shown in FIG. 1 will be described with reference to FIG. FIG. 2A is a top view showing the planar configuration of the pixel 120, and FIG. 2A is a cross-sectional view showing a stacked structure of the pixel 120. The dashed lines C1-C2 and C1-B2 indicate the cross sections A1-A2 and B1-B2 in FIG. , which corresponds to section C1-C2.

[0067] In the cross section B1-B2, a release layer 250 is formed on a substrate 200, and a lower layer is formed on the release layer 250. A base layer 201 is formed, and a capacitance wiring 203 is formed on the base layer 201. A first insulating layer 204 and a semiconductor layer 205 are formed on the wiring 203. An electrode 217 is formed. A second insulating layer 207 is formed on the electrode 217. The pixel electrode 210 is formed on the second insulating layer 207. The layer 207 is electrically connected to the electrode 217 through a contact hole 218 formed therein. is.

[0068] The capacitance wiring 203 and the electrode 217 are overlapped with the first insulating layer 204 and the semiconductor layer 205 sandwiched therebetween. The part where the capacitor is provided functions as a capacitor 123. The capacitor 123 has a In comparison, the thickness of the dielectric layer formed between the capacitance wiring 203 and the electrode 217 is set to be 200 mm. Therefore, the capacitance of the capacitor 123 can be reduced by the capacitance shown in FIG. It can be larger than element 113 .

[0069] In FIG. 2B, the layers formed above the release layer 250 will be referred to as the element region 2. The element region 260 includes at least a gate electrode 202, a first insulating layer 204, A semiconductor layer 205, a source electrode 206a, a drain electrode 206b, a second insulating layer 207, a pixel The element region 260 may include a base layer 201 and a wiring 216. Furthermore, the element region 260 includes wiring 212, electrodes 221, and electrodes 222, which will be described later. Good too.

[0070] Next, a configuration example of the terminal 105 and the terminal 106 will be described with reference to FIG. 4(A1) and 4(A2) are a top view and a cross-sectional view of the terminal 105, respectively. 4(A2) corresponds to the cross section D1-D2 in FIG. 4(A2). FIG. 4(B1) and FIG. 4(B2) are a top view and a cross-sectional view of the terminal 106, respectively. The dashed line E1-E2 in FIG. 4(B1) corresponds to the cross section E1 in FIG. 4(B2). Equivalent to -E2.

[0071] In the cross section D1-D2, a release layer 250 is formed on a substrate 200, and a lower layer is formed on the release layer 250. A ground layer 201 is formed, and a wiring 212 is formed on the ground layer 201. A first insulating layer 204, a semiconductor layer 205, and a second insulating layer 207 are formed on the semiconductor layer 2. An electrode 221 is formed on the second insulating layer 207, and the electrode 221 is connected to the first insulating layer 204. , through a contact hole 219 formed in the semiconductor layer 205 and the second insulating layer 207. The wiring 212 is electrically connected to the wiring 212 via the wiring 212 .

[0072] In the cross section E1-E2, a release layer 250 is formed on the substrate 200, and a lower layer is formed on the release layer 250. A foundation layer 201 is formed, a first insulating layer 204 is formed on the foundation layer 201, and the first insulating layer A semiconductor layer 205 is formed on the insulating layer 204. In addition, a wiring 216 is formed on the semiconductor layer 205. A second insulating layer 207 is formed on the wiring 216. An electrode 222 is formed, and the electrode 222 is connected to a contact hole formed in the second insulating layer 207. The cable 220 is electrically connected to the wiring 216 .

[0073] Next, a method for manufacturing a pixel portion of the liquid crystal display device described with reference to FIG. 1 will be described with reference to FIGS. 5 and 6. The following description will be given using the cross sections A1-A2, B1-B2, and The cross section C1-C2 is a cross section of one point A1-A2, B1-B2, and C1-C2 in FIG. FIG. 2 is a cross-sectional view of the portion indicated by the dashed line.

[0074] 5 and 6, the laminated structure of the terminal 105 is shown as a cross section D1-D2, and the cross section E The laminated structure of the terminal 106 is indicated as D1-D2 and E1-E2. In this figure, D2 and E2 correspond to the ends of the substrate.

[0075] First, a release layer 250 is formed on a substrate 200 with a thickness of 50 nm to 1000 nm, preferably 100 The thickness of the insulating layer is preferably from 100 nm to 300 nm. do.

[0076] The substrate 200 may be a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a metal substrate, or the like. It should be noted that these substrates are thick enough not to clearly show flexibility. By using this flexible substrate, elements such as transistors can be formed with high precision. The degree to which the characteristics are not clearly expressed is the degree to which the glass used in manufacturing liquid crystal displays is not This means that the elastic modulus of the substrate is approximately equal to or greater than that of the substrate. Aluminoborosilicate glass is used for 200.

[0077] The release layer 250 is formed by a sputtering method, a plasma CVD method, a coating method, a printing method, or the like. , Tungsten (W), Molybdenum (Mo), Titanium (Ti), Tantalum (Ta), Niobium Nb, Nickel (Ni), Cobalt (Co), Zirconium (Zr), Zinc (Zn ), Ruthenium (Ru), Rhodium (Rh), Palladium (Pd), Osmium (Os) , iridium (Ir), silicon (Si), or a material containing the above elements as its main component. A layer made of an alloy material or a compound material mainly composed of the above elements is formed as a single layer or a laminate. do.

[0078] When the release layer 250 has a single layer structure, it is preferably made of tungsten, molybdenum, or tungsten. A layer containing a mixture of tungsten and molybdenum is formed. Alternatively, a layer containing an oxide or oxide of tungsten is formed. A layer containing an oxynitride, a layer containing an oxide or oxynitride of molybdenum, or a layer containing tungsten A layer containing an oxide or oxynitride of a mixture of tungsten and molybdenum is formed. The mixture of tungsten and molybdenum corresponds, for example, to an alloy of tungsten and molybdenum.

[0079] When the release layer 250 has a laminated structure, it is preferable to form a metal layer as the first layer and a metal layer as the second layer. Typically, the first layer is a tungsten layer, a molybdenum layer, or The first layer is a mixture of tungsten and molybdenum, and the second layer is a mixture of tungsten and molybdenum. Oxides, oxynitrides or oxynitrides of molybdenum or mixtures of tungsten and molybdenum The second metal oxide layer is formed by depositing an oxide layer (e.g. For example, a layer of silicon oxide that can be used as an insulating layer is formed on the surface of the metal layer. It may also be applied that an oxide of the metal is formed.

[0080] In addition, the peeling layer 250 may be an amorphous silicon layer containing hydrogen or a layer containing nitrogen, oxygen, hydrogen, etc. ( For example, amorphous silicon films containing hydrogen, hydrogen-containing alloy films, oxygen-containing alloy films, etc.) and organic resins may also be used.

[0081] In this embodiment, a tungsten film having a thickness of 150 nm is used as the peeling layer 250. The tungsten film is in a state where the surface is oxidized (i.e., there is no tungsten on the surface of the tungsten film). This also includes cases where a stainless steel oxide film is formed.

[0082] The peeling layer 250 is used to separate the semiconductor device formed in the layers above the base layer 201 from the substrate 200. The main purpose of this layer is to separate the film, but it also serves the purpose of preventing diffusion of impurity elements from the substrate 200. It also has the function of preventing scattering.

[0083] Next, an insulating layer to be the underlayer 201 is formed on the peeling layer 250 to a thickness of preferably 50 nm to 300 nm. Alternatively, the film is formed to a thickness of 100 nm or more and 200 nm or less.

[0084] The underlayer 201 is made of aluminum nitride, aluminum oxynitride, silicon nitride, silicon oxide, etc. The insulating layer is formed of one or more insulating layers selected from silicon oxide, silicon nitride, and silicon oxynitride. It can be formed by a layer structure, and the diffusion of impurity elements from the substrate 200 and the peeling layer 250 can be prevented. In this specification, silicon nitride oxide has the following composition: The nitrogen content is higher than the oxygen content, and the Rutherford Backscattering Spectroscopy (RBS) and When measured using hydrogen forward scattering (HFS) spectroscopy, the composition range was 5 to 3 oxygen. 0 atomic %, nitrogen 20-55 atomic %, silicon 25-35 atomic %, hydrogen 10-30 atomic % The underlayer 201 is preferably formed by a sputtering method, a CVD method, or the like. A coating method, a printing method, or the like can be appropriately used. When a film containing oxygen such as fluorine is formed, the surface of the peeling layer 250 is oxidized during the film formation to form a metal oxide. This metal oxide thin film is treated as a release layer 250.

[0085] In this embodiment, the base layer 201 is a laminate of silicon nitride and silicon oxide. Specifically, silicon nitride is formed on the release layer 250 to a thickness of 50 nm. Silicon oxide is formed on the underlayer 201 to a thickness of 150 nm. It may be doped with boron (B).

[0086] In addition, by making the underlayer 201 contain halogen elements such as chlorine and fluorine, the substrate 200 The function of preventing the diffusion of impurity elements from the substrate can be further improved. The concentration of halogen elements to be added was obtained by analysis using a SIMS (secondary ion mass spectrometer). At the concentration peak, 1×10 15 / cm 3 More than 1×10 20 / cm 3 Below Good.

[0087] Alternatively, gallium oxide may be used as the base layer 201. The insulating layer may be a laminated structure of gallium oxide and the insulating layer. This makes it possible to suppress the fluctuation in threshold voltage caused by charge-up in the insulating layer.

[0088] Next, a 100 nm thick film is formed on the underlayer 201 by sputtering, vacuum deposition, or plating. The first conductive layer has a thickness of 200 nm to 300 nm, preferably 200 nm to 300 nm. a first resist mask is formed on the first conductive layer; The first conductive layer is partially etched using the etching solution to form a gate electrode 202, a capacitance wiring 203, and a wiring A line 212 is formed.

[0089] The first conductive layer for forming the gate electrode 202, the capacitance wiring 203, and the wiring 212 is made of a molybdenum. Butan (Mo), Titanium (Ti), Tungsten (W), Tantalum (Ta), Aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scandium (Sc), etc. It can be formed in a single layer or multilayer using metal materials or alloy materials that mainly contain these. Alternatively, the conductive metal oxide may be used. Indium (In 2 O 3 ), tin oxide (SnO 2 ), zinc oxide (ZnO), indium oxide Tin oxide (In 2 O 3 - SnO 2 , abbreviated as ITO), indium zinc oxide (I n 2 O 3 -ZnO) or these metal oxide materials containing silicon oxide are used. Furthermore, a conductive composition containing a conductive macromolecule (also called a conductive polymer) can be used. The conductive polymer may be a so-called π-electron conjugated conductive polymer. Molecules such as polyaniline or its derivatives, polypyrrole or or its derivatives, polythiophene or its derivatives, or aniline, pyrrole and thiophene Examples of the copolymer include a copolymer of two or more olefins and a derivative thereof.

[0090] Since the first conductive layer serves as wiring, it is preferable to use low resistance materials such as Al or Cu. By using Al or Cu, it is possible to reduce signal delay and improve image quality. l has low heat resistance and defects occur due to hillocks, whiskers, or migration To prevent migration of Al, it is recommended to add other metals such as Mo, Ti, and W to Al. Metallic materials with higher melting points are layered, or hillock prevention materials such as Nd, Ti, Si, and Cu are used. It is preferable to use an alloy of the insulating element and Al. In addition, the first conductive layer may be made of a material containing Al. When using it, it is preferable to set the maximum process temperature in the subsequent steps to 380° C. or less. The temperature is preferably 350° C. or lower.

[0091] In addition, when Cu is used for the first conductive layer, defects due to migration and diffusion of Cu elements occur. To prevent this, it is recommended to layer metals with higher melting points than Cu, such as Mo, Ti, and W. It is also preferable that, when a material containing Cu is used for the first conductive layer, It is preferable that the maximum process temperature is 450° C. or less.

[0092] In this embodiment, a Ti layer having a thickness of 5 nm is formed on the base layer 201 as the first conductive layer. A Cu layer having a thickness of 250 nm is formed on the Ti layer. Then, a first resist is formed on the first conductive layer. A first resist mask is formed, and the first conductive layer is partially etched using the first resist mask. Then, the gate electrode 202, the capacitance wiring 203, and the wiring 212 are formed (see FIG. 5(A)). ).

[0093] The first resist mask formed on the first conductive layer may be formed by an ink-jet method. In the inkjet method, no photomask is used, which further reduces the manufacturing cost. The first resist mask is peeled off after the etching process. The explanation of the peeling process will be omitted.

[0094] The etching process for the first conductive layer may be dry etching or wet etching. The etching gas used in the dry etching may be , chlorine-containing gas (chlorine-based gas, e.g., chlorine (Cl 2 ), boron trichloride (BCl 3 ), tetrasalt Silicon oxide (SiCl 4 ), carbon tetrachloride (CCl 4 ) etc.) can be used.

[0095] As dry etching, parallel plate type RIE (Reactive Ion Etch) ng) method and ICP (Inductively Coupled Plasma) In addition, the underlayer 201 is formed from the substrate 200. In order to prevent the diffusion of impurity elements from the above-mentioned etching, the underlayer 2 It is preferable to adjust the etching conditions so that 01 is not etched as much as possible. stomach.

[0096] Next, a gate insulating layer is formed on the gate electrode 202, the capacitance wiring 203, and the wiring 212. The first insulating layer 204 is formed to a thickness of 50 nm to 800 nm, preferably 100 nm to 600 nm. The first insulating layer 204 is formed to a thickness of 100 nm or less. Silicon oxide nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride Aluminum, aluminum oxide nitride, tantalum oxide, gallium oxide, yttrium oxide, Hafnium oxide, hafnium silicate (HfSi x O y (x>0, y>0)), nitrogen Use hafnium silicate with nitrogen introduced, hafnium aluminate with nitrogen introduced, etc. The film can be formed by a plasma CVD method, a sputtering method, or the like. The first insulating layer 204 is not limited to a single layer and may be a laminate of different layers. For example, the gate insulating layer A may be Then, a silicon nitride layer (SiN y (y>0)) and form a gate insulator On top of layer A, a silicon oxide layer (SiO x (x>0)) is stacked, A single insulating layer 204 may be used.

[0097] The first insulating layer 204 can be formed by a sputtering method, a plasma CVD method, or a microwave ( For example, a high-density plasma CVD method using a frequency of 2.45 GHz is used. It is possible.

[0098] In this embodiment, a laminate of silicon nitride and silicon oxide is used as the first insulating layer 204. Specifically, silicon nitride is formed on the gate electrode 202 to a thickness of 50 nm. Silicon oxide is formed on the silicon nitride to a thickness of 100 nm.

[0099] The first insulating layer 204 also functions as a protective layer. By covering the gate electrode 202 with an insulating layer containing silicon nitride, Cu diffusion from the gate electrode 202 is suppressed. It can be prevented.

[0100] In addition, when an oxide semiconductor is used for a semiconductor layer to be formed in a later step, the first insulating layer 204 is In this case, an insulating material containing the same kind of component as the oxide semiconductor may be used. In the case where the oxide semiconductor is a stack of different layers, the layer in contact with the oxide semiconductor is made of a material having the same composition as the oxide semiconductor. Such a material has good compatibility with an oxide semiconductor, and By using the insulating layer 204 of the first embodiment, the state of the interface with the oxide semiconductor can be kept good. Here, the term "components of the same kind as oxide semiconductors" refers to those that are different from the constituent elements of oxide semiconductors. For example, the oxide semiconductor is In-Ga-Zn When the material is made of oxide semiconductor materials, the insulating material containing the same components is oxide. Gallium, etc.

[0101] In addition, when the first insulating layer 204 has a stacked structure, the insulating layer 204 may include a material containing the same component as the oxide semiconductor. The insulating film may have a laminated structure including a film made of an insulating material and a film containing a material different from the component material of the insulating film. .

[0102] Note that the sputtering gas used in forming the first insulating layer 204 contains hydrogen, water, and a hydroxyl group. It is preferable to use a high-purity gas from which impurities such as compounds or hydrides have been removed. As an example of a high-purity gas from which impurities have been removed, the purity of the gas introduced into the sputtering device is , 6N (99.9999%) or more, preferably 7N (99.99999%) or more (i.e. In other words, it is desirable that the impurity concentration be 1 ppm or less, and preferably 0.1 ppm or less.

[0103] Next, the semiconductor layer 205 is formed on the first insulating layer 204 .

[0104] The oxide semiconductor used contains at least indium (In) or zinc (Zn). It is preferable that the oxide semiconductor contains In and Zn. As a stabilizer to reduce the variation in the electrical characteristics of the transistors added to them, In addition, it is preferable to use gallium (Ga) as a stabilizer. It is preferable that the stabilizer contains hafnium (Hf). It is preferable that the stabilizer contains aluminum (Al). stomach.

[0105] Other stabilizers include the lanthanides lanthanum (La) and cerium ( Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Ho, Erbium, Thulium, Ytterbium, Ru The element may contain one or more of the elements tetraethynyl (Te) and tetraethynyl (Lu).

[0106] For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and oxides of binary metals. In-Zn oxide, Sn-Zn oxide, Al-Zn oxide, Zn-Mg oxide, Oxides, Sn-Mg oxides, In-Mg oxides, In-Ga oxides, ternary metal oxides In-Ga-Zn oxide (also written as IGZO), In-Al-Zn oxide Oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn oxides oxides, Sn-Al-Zn oxides, In-Hf-Zn oxides, In-La-Zn oxides In-Ce-Zn oxides, In-Pr-Zn oxides, In-Nd-Zn oxides , In-Sm-Zn oxide, In-Eu-Zn oxide, In-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, I n-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, In -Lu-Zn ​​oxides, In-Sn-Ga-Zn oxides, which are oxides of quaternary metals, I n-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al- Zn-based oxide, In-Sn-Hf-Zn-based oxide, In-Hf-Al-Zn-based oxide are used. There can be.

[0107] In this case, for example, In-Ga-Zn oxide is a material containing In, Ga, and Zn as main components. The ratio of In, Ga, and Zn does not matter. Metal elements other than a and Zn may be present.

[0108] For example, In:Ga:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3) or In:G In-Ga-Zn system oxide with an atomic ratio of a:Zn=2:2:1 (=2 / 5:2 / 5:1 / 5) Alternatively, In:Sn:Zn=1 :1:1(=1 / 3:1 / 3:1 / 3), In:Sn:Zn=2:1:3(=1 / 3:1 / 6:1 / 2) or In:Sn:Zn=2:1:5(=1 / 4:1 / 8:5 / 8) It is advisable to use an In--Sn--Zn-based oxide having an atomic ratio or an oxide having a composition close to that.

[0109] However, the present invention is not limited to these, and can be applied to any semiconductor characteristics (mobility, threshold, variation, etc.) required. In order to obtain the required semiconductor characteristics, the appropriate composition should be used. Carrier concentration, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic bond length, density It is preferable to make the above appropriate.

[0110] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. Therefore, in the case of In-Ga-Zn oxides, the mobility can be increased by reducing the defect density in the bulk. It can be done.

[0111] For example, the atomic ratio of In, Ga, and Zn is In:Ga:Zn=a:b:c(a+b+ The composition of the oxide with the atomic ratio of In:Ga:Zn=A:B:C (A+B+C = 1) is close to the oxide composition when a, b, and c are (a-A) 2 +(b-B) 2 +(c-C) 2 ≦r 2 The above condition is satisfied, and r can be set to, for example, 0.05. The same is true for other oxides. .

[0112] The oxide semiconductor may be single-crystalline or non-single-crystalline. In the latter case, it may be amorphous or polycrystalline. In addition, even if the structure includes a portion having crystallinity in the amorphous state, the structure may have a crystalline region. It may be non-amorphous.

[0113] Since it is relatively easy to obtain a flat surface for an amorphous oxide semiconductor, The interface scattering of the transistor can be reduced, and a relatively high mobility can be obtained relatively easily. do.

[0114] In addition, in a crystalline oxide semiconductor, defects in the bulk can be further reduced, and the surface By improving the flatness of the oxide semiconductor, it is possible to obtain a mobility equal to or higher than that of an oxide semiconductor in an amorphous state. In order to improve the flatness of the surface, it is preferable to form an oxide semiconductor on a flat surface. Specifically, the average surface roughness (Ra) is 1 nm or less, preferably 0.3 nm or less, and more preferably It is preferable to form the surface on a thickness of 0.1 nm or less.

[0115] In addition, Ra is the center line average roughness defined in JIS B0601 that can be applied to the surface. This is a three-dimensional extension of the method, which is based on the principle of averaging the absolute value of the deviation from the reference surface to the specified surface. This can be expressed as the "value obtained by dividing the total number of bits by the number of bits" and is defined by the following formula:

[0116]

number

[0117] In the above, S 0 is the measurement surface (coordinate (x 1 ,y 1 )(x 1 ,y 2 )(x 2 ,y 1 )(x 2 ,y 2 ) is the rectangular area enclosed by the four points represented by Z 0 teeth It refers to the average height of the measurement surface. Ra is measured by an atomic force microscope (AFM). It can be evaluated using a microscope.

[0118] An example of a crystalline oxide semiconductor is a semiconductor having a c-axis orientation and an ab-plane, a surface, or an interface. The atomic arrangement is triangular or hexagonal when viewed from the c-axis, and the metal atoms are arranged in layers along the c-axis. In the ab plane, the metal atoms and oxygen atoms are arranged in a layered fashion, and in the ab plane, the a-axis or b-axis Crystals with different orientations (rotated around the c-axis) (CAAC: C Axis Alignment d Crystal.) are oxides that contain

[0119] In a broad sense, oxides containing CAAC are non-single crystals that are not crystalline when viewed from a direction perpendicular to the ab plane. The atomic arrangement is a triangle, a hexagon, an equilateral triangle, or an equilateral hexagon, and is perpendicular to the c-axis direction. From the viewpoint of the direction, it is an acid containing a phase in which metal atoms are arranged in layers, or metal atoms and oxygen atoms are arranged in layers. It refers to a monster.

[0120] CAAC is not a single crystal, but it is not composed of only amorphous matter. AC contains crystallized parts (crystalline parts), but the boundary between one crystalline part and another crystalline part is not clearly defined. Sometimes it is not possible to determine with certainty.

[0121] When oxygen is contained in CAAC, a part of the oxygen may be replaced with nitrogen. The c-axes of the individual crystals that make up the CAAC are aligned in a certain direction (e.g., the substrate surface supporting the CAAC, C The CAAC may be aligned in a direction perpendicular to the surface of the AAC. The normal to the ab plane of the crystal part of the CAAC is in a certain direction (for example, the substrate plane supporting the CAAC, The direction may be perpendicular to the surface of the substrate.

[0122] CAAC can be a conductor, a semiconductor, or an insulator depending on its composition. Also, depending on the composition, it may be transparent or opaque to visible light. To do.

[0123] An example of such a CAAC is a film-like CAAC that is perpendicular to the film surface or the supporting substrate surface. When observed from the direction, a triangular or hexagonal atomic arrangement is observed, and when the cross section of the film is observed, When the metal atoms are mixed, a layered arrangement of metal atoms or metal atoms and oxygen atoms (or nitrogen atoms) is observed. Crystals may also be mentioned.

[0124] In this embodiment, an In-Ga-Zn-O oxide target is used as the semiconductor layer 205. Using this, a 30 nm In-Ga-Zn oxide semiconductor is formed by sputtering. (See Figure 5(B)).

[0125] In order to prevent hydrogen, hydroxyl groups, and moisture from being contained in the semiconductor layer 205 as much as possible, As a pretreatment for forming the layer 205, the substrate 200 is preheated in a preheating chamber of a sputtering apparatus. The substrate 200 and the first insulating layer 204 are heated to remove impurities such as hydrogen and moisture adsorbed thereon. It is preferable to exhaust the gas. However, this preheating process can be omitted. The pre-heating is performed before the formation of the first insulating layer 204, the gate electrode 202, the capacitance wiring 203, and The same process may be carried out on the substrate 200 on which the wiring 212 has been formed.

[0126] The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more. By using a metal oxide target with a high filling rate, the film can be formed. The resulting semiconductor layer can be a dense film.

[0127] The sputtering gas used in forming the semiconductor layer 205 is hydrogen, water, a compound having a hydroxyl group, It is preferable to use a high-purity gas from which impurities such as hydrides have been removed. The high purity gas removed is, for example, a gas introduced into a sputtering device with a purity of 6N (9 9.9999%) or more, preferably 7N (99.99999%) or more (i.e., impurities It is desirable to keep the concentration at 1 ppm or less, preferably 0.1 ppm or less.

[0128] The semiconductor layer 205 is formed by sputtering, which is less likely to be contaminated with impurities such as hydrogen, water, hydroxyl groups, or hydrides. The film is preferably formed by the ring method. The substrate heating temperature is 100° C. or higher and 600° C. or lower. Preferably, the temperature is 150° C. or higher and 550° C. or lower, and more preferably, 200° C. or higher and 500° C. or lower. The film is formed in an oxygen gas atmosphere. The wiring layer (e.g., For example, when Al is used for the gate electrode 202, the substrate temperature is set to 380° C. or less. The temperature is set to 350° C. or lower. Also, the wiring layer formed by etching the first conductive layer is heated to 350° C. When u is used, the substrate temperature is set to 450° C. or less. The thickness of the semiconductor layer 205 is The thickness is set to 1 nm or more and 40 nm or less, preferably 3 nm or more and 20 nm or less. The higher the temperature, the lower the impurity concentration of the resulting semiconductor layer 205. The atomic arrangement in 5 is improved, the density is increased, and polycrystals or CAAC are easily formed. Furthermore, by forming the film in an oxygen gas atmosphere, no extra atoms such as rare gases are included, Polycrystals or CAAC are likely to form. However, in a mixed atmosphere of oxygen gas and rare gas, In this case, the ratio of oxygen gas is 30% by volume or more, preferably 50% by volume or more. More preferably, the semiconductor layer 205 is 80% by volume or more. However, if the thickness is too thin, the effect of interface scattering becomes stronger, A decrease in field effect mobility may occur.

[0129] In addition, by forming the film while heating the substrate, hydrogen contained in the formed semiconductor layer 205 can be removed. The concentration of impurities such as moisture, hydrides, and hydroxyl groups can be reduced. Damage caused by tarring is reduced. A high-purity gas from which impurities such as compounds having a hydroxyl group or hydrides have been removed is introduced, The semiconductor layer 205 is formed using the target.

[0130] To remove residual moisture in the deposition chamber, an adsorption type vacuum pump, such as a cryopump, is used. It is preferable to use an ion pump or a titanium sublimation pump. The stage may be a turbomolecular pump plus a cold trap. The deposition chamber is evacuated using an opto-pump, and contains, for example, hydrogen atoms, water (H 2 O) containing hydrogen atoms Since compounds containing carbon atoms (and more preferably compounds containing carbon atoms) are exhausted from the deposition chamber, The concentration of impurities contained in the formed semiconductor layer 205 can be reduced.

[0131] As an example of the deposition conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power supply 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed DC power supply is used, the powdery substances (particles, gases, etc.) generated during film formation are reduced. This is preferable because it can reduce the unevenness (also called "friction") and make the film thickness distribution uniform.

[0132] Oxide semiconductors are insensitive to impurities, and the film contains a significant amount of metal impurities. There is no problem with cheap soda lime glass, which contains a large amount of alkali metals such as sodium. It has been pointed out that the use of amorphous oxide semiconductors is also possible (Kamiya, Nomura, Hosono, "Physical Properties of Amorphous Oxide Semiconductors" "Current Status of Device Development," Solid State Physics, September 2009, Vol. 44, pp. 621-6 33.) However, this is not an appropriate criticism. When measured by secondary ion mass spectrometry, sodium (Na) was 5 × 10 16 cm -3 below , preferably 1 x 10 16 cm -3 Less than 1×10, more preferably 15 cm -3 below, Lithium (Li) is 5×10 15 cm -3 Less than or equal to 1×10 15 cm -3 below, Potassium (K) is 5 x 10 15 cm -3 Less than or equal to 1×10 15 cm -3 Below It is desirable to do so.

[0133] Alkali metals and alkaline earth metals are harmful impurities for oxide semiconductors. In particular, among alkali metals, Na ions are highly effective in preventing the formation of oxide semiconductor insulating films. In the case of oxide, it diffuses from the insulating film into the oxide semiconductor. This breaks the bond between the metal and oxygen or inserts itself into the bond, resulting in transistor characteristics. Deterioration of the characteristics (e.g., normally-on (negative shift of threshold voltage), decrease in mobility, etc.) In addition, it also causes variations in characteristics. This is particularly noticeable when the hydrogen concentration in the oxide semiconductor is sufficiently low. The concentration of the element is 5×10 19 cm -3 Below, especially 5×10 18 cm -3 If: It is highly recommended that the alkali metal concentration be set to the above value.

[0134] Even if the semiconductor layer 205 is formed by the above-mentioned method, the semiconductor layer 205 contains water as an impurity. Moisture or hydrogen (including hydroxyl groups) may be present. Moisture or hydrogen forms donor levels. Therefore, the water in the semiconductor layer 205 is an impurity for the oxide semiconductor. In order to reduce impurities such as hydrogen or water (dehydration or dehydrogenation), the semiconductor layer 205 is In contrast, under reduced pressure, in an inert gas atmosphere such as nitrogen or rare gas, or oxygen gas atmosphere, etc. Then, a heat treatment for dehydration or dehydrogenation (hereinafter, abbreviated as the first heat treatment) is carried out. This is also fine.

[0135] By performing the first heat treatment on the semiconductor layer 205, moisture or hydrogen present on the surface and inside of the semiconductor layer 205 is removed. Specifically, the temperature is 250° C. or higher and 750° C. or lower, preferably 400° C. or lower. The heat treatment may be performed at a temperature of 500°C or higher and lower than the distortion point of the substrate. For example, 500°C for 3 minutes or more If the RTA method is used for the heat treatment, dehydration or decomposition can be achieved in a short time. Because hydrogenation can be performed, processing can be performed at temperatures exceeding the strain point of the glass substrate. The first conductive layer is etched to form a wiring layer (such as a gate electrode 202) made of Al. When the heating is performed, the temperature of the heat treatment is set to 380° C. or less, preferably 350° C. or less. In addition, the wiring layer (gate electrode 202, etc.) formed by etching the first conductive layer is provided with Cu. When using, the heat treatment temperature shall be 450°C or less.

[0136] The heat treatment device is not limited to an electric furnace, and may be any device that uses heat conduction or heat radiation from a heating element such as a resistance heating element. For example, a GRTA (Gas Rap id Thermal Anneal) equipment, LRTA (Lamp Rapid The RTA (Rapid Thermal Anneal) equipment ) equipment can be used. The LRTA equipment uses halogen lamps, metal halide lamps, etc. , xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure mercury lamp This is a device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a light bulb. The GRTA device is a device that uses high-temperature gas for heat treatment. An inert gas that does not react with the workpiece during heat treatment, such as any rare gas or nitrogen, is used. I can.

[0137] In the first heat treatment, a reduced pressure atmosphere or an atmosphere of nitrogen, helium, neon, argon, etc. This is done in an inert atmosphere. It is preferable that the atmosphere does not contain moisture or hydrogen. The purity of nitrogen or rare gases such as helium, neon, and argon introduced into the treatment device must be 6N ( 99.9999%) or more, preferably 7N (99.99999%) or more (i.e. impurity concentration It is desirable to keep the concentration at 1 ppm or less, preferably 0.1 ppm or less.

[0138] In addition, the semiconductor layer 205 that has been subjected to the first heat treatment may be further subjected to a second heat treatment. The second heat treatment is performed in an oxidizing atmosphere, thereby supplying oxygen into the semiconductor layer 205. The oxygen vacancies generated in the semiconductor layer 205 during the first heat treatment are compensated for. The first heat treatment can be called an oxygen-adding treatment. The second heat treatment is, for example, at 200° C. or higher. The treatment should be performed at a temperature lower than the distortion point of the substrate. The treatment temperature is preferably 250° C. or higher and 450° C. or lower. The treatment time is 3 minutes to 24 hours. The ratio of crystalline regions to amorphous regions increases as the treatment time increases. However, heat treatment for more than 24 hours leads to a decrease in productivity. This is not desirable because it

[0139] An oxidizing atmosphere is an atmosphere containing an oxidizing gas. The oxidizing gas is oxygen, ozone, or It is preferable that the gas used is nitrous oxide or the like, and does not contain water, hydrogen, etc. The purity of oxygen, ozone, and nitrous oxide introduced into the device should be 6N (99.9999%) or higher. or 7N (99.99999%) or more (i.e. impurity concentration is less than 1 ppm, preferably It is preferable that the concentration of oxidizing gas is less than 0.1 ppm. A mixture may be used. In that case, the oxidizing gas must be at least 10 ppm. In addition, the inert atmosphere is nitrogen, rare gas (helium, neon, argon, cryostat, etc.) The main component of the atmosphere is an inert gas such as toluene or xenon. Reactive gases such as benzene and benzene must be less than 10 ppm.

[0140] The heat treatment device and gas species used in the second heat treatment are the same as those used in the first heat treatment. In addition, the first heat treatment, which is a heat treatment for dehydration or dehydrogenation, and the second heat treatment, which is a heat treatment for dehydration or dehydrogenation, can be performed. It is preferable that the second heat treatment, which is the heat treatment for oxygenation, is carried out continuously. As a result, the productivity of the semiconductor device can be improved.

[0141] In this way, the hydrogen concentration is sufficiently reduced to achieve high purification, and oxygen deficiency is prevented by supplying sufficient oxygen. In the semiconductor layer 205 in which the defect level in the energy gap due to the depletion is reduced, A concentration is 1×10 12 / cm 3 Less than 1×10 11 / cm 3 Less than or equal to 1.45 x 1 0 10 / cm 3 As a result, the off-state current (here, unit ch The value per channel width (1 μm) is 100zA / μm (1zA (zeptoampere) is 1 ×10 -21 A) or less, or 10zA / μm or less. Also, at 85°C, it is 100 zA / μm(1×10 -19 A / μm) or less, or 10zA / μm (1×10 -20 In this way, the carrier concentration of the oxide semiconductor (I type) is extremely low. By using an oxide semiconductor that is intrinsic or substantially i-type, In this way, the transistor 111 having excellent off-state current characteristics can be obtained.

[0142] In addition, the transistor 111 has electrical characteristics such as a threshold voltage and an on-state current that are temperature-dependent. In addition, there is little change in the transistor characteristics due to photodegradation.

[0143] Therefore, a transistor having an oxide semiconductor with a highly purified and extremely reduced carrier concentration can be obtained. The electrical characteristic fluctuation of the transistor is suppressed, and the transistor is electrically stable. By using an oxide semiconductor having optical properties, a highly reliable liquid crystal display device is provided. It is possible.

[0144] In the above description, the semiconductor layer 205 is subjected to a first heat treatment immediately after the semiconductor layer 205 is formed. The heat treatment is performed after the semiconductor layer 205 is formed. The procedure may be performed at any time after the above steps.

[0145] After the semiconductor layer 205 is formed, the semiconductor layer 205 is doped with oxygen as described below. The first heat treatment is performed to remove hydrogen, a hydroxyl group, or moisture contained in the oxide semiconductor. The oxide semiconductor is crystallized by a further heat treatment simultaneously with or after the first heat treatment. By such a crystallization or recrystallization process, the semiconductor layer 205 is crystallized. The crystallinity can be further improved.

[0146] Here, the oxygen addition process refers to a process in which oxygen (at least oxygen radicals, oxygen atoms, oxygen ions, The term "bulk" refers to adding a metal oxide (including any one of the above) to the bulk of the semiconductor layer 205. The term "oxygen" is used to clarify that oxygen is added not only to the surface of the thin film but also to the inside of the thin film. In addition, oxygen doping is a process in which oxygen plasma is added to the bulk. By performing oxygen addition treatment, the semiconductor layer 205 is The amount of oxygen in the second insulating layer can be increased to a value higher than the stoichiometric composition ratio. After the second insulating layer 207 is formed, oxygen is added to the second insulating layer 207. The oxygen content of the second insulating layer 207 can be increased to a value higher than the stoichiometric composition ratio. By performing oxygen addition treatment on 07 and then performing heat treatment, The oxygen in the insulating layer 207 is added to the semiconductor layer 205, and oxygen vacancies in the semiconductor layer 205 are efficiently eliminated. It can be well compensated for.

[0147] The oxygen addition process is performed using ICP (Inductively Coupled Plasma). Using the inductively coupled plasma method, microwaves (for example, frequency 2.45 GHz) are used This is preferably done using an excited oxygen plasma.

[0148] The oxygen addition treatment is performed by removing oxygen from the semiconductor layer 205, the second insulating layer 207, and the like. Since this is a process in which the composition ratio is increased beyond the stoichiometric ratio, it can also be called an excessive oxygen process. is mainly interstitial oxygen, and its oxygen concentration is 1×10 16 / cm 3 More than 2×10 20 / cm 3If the above conditions are met, the compound can be incorporated into the oxide semiconductor without causing distortion or the like to the crystal. This can be done.

[0149] Next, a second conductive layer is formed on the semiconductor layer 205, and a second resist mask is formed on the second conductive layer. A second resist mask is formed, and the second conductive layer is partially etched using the second resist mask. A source electrode 206a, a drain electrode 206b, and a wiring 216 are formed.

[0150] The second conductive layer used for the source electrode 206a, the drain electrode 206b, and the wiring 216 is Molybdenum (Mo), titanium (Ti), tungsten (W), tantalum (Ta), aluminum Al (Al), Copper (Cu), Chromium (Cr), Neodymium (Nd), Scandium (Sc) The material can be formed in a single layer or a multilayer structure using metal materials such as these or alloy materials that contain these as the main components. Alternatively, the conductive metal oxide may be used. Indium oxide (In 2 O 3 ), tin oxide (SnO 2 ), zinc oxide (ZnO), indium oxide In 2 O 3 - SnO 2 (abbreviated as ITO), indium zinc oxide (In 2 O 3 -ZnO) or these metal oxide materials containing silicon oxide In addition, conductive compositions containing conductive macromolecules (also called conductive polymers) can be used. The conductive polymer may be a so-called π-electron conjugated conductive polymer. For example, polyaniline or its derivatives, polypyrrole, etc. or its derivatives, polythiophene or its derivatives, or aniline, pyrrole and and a copolymer of two or more of thiophene and its derivatives.

[0151] Since the second conductive layer serves as wiring, it is preferable to use a low resistance material such as Al or Cu. By using Al or Cu, it is possible to reduce signal delay and improve image quality. l has low heat resistance and defects occur due to hillocks, whiskers, or migration To prevent migration of Al, it is recommended to add other metals such as Mo, Ti, and W to Al. Metal materials with higher melting points are layered, and hillock prevention elements such as Nd, Ti, Si, and Cu are used. It is preferable to use an alloy of these. When a material containing Al is used for the second conductive layer, It is preferable, and more preferable, that the maximum process temperature in the subsequent steps is 380° C. or less. It is advisable to set the temperature at 350°C or lower.

[0152] In addition, when Cu is used for the second conductive layer, there are problems such as defects due to migration and the diffusion of Cu elements. To prevent this, it is recommended to layer metals with higher melting points than Cu, such as Mo, Ti, and W. It is also preferable that, when a material containing Cu is used for the second conductive layer, It is preferable that the maximum process temperature is 450° C. or less.

[0153] In this embodiment, a Ti layer having a thickness of 5 nm is formed on the semiconductor layer 205 as the second conductive layer. Then, a Cu layer having a thickness of 250 nm is formed on the Ti layer. Then, a second resist is formed on the second conductive film. A second resist mask is formed, and the second conductive film is partially etched using a second resist mask. A etching process is performed to form a source electrode 206a, a drain electrode 206b, and a wiring 216. (See Figure 5(C)).

[0154] The second resist mask formed on the second conductive layer may be formed by an ink-jet method. In the inkjet method, no photomask is used, which further reduces the manufacturing cost. The first resist mask is peeled off after the etching process. , and explanation will be omitted.

[0155] Next, a first electrode 206 a, a second electrode 206 b, a wiring 216 and a semiconductor layer 205 are A second insulating layer 207 is formed (see FIG. 6(A)). The second insulating layer 207 is The hydrogen ion implantation layer 204 and the underlayer 201 can be formed by using the same material and method. The sputtering method is preferred because it is less likely to be contaminated by impurities such as silicon dioxide and hydrogen. When hydrogen is contained in the second insulating layer 207, the hydrogen penetrates into the semiconductor layer or is removed from the semiconductor layer. Therefore, the second insulating layer 207 is It is important to form the film using a method that minimizes the amount of hydrogen and impurities that contain hydrogen.

[0156] The second insulating layer 207 is typically made of silicon oxide, silicon oxynitride, or hafnium oxide. Inorganic insulating materials such as gallium oxide, aluminum oxide, and gallium oxide can be used. Gallium is a material that does not easily become charged, so there is no risk of the threshold voltage increasing due to charging up of the insulating layer. When an oxide semiconductor is used for the semiconductor layer 205, the second As the insulating layer 207 or by stacking with the second insulating layer 207, a compound of the same kind as an oxide semiconductor is formed. Alternatively, a metal oxide layer containing the metal component may be formed.

[0157] In this embodiment, the second insulating layer 207 is formed by sputtering silicon oxide having a thickness of 200 nm. The film is formed using the ring method. The substrate temperature during film formation should be between room temperature and 300°C. In this embodiment, the temperature is set to 100° C. The silicon oxide layer is formed by sputtering. Gas (typically argon) atmosphere, oxygen atmosphere, or a mixture of rare gas and oxygen atmosphere The target can be silicon oxide or silicon. For example, silicon can be used as a target and spat out in an atmosphere containing oxygen. By performing a thermal annealing process, silicon oxide can be formed.

[0158] In order to remove residual moisture in the deposition chamber during deposition of the second insulating layer 207, an adsorption type Vacuum pumps, such as cryopumps, ion pumps, and titanium sublimation pumps For example, a second film formed in a film forming chamber evacuated by a cryopump is preferably used. The insulating layer 207 can reduce the concentration of impurities contained in the second insulating layer 207. Another method for removing residual moisture in the deposition chamber is the turbo molecular pump. A cold trap mechanism may be added to the trap.

[0159] Note that the sputtering gas used in forming the second insulating layer 207 contains hydrogen, water, and a hydroxyl group. It is preferable to use a high-purity gas from which impurities such as compounds or hydrides that are not hydrogenated are removed. As a high-purity gas from which impurities such as hydrogen, water, compounds with hydroxyl groups, and hydrides have been removed For example, 6N (99.9999%) or more, preferably 7N (99.99999%) or more or less (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm or less). It is preferable to use a gas that is

[0160] Then, place the sample in a reduced pressure atmosphere, an inert gas atmosphere, an oxygen gas atmosphere, or an ultra-dry air atmosphere. A third heat treatment is performed under atmospheric pressure (preferably at 200°C or higher and 600°C or lower, more preferably at 250°C or lower). However, the etching of the first conductive layer may be performed at a temperature of 500° C. or higher. The wiring layer and / or the wiring layer formed by etching the second conductive layer are made of Al. If the material is heated, the temperature of the heat treatment should be 380°C or less, preferably 350°C or less. In the case where Cu is used in the wiring layer, the temperature of the heat treatment is set to 450° C. or less. For example, the third heat treatment may be performed at 450° C. for 1 hour in a nitrogen atmosphere. When the process is performed, a part of the semiconductor layer (channel formation region) is in contact with the second insulating layer 207. The temperature is raised, and oxygen is supplied from the second insulating layer 207 containing oxygen to the semiconductor layer 205. The oxygen vacancies in the 205 can be reduced. As in the case of the deposition chamber for the insulating layer 207, it is desirable to remove impurities such as water and hydrogen as much as possible. stomach.

[0161] Next, a third resist mask is formed on the second insulating layer 207. The conductor layer 205 and the first insulating layer 204 are partially etched. In the pixel, in the portion where the thin film transistor is not formed, the second insulating layer 207, the semiconductor The conductor layer 205 and the first insulating layer 204 are removed to form a pixel opening 225. In addition, only the second insulating layer 207 is removed from the drain electrode 206b, and the contact hole 206b is removed. A second insulating layer is formed on the wiring 216 at the cross section E1-E2. Only 207 is removed to form a contact hole 220. On the wiring 212 in the semiconductor layer 204, the second insulating layer 207, the semiconductor layer 205, and the first insulating layer 204 are is removed, and a contact hole 219 is formed (see FIG. 6(B)).

[0162] In addition, the second insulating layer of the pixel opening (the portion of the pixel where the thin film transistor is not formed) The edge layer 207, the semiconductor layer 205, and the first insulating layer 204 may be left unetched. However, the second insulating layer 207, the semiconductor layer 205, and the first insulating layer 206 in the pixel opening By removing the edge layer 204, the liquid crystal display device can be used as a transmissive liquid crystal display device. Therefore, the light from the backlight efficiently passes through the pixel, and the transmittance of the pixel is improved. This makes it possible to reduce power consumption and improve display quality by increasing brightness.

[0163] Etching the second insulating layer 207, the semiconductor layer 205, and the first insulating layer 204 The etching process may be dry etching or wet etching, or both. The etching gas used in the etching is a gas containing chlorine (a chlorine-based gas, for example, chlorine (Cl 2 ), boron trichloride (BCl 3 ), silicon tetrachloride (SiCl 4 ), carbon tetrachloride (CCl 4 ) etc.) can be used.

[0164] As dry etching, parallel plate type RIE (Reactive Ion Etch) ng) method and ICP (Inductively Coupled Plasma) In addition, the underlayer 201 is formed from the substrate 200. In order to prevent the diffusion of impurity elements from the above-mentioned etching, the underlayer 2 It is preferable to adjust the etching conditions so that 01 is not etched as much as possible. stomach.

[0165] In general, etching of a semiconductor layer and forming a contact hole in an insulating layer are performed at different levels. The resist mask forming step and the etching step are performed separately, but in this embodiment According to the manufacturing process, the resist mask formation process and the etching process are performed simultaneously in one step. This not only reduces the number of photomasks, but also reduces the number of resist masks. The process and etching process can be reduced. In other words, the fewer processes result in lower costs. Thus, liquid crystal displays can be manufactured with good productivity.

[0166] In addition, according to the manufacturing process shown in this embodiment, a resist mask is directly formed on the semiconductor layer 205. In addition, the channel formation region of the semiconductor layer 205 is not covered by the second insulating layer 207. Because it is protected, the channel of the semiconductor layer is protected even during the photoresist peeling and cleaning process. Since moisture does not adhere to the formation region, the characteristic variations of the transistor 111 are reduced. In particular, when an oxide semiconductor is used as the semiconductor layer 205, The effect is greater.

[0167] Next, a third conductive film is formed on the second insulating layer 207 by using a sputtering method, a vacuum deposition method, or the like. a third conductive layer is formed on the second conductive layer, a fourth resist mask is formed on the third conductive layer, and a fourth resist mask is formed on the third conductive layer. By partially etching, the pixel electrode 210, the electrode 221, and the electrode 222 are The thickness of the third conductive layer is 30 nm to 200 nm, preferably 50 nm. It is preferable that the thickness of the film is 100 nm or more and 100 nm or less. An element region 260 is formed through the separation layer 250 (see FIG. 6(C)).

[0168] The third conductive layer is made of indium oxide containing tungsten oxide for use as a pixel electrode. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide (ITO) , indium zinc oxide, indium tin oxide doped with silicon oxide, etc. It is preferable to use a conductive material that can withstand high temperatures. In addition, it is preferable to use a single layer or a multilayer structure of about 1 to 10 sheets. A material consisting of a graphene sheet (one layer of graphite) may also be used. The conductive composition may be formed using a conductive polymer. As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or a derivative thereof, or two or more of aniline, pyrrole and thiophene Copolymers or derivatives thereof are included.

[0169] In this embodiment, an ITO layer having a thickness of 80 nm is formed as the third conductive layer. A fourth resist mask is formed on the third conductive layer, and the third conductive layer is partially etched. As a result, the pixel electrode 210, the electrode 221, and the electrode 222 are formed.

[0170] The pixel electrode 210 is electrically connected to the drain electrode 206b through a contact hole 208. The electrode 221 is electrically connected to the wiring 212 through a contact hole 219. The electrode 222 is electrically connected to the wiring 216 through the contact hole 220. To be continued.

[0171] In the contact holes 219 and 220, the wiring 212 and the wiring It is important that the wires 216 are not left exposed but are covered with an oxide conductive material such as ITO. Since the wiring 212 and the wiring 216 are metal layers, the wiring 212 and the wiring 216 are exposed. If the exposed surface is left exposed, it will oxidize, increasing the contact resistance with the FPC, etc., and reducing reliability. The exposed surfaces of the wiring 212 and the wiring 216 are covered with a conductive oxide such as ITO. By covering the contacts with a material, the increase in contact resistance is prevented, improving the reliability of the liquid crystal display device. can be done.

[0172] Although not shown in the drawing, the transistor formed in the element region 260 is It is preferable to provide a protection circuit because the circuit is easily destroyed by nonlinear It is preferable to use an element.

[0173] According to this embodiment, a liquid crystal display device can be manufactured using fewer photolithography steps than in the past. Therefore, it is possible to manufacture a liquid crystal display device at low cost and with high productivity. In addition, the element region 260 necessary for operating the liquid crystal display device can be formed on the peeling layer 2. Since the element region 260 is formed on the substrate 200 via the insulating film 50, the element region 260 is peeled off from the substrate 200. It can be transferred to other supports.

[0174] This embodiment mode can be freely combined with other embodiment modes.

[0175] (Embodiment 2) In this embodiment, an example of a process that is partially different from that in the first embodiment will be described with reference to FIG. The same reference numerals are used for the same parts as those in the first embodiment, and detailed explanations of the same reference numerals will be omitted here. In addition, the process example of this embodiment will be described with reference to the drawings only for the transistor portion. .

[0176] First, as in the first embodiment, a release layer 250 is formed on a substrate 200 having an insulating surface, After forming a first conductive layer on the peeling layer 250, a first resist mask is formed on the first conductive layer. The first conductive layer is selectively etched using the first resist mask to form a gate electrode. A pole 202 is formed.

[0177] An insulating layer serving as a base layer may be provided between the peeling layer 250 and the gate electrode 202. In this embodiment, an underlayer 201 is provided. The underlayer 201 is formed by removing impurity elements (N a, etc.), and is used in the manufacture of silicon oxide, silicon oxynitride, silicon nitride, Select from hafnium oxide, aluminum oxide, gallium oxide, and aluminum gallium oxide. The underlayer is not limited to a single layer, but may be a laminate of the above-mentioned multiple films. It may be.

[0178] In this embodiment, the film formation temperature of the semiconductor layer to be formed later is 200° C. or more and 450° C. or less. Since the temperature of the heat treatment after the deposition of the dielectric layer is 200° C. or more and 450° C. or less, the gate electrode 20 The second material is a laminate with copper as the bottom layer and molybdenum as the top layer, or a laminate with copper as the bottom layer and tantalum as the top layer. A laminate with tinsten as the upper layer is used.

[0179] Next, in the same manner as in the first embodiment, a first insulating layer 204 is formed on the gate electrode 202 by a CVD method or a scanning electron microscope. The film is formed by sputtering, etc. The cross-sectional view after the steps up to this point is shown in Figure 7(A).

[0180] Next, a first semiconductor layer having a thickness of 1 nm or more and 10 nm or less is formed on the first insulating layer 204 . In this embodiment, a target for an oxide semiconductor (for an In-Ga-Zn-O-based oxide semiconductor) is Target (In 2 O 3 :Ga 2 O 3 ZnO = 1:1:2 [molar ratio]) The distance between the substrate and the target was 170 mm, the substrate temperature was 250°C, the pressure was 0.4 Pa, and the direct current ( DC) power supply 0.5kW, oxygen only, argon only, or argon and oxygen atmosphere A 5 nm first semiconductor layer is deposited.

[0181] Next, the substrate is placed in a nitrogen or dry air atmosphere, and a first heat treatment is performed. The temperature of the first heat treatment is 200° C. or more and 450° C. or less. The time period is set to 1 hour or more and 24 hours or less. Form 8a (see FIG. 7(B)).

[0182] Next, a second semiconductor layer having a thickness of more than 10 nm is formed on the first crystalline semiconductor layer 748a. In this embodiment, a target for an oxide semiconductor (In-Ga-Zn-O-based oxide semiconductor Target for 2 O 3 :Ga 2 O 3 ZnO = 1:1:2 [molar ratio] The distance between the substrate and the target was 170 mm, the substrate temperature was 400°C, the pressure was 0.4 Pa, and the DC power supply 0.5kW, oxygen only, argon only, or argon and oxygen atmosphere A second semiconductor layer is deposited to a thickness of 25 nm.

[0183] Next, the atmosphere in which the substrate is placed is changed to nitrogen or dry air, and a second heat treatment is performed. The temperature of the first heat treatment is 200° C. or more and 450° C. or less. The time period is set to 1 hour or more and 24 hours or less. Form 8b (see FIG. 7(C)).

[0184] The subsequent steps are the same as in the first embodiment, with the source electrode 206a, the drain electrode 206b, and the After forming the second insulating layer 207, a process of simultaneously forming the first opening and the second opening is performed. A single resist mask is used. The first opening overlaps with the drain electrode 206b. The second insulating layer 207 is etched to form the second opening. and a portion of the second insulating layer 207 that does not overlap with the drain electrode 206b, the first crystalline semiconductor A portion of the layer 748a, a portion of the second crystalline semiconductor layer 748b, and the first insulating layer 204 This is done by etching a part of the substrate. This reduces the number of steps.

[0185] Thereafter, the transistor 111 can be obtained through the same steps as in the first embodiment. When this embodiment is used, the semiconductor including the channel formation region of these transistors The layer is a stack of a first crystalline semiconductor layer 748a and a second crystalline semiconductor layer 748b. After the first crystalline semiconductor layer 748a is formed, a first heat treatment is performed to form the first crystalline semiconductor layer 748a. After the layer 748a is subjected to CAAC treatment, a second crystalline semiconductor layer 748b is formed and a second heat treatment is performed. By performing the heat treatment, the second crystalline semiconductor layer 748b becomes the first crystalline semiconductor layer 748a. Since crystals (CAAC) grow as seeds, CAAC-type oxide semiconductors are formed efficiently. It is possible.

[0186] A transistor having a stack of a first crystalline semiconductor layer and a second crystalline semiconductor layer is a transistor. The transistor was exposed to light or before and after the bias-thermal stress (BT) test. The amount of change in the threshold voltage of the transistor can be reduced, and the transistor has stable electrical characteristics.

[0187] This embodiment mode can be freely combined with other embodiment modes.

[0188] (Embodiment 3) In this embodiment, the element region 260 produced in the first and second embodiments is 200 and attached to another support, An example of the structure of a semiconductor device with high toughness is shown in FIG. An example of this method will be described with reference to FIGS.

[0189] In the cross-sectional view of the liquid crystal display device shown in FIG. 8, the element region described in the first embodiment The cross-sectional view of the pixel portion 850 will be used as a cross-sectional view of the pixel portion 850. The liquid crystal display device shown is driven in VA (Vertical Alignment) mode. and a reflective monochrome liquid crystal display device using a liquid crystal material exhibiting a blue phase as a liquid crystal layer. The following explanation will be given on the assumption that

[0190] The VA mode (also called vertical alignment mode) mentioned above is a mode in which the alignment of liquid crystal molecules in a liquid crystal display panel is controlled. This is a type of control method in which the liquid crystal molecules are aligned perpendicular to the panel surface when no voltage is applied. There are several types of vertical alignment modes, such as MV A (Multi-Domain Vertical Alignment) mode, PV A(Patterned Vertical Alignment) mode, ASV(A Advanced Super-View mode can be used. Divide a pixel into several regions (subpixels) and tilt the molecules in each region in a different direction. We use a method called multi-domain or multi-domain design, which is designed to It is possible.

[0191] In addition, the liquid crystal display device in this embodiment is a VA mode, but is not limited to this. For example, TN (Twisted Nematic) mode, IPS (In-Pla ne-Switching) mode, FFS (Fringe Field Switch) ing) mode, ASM(Axially Symmetric aligned Mi cro-cell) mode, OCB (Optical Compensated Bir) efringence mode, FLC (Ferroelectric Liquid Crystal Crystal) mode, AFLC (AntiFerroelectric Liqui d Crystal) mode or other driving methods may also be used.

[0192] <Configuration example of liquid crystal display device> FIG. 8A shows an element region 260 and a liquid crystal material 840 supported by a first support 800 and a second support 800. FIG. 8(B) is a plan view of a panel sealed with a sealant 820 between the support 810 and the panel. corresponds to a cross-sectional view taken along dashed line MN in FIG.

[0193] The first support 800 has a fracture toughness of 1.5 [MPa m 1 / 2 ] or more, and fixed The element region 260 is provided via a bonding adhesive 808. Fracture toughness value is 1.5 [MPa m 1 / 2 ] or higher, Thus, a liquid crystal display device that is lightweight and has high toughness can be produced.

[0194] The second support 810 has a fracture toughness of 1.5 [MPa m 1 / 2 ] or more, A fourth conductive layer 814 is provided on one side of the second support 810, and a fourth conductive layer 814 is provided on the other side of the second support 810. A polarizing filter 860 is provided on the surface. .5 [MPa m 1 / 2 ] or more, it is thin and lightweight. Moreover, a liquid crystal display device having high toughness can be produced.

[0195] A first support 800 provided with an element region 260 and a fourth conductive layer 814 are provided. The second support 810 holds the sealant 820, the liquid crystal material 840, and the first conductive material 84 The sealant 820 is provided so as to surround the pixel portion 850. The material 840 is prevented from leaking outside the seal material 820. In addition, the first conductive material 845 is a wiring 212 formed in the element region 260 and a fourth conductor formed on the second support. 814, so that the fourth conductive layer 814 and the pixel A voltage can be applied between the poles 210 to change the orientation of the liquid crystal material 840 .

[0196] Also, the input terminal is provided outside the area surrounded by the seal material 820 on the first support 800. The external wiring 870a and the external wiring 870b are connected to each other via the second conductive material 855. , and are connected to the wiring 216 of the element region 260. 0b is a second conductive material 8 that transmits power and signals required for operating the liquid crystal display device from the outside. 55 to the element region 260.

[0197] By forming the above structure, a liquid crystal display device that is thin, lightweight, and not easily broken can be provided. It can be made.

[0198] <Method of manufacturing a liquid crystal display device> Next, an example of a method for manufacturing the above liquid crystal display device will be described with reference to FIGS. The manufacturing process of the liquid crystal display device in this embodiment is "installation of element regions on a first support". The following explanation will be divided into three parts: "step of forming a second support", "step of forming a second support", and "step of sealing a liquid crystal layer".

[0199] <Step of Providing Element Region on First Support> First, the element formed on the substrate 200 via the release layer 250, which was produced in the first embodiment, A temporary support substrate 902 is attached to one surface of the region 260 using a peeling adhesive 900, and then the substrate The sub-region 260 is peeled off from the substrate 200 and transferred to the temporary support base 902 (see FIG. 9(A)). In this specification, the element region 260 is peeled off from the release layer 250 to form a temporary support substrate. The process of transferring to the 902 side is called the transposition process.

[0200] The peeling adhesive 900 is soluble in water or organic solvents, or is resistant to irradiation with ultraviolet rays or the like. If necessary, the temporary support base 902 and the element region 2 may be separated so that the plasticization can be further improved. The adhesive 900 for peeling is removable from the spin coater, ... Various coating equipment such as lit coaters, gravure coaters, roll coaters, etc. Lexo printing equipment, offset printing equipment, gravure printing equipment, screen printing equipment, ink It is preferable to apply the coating thinly and uniformly using various printing devices such as a jet device.

[0201] The temporary support substrate 902 is a tape having a surface adhesive property such as a UV peelable tape or a heat peelable tape. Tapes that can reduce the thickness can be used. Alternatively, a metal substrate, a ceramic substrate, a metal substrate, a plastic substrate, or the like may be used. When using a tape that can arbitrarily reduce the adhesiveness of the surface, the peeling adhesive 900 is not necessarily required. In addition, if a plastic substrate is used, it must be able to withstand the subsequent processing temperatures. It is preferable to use a material having sufficient heat resistance.

[0202] The method for bonding the temporary support base material 902 to the element region 260 is not particularly limited. When a flexible material such as various tapes is used as the support base material 902, for example, A device that can bond materials together using a roller (also called a roll laminator) is used. This prevents air bubbles from being mixed between the element region 260 and the temporary support base 902. Therefore, stable bonding can be performed.

[0203] In this embodiment, an adhesive that is cured by irradiation with ultraviolet light and is soluble in water (hereinafter, referred to as a water-soluble adhesive) is used. The peeling adhesive 900 is used to peel off the element region 2 using a spin coater. The adhesive 900 is then applied thinly to one surface of the adhesive 60 and cured. The adhesive material is a UV-peelable tape (a tape whose adhesive strength can be reduced by exposure to UV rays) and is rolled. The film was attached using a laminate.

[0204] In order to peel off the element region 260 from the substrate 200, various methods can be appropriately used. For example, the release layer 250 may be made of tungsten (W), molybdenum (Mo), titanium (Ti ), Tantalum (Ta), Niobium (Nb), Nickel (Ni), Cobalt (Co), Zirconia (ZrO2) Zirconium (Zr), Zinc (Zn), Ruthenium (Ru), Rhodium (Rh), Palladium ( An element selected from Pd), osmium (Os), iridium (Ir), and silicon (Si); Or, the material is an alloy material mainly composed of the above element, or a compound material mainly composed of the above element. In the case where a layer is formed and the surface of the peeling layer 250 is a metal oxide (for example, in the case of the first embodiment), As described in the above, after the formation of the peeling layer 250, a film containing oxygen was formed as the underlayer 201. In the case of the metal oxide film, the metal oxide film is weakened by crystallizing it, and the metal oxide film is weakened by physical force (e.g., By applying a force to peel the temporary support base 902 from the substrate 200, the element region 260 can be peeled off from the release layer 250.

[0205] In addition, when an amorphous silicon film containing hydrogen is formed as the peeling layer 250, the laser light irradiation The amorphous silicon film containing hydrogen is removed by etching or the like, and the element region 260 is then removed from the substrate 2. 00. Also, the peeling layer 250 may be a film containing nitrogen, oxygen, hydrogen, or the like. (For example, when using an amorphous silicon film containing hydrogen, a hydrogen-containing alloy film, an oxygen-containing alloy film, etc.) In this case, the separation layer 250 is irradiated with laser light to remove nitrogen, oxygen, or hydrogen contained in the separation layer 250. This causes the element region 260 to be released as a gas, thereby facilitating the separation of the element region 260 from the substrate 200. The release layer 250 is also dissolved in a solution or NF. 3 ,BrF 3 , ClF 3 by halogen fluoride gases such as A method of removing the layer by etching can also be used.

[0206] In addition, when the release layer 250 is formed of an organic resin, the stress inherent in the organic resin is utilized. The peeling may be performed by

[0207] The peeling process can be carried out more easily by combining a plurality of the above peeling methods. These include irradiation with laser light, etching the peeling layer with gas or solution, and using a sharp knife or scalpel. The peeling layer is partially removed by applying a mechanical force such as a pressure sensor or the like to easily peel the peeling layer from the element layer. This includes processes such as peeling off the material by physical force (using a machine, etc.) after it has been cooled. When the peeling layer 250 is formed of a laminated structure of a metal and a metal oxide, the laser beam irradiation The peeling layer can be triggered by grooves formed by shooting or scratches caused by sharp knives or scalpels. It is also easy to physically peel it off from the

[0208] The peeling process for physically peeling off the element region 260 involves removing the peeling layer using a solution or gas. This allows for a large-area peeling process to be performed in a short time, compared to the method of peeling off the element region 260. In addition, since no solution or gas is used, the method is very safe. As a method for peeling off the substrate 60 from the substrate 200, a method for peeling off by applying a physical force is preferred because of its high productivity. This is the most advantageous from the standpoint of safety.

[0209] In addition, when peeling by physical means, peeling should be performed while pouring water or other liquid. This prevents the static electricity generated by the peeling operation from adversely affecting the element region 260 ( For example, damage to semiconductor elements caused by static electricity can be suppressed.

[0210] When an oxide semiconductor is used as the semiconductor layer 205, the oxide semiconductor is a silicon material. Compared to the general semiconductor layers used in the past, the insulation resistance is high and insulation breakdown is unlikely to occur. By using an oxide semiconductor as the conductor layer 205, static electricity was generated during the peeling process. Even in this case, the semiconductor layer 205 can be prevented from being destroyed by static electricity.

[0211] By fixing the substrate 200 when peeling off the element region 260 from the peeling layer 250, Since the movement and bending of the element region 260 can be suppressed, localized force is prevented from being applied to the element region 260. Therefore, the element region 260 can be formed without any defects (for example, without cracks in the element region 260). The substrate 200 can be fixed by, for example, bonding. Fix the sample to a stable base using adhesive material (or a sticky material), or fix the sample to a vacuum chuck. However, taking into consideration the labor required to peel off the substrate 200 and the reusability of the substrate 200, It is preferable to fix the object with an empty chuck. By using a porous chuck, the entire surface of the substrate 200 is fixed with a uniform force. This is more preferable because it is possible.

[0212] Before providing the peeling adhesive 900 on the element region 260, the element region 260 is Jet cleaning, ultrasonic cleaning, plasma cleaning, UV cleaning, ozone cleaning, etc. are performed to clean the element area. It is preferable to remove any dirt or organic matter adhering to the surface.

[0213] Next, a first support 800 is attached to the other surface of the element region 260 via a fixing adhesive 808. (See Figure 9(B)).

[0214] The material of the fixing adhesive 808 may be a light-curing adhesive such as an ultraviolet-curing adhesive, a reactive curing adhesive, or the like. Various types of curing adhesives can be used, such as curing adhesives, thermosetting adhesives, and anaerobic adhesives. can.

[0215] The fixing adhesive 808 can be applied by a spin coater, a slit coater, a gravure coater, or a roll Coaters and other coating equipment, flexographic printing equipment, offset printing equipment, and graphics Using various printing equipment such as via printing equipment, screen printing equipment, and inkjet equipment, It is preferable that the film is provided with a uniform thickness.

[0216] The first support 800 is made of a material having high toughness (specifically, 1.5 [MPa m 1 / 2 ]below For example, organic resin substrates and organic resin thin films are used. This uses a thin, lightweight, impact-resistant membrane, or a metal substrate and thin metal film. It is possible to manufacture a liquid crystal display device that is resistant to damage even when subjected to external force such as impact or bending. Generally, materials with high toughness have high flexibility as well as toughness. The first support 800 has high toughness and can be curved freely. The thickness of the support 800 may be appropriately selected depending on the intended use of the liquid crystal display device. For example, The LCD display device is installed in a curved shape to fit the shape of a curved surface, or rolled up for carrying. When the first support 800 is used in the above-mentioned state, the thickness of the first support 800 may be reduced. When the device is used under conditions where a load of 10000000000000000000000000000000000000 It is better to make it thicker.

[0217] The organic resin substrate and the organic resin thin film are, for example, polyethylene terephthalate resin. Polyethersulfone resin (PET), Polyethersulfone resin (PES), Polyethylene naphthalate resin ( PEN), polyvinyl alcohol resin (PVA), polycarbonate resin (PC), nylon resin, acrylic resin, polyacrylonitrile resin, polyether ether ketone resin (PEEK), polystyrene resin (PS), polysulfone resin (PSF), polyether Imide resin (PEI), polyarylate resin (PAR), polybutylene terephthalate resin Polyimide resin (PBT), Polyimide resin (PI), Polyamide resin (PA), Polyamideimide resin Polyisobutylene resin (PAI), Polyisobutylene resin (PIB), Chlorinated polyether resin (CP), Lamin resin (MF), epoxy resin (EP), polyvinylidene chloride resin (PVdC), polypropylene Polypropylene resin (PP), polyacetal resin (POM), fluororesin, phenolic resin ( PF), furan resin (FF), unsaturated polyester resin (FRP), cellulose acetate resin (CA), urea resin (UF), xylene resin (XR), diallyl phthalate resin (DA P), polyvinyl acetate resin (PVAc), polyethylene resin (PE), and ABS resin Substrates and thin films containing at least one of these as constituent components can be used.

[0218] The metal substrate and the metal thin film may be, for example, aluminum (Al), titanium (Ti), nickel (Ni), or the like. Ni, Cr, Mo, Ta, Beryllium e), zirconium (Zr), gold (Au), silver (Ag), copper (Cu), zinc (Zn), iron The substrate and thin film are made of Fe (Fe), Pb (Pb), Tin (Sn), or an alloy of these. There can be.

[0219] When selecting a material for the first support 800, it is necessary to select a material that can display images by reflecting external light as in the present embodiment. In a reflective liquid crystal display device that performs the above-mentioned method, the metal substrate and the thin film having a high reflectance to visible light are used. It is preferable to use a film as the first support 800, in particular a film having a thermal expansion coefficient of 20 ppm / Metal substrates and thin films with a temperature of 0.1 °C or lower are preferred. In a transmissive or semi-transmissive liquid crystal display device that performs the above, the transmittance of visible light is high. It is preferable to use an organic resin substrate or thin film as the first support 800, and in particular, the thermal expansion Organic resin substrate with a tension coefficient of 20 ppm / ℃ or less and no retardation (birefringence phase difference) And thin films are preferred.

[0220] In this embodiment, the first support 800 has a single-layer structure. A protective layer may be formed on the front or back surface. The protective layer may be, for example, silicon oxide (SiO 2 ) , silicon nitride (SiN), silicon oxynitride (SiON), silicon oxynitride (SiNO) and other inorganic materials. Thin films of metals such as aluminum (Al) and magnesium (Mg) and the like In particular, oxide films having low water vapor permeability, gas permeability, and ultraviolet ray permeability can be used. It is preferable to use a film. These protective layers can be formed, for example, by sputtering or plasma deposition. This can be achieved by using the VD method.

[0221] In addition, in the case of a transmissive or semi-transmissive liquid crystal display device, inorganic films or metal films having a relatively high visible light transmittance are used. It is preferable to use a metal oxide film or the like. In the case of a reflective liquid crystal display device, a metal film having a high visible light reflectance is used. It is preferred to use a metal membrane.

[0222] The protective layer may be made of a resin having solvent resistance. The type of the solvent may be appropriately selected depending on the type of chemical solution used for the alignment film or the type of solvent contained in the alignment film. Polyvinyl chloride resin (PVC), polyvinyl alcohol (PVA), polyisobutylene resin (P IB), acrylic (methacrylic) resin (PMMA), cellulose acetate resin (CA), lily Polyacetal resin (UF), xylene resin (XR), diallyl phthalate resin (DAP), polyacetic acid Vinyl resin (PVAc), polyethylene resin (PE), polyamide (nylon) resin (P A), polycarbonate resin (PC), chlorinated polyether resin (CP), melamine resin ( MF), epoxy resin (EP), polyvinylidene chloride resin (PVdC), polystyrene (PS ) resin, polypropylene resin (PP), polyacetal resin (POM), fluororesin (P TFE), phenolic resin (PF), furan resin (FF), unsaturated polyester resin (F This allows the chemicals used for cleaning the substrate to be easily removed. This can prevent the first support from being altered by the solvent contained in the alignment film.

[0223] The method for forming these protective layers may be, for example, a spin coater, a slit coater, Various coating equipment such as gravure coaters and roll coaters, flexographic printing equipment, Offset printing equipment, gravure printing equipment, screen printing equipment, inkjet equipment, etc. It is preferable to apply the coating thinly and uniformly using various printing devices.

[0224] In this embodiment, the first insulating film 806 is attached to the other surface of the element region 260 via a fixing adhesive 808. The first support 800 is made of a fibrous material impregnated with an organic resin. When a structure made of a resin (prepreg) is used, the impregnated organic resin acts as a fixing adhesive. In order to function as the adhesive 808, the element region 260 and the first The support 800 can be attached. In this case, the organic resin of the structure is a reactive hardener. The curing process is accelerated by applying additional treatments such as photocuring, heat curing, and UV curing. It would be good to have one.

[0225] In this embodiment, a stainless steel film (so-called SUS film) is used as the first support. A film made from a material based on iron with added chromium and nickel. A thin layer of thermosetting adhesive was applied to the surface using a screen printing device. The plate was then laminated to one side of the plate and cured.

[0226] Before the fixing adhesive 808 is applied to the first support 800, For this purpose, we perform fluid jet cleaning, ultrasonic cleaning, plasma cleaning, UV cleaning, ozone cleaning, etc. In addition, it is preferable to remove dust and organic components adhering to the first support 800.

[0227] Further, a heat treatment may be performed on the first support 800. In this way, moisture and impurities adhering to the first substrate can be removed. Furthermore, a heat treatment is performed under reduced pressure. By doing so, moisture and impurities can be removed more efficiently. The substrate 800 is preferably a substrate having a heat resistance sufficient to withstand the temperature of the heat treatment. I wish.

[0228] The above-mentioned cleaning methods and heat treatments may be performed either alone or in combination. For example, a fluid jet cleaning may be performed to deposit the first support 800. After removing the dust, ozone cleaning is performed to remove organic components, and finally, heat treatment is performed. In the fluid cleaning, moisture adhering to the first support 800 or absorbed therein is removed. This makes it possible to effectively remove dust, organic components, and moisture from the first support 800.

[0229] Next, the peeling adhesive 900 and the temporary support base 902 are removed from the element region 260.

[0230] In this embodiment, a water-soluble adhesive is used as the peeling adhesive 900, and a temporary support base material 902 and Since a UV peelable tape is used, a UV irradiation treatment is first performed to remove the temporary support substrate 902. After removing the adhesive 900, the peeling adhesive was removed by washing with water.

[0231] In addition, since the first support 800 has high toughness, it is not easily damaged by the application of an external force. Therefore, the first support is not affected during the separation process or in the subsequent steps. The first support 800 is bonded to the first support 800 so that the body 800 is not deformed or broken when a load is applied to the body 800. With the highly rigid substrate attached via a member, the temporary support base 902 is In this way, by attaching a substrate with high rigidity, the glass The manufacturing equipment used for manufacturing substrates, etc. can be used as is.

[0232] Through the above steps, a first substrate having the element region 260 attached to the surface via the fixing adhesive 808 is obtained. The support 800 can be fabricated as follows.

[0233] In addition, this embodiment is for a liquid crystal display device using a liquid crystal material exhibiting a blue phase as a liquid crystal layer. Since it is not always necessary to provide an alignment film, an alignment film is not shown in FIGS. However, in a liquid crystal display device using a liquid crystal material that does not exhibit a blue phase as the liquid crystal layer, An alignment film (e.g., polyimide (PI), poly Insulating organic materials such as polyvinyl alcohol (PVA) and polyvinyl cinnamate (PVCi) The alignment layer is then subjected to rubbing treatment (e.g., rayon fiber, cotton Using rollers with fibers such as ton fiber and nylon fiber as the main material In this case, the alignment film is rubbed to impart alignment properties to the alignment film.

[0234] When a liquid crystal material exhibiting a blue phase is used for the liquid crystal layer, it is not necessary to provide an alignment film. This eliminates the need for rubbing, which is a type of electrostatic breakdown that can occur during rubbing. This can prevent defects and damage to the liquid crystal display device during the manufacturing process. Therefore, there is also an advantage that the productivity of liquid crystal display devices can be improved.

[0235] <Step of forming second support> Next, a second support 810 is prepared, and a fourth conductive layer 814 is formed on one surface of the second support 810. (See FIG. 10A.) Note that this embodiment mode will be described with reference to a monochrome liquid crystal display device. Therefore, no color filter is provided. However, when manufacturing a color liquid crystal display device, A color filter may be provided between the second support 810 and the fourth conductive layer 814 .

[0236] When a color filter is provided, it is usually RGB (R stands for red, G for green, B for blue) in the pixel area. However, the present invention is not limited to this, and may be, for example, RGBW. (W stands for white), or RGB plus one or more colors such as yellow, cyan, or magenta. The size of the display area may be different for each dot of the color element. The display method in the pixel section is a progressive method, an interlace method, etc. can be done.

[0237] In addition, a black matrix (light-shielding layer), a phase difference member, an anti-reflection portion, etc. are attached to the second support. An optical member (optical substrate) such as a material may be provided as appropriate.

[0238] In this embodiment, the liquid crystal display device is driven using a VA (Vertical Alignment) method. Since this is an explanation of the embossing method, a fourth conductive layer 814 is formed on one surface of the second support 810. The pixel electrode 210 and the fourth conductive layer 814 sandwich the liquid crystal material 840 in a vertical electric field type structure. However, when a horizontal electric field driving method is used, the fourth conductive layer 814 is not necessarily required. It is not necessary to provide the second support 810 on the substrate 812 either.

[0239] The second support 810 is made of a material having high toughness (specifically, 1.5 [MPa m 1 / 2 ]below The second support is made of various materials with the fracture toughness values ​​listed above. Since it is necessary to have a property that does not break down, an organic resin substrate and an organic resin thin film are used. A thin, lightweight liquid crystal display that is resistant to damage even when subjected to external forces such as impact or bending. In addition, various materials with high toughness generally have high ductility as well as toughness. The second support 810, which is flexible and has high toughness, can be curved freely. The thickness of the second support 810 can be appropriately selected depending on the intended use of the liquid crystal display device. For example, the liquid crystal display device may be installed in a curved state along the shape of a curved surface, etc. If the device is to be rolled up and carried around, the thickness of the second support 810 can be reduced. In addition, when used under conditions where an external load is constantly applied, The thickness of the second support 810 can be reduced.

[0240] The organic resin substrate and the organic resin thin film are made of the same material as the first support 800. It is possible.

[0241] The formation of a protective layer on the second support 810 and cleaning are the same as those for the first support 800. Therefore, the description will be omitted here.

[0242] In addition, since the second support 810 has high toughness, it is not easily damaged by the application of an external force. Therefore, the second support 810 does not bear the load in the subsequent process. In order to suppress deformation due to the application of a load, the second support 810 is attached via an adhesive member. It is preferable to attach a substrate having high rigidity. This allows the use of manufacturing equipment that is used for manufacturing glass substrates, etc. The substrate with high rigidity is formed by bonding the second support 810 to the element region 260. Since it is necessary to separate them, the adhesive used must be a weak adhesive (such as silicone rubber). Materials that can reduce adhesion by exposure to light or heat treatment (e.g. UV peeling tape or heat peeling tape) It is preferable to use a

[0243] The fourth conductive layer 814 is formed by a sputtering method, a plasma CVD method, a coating method, a printing method, or the like. , indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide Indium oxide with titanium oxide, indium tin oxide with titanium oxide, indium Indium tin oxide (ITO), indium zinc oxide, and silicon oxide were added. A layer mainly composed of a light-transmitting conductive material such as indium tin oxide is formed as a single layer or a multilayer. It can be used in.

[0244] In this embodiment, a polyimide film is used as the second support 810. On the film, an ITO film is formed to a thickness of 200 nm by a sputtering method as a fourth conductive layer 814. The membrane was

[0245] Although not shown in FIG. 10A, after the fourth conductive layer 814 is formed, a fourth A spacer material (a material for bonding the first support 800 and the second support 810) is applied to the conductive layer 814. When the pixel electrode 210 and the fourth conductive layer 814 are aligned, a liquid crystal material 840 is provided between the pixel electrode 210 and the fourth conductive layer 814. A space (a material for ensuring a gap) may be provided as necessary.

[0246] In addition, the present embodiment is for a liquid crystal display device using a liquid crystal material exhibiting a blue phase as the liquid crystal layer. Since it is not always necessary to provide an alignment film for this purpose, the alignment film is not shown in FIG. In the liquid crystal display device using a liquid crystal material that does not exhibit a blue phase as the liquid crystal phase, the fourth conductive layer 8 An alignment film (e.g., polyimide (PI), polyvinyl alcohol (PVA), poly An insulating organic material such as vinyl cinnamate (PVCi) can be used) and an alignment film is formed. Rubbing treatment for (e.g., rayon fiber, cotton fiber, nylon fiber, etc. as main materials The orientation film is rubbed with a roller or the like provided with the fibers to be used as the material. Performance can be added.

[0247] In this embodiment, the element region is attached to the first support 800 via a fixing adhesive 808. The step of providing 260 is followed by a step of forming a fourth conductive layer 814 on the second support 810. However, the order of the two steps is not limited. For this purpose, it is preferable to carry out both steps simultaneously in parallel.

[0248] <Liquid crystal layer sealing process> Next, the first support 80 having the element region 260 attached thereto via the fixing adhesive 808 is After preparing the pixel portion 850, a sealant 820 is provided around the pixel portion 850 so as to surround the pixel portion 850. After providing a first conductive material 845 on the electrode 221, a liquid crystal material 840 is provided on the pixel portion 850. (See FIG. 10(B)).

[0249] The sealant 820 is used in flexographic printing, offset printing, gravure printing, and screen printing. Designed using various printing devices such as inkjet printers, inkjet devices, and dispenser devices. The sealant 820 may be a light-curing adhesive such as an ultraviolet-curing adhesive. Various curing adhesives such as adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives are available. Considering the effect on the various materials used in liquid crystal displays and productivity, A photo-curing adhesive is used, which does not require a curing process in the state and cures in a short time. It is preferable that the sealant 820 includes a spacer material.

[0250] In addition, in FIG. 8 and FIG. 10, the sealant 820 is provided in only one line so as to surround the pixel portion 850. However, multiple lines may be provided. By providing multiple lines, This allows the adhesion between 800 and the second support 810 to be stronger.

[0251] The first conductive material 845 is a material containing conductive particles and an organic resin. The conductive material is made of organic resin with conductive particles ranging in size from a few nm to a few tens of μm dispersed in it. The conductive particles are gold (Au), silver (Ag), copper (Cu), nickel (Ni), platinum (Pt ), palladium (Pd), tantalum (Ta), molybdenum (Mo), titanium (Ti), One or more metal particles of aluminum (Al) or carbon (C), insulating particles (e.g. glass Particles having one or more of the above-mentioned metal films formed on the surface thereof, halo particles, organic resin particles, etc. The conductive material 845 may be made of silver halide particles. The resin is made of organic resin that acts as a binder, solvent, dispersant and coating material for metal particles. One or more selected from the above may be used. Representative examples include epoxy resin and silicone. Examples of the organic resin include resins.

[0252] Methods for applying the first conductive material 845 include flexographic printing, offset printing, Gravure printing equipment, screen printing equipment, inkjet equipment, dispenser equipment, etc. Various printing devices such as those mentioned above may be used.

[0253] The liquid crystal material 840 may be a lyotropic liquid crystal, a thermotropic liquid crystal, a low molecular weight liquid crystal, a high molecular weight liquid crystal, or a high molecular weight liquid crystal. Molecular liquid crystal, discotic liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. are used. Depending on the conditions, the material can exhibit a nematic phase, a cholesteric phase, a cholesteric blue phase, or a smectic phase. Ctc phase, smectic blue phase, cubic phase, smectic D phase, chiral neon phase The cholesteric blue phase and the smectic blue phase are It has a relatively short cholesteric or smectic phase with a helical pitch of 500 nm or less. This is seen in liquid crystal materials. The orientation of the liquid crystal material has a double twist structure, and the order is smaller than the optical wavelength. The blue phase is one of the liquid crystal phases, and when the temperature of a cholesteric liquid crystal is increased, This is the phase that appears immediately before the transition from the cholesteric phase to the isotropic phase.

[0254] The blue phase used in this embodiment is expressed only in a narrow temperature range. In order to improve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used to make the liquid crystal material. In particular, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a high response speed. The time is short, at 10μs to 100μs, and it is optically isotropic, so no alignment film is required. This has the advantage of improving the display image quality and reducing costs. This can reduce costs.

[0255] The specific resistivity of the liquid crystal material is 1×10 9 Ω cm or more, preferably 1×10 1 1 Ω cm or more, and more preferably 1×10 12 Ω·cm or more.

[0256] Next, the second support 810 is placed on the surface of the first support 800 on which the liquid crystal material 840 is provided. The surface on which the fourth conductive layer 814 is provided is attached to the substrate 810, and the sealing material 820 and the first conductive material 820 are attached to the substrate 810. A hardening process is performed on 845 (see FIG. 10(C)).

[0257] The bonding process is carried out in a vacuum chamber using a vacuum bonding device, etc. It is preferable to bond the first support 800 and the second support 810 together. The sealant and liquid crystal material can be bonded together without any air bubbles being generated. It is possible to prevent atmospheric components from being trapped within the area surrounded by material 820.

[0258] After the bonding process, the first support 800 and the second support 810 are It is preferable to apply pressure to one or both surfaces of the sealing material. Within the area surrounded by 820, liquid crystal material 840 is formed uniformly without gaps.

[0259] The hardening process is carried out by irradiating the sealing material 820 and the first conductive material 845 with visible light, U One or more of the following treatments are performed to achieve the optimum curing state: V light irradiation, heat treatment, etc. For example, when the sealing material 820 and the first conductive material 845 are photocurable materials, The wavelength, intensity, and time of the light to be irradiated are appropriately selected according to the curing conditions of the sealing material 82. 0, a material having the same hardening condition as the first conductive material 845 (for example, the sealant 820, the first Both conductive materials 845 and 845 are photocurable materials, and the wavelength and intensity of the light used for curing are roughly the same. It is preferable to use a first conductive material, since it is possible to reduce the number of times of hardening treatment. In order to improve the conductivity of the first conductive material 845 itself and to prevent poor conduction, pressure is applied when the first conductive material 845 is cured. It is desirable to apply force.

[0260] In this embodiment, the first support 820 is formed after the sealing material 820 and the liquid crystal material 840 are dropped. The method of bonding the body 800 and the second support 810 (dropping method) was used. After dropping 0, the first support 800 and the second support 810 are bonded together, and then the first The gap between the first support 800 and the second support 810 is utilized to form a seal by capillary action. A method of injecting a liquid crystal material 840 into the area surrounded by the liquid crystal material 820 (injection method) may be used. stomach.

[0261] Next, a second conductive material 855 is provided on the electrode 222 of the first support 800 (FIG. 11( See A). ).

[0262] The second conductive material 855 is, for example, a material containing conductive particles and an organic resin. Specifically, the material used is an organic resin in which conductive particles with a particle size of several nm to several tens of μm are dispersed. The conductive particles are gold (Au), silver (Ag), copper (Cu), nickel (Ni), Gold (Pt), Palladium (Pd), Tantalum (Ta), Molybdenum (Mo), Titanium (T i) Aluminum (Al), carbon (C) or more metal particles, insulating particle surface Particles on which any one or more of the above metal films are formed, fine particles of silver halide, or solder material The organic resin contained in the second conductive material 855 can be a metal. One or more organic resins that function as binders, solvents, dispersants, and coating materials for particles. Representative examples include organic resins such as epoxy resins and silicone resins. Fat is one example.

[0263] Methods for applying the second conductive material 855 include flexographic printing, offset printing, Gravure printing equipment, screen printing equipment, inkjet equipment, dispenser equipment, etc. Various printing devices such as those mentioned above may be used.

[0264] In this embodiment, the second conductive material 855 is a flake having a size of several nm to several tens of μm. An epoxy resin containing silver particles was used.

[0265] Next, an external wiring 870a is provided on the second conductive material 855, and a connection process is performed to form an electrical The electrode 222 and the external wiring 870a are electrically connected, and the polarizing filter is attached to the second support 810. Then, attach Filter 860 (see Figure 11(B)).

[0266] The external wiring 870a may be, for example, a printed wiring board or an FPC (Flexible Printed Circuit). The liquid crystal display device according to the present embodiment is Both the substrate and the counter substrate have high toughness, and when the liquid crystal display device is in a flexible state, Therefore, it is preferable that the external wiring 870a also has flexibility.

[0267] The connection process is performed under conditions that harden the second conductive material 855 (visible light irradiation, UV light irradiation, heating). The second conductive material 855 may be subjected to a heat treatment or the like. In order to improve the electrical conductivity of the body and to prevent a conduction failure between the electrode 222 and the second conductive material 855, It is preferable to apply pressure when connecting the conductive material 855. The second conductive material 855 and the external wiring 870a are subjected to a heat treatment while being subjected to a pressure treatment. Thermocompression bonding equipment is widely used.

[0268] In addition, since this embodiment is an explanation of a reflective liquid crystal display device, a light source is not provided. In the case of a liquid crystal display device of a transflective type or a semi-transmissive type, a backlight is provided on the first support 800 side as a light source. Lights, side lights, etc. may be installed.

[0269] In addition, multiple light-emitting diodes (LEDs) are used as backlights to display the image in a time-division format. It is also possible to perform a field sequential drive method. By applying the color driving method, it is possible to display colors without using color filters. This can be done.

[0270] Since the present embodiment is a reflective liquid crystal display device, the liquid crystal display device is biased toward only the second support 810 side. Although the optical filter 860 is provided, in the case of a transmission type or semi-transmission type liquid crystal display device, the first support 800 A polarizing filter may be provided on the side of the electrode 222. The polarizing filter 860 is attached after connecting a, but this order may be reversed. .

[0271] The liquid crystal display device manufactured by the above steps has an element region 26 necessary for the operation of the liquid crystal display device. 0 is produced using fewer photomasks than in the past, and the element region 260 is 1.5 [MPa m 1 / 2 The first support 800 has a fracture toughness value of . Furthermore, the second support 810 that sandwiches the liquid crystal material 840 also has a pressure of 1.5 [MPa m 1 / 2 ] or higher.

[0272] Therefore, the number of photomasks used can be reduced without using complicated techniques or special equipment. The liquid crystal display device is thin, lightweight, and highly durable, and can reduce the weight of the display. The device can be manufactured.

[0273] In addition, the first support 800 and the second support 810 are made of a material that also has high flexibility. By using this function, it can be curved to fit the shape of a curved surface, etc., and can be rolled up and carried around. It is also possible to manufacture a liquid crystal display device that can be used for the above purposes.

[0274] This embodiment mode can be freely combined with other embodiment modes.

[0275] (Embodiment 4) In this embodiment, an example of a usage form of the semiconductor device according to the present invention will be described. The semiconductor device according to the present invention is made flexible by being peeled off from the substrate on which it is manufactured. Specific examples of electronic devices having the semiconductor device according to the present invention will be described below with reference to the accompanying drawings. The electronic devices are liquid crystal display devices, television sets (simply televisions) and the like. , television receiver, or television set) and mobile phones, etc.

[0276] FIG. 12A shows a display 1201 , which includes a support base 1202 and a display unit 1203 . The display unit 1203 is formed using a flexible substrate, and is a lightweight and thin display. In addition, the display unit 1203 can be curved, and the support base 1202 can be used. It is also possible to remove the display from the wall and mount it along a curved wall. By using the semiconductor device shown in the embodiment for the display portion 1203, It is possible to produce a display that has flexibility, which is one of the uses of the device. As such, flexible displays can be installed on curved surfaces as well as flat surfaces. This makes it possible to use it for a variety of purposes.

[0277] FIG. 12B shows a rollable display 1211, which includes a display portion 1212. By using the semiconductor device shown in the above embodiment mode for the display portion 1212, One of the uses of semiconductor devices is to manufacture thin, large displays that can be rolled up. The rollable display 1211 is formed using a flexible substrate. Since the display unit 1212 is folded or rolled up, it can be carried around. Therefore, even if the rollable display 1211 is large, it can be folded. It can be folded or rolled up and carried in a bag.

[0278] FIG. 12C shows a sheet-type computer 1221, which includes a display unit 1222, a keyboard, and 1223, a touch pad 1224, an external connection port 1225, a power plug 1226, etc. By using the semiconductor device described in the above embodiment mode for the display portion 1222, One of the uses of the semiconductor device of the present invention is to manufacture a thin or sheet type computer. The display portion 1222 is formed using a flexible substrate and is lightweight. In addition, the main body of the sheet-type computer 1221 can be By providing a storage space in the unit, the display unit 1222 can be rolled up and stored in the main body. In addition, by providing the keyboard 1223 to have flexibility, The display unit 1222 can be rolled up and stored in the storage space of the sheet-type computer 1221. It can be folded up when not in use, making it easy to carry. This makes it possible to store it without taking up space.

[0279] FIG. 12(D) shows a display device 1231 having a large display unit of 20 to 80 inches. The operating unit includes a keyboard 1233, a display unit 1232, a speaker 1234, etc. The display unit 1232 is formed using a flexible substrate, and a keyboard 1233 is attached. The display device 1231 can be removed and folded or rolled up for easy transport. The keyboard 1233 and the display unit 1232 can be connected wirelessly. For example, A display device 1231 is installed along a curved wall, and a keyboard 1233 is used for wireless communication. It can be operated by

[0280] In the example shown in FIG. 12D, the semiconductor device described in the above embodiment mode is used for the display portion 1232. This allows the semiconductor device of the present invention to be used in a thin, large-sized display. A device can be fabricated.

[0281] FIG. 12E shows an electronic book 1241, which includes a display unit 1242, operation keys 1243, etc. The modem may be built into the electronic book 1241. The display unit 1242 is made of a flexible substrate. It is made of a plate and can be folded and rolled up. The child book can be carried around without taking up much space. It is possible to display not only still images such as these but also videos.

[0282] In the example shown in FIG. 12E, the semiconductor device described in the above embodiment mode is used for the display portion 1242. This allows the semiconductor device of the present invention to be used in a thin electronic book. It is possible to create a

[0283] FIG. 12(F) shows an IC card 1251, which includes a display unit 1252, a connection terminal 1253, etc. The display unit 1252 is made of a flexible substrate and is in the form of a lightweight, thin sheet. The IC card can be attached to the surface of the device. When possible, information acquired from an external source can be displayed on the display unit 1252. .

[0284] In the example shown in FIG. 12F, the semiconductor device described in the above embodiment mode is used for the display portion 1252. This allows the semiconductor device of the present invention to be used in a thin IC card. It is possible to create a

[0285] In this way, by using the semiconductor device according to the present invention in an electronic device, it is possible to prevent the device from being subjected to external forces such as bending. Even if stress occurs, damage to elements such as transistors can be reduced. Therefore, the yield and reliability of the semiconductor device can be improved.

[0286] As described above, the scope of application of the present invention is extremely wide, and it can be applied to electronic devices and information display devices in all fields. It can be used for stages.

[0287] (Embodiment 5) In this embodiment, a display device that switches between a left-eye image and a right-eye image at high speed is implemented. Using the liquid crystal display device manufactured in the third embodiment, a special pair of glasses that are synchronized with the image on the display device is used. FIG. 13 shows an example of viewing a 3D video or still image using a 3D 3D display.

[0288] In FIG. 13A, a display device 1311 and a dedicated eyeglass body 1301 are connected by a cable 1303. The dedicated eyeglasses body 1301 has a left-eye panel 1302a and a right-eye panel 1302b. The shutters on the panel 1302b alternately open and close to allow the user to see the The image on the display device 1311 can be recognized as 3D.

[0289] Also, a block diagram of the main configuration of the display device 1311 and the dedicated eyeglass body 1301 is shown. Shown in Figure 13(B).

[0290] The display device 1311 shown in FIG. 13B includes a display control circuit 1316, a display unit 1317, a timer 1318, and a timer 1319. a gate drive circuit 1318, an external operation means 1322, and a gate The semiconductor device of the present invention can be used in the display portion 1317. In addition, the signal to be output can be changed in response to an operation using an external operation means 1322 such as a keyboard. Variable.

[0291] The timing generator 1313 generates a start pulse signal and the like, and also generates the left eye image signal. a signal for synchronizing the image for the right eye with the shutter of the left-eye panel 1302a; The signal generator 1303 generates a signal for synchronizing with the shutter of the image display panel 1302b.

[0292] A left-eye image synchronization signal 1331a is input to a display control circuit 1316 and displayed on a display unit 1317. At the same time, a synchronization signal 1330a that opens the shutter of the left-eye panel 1302a is sent to the left A sync signal 1331b for the right eye image is input to the display control circuit 1302a. The image is input to a path 1316 and displayed on a display unit 1317, and at the same time, the right-eye panel 1302b A synchronization signal 1330b that opens the shutter is input to the right-eye panel 1302b.

[0293] In addition, in order to switch between the left eye image and the right eye image at high speed, the display device 1311 is equipped with a light emitting diode. A time-division additive color mixing method (field-effect color mixing) is used to display color in a time-division manner using diodes (LEDs). It is preferable to use a sequential method.

[0294] In addition, since the field sequential method is used, the timing generator 1313 is a light emitting diode. A signal synchronized with the sync signals 1330a and 1330b is also input to the backlight section of the diode. It is preferable that the backlight section has R, G, and B LEDs. .

[0295] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification. . [Explanation of symbols]

[0296] 100 Semiconductor device 101 Substrate 102 pixel area 103 Terminal section 104 Terminal section 105 Terminal 106 Terminals 110 pixels 111 Transistor 112 Liquid crystal element 113 Capacitive element 114 Electrode 120 pixels 123 Capacitive element 150 Large board 200 Substrates 201 Base layer 202 Gate electrode 203 Capacitance wiring 204 First insulating layer 205 Semiconductor layer 207 Second insulating layer 208 Contact Hole 210 Pixel electrode 212 Wiring 216 Wiring 217 Electrode 218 Contact Hole 219 Contact Hole 220 Contact Hole 221 Electrode 222 Electrode 225 pixel aperture 250 peeling layer 260 Element Area 800 First Support 808 Fixing Adhesive 810 Second Support 814 Fourth Conductive Layer 820 Sealing material 840 Liquid crystal materials 845 First conductive material 850 pixels 855 Second conductive material 860 Polarizing Filter 880 Input Terminal 900 Peeling Adhesive 902 Temporary support substrate 1201 Display 1202 Support stand 1203 Display section 1211 Display 1212 Display section 1221 Computer 1222 Display section 1223 Keyboard 1224 Touchpad 1225 External connection port 1226 Power plug 1231 Display device 1232 Display section 1233 Keyboard 1234 Speaker 1241 eBooks 1242 Display section 1243 Operation Key 1251 IC Card 1252 Display section 1253 Connection terminal 1301 Glasses body 1303 Cable 1311 Display device 1313 Timing Generator 1316 Display control circuit 1317 Display section 1318 Source line side driver circuit 1319 Gate line side driving circuit 1322 External operation means 206a Source electrode 206b Drain electrode 748a Crystalline semiconductor layer 748b Crystalline semiconductor layer 870a External wiring 870b external wiring 1302a Left eye panel 1302b Right eye panel 1330a sync signal 1330b sync signal 1331a sync signal 1331b Sync signal

Claims

1. A plurality of pixels arranged in a matrix form, One of the pixels is a display device including a transistor, a display element, and a capacitor element, a first conductive layer having a function as a gate electrode of the transistor and a function as a first wiring; a second conductive layer having the same material as the first conductive layer and functioning as one electrode of the capacitor; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; a semiconductor layer having a region located on the first insulating layer and having a channel formation region of the transistor; a third conductive layer having a region located over the semiconductor layer and functioning as one of a source electrode and a drain electrode of the transistor; a fourth conductive layer having a region located on the semiconductor layer and functioning as the other of the source electrode and drain electrode of the transistor and as a second wiring; a fifth conductive layer having a region located on the semiconductor layer and functioning as the other electrode of the capacitor; a second insulating layer having a region in contact with an upper surface of the third conductive layer, a region in contact with an upper surface of the fourth conductive layer, and a region in contact with an upper surface of the fifth conductive layer; the third conductive layer, the fourth conductive layer, and the fifth conductive layer have the same material; the third conductive layer, the fourth conductive layer, and the fifth conductive layer have shapes separated from each other in a plan view; A display device, wherein, in a plan view, the second conductive layer has a region that intersects with the fourth conductive layer.

2. A plurality of pixels arranged in a matrix form, One of the pixels is a display device including a transistor, a display element, and a capacitor element, a first conductive layer having a function as a gate electrode of the transistor and a function as a first wiring; a second conductive layer having the same material as the first conductive layer and functioning as one electrode of the capacitor; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; a semiconductor layer having a region located on the first insulating layer and having a channel formation region of the transistor; a third conductive layer having a region located over the semiconductor layer and functioning as one of a source electrode and a drain electrode of the transistor; a fourth conductive layer having a region located on the semiconductor layer and functioning as the other of the source electrode and drain electrode of the transistor and as a second wiring; a fifth conductive layer having a region located on the semiconductor layer and functioning as the other electrode of the capacitor; a second insulating layer having a region in contact with an upper surface of the third conductive layer, a region in contact with an upper surface of the fourth conductive layer, and a region in contact with an upper surface of the fifth conductive layer; a sixth conductive layer having a region located on the second insulating layer and electrically connected to the third conductive layer through an opening in the second insulating layer; the third conductive layer, the fourth conductive layer, and the fifth conductive layer have the same material; the third conductive layer, the fourth conductive layer, and the fifth conductive layer have shapes separated from each other in a plan view; the second conductive layer has a region intersecting with the fourth conductive layer in a plan view, the sixth conductive layer has a function as a pixel electrode, The second conductive layer has an area overlapping with the sixth conductive layer.

Images