Semiconductor device

Abstract

To provide a semiconductor device that increases a capacitance value while increasing an aperture ratio, and to provide a semiconductor device manufactured at low cost.SOLUTION: A semiconductor device has a transistor, a first insulating film, and a capacitive element including a second insulating film between a pair of electrodes. The transistor has a gate electrode, a gate insulating film provided in contact with the gate electrode, a first oxide semiconductor film provided in contact with the gate insulating film and provided at a position superimposed on the gate electrode, and a source electrode and a drain electrode electrically connected with the first oxide semiconductor film. One of the pair of electrodes of the capacitive element includes a second oxide semiconductor film. The first insulating film is provided on the first oxide semiconductor film. The second insulating film is provided on the second oxide semiconductor film so that the second oxide semiconductor film is sandwiched by the first insulating film and the second insulating film.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device, a display device, and an electronic device using the display device. Alternatively, one aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. One embodiment of the present invention relates to a semiconductor device, a display device, an electronic device, a manufacturing method thereof, In particular, one embodiment of the present invention relates to, for example, a transistor and The present invention relates to a semiconductor device having a capacitive element. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors used are made of amorphous silicon and single crystal silicon formed on a glass substrate. The silicon semiconductor is made of silicon semiconductor such as polycrystalline silicon or polysilicon. Transistors using silicon semiconductors are also used in integrated circuits (ICs).

[0003] In recent years, metal oxides that exhibit semiconducting properties have been used in transistors instead of silicon semiconductors. In this specification, the term "oxide" refers to a metal oxide that exhibits semiconductor properties. For example, zinc oxide or In-Ga- A transistor using a Zn-based oxide is manufactured, and the transistor is used as a pixel switch of a display device. Techniques for using it in switching elements and the like have been disclosed (see Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0005] One embodiment of the present invention provides a semiconductor device including a conductive oxide semiconductor film. Another object of one embodiment of the present invention is to provide a semiconductor device having an increased aperture ratio and an increased capacitance. Another object of the present invention is to provide a semiconductor device having a low manufacturing cost. Another object of the present invention is to provide a novel semiconductor device. One of the objectives is to provide a body device, etc.

[0006] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0007] One embodiment of the present invention is a semiconductor device including a transistor, a first insulating film, and a second insulating film between a pair of electrodes. The semiconductor device has a capacitance element including a gate electrode and a gate voltage a gate insulating film provided in contact with the electrode; and a gate electrode overlapping the gate insulating film. a first oxide semiconductor film provided at a position where the first oxide semiconductor film is folded and a second oxide semiconductor film electrically connected to the first oxide semiconductor film; a source electrode and a drain electrode connected to the second gate electrode; The semiconductor device includes an oxide semiconductor film, a first insulating film is provided on the first oxide semiconductor film, and a second insulating film is provided on the first oxide semiconductor film. The insulating film is formed so that the second oxide semiconductor film is sandwiched between the first insulating film and the second insulating film. The semiconductor device is characterized in that the first oxide semiconductor film is provided over the second oxide semiconductor film.

[0008] Further, the semiconductor device according to any one of the above, further comprising a conductive film, wherein the other of the pair of electrodes of the capacitor includes the conductive film. is also an aspect of the present invention.

[0009] In addition, the transistor is provided in a position overlapping with the first insulating film and the first oxide semiconductor film. The above-described semiconductor device including the second oxide semiconductor film is also one embodiment of the present invention.

[0010] In addition, the transistor overlaps with the first insulating film, the second insulating film, and the first oxide semiconductor film. The above-described semiconductor device having a conductive film provided at a position corresponding to the conductive film is also one embodiment of the present invention.

[0011] In addition, in the semiconductor device of one embodiment of the present invention, a capacitor has a property of transmitting visible light. The semiconductor device is as described above.

[0012] In the above semiconductor device, the first oxide semiconductor film and the second oxide semiconductor film In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, Sn or represents Hf).

[0013] In the above semiconductor device, the first insulating film contains oxygen, and the second insulating film contains hydrogen. It is preferred that it includes

[0014] A display device including the above semiconductor device and a liquid crystal element is also one embodiment of the present invention.

[0015] Further, an electronic device having the above-mentioned semiconductor device, a switch, a speaker, a display unit, or a housing. An apparatus is also an aspect of the present invention. Effect of the Invention

[0016] According to one embodiment of the present invention, a semiconductor device including a conductive oxide semiconductor film is provided. Alternatively, according to one embodiment of the present invention, a semiconductor device having an increased aperture ratio and an increased capacitance can be provided. Alternatively, according to one embodiment of the present invention, a semiconductor device having a low manufacturing cost can be provided. According to one embodiment of the present invention, a novel semiconductor device or the like can be provided. can be provided.

[0017] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0018] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 2] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 3] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 4] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Diagram 5] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 7]1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 10] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 11] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 12] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 13] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 14] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 15] 13A to 13C show structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 16] Electron diffraction pattern of CAAC-OS. [Figure 17] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. [Figure 18] 1A to 1C are diagrams illustrating a method for forming a CAAC-OS film. [Figure 19] A diagram explaining the InMZnO4 crystal. [Figure 20] 1A to 1C are diagrams illustrating a method for forming a CAAC-OS film. [Figure 21] 1A and 1B are a top view and a cross-sectional view illustrating an example of a transistor. [Figure 22] FIG. 1 is a cross-sectional view illustrating an example of a transistor. [Figure 23] FIG. 2 is a diagram for explaining a band structure. [Figure 24] FIG. 1 is a cross-sectional view illustrating an example of a transistor. [Diagram 25] 1A and 1B are a top view illustrating one embodiment of a display device and a circuit diagram illustrating one embodiment of a pixel. [Figure 26] FIG. 1 is a top view illustrating one embodiment of a pixel. [Figure 27] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Figure 28] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Figure 29] FIG. 1 is a top view illustrating one embodiment of a pixel. [Diagram 30] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Diagram 31] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Diagram 32] FIG. 1 is a top view illustrating one embodiment of a pixel. [Diagram 33] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Diagram 34] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Diagram 35] FIG. 1 is a top view illustrating one embodiment of a pixel. [Diagram 36] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Figure 37] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Figure 38] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Figure 39] FIG. 1 is a top view illustrating one embodiment of a pixel. [Diagram 40] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Diagram 41] 1A and 1B are a circuit diagram and a top view illustrating one embodiment of a pixel. [Diagram 42] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Diagram 43] FIG. 1 is a top view illustrating one embodiment of a pixel. [Diagram 44] FIG. 1 is a cross-sectional view showing one embodiment of a pixel. [Diagram 45] FIG. 1 is a circuit diagram showing one form of a pixel. [Figure 46] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 47] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Figure 48] 1A and 1B are diagrams illustrating displays on a display device. [Figure 49] 1A and 1B are diagrams illustrating displays on a display device. [Figure 50] 1A to 1C are diagrams illustrating an example of a display method on a display device. [Figure 51] 1A to 1C are diagrams illustrating an example of a display method on a display device according to an embodiment. [Figure 52] FIG. 2 is a diagram illustrating a display module. [Figure 53] 1A to 1C are diagrams illustrating electronic devices. [Figure 54] 5A to 5C are diagrams for explaining changes in luminance of a display device according to an embodiment. [Figure 55] 11A to 11C are diagrams for explaining changes in visual stimulation according to an embodiment. [Figure 56] FIG. 13 is a diagram for explaining changes in the critical fusion frequency of a subject according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, the embodiment of the present invention will be described in detail with reference to the drawings. One embodiment is not limited to the following description, and may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various changes in form and details may be made. One aspect of the invention is not to be construed as being limited to the description of the following embodiment. In the embodiments described below, the same parts or parts having similar functions are The same symbols or hatch patterns are used in common among different drawings, and their repetition The explanation will be omitted.

[0020] In each figure described in this specification, the size, thickness, or area of ​​each component is not clearly indicated. may be exaggerated for clarity and are not necessarily limited to scale .

[0021] In addition, ordinal numbers such as 1st, 2nd, etc., used in this specification, etc., are used in order to avoid confusion of components. The number is added for convenience and is not intended to be a numerical limit. The terms can be replaced with "second" or "third" as appropriate for explanation.

[0022] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the term to:

[0023] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is low enough, the material may have the properties of an insulator. The boundary between "insulators" and "insulators" is unclear, and it may not be possible to strictly distinguish them. In some cases, the term "semiconductor" in the above can be replaced with "insulator." In some cases, the term "insulator" in the specification can be replaced with "semiconductor." In some cases, the term "insulator" in this specification can be rephrased as "semi-insulator." .

[0024] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is high enough, it may have the properties of a "conductor". The boundary between the term "conductor" and the term "electrical conductor" is unclear, and it may not be possible to strictly distinguish between them. In some cases, the term "semiconductor" in the above can be replaced with "conductor." The term "conductor" in the specification etc. may be replaced with "semiconductor" in some cases.

[0025] The functions of the "source" and "drain" of a transistor are different for transistors of different polarities. When using a current source, or when the direction of the current changes during circuit operation, For this reason, in this specification, the terms "source" and "drain" are used interchangeably. It is possible to use it.

[0026] In this specification, patterning refers to a process using photolithography. However, the patterning is not limited to the photolithography process. A process other than the photolithography process can also be used. The mask is to be removed after the etching process.

[0027] In this specification and the like, a silicon oxynitride film is a film having a composition containing more oxygen than nitrogen. It refers to a film with a high content of oxygen, preferably 55 atomic % to 65 atomic % and 1 % to 20 atomic %, silicon is 25 atomic % to 35 atomic %, hydrogen is 0.1 atomic % The silicon oxide nitride film is a film containing silicon dioxide at a concentration of 10 atomic % or more. The composition of the film is that it contains more nitrogen than oxygen, and preferably contains 55 atomic % or more of nitrogen. 65 atomic % or less, oxygen is 1 atomic % to 20 atomic %, silicon is 25 atomic % to 35 atomic % % or less, and hydrogen at a concentration in the range of 0.1 atomic % to 10 atomic %.

[0028] (Embodiment 1) In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. Reveal.

[0029] <Example of semiconductor device configuration> FIG. 1A is a top view of a semiconductor device of one embodiment of the present invention, and FIG. ) corresponds to the cutting lines between dashed lines AB, dashed lines CD, and dashed lines EF. In FIG. 1(A), in order to avoid complication, the semiconductor device In the figure, some of the components of the device (such as the gate insulating film) are omitted. In the top view, some of the components are omitted in the following drawings as in FIG. 1(A). In some cases, the figures are shown as follows.

[0030] The dashed line AB in FIG. 1A indicates the channel length direction of the transistor 150. The dashed line EF indicates the channel width direction of the transistor 150. In this case, the channel length direction of the transistor is the direction from the source (source region or source electrode) The direction in which carriers move between the drain and the diode (drain region or drain electrode) is called the drain-gate. The channel width direction is perpendicular to the channel length direction in a plane parallel to the substrate. It means direction.

[0031] The semiconductor device illustrated in FIGS. 1A and 1B includes a transistor including a first oxide semiconductor film 110. The capacitor 160 includes a pair of electrodes and an insulating film between the electrodes. In the element 160, one of the pair of electrodes is the second oxide semiconductor film 111, and The other is a conductive film 120 .

[0032] The transistor 150 includes a gate electrode 104 on a substrate 102 and a gate insulating film on the gate electrode 104. The insulating film 108 functions as a gate insulating film, and the gate electrode 104 overlaps the insulating film 108. The first oxide semiconductor film 110 at the position where the source electrode 1 is formed is disposed. In other words, the transistor 150 has a first The first oxide semiconductor film 110 and a gate insulating film provided in contact with the first oxide semiconductor film 110. an insulating film 108 that functions as a film; The gate electrode 104 is provided in a position overlapping with the first oxide semiconductor film 110. The source electrode 112a and the drain electrode 112b are electrically connected to the A transistor 150 shown in FIGS. 1A and 1B has a so-called bottom-gate structure.

[0033] In addition, on the transistor 150, more specifically, the first oxide semiconductor film 110, the source Insulating films 114, 116, and 118 are formed on the electrode 112a and the drain electrode 112b. The insulating films 114, 116, and 118 function as protective insulating films for the transistor 150. The insulating films 114, 116, and 118 have an opening that reaches the drain electrode 112b. A conductive film 120 is formed on the insulating film 118 so as to cover the opening 142. The conductive film 120 has a function as, for example, a pixel electrode.

[0034] The capacitor 160 is a first electrode having a function as one of a pair of electrodes over the insulating film 116. The second oxide semiconductor film 111 and the second oxide semiconductor film 112 function as a dielectric film on the second oxide semiconductor film 111. The insulating film 118 is provided so as to overlap with the second oxide semiconductor film 111 with the insulating film 118 interposed therebetween. and a conductive film 120 that functions as the other electrode of the pair of electrodes. That is, the conductive film 120 functions as a pixel electrode and an electrode of a capacitor element.

[0035] Note that the first oxide semiconductor film 110 functions as a channel region of the transistor 150. The second oxide semiconductor film 111 has a region corresponding to a pair of electrodes of the capacitor 160. Therefore, the second oxide semiconductor film 110 functions as one of the electrodes. The resistivity of the first oxide semiconductor film 110 is lower than that of the second oxide semiconductor film 111. The first oxide semiconductor film 110 and the second oxide semiconductor film 111 preferably contain the same metal element. By configuring the second oxide semiconductor film 111 to contain the same metal element, For example, it is possible to share equipment (such as deposition equipment and processing equipment), thereby reducing manufacturing costs. It is possible.

[0036] In addition, a wiring formed of a separate metal film or the like may be connected to the second oxide semiconductor film 111. For example, the semiconductor device shown in FIG. 1 may be used as a transistor and a capacitor in a pixel portion of a display device. In the case of using the second oxide, the wiring, the gate wiring, etc. are formed from a metal film, and the second oxide is applied to the metal film. Alternatively, the semiconductor layer 111 may be connected to the gate wiring. By forming the wiring with a metal film, it is possible to reduce the wiring resistance, which reduces signal delay. etc. can be suppressed.

[0037] In addition, the capacitor 160 has a light-transmitting property. The oxide semiconductor film 111, the conductive film 120, and the insulating film 118 each have a light-transmitting property. In this way, the capacitance element 160 is made of a light-transmitting material. It can be formed large (in a large area) in areas other than where transistors are formed. Therefore, it is possible to obtain a semiconductor device having an increased aperture ratio and an increased capacitance value. Therefore, a semiconductor device with excellent display quality can be obtained.

[0038] Note that the insulating film 118 provided over the transistor 150 and used for the capacitor 160 An insulating film containing at least hydrogen is used as the insulating film for the transistor 150. The insulating film 107 and the insulating films 114 and 116 provided on the transistor 150 include: An insulating film containing at least oxygen is used. The insulating film used for the transistor 150 and the insulating film used under the capacitor element 160 By using the insulating film having the above-described structure as the insulating film, the first oxide of the transistor 150 can be obtained. The resistivity of the oxide semiconductor film 110 and the second oxide semiconductor film 111 of the capacitor 160 is Can be controlled.

[0039] In addition, an insulating film used in the capacitor 160, the transistor 150, and the capacitor 160 The insulating film used thereon can be configured as follows to improve the flatness of the conductive film 120. Specifically, the insulating films 114 and 116 are provided over the first oxide semiconductor film 110. The insulating film 118 is formed by bonding the second oxide semiconductor film 111 to the insulating film 116 and the insulating film 118. Thus, the second oxide semiconductor film 111 is provided so as to be sandwiched therebetween. By this, openings are formed in the insulating films 114 and 116 at positions overlapping with the second oxide semiconductor film 111. Since the resistivity of the second oxide semiconductor film 111 can be controlled without providing the conductive film 12 Therefore, by adopting such a configuration, for example, in FIG. When the semiconductor device shown in FIG. 1 is used as a transistor and a capacitor in a pixel portion of a liquid crystal display device, The alignment of the liquid crystal formed on the film 120 can be improved.

[0040] The conductive film 120 was formed and etched at the same time. 20a may be provided so as to overlap with the channel region of the transistor. 2(A). For example, the conductive film 120a is formed at the same time as the conductive film 120. Since they are etched simultaneously and formed at the same time, they have the same material. However, one aspect of the embodiment of the present invention is not limited to this. The conductive film 120a may be formed in a process different from that of the conductive film 120. 0a has an area overlapping with the channel area of ​​the transistor. 20a functions as a second gate electrode of the transistor. The conductive film 120a may be connected to the gate electrode 104. Alternatively, the conductive film 120a may be It is not connected to the gate electrode 104 and a signal or potential different from that of the gate electrode 104 is supplied. With such a configuration, the current driving capability of the transistor 150 can be increased. In this case, the gate insulating film for the second gate electrode is These become insulating films 114, 116, and 118.

[0041] In addition, the second oxide semiconductor film 111 and the second oxide semiconductor film 112 are formed and etched at the same time. The second oxide semiconductor film 111a is formed so as to overlap with a channel region of the transistor. An example of this case is shown in FIG. The second oxide semiconductor film 111 is formed and etched at the same time. Therefore, the increase in process steps can be suppressed. However, one aspect of the embodiment of the present invention is not limited thereto. The oxide semiconductor film 111a may be formed in a process different from that for forming the second oxide semiconductor film 111. The oxide semiconductor film 111a is a first oxide semiconductor film that serves as a channel region of the transistor 150. The second oxide semiconductor film 111a has an area overlapping with the oxide semiconductor film 110. The second oxide serves as a second gate electrode of the transistor 150. The oxide semiconductor film 111a may be connected to the gate electrode 104. The compound semiconductor film 111a is not connected to the gate electrode 104 and is different from the gate electrode 104. A signal or a different potential may be supplied to the second gate. Since the insulating films 114 and 116 serve as gate insulating films for the gate electrodes, such a structure is adopted. As a result, the current driving capability of the transistor 150 is higher than that of the transistor shown in FIG. It can be further improved.

[0042] Note that in the transistor 150, the first oxide semiconductor film 110 serves as a channel region. Since the second oxide semiconductor film 111 is used as the second oxide semiconductor film 112, the second oxide semiconductor film 111 has a higher resistivity than the second oxide semiconductor film 111. The oxide semiconductor film 111 functions as an electrode. It has a comparatively low resistivity.

[0043] Here, the resistivity of the first oxide semiconductor film 110 and the second oxide semiconductor film 111 can be controlled. The method will be described below.

[0044] <Method for controlling resistivity of oxide semiconductor film> Acids that can be used for the first oxide semiconductor film 110 and the second oxide semiconductor film 111 The oxide semiconductor film has resistance due to oxygen vacancies and / or impurity concentrations such as hydrogen and water in the film. The first oxide semiconductor film 110 is a semiconductor material whose resistivity can be controlled. and a treatment for increasing oxygen vacancies and / or an impurity concentration in the second oxide semiconductor film 111. By selecting a treatment that reduces oxygen deficiency and / or impurity concentration, The resistivity of the nitride semiconductor film can be controlled.

[0045] Specifically, the second oxide semiconductor film 111 functioning as an electrode of the capacitor 160 The oxide semiconductor film is subjected to a plasma treatment to increase oxygen vacancies in the oxide semiconductor film. and / or by increasing impurities such as hydrogen and water in the oxide semiconductor film. In this way, an oxide semiconductor film having high carrier density and low resistivity can be obtained. An insulating film containing hydrogen is formed in contact with the semiconductor film, and the insulating film containing hydrogen, for example, insulating film 11 By diffusing hydrogen from 8 into the oxide semiconductor film, the carrier density is increased and the resistivity is reduced. The second oxide semiconductor film 111 can be formed as a low-temperature oxide semiconductor film. Before the process of increasing oxygen vacancies in the film or diffusing hydrogen, the film acts as a semiconductor. After this step, it functions as a conductor.

[0046] The above-mentioned plasma treatment is typically carried out using a rare gas (He, Ne, Ar, Kr A plasma treatment is performed using a gas containing one or more selected from the group consisting of Xe, hydrogen, and nitrogen. More specifically, plasma treatment in an Ar atmosphere, a mixed gas atmosphere of Ar and hydrogen, etc. Plasma treatment in an atmosphere of argon, plasma treatment in an ammonia atmosphere, and a mixture of Ar and ammonia Examples of such a plasma treatment include a plasma treatment in a mixed gas atmosphere and a plasma treatment in a nitrogen atmosphere. By the above plasma treatment, the oxide semiconductor film is formed into a lattice from which oxygen has been desorbed (or an oxygen The oxygen vacancy is a factor in generating carriers. In addition, in the vicinity of the oxide semiconductor film, more specifically, under or on the oxide semiconductor film, When hydrogen is supplied from the insulating film adjacent to the upper side, the oxygen vacancies and hydrogen combine to form It may generate electrons, which are carriers.

[0047] The insulating film 118 may be, for example, an insulating film containing hydrogen, in other words, an insulating film capable of releasing hydrogen. By using an insulating film capable of being formed in the second oxide semiconductor film 1, typically a silicon nitride film, The insulating film capable of releasing hydrogen is The hydrogen concentration is 1×10 22 atoms / cm 3 It is preferable that the absolute value is equal to or greater than this. The insulating film is formed in contact with the second oxide semiconductor film 111, 1 can effectively incorporate hydrogen.

[0048] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. In this case, oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the portion from which oxygen has been desorbed). When hydrogen enters the electron carrier, it can generate electrons. When it bonds with oxygen, which bonds with a metal atom, it may generate electrons, which act as carriers. Therefore, the second oxide semiconductor film 111 provided in contact with the insulating film containing hydrogen The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film 110.

[0049] In order to obtain an oxide semiconductor film with low resistivity, an ion implantation method, an ion doping method, or the like may be used. Using techniques such as plasma immersion ion implantation, hydrogen, boron, and lithium are implanted. Nitrogen or nitrogen may be implanted into the oxide semiconductor film.

[0050] On the other hand, the first oxide semiconductor film 110 functioning as a channel region of the transistor 150 By providing the insulating films 107, 114, and 116, the insulating films 106 and 107 containing hydrogen are At least one of the insulating films 107, 114, and 116 contains oxygen. In other words, by applying an insulating film capable of releasing oxygen, the first oxygen Oxygen can be supplied to the first oxide semiconductor film 110. The oxide semiconductor film 110 becomes an oxide semiconductor film with high resistivity because oxygen vacancies in the film or at the interface are filled. The insulating film capable of releasing oxygen may be, for example, a silicon oxide film or A silicon oxynitride film can be used.

[0051] In this manner, the insulating film in contact with the first oxide semiconductor film 110 and the second oxide semiconductor film 111 By changing the composition of the insulating film, the resistivity of the oxide semiconductor film can be controlled. The insulating film 106 may be formed using a material similar to that of the insulating film 118. By using silicon nitride, oxygen released from the insulating film 107 is absorbed into the gate electrode 104. It is possible to suppress the supply and oxidation of oxygen.

[0052] The oxide semiconductor film in which the oxygen vacancies are filled and the hydrogen concentration is reduced can be highly purified and intrinsic. The oxide semiconductor film can be said to be a highly purified intrinsic oxide semiconductor film. The carrier density of the semiconductor film is 8×10 11 pieces / cm 3 Less than 1 x 10 11 / c m 3 less than 1×1010 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 The oxide semiconductor film that is highly purified and intrinsic or substantially highly purified and intrinsic is In addition, the carrier density can be reduced because there are fewer carrier generation sources. Since a highly pure or substantially highly intrinsic oxide semiconductor film has a low density of defect states, The density of the doped states can be reduced.

[0053] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a significantly low off-state current. Very small, with a channel width of 1×10 6 Even if the device has a channel length of 10 μm, When the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, The current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1×10 -13 A and below Therefore, the above-mentioned high purity intrinsic or substantially high purity intrinsic The first oxide semiconductor film 110 is used for the channel region. The transistor 150 has small fluctuations in electrical characteristics and is highly reliable.

[0054] The first oxide semiconductor film 110 in which the channel region of the transistor 150 is formed is Specifically, the first oxide semiconductor film 110 In this study, secondary ion mass spectrometry (SIMS) was used. The hydrogen concentration obtained by spectrometry was calculated as 2×10 20 atoms / cm 3 Less than or equal to 5×10 19 atoms / cm 3Less than or equal to 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 1 8 atoms / cm 3 Less than or equal to 5×10 17 atoms / cm 3 The following is further Preferably 1 x 10 16 atoms / cm 3 The following applies.

[0055] On the other hand, the second oxide semiconductor film 111 functioning as an electrode of the capacitor 160 is The oxide semiconductor film 110 has a higher hydrogen concentration and / or oxygen vacancy and a lower resistivity than the oxide semiconductor film 110. The second oxide semiconductor film 111 has a hydrogen concentration of 8×10 19 ato ms / cm 3 More than 1×10 20 atoms / cm 3 More than 5, preferably ×10 20 atoms / cm 3 In addition, compared with the first oxide semiconductor film 110, The hydrogen concentration in the second oxide semiconductor film 111 is preferably 2 times or more, more preferably 10 times or more. The resistivity of the second oxide semiconductor film 111 is 1 / 100 that of the first oxide semiconductor film 110. Resistivity 1×10 -8 1×10 times more -1 It is preferable that the concentration is less than 1×. 10 -3 Ωcm or more 1×10 4 Ωcm, and more preferably a resistivity of 1×10 -3 Ω cm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0056] Here, other components of the semiconductor device shown in FIG. 1(A) and FIG. 1(B) will be described in detail. The following is an explanation of this.

[0057] <Substrate> There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and sa A fire substrate or the like may be used as the substrate 102. Also, a substrate made of silicon or silicon carbide may be used. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium It is also possible to use an SOI substrate, etc., and a semiconductor element is provided on such a substrate. A substrate made of a ferroelectric material may be used as the substrate 102. A glass substrate is used as the substrate 102. In the case of 6th generation (1500mm x 1850mm), 7th generation (1870mm x 2200mm m), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800m By using large area substrates such as 10th generation (2950mm x 3400mm), In addition, a flexible substrate is used as the substrate 102, and a display device having a flexible The transistor 150, the capacitor element 160, and the like may be formed directly on the conductive substrate.

[0058] In addition to these, various substrates can be used as the substrate 102 to form transistors. The type of the substrate is not limited to a specific one. Plastic substrate, metal substrate, stainless steel substrate, stainless steel foil Substrate with tungsten foil, tungsten substrate, substrate with tungsten foil, flexible substrate, Examples include laminated films, paper containing fibrous materials, and base films. Glass substrates Examples of such glass include barium borosilicate glass, aluminoborosilicate glass, and soda glass. An example of a flexible substrate is polyethylene terephthalate (PE T), polyethylene naphthalate (PEN), and polyethersulfone (PES) are typical examples. The materials used for bonding include plastics that can be used for bonding, and synthetic resins that have flexibility, such as acrylic. Examples of the film include polypropylene, polyester, polyvinyl fluoride, or poly Examples of the base film include polyester, polyamide, and poly Imide, inorganic deposition film, or paper. In particular, semiconductor substrates, single crystal substrates, or By manufacturing transistors using SOI substrates, etc., the characteristics, size, or shape To manufacture transistors with small size, high current capability, and little variation in the By configuring a circuit using such transistors, the power consumption of the circuit can be reduced. This allows for high circuit integration.

[0059] In addition, a transistor is formed on one substrate, and then the transistor is transferred to another substrate. The transistor may be disposed on a different substrate by transferring the transistor to another substrate. Examples of the plate include a substrate on which the above-mentioned transistors can be formed, a paper substrate, Cellophane substrate, stone substrate, wood substrate, cloth substrate (natural fibers (silk, cotton, hemp), synthetic fibers (na iron, polyurethane, polyester) or regenerated fiber (acetate, cupra, These include polyester (including recycled polyester), leather substrates, and rubber substrates. By using a substrate, it is possible to form transistors with good characteristics and low power consumption. It is possible to form a thin film, to manufacture a device that is durable, to make it heat resistant, and to make it lighter or thinner. do.

[0060] <First Oxide Semiconductor Film and Second Oxide Semiconductor Film> The first oxide semiconductor film 110 and the second oxide semiconductor film 111 are made of at least indium. In, zinc (Zn) and M (Al, Ti, Ga, Y, Zr, La, Ce, Nd, S It is preferable that the film contains a metal such as In or Hf, and the film is represented by In-M-Zn oxide. In addition, in order to reduce variation in electrical characteristics of a transistor using the oxide semiconductor, In addition, it is preferable to include a stabilizer.

[0061] The stabilizer includes the metals listed above under M, such as gallium (Ga), sulphuric acid (SA), and gallium (Ga). Sn, Hf, Al, or Zr Other stabilizers include the lanthanide lanthanum (La). , Cerium (Ce), Praseodymium (Pr), Neodymium (Nd), Samarium (Sm), Europium (Eu), Gadolinium (Gd), Terbium (Tb), Dysprosium ( Dy), Holmium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), lutetium (Lu), etc.

[0062] The oxide semiconductors constituting the first oxide semiconductor film 110 and the second oxide semiconductor film 111 Examples of the oxides include In-Ga-Zn oxides, In-Al-Zn oxides, and In-Sn- Zn-based oxide, In-Hf-Zn-based oxide, In-La-Zn-based oxide, In-Ce-Z n-type oxides, In-Pr-Zn-type oxides, In-Nd-Zn-type oxides, In-Sm-Zn oxides, In-Eu-Zn oxides, In-Gd-Zn oxides, In-Tb-Zn oxides Oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, In-Er-Zn oxide oxides, In-Tm-Zn oxides, In-Yb-Zn oxides, In-Lu-Zn ​​oxides In-Sn-Ga-Zn oxides, In-Hf-Ga-Zn oxides, In-Al- Ga-Zn oxide, In-Sn-Al-Zn oxide, In-Sn-Hf-Zn oxide Examples of the oxides that can be used include In-Hf-Al-Zn oxides.

[0063] In this case, the In-Ga-Zn oxide is an oxide having In, Ga, and Zn as main components. The ratio of In, Ga, and Zn does not matter. Metal elements other than n may be present.

[0064] The first oxide semiconductor film 110 and the second oxide semiconductor film 111 are each formed of the above oxide The first oxide semiconductor film 110 and the second oxide semiconductor film 111 may have the same metal element. By using the same metal element for the semiconductor film 111, the manufacturing cost can be reduced. For example, the manufacturing cost can be reduced by using metal oxide targets of the same metal composition. In addition, by using a metal oxide target with the same metal composition, the oxide can be The etching gas or etching solution can be commonly used when processing the semiconductor film. However, the first oxide semiconductor film 110 and the second oxide semiconductor film 111 may be formed from the same Even if they have the same metal elements, the composition may be different. For example, transistors and capacitors During the manufacturing process of the semiconductor device, metal elements in the film may be released, resulting in a different metal composition.

[0065] When the first oxide semiconductor film 110 is an In-M-Zn oxide, the elements of In and M are The ratio of the number of atoms is preferably 2.0 atomic % when the sum of In and M is 100 atomic %. 5 atomic % or more, M is less than 75 atomic %, and more preferably In is 34 atomic%, and M is less than 66 atomic%.

[0066] The first oxide semiconductor film 110 has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using a nitride semiconductor, the off-state current of the transistor 150 can be reduced.

[0067] The thickness of the first oxide semiconductor film 110 is 3 nm to 200 nm, preferably 3 nm. The thickness is set to 100 nm or more, and more preferably 3 nm or more and 50 nm or less.

[0068] The first oxide semiconductor film 110 is an In-M-Zn oxide (wherein M is Al, Ti, Ga, Y, or Z). r, La, Ce, Nd, Sn or Hf) to form an In-M-Zn oxide film. The atomic ratio of the metal elements in the sputtering target used in the present invention satisfies In≧M and Zn≧M. The atomic ratio of the metal elements in such a sputtering target is preferably as follows: In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3: Examples include In:M:Zn=1:3:4, In:M:Zn=1:3:6, etc. The atomic ratio of the first oxide semiconductor film 110 to be formed is determined by subtracting the above-mentioned steps from the atomic ratio of the first oxide semiconductor film 110 as an error. The atomic ratio of metal elements contained in the sputtering target can vary by ±40%. include.

[0069] As the first oxide semiconductor film 110, an oxide semiconductor film with low carrier density is used. For example, the first oxide semiconductor film 110 has a carrier density of 1×10 17 pieces / cm 3 below, Preferably 1 x 10 15 pieces / cm 3 Less than 1×10, more preferably 13 pieces / cm 3 below , more preferably 1×10 11 pieces / cm 3 The following oxide semiconductor film is used.

[0070] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of a transistor, the carrier density of the first oxide semiconductor film 110 is The impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. are appropriately adjusted. It is preferable to set the above.

[0071] The first oxide semiconductor film 110 contains silicon or carbon, which is one of the Group 14 elements. If the oxide semiconductor film 110 is filled with oxygen, oxygen vacancies in the first oxide semiconductor film 110 increase, causing the first oxide semiconductor film 110 to become n-type. Therefore, the concentration of silicon or carbon in the first oxide semiconductor film 110 (secondary ion mass The concentration obtained by the analytical method is 2 x 10 18 atoms / cm 3 Below, preferably 2x 10 17 atoms / cm 3 The following applies.

[0072] In addition, the first oxide semiconductor film 110 was subjected to secondary ion mass spectrometry. The concentration of alkaline metals or alkaline earth metals is 1×10 18 atoms / cm 3 Below is good Preferably 2 x 10 16atoms / cm 3 The following are alkali metals and alkaline earth metals: When a metal is bonded to an oxide semiconductor, it may generate carriers, which may cause the off-state current of a transistor to decrease. Therefore, the alkali metal of the first oxide semiconductor film 110 may be increased. Alternatively, it is preferable to reduce the concentration of alkaline earth metals.

[0073] In addition, when the first oxide semiconductor film 110 contains nitrogen, electrons that serve as carriers are generated. This increases the carrier density and makes it easier to convert to n-type. A transistor using this oxide semiconductor tends to be normally on. In the film, it is preferable that nitrogen is reduced as much as possible. For example, secondary ion mass spectrometry The nitrogen concentration obtained by the analytical method is 5 x 10 18 atoms / cm 3 It is preferable to do the following: I wish.

[0074] The first oxide semiconductor film 110 may have a non-single crystal structure, for example. For example, CAAC-OS (C Axis Aligned-Crystall ine oxide semiconductor), polycrystalline structure, microcrystalline structure (described later) Among non-single crystal structures, the amorphous structure has the highest defect level density. Among them, CAAC-OS has the lowest density of defect states.

[0075] The first oxide semiconductor film 110 may have, for example, an amorphous structure. For example, the atomic arrangement of the membrane is disordered and does not have any crystalline components. The oxide film, for example, has a completely amorphous structure and does not have any crystalline parts.

[0076] Note that the first oxide semiconductor film 110 may have an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, or a crystalline structure region. The film may be a mixed film having two or more of the structure regions, the CAAC-OS region, and the single crystal structure. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CA In some cases, the crystal structure may have two or more regions, either an AC-OS region or a single crystal structure region. In addition, the mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CA When the material has a laminated structure of two or more regions of either an AC-OS region or a single crystal structure region There is.

[0077] <Insulating film> The insulating films 106 and 107 functioning as the gate insulating film of the transistor 150 are Plasma CVD (CVD: Chemical Vapor Deposition) method, By sputtering or the like, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, Silicon nitride film, aluminum oxide film, hafnium oxide film, yttrium oxide film, dioxide film ZrO2 film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide film The insulating film may include at least one of a cerium oxide film and a neodymium oxide film. It is possible to form the insulating films 106 and 107 in a laminated structure, but to form a single insulating film selected from the above-mentioned materials. A layer insulating film may be used.

[0078] The insulating film 106 functions as a blocking film that suppresses oxygen permeation. For example, , an excess of oxygen is present in the insulating films 107, 114, and 116 and / or the first oxide semiconductor film 110. When oxygen is supplied, the insulating film 106 can suppress oxygen permeation.

[0079] Note that the first oxide semiconductor film 110 functioning as a channel region of the transistor 150 The insulating film 107 in contact with the It is more preferable to have a region containing an excess of oxygen (oxygen excess region). The insulating film 107 is an insulating film capable of releasing oxygen. To provide the extra region, for example, the insulating film 107 may be formed in an oxygen atmosphere. Alternatively, oxygen may be introduced into the insulating film 107 after it has been formed to form an oxygen-excess region. The methods include ion implantation, ion doping, and plasma immersion ion implantation. , plasma treatment, etc. can be used.

[0080] Furthermore, when hafnium oxide is used for the insulating films 106 and 107, the following effects are obtained. Hafnium oxide has a higher dielectric constant than silicon oxide and silicon oxynitride. Therefore, compared to the case where silicon oxide is used, the thickness of the insulating films 106 and 107 can be made larger. Therefore, the leakage current due to the tunnel current can be reduced. Furthermore, it is possible to realize a transistor with a small capacitance. Hafnium oxide has a higher dielectric constant than hafnium oxide having an amorphous structure. To make a transistor with a small off-state current, hafnium oxide with a crystalline structure is used. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited to these.

[0081] In this embodiment, a silicon nitride film is formed as the insulating film 106, and the insulating film 107 is The silicon oxide film is formed as a result of the above. The silicon nitride film has a lower dielectric constant than the silicon oxide film. The film thickness required to obtain the same capacitance as a silicon oxide film is large, so it is suitable for transistors. The insulating film 108 that functions as the gate insulating film of the transistor 150 includes a silicon nitride film. This makes it possible to physically thicken the insulating film. By suppressing the voltage drop and improving the dielectric strength, electrostatic damage to the transistor 150 is suppressed. It is possible.

[0082] <Gate electrode, source electrode and drain electrode> The gate electrode 104, the source electrode 112a, and the drain electrode 112b can be formed of Materials that can be used include aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, Metals such as tungsten, molybdenum, silver, tantalum, or tungsten, or materials mainly composed of these metals The alloy may be used as a single layer or a multilayer structure. Two-layer structure with titanium film laminated on tungsten film, two-layer structure with titanium film laminated on tungsten film , a two-layer structure with a copper film laminated on a molybdenum film, and an alloy film containing molybdenum and tungsten A two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film. Two-layer structure: a titanium film or titanium nitride film, and a layer of titanium or titanium nitride on top of the titanium film or titanium nitride film. An aluminum or copper film is laminated, and then a titanium or titanium nitride film is formed on top of it. A three-layer structure consisting of a molybdenum film or molybdenum nitride film and a molybdenum film or molybdenum nitride film. An aluminum film or copper film is laminated on the molybdenum film, and a molybdenum film is further laminated on the aluminum film or copper film. Alternatively, there is a three-layer structure in which a molybdenum nitride film is formed. When the drain electrode 112b has a three-layer structure, the first and third layers are made of titanium and titanium nitride. Molybdenum, tungsten, alloys containing molybdenum and tungsten, molybdenum and zinc A layer of alloy containing zinc or molybdenum nitride is formed, and the second layer is made of copper, aluminum, It is possible to form a film made of a low resistance material such as aluminum, gold or silver, or an alloy of copper and manganese. Indium tin oxide, indium oxide containing tungsten oxide, oxide Indium zinc oxide containing tungsten, indium oxide containing titanium oxide, titanium oxide Indium tin oxide containing tungsten, indium zinc oxide, indium with silicon oxide doping Alternatively, a light-transmitting conductive material such as aluminum tin oxide may be used. Materials that can be used for the source electrode 112a and the drain electrode 112b include, for example, It can be formed by using a sputtering method.

[0083] <Conductive film> The conductive film 120 functions as a pixel electrode. A material that is transparent to visible light may be used. Specifically, indium (In), It is advisable to use a material containing one of zinc (Zn) and tin (Sn). The film 120 may be, for example, indium oxide containing tungsten oxide, tungsten oxide, or the like. Indium zinc oxide containing titanium oxide, Indium oxide containing titanium oxide Indium Tin Oxide (ITO) ), indium zinc oxide, indium tin oxide with added silicon oxide, etc. The conductive film 120 may be formed by sputtering, for example. It can be formed using the ring method.

[0084] <Protective insulating film> The insulating films 114, 116, and 118 function as protective insulating films for the transistor 150. is a silicon oxide film, a silicon oxynitride film, etc., which is formed by plasma CVD method, sputtering method, etc. film, silicon oxynitride film, silicon nitride film, aluminum oxide film, hafnium oxide film, oxide Yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film An insulating film containing one or more of a sodium film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film. can be used, respectively.

[0085] In addition, the first oxide semiconductor film 110 serving as a channel region of the transistor 150 The insulating film 114 in contact with the semiconductor substrate 112 is preferably an oxide insulating film capable of releasing oxygen. In other words, an insulating film capable of releasing oxygen is one having a stoichiometric composition. The insulating film has a region that contains oxygen in excess of the insulating film (oxygen excess region). To provide an oxygen excess region in the insulating film 114, for example, the insulating film 114 is formed in an oxygen atmosphere. Alternatively, oxygen may be introduced into the insulating film 114 after it is formed to form an oxygen excess region. The oxygen introduction method includes ion implantation, ion doping, plasma immersion, etc. The ion implantation method, plasma treatment, etc. can be used.

[0086] By using an insulating film capable of releasing oxygen as the insulating film 114, Oxygen is transferred to the first oxide semiconductor film 110 which functions as a channel region of the transistor 150. It is possible to reduce the amount of oxygen vacancies in the first oxide semiconductor film 110. The surface temperature of the film measured by TDS analysis is 100°C. The amount of oxygen molecules released in the range of 700℃ or 100℃ to 500℃ , 1.0×10 18 molecule / cm 3 By using the insulating film, the first oxide semiconductor film The amount of oxygen vacancies contained in 110 can be reduced.

[0087] In addition, it is preferable that the insulating film 114 has a small amount of defects. Typically, the insulating film 114 has a small amount of defects as determined by ESR measurement. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 3×10 17 spins / cm 3 This is because the insulating film 114 is preferably If the density of defects is high, oxygen is bound to the defects, and the oxygen in the insulating film 114 is reduced. In addition, the insulating film 114 and the first oxide semiconductor film 1 It is preferable that the amount of defects at the interface with 10 is small. Typically, it is determined by ESR measurement that The g value derived from defects in the first oxide semiconductor film 110 is 1.89 or more and 1.96 or less. The signal spin density is 1×10 17 spins / cm 3 or below the detection limit. It is preferable.

[0088] In the insulating film 114, all of the oxygen that has entered the insulating film 114 from the outside is Alternatively, some of the oxygen that has entered the insulating film 114 from the outside may move to the outside of the insulating film 114. In some cases, oxygen may remain in the insulating film 114. In addition, oxygen may enter the insulating film 114 from the outside, and When oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, In some cases, oxygen transfer may occur due to the insulating film 114 being made of an oxide that can transmit oxygen. When the oxide insulating film is formed, oxygen desorbed from the insulating film 116 provided on the insulating film 114 can be transferred to the first oxide semiconductor film 110 through the insulating film 114.

[0089] The insulating film 114 is formed using an oxide insulating film having a low density of states caused by nitrogen oxides. Note that the density of states due to the nitrogen oxides can be determined by the valence The energy of the top of the electron band (E V_OS ) and the conduction band minimum energy of the oxide semiconductor film (E C_OS ) may be formed between the oxide insulating film. Silicon oxynitride film with low nitrogen oxide emission or aluminum oxynitride film with low nitrogen oxide emission A thin film or the like can be used.

[0090] In addition, the silicon oxynitride film, which emits a small amount of nitrogen oxide, is This membrane releases more ammonia than nitrogen oxides, and typically releases ammonia. The amount of molecules released is 1×10 18 molecule / cm 3 5×10 or more 19 molecule / cm 3 The following is the result. The amount of ammonia released is determined when the surface temperature of the membrane is 50°C or higher and 650°C or lower, preferably 50°C or lower. The amount released is determined by heat treatment at or above 550°C or below.

[0091] Nitrogen oxides (NO x , x is greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2), typically NO2 or NO forms a level in the insulating film 114. The level is The insulating film 110 is located in the energy gap of the semiconductor film 110. When the oxide semiconductor layer 114 diffuses to the interface between the oxide semiconductor layer 114 and the first oxide semiconductor layer 110, the level is transferred to the insulating film 114 side. As a result, the trapped electrons may be trapped in the insulating film 114. Since the oxide semiconductor film 110 and the first oxide semiconductor film 110 remain in the vicinity of the interface, the threshold voltage of the transistor is It shifts in the positive direction.

[0092] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxide contained in the insulating film 216 reacts with ammonia contained in the insulating film 216 during the heat treatment. Therefore, the amount of nitrogen oxide contained in the insulating film 114 is reduced. Electrons are less likely to be trapped at the interface between the first oxide semiconductor film 110 and the second oxide semiconductor film 110.

[0093] By using the oxide insulating film as the insulating film 114, the threshold voltage of the transistor It is possible to reduce the shift in the electrical characteristics of the transistor. can.

[0094] Heat treatment in the manufacturing process of a transistor is typically performed at a temperature of less than 400° C. or less than 375° C. The insulating film 114 is heated for 10 min (preferably, 340° C. or more and 360° C. or less). In the spectrum obtained by ESR measurement below 0 K, the g value is 2.037 or more and 2.03 a first signal with a g value of 0.9 or less, a second signal with a g value of 0.25 or more and 0.3 or less, and A third signal with a g value between 1.964 and 1.966 is observed. The split width of the null and the second signal, and the split width of the second signal and the third signal The split width is about 5 mT in the X-band ESR measurement. The g value is 2.037. The first signal has a g value of 2.039 or more, and the second signal has a g value of 2.001 or more, and The sum of the spin densities of the third signal with g values ​​between 1.964 and 1.966 The total is 1 x 10 18 spins / cm 3 is less than 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 is less than.

[0095] In addition, the g value in the ESR spectrum below 100K is 2.037 to 2.039. The first signal has a g value of 2.001 to 2.003, and the second signal has a g value of 1 The third signal, between .964 and 1.966, is nitrogen oxide (NO x , x is greater than 0 Representative examples of nitrogen oxides are: Examples include nitrogen monoxide and nitrogen dioxide. That is, the g value is between 2.037 and 2.039. a first signal having a g value of 2.001 to 2.003, and a second signal having a g value of The lower the sum of the spin densities of the third signals between 1.964 and 1.966, the more acidic the signal is. This means that the nitride insulating film contains a small amount of nitrogen oxide.

[0096] The nitrogen concentration of the oxide insulating film measured by SIMS is 6×10 20 atoms / cm 3 The following is the result.

[0097] The substrate temperature is between 220℃ and 350℃, and PEC using silane and nitrous oxide is used. By forming the oxide insulating film by the VD method, a dense and hard film can be obtained. It can be formed.

[0098] The insulating film 116 formed in contact with the insulating film 114 is an oxygen-containing film having a stoichiometric composition. The oxide insulating film is formed using an oxide insulating film containing more oxygen than the stoichiometric composition. When the oxide insulating film contains more oxygen than the stoichiometric composition, part of the oxygen is released by heating. The oxide insulating film containing more oxygen than the oxygen that satisfies the composition of the oxide film was analyzed by thermal desorption spectroscopy (TDS). Thermal Desorption Spectroscopy (TDS) The converted oxygen release rate is 1.0 x 10 19 atoms / cm 3 Above 3.0, preferably 3.0 ×10 20 atoms / cm 3 The oxide insulating film is as above. The surface temperature of the film is 100°C to 700°C or 100°C to 500°C. A range is preferred.

[0099] In addition, it is preferable that the insulating film 116 has a small amount of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Below It is preferable that the insulating film 116 is thicker than the insulating film 114 by the first oxide film. Since it is separated from the semiconductor film 110 , it may have a higher defect density than the insulating film 114 .

[0100] The thickness of the insulating film 114 is 5 nm to 150 nm, preferably 5 nm to 50 nm. The thickness of the insulating film 116 can be set to 10 nm or less and preferably 30 nm or less. The thickness can be set to 30 nm or more and 500 nm or less, preferably 150 nm or more and 400 nm or less. Cut.

[0101] In addition, the insulating films 114 and 116 can be made of the same material, so that the insulating films In some cases, the interface between the film 114 and the insulating film 116 cannot be clearly seen. In this embodiment, the interface between the insulating film 114 and the insulating film 116 is shown by a dashed line. In the embodiment, the two-layer structure of the insulating film 114 and the insulating film 116 has been described. For example, the insulating film 114 may have a single layer structure, the insulating film 116 may have a single layer structure, or the insulating film 116 may have a three-layer structure. A laminated structure of more than one layer may also be used.

[0102] The insulating film 118 that functions as the dielectric film of the capacitance element 160 is a nitride insulating film. In particular, a silicon nitride film has a higher relative dielectric constant than a silicon oxide film, and is therefore preferable. Since the thickness required to obtain the same capacitance as that of a silicon oxide film is large, the conductor The insulating film 118 that functions as a dielectric film contains a silicon nitride film, so that the insulating film can be physically Therefore, the decrease in the dielectric strength of the capacitance element 160 can be suppressed, and The dielectric strength can be improved to suppress electrostatic breakdown of the capacitance element 160. The film 118 functions as an electrode of the capacitor element 160. It also has the function of reducing

[0103] The insulating film 118 also blocks oxygen, hydrogen, water, alkali metals, alkaline earth metals, and the like. By providing the insulating film 118, the first oxide semiconductor film 110 and outward diffusion of oxygen contained in the insulating films 114 and 116. This can prevent hydrogen, water, and the like from entering the first oxide semiconductor film 110 from the outside. Nitrogen, which has a blocking effect on oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. Instead of a silicide insulating film, an oxide insulating film that has a blocking effect against oxygen, hydrogen, water, etc. is provided. As the oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like, an oxide Aluminum, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide Examples of suitable oxides include yttrium oxide, yttrium oxynitride, hafnium oxide, and hafnium oxynitride.

[0104] <Manufacturing method of display device> Next, an example of a method for manufacturing the semiconductor device shown in FIGS. This will be explained using:

[0105] First, the gate electrode 104 is formed on the substrate 102. Then, the substrate 102 and the gate An insulating film 108 including insulating films 106 and 107 is formed on the electrode 104 (see FIG. 3(A)). .

[0106] The substrate 102, the gate electrode 104, and the insulating films 106 and 107 are the same as those described above. The substrate 1 can be formed by selecting the material from the materials listed above. A glass substrate is used as the gate electrode 102, and a tungsten conductive film is used as the gate electrode 104. A silicon nitride film capable of releasing hydrogen is used as the insulating film 106. The insulating film 107 is a silicon oxynitride film capable of releasing oxygen.

[0107] The gate electrode 104 is formed by depositing a conductive film on the substrate 102 so that a desired region of the conductive film remains. The pattern can be formed as shown in FIG. 1 and then etching away unnecessary areas.

[0108] Next, the first oxide semiconductor film 11 is formed on the insulating film 108 at a position overlapping the gate electrode 104. 0 (see Figure 3(B)).

[0109] The first oxide semiconductor film 110 can be formed by selecting one of the materials listed above. In this embodiment, the first oxide semiconductor film 110 is formed of In -Ga-Zn oxide film (In:Ga:Zn=1:1:1.2 metal oxide target was used) For use.) is used.

[0110] The first oxide semiconductor film 110 is formed by depositing an oxide semiconductor film over the insulating film 108. The oxide semiconductor film is patterned so that a desired region remains, and then the unnecessary region is etched. It can be formed by gating.

[0111] After the first oxide semiconductor film 110 is formed, heat treatment is preferably performed. ℃ or higher and 650℃ or lower, preferably 300℃ or higher and 500℃ or lower, more preferably 350℃ or higher At temperatures up to 450°C, inert gas atmosphere, atmosphere containing oxidizing gas at 10 ppm or more, Alternatively, the heat treatment may be performed in a reduced pressure atmosphere. After the above, an oxidizing gas was supplied for 10 min to compensate for oxygen released from the first oxide semiconductor film 110. The heat treatment may be performed in an atmosphere containing 0 ppm or more. 7, and removing impurities such as hydrogen and water from at least one of the first oxide semiconductor film 110. Note that the heat treatment can be performed before the first oxide semiconductor film 110 is processed into an island shape. You may go to.

[0112] Note that the transistor 150 having the first oxide semiconductor film 110 as a channel region is stable. In order to provide such electrical characteristics, impurities in the first oxide semiconductor film 110 are reduced, and the first It is effective to make the oxide semiconductor film 110 intrinsic or substantially intrinsic.

[0113] Next, a conductive film is formed over the insulating film 108 and the first oxide semiconductor film 110. The desired area is then patterned, and the unnecessary area is then etched away, A source electrode 112a and a drain electrode 112b are formed on the insulating film 108 and the first oxide semiconductor film 110. The pole 112b is formed (see FIG. 3(C)).

[0114] The source electrode 112a and the drain electrode 112b are made of the above-listed materials. In this embodiment, the source electrode 112a and The drain electrode 112b is made of a tungsten film, an aluminum film, and a titanium film. A three-layer laminated structure is used.

[0115] After the source electrode 112a and the drain electrode 112b are formed, the first oxide semiconductor The surface of the membrane 110 may be washed. For example, the washing method may be a method using a chemical solution such as phosphoric acid. By cleaning with a chemical solution such as phosphoric acid, the first oxide semiconductor Impurities attached to the surface of the semiconductor film 110 (for example, the source electrode 112a and the drain electrode 112b) However, it is not always necessary to carry out such cleaning. In some cases, cleaning may not be necessary.

[0116] In addition, the process of forming the source electrode 112a and the drain electrode 112b and the cleaning process In either or both of the steps, the source electrode 11 of the first oxide semiconductor film 110 2a and the area exposed from the drain electrode 112b may become thin.

[0117] Next, the insulating film 108, the first oxide semiconductor film 110, the source electrode 112a, and the drain The insulating films 114 and 116 are formed on the gate electrode 112b. Patterning is done so that the desired area remains, and then the unnecessary area is etched away to create an opening. 141 is formed (see FIG. 3(D)).

[0118] After the insulating film 114 is formed, the insulating film 116 is successively formed without exposing it to the air. After the insulating film 114 is formed, it is preferable to adjust the flow rate, pressure, and temperature of the source gas without exposing the insulating film 114 to the air. By adjusting one or more of the frequency power and the substrate temperature, the insulating film 116 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 114 and the insulating film 116. At the same time, oxygen contained in the insulating films 114 and 116 is transferred to the first oxide semiconductor film 110. This allows oxygen vacancies in the first oxide semiconductor film 110 to be reduced. This becomes possible.

[0119] In addition, in the step of forming the insulating film 116, the insulating film 114 is formed on the first oxide semiconductor film 110. Therefore, damage to the first oxide semiconductor film 110 can be reduced while The insulating film 116 can be formed using high-frequency power with a high power density.

[0120] The insulating films 114 and 116 can be formed by selecting from the materials listed above. In this embodiment, the insulating films 114 and 116 are made of a material that can release oxygen. A silicon oxynitride film capable of this is used.

[0121] After the insulating films 114 and 116 are formed, heat treatment (hereinafter referred to as first heat treatment) is performed. The first heat treatment is preferably performed to remove nitrogen oxide contained in the insulating films 114 and 116. Alternatively, the first heat treatment can reduce the amount of oxides in the insulating films 114 and 116. A part of the oxygen contained in the first oxide semiconductor film 110 is transferred to the first oxide semiconductor film 110. The amount of oxygen vacancies contained in 10 can be reduced.

[0122] The temperature of the first heat treatment is typically less than 400° C., preferably less than 375° C., and The first heat treatment is preferably performed at a temperature of 150° C. or higher and 350° C. or lower. Dry air (water content is 20 ppm or less, preferably 1 ppm or less, more preferably 10 The reaction may be carried out under an atmosphere of air (ppb or less) or a rare gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. The heat treatment may be performed in an electric furnace or RTA (Rapid Thermal Anneal). A device or the like can be used.

[0123] The opening 141 is formed so as to expose the drain electrode 112b. For example, a dry etching method can be used as the etching method. The method of formation is not limited to this, and may be wet etching or dry etching. The opening 141 may be formed by a combination of the above-mentioned etching method and the wet etching method. The thickness of the drain electrode 112b may be reduced by the etching process for forming the drain electrode 112b. do.

[0124] Next, a second oxide semiconductor film 111 is formed on the insulating film 116 so as to cover the opening 141. An oxide semiconductor film is formed (see FIGS. 4A and 4B).

[0125] Note that FIG. 4A illustrates the inside of a film formation apparatus when an oxide semiconductor film is formed over the insulating film 116. In FIG. 4(A), a sputtering device is used as a film forming device. A target 193 is installed inside the sputtering device, and a shape is formed below the target 193. The generated plasma 194 is shown diagrammatically.

[0126] First, when forming an oxide semiconductor film, plasma is discharged in an atmosphere containing oxygen gas. At that time, oxygen is added to the insulating film 116 which is a surface on which the oxide semiconductor film is to be formed. In addition, when forming the oxide semiconductor film, in addition to oxygen gas, an inert gas (e.g., helium For example, argon gas and xenon gas may be mixed. It is preferable to use oxygen gas and argon gas, and to set the flow rate of oxygen gas higher than the flow rate of argon gas. By increasing the flow rate of oxygen gas, oxygen can be suitably added to the insulating film 116. For example, the oxide semiconductor film is formed under the following conditions: The ratio of is 50% or more and 100% or less, preferably 80% or more and 100% or less. .

[0127] In FIG. 4A, oxygen or excess oxygen added to the insulating film 116 is shown as It is represented by a dashed arrow.

[0128] The substrate temperature during the formation of the oxide semiconductor film is preferably from room temperature to 340° C. or from room temperature to 300°C, more preferably from 100°C to 250°C, and further preferably The temperature is generally 100° C. or higher and 200° C. or lower. On the other hand, the substrate 102 is a large glass substrate. In the case of using a substrate (for example, a sixth to tenth generation substrate), the substrate for forming the oxide semiconductor film is If the plate temperature is set to 150° C. or higher and lower than 340° C., the substrate 102 will deform (distort or warp). Therefore, when a large glass substrate is used, it is difficult to form an oxide semiconductor film. By keeping the substrate temperature during deposition at 100°C or higher but less than 150°C, deformation of the glass substrate is suppressed. It is possible.

[0129] The oxide semiconductor film can be formed using a material selected from the materials listed above. In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=1:3) is used. :6 [atomic ratio]) by a sputtering method to form an oxide semiconductor film.

[0130] Next, the oxide semiconductor film is processed into a desired shape to form a second island-shaped oxide semiconductor film. 111 is formed (see FIG. 4(C)).

[0131] The second oxide semiconductor film 111 is formed by depositing an oxide semiconductor film over the insulating film 116 and then The semiconductor film is patterned so that the desired areas remain, and then the unwanted areas are etched away. This can be formed.

[0132] Next, the insulating film 118 is formed over the insulating film 116 and the second oxide semiconductor film 111 ( See Figure 5(A).

[0133] The insulating film 118 contains either hydrogen or nitrogen, or both. For example, a silicon nitride film is preferably used as the insulating film 118. For example, it can be formed by using a sputtering method or a PECVD method. When the insulating film 118 is formed by the PECVD method, the substrate temperature is set to less than 400° C., preferably less than 375° C. The temperature is preferably less than 180° C. and more preferably 350° C. or higher. In this case, it is preferable to set the substrate temperature in the above-mentioned range since a dense film can be formed. By setting the substrate temperature in the above range when forming the insulating film 118, the insulating films 114 and 1 Oxygen or excess oxygen in the oxide semiconductor film 16 can be transferred to the first oxide semiconductor film 110. become.

[0134] After the insulating film 118 is formed, a heat treatment similar to the first heat treatment described above (hereinafter, In this manner, the second oxide semiconductor film 111 is formed. In forming the oxide semiconductor film, oxygen is added to the insulating film 116, and then the insulating film 116 is heated at a temperature lower than 400° C. Heat treatment is preferably performed at a temperature of less than 375°C, more preferably at a temperature of 150°C or higher and 350°C or lower. By performing the above, oxygen or excess oxygen in the insulating film 116 is transferred to the first oxide semiconductor film 110. By this movement, oxygen vacancies in the first oxide semiconductor film 110 can be filled.

[0135] Here, oxygen moving into the first oxide semiconductor film 110 will be described with reference to FIG. FIG. 6 shows the substrate temperature (typically less than 375° C.) during the formation of the insulating film 118 or the insulating A second heat treatment (typically less than 375° C.) after the formation of film 118 causes the first oxide 6 is a model diagram showing oxygen moving into the semiconductor film 110. In FIG. Oxygen (oxygen radicals, oxygen atoms, or oxygen molecules) shown in the semiconductor film 110 are indicated by dashed arrows. 6(A) and (B) are respectively the same as in FIG. 1(A) after the insulating film 118 is formed. ) is a cross-sectional view corresponding to the dashed dotted line AB and the dashed dotted line EF shown in FIG.

[0136] The first oxide semiconductor film 110 shown in FIG. 6 is a film ( Here, oxygen vacancies are compensated for by the movement of oxygen from the insulating films 107 and 114. In particular, in the semiconductor device of one embodiment of the present invention, the first oxide semiconductor film 110 and When the oxide semiconductor film is formed by sputtering, oxygen gas is used to form the insulating film 107. In the case where the second oxide semiconductor film 1 is added, the insulating film 107 has an excess oxygen region. When the oxide semiconductor film 11 is formed by sputtering, oxygen gas is used. Since oxygen is added to the insulating film 116, the insulating film 116 has an excess oxygen region. The first oxide semiconductor film 110 sandwiched between the insulating films having the above structure is preferably filled with oxygen vacancies. .

[0137] In addition, the insulating film 106 is provided below the insulating film 107, and the insulating films 114 and 11 An insulating film 118 is provided above the insulating films 106 and 118. By forming the insulating films 107, 114, and 116 from a thin material such as silicon nitride, Since oxygen contained therein can be confined on the first oxide semiconductor film 110 side, In addition, oxygen can be transferred to the first oxide semiconductor film 110. 8 is a method for preventing impurities from entering the transistor, such as water, alkali metals, and alkaline earth metals. This also has the effect of preventing the diffusion of the oxide semiconductor into the first oxide semiconductor film 110 included in the stanchion 150 .

[0138] The insulating film 118 contains either hydrogen or nitrogen, or both. By forming the insulating film 118, the second oxide semiconductor film 111 in contact with the insulating film 118 is By adding either or both of hydrogen and nitrogen, the carrier density is increased, It can function as an oxide conductive film.

[0139] As the resistivity of the second oxide semiconductor film 111 decreases, the 1, the second oxide semiconductor film 111 is illustrated with different hatching.

[0140] The resistivity of the second oxide semiconductor film 111 is at least higher than that of the first oxide semiconductor film 110. Preferably, the concentration is as low as 1×10 -3 Ωcm or more 1×10 4 less than Ωcm, more preferably , 1×10 -3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0141] Next, the insulating film 118 is patterned so that desired regions remain, and then unnecessary regions are etched away. By etching, openings 142 are formed (see FIG. 5(B)).

[0142] The opening 142 is formed so as to expose the drain electrode 112b. As a method for forming the opening, for example, a dry etching method can be used. The method for forming 42 is not limited to this, and may be a wet etching method or a dry etching method. The opening 14 may be formed by a combination of a chipping method and a wet etching method. In the case where the thickness of the drain electrode 112b is reduced by the etching process for forming the drain electrode 112b, There is a match.

[0143] In addition, the step of forming the opening 142 is performed without performing the step of forming the opening 141 described above. In this manner, openings may be formed continuously in the insulating films 114, 116, and 118. In this way, the number of steps for manufacturing the semiconductor device of one embodiment of the present invention can be reduced. Costs can be reduced.

[0144] Next, a conductive film is formed on the insulating film 118 so as to cover the opening 142, and the conductive film is formed in a desired shape. The conductive film 120 is formed by patterning and etching so that a conductor shape remains (FIG. 5C). )reference).

[0145] The conductive film 120 can be formed by selecting a material from the materials listed above. In this embodiment, the conductive film 120 is an indium tin oxide film.

[0146] In addition, the capacitor element 160 is fabricated in conjunction with the formation of the conductive film 120. The capacitor element 160 is A dielectric layer is sandwiched between a pair of electrodes, one of which is a second oxide semiconductor. The other of the pair of electrodes is a conductive film 120. The insulating film 118 is a capacitor. It serves as the dielectric layer for element 160 .

[0147] Through the above steps, the transistor 150 and the capacitor element 160 are formed on the same substrate. It is possible.

[0148] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0149] (Embodiment 2) In this embodiment, a semiconductor device according to one embodiment of the present invention will be described. The modified example of the device will be described with reference to Figs. 7 to 9. The same reference numerals are used for parts that are the same as those in FIG. 4 or have the same functions. Therefore, the repeated explanation will be omitted.

[0150] <Configuration Example of Semiconductor Device (Modification 1)> FIG. 7A is a top view of a semiconductor device of one embodiment of the present invention, and FIG. ) corresponds to the cutting lines between dashed lines GH, dashed lines IJ, and dashed lines KL. In FIG. 7(A), in order to avoid complication, the semiconductor device In the figure, some of the components of the device (such as a gate insulating film) are omitted.

[0151] The semiconductor device shown in FIGS. 7A and 7B includes a first oxide semiconductor film 110 and a second oxide semiconductor film 111. A transistor 151 including a first oxide semiconductor film 111a and a second oxide semiconductor film 111b. and a gate line contact portion 170. The gate line contact portion 170 is This refers to the region where the gate wiring 105 and the wiring 112 are electrically connected.

[0152] In addition, the dashed line GH in FIG. 7A indicates the channel length direction of the transistor 151. The dashed dotted line KL indicates the channel width direction of the transistor 151.

[0153] The transistor 151 includes a gate electrode 104 on a substrate 102 and a second an insulating film 108 which functions as a gate insulating film of the first gate electrode 104 on the insulating film 108; The first oxide semiconductor film 110 at the overlapping position and the source on the first oxide semiconductor film 110 The electrode 112a, the drain electrode 112b, the first oxide semiconductor film 110, the source electrode 1 an insulating film 114 acting as a second gate insulating film on the gate electrode 12a and the drain electrode 112b; 116, and a second insulating film 116 provided at a position overlapping with the first oxide semiconductor film 110. The second oxide semiconductor film 111a is a transistor. In the gate electrode 151, the second gate electrode functions as a gate electrode. ) has a so-called double-gate structure.

[0154] In addition, over the transistor 151, more specifically, over the insulating film 116 and the second oxide semiconductor film An insulating film 118 is formed on the transistor 111a. 51 and serves as a protective insulating film for the transistor 151. The insulating film 118 functions as a protective insulating film for the transistor 151. Yes.

[0155] In the gate wiring contact portion 170, an opening 146 and The gate wiring 105 and the wiring A second oxide semiconductor film 111b is formed over the oxide semiconductor film 112.

[0156] In the semiconductor device according to the present embodiment, the gate wiring contact portion 170 is The line 105 and the wiring 112 are electrically connected via the second oxide semiconductor film 111b. With this configuration, the opening 144 and the opening 146 can be formed continuously. Therefore, the manufacturing process of the semiconductor device can be shortened.

[0157] In addition, when there is no protective film for blocking the entry of oxygen over the second oxide semiconductor film 111b, In a high-temperature and high-humidity environment, the second oxide semiconductor film 111b may be altered and its resistance may increase. In the semiconductor device described in this embodiment, the second oxide semiconductor film 111b is formed between the insulating film 118. This improves the high temperature and humidity resistance of semiconductor devices without forming a new protective film. It can be done.

[0158] Note that an insulating film containing at least hydrogen is used as the insulating film 118. The insulating films 07, 114, and 116 contain at least oxygen. An insulating film or a transistor used for the transistor 151 and the gate wiring contact portion 170 The insulating film in contact with the gate wiring contact portion 170 and the insulating film 151 is the insulating film having the above-mentioned configuration. As a result, the first oxide semiconductor film 110 and the second oxide semiconductor films 111a and 111b are The resistivity of b can be controlled.

[0159] Note that the first oxide semiconductor film 110 and the second oxide semiconductor films 111a and 111b The resistivity can be controlled by taking into consideration the description of the first embodiment.

[0160] The semiconductor device shown in FIGS. 1A and 1B of the first embodiment and the semiconductor device shown in FIGS. The main difference between the semiconductor device and the semiconductor device is that the gate wiring contact portion 17 is used instead of the capacitance element 160. 0 is provided, and the third gate electrode functioning as the second gate electrode of the transistor 151 is provided. 2 in that the oxide semiconductor film 111a is provided and the conductive film 120 is not provided. .

[0161] <Production method of display device (variation 1)> Next, an example of a method for manufacturing the semiconductor device shown in FIGS. 7A and 7B will be described with reference to FIGS. This will be explained using:

[0162] First, a gate electrode 104 and a gate wiring 105 are formed on a substrate 102. An insulating film 108 including insulating films 106 and 107 is formed on the gate electrode 104 and the gate wiring 105. The gate wiring 105 is formed using the same material as the gate electrode 104. The two can be formed simultaneously.

[0163] Next, the first oxide semiconductor film 11 is formed on the insulating film 108 at a position overlapping the gate electrode 104. 0 (see FIG. 8(B)).

[0164] The first oxide semiconductor film 110 is formed by depositing an oxide semiconductor film over the insulating film 108. The semiconductor film is patterned so that the desired areas remain, and then the unwanted areas are etched away. This can be formed.

[0165] Note that when the first oxide semiconductor film 110 is etched, overetching may occur. As a result, part of the insulating film 107 (a region exposed from the first oxide semiconductor film 110) is etched. This can result in a decrease in film thickness.

[0166] After the first oxide semiconductor film 110 is formed, heat treatment is preferably performed. This can be achieved by taking into consideration the heat treatment performed after the formation of the first oxide semiconductor film 110 in the first embodiment. .

[0167] Next, a conductive film is formed over the insulating film 108 and the first oxide semiconductor film 110. The desired areas are then patterned, and the unnecessary areas are then etched away to remove the A source electrode 112a, a drain electrode 112b, and a wiring 112 are formed (see FIG. 8(C)). The wiring 112 is made of the same material as the source electrode 112a and the drain electrode 112b. can sometimes be formed.

[0168] Next, the insulating film 108, the first oxide semiconductor film 110, the source electrode 112a, the drain electrode Insulating films 114 and 116 are formed on the electrode 112b and the wiring 112 (see FIG. 8(D)). After the insulating films 114 and 116 are formed, the first heat treatment shown in the first embodiment is preferably performed. It is nice.

[0169] Next, the insulating films 106, 107, 114, and 116 are patterned so that desired regions remain. Then, the unnecessary regions are etched to form openings 144 and 146 (FIG. 9(A)).

[0170] The openings 144 and 146 are formed so that the wiring 112 and the gate wiring 105 are exposed. The openings 144 and 146 can be formed by, for example, dry etching. However, the method for forming the openings 144 and 146 is not limited to this. It is not possible to use wet etching or a combination of dry and wet etching methods. A combination of these forming methods may also be used.

[0171] The openings 144 and 146 can be formed simultaneously by etching after one patterning. Since the insulating film can be formed, the manufacturing process can be shortened.

[0172] Next, a second oxide semiconductor film was formed on the insulating film 116 at a position overlapping with the first oxide semiconductor film 110. The conductive film 111a is formed, and at the same time, the insulating film 116 is formed so as to cover the openings 144 and 146. A second oxide semiconductor film 111b is formed on the second oxide semiconductor film 111b (see FIG. 9B). The method for forming the oxide semiconductor film 111a and the second oxide semiconductor film 111b is the same as that described in Embodiment 1. For example, the oxide semiconductor film 111 in FIG. 2 can be referred to.

[0173] The second oxide semiconductor films 111a and 111b are formed by depositing an oxide semiconductor film over the insulating film 116. The oxide semiconductor film is then patterned so that desired regions of the oxide semiconductor film remain, and then unnecessary regions are removed by etching. It can be formed by etching.

[0174] Note that when the second oxide semiconductor films 111a and 111b are etched, over-etching is performed. By etching, a part of the insulating film 116 (exposed from the second oxide semiconductor films 111a and 111b) is The exposed area may be etched and the film thickness may decrease.

[0175] Next, the insulating film 118 is formed over the insulating film 116 and the second oxide semiconductor films 111a and 111b. The hydrogen contained in the insulating film 118 is converted into the second oxide semiconductor film 1 When the oxide semiconductor layers 111a and 111b are diffused, the resistivity of the second oxide semiconductor layers 111a and 111b decreases. As the resistivity of the second oxide semiconductor films 111a and 111b decreases, 9B) and FIG. 9C, the hatching of the second oxide semiconductor films 111a and 111b is changed. In addition, after the insulating film 118 is formed, the second heat treatment described in the first embodiment is performed. may be carried out.

[0176] Through the above steps, the transistor 151 and the gate wiring contact portion 170 are formed in the same It can be formed on a substrate.

[0177] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0178] (Embodiment 3) In this embodiment, a semiconductor device according to one embodiment of the present invention will be described. A modified example of the device will be described with reference to Figs. 10 to 12. 4. The same reference numerals are used for parts having the same functions as those in FIG. is used, and a repeated explanation will be omitted.

[0179] <Configuration Example of Semiconductor Device (Modification 2)> FIG. 10A is a top view of a semiconductor device of one embodiment of the present invention, and FIG. For each cutting line between dashed line MN, dashed line OP, and dashed line QR of 0(A) In FIG. 10(A), in order to avoid complication, Some of the components of the semiconductor device (such as a gate insulating film) are omitted in the illustration.

[0180] The semiconductor device illustrated in FIGS. 10A and 10B includes a first oxide semiconductor film 110 and a second oxide semiconductor film 111. a transistor 151 including a compound semiconductor film 111a, and a gate wiring contact portion 171; The gate line contact portion 171 is a portion where the gate line 105 and the line 112 are electrically connected. This refers to an area that is electrically connected.

[0181] In addition, the dashed line MN in FIG. 10A indicates the channel length direction of the transistor 151. The dashed and dotted line QR indicates the channel width direction of the transistor 151.

[0182] The transistor 151 includes a gate electrode 104 on a substrate 102 and a second an insulating film 108 which functions as a gate insulating film of the first gate electrode 104 on the insulating film 108; The first oxide semiconductor film 110 at the overlapping position and the source on the first oxide semiconductor film 110 The electrode 112a, the drain electrode 112b, the first oxide semiconductor film 110, the source electrode 1 an insulating film 114 acting as a second gate insulating film on the gate electrode 12a and the drain electrode 112b; 116, and the second oxide semiconductor film 110 on the insulating film 116 at a position overlapping with the first oxide semiconductor film 110. The second oxide semiconductor film 111a is a semiconductor film that is In other words, the second gate electrode functions as a gate electrode in the structure shown in FIG. The transistor 151 has a so-called double gate structure.

[0183] In addition, over the transistor 151, more specifically, over the insulating film 116 and the second oxide semiconductor film An insulating film 118 and an insulating film 119 are formed on the insulating film 111a. 151 and serves as a second gate insulating film of the transistor 15 The insulating film 118 serves as a protective insulating film for the transistor 151. The insulating film 119 functions as a planarization film. The films 114, 116, 118, and 119 have openings that reach the drain electrode 112b. A conductive film 120 is formed on the insulating film 119 so as to cover the opening. The openings formed in the insulating films 114 and 116 are called opening 146, and the openings formed in the insulating film 119 are called openings 147. The opening is defined as an opening 148. The conductive film 120 functions as, for example, a pixel electrode.

[0184] In the gate wiring contact portion 171, the opening 144 provided in the insulating film 108 is covered. In this manner, the wiring 112 is formed on the gate wiring 105 .

[0185] In the semiconductor device shown in this embodiment, the end of the insulating film 118 and the insulating film The ends of the electrodes 119 are generally aligned. This reduces the number of masks used for patterning, and ultimately reduces manufacturing costs. It can be reduced.

[0186] Note that an insulating film containing at least hydrogen is used as the insulating film 118. The insulating films 07, 114, and 116 contain at least oxygen. The insulating film used for the transistor 151 or the insulating film in contact with the transistor 151 is formed by the above-mentioned structure. By using the insulating film of this composition, the first oxide semiconductor film 11 of the transistor 151 can be By using this method, the resistivity of the first and second oxide semiconductor films 111a can be controlled.

[0187] Regarding the resistivity of the first oxide semiconductor film 110 and the second oxide semiconductor film 111a, In this regard, control can be performed by taking into consideration the description of the first embodiment.

[0188] The semiconductor device shown in FIGS. 1A and 1B of the first embodiment and the semiconductor device shown in FIGS. The main difference between the semiconductor device and the present embodiment is that the gate wiring contact portion 160 is replaced with a capacitor element 160. 71 is provided, which functions as a second gate electrode of the transistor 151. The second oxide semiconductor film 111a is provided, and the insulating film 119 is provided. It is a point.

[0189] <Production method of display device (variation 2)> Next, an example of a method for manufacturing the semiconductor device shown in FIGS. This will be explained using FIG.

[0190] First, a gate electrode 104 and a gate wiring 105 are formed on a substrate 102. An insulating film 108 including insulating films 106 and 107 is formed on the gate electrode 104 and the gate wiring 105. The gate wiring 105 is formed at the same time as the gate electrode 104 using the same material. This can be done.

[0191] Next, the first oxide semiconductor film 11 is formed on the insulating film 108 at a position overlapping the gate electrode 104. 0 (see FIG. 11(A)).

[0192] The first oxide semiconductor film 110 is formed by depositing an oxide semiconductor film over the insulating film 108. The semiconductor film is patterned so that the desired areas remain, and then the unwanted areas are etched away. This can be formed.

[0193] Note that when the first oxide semiconductor film 110 is etched, overetching may occur. As a result, part of the insulating film 108 (a region exposed from the first oxide semiconductor film 110) is etched. This can result in a decrease in film thickness.

[0194] After the first oxide semiconductor film 110 is formed, heat treatment is preferably performed. This can be achieved by taking into consideration the heat treatment performed after the formation of the first oxide semiconductor film 110 in the first embodiment. .

[0195] Next, the insulating films 106 and 107 are patterned so that desired regions remain, and then unnecessary regions are removed. An opening 144 is formed by etching a region (see FIG. 11(B)).

[0196] The opening 144 is formed so as to expose the gate wiring 105. Formation of the opening 144 As a method, for example, a dry etching method can be used. However, the opening 144 The method for forming the insulating layer 11 is not limited to the above, and may be a wet etching method or a dry etching method. Alternatively, a combination of a dipping method and a wet etching method may be used.

[0197] Next, a conductive film is formed over the insulating film 108, the gate wiring 105, and the first oxide semiconductor film 110. A film is formed, patterned so that desired areas of the conductive film remain, and then the unnecessary areas are etched away. By this, the source electrode 112a, the drain electrode 112b, and the wiring 112 are formed ( (See FIG. 11C). The wiring 112 has the same structure as the source electrode 112a and the drain electrode 112b. The same materials can be used to form the layers simultaneously.

[0198] Next, the insulating film 108, the first oxide semiconductor film 110, the source electrode 112a, the drain electrode The insulating films 114 and 116 are formed on the electrode 112b and the wiring 112. After the formation of the insulating film, the first heat treatment described in Embodiment Mode 1 is preferably performed.

[0199] Next, the insulating films 114 and 116 are patterned so that desired regions remain, and then unnecessary regions are removed. An opening 146 is formed by etching a region (see FIG. 11(D)).

[0200] The opening 146 is formed so as to expose the drain electrode 112b. As a method for forming the opening, for example, a dry etching method can be used. The method for forming 46 is not limited to this, and may be a wet etching method or a dry etching method. A forming method that combines a chipping method and a wet etching method may also be used.

[0201] Next, a second oxide semiconductor film was formed on the insulating film 116 at a position overlapping with the first oxide semiconductor film 110. The conductive film 111a is formed. The method for forming the second oxide semiconductor film 111a is the same as that of the first embodiment. The second oxide semiconductor film 111 described above can be referred to.

[0202] The second oxide semiconductor film 111a is formed by depositing an oxide semiconductor film over the insulating film 116. The semiconductor film is patterned so that the desired regions remain, and then the unnecessary regions are etched away. It can be formed by

[0203] Note that overetching may occur during etching of the second oxide semiconductor film 111a. As a result, part of the insulating film 116 (a region exposed from the second oxide semiconductor film 111a) is etched. This can cause the film thickness to decrease.

[0204] Next, a thin film of the insulating film 116, a thin film of the second oxide semiconductor film 111a, and a thin film of the drain electrode 112b are formed on the insulating film 116, the second oxide semiconductor film 111a, and the drain electrode 112b. The insulating film 118 is formed. Hydrogen contained in the insulating film 118 is converted into the second oxide semiconductor film 111a. When the oxide semiconductor film 111a diffuses into the second oxide semiconductor film 111a, the resistivity of the second oxide semiconductor film 111a decreases.

[0205] Next, the insulating film 119 is formed on the insulating film 118 (see FIG. 12A). Examples of the resin include polyimide resin, acrylic resin, polyimide amide resin, benzocyclo It is possible to use organic materials having heat resistance such as butene resin, polyamide resin, and epoxy resin. An organic resin film is formed on the insulating film, and then patterned so that the desired area remains. After that, an opening is formed at a position overlapping with opening 146 by etching away unnecessary regions.

[0206] Next, the insulating film 118 is etched using the insulating film 119 having an opening as a mask. Then, an opening 148 is formed (see FIG. 12B). The insulating film 119 can be used as a mask. Therefore, a new mask for forming the opening 148 is not required, and patterning can be performed without using the mask. This makes it possible to reduce the manufacturing cost of the semiconductor device.

[0207] Next, a conductive film is formed on the insulating film 119 so as to cover the opening 148, and the conductive film is formed in a desired shape. The conductive film 120 is formed by patterning and etching so that a conductor shape remains (FIG. 12( See C).

[0208] Through the above steps, the transistor 151 and the gate wiring contact portion 171 are formed in the same It can be formed on a substrate.

[0209] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0210] (Embodiment 4) In this embodiment, a transistor, a capacitor, and a gate electrode of a semiconductor device according to one embodiment of the present invention will be described. An example of an oxide semiconductor that can be applied to the wiring contact portion will be described.

[0211] The structure of an oxide semiconductor will be described below.

[0212] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to two lines that are arranged at an angle between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0213] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0214] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor uctor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous l Examples include amorphous oxide semiconductors, amorphous oxide semiconductors, etc.

[0215] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC- These include OS, polycrystalline oxide semiconductor, and nc-OS.

[0216] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond length is short. In other words, it is a structure that has discrete order but does not have long-range order.

[0217] On the other hand, in the case of an essentially stable oxide semiconductor, In addition, it cannot be called an oxide semiconductor because it is not isotropic. The oxide semiconductor, which is not amorphous (for example, has a periodic structure in a microscopic region), is transformed into a completely amorphous oxide. However, a-like OS is a semiconductor that can be used in a small area. Although it has a periodic structure, it has voids and is an unstable structure. In terms of physical properties, it can be said that the semiconductor is close to an amorphous oxide semiconductor.

[0218] <caac-os> First, let me explain about CAAC-OS.

[0219] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0220] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly confirm the presence of the CAAC-OS at the grain boundaries. It can be said that the decrease in electron mobility caused by the above phenomenon is unlikely to occur.

[0221] The CAAC-OS observed by TEM is explained below. 1 shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration corrector function was used. , specifically called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images are obtained, for example, This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible.

[0222] A Cs-corrected high-resolution TEM image of the enlarged area (1) in Figure 13(A) is shown in Figure 13(B). From FIG. 13(B), it can be confirmed that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0223] As shown in FIG. 13(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of a single pellet can be 1 nm or more, or 3 nm or more. It can be seen that the size of the gap caused by the inclination between the plate and the pellet is about 0.8 nm. Therefore, the pellets can also be called nanocrystals (nc). CAAC-OS is also used as a C-Axis Aligned Nanoclip The semiconductor may also be referred to as an oxide semiconductor having metal ions.

[0224] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 13(D)). Between the pellets observed in FIG. 13(C), The portion where the inclination occurs corresponds to the region 5161 shown in FIG.

[0225] FIG. 14(A) shows the C The s-corrected high-resolution TEM images are shown for regions (1), (2) and (3) in FIG. ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 14(B), (C) and (D), respectively. As shown in Figure 14(D), Figure 14(B), Figure 14(C) and Figure 14(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0226] Next, C was analyzed by X-ray diffraction (XRD). We will explain AAC-OS. For example, CAAC-O with InGaZnO4 crystals When the structure of S is analyzed using the out-of-plane method, the result is as shown in Figure 15(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. Since this is attributed to the (009) plane of the ZnO4 crystal, it is believed that the CAAC-OS crystal has a c-axis orientation. It can be seen that the crystal has a c-axis oriented in a direction substantially perpendicular to the surface on which the crystal is formed or to the upper surface.

[0227] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31 In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS contains crystals that do not have the c-axis orientation. The more preferable CAAC-OS is a structure obtained by the out-of-plane method. The analysis shows a peak at 2θ around 31° and no peak at 2θ around 36°.

[0228] On the other hand, in-pla, X-rays are incident on CAAC-OS from a direction nearly perpendicular to the c-axis. When the structure is analyzed by the NE method, a peak appears at 2θ of about 56°. This peak is I It is attributed to the (110) plane of the crystal of nGaZnO4. In the case of CAAC-OS, 2θ is set to 5 The sample was fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears as shown in FIG. 15(B). On the other hand, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane, as shown in Figure 15(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and the b-axis is irregular.

[0229] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, a probe diameter of 300 nm was used parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) as shown in FIG. This diffraction pattern may appear due to the InGaZnO4 The spots due to the (009) plane of the crystal are included. Therefore, even by electron diffraction, The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis faces the surface to be formed or the upper surface. On the other hand, when the probe was applied perpendicular to the sample surface, The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in FIG. 6(B), a ring-shaped diffraction pattern is observed. Therefore, electron diffraction It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. In addition, the first ring in FIG. 16(B) is the (010) plane of the InGaZnO4 crystal. This is thought to be due to the (100) plane and the like. This is thought to be due to the (110) surface, etc.

[0230] As described above, the CAAC-OS is an oxide semiconductor with high crystallinity. Crystallinity can be reduced by the inclusion of impurities or the generation of defects, so the opposite view can be taken. Therefore, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0231] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0232] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or In addition, oxygen vacancies in oxide semiconductors can act as carrier traps and In some cases, the SiO 2 can become a carrier generation source by capturing hydrogen.

[0233] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. There is. Specifically, 8×10 11 pieces / cm 3 Less than 1 x 10 11 / cm 3 less than , and more preferably 1×10 10 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 The above The CAAC-OS has a low impurity concentration and can be used as an oxide semiconductor with a high carrier density. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0234] <nc-os> Next, we will explain nc-OS.

[0235] In the high-resolution TEM image, the nc-OS is divided into two regions: one where the crystals can be confirmed, and the other where the clear The crystalline parts in nc-OS are In most cases, the size is between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor having a crystal size of 10 nm or more and 100 nm or less is called a microcrystalline oxide. For example, in high-resolution TEM images, nc-OS shows grain boundaries. In some cases, the nanocrystals are not clearly visible in the pellets of CAAC-OS. Therefore, in the following, the crystalline part of nc-OS is referred to as the pellet. There is a chance to call.

[0236] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. For example, the nc-OS may be a pellet with a larger diameter than the pellet. When X-rays are used, the peaks that indicate the crystal planes are In addition, for nc-OS, the probe diameter is larger than the pellet (e.g., 50 When electron diffraction is performed using an electron beam of 1 nm or more, a halo-like diffraction pattern is produced. On the other hand, for nc-OS, pellets with sizes close to or smaller than the pellets were observed. When nanobeam electron diffraction is performed using an electron beam with a lobe diameter, spots are observed. When nanobeam electron diffraction was performed on nc-OS, high brightness regions were observed in a circular (ring-like) pattern. In addition, multiple spots may be observed within a ring-shaped area. There may be cases where this occurs.

[0237] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) The oxide semiconductor or NANC (Non-Aligned Nanocrystal The semiconductor may also be referred to as an oxide semiconductor having a structure including a metal oxide layer.

[0238] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0239] <a-like OS> The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a semiconductor.

[0240] In a-like OS, pores may be observed in high-resolution TEM images. In the high-resolution TEM image, there are areas where crystals can be clearly seen, and areas where crystals can be seen. and areas where it is not possible to

[0241] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the change in structure due to electron irradiation.

[0242] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (hereinafter referred to as sample B) and CAAC-OS (hereinafter referred to as sample C) are prepared. Both samples are In-Ga-Zn oxides.

[0243] First, high-resolution cross-sectional TEM images of each sample are obtained. It can be seen that all the materials have crystalline parts.

[0244] The determination of which part is regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, six of which are layered in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The areas where the spacing between the crystals is 0.28 nm or more and 0.30 nm or less are considered to be crystal parts of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0245] Figure 17 shows an example of the average size of the crystal parts (22 to 45 parts) of each sample. However, the length of the lattice fringes is the size of the crystal part. It can be seen that the crystalline part of the ke OS grows in size according to the cumulative dose of electron irradiation. Specifically, as shown by (1) in Figure 17, the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus), which was 4.2×10 8 e - / n m 2 On the other hand, in the nc-O For S and CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in Fig. 17, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. It can be seen that.

[0246] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not seen as a nc-OS or CAAC-OS. It is clear that it has an unstable structure compared to the OS.

[0247] In addition, because of the presence of porosity, a-like OS is more difficult to treat than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is The density of the nc-OS and the CAA The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0248] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystalline InGaZnO4 having a rhombohedral crystal structure is 6.357 g / cm 3 becomes. Thus, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of the a-like OS is 5.0 g / cm 3 or more and less than 5.9 g / cm 3 becomes. Also, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of the nc-OS and the density of the CAAC-OS are 5.9 g / cm 3 or more and less than 6.3 g / cm 3 becomes.

[0249] Note that there may be cases where single crystals of the same composition do not exist. In that case, by combining single crystals with different compositions in any ratio, the density corresponding to the single crystal in the desired composition can be estimated. The density corresponding to the single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible. As described above, oxide semiconductors have various structures and each has various characteristics. Note that the oxide semiconductor may be, for example, a laminated film having two or more of an amorphous oxide semiconductor, a-like OS, nc-OS,

[0250] CAAC-OS. Note that the oxide semiconductor may be, for example, a laminated film having two or more of an amorphous oxide semiconductor, a-like OS, nc-OS, CAAC-OS.

[0251] <Fabrication method of CAAC-OS> Hereinafter, an example of a fabrication method of CAAC-OS will be described. FIG. 18 is a schematic diagram of the inside of a film formation chamber. CAAC-OS can be formed by a sputtering method.

[0252] ​As shown in FIG. 18, the substrate 5220 and the target 5230 are disposed so as to face each other. There is a plasma 5240 between the substrate 5220 and the target 5230. A heating mechanism 5260 is provided below the substrate 5220. Although not shown, a target 5230 is bonded to the backing plate. A number of magnets are arranged opposite the magnet 5230. The sputtering method that uses magnetron sputtering to increase the deposition rate is called magnetron sputtering. can be.

[0253] The distance d between the substrate 5220 and the target 5230 (target-substrate distance (TS distance) The distance is 0.01 m or more and 1 m or less, preferably 0.02 m or more and 0.5 m or less. The deposition chamber is mostly filled with deposition gas (e.g., oxygen, argon, or oxygen 5 volumes). % or more), and the pressure is 0.01 Pa to 100 Pa, preferably The pressure is controlled to be 0.1 Pa or more and 10 Pa or less. By applying a voltage, a discharge starts and plasma 5240 is observed. A high-density plasma region is formed near the nozzle 5230 by the magnetic field. In the region, the deposition gas is ionized to generate ions 5201. The ions 5201 are For example, the oxygen cation (O + ) and argon cations (Ar + ) etc.

[0254] The target 5230 has a polycrystalline structure having a plurality of crystal grains, and As an example, FIG. 19 shows a target 5230 having an InMZn The crystal structure of O4 (wherein element M is, for example, Al, Ga, Y, or Sn) is shown in FIG. A) is the crystal structure of InMZnO4 when observed parallel to the b-axis. In ZnO4 crystals, the oxygen atoms have a negative charge, so that two adjacent M-Zn Therefore, the InMZnO4 crystal is composed of two adjacent M -The cleavage plane is between the Zn-O layers.

[0255] Ions 5201 generated in the high-density plasma region are attracted to the target 5230 by the electric field. The cleavage plane is then accelerated and collides with the target 5230. At this time, flat or planar particles are generated from the cleavage plane. A pellet 5200, which is a pellet-shaped sputtered particle, is peeled off (see FIG. 18). 200 is the portion sandwiched between the two cleavage planes shown in FIG. 19(A). When only 200 is extracted, its cross section is as shown in Figure 19(B) and its top surface is as shown in Figure 19(C). It can be seen that the pellet 5200 is formed by the impact of the ion 5201. This can cause distortion of the structure.

[0256] The pellet 5200 is a flat or pellet-shaped pellet having a triangular, e.g., equilateral, plane. The pellet 5200 is a sputtered particle having a hexagonal, for example, a regular hexagonal plane. The sputtered particles are in the form of a plate or pellet. However, the shape of the pellet 5200 is not limited to a triangle or a hexagon, for example, it may be a shape made up of multiple triangles. For example, a quadrilateral (such as a rhombus) is made up of two triangles (such as an equilateral triangle). ) in some cases.

[0257] The thickness of the pellet 5200 is determined depending on the type of deposition gas. For example, 5200 has a thickness of 0.4 nm or more and 1 nm or less, preferably 0.6 nm or more and 0.8 nm or less. For example, the pellet 5200 has a width of 1 nm or more and 100 nm or less. The thickness is preferably 2 nm or more and 50 nm or less, and more preferably 3 nm or more and 30 nm or less. For example, The target 5230 having an In-M-Zn oxide is bombarded with ions 5201. As a result, a pellet 5 having three layers, an M-Zn-O layer, an In-O layer, and an M-Zn-O layer, was obtained. As the pellet 5200 is peeled off, particles are released from the target 5230. Particle 5203 is also ejected. Particle 5203 has an aggregate of one atom or several atoms. Therefore, the particle 5203 is called atomic particles. It is also possible.

[0258] As the pellet 5200 passes through the plasma 5240, the surface becomes negatively or positively charged. For example, the pellet 5200 may be in the plasma 5240. 2- negative charge from As a result, the oxygen atoms on the surface of the pellet 5200 may become negatively charged. In addition, when the pellet 5200 passes through the plasma 5240, the pellet 5200 may be mixed with the plasma 52 It may grow by combining with indium, element M, zinc, or oxygen in 40. .

[0259] The pellets 5200 and particles 5203 that have passed through the plasma 5240 are Some of the particles 5203 reach the surface because of their small mass. It may be discharged to the outside.

[0260] Next, the deposition of pellets 5200 and particles 5203 on the surface of the substrate 5220 is This will be explained with reference to FIG.

[0261] First, the first pellet 5200 is deposited on the substrate 5220. Since the pellets 52 are in the shape of a pellet, the flat side of the pellets 52 is deposited toward the surface of the substrate 5220. The charge on the surface of 00 on the substrate 5220 side is discharged through the substrate 5220.

[0262] Next, the second pellet 5200 reaches the substrate 5220. The surface of the pellet 5200 that is being held in the first position and the surface of the second pellet 5200 are charged. As a result, the second pellet 5200 is pushed into the pile already. Avoid placing the pellets 5200 on the substrate 5220, and place the flat side a little away from the surface of the substrate 5220. By repeating this process, countless pellets 52 are deposited on the surface of the substrate 5220. 00 is piled up to the thickness of one layer. Also, between the pellets 5200, Non-deposited areas are generated (see FIG. 20(A)).

[0263] Next, the particles 5203 that have received energy from the plasma reach the surface of the substrate 5220. The particles 5203 can accumulate in active areas such as the surface of the pellet 5200. Therefore, the particles 5203 move to the areas where the pellets 5200 are not deposited, and the pellets The particle 5203 adheres to the side of the nozzle 5200. The bond becomes more active, and the pellet 5200 is chemically bonded to the lateral growth portion 52. 02 (see Figure 20(B)).

[0264] Furthermore, the lateral growth portion 5202 grows in the lateral direction (also called lateral growth), The pellets 5200 are connected to each other (see FIG. 20(C)). Lateral growth 5202 is formed until it fills the undeposited area. Deposition mechanism of atomic layer deposition (ALD) method Similar to a rhythm.

[0265] Therefore, even if the pellets 5200 are piled up in different directions, Since the grains 5203 grow laterally and fill the gaps between the grains 5200, clear grain boundaries are formed. In addition, the particles 5203 smoothly connect the pellets 5200. Therefore, a crystal structure different from single crystal and polycrystal is formed. A crystal structure having distortion between the crystal regions (pellets 5200) is formed. Since the regions filling the gaps are distorted crystalline regions, it is not appropriate to refer to these regions as amorphous structures. It is considered that this is not the case.

[0266] Next, a new pellet 5200 is deposited with its flat side facing the surface (see FIG. 20(D)). ) Then, the particles 5203 accumulate to fill the unaccumulated areas of the pellet 5200. By stacking the particles 520, a lateral growth portion 5202 is formed (see FIG. 20(E)). 3 adheres to the side of the pellet 5200, and the lateral growth portion 5202 grows laterally. The pellets 5200 in the mth layer are connected together (see FIG. 20(F)). The deposition continues until a thin film structure having a laminate is formed.

[0267] The deposition of the pellets 5200 also changes depending on the surface temperature of the substrate 5220. For example, if the surface temperature of the substrate 5220 is high, the pellet 5200 may be heated to the surface of the substrate 5220. As a result, the pellets 5200 are connected to each other through the particles 5203. The proportion of bonds without any bonds increases, resulting in a CAAC-OS with higher orientation. The surface temperature of the substrate 5220 during the formation of the OS film is equal to or higher than room temperature and lower than 340° C., and preferably, is equal to or higher than room temperature. More preferably, the temperature is from 100° C. to 250° C. ℃ or more and 200 ℃ or less. Therefore, the substrate 5220 is a large-area substrate of the 8th generation or more. Even when using a CAAC-OS, warping due to the deposition of the CAAC-OS hardly occurs. I understand.

[0268] On the other hand, when the surface temperature of the substrate 5220 is low, the pellet 5200 is mixed with the surface of the substrate 5220. As a result, pellets 5200 do not pile up on each other. In the case of nc-OS, the pellet 5200 is negatively charged. Due to this, the pellets 5200 may accumulate at regular intervals. Although the orientation is low, the film has a slight regularity, which makes it easier to form a film than an amorphous oxide semiconductor. The result is a dense structure.

[0269] In addition, in CAAC-OS, the gaps between the pellets are extremely small, Large pellets of one type may be formed. The inside of one large pellet has a single crystal structure. For example, the size of the pellet is 10 nm to 200 nm, 15 It may be between 20 nm and 50 nm, or between 20 nm and 50 nm.

[0270] According to the above-described film formation model, it is believed that the pellets are deposited on the surface of the substrate. CAAC-OS can be deposited even on a substrate that does not have a crystalline structure. Therefore, the above-mentioned film formation model, which has a growth mechanism different from epitaxial growth, is highly valid. In addition, because of the above-mentioned deposition model, the CAAC-OS and nc-OS It can be seen that it is possible to form a uniform film even on a large glass substrate. For example, Even if the structure of the substrate surface (the surface on which the film is formed) is amorphous (e.g., amorphous silicon oxide), It is possible to form a film of CAAC-OS.

[0271] In addition, even if the surface of the substrate on which the coating is to be applied is uneven, the pellets will adhere to the shape of the uneven surface. It is clear that the arrangement is

[0272] In addition, from the above-mentioned deposition model, the following conditions are required to deposit a CAAC-OS film with high crystallinity: First, in order to lengthen the mean free path, we need to use a higher vacuum. Next, in order to reduce damage near the substrate, the plasma energy is Next, heat energy is applied to the surface to be formed, and the plasma damage is reduced each time a film is formed. It will heal.

[0273] In addition, the above-mentioned deposition model is an In-M-Zn oxide target with multiple crystal grains. In the case where the material has a polycrystalline structure of a complex oxide such as a crystalline material, and one of the crystal grains contains a cleavage plane, For example, a mixture having indium oxide, an oxide of element M, and zinc oxide may be used. The present invention can also be applied to the case where an object target is used.

[0274] The target of the mixture does not have a cleavage plane, so when sputtered, atoms are ejected from the target. During film formation, a strong electric field region of plasma is formed near the target. Therefore, atomic particles detached from the target are connected by the action of the strong electric field region of the plasma. For example, first, atomic particles of indium join together and grow laterally, forming In Next, M-Zn-O layers are formed above and below it to complement it. Thus, even when a mixed target is used, pellets may be formed. Therefore, the above-mentioned deposition model can be applied even when a mixture target is used. However, if a strong electric field region of plasma is not formed near the target, In this case, only atomic particles detached from the target are deposited on the substrate surface. In some cases, atomic grains may grow laterally on the substrate surface. However, the orientation of the atomic grains Since the crystal orientation of the resulting thin film is not uniform, the nc -OS, etc.

[0275] (Embodiment 5) In this embodiment, a transistor having a different structure from that described in Embodiment 1 is used. The configuration will be described with reference to FIGS.

[0276] <Transistor configuration example 1> FIG. 21A is a top view of a transistor 270, and FIG. 21B is a top view of the transistor 270. FIG. 21(C) corresponds to a cross-sectional view taken along the dashed line X1-X2 in FIG. 1(A) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. The dashed line X1-X2 direction is called the channel length direction, and the dashed line Y1-Y2 direction is called the channel width direction. This may be the case.

[0277] The transistor 270 includes a conductive film 204 over a substrate 202, the conductive film 204 serving as a first gate electrode. an insulating film 206 on the substrate 202 and the conductive film 204; and an insulating film 207 on the insulating film 206. The oxide semiconductor film 208 over the insulating film 207 and the insulating film 208 electrically connected to the oxide semiconductor film 208 The conductive film 212 a serving as a source electrode and the oxide semiconductor film 208 are electrically connected to each other. The conductive film 212b serving as a drain electrode is connected to the oxide semiconductor film 208 and the conductive film 21 The insulating films 214 and 216 on the conductive film 212b and the oxide semiconductor film on the insulating film 216 An insulating film 218 is provided over the oxide semiconductor film 211b.

[0278] In the transistor 270, the insulating film 214 and the insulating film 216 The oxide semiconductor film 211a functions as a second gate insulating film of the oxide semiconductor film 270. Through an opening 252c provided in the insulating film 214 and the insulating film 216, the conductive film 212b and The oxide semiconductor film 211a is used, for example, as a pixel electrode for a display device. In the transistor 270, the oxide semiconductor film 211b has a second gate It functions as a gate electrode (also called a backgate electrode).

[0279] As shown in FIG. 21C, the oxide semiconductor film 211b is formed by insulating films 206 and 207. In the openings 252a and 252b provided in the insulating film 214 and the insulating film 216, the first The conductive film 220b is connected to the conductive film 204 which functions as a gate electrode. The same potential is applied to the semiconductor film 211b.

[0280] In this embodiment, the openings 252a and 252b are provided, and the oxide semiconductor film 2 Although the configuration in which 11b and the conductive film 204 are connected has been illustrated, the present invention is not limited to this. For example, Then, only one of the openings 252a and 252b is formed, and the oxide semiconductor A structure in which the conductive film 211b and the conductive film 204 are connected, or an opening 252a and an opening 252 Alternatively, the insulating film 204 may be omitted, and the oxide semiconductor film 211b and the conductive film 204 may not be connected to each other. In the case where the oxide semiconductor film 211b and the conductive film 204 are not connected to each other, Different potentials can be applied to the conductive film 211b and the conductive film 204, respectively.

[0281] As shown in FIG. 21B, the oxide semiconductor film 208 is used as a first gate electrode. The conductive film 204 functions as a second gate electrode, and the oxide semiconductor film 211b functions as a second gate electrode. They are positioned opposite each other and are sandwiched between two conductive films that function as gate electrodes. The length in the channel length direction of the oxide semiconductor film 211b functioning as the second gate electrode and The length in the channel width direction is determined by dividing the length in the channel length direction and the channel width of the oxide semiconductor film 208. The length of the oxide semiconductor film 208 is longer than the length in each direction. The gate electrode is covered with the oxide semiconductor film 211b via the film 216. The oxide semiconductor film 211b functioning as a gate electrode and the conductive film 204 functioning as a first gate electrode are , an opening 252a provided in the insulating films 206, 207, the insulating film 214, and the insulating film 216; Since the oxide semiconductor film 208 is connected at the insulating layer 252b, the side surface of the oxide semiconductor film 208 in the channel width direction is insulated. The oxide semiconductor film 2 functions as a second gate electrode via the insulating film 214 and the insulating film 216. It faces 11b.

[0282] In other words, in the channel width direction of the transistor 270, The conductive film 204 and the oxide semiconductor film 211b functioning as a second gate electrode are Insulating films 206 and 207 functioning as a first gate insulating film and a second gate insulating film The insulating film 214 and the insulating film 216 are connected through an opening provided therein, and the first The insulating films 206 and 207 functioning as the first gate insulating film and the second gate insulating film The oxide semiconductor film 208 is surrounded by the insulating film 214 and the insulating film 216. .

[0283] With such a structure, the oxide semiconductor film 208 included in the transistor 270 The conductive film 204 functions as a first gate electrode and the conductive film 205 functions as a second gate electrode. The transistor 270 can be electrically surrounded by the electric field of the oxide semiconductor film 211b. As described above, a channel region is formed by the electric field of the first gate electrode and the second gate electrode. The device structure of the transistor that electrically surrounds the oxide semiconductor film to be formed is This can be called a d channel (s-channel) structure.

[0284] Since the transistor 270 has an s-channel structure, the first gate electrode The conductive film 204 functions as a gate insulating film, and the electric field for inducing the channel is effectively applied to the oxide semiconductor. This allows the current drive capability of the transistor 270 to be improved. It is possible to obtain high on-current characteristics. It is also possible to increase the on-current. Therefore, it is possible to miniaturize the transistor 270. The conductive film 204 functions as a first gate electrode and the oxide film 205 functions as a second gate electrode. Since the transistor 270 has a structure surrounded by the nitride semiconductor film 211b, Strength can be increased.

[0285] <Transistor configuration example 2> Next, regarding a configuration example different from that of the transistor 270 shown in FIGS. This will be explained using Figures 22(A), (B), (C), and (D).

[0286] 22(A) and (B) are cross-sectional views of modified examples of the transistor 270 shown in FIGS. 21(B) and (C). 22(C) and (D) are diagrams illustrating the transistor 270 shown in FIG. FIG.

[0287] The transistor 270A shown in FIG. 22(A)(B) is a transistor shown in FIG. The oxide semiconductor film 208 included in the transistor 270 has a three-layer structure. The oxide semiconductor film 208 included in the transistor 270A is an oxide semiconductor film 208a. , an oxide semiconductor film 208b, and an oxide semiconductor film 208c.

[0288] The transistor 270B shown in FIG. 22(C)(D) is the same as the transistor 270 shown in FIG. The oxide semiconductor film 208 included in the transistor 270 has a two-layer structure. The oxide semiconductor film 208 included in the transistor 270B is an oxide semiconductor film 208b. , and an oxide semiconductor film 208c.

[0289] The structures of the transistors 270, 270A, and 270B shown in this embodiment are the same as those of the embodiment. The structure of the semiconductor device described in 1 can be referred to. That is, the material and manufacturing method of the substrate 202 The substrate 102 can be referred to for the material and manufacturing method of the conductive film 204. The materials and manufacturing methods of the insulating film 206 and the insulating film 207 are the same as those of the insulating film 10 The material and formation method of the oxide semiconductor film 208 can be referred to in the first The oxide semiconductor film 110 can be referred to. The material and formation method of the conductive film 21a and the conductive film 21b can be referred to those of the second oxide semiconductor film 111. The conductive film 21b is made of the same material as the source electrode 112a and the drain electrode 11 2b. Regarding the materials and manufacturing methods of the insulating film 214, the insulating film 216, and the insulating film 218, , the insulating film 114, the insulating film 116, and the insulating film 118, respectively.

[0290] Here, the oxide semiconductor films 208a, 208b, and 208c and the oxide semiconductor film 208b The band structure of the insulating film in contact with 208c will be described with reference to FIG.

[0291] FIG. 23A illustrates the insulating film 207, the oxide semiconductor films 208a, 208b, and 208c, and This is an example of a band structure in the thickness direction of a laminated structure having an insulating film 214. ) is a multilayer structure including the insulating film 207, the oxide semiconductor films 208b and 208c, and the insulating film 214. This is an example of a band structure in the thickness direction of a layer structure. Note that the band structure is shown in the figure for ease of understanding. Therefore, the insulating film 207, the oxide semiconductor films 208a, 208b, and 208c, and the insulating film 214 are The energy level (Ec) at the bottom of the conductive band is shown.

[0292] FIG. 23A shows a case where a silicon oxide film is used as the insulating films 207 and 214, and an oxide semiconductor film is used as the insulating films 207 and 214. The conductor film 208a is a metal oxide film having an atomic ratio of In:Ga:Zn=1:1:1.2. The oxide semiconductor film 208b was formed using an oxide semiconductor film formed using an oxide target. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=4:2:4.1 was used. The oxide semiconductor film 208c is formed by using an oxide semiconductor film having an atomic number of a metal element. The oxide formed using a metal oxide target with a ratio of In:Ga:Zn=1:1:1.2 FIG. 1 is a band diagram of a structure using a compound semiconductor film.

[0293] FIG. 23B shows that silicon oxide films are used as the insulating films 207 and 214, and oxide semiconductor films are used as the insulating films 207 and 214. The conductor film 208b is a metal oxide film having an atomic ratio of metal elements of In:Ga:Zn=4:2:4.1. The oxide semiconductor film 208c was formed using an oxide semiconductor film formed using an oxide target. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:1:1.2 was used. FIG. 13 is a band diagram of a structure using an oxide semiconductor film formed in accordance with the present invention.

[0294] As shown in FIGS. 23A and 23B, in the oxide semiconductor films 208a, 208b, and 208c, In other words, the energy level at the bottom of the conduction band changes smoothly. In order to have such a band structure, the oxide The interface between the oxide semiconductor film 208a and the oxide semiconductor film 208b, or the oxide semiconductor film 208b At the interface between the oxide semiconductor film 208c and the oxide semiconductor film 208c, defect quasi-states such as trap centers and recombination centers are generated. Assume that there are no impurities that would form positions.

[0295] In order to form a continuous junction in the oxide semiconductor films 208a, 208b, and 208c, Each film is deposited using a multi-chamber deposition system (sputtering system) equipped with a lock chamber. It is necessary to continuously stack the layers without exposing them to the air.

[0296] With the structure shown in FIG. 23A and FIG. 23B, the oxide semiconductor film 208b serves as a well. In the transistor using the above stacked structure, the channel region is formed of the oxide semiconductor film 2 It can be seen that it is formed in 08b.

[0297] Note that by providing the oxide semiconductor films 208a and 208c, the oxide semiconductor film 208 Therefore, trap states that may be formed in the oxide semiconductor film 208b can be made farther away from the oxide semiconductor film 208b.

[0298] In addition, the trap level is below the conduction band of the oxide semiconductor film 208b functioning as a channel region. The energy level (Ec) of the edge of the trap is farther from the vacuum level, making it easier for electrons to accumulate in the trap level. When electrons accumulate in the trap level, negative charges are fixed. This causes the threshold voltage of the transistor to shift in the positive direction. The trap level is lower than the energy level (Ec) of the conduction band minimum of the oxide semiconductor film 208b. It is preferable to configure the trap level so that the trap level is close to the empty level. This makes it difficult for electrons to accumulate, which makes it possible to increase the on-state current of the transistor. , the field effect mobility can be increased.

[0299] In addition, the oxide semiconductor films 208a and 208c have a conduction band lower than that of the oxide semiconductor film 208b. The energy level of the edge of the oxide semiconductor film 208b is close to the vacuum level. and the energy levels of the conduction band minimums of the oxide semiconductor films 208a and 208c. The difference between the two is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV That is, the electron affinity of the oxide semiconductor films 208a and 208c and the The difference between the electron affinity of the solid film 208b and the electron affinity of the solid film 208c is 0.15 eV or more, or 0.5 eV or more, and eV or less, or 1 eV or less.

[0300] With such a structure, the oxide semiconductor film 208b serves as a main current path. That is, the oxide semiconductor film 208b functions as a channel region, and the oxide semiconductor film 2 The oxide semiconductor film 208a and 208c function as oxide insulating films. a and 208c are metal elements constituting the oxide semiconductor film 208b in which the channel region is formed. Since the oxide semiconductor film 208a is made of one or more of the oxide semiconductor films At the interface with the oxide semiconductor film 208b or at the interface between the oxide semiconductor film 208b and the oxide semiconductor film 208c At the interface, the interface scattering is unlikely to occur. Therefore, at the interface, the movement of carriers is Since the electrons are not inhibited, the field effect mobility of the transistor is increased.

[0301] In addition, the oxide semiconductor films 208a and 208c function as part of a channel region. To prevent this, a material with sufficiently low electrical conductivity is used. The films 208a and 208c are also called oxide insulating films based on their physical properties and / or functions. In addition, the oxide semiconductor films 208a and 208c have a high electron affinity (vacuum level and the energy level at the bottom of the conduction band) is smaller than that of the oxide semiconductor film 208b. The energy level of the conduction band minimum of the oxide semiconductor film 208b is different from that of the oxide semiconductor film 208c ( In addition, the material with the band offset is used. In order to prevent a difference in threshold voltage between the oxide semiconductor films 208a and 208b, The energy level of the conduction band minimum of the oxide semiconductor film 208c is lower than that of the oxide semiconductor film 208b. It is preferable to use a material having a vacuum level closer to the Gamma level. For example, The energy levels of the conduction band minimums of the oxide semiconductor films 208a and 208c are The difference between the energy level of the I wish.

[0302] In addition, the oxide semiconductor films 208a and 208c do not contain a spinel crystal structure. It is preferable that the oxide semiconductor films 208a and 208c have a spinel crystal structure. When the spinel type crystal structure includes the conductive film 212a, 212b, the conductive film 212c is formed at the interface between the spinel type crystal structure and other regions. In some cases, the constituent elements of the oxide semiconductor film 208b may diffuse into the oxide semiconductor film 208b. When the conductive films 208a and 208c are made of CAAC-OS, the structure of the conductive films 212a and 212b is This is preferable because it enhances the blocking property of the component element, for example, copper element.

[0303] The thicknesses of the oxide semiconductor films 208a and 208c are determined by the composition of the conductive films 212a and 212b. The insulating film has a thickness that is greater than or equal to a thickness that can prevent the insulating film from diffusing into the oxide semiconductor film 208b. The thickness of the oxide semiconductor film 208b is set to be less than the thickness at which oxygen supply from the film 214 to the oxide semiconductor film 208b is suppressed. For example, When the thickness of the oxide semiconductor films 208a and 208c is 10 nm or more, the conductive film 212a This can prevent the constituent elements of the oxide semiconductor film 212b from diffusing into the oxide semiconductor film 208b. In addition, when the thickness of the oxide semiconductor films 208a and 208c is set to 100 nm or less, the insulating film 214 Therefore, oxygen can be effectively supplied to the oxide semiconductor film 208b.

[0304] In this embodiment, the oxide semiconductor films 208a and 208c are formed using a metal element. The atomic ratio of In:Ga:Zn was 1:1:1.2. However, the present invention is not limited to this structure. The compound semiconductor films 208a and 208c are made of In:Ga:Zn=1:1:1 [atomic ratio], In:Ga:Zn=1:3:2 [atomic ratio], In:Ga:Zn=1:3:4 [atomic ratio] ], or a metal oxide target with In:Ga:Zn=1:3:6 [atomic ratio] A formed oxide semiconductor film may be used.

[0305] Note that the oxide semiconductor films 208a and 208c were formed using a compound in which In:Ga:Zn=1:1:1 [original When a metal oxide target having a molecular weight ratio of 1:1 or less is used, the oxide semiconductor films 208a and 208c are In:Ga:Zn=1:β1(0<β1≦2):β2(0<β2≦3) In addition, the oxide semiconductor films 208a and 208c were formed of In:Ga:Zn=1:3:4 [prime When a metal oxide target having a molecular weight ratio of 1:1 or less is used, the oxide semiconductor films 208a and 208c are In:Ga:Zn=1:β3(1≦β3≦5):β4(2≦β4≦6) The oxide semiconductor films 208a and 208c were formed of In:Ga:Zn=1:3:6 [primary When a metal oxide target having a molecular weight ratio of 1:1 or less is used, the oxide semiconductor films 208a and 208c are In:Ga:Zn=1:β5(1≦β5≦5):β6(4≦β6≦8) .

[0306] In addition, the oxide semiconductor film 208 included in the transistor 270 and the transistor 270A In the drawing, the oxide semiconductor film 208c in the semiconductor device 270B is the conductive film 212a. In other words, a part of the oxide semiconductor film becomes concave. However, one embodiment of the present invention is not limited to this. The oxide semiconductor film in the region not overlapping with the conductive films 212a and 212b does not necessarily have to have a recess. An example of this case is shown in Figures 24(A) and 24(B). 24A and 24B are cross-sectional views showing an example of the transistor 270B shown above. The oxide semiconductor film 208 does not have a recess.

[0307] In addition, the transistor according to the present embodiment can be freely combined with each of the above structures. It is possible.

[0308] The structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiment modes. They can be used in combination.

[0309] (Embodiment 6) In this embodiment, a display device 80 according to one embodiment of the present invention will be described with reference to FIGS. I will use this to explain.

[0310] The display device 80 shown in FIG. 25(A) includes a pixel section 71, a scanning line driving circuit 74, and a signal line driving circuit. The scanning line driving circuit 74 drives the scanning line 76. m scanning lines 77 whose positions are controlled, and m signal line drive lines 78 each arranged parallel or approximately parallel to each other. and n signal lines 79 whose potentials are controlled by an operating circuit 76. The pixel 1 has a plurality of pixels 70 arranged in a matrix. The common lines 75 are arranged in parallel or approximately parallel to each other. The signal line driver circuit 76 may be collectively referred to as a driver circuit section.

[0311] Each scanning line 77 corresponds to any one of the pixels 70 arranged in m rows and n columns in the pixel section 71. The signal lines 79 are electrically connected to the n pixels 70 arranged in one row. Among the pixels 70 arranged in m rows and n columns, m pixels 70 arranged in any one of the columns are electrified. Both m and n are integers of 1 or more. Among the pixels 70 arranged in n rows and n columns, m pixels 70 arranged in any one row are electrically connected to is connected to.

[0312] FIG. 25B shows a circuit diagram that can be used for the pixel 70 of the display device 80 shown in FIG. 25A. 1 shows an example of a road configuration.

[0313] The pixel 70 shown in FIG. 25B includes a liquid crystal element 51, a transistor 52, and a capacitor element 55. And, it has.

[0314] One of the pair of electrodes of the liquid crystal element 51 is connected to the transistor 52, and the potential is The other of the pair of electrodes of the liquid crystal element 51 is connected to the common line 75. The liquid crystal element 51 has a liquid crystal, The orientation state is controlled by data written to the transistor 52 .

[0315] The liquid crystal element 51 controls the transmission or non-transmission of light by the optical modulation effect of the liquid crystal. The optical modulation effect of liquid crystal is achieved by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal element 51 is controlled by a directional electric field or an oblique electric field. Liquid crystals include thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, polymer dispersed liquid crystals, and strong Dielectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials can be used depending on the conditions. , cholesteric phase, smectic phase, cubic phase, chiral nematic phase, isotropic phase etc.

[0316] In addition, when the in-plane switching method is adopted, liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent is used in the liquid crystal layer. It has a short response time and is optically isotropic. It also contains a liquid crystal that exhibits a blue phase and a chiral agent. The liquid crystal composition does not require alignment treatment and has little viewing angle dependency. Since the rubbing process is unnecessary, the electrostatic breakdown caused by the rubbing process is eliminated. Therefore, defects and damage to the liquid crystal display device during the manufacturing process can be reduced. do.

[0317] The display device 80 having the liquid crystal element 51 is driven by a method such as TN (Twisted Neutron) driving. matic) mode, IPS (In-Plane-Switching) mode, FFS (Fringe Field Switching) mode, ASM (Axially Symmetric aligned Micro-cell mode, OCB (Opt ical Compensated Birefringence mode, FLC(F erroelectric Liquid Crystal) mode, AFLC (Ant iFerroelectric Liquid Crystal mode etc. This can be done.

[0318] The display device 80 is a normally black type liquid crystal display device, for example, a vertical alignment (VA) The liquid crystal display device may be a transmission type liquid crystal display device that employs a vertical alignment mode. (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, ASV mode etc. can be used.

[0319] In this embodiment, the horizontal electric field method is mainly used, typically the FFS mode and the DPS described later. The modes will now be described.

[0320] In the configuration of the pixel 70 shown in FIG. One of the in-electrodes is electrically connected to the signal line 79, and the other is a pair of electrodes of the liquid crystal element 51. The gate electrode of the transistor 52 is electrically connected to the scanning line 77. The transistor 52 has a function of controlling the writing of data of the data signal. Yes.

[0321] In the configuration of the pixel 70 shown in FIG. 25(B), one of the pair of electrodes of the capacitance element 55 is a transistor. The pair of capacitance elements 55 are connected to the other of the source electrode and the drain electrode of the transistor 52. The other electrode is electrically connected to a common line 75. The potential value of the common line 75 is The capacitance element 55 is a storage element for storing written data. In the display device 80 driven in the FFS mode, In this case, one of the pair of electrodes of the capacitor element 55 is a part of one of the pair of electrodes of the liquid crystal element 51 or The other of the pair of electrodes of the capacitance element 55 is the other of the pair of electrodes of the liquid crystal element 51. In part or in whole.

[0322] <Example of element substrate configuration> Next, a specific configuration of the element substrate included in the display device 80 will be described. A display device 80 driven in the S mode has a plurality of pixels 70a, 70b, and 70c. The surface view is shown in FIG.

[0323] In FIG. 26, the conductive film 13 functioning as the scanning line is arranged in a direction substantially perpendicular to the signal line ( The conductive film 21a, which functions as a signal line, is provided so as to extend in the left-right direction. The scanning lines are arranged to extend in directions substantially perpendicular to each other (vertical direction in the drawing). The conductive film 13 is electrically connected to the scanning line driving circuit 74 and functions as a signal line. The conductive film 21a is electrically connected to a signal line driving circuit 76 (see FIG. 25(A)).

[0324] The transistor 52 is provided near the intersection of the scan line and the signal line. 52 is a conductive film 13 that functions as a gate electrode, a gate insulating film (not shown in FIG. 26), An oxide semiconductor film 19a in which a channel region is formed on the gate insulating film, a source electrode and conductive films 21a and 21b functioning as drain electrodes. The region overlapping the oxide semiconductor film 19a corresponds to the transistor 5. The conductive film 21a also functions as a signal line. The region overlapping with the semiconductor film 19a serves as a source electrode or a drain electrode of the transistor 52. 26, the end portion of the scan line is formed of the oxide semiconductor film. Therefore, the scanning lines are located outside the end of the backlight. As a result, the oxide semiconductor film 19a included in the transistor functions as a light-shielding film that blocks light. Since the light is not irradiated to the transistor, fluctuations in the electrical characteristics of the transistor can be suppressed.

[0325] The conductive film 21b is electrically connected to the oxide semiconductor film 19b having a function of a pixel electrode. In addition, on the oxide semiconductor film 19b, A common electrode 29 is provided.

[0326] The common electrode 29 has stripe-shaped regions extending in a direction intersecting the signal lines. The region having a shape similar to that of the first embodiment is connected to a region extending in a direction parallel or substantially parallel to the signal line. In a plurality of pixels of the display device 80, the common electrode 29 having striped regions is are at the same potential.

[0327] The capacitance element 55 is formed in a region where the oxide semiconductor film 19b and the common electrode 29 overlap each other. The oxide semiconductor film 19b and the common electrode 29 have a light-transmitting property. It has translucency.

[0328] In addition, since the capacitance element 55 has a light-transmitting property, the capacitance element 55 can be made large (large surface area) within the pixel 70. Therefore, it is possible to increase the aperture ratio, typically 50% or more, and It is possible to obtain a display device having an increased capacitance value, while increasing the capacitance to 60% or more. For example, in a high-resolution display device, such as a liquid crystal display device, the pixel surface Therefore, the capacitance element area is small. Therefore, the capacitance value stored in the capacitive element becomes smaller. Since the element 55 has a light-transmitting property, by providing the capacitor element in the pixel, the pixel can be sufficiently It is possible to increase the aperture ratio while obtaining a sufficient capacitance value. i or higher, or even 300 ppi or higher, or even 500 ppi or higher It can be suitably used for the following:

[0329] In addition, in a liquid crystal display device, the larger the capacitance value of the capacitance element, the more In the liquid crystal display device, the period during which the alignment of the liquid crystal molecules in the liquid crystal element can be kept constant can be extended. When displaying a still image, the period can be extended, reducing the frequency with which image data is rewritten. It is possible to reduce the number of circuits, and therefore the power consumption. The structure shown in FIG. 1 can increase the aperture ratio even in a high-resolution display device. It is possible to efficiently use light from light sources such as backlights, thereby reducing the power consumption of display devices. It is possible.

[0330] Next, cross-sectional views taken along dashed lines Q1-R1 and S1-T1 in FIG. 7. The transistor 52 shown in FIG. 27 is a channel-etched transistor. The dashed and dotted line Q1-R1 indicates the channel length direction of the transistor 52 and the 1 is a cross-sectional view, and the cross-sectional view taken along line S1-T1 is a cross-section of the transistor 52 in the channel width direction. FIG.

[0331] The transistor 52 shown in FIG. 27 is a transistor having a single gate structure. The semiconductor device has a conductive film 13 that functions as a gate electrode provided on the substrate 11. An insulating film 15 is formed on the conductive film 13 which functions as a gate electrode, and a and a conductive layer functioning as a gate electrode via the insulating layer 15 and the insulating layer 17. The oxide semiconductor film 19a overlaps with the film 13, and the source electrode and the The insulating film 17 and the conductive film 21a and 21b function as the drain electrode and the insulating film 17 are also provided. The nitride semiconductor film 19a and the conductive films 21a and 21b functioning as a source electrode and a drain electrode are An insulating film 23 is formed on the insulating film 1b, and an insulating film 25 is formed on the insulating film 23. The oxide semiconductor film 19b is formed on the insulating film 25. The oxide semiconductor film 19b is One of the conductive films 21a and 21b functioning as a drain electrode and a drain electrode, here, the conductive film 21 b through openings provided in the insulating film 23 and the insulating film 25. An insulating film 27 is formed on the oxide semiconductor film 19b. , is formed on the insulating film 27.

[0332] The oxide semiconductor film 19b is formed on the insulating film 25 at a position overlapping with the oxide semiconductor film 19a. By providing the oxide semiconductor film 19b, the transistor 52 can be a double-gate electrode. A transistor having a bull gate structure may also be used.

[0333] In addition, the region where the oxide semiconductor film 19b, the insulating film 27, and the common electrode 29 overlap each other forms a capacitance. It functions as element 55.

[0334] Note that the cross-sectional view of one aspect of the embodiment of the present invention is not limited to this. For example, the oxide semiconductor film 19b may have a slit. The compound semiconductor film 19b may have a comb-tooth shape.

[0335] The display device 80 according to one embodiment of the present invention has the same structure as the semiconductor device described in the first embodiment. That is, the material and manufacturing method of the substrate 11 can be referred to the substrate 102. The material and manufacturing method of the film 13 can be referred to as the gate electrode 104. The material and formation method of the insulating film 7 can be referred to those of the insulating films 106 and 107, respectively. The materials and manufacturing methods of the semiconductor film 19a and the oxide semiconductor film 19b are the same as those of the first oxide semiconductor film 19a and the first oxide semiconductor film 19b. The semiconductor film 110 and the second oxide semiconductor film 111 can be referred to. The material and manufacturing method of 21b are the source electrode 112a and the drain electrode 112b, respectively. The materials and manufacturing methods of the insulating films 23, 25, and 27 are respectively The insulating film 114, the insulating film 116, and the insulating film 118 can be referred to. The manufacturing method can be referred to for the conductive film 120.

[0336] As shown in FIG. 28, the common electrode 29 is formed on the insulating film 28 provided on the insulating film 27. The insulating film 28 functions as a planarizing film. The material and the formation method thereof can be referred to for the insulating film 119 described in Embodiment 3.

[0337] <Configuration Example of Element Substrate (Modification 1)> Next, a plurality of pixels 70d having a different configuration from the pixels shown in FIG. A top view of 70e and 70f is shown in FIG.

[0338] In FIG. 29, the conductive film 13 functioning as a scanning line is provided extending in the left-right direction in the figure. The conductive film 21a functioning as a signal line has a bent V-shape. The scanning lines are extended in a direction substantially perpendicular to the scanning lines (the vertical direction in the figure). The conductive film 13 functioning as a scanning line is electrically connected to a scanning line driving circuit 74. The conductive film 21a, which functions as a signal line, is electrically connected to the signal line driving circuit 76. (See Figure 25(A)).

[0339] The transistor 52 is provided near the intersection of the scan line and the signal line. 52 is a conductive film 13 that functions as a gate electrode, a gate insulating film (not shown in FIG. 29), An oxide semiconductor film 19a in which a channel region is formed on the gate insulating film, a source electrode and conductive films 21a and 21b functioning as drain electrodes. The region overlapping the oxide semiconductor film 19a corresponds to the transistor 5. The conductive film 21a also functions as a signal line. The region overlapping with the semiconductor film 19a serves as a source electrode or a drain electrode of the transistor 52. 29, the end portion of the scan line is formed of the oxide semiconductor film. Therefore, the scanning lines are located outside the end of the backlight. As a result, the oxide semiconductor film 19a included in the transistor functions as a light-shielding film that blocks light. Since the light is not irradiated to the transistor, fluctuations in the electrical characteristics of the transistor can be suppressed.

[0340] The conductive film 21b is electrically connected to the oxide semiconductor film 19b having a function of a pixel electrode. The oxide semiconductor film 19b is formed in a comb-like shape. An insulating film (not shown in FIG. 29) is provided on the substrate, and a common electrode 29 is provided on the insulating film. The common electrode 29 is arranged in an oxide semiconductor layer so as to overlap with the oxide semiconductor film 19b in a top view. The common electrode 29 is formed in a comb shape so as to mesh with the compound semiconductor film 19b. The display device 80 is connected to a region extending in a direction parallel or substantially parallel to the scanning lines. In the plurality of pixels of the pixel, the common electrode 29 has the same potential in each region. The conductive film 19b and the common electrode 29 are bent so as to follow the signal line (conductive film 21a). It has a V-shape.

[0341] The capacitance element 55 is formed in a region where the oxide semiconductor film 19b and the common electrode 29 overlap each other. The oxide semiconductor film 19b and the common electrode 29 have a light-transmitting property. It has translucency.

[0342] Next, cross-sectional views taken along dashed lines Q2-R2 and S2-T2 in FIG. 30 is a channel-etched transistor. The dashed and dotted line Q2-R2 indicates the channel length direction of the transistor 52 and the 2 is a cross-sectional view, and the cross-sectional view taken along the line S2-T2 is a cross-section of the transistor 52 in the channel width direction. FIG.

[0343] The transistor 52 shown in FIG. 30 is a transistor having a single gate structure. The semiconductor device has a conductive film 13 that functions as a gate electrode provided on the substrate 11. An insulating film 15 is formed on the conductive film 13 which functions as a gate electrode, and a and a conductive layer functioning as a gate electrode via the insulating layer 15 and the insulating layer 17. The oxide semiconductor film 19a overlaps with the film 13, and the source electrode and the The insulating film 17 and the conductive film 21a and 21b function as the drain electrode and the insulating film 17 are also provided. The nitride semiconductor film 19a and the conductive films 21a and 21b functioning as a source electrode and a drain electrode are An insulating film 23 is formed on the insulating film 1b, and an insulating film 25 is formed on the insulating film 23. The oxide semiconductor film 19b is formed on the insulating film 25. The oxide semiconductor film 19b is One of the conductive films 21a and 21b functioning as a drain electrode and a drain electrode, here, the conductive film 21 b through openings provided in the insulating film 23 and the insulating film 25. An insulating film 27 is formed on the oxide semiconductor film 19b. , is formed on the insulating film 27.

[0344] In the pixel shown in FIG. 30, the orientation of the liquid crystal provided on the insulating film 27 and the common electrode 29 is controlled. In the region controlled by the gate, the oxide semiconductor film 19b having the function of a pixel electrode is formed on the insulating film 25. The common electrode 29 is provided on the insulating film 27. A display device that controls the alignment of liquid crystal by generating an electric field between a pair of electrodes arranged on the same substrate. Operation method is DPS (Differential-Plane-Switching) mode It can be called.

[0345] The oxide semiconductor film 19b is formed on the insulating film 25 at a position overlapping with the oxide semiconductor film 19a. By providing the oxide semiconductor film 19b, the transistor 52 can be a double-gate electrode. A transistor having a bull gate structure may also be used.

[0346] In addition, the region where the oxide semiconductor film 19b, the insulating film 27, and the common electrode 29 overlap each other forms a capacitance. It functions as element 55.

[0347] The liquid crystal display device shown in FIG. 29 and FIG. 30 includes an oxide semiconductor film 19b and a common electrode 29. The vicinity of each end portion overlaps with each other to form a capacitance element of the pixel. With such a configuration, the capacitance element can be made not too large but of an appropriate size in a large liquid crystal display device. It can be formed into.

[0348] As shown in FIG. 31, the common electrode 29 is disposed on the insulating film 28 provided on the insulating film 27. It may also be provided on the top.

[0349] As shown in FIGS. 32 and 33, the oxide semiconductor film 19b and the common electrode 29 overlap each other. The size of the capacitance element depends on the resolution and driving method of the display device. Thus, the positional relationship between the oxide semiconductor film 19b and the common electrode 29 can be appropriately determined. In addition, the common electrode 29 of the display device shown in FIG. It may be provided on the membrane 28 (see FIG. 34).

[0350] 29 and 30, the signal line (conductive The width d1 of the region extending in a direction parallel or approximately parallel to the film 21a) is The width d2 of the region extending in a direction parallel or approximately parallel to the line is smaller than that of the region extending in the direction parallel or approximately parallel to the line (see FIG. 30), but is not limited thereto. As shown in FIG. 35 and FIG. 36, the width d1 is larger than the width d2. The width d1 and the width d2 may be equal. 0d), the oxide semiconductor film 19b and / or the common electrode 29 are arranged in parallel with the signal line. Alternatively, the widths of the multiple regions extending in the approximately parallel directions may be different from one another.

[0351] As shown in FIG. 37, the insulating film 28 provided on the insulating film 27 is It may be configured such that only the area overlapping with the common electrode 29 is left and removed. In this case, the insulating film 28 can be etched using the common electrode 29 as a mask. The unevenness of the common electrode 29 on the insulating film 28 having a film function can be suppressed, and the common electrode 2 The side of the insulating film 28 is gently formed from the end of the insulating film 27 to the end of the insulating film 27. 8, a part of the surface of the insulating film 28 in a region parallel to the substrate 11 is a common electrode 29. It is also possible to adopt a configuration in which the insulating film is not covered with the insulating film.

[0352] As shown in FIGS. 39 and 40, the common electrode is formed in the same layer as the oxide semiconductor film 19b. The common electrode shown in FIG. The oxide semiconductor film 19c can be formed of the same material at the same time as the oxide semiconductor film 19b.

[0353] The display device 80 according to one embodiment of the present invention has the same structure as the semiconductor device described in the first embodiment. That is, the material and manufacturing method of the substrate 11 can be referred to the substrate 102. The material and manufacturing method of the film 13 can be referred to as the gate electrode 104. The material and formation method of the insulating film 7 can be referred to those of the insulating films 106 and 107, respectively. The materials and manufacturing methods of the semiconductor film 19a and the oxide semiconductor film 19b are the same as those of the first oxide semiconductor film 19a and the first oxide semiconductor film 19b. The semiconductor film 110 and the second oxide semiconductor film 111 can be referred to. The material and manufacturing method of 21b are the source electrode 112a and the drain electrode 112b, respectively. The materials and manufacturing methods of the insulating films 23, 25, and 27 are respectively The insulating film 114, the insulating film 116, and the insulating film 118 can be referred to. The manufacturing method can be referred to for the conductive film 120.

[0354] The material and manufacturing method of the insulating film 28 may be the same as those of the insulating film 119 described in Embodiment 3. can.

[0355] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0356] <Configuration Example of Element Substrate (Modification 2)> Next, a display device 80 shown in FIG. 25A has a plurality of pixels 3 having a different configuration from the above. An example of the circuit configuration of the pixel 370 is shown in FIG. FIG. 41B is a top view of a plurality of pixels 370g, 370h, and 370i of the display device 80. FIG. 42 is a cross-sectional view taken along dashed lines Q3-R3 and S3-T3 in FIG. 41(B). be.

[0357] The pixel 370 includes a liquid crystal element 351a and a liquid crystal element 351b connected in parallel instead of the liquid crystal element 51. The pixel 70 differs from the pixel 70 described with reference to FIG. 25(B) in that it includes a subpixel 351b. The different configurations will be described in detail below, and the parts where similar configurations can be used will be described in detail below. The liquid crystal element 351b is omitted in the cross-sectional view shown in FIG. .

[0358] In the liquid crystal element 351a, the oxide semiconductor film 319b is a drain of the transistor 352. The conductive film 329 is electrically connected to the scanning line (conducting and electrically connected to a wiring VCOM extending parallel or approximately parallel to the conductive film 13), It has the function of a common electrode.

[0359] In the liquid crystal element 351b, the conductive film 329 is electrically connected to the drain electrode of the transistor 352. The oxide semiconductor film 319b is electrically connected to the gate electrode 319b and functions as a pixel electrode. and electrically connected to a wiring VCOM extending parallel or approximately parallel to the conductive film 13), It has the function of a common electrode.

[0360] A wiring VCOM electrically connected to the conductive film 329 and a wiring VCOM electrically connected to the oxide semiconductor film 319b The wiring VCOM connected to the power supply 1 is shown as one wiring in FIG. The wiring VCOM electrically connected to the conductive film 329 and the oxide semiconductor film 319b and the wiring VCOM electrically connected thereto may be at the same potential or at different potentials. The wiring VCOM and the oxide semiconductor film 319b which are electrically connected to the conductive film 329 may be The wiring VCOM electrically connected to the scanning line driving circuit 74 is electrically connected to the 25A, the same potential can be obtained by connecting the two terminals.

[0361] The pixel 370 includes a capacitor 355a and a capacitor 355b. One of a pair of electrodes of the capacitor 355a includes the oxide semiconductor film 319b. The pair of electrodes of the capacitor 355a are electrically connected to the drain electrode of the transistor 352. The other electrode of the capacitor 355b includes the conductive film 329. and is electrically connected to the drain electrode of the transistor 352. The other of the pair of electrodes includes an oxide semiconductor film 319b.

[0362] The material and formation method of the oxide semiconductor film 319b can be referred to those of the oxide semiconductor film 19b described above. In addition, the material and manufacturing method of the conductive film 329 can be referred to for the common electrode 29 described above.

[0363] The liquid crystal element 351a and the liquid crystal element 351b are connected in parallel to each other, so that the applied voltage is The conductive film 3 with respect to the oxide semiconductor film 319b is observed when the liquid crystal element is driven in the inverted state. The asymmetry of the characteristics of the liquid crystal element resulting from the arrangement of 29 can be offset.

[0364] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0365] (Embodiment 7) In this embodiment, a vertical alignment (VA:Ve The structure of a pixel having a liquid crystal element operating in a vertical alignment mode is described. 43 to 45. FIG. 43 shows a top view of a pixel included in a liquid crystal display device. 44 is a side view including a cross section taken along line Z1-Z2 in FIG. FIG. 45 is an equivalent circuit diagram of a pixel included in a liquid crystal display device.

[0366] VA type is a type of method for controlling the arrangement of liquid crystal molecules in a liquid crystal display panel. In a liquid crystal display device, when no voltage is applied, the liquid crystal molecules are oriented vertically to the panel surface. This is a method that faces the camera.

[0367] In this embodiment, a pixel is divided into several regions (subpixels), Each molecule is designed to tilt in a different direction. In the following explanation, we will discuss a liquid crystal display device that takes multi-domain design into consideration. The location will be explained.

[0368] In FIG. 43, Z1 is a top view of the substrate 600 on which the pixel electrode 624 is formed, and Z3 is a common 6 is a top view of the substrate 601 on which the electrode 640 is formed, and Z2 is a top view of the substrate 601 on which the pixel electrode 624 is formed. 6 is a top view of a state in which a substrate 600 and a substrate 601 on which a common electrode 640 is formed are superimposed. be.

[0369] On the substrate 600, a transistor 628 and a pixel electrode 624 connected thereto, and a capacitance element A drain electrode 618 of the transistor 628 is formed by insulating film 623 and The insulating film 625 is electrically connected to the pixel electrode 624 through an opening 633 formed in the insulating film 625. An insulating film 627 is provided on the element electrode 624 .

[0370] The transistor 628 may be any of the transistors described in Embodiments 1 to 3 or 5. A transistor can be applied.

[0371] The capacitance element 630 is formed by a wiring 613 on the capacitance wiring 604 which is a first capacitance wiring and an insulating film 6 The capacitance wiring 604 is made up of a transistor 623, an insulating film 625, and a pixel electrode 624. The gate wiring 615 of the gate electrode 628 can be formed of the same material at the same time. 13 can be formed simultaneously with the drain electrode 618 and the wiring 616 using the same material. do.

[0372] The pixel electrode 624 is formed using the oxide semiconductor film having low resistivity described in Embodiment 1. That is, the material and manufacturing method of the pixel electrode 624 can be the same as those shown in Embodiment 1. The second oxide semiconductor film 111 can be seen.

[0373] The pixel electrode 624 is provided with a slit 646. The slit 646 controls the alignment of the liquid crystal. This is for the purpose.

[0374] The transistor 629 and the pixel electrode 626 and the capacitor element 631 connected thereto are The transistor 628, the pixel electrode 624, and the capacitor element 630 can be formed in the same manner. The transistor 628 and the transistor 629 are both connected to the wiring 616. 6 serves as a source electrode in the transistor 628 and the transistor 629. The pixel of the liquid crystal display panel shown in this embodiment has a pixel electrode 624 and a pixel electrode 626. The pixel electrode 624 and the pixel electrode 626 are sub-pixels.

[0375] A colored film 636 and a common electrode 640 are formed on the substrate 601. A protrusion 644 is formed. In addition, a slit 647 is provided in the common electrode 640. An alignment film 648 is formed on the pixel electrodes 624, and a common electrode 640 and a protrusion An alignment film 645 is formed on the substrate 644. A liquid crystal layer 65 is formed between the substrate 600 and the substrate 601. 0 is formed.

[0376] The common electrode 640 is formed using the same material as the conductive film 120 described in the first embodiment. It is preferable that the slit 647 and the protrusion 644 are formed in the common electrode 640. , has the function of controlling the alignment of liquid crystals.

[0377] When a voltage is applied to the pixel electrode 624 having the slit 646, The slit 646 and the protrusion 64 on the substrate 601 side cause distortion of the electric field (diagonal electric field). 4 and slits 647 are arranged so as to interdigitate with each other, so that an oblique electric field is generated effectively. By controlling the alignment of the liquid crystals by generating a thin film, the direction in which the liquid crystals are aligned can be made to differ depending on the location. In other words, the viewing angle of the liquid crystal display panel is widened by making it into a multi-domain. Even if either the protrusion 644 or the slit 647 is provided on the 601 side, good.

[0378] FIG. 44 shows a state in which the substrate 600 and the substrate 601 are overlapped and liquid crystal is injected. The pixel electrode 624, the liquid crystal layer 650, and the common electrode 640 are overlapped with each other, so that the liquid crystal pixel A child is formed.

[0379] An equivalent circuit of this pixel structure is shown in FIG. 45. Transistors 628 and 629 are , both of which are connected to the gate wiring 602 and the wiring 616. In this case, the capacitance wiring 604 and the capacitance By making the potential of the wiring 605 different, the operations of the liquid crystal elements 651 and 652 can be made different. That is, the potentials of the capacitance wiring 604 and the capacitance wiring 605 can be controlled individually. This enables precise control of the alignment of the liquid crystals to widen the viewing angle.

[0380] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0381] (Embodiment 8) In this embodiment, a display device including the transistor described in the above embodiment will be An example will be described below with reference to FIGS. 46 and 47.

[0382] FIG. 46 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 is provided on the first substrate 701, and a source driver is provided on the first substrate 701. A pixel portion 702, a source driver circuit portion 704, a gate driver circuit portion 706, A sealant 712 is disposed so as to surround the path portion 704 and the gate driver circuit portion 706. and a second substrate 705 disposed so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 seal the entire structure. Although not shown in FIG. 46, a display element is provided between the first substrate 701 and the second substrate 705. can be done.

[0383] The display device 700 is surrounded by a sealant 712 on the first substrate 701. A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 705 are arranged in a region different from the region. and an FPC terminal portion 708 (FPC: Flexible Printed Circuit portion 706) electrically connected to the In addition, the FPC terminal portion 708 is provided with a The FPC 716 is connected to the pixel section 702 and the source driver circuit Various signals are supplied to the pixel section 704 and the gate driver circuit section 706. 02, a source driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section 7 08 are connected to wiring 710. Various signals, etc., supplied by FPC 716 The pixel section 702, the source driver circuit section 704, the gate driver It is provided to a circuit portion 706 and an FPC terminal portion 708 .

[0384] The display device 700 may include a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is mounted on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead, we use COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0385] The pixel portion 702 of the display device 700 has a plurality of transistors and a capacitor. In addition, the semiconductor device described in the first embodiment can be applied to the source driver circuit. The path section 704 and the gate driver circuit section 706 include a plurality of transistors and wiring contacts. The semiconductor device described in the second embodiment can be applied.

[0386] The display device 700 may also take a variety of forms or have a variety of display elements. The display element can be, for example, a liquid crystal element, an LED (white LED, red LED, green LED, etc.), EL (electroluminescence) elements (organic and EL elements containing inorganic substances, organic EL elements, inorganic EL elements), transistors (emitting light in response to electric current) light-emitting transistor), electron emitter, electrophoretic element, grating light valve (G LV), Digital Micromirror Device (DMD), DMS (Digital Microsystem Scattering element, MIRASOL (registered trademark) display, IMOD (Interface Modulation Display) Microelectromechanical systems (MEMS) such as piezoelectric ceramic displays and Display element using electromechanical system, electrowetting In addition to these, there are other devices that can be used to create contrast by electrical or magnetic effects. The display element may have a display medium whose luminance, reflectance, transmittance, etc. change. Quantum dots may be used as the liquid crystal display. Play (transmissive LCD, semi-transmissive LCD, reflective LCD) LCDs using EL elements include direct-view LCDs and projection LCDs. An example of a display device is an EL display. One example is a field emission display (FED) or SED type flat panel display. Display (SED: Surface-conduction Electron-em Examples of display devices using quantum dots include , quantum dot displays, etc. Display devices using electronic ink or electrophoretic elements An example is electronic paper. When realizing a display, a part or all of the pixel electrodes are used as reflective electrodes. For example, a part or the whole of the pixel electrode may be made of aluminum. In this case, the SRAM may be formed under the reflective electrode. It is also possible to provide a memory circuit such as a memory cell. This can further reduce power consumption. This can be done.

[0387] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying in color are R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a pixel, and a pixel of white (W). As in the column, two colors of RGB form one color element, and different two colors are generated depending on the color element. You can also select colors to configure the color. Or, you can select one or more colors such as yellow, cyan, and magenta for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, and may be used in monochrome display devices. The present invention can also be applied to display devices.

[0388] In addition, the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) is white light ( In order to display full color on a display device, a colored film (also called a color filter) is used. The colored film may be, for example, red (R), green (G), blue (B) , yellow (Y), etc. can be used in appropriate combination. The color reproducibility can be improved compared to when a colored film is not used. By disposing a region having a colored film and a region not having a colored film, The white light in the display may be directly used for display. This reduces the decrease in brightness caused by the colored film during bright display, reducing power consumption by 20%. However, it may be possible to reduce the light emission by about 30% when using self-luminous elements such as organic EL elements and inorganic EL elements. When using a full-color display, R, G, B, Y, and white (W) are generated by It is also possible to emit light from an element having a certain color. In some cases, power consumption can be reduced even further than when the

[0389] In this embodiment, a display device using a liquid crystal element as a display element will be described. This will be explained using Figure 47.

[0390] Fig. 47 is a cross-sectional view taken along the dashed line UV shown in Fig. 46. 700 includes a wiring section 711, a pixel section 702, a source driver circuit section 704, The FPC terminal portion 708 includes a wiring 710. The pixel portion 702 also includes a transistor 750 and a capacitor 790. The driver circuit portion 704 includes a transistor 752 .

[0391] For example, the transistor 150 described in Embodiment 1 is used as the transistor 750. The transistor 151 described in Embodiment 2 can be used as the transistor 752. There can be.

[0392] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. Therefore, the retention time of electric signals such as image signals can be extended, and the power supply When the write interval is on, it is possible to set it longer. This reduces the frequency of refresh operations. This has the effect of reducing power consumption.

[0393] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section In other words, the driver transistor can be formed on the same substrate as the driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, a high quality image can be provided.

[0394] As the capacitor 790, the capacitor 160 described in Embodiment 1 can be used. Since the capacitor 790 has a light-transmitting property, the capacitor 790 can be formed large (large area). Therefore, the aperture ratio can be increased while the capacitance value It is possible to provide a display device having increased

[0395] In addition, in FIG. 47, insulating films 764, 766, and 768 are provided on the transistor 750. It is being done.

[0396] The insulating films 764, 766, and 768 are the insulating films 114 and 116 shown in the first embodiment, respectively. The insulating film 116 and the insulating film 118 can be formed by the same material and manufacturing method. A planarizing film may be provided on the insulating film 768. The insulating film 119 can be formed using a material and a manufacturing method similar to those of the insulating film 119.

[0397] The wiring 710 serves as a source electrode and a drain electrode of the transistors 750 and 752. The wiring 710 is formed in the same process as the conductive film that functions as the transistor 750. A conductive film formed in a process different from that of the source electrode and drain electrode of 752, for example, a gate electrode The wiring 710 may be formed of, for example, a material containing copper. When used, signal delays caused by wiring resistance are reduced, making it possible to display on a large screen.

[0398] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed in the same process as the conductive film that functions as the drain electrode. The terminal of the PC 716 is electrically connected via an anisotropic conductive film 780 .

[0399] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be the same as those shown in the first embodiment. The same material as the substrate 102 can be used.

[0400] On the second substrate 705 side, a light-shielding film 738 functioning as a black matrix and a color A colored film 736 that functions as a filter, a light-shielding film 738, and an insulating film that is in contact with the colored film 736 734 will be provided.

[0401] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. A device for controlling the distance (cell gap) between the first substrate 701 and the second substrate 705 is provided. In addition, a spherical spacer may be used as the structure 778.

[0402] In this embodiment, the structure 778 is provided on the first substrate 701 side. However, the present invention is not limited to this. For example, a structure 778 is provided on the second substrate 705 side. or a structure in which the structures 778 are provided on both the first substrate 701 and the second substrate 705. It may also be composed of.

[0403] The display device 700 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film 772, a conductive The conductive film 774 is provided on the second substrate 705 side. The conductive film 772 and the conductive film 774 function as a counter electrode. Depending on the applied voltage, the orientation state of the liquid crystal layer 776 changes, causing light to pass or not to pass. can be controlled to display an image.

[0404] The conductive film 772 serves as a source electrode or a drain electrode of the transistor 750. The conductive film 772 is connected to a conductive film that functions as a pixel electrode. In other words, it functions as one electrode of the display element. A backlight, a sidelight, or the like is provided, and the display is made through the liquid crystal element 775 and the color film 736. , a so-called transmissive color liquid crystal display device.

[0405] The conductive films 772 and 774 can be formed using a conductive film that transmits visible light or A conductive film that is reflective in visible light can be used. The conductive film is made of, for example, indium (In), zinc (Zn), or tin (Sn). In addition, the conductive films 772 and 774 may be made of a material containing one of the above-mentioned materials. The conductive film 120 may be made of a material similar to that of the conductive film 120 described in the first embodiment.

[0406] The display device 700 shown in FIGS. 46 and 47 is a transmissive color liquid crystal display device. However, the present invention is not limited to this. For example, the conductive film 772 may be formed to have a reflectivity in visible light. By using a certain conductive film, a reflective color liquid crystal display device may be formed.

[0407] Although not shown in FIG. 47, optical components such as a polarizing member, a phase difference member, and an anti-reflection member may be used. For example, a circular polarization of a polarizing substrate and a retardation substrate may be provided. Light may also be used.

[0408] The liquid crystal used for the liquid crystal layer 776 is the same as that used for the liquid crystal element 51 shown in Embodiment 6. As a method for driving a display device having a liquid crystal element, the method shown in Embodiment 6 can be referred to. Various driving methods can be applied.

[0409] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0410] (Embodiment 9) In this embodiment, a display device according to one embodiment of the present invention and a driving method of the display device will be described. This will be described with reference to FIGS. 48 to 51.

[0411] Note that the display device of one embodiment of the present invention includes an information processing unit, a calculation unit, a storage unit, a display unit, and an input unit. The second embodiment may have a second portion, etc.

[0412] In addition, in the display device according to one embodiment of the present invention, the same image (still image) is continuously displayed. In this case, by reducing the number of times the same image signal is written (also called refreshed), This allows for a reduction in power consumption. The frequency of refreshing can be set as the refresh rate. The refresh rate is also called the scanning frequency or vertical synchronization frequency. The present invention describes a display device that reduces image distortion and reduces eye fatigue.

[0413] There are two types of eye fatigue: nervous fatigue and muscular fatigue. Staring at the light-emitting or flashing screen of the device for a long period of time can cause the brightness to irritate the retina, nerves, and brain. Muscular fatigue is caused by the ciliary muscles, which are used to adjust the focus. It tires the flesh by overworking it.

[0414] FIG. 48(A) is a schematic diagram showing a display of a conventional display device. As shown in FIG. In contrast, conventional display devices rewrite images 60 times per second. Looking at a screen for a long time can stimulate the retina, nerves, and brain of the user's eyes, causing eye fatigue. There was a risk of being woken up.

[0415] In the display device of one embodiment of the present invention, a transistor using an oxide semiconductor is provided in a pixel portion of the display device. A transistor using CAAC-OS, for example, is applied. The off-state current of the transistor is extremely small. Therefore, even if the refresh rate of the display device is lowered, the display This makes it possible to maintain the brightness of the display device.

[0416] In other words, as shown in FIG. 48(B), for example, an image can be rewritten once every five seconds. This allows the user to watch the same image for as long as possible, and the screen that is visible to the user is This reduces the stimulation of the retina, nerves, and brain of the user's eyes, and improves the nerve function. System fatigue is reduced.

[0417] Also, as shown in FIG. 49(A), when the size of one pixel is large (for example, when the resolution is 15 If the resolution is less than 100 ppi, the characters displayed on the display device will be blurred. When you look at blurry, blurry text for a long time, your ciliary muscles work constantly to bring the image into focus. Even if you are using your eyesight, you may still have difficulty focusing, which can cause strain on your eyes. There is a risk that this will happen.

[0418] In contrast, as shown in FIG. 49B, in a display device according to one embodiment of the present invention, The small size of the image allows for high-definition display, resulting in a detailed and smooth display. This allows the ciliary muscles to focus more easily, reducing fatigue in the user's muscular system. The display resolution should be 150 ppi or more, preferably 200 ppi or more. More preferably, the value is set to 300 ppi or more to effectively alleviate fatigue in the user's muscular system. can be reduced.

[0419] Methods for quantitatively measuring eye fatigue are currently being considered. The value index is the Critical Flicker Frequency (CFF). In addition, the evaluation index of muscle fatigue is known as Known examples of such factors include adjustment time and adjustment near point distance.

[0420] Other methods for assessing eye fatigue include electroencephalography, thermography, and blink count. Measurement of eye movement, tear volume evaluation, pupil contraction reaction rate evaluation, questionnaire to investigate subjective symptoms There are also other projects.

[0421] For example, by using the above-mentioned various methods, eye fatigue caused by the driving method of the display device according to one embodiment of the present invention can be reduced. The effect of reducing fatigue can be evaluated.

[0422] <Display Device Driving Method> Here, a method for driving a display device of one embodiment of the present invention will be described with reference to FIG.

[0423] [Image information display example] The following is an example of moving and displaying an image containing two different image information. .

[0424] FIG. 50A shows a window 451 on a display unit 450 and 4 shows an example in which a first image 452a, which is a still image, is displayed.

[0425] At this time, it is preferable that the display is performed at the first refresh rate. The refresh rate is 1.16 x 10 -5 Hz (approximately once a day) or more Hz or less, or 2.78 x 10 -4 Hz (approximately once per hour) to 0.5 Hz , or 1.67 × 10 -2 Hz (approximately once per minute) or more and 0.1 Hz or less. This can be done.

[0426] In this way, the first refresh rate is set to a very small value, and the screen rewriting Reducing the frequency allows for a virtually flicker-free display, making it more effective to use. This can reduce eye fatigue for the user.

[0427] The window 451 is used to execute, for example, an image display application software. The display includes a display area for displaying an image.

[0428] Also at the bottom of window 451 are buttons for switching the display to different image information. The user selects the button 453 to move the image. A command to operate the display device can be given to the information processor of the display device.

[0429] The operation method of the user may be set according to the input means. When a touch panel is used that is provided over the display unit 450, the touch panel is operated by a finger, a stylus, etc. You can input the image by touching the button 453 or by using a gesture such as sliding the image. When using gesture input or voice input, The button 453 does not have to be displayed.

[0430] When the information processing unit of the display device receives a command to move the image, the image is displayed in the window 451. The displayed image begins to move (FIG. 50(B)).

[0431] If the display is performed at the first refresh rate at the time of FIG. 50(A), Before the image movement, it is preferable to change the refresh rate to a second refresh rate. The second refresh rate is a value required for displaying moving images. For example, The second refresh rate is between 30 Hz and 960 Hz, preferably between 60 Hz and 960 Hz. 60Hz or less, more preferably 75Hz to 960Hz, more preferably 120Hz and 960 Hz or less, more preferably 240 Hz or more and 960 Hz or less. .

[0432] Setting the second refresh rate to a value higher than the first refresh rate. This allows moving images to be displayed more smoothly and naturally. This reduces eye fatigue by suppressing the visibility of flickering (also known as flicker) to the user. can be reduced.

[0433] At this time, the images displayed in the window 451 are the first image 452a and the next image The resulting image is a combined image with the first image 452b to be combined. A part of the first image 452a is shifted so that the merged image moves in one direction (here, to the left). , a partial area of ​​the second image 452b is displayed.

[0434] Also, as the combined image moves, the brightness of the image displayed in the window 451 changes for the first time. The brightness gradually decreases compared to the brightness at the time of the initial stage (at the time of FIG. 50(A)).

[0435] FIG. 50(C) shows the time when the image displayed in the window 451 reaches a predetermined coordinate. Therefore, at this point, the brightness of the image displayed in the window 451 is the highest. low.

[0436] In FIG. 50C, the first image 452a and the second image 452b are located at predetermined coordinates. Each of the coordinates is displayed half at a time, but this is not limited to this and the user can freely It is preferable to make it configurable.

[0437] For example, the ratio of the distance from the initial coordinates to the distance from the final coordinates of the image is A coordinate greater than 0 and less than 1 may be set as the predetermined coordinate.

[0438] In addition, the brightness when the image reaches a specified coordinate can also be freely set by the user. For example, the ratio of the brightness when the image reaches a predetermined coordinate to the initial brightness is preferably 0. or more and less than 1, preferably 0 to 0.8, more preferably 0 to 0.5, etc. Just do that.

[0439] Next, within the window 451, the combined image moves and the brightness increases step by step. (Figure 50(D)).

[0440] FIG. 50(E) shows the point when the coordinates of the combined image reach their final coordinates. Within the dot 451, only the second image 452b is displayed with a brightness equal to the initial brightness. do.

[0441] After the image movement is complete, the refresh rate is changed from the second refresh rate to the It is preferable to change the refresh rate to the first refresh rate.

[0442] By displaying the image in this way, even if the user tries to follow the movement of the image with his / her eyes, the image Since the brightness of the display is reduced, eye fatigue of the user can be reduced. By using such a driving method, a display that is easy on the eyes can be realized.

[0443] [Example of document information display] Next, let's look at an example where you scroll through document information that is larger than the display window. We will explain about this.

[0444] FIG. 51A shows a window 455 on a display unit 450 and 4 shows an example in which a part of document information 456, which is a still image, is displayed.

[0445] At this time, it is preferable that the display is performed at the above-mentioned first refresh rate.

[0446] The window 455 is, for example, a document display application software, a document creation application software, etc. It includes a display area that is displayed by executing application software, etc., and displays document information.

[0447] The document information 456 is a document whose image size is larger vertically than the display area of ​​the window 455. Therefore, only a part of the area is displayed in the window 455. As shown in FIG. 51(A), a window 455 indicates which area of ​​document information 456 is displayed. The display may include a scroll bar 457 that indicates whether the

[0448] A command to move an image (also called a scroll command here) is input to the display device via the input unit. When the command is given to the document information 456, the document information 456 starts to move (FIG. 51(B)). The brightness of the image being displayed decreases in stages.

[0449] If the display is performed at the first refresh rate at the time of FIG. 51(A), Before the document information 456 is moved, the refresh rate is changed to the second refresh rate. It is preferable to do so.

[0450] Here, not only the brightness of the image displayed in the window 455 but also the brightness of the image displayed on the display unit 450 Illustrated is a decrease in brightness across the displayed image.

[0451] FIG. 51C shows the time when the coordinates of the document information 456 reach the predetermined coordinates. At this time, the brightness of the entire image displayed on display unit 450 becomes the lowest.

[0452] Next, document information 456 is displayed while moving within window 455 (see FIG. 51). At this time, the brightness of the entire image displayed on the display unit 450 increases stepwise.

[0453] FIG. 51(E) shows the point in time when the coordinates of the document information 456 have reached the final coordinates. In the document 455, an area different from the initially displayed area of ​​the document information 456 is displayed. It is displayed with a brightness equal to the

[0454] After the movement of the document information 456 is completed, the refresh rate is changed to the first refresh rate. It is preferable to change the format to a scalable format.

[0455] By displaying the image in this way, even if the user tries to follow the movement of the image with his / her eyes, the image Since the brightness of the display is reduced, eye fatigue of the user can be reduced. By using such a driving method, a display that is easy on the eyes can be realized.

[0456] In particular, high contrast displays such as document information can cause eye fatigue. Therefore, it is more preferable to apply such a driving method to displaying document information.

[0457] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0458] (Embodiment 10) In this embodiment, a display module and an electronic device each including a semiconductor device according to one embodiment of the present invention will be described. This will be explained with reference to FIG. 52 and FIG. 53.

[0459] The display module 8000 shown in FIG. 52 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003, A display panel 8006, a backlight 8007, a frame 8009, and a printed circuit board 801 0, has battery 8011.

[0460] The display device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0461] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 8006.

[0462] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of the display panel 006 to make it into an optical touch panel.

[0463] The backlight 8007 has a light source 8008. In FIG. In the above embodiment, the light source 8008 is disposed on the light source 8007, but the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light-emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 8007 need not be provided.

[0464] The frame 8009 protects the display panel 8006 and also supports the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 8009 may also function as a heat sink.

[0465] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. , this can be omitted when using a commercial power source.

[0466] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may be added.

[0467] 53(A) to 53(G) are diagrams showing electronic devices. These electronic devices are A body 5000, a display unit 5001, a speaker 5003, an LED lamp 5004, and an operation key 50 05 (including a power switch or an operation switch), a connection terminal 5006, a sensor 5007 ( Force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances , sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, 5008, etc.) can.

[0468] FIG. 53(A) shows a mobile computer, which, in addition to the above, includes a switch 5009. , an infrared port 5010, etc. FIG. 53(B) shows a mobile phone equipped with a recording medium. A portable image reproducing device (e.g., a DVD reproducing device) and, in addition to the above, the following devices are also included: The display unit 5002, the recording medium reading unit 5011, etc. In addition to the above, the display includes a second display unit 5002 and a support unit 5012. , earphones 5013, etc. FIG. 53(D) shows a portable game machine. In addition to the above, the recording medium reading unit 5011 and the like can be included. This is a digital camera with a television receiving function, and in addition to the above, it also has an antenna 5014, The mobile phone may have a shutter button 5015, an image receiving unit 5016, etc. This is a slot machine, and in addition to the above, it has a second display unit 5002, a recording medium reading unit 5011, , etc. FIG. 53(G) shows a portable television receiver, In addition to the above, it may have a charger 5017 capable of transmitting and receiving signals, etc.

[0469] The electronic devices shown in Figures 53(A) to 53(G) can have various functions. For example, the function to display various information (still images, videos, text images, etc.) on the display, Panel function, calendar, date or time display function, various software (platform A function to control processing by a program, a wireless communication function, and a function to control various Functions for connecting to computer networks, wireless communication functions for transmitting various data, The function of receiving, reading out the program or data recorded on the recording medium and displaying it on the display Furthermore, in an electronic device having multiple display units, In this case, one display section is used mainly to display image information, and the other display section is used mainly to display text information. A function to display images with parallax taken into account on multiple displays to create a stereoscopic effect. Furthermore, in electronic devices having an image receiving unit, These include functions for taking still images, taking videos, and automatically or manually correcting the images. The camera has a function to correct the captured image, a function to save the captured image on a recording medium (external or built-in to the camera), The image displayed on the display unit can have a function of displaying the image. The functions that the electronic device shown in 3(G) can have are not limited to these, and various functions can be provided. It is possible to have.

[0470] The electronic device described in this embodiment has a display unit for displaying some information. The display device described in the fourth embodiment can be used for the display portion. do.

[0471] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done. EXAMPLES

[0472] In this embodiment, the results of an experiment on the driving method of the display device shown in the ninth embodiment are described. This will be described with reference to Figures 54 to 56.

[0473] Figure 54 (A) to (C) show the change in luminance measured over a 100 μm diameter area of ​​the display device. FIG. 1 is a diagram for explaining the results of the determination. Note that the text image is displayed on the display device while scrolling. The text image was displayed with 49 characters per line, 20 points in size, and 1 page. Contains 25 lines.

[0474] Figure 54(A) shows a text image scrolled at a speed of 2.5 pages / sec. 13 is a diagram illustrating a change in luminance observed when the

[0475] FIG. 54(B) shows a gradation ( Specifically, the brightness of the characters in the text image is approximately 50% of the brightness of the background of the text image. A text image using characters of the same style is displayed scrolling at a speed of 5 pages / sec. 13A and 13B are diagrams illustrating changes in luminance observed when

[0476] FIG. 54(C) shows characters with the same gradation as the characters in the text image described with reference to FIG. 54(A). When a text image using the above is displayed while scrolling at a speed of 5 pages / sec. FIG. 13 is a diagram illustrating observed changes in luminance.

[0477] 55(A) to (C) show visual stimuli based on the luminance changes shown in FIG. 54(A) to (C). The change in the intensity of the sensory evaluation was calculated using the Barton formula, which is said to be a model that closely matches the results of past sensory evaluations. This is a diagram for explaining the results. Burton's formula is expressed by the following formula 1.

[0478]

number

[0479] In the formula, u is the frequency parameter of the spatial modulation, and w is the frequency parameter of the time modulation. In addition, k is the signal-to-noise ratio, T is the visual integration time, X0 is the size of the object, and X max is the best large integral domain, N max is the maximum number of integration periods for the light-dark cycle, η is the quantum efficiency, and p is the quantum conversion coefficient. where E is the retinal illuminance, and φ0 is the spectral density of the neural noise.

[0480] In addition, M in formula 1 opt (u) is the visual transfer function for spatially modulated light and dark, It is expressed by the following formula 2. In the formula, σ is the diameter of the pupil, which is a parameter of the optic body and the retina. is the standard deviation of the line spread function taking into account the configuration of the visual organs such as

[0481]

number

[0482] In addition, H1(w) and H2(w) in Equation 1 are transfer functions related to time modulation, as follows: It is expressed by the following formula 3. In the formula, τ is the time constant. Also, n is H1(w) in formula 1. 7. It is found that the result of the sensory evaluation is consistent with the case of 4 in H2(w).

[0483]

number

[0484] Moreover, F(u) in Equation 1 is a function indicating lateral inhibition, and is expressed by Equation 4 below. In the equation, u0 is the spatial frequency of lateral inhibition.

[0485]

number

[0486] FIG. 55(A) shows the change in visual stimulation based on the change in luminance shown in FIG. 54(A) in Burton's FIG. 13 is a diagram for explaining the results of calculation using the formula.

[0487] FIG. 55(B) shows the change in visual stimulation based on the change in luminance shown in FIG. 54(B) in Burton's FIG. 13 is a diagram for explaining the results of calculation using the formula.

[0488] FIG. 55(C) shows the change in visual stimulation based on the change in luminance shown in FIG. 54(C) in Burton's FIG. 13 is a diagram for explaining the results of calculation using the formula.

[0489] Figure 56 shows the critical fusion circumferences of six subjects who observed the text images explained using Figure 54. FIG. 1 is a diagram for explaining the results of measuring the wave number (CFF). After observing the indicated text image for 1 minute, the critical fusion frequency (CFF) was measured 10 times. The results were obtained by averaging. This was repeated five times, and the sum of the time was taken as the loading time.

[0490] Figure 56(A) shows the results of six subjects who viewed a text image explained using Figure 54(B). FIG. 1 is a diagram illustrating the results of measuring the critical fusion frequency (CFF) of the above-mentioned embodiment.

[0491] Figure 56(B) shows the results of six subjects who viewed the text image explained using Figure 54(C). FIG. 1 is a diagram illustrating the results of measuring the critical fusion frequency (CFF) of the above-mentioned embodiment.

[0492] The text was recorded using a Sharp AQUOS PAD SH-06F. The diagonal size of the display panel is 7.0 inches, and the resolution is The resolution is 323ppi, and the liquid crystal element operates in VA mode, and the transistor has an oxide semiconductor. The pixel has the data.

[0493] Using a RDF-1 digital flicker value meter manufactured by Shibata Scientific Co., Ltd., the critical Fusion frequencies were measured.

[0494] <Result> Scrolling at a slower speed produces less traffic in the same period compared to scrolling at a faster speed. It was found that the change in luminance was small and the visual stimulus was suppressed (Figure 54(A), Figure 54(B)). C), see Figures 55(A) and 55(C).

[0495] When scrolling is fast, the text image characters are displayed in a lighter shade to provide contrast. It was found that reducing the brightness of the image reduces the change in luminance over the same period, suppressing visual stimulation. (See Figures 54(B), 55(B), 54(C) and 55(C)).

[0496] In addition, subjects repeatedly viewed text images that scrolled at a fast speed. Lowering the Critical Fusion Frequency (CFF) results in lighter grayscales with reduced contrast It was found that the suppression was observed when the text contained the characters that were not included in the text (Figure 56(A) and Figure 56(B)). See B).

[0497] This reduces the fatigue that accumulates in subjects when scrolling at high speeds. It was found that this could be reduced by displaying characters in a brighter gradation.

[0498] Specifically, the characters in the text image are displayed in lighter tones so that the contrast is reduced. When the subjects were placed in the same position, no decrease in the critical fusion frequency was observed in any of the subjects (see Figure 56(A)). ).

[0499] On the other hand, when the text image was displayed without changing the contrast, subject A, A decrease in the critical fusion frequency was observed in subjects C, D, and F ( See Figure 56(B). [Explanation of symbols]

[0500] 11 Substrate 13 Conductive Film 15 Insulating film 17 Insulating film 19a Oxide semiconductor film 19b Oxide semiconductor film 19c Common electrode 21a Conductive film 21b Conductive film 23 Insulating film 25 Insulating film 27 Insulating Film 28 Insulating Film 29 Common electrode 51 Liquid crystal element 52 Transistor 55 Capacitive element 70 pixels 70a pixels 70b pixels 70c pixels 70d pixels 70e pixels 70f pixels 71 Pixel section 74 Scanning line driving circuit 75 Common Wire 76 Signal line driver circuit 77 scan lines 79 Signal Line 80 Display device 100 diameter 102 Substrate 104 Gate electrode 105 Gate wiring 106 Insulating film 107 Insulating film 108 Insulating film 110 Oxide semiconductor film 111 Oxide semiconductor film 111a Oxide semiconductor film 111b Oxide semiconductor film 112 Wiring 112a Source electrode 112b Drain electrode 114 Insulating film 116 Insulating film 118 Insulating film 119 Insulating film 120 Conductive film 120a Conductive film 141 Aperture 142 Aperture 144 Aperture 146 Aperture 148 Aperture 150 Transistors 151 Transistor 160 Capacitive element 170 Gate wiring contact part 171 Gate wiring contact part 193 Target 194 Plasma 202 Substrate 204 Conductive Film 206 Insulating Film 207 Insulating Film 208 Oxide Semiconductor Film 208a Oxide semiconductor film 208b Oxide semiconductor film 208c Oxide semiconductor film 211a Oxide semiconductor film 211b Oxide semiconductor film 212a Conductive film 212b Conductive film 214 Insulating film 216 Insulating film 218 Insulating film 220b Conductive film 252a opening 252b opening 252c opening 270 Transistors 270A Transistor 270B Transistor 319b Oxide semiconductor film 329 Conductive Film 351a Liquid crystal element 351b Liquid crystal element 352 Transistor 355 Capacitive element 355a Capacitive element 355b Capacitive element 370 pixels 370g Pixels 370h pixels 370i pixels 450 Display section 451 Window 452a Image 452b Image 453 Button 455 Window 456 Document Information 457 Scrollbar 600 Substrates 601 Substrate 602 Gate wiring 604 Capacitance wiring 605 Capacitance wiring 613 Wiring 615 Gate wiring 616 Wiring 618 Drain electrode 623 Insulating film 624 Pixel electrode 625 Insulating film 626 Pixel electrode 627 Insulating Film 628 Transistor 629 Transistor 630 Capacitive element 631 Capacitive element 633 Aperture 636 Colored film 640 Common electrode 644 Protrusion 645 Orientation Film 646 Slit 647 Slit 648 Orientation Film 650 Liquid crystal layer 651 Liquid crystal element 652 Liquid crystal element 700 Display device 701 Substrate 702 Pixel section 704 Source driver circuit section 705 Substrate 706 Gate driver circuit section 708 FPC terminal section 710 Wiring 711 Wiring section 712 Sealing material 716 FPC 734 Insulating film 736 Colored film 738 Light-shielding film 750 Transistors 752 Transistor 760 Connection electrode 764 Insulating film 766 Insulating Film 768 Insulating Film 772 Conductive Film 774 Conductive Film 775 Liquid crystal elements 776 Liquid crystal layer 778 Structure 780 Anisotropic Conductive Film 790 Capacitive element 5000 cabinet 5001 Display section 5002 Display section 5003 Speaker 5004 LED Lamp 5005 Operation key 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared port 5011 Recording medium reading unit 5012 Support part 5013 Earphones 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5100 pellets 5120 PCB 5161 area 5200 pellets 5201 AEON 5202 Lateral growth part 5203 particles 5220 PCB 5230 Target 5240 Plasma 5260 Heating mechanism 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery

Claims

[Claim 1] A transistor; A first insulating film; a capacitance element including a second insulating film between a pair of electrodes, The transistor is A gate electrode; a gate insulating film provided in contact with the gate electrode; a first oxide semiconductor film provided in contact with the gate insulating film and overlapping with the gate electrode; a source electrode and a drain electrode electrically connected to the first oxide semiconductor film; one of a pair of electrodes of the capacitor includes a second oxide semiconductor film; the first insulating film is provided on the first oxide semiconductor film, the second insulating film is provided on the second oxide semiconductor film such that the second oxide semiconductor film is sandwiched between the first insulating film and the second insulating film.

Images