Display device

JP2025028207AActive Publication Date: 2025-02-28SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2024219361
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2014-02-28
Filing Date
2024-12-13
Publication Date
2025-02-28
Estimated Expiration
2034-09-05

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Benefits of technology

【0018】 本発明の一態様により、開口率が高く、且つ電荷容量を増大させることが可能な容量素 子を有する半導体装置の作製方法において、コストを削減することができる。消費電力を 低減する可能な半導体装置の作製方法において、コストを削減することができる。または 、本発明の一態様により、新規な半導体装置を提供することができる。または、本発明の 一態様により、新規な表示装置を提供することができる。なお、これらの効果の記載は、 他の効果の存在を妨げるものではない。なお、本発明の一態様は、必ずしも、これらの効 果の全てを有する必要はない。なお、これら以外の効果は、明細書、図面、請求項などの 記載から、自ずと明らかとなるものであり、明細書、図面、請求項などの記載から、これ ら以外の効果を抽出することが可能である。

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Abstract

To provide a manufacturing method capable of reducing cost in a semiconductor device which has high opening ratio and has a capacitive element capable of increasing charge capacity; or provide a manufacturing method capable of reducing cost in the semiconductor device capable of reducing power consumption.SOLUTION: A mask formed by a process of using a multi-gradation photo mask is used to form a metal oxide film having a channel region, the metal oxide film functioning as a pixel electrode, and a source electrode and a drain electrode. An oxide insulation film is further formed on the metal oxide film having the channel region, and a nitride insulation film is formed on the oxide insulation film and the metal oxide film functioning as the pixel electrode; as a result, conductivity of the metal oxide film functioning as the pixel electrode can be improved.SELECTED DRAWING: Figure 3
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Description

[Technical field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The present invention relates to a method, manufacture, or composition of matter. One embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, or any of these devices. In particular, the present invention relates to a method for driving a transistor, for example, or a manufacturing method thereof. The present invention relates to a method for manufacturing a semiconductor device having a capacitor. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors used are made of amorphous silicon and single crystal silicon formed on a glass substrate. The silicon semiconductor is made of silicon semiconductor such as polycrystalline silicon or polysilicon. Transistors using semiconductors are also used in integrated circuits (ICs).

[0003] In recent years, metal oxides that exhibit semiconducting properties have been used in transistors instead of silicon semiconductors. In this specification, the term "oxide" refers to a metal oxide that exhibits semiconductor properties. Let us call them semiconductors.

[0004] For example, a transistor using zinc oxide or an In-Ga-Zn oxide as an oxide semiconductor may be used. A transistor is manufactured and used as a switching element for pixels of a display device. The technology has been disclosed (see Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A Summary of the Invention [Problem to be solved by the invention]

[0006] Display devices on the market are tending to become larger, with screen sizes of 40 inches or more diagonally. Furthermore, development is underway with a view to screen sizes of 120 inches or more diagonally. For this reason, the glass substrates used in display devices are becoming larger in area than the 8th generation. It's progressing.

[0007] As glass substrates become larger, the exposure equipment used in the manufacturing process of display devices is becoming The photomasks used are becoming larger, and the cost of the photomasks is becoming an issue. For example, Since 10th generation photomasks are expensive, costing over 100 million yen each, There is a need to develop a manufacturing process that reduces this.

[0008] On the other hand, in a liquid crystal display device, which is one example of a display device, the charge capacitance value of a capacitive element is increased. The higher the voltage, the more stable the alignment of the liquid crystal molecules in the liquid crystal element can be when an electric field is applied. In a display device that displays a still image, the period in which the still image can be displayed can be extended. This reduces the number of times image data needs to be rewritten, which in turn reduces power consumption. Hopefully.

[0009] Therefore, in order to increase the charge capacity of the capacitance element, the area occupied by the capacitance element is increased. Specifically, there is a method for increasing the area where a pair of electrodes overlap. Therefore, in the above display device, in order to increase the area where the pair of electrodes overlap, a light-shielding property is provided. When the area of ​​the conductive film is increased, the aperture ratio of the pixel is reduced, and the display quality of the image is deteriorated. .

[0010] In view of the above, one embodiment of the present invention provides a capacitance-reducing film having a high aperture ratio and capable of increasing a charge capacity. To provide a manufacturing method capable of reducing costs in a semiconductor device having a quantum element Another object of one embodiment of the present invention is to provide a semiconductor device capable of reducing power consumption. It is an object of the present invention to provide a manufacturing method capable of reducing costs in a semiconductor device. Another object of one embodiment of the present invention is to provide a novel semiconductor device. An object of one embodiment of the present invention is to provide a novel display device. The description of the problem does not preclude the existence of other problems. However, it is not necessary to solve all of these problems. Problems other than these may be solved by the specification, drawings, etc. It is obvious from the description of the specification, drawings, claims, etc. From the description, it is possible to extract other issues. [Means for solving the problem]

[0011] One embodiment of the present invention is a method for manufacturing a semiconductor device using a multi-tone photomask. A metal oxide film having a channel region, a metal oxide film functioning as a pixel electrode, and a source The feature is that a source electrode and a drain electrode are formed by using a multi-tone photomask. Thus, a mask having a first shape is formed having a first thickness and a second thickness that is thicker than the first thickness. The metal oxide film and the conductive film on the substrate are etched using the mask of the first shape. The metal oxide film having a channel region and the metal oxide film functioning as a pixel electrode are Next, the mask of the first shape is processed to remove the mask in the region of the first thickness. , leaving the second thickness region to form a mask of the second shape. Next, The conductive film formed on the metal oxide film is etched using a In this step, a capacitance line may be formed. An oxide insulating film is formed on the metal oxide film having a pixel region, and the oxide insulating film and the pixel electrode are By forming a nitride insulating film on the metal oxide film that functions as a pixel electrode, It is possible to increase the electrical conductivity of the metal oxide film.

[0012] One aspect of the present invention is to form a gate electrode and a gate insulating film on an insulating surface, a first metal oxide film and a first conductive film are formed on the first conductive film, and a first thickness is formed on the first conductive film. a first mask having an area having a second thickness greater than the first thickness; forming a second mask having the same thickness as the first thickness; and combining the first mask and the second mask. The first conductive film and the first metal oxide film are etched using the etching method. Then, the first conductive film, the second conductive film, and the third conductive film are formed. Then, the second metal oxide film and the third metal oxide film are formed. After processing the first mask to form a third mask and removing the second mask, The second conductive film is then etched using a third mask to form a soaked pattern on the second metal oxide film. A fourth conductive film and a fifth conductive film are formed to function as a source electrode and a drain electrode, Then, the third conductive film is removed. Next, the second metal oxide film, the fourth conductive film, and the fifth conductive film are forming a first insulating film on the film; and forming a second insulating film on the first insulating film and the third metal oxide film. After forming the first insulating film and the second insulating film, a part of the first insulating film and the second insulating film are etched to form the first insulating film and the second insulating film. Next, an opening is formed in the second insulating film. a sixth conductive film in contact with the third metal oxide film, and a seventh conductive film in contact with the third metal oxide film, the seventh conductive film functioning as a capacitance line; This is a method for manufacturing a semiconductor device in which a film is formed.

[0013] The first insulating film has an opening on the third metal oxide film.

[0014] In addition, the second metal oxide film and the third metal oxide film have different hydrogen concentrations. The third metal oxide film has a higher hydrogen concentration than the second metal oxide film.

[0015] The third metal oxide film has electrical conductivity, and the third metal oxide film, the second insulating film, and A capacitor element is formed using a conductive film having a light-transmitting property.

[0016] The first metal oxide film, the second metal oxide film, and the third metal oxide film are light-transmitting. The first metal oxide film, the second metal oxide film, and the third metal oxide film have The first metal oxide film and the second metal oxide film are made of at least one of In, Ga, and Zn. It is preferable that the first metal oxide film and the third metal oxide film are composed of the same metal element. .

[0017] The first insulating film is formed using an oxide insulating film. It is preferable that the second insulating film includes an oxide insulating film from which part of oxygen is released by the The insulating film is formed using a nitride insulating film. Effect of the Invention

[0018] According to one embodiment of the present invention, a capacitance element having a high aperture ratio and capable of increasing a charge capacity is provided. In the method for manufacturing a semiconductor device having a semiconductor device, the cost can be reduced. In a method for manufacturing a semiconductor device that can reduce the number of semiconductor devices, costs can be reduced. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment, a novel display device can be provided. It is to be noted that one embodiment of the present invention does not necessarily have these effects. It is not necessary for the invention to have all of the above effects. Effects other than these may be included in the specification, drawings, claims, etc. This is self-evident from the description, drawings, claims, etc. It is possible to extract effects other than these. [Brief description of the drawings]

[0019] [Figure 1] 1A and 1B are a block diagram and a circuit diagram illustrating one embodiment of a semiconductor device. [Diagram 2] FIG. 1 is a top view illustrating one embodiment of a pixel. [Diagram 3] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing method of an element substrate. [Figure 4] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing method of an element substrate. [Diagram 5] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing method of an element substrate. [Figure 6] FIG. 1 is a top view illustrating one embodiment of a pixel. [Figure 7] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing method of an element substrate. [Figure 8] FIG. 1 is a top view illustrating one embodiment of a pixel. [Figure 9] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing method of an element substrate. [Figure 10] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing method of an element substrate. [Figure 11] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 12] FIG. 1 is a diagram illustrating an electronic device. [Figure 13] FIG. 2 is a cross-sectional view illustrating one embodiment of an element substrate. [Figure 14] FIG. 1 is a top view illustrating one embodiment of a pixel. [Figure 15] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 16] FIG. 2 is a diagram illustrating a display module. [Figure 17] FIG. 4 is a diagram illustrating the temperature dependence of resistivity. [Figure 18] 1A and 1B are a top view and a cross-sectional view illustrating a structure of a sample. [Figure 19] FIG. 1 is a diagram illustrating the resistance value of a metal oxide film. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments and examples. In the following embodiments and examples, the same parts or parts having similar functions are In the case of parts, the same reference numerals or the same hatch patterns are used in common among different drawings, and the repetition The explanation of the repetition will be omitted.

[0021] In each figure described in this specification, the size, thickness, or area of ​​each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.

[0022] In addition, the terms "first," "second," "third," etc., used in this specification are used interchangeably to avoid confusion of components. The number is added for convenience and is not intended to be a numerical limit. The terms can be replaced with "second" or "third" as appropriate for explanation.

[0023] The function of the "source" and "drain" is to change the direction of the current during circuit operation. For this reason, in this specification, the terms "sauce" and "dressing" are used interchangeably. The terms "in" and "in" may be used interchangeably.

[0024] Voltage is the potential difference between two points, and potential is the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a particle. Generally, the potential difference between a potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. In this specification, voltage may be read as potential.

[0025] In this specification, when an etching process is performed after a photolithography process, The mask formed in the photolithography process is removed.

[0026] (Embodiment 1) In this embodiment, a capacitive element having a high aperture ratio and capable of increasing a charge capacity is provided. The object of the present invention is to provide a manufacturing method for a semiconductor device having a structure capable of reducing costs. Another embodiment of the present invention is a semiconductor device capable of reducing power consumption. It is an object of the present invention to provide a manufacturing method capable of reducing costs.

[0027] In addition, an oxide semiconductor, which is a metal oxide having semiconductor properties, is used as the metal oxide. In the case of a transistor, oxygen is one example of a defect that can lead to poor electrical characteristics of the transistor. For example, a transistor using an oxide semiconductor film that has oxygen vacancies in the film The threshold voltage of the transistor tends to fluctuate in the negative direction, and the transistor tends to have normally-on characteristics. This is because oxygen vacancies in the oxide semiconductor film generate charges, which reduces the resistance. If a transistor has normally-on characteristics, malfunctions are likely to occur during operation. Various problems may occur, such as the power consumption during non-operation or the power consumption during non-operation. The amount of change in the electrical characteristics of transistors, typically the threshold voltage, changes as a result of the application of thermal and stress tests. There is a growing problem.

[0028] In addition to oxygen deficiencies, impurities such as silicon and carbon, which are constituent elements of the insulating film, can also cause damage to the transistor. Therefore, the impurities may be mixed into the oxide semiconductor film, which may cause poor electrical characteristics of the transistor. As a result, the resistance of the oxide semiconductor film is reduced, and the oxide semiconductor film is easily deteriorated due to deterioration over time or in a stress test. This leads to a problem that the amount of fluctuation in the electrical characteristics of the transistor, typically the threshold voltage, increases. There is.

[0029] In this embodiment, in addition to the problem to be solved by the present invention, In the semiconductor device having the transistor, An object of the present invention is to reduce oxygen vacancies and the impurity concentration in the oxide semiconductor film.

[0030] In this embodiment mode, as a method for solving one of the above problems, a manufacturing method of a semiconductor device will be described. In this embodiment, a process using a multi-tone photomask is performed. forming a metal oxide film having a channel region, a source electrode, and a drain electrode; It is characterized by:

[0031] FIG. 1A shows an example of a semiconductor device. The semiconductor device shown in FIG. The scanning line driving circuit 14 and the signal line driving circuit 16 are arranged in parallel or approximately in parallel with each other. The m scanning lines 17, the potential of which is controlled by the scanning line driving circuit 14, are parallel to each other. n signal lines are arranged in parallel or substantially parallel to each other, and the potentials of the signal lines are controlled by a signal line driving circuit 16. The pixel section 11 further includes a plurality of pixels 13 arranged in a matrix. In addition, the capacitance lines 15 are arranged parallel or approximately parallel to each other along the signal lines 19. The capacitance lines 15 are arranged parallel or approximately parallel to each other along the scanning lines 17. The scanning line driver circuit 14 and the signal line driver circuit 16 may be collectively referred to as a driver circuit section. There are cases where this is said.

[0032] Each scanning line 17 corresponds to one of the pixels 13 arranged in m rows and n columns in the pixel section 11. Each signal line 19 is electrically connected to n pixels 13 arranged in m rows and n Among the pixels 13 arranged in a column, m pixels 13 arranged in any one column are electrically connected. Both m and n are integers equal to or greater than 1. The capacitance lines 15 are arranged in m rows and n columns. Among the pixels 13 arranged in the row, n pixels 13 arranged in the row are electrically connected to The capacitance lines 15 are arranged parallel or approximately parallel to each other along the signal lines 19. In this case, m pixels 13 arranged in m rows and n columns are arranged in any one of the columns. 13 is electrically connected to

[0033] 1B and 1C show a circuit that can be used for the pixel 13 of the display device shown in FIG. 1A. 1 shows an example of a road configuration.

[0034] The pixel 13 shown in FIG. 1B includes a liquid crystal element 21, a transistor 22, and a capacitor 25. , has.

[0035] The potential of one of the pair of electrodes of the liquid crystal element 21 is set appropriately according to the specifications of the pixel 13 . The alignment state of the liquid crystal element 21 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 21 of each of the liquid crystal display devices 3. Alternatively, a different potential may be applied to one of the pair of electrodes of the liquid crystal element 21 for each row of pixels 13. May be given.

[0036] The liquid crystal element 21 controls the transmission or non-transmission of light by the optical modulation effect of the liquid crystal. The optical modulation effect of liquid crystal is achieved by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal element 21 is controlled by a vertical electric field (including a vertical electric field or an oblique electric field). , nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, thermotropic liquid crystal, Examples of the liquid crystal include iotropic liquid crystal, ferroelectric liquid crystal, and antiferroelectric liquid crystal.

[0037] The display device having the liquid crystal element 21 can be driven in, for example, a TN mode or a VA mode. , ASM(Axially Symmetric Aligned Micro-cel l) mode, OCB (Optically Compensated Birefring ingression mode, MVA mode, PVA (Patterned Vertical Alignment) mode, IPS mode, FFS mode, or TBA (Trans You can also use the (Verse Bend Alignment) mode. However, various liquid crystal elements and driving methods thereof can be used.

[0038] Also, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. The liquid crystal element may be configured by the liquid crystal that exhibits the blue phase. Since it is short and optically isotropic, alignment treatment is not required and viewing angle dependency is small.

[0039] In the configuration of the pixel 13 shown in FIG. One of the electrodes is electrically connected to the signal line 19, and the other is the other of the pair of electrodes of the liquid crystal element 21. The gate electrode of the transistor 22 is electrically connected to the scanning line 17. The transistor 22 is turned on or off to The transistor 22 has a function of controlling the writing of signal data. The transistor described in any of Embodiments 1 to 7 can be used.

[0040] In the configuration of the pixel 13 shown in FIG. 1B, one of the pair of electrodes of the capacitor 25 is connected to a potential The other end is electrically connected to the other of the pair of electrodes of the liquid crystal element 21. The potential value of the capacitance line 15 is appropriately set according to the specifications of the pixel 13. The capacitance element 25 functions as a storage capacitor for storing written data. do.

[0041] For example, in a display device having the pixel 13 shown in FIG. 1B, the scanning line driving circuit 14 drives each row The pixels 13 are sequentially selected, the transistors 22 are turned on, and the data of the data signal is written. Enter.

[0042] The pixel 13 to which the data has been written is in a holding state by turning off the transistor 22. By performing this process row by row, an image can be displayed.

[0043] In addition, the pixel 13 shown in FIG. 1C includes a transistor 33 for switching a display element. a transistor 22 for controlling driving of the pixel, a transistor 35, a capacitor element 25, and a light emitting element 31.

[0044] An example of the light-emitting element 31 is a light-emitting element having an anode, a cathode, and an EL layer sandwiched between the anode and the cathode. An example of an EL layer is a device in which light emission (fluorescence) from singlet excitons occurs. a layer having a material capable of emitting light from triplet excitons (phosphorescence); Materials capable of emitting light from single excitons (fluorescence) and materials capable of emitting light from triplet excitons (phosphorescence) The layer may include a layer having a material.

[0045] One of the source and drain electrodes of the transistor 33 is connected to a signal line to which a data signal is applied. The gate electrode of transistor 33 is electrically connected to gate signal line 19. is electrically connected to a scan line 17 to which

[0046] The transistor 33 is turned on or off to convert the data of the data signal into a It has the function of controlling writing.

[0047] One of the source and drain electrodes of the transistor 22 serves as an anode line. The other of the source electrode and the drain electrode of the transistor 22 is electrically connected to the wiring 37. , electrically connected to one electrode of the light emitting element 31. The electrode is the other of the source electrode and the drain electrode of the transistor 33 and one of the capacitor elements 25. The electrode is electrically connected to the other electrode.

[0048] The transistor 22 is turned on or off to allow current to flow to the light emitting element 31. It has the function of controlling the current.

[0049] One of the source and drain electrodes of the transistor 35 is given a data reference potential. The other of the source electrode and the drain electrode of the transistor 35 is connected to a wiring 39 through which a light emitting One electrode of the element 31 and the other electrode of the capacitance element 25 are electrically connected to each other. The gate electrode of the transistor 35 is electrically connected to the scanning line 17 to which a gate signal is applied. can be.

[0050] The transistor 35 has a function of adjusting a current flowing through the light-emitting element 31. When the internal resistance of the light emitting element 31 increases due to deterioration of the light emitting element 31, the transistor 35 The current flowing through the wiring 39 to which one of the source electrode and the drain electrode of the By doing so, the current flowing through the light emitting element 31 can be corrected. The potential can be, for example, 0V.

[0051] One of the pair of electrodes of the capacitor 25 is a source electrode and a drain electrode of the transistor 33. and a gate electrode of the transistor 22. The other of the electrodes is connected to the other of the source electrode and drain electrode of the transistor 35 and the light-emitting element 3 The sensor is electrically connected to one electrode of sensor 1.

[0052] In the configuration of the pixel 13 shown in FIG. 1C, the capacitance element 25 stores the written data. It functions as a storage capacitor.

[0053] One of the pair of electrodes of the light emitting element 31 is a source electrode and a drain electrode of the transistor 35. the other of the capacitance element 25, and the other of the source electrode and drain electrode of the transistor 22. The other of the pair of electrodes of the light emitting element 31 functions as a cathode. The wiring 41 is electrically connected to the

[0054] The light-emitting element 31 may be, for example, an organic electroluminescence element (also called an organic EL element). However, the light emitting element 31 is not limited to this, and any other suitable light emitting element may be used. An inorganic EL element made of organic materials may also be used.

[0055] Note that a high power supply potential VDD is applied to one of the wiring 37 and the wiring 41, and a low power supply potential VDD is applied to the other. In the configuration shown in FIG. 1C, a high power supply potential VSS is applied to the wiring 37. A power supply potential VSS is applied to the wiring 41 and a low power supply potential VSS is applied to the wiring 42.

[0056] In the display device having the pixel 13 of FIG. 1C, the pixel 1 of each row is driven by the scanning line driving circuit 14. 3 are selected in sequence, transistor 22 is turned on, and data of the data signal is written.

[0057] The pixel 13 to which the data has been written is in a holding state by turning off the transistor 22. Furthermore, since the transistor 22 is connected to the capacitance element 25, the written The data can be retained for a long time. The amount of current flowing between the drain electrode and the gate electrode is controlled, and the light emitting element 31 emits a light in accordance with the amount of current flowing. By performing this process row by row, an image can be displayed.

[0058] In this specification and the like, the term "display element," "display device having a display element," "light-emitting element," A light-emitting device, which is a device having a light-emitting element and a light-emitting device, may be used in various forms or in various forms. Examples of a display element, a display device, a light-emitting element, or a light-emitting device include For example, EL (electroluminescence) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements), transistors (transistors that emit light according to electric current), electronics Emission element, liquid crystal element, electronic ink, electrophoretic element, digital micromirror device (D MD), DMS (Digital Micro Shutter), etc., are made by electro-magnetic action. Some have display media that change contrast, brightness, reflectance, transmittance, etc. An example of a display device using electron-emitting devices is an EL display. An example of such a display device is a field emission display (FED) or SE. D-type flat panel display (SED: Surface-conduction Electro Display devices using liquid crystal elements include One example is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display). , reflective LCDs, direct-view LCDs, projection LCDs, etc. An example of a display device using electronic ink or electrophoretic elements is electronic paper. There is.

[0059] Next, a specific example of an element substrate of a liquid crystal display device using a liquid crystal element for the pixel 13 will be described. Here, a top view of the pixel 13 shown in FIG.

[0060] In FIG. 2, the conductive film 103 functioning as the scanning line is oriented in a direction substantially perpendicular to the signal line ( The conductive film 114 that functions as a signal line is provided so as to extend in the left-right direction. The conductive lines function as capacitance lines. The conductive film 116 is provided so as to extend in a direction parallel to the signal lines. Therefore, when the conductive film 124 is connected to the conductive film 116 of the adjacent pixel, By this, the conductive film 116 of the adjacent pixels is electrically connected. The functioning conductive film 103 is electrically connected to the scanning line driver circuit 14 (see FIG. 1(A)). The conductive film 114 functions as a signal line, the conductive film 116 functions as a capacitance line, and The conductive film 124 is electrically connected to the signal line driving circuit 16 (see FIG. 1(A)). do.

[0061] The transistor 22 is provided in the area where the scan line and the signal line intersect. The gate electrode 22 includes a conductive film 103 that functions as a gate electrode, a gate insulating film (not shown in FIG. 2), A metal oxide film 109a in which a channel region is formed on the gate insulating film, a source The conductive films 114 and 115 function as a drain electrode and a drain electrode. The conductive film 103 also functions as a scanning line, and the area overlapping the metal oxide film 109a forms a transistor. The conductive film 114 functions as a gate electrode of the gate electrode 22. The conductive film 114 also functions as a signal line. The region overlapping with the metal oxide film 109a is the source electrode or the drain electrode of the transistor 22. It functions as a pole.

[0062] In this embodiment, in a plan view, metal is provided on the outside of the ends of the conductive films 114 and 115. The end of the oxide film 109a is located in the insulating layer 104. The edge of the metal oxide film 109c is located outside the edge of the film 116.

[0063] Since the metal oxide film 109a is formed using a metal oxide having semiconductor properties, A channel region is formed in the metal oxide film 109a between the conductive film 114 and the conductive film 115. It is done.

[0064] In addition, the conductive film 115 is electrically connected to the light-transmitting conductive film 123 which functions as a pixel electrode. is connected to

[0065] The metal oxide film 109c is a film formed simultaneously with the metal oxide film 109a. This is a film in which oxygen vacancies are formed due to plasma damage, etc., and the conductivity is increased. The metal oxide film 109c is a film formed at the same time as the metal oxide film 109a, and does not include impurities. The metal oxide film 109c is a film having enhanced conductivity by containing a metal. This film is formed at the same time as the oxide film 109a, contains impurities, and is plasma-damaged. This is a film in which oxygen vacancies are formed due to a deposition or the like, and the conductivity of the film is increased.

[0066] The capacitance element 25 is made up of a metal oxide film 109c formed on the gate insulating film and a pixel electrode. and a nitride insulating film provided over the transistor 22. The metal oxide film 109c is made of a dielectric film formed of a metal oxide film. Therefore, the capacitor 25 has a light-transmitting property. The metal oxide film 109c is connected to a conductive film 116 that functions as a capacitance line.

[0067] In this way, since the capacitance element 25 is transparent, the capacitance element 25 can be made large within the pixel 13. Therefore, it is possible to form the aperture ratio at 50% or more, preferably at a large area. It is possible to increase the charge capacity to 55% or more, preferably 60% or more. For example, a semiconductor device having a high resolution, such as a liquid crystal display device, can be obtained. In such a device, the area of ​​the pixel is reduced and the area of ​​the capacitance element is also reduced. In a semiconductor device with a high capacitance, the charge capacity stored in the capacitance element is small. Therefore, since the capacitor 25 shown in this embodiment has a light-transmitting property, the capacitor is provided in a pixel. By doing so, it is possible to obtain a sufficient charge capacity in each pixel while increasing the aperture ratio. In terms of pixel density, we want something with a pixel density of 200ppi or more, 300ppi or more, or even 500ppi or more. The present invention can be suitably used for high-resolution semiconductor devices having a resolution of i or higher.

[0068] In addition, the pixel 13 shown in FIG. 2 has a side parallel to the conductive film 103 that functions as a scanning line. The side parallel to the conductive film 114 functioning as a signal line is shorter, and the side parallel to the conductive film 114 functioning as a capacitance line is shorter. The conductive film 116 that functions as a second conductive film 116 and the conductive film 116 formed in the adjacent pixel are electrically connected. The conductive film 124 is provided to extend in a direction parallel to the conductive film 114 that functions as a signal line. As a result, the area of ​​the conductive films 114 and 116 in the pixel 13 can be reduced. Since this is possible, the aperture ratio can be increased.

[0069] In addition, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution display device. This allows the light from light sources such as backlights to be used efficiently, and reduces the power consumption of the display device. The force can be reduced.

[0070] Next, using the cross-sectional views of the dashed and dotted lines AB and CD shown in FIG. A method for manufacturing the element substrate of the device will be described.

[0071] As shown in FIG. 3A, a conductive film 102 is formed on a substrate 101. Next, a first photo A mask 131 is formed on the conductive film 102 by a photolithography process using a mask. do.

[0072] There is no particular restriction on the material of the substrate 101, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and sa A fire substrate or the like may be used as the substrate 101. Also, silicon, silicon carbide, etc. A single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a silicon germanium substrate, or the like, formed using a It is also possible to apply a compound semiconductor substrate, an SOI substrate, etc., and a semiconductor element is formed on these substrates. A substrate having a gate electrode may be used as the substrate 101. When using a substrate, the 6th generation (1500mm x 1850mm) and 7th generation (1870mm) m x 2200mm), 8th generation (2200mm x 2400mm), 9th generation (2400m Using large area substrates such as 10th generation (2950mm x 3400mm) By this, a large display device can be manufactured.

[0073] In addition, a flexible substrate is used as the substrate 101, and a conductive film 102 is formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate 101 and the conductive film 102, and a transistor may be formed on the release layer. After the element portion having the transistor is fabricated, the element portion is peeled off from the substrate 101 at the peeling layer, As a result, the element may be placed on a substrate having low heat resistance or a substrate having flexibility. A department may be established.

[0074] The conductive film 102 will later become a conductive film 103 that functions as a gate electrode. The conductive film 102 is made of a conductive material that can be used as a gate electrode. 2 is selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten. The metallic elements mentioned above, or alloys containing the metallic elements mentioned above, or combinations of the metallic elements mentioned above In addition, it can be formed by using an alloy of manganese and zirconium. Alternatively, the conductive film 102 may have a single layer structure. For example, a single layer of aluminum film containing silicon may be used. A two-layer structure in which an aluminum film is laminated on a titanium film, and a titanium film is laminated on a titanium nitride film Two-layer structure with a tungsten film laminated on a titanium nitride film, two-layer structure with a tantalum nitride film laminated on a titanium nitride film Two-layer structure with tungsten film on tungsten nitride film, copper film on titanium film A two-layer structure in which a titanium film is laminated, an aluminum film is laminated on the titanium film, and then There are three-layer structures, such as a titanium film on top of aluminum. One of the elements selected from the group consisting of tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film made by combining a plurality of layers, or a nitride film may be used.

[0075] The conductive film 102 may be formed of an indium tin oxide film or an indium oxide film containing tungsten oxide. oxide film, indium zinc oxide film containing tungsten oxide, indium zinc oxide film containing titanium oxide Oxide film, indium tin oxide film containing titanium oxide, indium zinc oxide film, silicon oxide A film formed of a conductive material having light transmitting properties, such as an indium tin oxide film containing copper, is used. In addition, a film formed of the above-mentioned light-transmitting conductive material and the above-mentioned metal It may also be a laminated structure of films formed from elements.

[0076] Here, a tungsten film having a thickness of 100 nm is formed as the conductive film 102 by sputtering. Next, a mask is formed by a photolithography process.

[0077] Next, a part of the conductive film 102 is etched using the mask 131 to form a gate electrode. A functional conductive film 103 is formed by dry etching or / and wet etching. The conductive film 102 can be etched by using a method. After that, the mask 131 is removed. (See FIG. 3(B)).

[0078] Here, a tungsten film formed as the conductive film 102 is dry-etched using a mask. Then, a conductive film 103 that functions as a gate electrode is formed.

[0079] Next, as shown in FIG. 3(C), the insulating film 105, the insulating film 106, the metal oxide film 108, A conductive film 110 is formed in sequence. Next, a photolithography process is performed using a second photomask. In this step, masks 133 and 134 are formed on the conductive film 110. The mask is characterized by using a multi-tone mask.

[0080] A multi-level photomask is a mask that can perform exposure with multiple levels of light intensity. Specifically, there are gray-tone masks and half-tone masks. A light-shielding portion and a diffraction grating are formed on a substrate having optical properties. The diffraction grating is a slit or dot pattern. The intervals between the light transmitting regions such as meshes are equal to or less than the resolution limit of the light used for exposure. This structure controls the light transmittance. The half-tone mask is formed on a light-transmitting substrate. The light-shielding portion and the semi-transmitting portion are formed. The semi-transmitting portion controls the transmittance of the light used for exposure. .

[0081] By using a multi-tone mask, three levels of light intensity are achieved: exposed, semi-exposed, and unexposed. As a result, by using a multi-tone photomask, it is possible to perform exposure in one exposure. and forming a resist mask having multiple (typically two) thicknesses by a development process. This makes it possible to reduce the number of photomasks. In the process of forming the oxide film and the conductive film 114, 115, and 116, a multi-tone photomask is used. This allows the number of photomasks to be reduced by one.

[0082] The insulating film 105 and the insulating film 106 will later become a gate insulating film. The conductive film 103, which functions as a gate electrode, is formed on the substrate 101 and the metal oxide film 108. In order to prevent the diffusion of impurities, it is preferable to form the insulating film using a nitride insulating film. The insulating film 106 contacts the metal oxide film 108. In order to reduce the surface state, the insulating film 106 is preferably formed using an oxide insulating film.

[0083] The insulating film 105 is made of silicon nitride, silicon oxynitride, aluminum nitride, or aluminum oxynitride. The insulating film 11 may be formed of, for example, aluminum, and may be provided as a multilayer or single layer.

[0084] The insulating film 106 is made of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, or the like. The insulating layer 11 may be formed of, for example, aluminum, gallium oxide, or Ga-Zn-based metal oxide. is provided in a single layer.

[0085] The insulating film 106 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate (HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By forming the gate insulating film using this material, the gate leakage of the transistor can be reduced.

[0086] The total thickness of the insulating film 105 and the insulating film 106 is preferably 5 nm or more and 400 nm or less. Preferably, the thickness is 10 nm or more and 300 nm or less, and more preferably, 50 nm or more and 250 nm or less. It is good.

[0087] The insulating film 105 and the insulating film 106 are formed by a CVD method, a sputtering method, a vapor deposition method, a coating method, or the like. It can be used appropriately.

[0088] By providing the insulating film 105 made of a nitride insulating film as a part of the gate insulating film, Impurities from the conductive film 103 functioning as a gate electrode, typically hydrogen, nitrogen, alkali, etc. It is possible to prevent metals, alkaline earth metals, etc. from migrating to the metal oxide film 109a. can.

[0089] In addition, as a gate insulating film, an insulating film formed of an oxide insulating film on the metal oxide film 109a side is used. By providing the film 106, the defect level at the interface between the gate insulating film and the metal oxide film 109a is As a result, a transistor with little deterioration in electrical characteristics can be obtained. This can be done.

[0090] The metal oxide film 108 is typically an In-Ga oxide film, an In-Zn oxide film, or an In -M-Zn oxide film (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), etc. Since the metal oxide film has semiconductor properties, it is possible to use the metal oxide film as an oxide semiconductor. It is also possible to say that.

[0091] When the metal oxide film 108 is an In-M-Zn oxide film, the sum of In and M is When the atomic percentage of In is 100 atomic %, the atomic ratio of In and M is preferably 100 atomic %. The ratio of the number of atoms is preferably In greater than 25 atomic % and M less than 75 atomic %. More preferably, In is greater than 34 atomic % and M is less than 66 atomic %. It is full.

[0092] The energy gap of the metal oxide film 108 is 2 eV or more, preferably 2.5 eV or more. , and more preferably 3 eV or more. By forming the transistor using the above, the off-state current of a transistor to be formed later can be reduced. .

[0093] The metal oxide film 108 is a metal oxide film having a low carrier density. The metal oxide film 108 has a carrier density of 1×10 17 pieces / cm 3 Less than or equal to 1×10 15 pieces / cm 3 Less than 1×10, more preferably 13 pieces / cm 3 More preferably, 1 ×10 11 pieces / cm 3 The following metal oxide films are used:

[0094] The thickness of the metal oxide film 108 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 10 0 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0095] The metal oxide film 108 can be formed by sputtering, coating, pulsed laser deposition, laser deposition, or the like. It can be formed by using an ablation method or the like.

[0096] When the metal oxide film 108 is formed by the sputtering method, a plasma generating device is used. The power supply may be an RF power supply, an AC power supply, a DC power supply, or the like.

[0097] The sputtering gas is a rare gas (typically argon) atmosphere, an oxygen atmosphere, a rare gas and In the case of a mixed gas of rare gas and oxygen, the following conditions are used for the rare gas: It is preferable to increase the gas ratio of oxygen by the above.

[0098] The metal oxide film 108 is an In-M-Zn oxide film (wherein M is Al, Ti, Ga, Y, Zr, In the case of La, Ce, Nd or Hf, it is used to deposit an In-M-Zn oxide film. The atomic ratio of the metal elements in the sputtering target is In:M:Z. n=x 1 :y 1 :z 1 So, 、 x 1 / y 1 is between 1 / 3 and 6, and between 1 and 6 Below, z 1 / y 1 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. In addition, z 1 / y 1 By setting the value of the number of the metal oxide films 108 to be described later, CAAC-OS(C Axis Aligned Crystalline Oxid The metal element of the target is easily formed. Representative examples of the molecular ratio are In:M:Zn=1:1:1, In:M:Zn=3:1:2, The atomic ratio of the metal oxide film 108 to be formed is In:M:Zn=5:5:6. are the plus or minus of the atomic ratio of the metal elements contained in the target as errors. Includes a 40% fluctuation.

[0099] In order to obtain a high-purity metal oxide film 108, the inside of the chamber must be evacuated to a high vacuum. In addition, the sputtering gas must be highly purified. Gongas has a dew point of -40°C or less, preferably -80°C or less, more preferably -100°C or less. The gas is preferably purified to a temperature of -120°C or lower. It is possible to prevent moisture and the like from being absorbed into the film as much as possible.

[0100] The conductive film 110 is formed by forming conductive films 114 and 115 which will later function as a pair of electrodes, and a capacitor line. Therefore, the conductive film 110 can be used as an electrode. The conductive film 110 is made of aluminum, titanium, chromium, nickel, or the like. From copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten The metal may be a single metal or an alloy containing the metal as a main component, and may be used as a single layer or a multilayer structure. For example, a single layer structure of an aluminum film containing silicon, or an aluminum film laminated on a titanium film A two-layer structure with an aluminum film on a tungsten film, a two-layer structure with a copper-magnesium film on a tungsten film, Two-layer structure with copper film laminated on aluminum alloy film, two-layer structure with copper film laminated on titanium film A two-layer structure in which a copper film is laminated on a tungsten film, a titanium film or a titanium nitride film, and An aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and then the aluminum film or the copper film is laminated on the titanium film or the titanium nitride film. A three-layer structure in which a titanium film or titanium nitride film is formed on the top of the molybdenum film or molybdenum nitride film A molybdenum film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film. A three-layer structure in which a film is laminated and then a molybdenum film or molybdenum nitride film is formed on top of the laminate. In addition, the transparent conductive material containing indium oxide, tin oxide, or zinc oxide is used. You may do so.

[0101] The conductive film 110 is formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

[0102] Here, the insulating film 105 is a silicon nitride film having a thickness of 400 nm formed by a CVD method. Also, a silicon oxynitride film having a thickness of 50 nm is formed as the insulating film 106 by the CVD method. In addition, as the metal oxide film 108, an In-Ga-Zn oxide target A 35-nm-thick I was deposited by sputtering using In:Ga:Zn=1:1:1. An n-Ga-Zn oxide film is formed. In addition, as the conductive film 110, Then, a tungsten film having a thickness of 50 nm and a copper film having a thickness of 300 nm are formed.

[0103] Next, a part of the conductive film 110 is etched using the masks 133 and 134 to form a conductive film 111 and 113 are formed by using a dry etching method or / and a wet etching method. Then, the conductive film 110 can be etched using the masks 133 and 134. Then, a part of the metal oxide film 108 is etched to form metal oxide films 109a and 109b. The metal oxide film is formed by dry etching and / or wet etching. 108 can be etched.

[0104] Here, the conductive film 110 and the metal oxide film 108 are each etched by dry etching. A portion of the substrate is etched.

[0105] Next, the masks 133 and 134 are processed. Here, the size of the mask 133 is reduced. At the same time, the mask 134 is removed. The masks 133 and 134 are exposed to the plasma generated by the plasma treatment. 34 is processed. The oxygen-containing atmosphere includes oxygen, ozone, nitrous oxide, and nitrogen dioxide. The atmosphere contains an oxidizing gas such as nitrogen. In addition, a bias is applied to the substrate 101 side. The masks 133 and 134 may be exposed to the plasma generated by the plasma treatment. An example of such an apparatus is an ashing apparatus.

[0106] As a result, as shown in FIG. 3(D), the mask 133 is moved back to masks 135 and 136. In addition, the mask 134 can be recessed to form a mask 137. In FIG. 3D, the dashed lines indicate the mask 133 shown in FIG. 3C, Equivalent to 134.

[0107] Next, using masks 135, 136, and 137, a part of the conductive films 111 and 113 is The conductive films 114, 115, and 116 are formed by etching the metal oxide film 10. 9a and 109b are exposed by dry etching or / and wet etching. The conductive films 111, 112, and 113 can be etched by an etching method. The conductive films 111 and 113 are etched, and the metal oxide films 109a and 109b are etched. The metal oxide films 109a and 109b are not etched, or are etched more slowly than the conductive films 111 and 113. It is preferable to use conditions that provide a small gradient rate.

[0108] Here, parts of the conductive films 111 and 113 are etched by dry etching. .

[0109] As a result, as shown in FIG. 3E, a conductive film functioning as a pair of electrodes of a transistor is formed. 114 and 115, and a conductive film 116 that functions as a capacitance line can be formed. Each of the metal oxide films 109a and 109b is partially exposed.

[0110] Through the above steps, a metal oxide film including a transistor channel region can be formed using a single photomask. a conductive film 114 and a conductive film 115 which function as a pair of electrodes of a transistor; The metal oxide film 109b which will later become one electrode of the capacitor element and the conductive film 109b which will function as a capacitor line are A film 116 can be formed.

[0111] In order to form the conductive films 114 and 115 which function as a pair of electrodes of the transistor, In the etching process, the areas of the metal oxide films 109a and 109b exposed to the plasma As a result, the metal oxide film 109a and the metal oxide film 109b are damaged and oxygen vacancies are formed. The conductivity of the exposed area of ​​the oxide film 109b is increased.

[0112] Next, it is preferable to carry out a heat treatment. The temperature of the heat treatment is typically 150° C. or higher. Lower than the upper substrate distortion point, preferably 300°C to 500°C, preferably 320°C to 47°C The temperature should be below 0℃.

[0113] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.

[0114] Heat treatment is carried out in a vacuum of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). pm or less, preferably 10 ppb or less air), or rare gases (argon, helium, etc.) In addition, the above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be mixed with hydrogen, water, or the like. It is preferable that the above is not included.

[0115] Here, the specimen was heated at 450°C for 1 hour in a nitrogen atmosphere, and then cooled in a nitrogen and oxygen atmosphere. The mixture is then heated in a 450℃ oven for 1 hour.

[0116] In addition, the conductive films 114, 115, and 116 are in contact with the metal oxide films 109a and 109b. The area to be treated must not contain any of the following: tungsten, titanium, aluminum, copper, molybdenum, chromium, or titanium. By using conductive materials that easily bond with oxygen, such as tantalum or alloys, a metal oxide film The oxygen in 109a and 109b is drawn into the conductive material that easily bonds with oxygen. The oxide films 109a and 109b are made of tungsten, titanium, aluminum, copper, molybdenum, Chromium or tantalum alone or as an alloy component may be mixed in. As a result, the conductive films 114, 115, and 116 in the metal oxide films 109a and 109b are A low resistance region is formed near the area where the metal is in contact with the low resistance region. It is possible to reduce the contact resistance between the oxide film 109a and the conductive films 114 and 115. The on-state current of the transistor can be increased. Therefore, the contact resistance with the conductive film 116 can be reduced, and the resistance of the signal line and the capacitance line can be reduced. It can be reduced.

[0117] Next, as shown in FIG. 4A, the insulating film 118 is formed. Next, a third photomask A mask 138 is formed on the insulating film 118 by a photolithography process using a photolithography method.

[0118] The insulating film 118 is formed by oxidation in order to reduce the interface state at the interface with the metal oxide film 108. The insulating film 118 is preferably formed of a silicon oxide insulating film. , silicon oxide nitride, aluminum oxide, hafnium oxide, gallium oxide or Ga-Z The insulating film 11 may be formed using an n-based metal oxide or the like, and may be provided as a laminated layer or a single layer.

[0119] In addition, the insulating film 118 may contain more oxygen than satisfies the stoichiometric composition. It is preferable to form the insulating film using an oxide insulating film containing oxygen having a stoichiometric composition. When an oxide insulating film contains more oxygen than the elemental oxygen, some of the oxygen is released by heating. The oxide insulating film containing more oxygen than meets the oxygen standard is analyzed by TDS. The amount of oxygen released is 1.0×10 18 atoms / cm 3 Above, preferably 3. 0×10 20 atoms / cm 3 The oxide insulating film is as described above.

[0120] In addition, it is preferable that the insulating film 118 has a small amount of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Below Bottom, 1×10 17 spins / cm 3 or less, and more preferably, less than the lower detection limit. .

[0121] The thickness of the insulating film 118 is 30 nm or more and 500 nm or less, preferably 50 nm or more and 400 nm or less. nm or less.

[0122] The insulating film 118 is an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. By forming the insulating film 118 using a metal oxide film, oxygen released from the insulating film 118 by heat treatment can be converted to oxygen by a metal oxide film. As a result, the metal oxide film 109a can be moved to the metal oxide film 109a. The oxygen deficiency can be reduced.

[0123] The insulating film 118 can be formed by a sputtering method, a CVD method, or the like.

[0124] When the insulating film 118 is formed by using the CVD method, the source gas is a silicon-containing deposit. It is preferable to use an oxidizing gas and an insulating gas. Representative examples of the deposition gas containing silicon are: Examples of oxidizing gases include silane, disilane, trisilane, and fluorinated silane. These include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

[0125] The insulating film 118 is an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. In the case of forming the film using the above method, a substrate is placed in a processing chamber of a plasma CVD apparatus which is evacuated to a vacuum. The plate is kept at a temperature of 180° C. or higher and 280° C. or lower, more preferably 200° C. or higher and 240° C. or lower, A raw material gas is introduced into the processing chamber to set the pressure in the processing chamber to 20 Pa or more and 250 Pa or less; 0.17 W / cm2 applied to the electrode installed in the processing chamber 2 More than 0.5W / cm 2 The following are more preferred Or 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power supply conditions are used: In this way, a silicon oxide film or a silicon oxynitride film can be formed.

[0126] The conditions for forming the insulating film 118 are as follows: high frequency power density in a reaction chamber with the above pressure; By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas progresses, the oxygen content in the insulating film 118 becomes lower than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is Since the oxygen in the film is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. An insulating film that contains more oxygen than satisfies the theoretical composition and loses some of the oxygen when heated 118 can be formed.

[0127] The insulating film 118 has a multi-layer structure of a first insulating film and a second insulating film. The second insulating film is formed using an oxide insulating film that can transmit oxygen. An acid that contains more oxygen than satisfies the stoichiometric composition and loses some of the oxygen when heated. By forming the laminated structure, the second insulating film can be formed. As a result, the first insulating film acts as a protective film for the metal oxide film. The second insulating film can be formed by using high-frequency power with high power density while reducing the do.

[0128] Alternatively, an insulating film is formed by a sputtering method, a CVD method, or the like, and then the insulating film is oxidized. By adding oxygen, the insulating film 118 can be formed. The method of adding the ions includes ion doping and ion implantation. Oxygen is added to the insulating film by exposing the insulating film to plasma containing oxygen generated in the atmosphere. It is possible.

[0129] Here, the insulating film 118 is made of silane with a flow rate of 200 sccm and 4000 sccm. The reaction chamber pressure was 200 Pa and the substrate temperature was 220°C. A 27.12MHz high-frequency power source was used to supply 1500W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film having a thickness of 400 nm is formed by the plasma CVD method. The plasma CVD device has an electrode area of ​​6000 cm 2 A parallel plate type plasma CVD apparatus The power supplied is converted to power per unit area (power density) of 0.25W / c m 2Further, masks 133 and 135 are formed using a half-tone mask.

[0130] Next, a part of the insulating film 118 is etched using the mask 138 to form the insulating film 118 shown in FIG. In this manner, the insulating film 119 having the opening 151 is formed. A part of the oxide film 109b is exposed. The insulating film 118 can be etched by using a etching method. Next, the mask 138 is removed. do.

[0131] In the etching process for forming the insulating film 119, the metal oxide film 109b In the case of the ion implantation, the area exposed to the plasma is damaged and oxygen vacancies are formed. In the metal oxide film 109b, the conductivity of the region not covered with the insulating film 119 is increased.

[0132] Here, a part of the insulating film 118 is etched by dry etching.

[0133] Next, as shown in FIG. 4C, an insulating film is formed on the metal oxide film 109b and the insulating film 119. Next, a photolithography process using a fourth photomask is performed to form A mask 139 is formed on the insulating film 120 .

[0134] A nitride insulating film is provided as the insulating film 120. The nitride insulating film may be made of silicon nitride, Silicon oxynitride, aluminum nitride, aluminum oxide nitride, etc. In this manner, a nitride insulating film containing hydrogen may be formed.

[0135] The thickness of the insulating film 120 is 10 nm or more and 400 nm or less, and more preferably 50 nm or more and 300 nm or less. 00nm or less.

[0136] The insulating film 120 can be formed by using a sputtering method, a CVD method, or the like. In the method, an insulating film is formed by using a sputtering method, a CVD method, or the like, and then hydrogen is added to the insulating film. The method for adding hydrogen to the insulating film may include ion doping, ion Alternatively, the insulating film is exposed to plasma generated in a gas atmosphere containing hydrogen. In this way, hydrogen can be added to the insulating film.

[0137] Here, the insulating film 120 is formed by a plasma process using silane, ammonia, and nitrogen as raw material gases. A silicon nitride film having a thickness of 100 nm is formed by the Zuma CVD method.

[0138] The plasma damage that occurs when forming the insulating film 120 on the insulating film 119 causes the metal oxide As a result, oxygen vacancies are formed in the metal oxide film 109b. The conductivity of the area not covered with the insulating film 119 is increased. By using a nitride insulating film containing hydrogen, hydrogen is transferred from the insulating film 120 to the metal oxide film 109b. When hydrogen moves to the oxygen vacancy, electrons are generated as carriers. As a result, the metal oxide film 109b becomes highly conductive, and the conductive metal oxide film 109c The metal oxide film 109c functions as one electrode of the capacitor 25.

[0139] Since the nitride insulating film also functions as a blocking film for water, hydrogen, and the like, the insulating film 1 By providing a nitride insulating film 20, hydrogen and water from the outside are prevented from entering the metal oxide film 109a. It is possible to prevent intrusions such as

[0140] The metal oxide film 109a and the metal oxide film 109c are both formed on the insulating film 106. Specifically, compared to the metal oxide film 109a, the impurity concentration is different. The impurity concentration of the film 109c is high. For example, the hydrogen concentration in the metal oxide film 109a is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 less than , preferably 1 x 10 18 atoms / cm 3 Less than or equal to 5×10 17 ato ms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 Metal The hydrogen concentration in the oxide film 109c is 8×10 19 More than 1×10 20 a toms / cm 3 More preferably, 5×10 20 The above is the case. The hydrogen concentration in the metal oxide film 109c is twice as high as that in the metal oxide film 109a, and preferably 10 times higher. That's all.

[0141] The metal oxide film 109c has a lower resistivity than the metal oxide film 109a. The resistivity of the film 109c is 1×10 -8 1×10 times more - 1 It is preferable that the ratio is less than 1×10 -3 Ωcm or more 1×10 4 Ωcm not yet More preferably, the resistivity is less than 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It is good.

[0142] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 40° C. or lower. 0°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower Let us assume that.

[0143] The nitride insulating film has a small diffusion coefficient for hydrogen, water, and oxygen, and is a blocking agent for hydrogen, water, and oxygen. In addition, the insulating film 119 contains more oxygen than the oxygen required for the stoichiometric composition. By forming the insulating film using an oxide insulating film containing oxygen, The oxygen contained in the film 109a can be prevented from diffusing to the outside. The oxygen contained in 109a can be prevented from diffusing to the outside. The amount of oxygen vacancies in the film 109a can be reduced. Therefore, the diffusion of hydrogen, water, etc. into the metal oxide film 109a can be suppressed. As a result, highly reliable transistors can be manufactured. It is possible.

[0144] Here, heat treatment is performed in a nitrogen and oxygen atmosphere at 350° C. for 1 hour.

[0145] Next, a part of the insulating films 119 and 120 is etched using a mask 139 to form a As shown in FIG. 1D, an opening 152 is formed and the insulating film 120 is etched. Openings 153 and 154 are formed. Also, the insulating film 120 is etched to form an insulating film 121. In the opening 152, a part of the conductive film 115 is exposed. 3, 154, a part of the conductive film 116 is exposed. Then, the insulating film 120 can be etched using a wet etching method. , and remove the mask 139.

[0146] Here, a part of the insulating film 120 is etched by dry etching.

[0147] Next, as shown in FIG. 5A, a light-transmitting film is formed on the insulating film 121 and the conductive films 115 and 116. Next, a conductive film 122 having a first insulating layer 124 is formed by photolithography using a fifth photomask. Masks 140 and 141 are formed on the conductive film 122 through a process.

[0148] The conductive film 122 will later become a conductive film 123 that functions as a pixel electrode. The conductive film 122 is made of a conductive material that can be used as a pixel electrode. , indium tin oxide film, indium oxide film containing tungsten oxide, tungsten oxide Indium zinc oxide film containing titanium oxide, indium oxide film containing titanium oxide Indium tin oxide film, indium zinc oxide film, indium oxide film containing silicon oxide A film formed of a conductive material having light transmitting properties, such as a tin oxide film, can be used.

[0149] The conductive film 122 is formed by a sputtering method, a vapor deposition method, a coating method, or the like.

[0150] Here, a 100 nm thick ITO film is formed as the conductive film 122 by sputtering. Form.

[0151] Next, a part of the conductive film 122 is etched using the masks 140 and 141 to form the conductive film 1 The conductive film 123 functions as a pixel electrode. The conductive film 124 is The conductive film 116 has a function of electrically connecting the conductive film 116 formed in the corresponding pixel. The conductive film 24 functions as a capacitance line, similar to the conductive film 116 .

[0152] The conductive film 123 is in contact with the conductive film 115 which functions as a pair of electrodes and is also The metal oxide film 109c is formed by a dry etching method. The conductive film 122 can be etched by using a wet etching method. After that, the masks 140 and 141 are removed (see FIG. 5(B)).

[0153] Here, part of the conductive film 122 is etched by wet etching.

[0154] Through the above steps, the conductive film 103 functioning as a gate electrode and the gate insulating film The insulating films 105 and 106 and the metal oxide film 109a are in contact with each other, and the metal oxide film 109a is in contact with the A transistor 22 having conductive films 114 and 115 functioning as a source electrode and a drain electrode. In addition, the conductive film 115 included in the transistor 22 is in contact with the pixel A conductive film 123 functioning as an electrode can be formed on the insulating film 106. The capacitor element 25 includes the metal oxide film 109c, the insulating film 121, and the conductive film 123. That is, the transistor 22 and the conductive film 123 functioning as a pixel electrode can be manufactured. , and the element substrate having the capacitive element 25 can be manufactured using five photomasks. In this embodiment, a metal oxide film and a conductive film functioning as a source electrode and a drain electrode are Since the photomask is formed using one photomask, the number of photomasks required to fabricate the element substrate is This can reduce the risk.

[0155] In addition, the semiconductor device described in this embodiment has a metal oxide semiconductor layer including a channel region of a transistor. At the same time as forming the metal oxide film, a metal oxide film that will become one electrode of the capacitance element is formed. A metal oxide film including a channel region of a transistor and a metal oxide film that will be one electrode of a capacitor element. The conductive film that functions as a pixel electrode is made of the same metal element as the capacitor element. For this reason, a new conductive film is formed to form a capacitor element. Since the step of forming a capacitor is not required, the manufacturing steps of the display device can be reduced. Since both the metal oxide film 109c and the conductive film 123, which are electrodes, have light-transmitting properties, As a result, the area occupied by the capacitance element is increased while the aperture ratio of the pixel is increased. Furthermore, a display device with reduced power consumption can be manufactured.

[0156] In FIG. 4B, an opening 151 is provided. In one embodiment of the present invention, As shown in FIG. 13(A), depending on the circumstances, It is also possible not to provide the opening 151 .

[0157] In FIG. 4B, the conductive film 124 is connected to the conductive film 116 of the adjacent pixel. However, one aspect of the embodiment of the present invention is not limited to this. In this way, the conductive film 116 may be extended and connected as necessary or depending on the situation. is also possible.

[0158] <Modification 1, Regarding the Undercoat Insulating Film> In the transistor described in this embodiment, the substrate 101 and the gate electrode may be formed as necessary. A base insulating film can be provided between the conductive film 103 which functions as a base insulating film. Silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, gallium oxide , hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxide nitride, etc. The base insulating film can be formed by using a material such as silicon nitride, gallium oxide, or oxide. The substrate 1 is formed using hafnium oxide, yttrium oxide, aluminum oxide, etc. Impurities, typically alkali metals, water, hydrogen, etc., diffuse from 01 into the metal oxide film 109a. can be suppressed.

[0159] The base insulating film can be formed by a sputtering method, a CVD method, or the like.

[0160] <Modification 2: Gate insulating film> The insulating film 105 formed of a nitride insulating film is replaced with a first nitride insulating film having fewer defects and a water The gate insulating film is a laminated structure of a second nitride insulating film having a high blocking property. By providing a nitride insulating film with few defects as the film, the dielectric strength of the gate insulating film is improved. In addition, a nitride insulating film having high hydrogen blocking properties can be used as the gate insulating film. By providing the insulating film 105, hydrogen from the conductive film 103 functioning as a gate electrode and the insulating film 105 can be It is possible to prevent the metal from migrating to the metal oxide film 109a.

[0161] Alternatively, the insulating film 105 formed of a nitride insulating film may have a high impurity blocking property. The first nitride insulating film has a low defect rate, the second nitride insulating film has a high hydrogen blocking property, and A second nitride insulating film is laminated in this order from the conductive film 103 side which functions as a gate electrode. The first insulating film, which has a high impurity blocking property, can be used as the gate insulating film. By providing the nitride insulating film, impurities from the conductive film 103 functioning as a gate electrode, Typically, hydrogen, nitrogen, an alkali metal, an alkaline earth metal, or the like is added to the metal oxide film 10. This will prevent you from moving to 9a.

[0162] <Modification 3: Metal oxide film> <About metal oxide films> When hydrogen is added to an oxide semiconductor with oxygen vacancies, hydrogen enters the oxygen vacancy sites. A donor level is formed near the conduction band. As a result, the oxide semiconductor has high electrical conductivity. The oxide semiconductor that has been made conductive can be called an oxide conductor. Since an oxide semiconductor has a large energy gap, it transmits visible light. On the other hand, an oxide conductor is an oxide semiconductor having a donor level near the conduction band. The effect of absorption due to the donor level is small, and the transparency to visible light is the same as that of an oxide semiconductor. It has photochemical properties.

[0163] Here, a film formed of an oxide semiconductor such as that used for the metal oxide film 109a (hereinafter The oxide semiconductor film 109c is referred to as an oxide semiconductor film (OS). Resistance in a film formed of an oxide conductor (hereinafter referred to as an oxide conductor film (OC)) The temperature dependency of the rate will be explained with reference to FIG. 17. In FIG. 17, the horizontal axis indicates the measurement temperature. The vertical axis shows the resistivity, and the vertical axis shows the measurement results of the oxide semiconductor film (OS) with a circle. The measurement results for the oxide conductor film (OC) are indicated by square marks.

[0164] The sample including the oxide semiconductor film (OS) was formed on a glass substrate with an atomic ratio of In:Ga A sputtering method was used to deposit a thick ZnO film using a sputtering target with a ratio of 1:1:1.2. An In-Ga-Zn oxide film having a thickness of 35 nm was formed, and the atomic ratio of the film was In:Ga:Zn=1:4. A 20 nm thick In- A Ga-Zn oxide film was formed, and then heat-treated in a nitrogen atmosphere at 450°C. The silicon oxynitride film is then formed by plasma CVD. It was produced by forming

[0165] The sample containing the oxide conductor (OC) was prepared by depositing an In:Ga atomic ratio on a glass substrate. A sputtering method was used with a sputtering target of Zn=1:1:1 to deposit a 10 ... After forming a 00 nm In-Ga-Zn oxide film and heat-treating it in a nitrogen atmosphere at 450 °C, The silicon nitride was then deposited by plasma CVD. It was prepared by forming a con film.

[0166] As can be seen from FIG. 13, the temperature dependence of resistivity in the oxide conductor film (OC) is The temperature dependence of resistivity is smaller than that of oxide semiconductor films (OS). Typically, it is 80K or higher. The change in resistivity of the oxide conductor film (OC) at 290K or less is less than ±20%. Alternatively, the rate of change in resistivity from 150K to 250K is less than ±10%. That is, an oxide conductor is a degenerate semiconductor, and the conduction band edge and the Fermi level are coincident or approximately coincident. For this reason, the oxide conductor film is used as the electric field of resistor elements, wiring, and capacitor elements. The electrode can be used for a pixel electrode, a common electrode, etc.

[0167] <Oxide Semiconductor Film and Metal Oxide Film> Next, an embodiment applicable to a metal oxide film and an oxide semiconductor film having semiconductor characteristics will be described. Here, an oxide semiconductor film will be described as a typical example. The structure of the semiconductor film can be applied to a metal oxide film.

[0168] The oxide semiconductor film is preferably a CAAC-OS film. The S film has a c-axis orientation and clear crystal grain boundaries (also called grain boundaries) have been confirmed. As a result, in a channel-etched transistor, The amount of overetching of the oxide semiconductor film when forming the oxide semiconductor film is small. A channel-etched transistor is fabricated by forming the body film with a CAAC-OS film. In addition, in a channel-etched transistor, the distance between a pair of electrodes, i.e., the channel The channel length is set to 0.5 μm or more and 6.5 μm or less, preferably 1 μm or more and 6.5 μm or less. It is possible to make it smaller than 1 μm.

[0169] In addition, the oxide semiconductor film is formed by using an oxide semiconductor having a single crystal structure (hereinafter, referred to as a single crystal oxide semiconductor). ), a polycrystalline oxide semiconductor (hereinafter referred to as a polycrystalline oxide semiconductor), and a microcrystalline oxide semiconductor. The oxide semiconductor layer may be made of one or more of the following oxide semiconductors: The following describes the CAAC-OS, single-crystalline oxide semiconductor, polycrystalline oxide semiconductor, and microcrystalline oxide semiconductor. The conductor will now be described.

[0170] <caac-os> The CAAC-OS film is one of the oxide semiconductor films having multiple crystal parts. The crystals in the AC-OS film have a c-axis orientation. The area of ​​the crystals in the C-OS film is 2500 nm 2 More preferably, 5 μm or more 2 Below More preferably, 1000 μm or more 2 In addition, in the cross-sectional TEM image, By having a ratio of 50% or more, preferably 80% or more, and more preferably 95% or more, The resulting thin film has properties close to those of a crystal.

[0171] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed using a quartz crystal microscope, clear boundaries between the crystals were clearly visible. In other words, it is not possible to confirm the grain boundaries. Therefore, it can be said that the CAAC-OS film is less susceptible to the decrease in electron mobility caused by the grain boundaries. .

[0172] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When the metal atoms are observed, it can be confirmed that they are arranged in layers in the crystal part. Each layer of the CAAC-OS film is formed on a surface on which the film is to be formed (also called a surface on which the film is to be formed) or on a concave surface on the upper surface. The shape reflects the convexity and is aligned parallel to the surface on which the CAAC-OS film is formed or the top surface. In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. " refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. This also includes cases where the angle is between 85° and 95°.

[0173] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.

[0174] When electron beam diffraction was performed on the CAAC-OS film, spots (bright spots) indicating orientation were observed. is observed.

[0175] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It can be seen that...

[0176] X-ray diffraction (XRD) of CAAC-OS film The structure of the CAAC-OS film was analyzed using the out-of-plane method. In the analysis, a peak may appear at a diffraction angle (2θ) of around 31°. This peak is I Since it is assigned to the (00x) plane (x is an integer) of the nGaZn oxide crystal, The crystals of the OS film have a c-axis orientation, and the c-axis is oriented in a direction approximately perpendicular to the surface on which the film is formed or the upper surface. It can be confirmed that there is.

[0177] On the other hand, in-p X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the lane method, a peak may appear at 2θ around 56°. This is attributed to the (110) plane of the InGaZn oxide crystal. In the case of a crystalline oxide semiconductor film, 2θ is fixed at about 56°, and the normal vector of the sample surface is aligned along the axis (φ When the sample is rotated around the (φ) axis while analyzing (φ scan), the results show that the bonds are equivalent to the (110) plane. In contrast, in the case of the CAAC-OS film, 2 Even when θ is fixed at around 56° and φ is scanned, no clear peak appears.

[0178] From the above, it is considered that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, the layered structure confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of arranged metal atoms is in a plane parallel to the ab plane of the crystal.

[0179] The crystalline part is formed when the CAAC-OS film is formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned along the surface of the CAAC-OS film. Or, the orientation is parallel to the normal vector of the upper surface. When the shape of the CAAC-OS film is changed by etching, the c-axis of the crystal part is aligned with the CAAC-OS film. It may not be parallel to the normal vector of the forming surface or the top surface.

[0180] In addition, the crystallinity in the CAAC-OS film does not have to be uniform. When the crystalline part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, The area near the surface may have a higher crystallinity than the area near the surface on which it is formed. When impurities are added to the AC-OS film, the crystallinity of the region to which the impurities are added changes, resulting in a partial In some cases, regions of differing crystallinity may be formed.

[0181] In addition, in the out-of-plane analysis of the CAAC-OS film, 2θ was 31°. In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks near the c-axis are due to the presence of crystals that do not have the c-axis orientation in the CAAC-OS film. The CAAC-OS film shows a peak at 2θ of around 31° and a peak at 2θ of around 36°. It is preferable that there is no peak nearby.

[0182] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The oxide semiconductor film is preferably made of silicon or a transition metal element other than the main component of the oxide semiconductor film. The elements that bond to oxygen stronger than the metal elements that form the oxide semiconductor film, such as Zn, By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, and the crystallinity is reduced. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide are Since the diameter (or molecular radius) of the ions is large, when the ions are contained inside the oxide semiconductor film, the oxide semiconductor film The impurities contained in the oxide semiconductor film are disturbed, which causes a decrease in crystallinity. Pure materials may act as carrier traps or carrier generation sources.

[0183] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in semiconductor films act as carrier traps and trap hydrogen. This can become a carrier generation source.

[0184] The low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "high-purity intrinsic" refers to a substantially high-purity intrinsic oxide semiconductor. Since the film has a small carrier generation source, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics (noise) in which the threshold voltage is negative. It is also called "marine". It is rare for it to become "high purity genuine" or "substantially high purity". The intrinsic oxide semiconductor film has few carrier traps. Transistors using the film have little fluctuation in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time is long and the charge may behave as if it were a fixed charge. In addition, a transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. There may be cases where this occurs.

[0185] In addition, the electrical characteristics of transistors using CAAC-OS films are improved by irradiation with visible light or ultraviolet light. Gender variation is small.

[0186] <Single crystal oxide semiconductor> A single-crystal oxide semiconductor film has a low impurity concentration and a low density of defect states (few oxygen vacancies). ) an oxide semiconductor film. Therefore, the carrier density can be reduced. A transistor using a crystalline oxide semiconductor film rarely has normally-on electrical characteristics. In addition, since the single crystal oxide semiconductor film has a low impurity concentration and a low density of defect states, Therefore, in the case of a transistor using a single crystal oxide semiconductor film, the number of carrier traps may be reduced. The transistor has small fluctuations in electrical characteristics and is highly reliable.

[0187] Note that the oxide semiconductor film has a high density when the number of defects is small. High crystallinity increases density. In addition, the oxide semiconductor film has a low concentration of impurities such as hydrogen. The density of the single crystal oxide semiconductor film is higher than that of the CAAC-OS film. The CAAC-OS film has a higher density than the microcrystalline oxide semiconductor film. The conductor film has a higher density than the microcrystalline oxide semiconductor film. The density is higher than that of an crystalline oxide semiconductor film.

[0188] <Polycrystalline oxide semiconductor> In the polycrystalline oxide semiconductor film, crystal grains can be confirmed by observing with a high-resolution TEM. The crystal grains contained in the polycrystalline oxide semiconductor film can be observed, for example, by high-resolution TEM. In the observation image, 2nm to 300nm, 3nm to 100nm, or 5nm to 50nm In addition, the grain size of the polycrystalline oxide semiconductor film is often less than 10 μm. In some cases, grain boundaries can be identified in the observed image.

[0189] The polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientation between the plurality of crystal grains is In addition, the positions of the crystals in the polycrystalline oxide semiconductor film may differ from each other. Structural analysis reveals that, for example, InGaZnO 4 The polycrystalline oxide semiconductor film having the crystal structure In the t-of-plane analysis, there was a peak at 2θ near 31° and a peak at 2θ near 36°. or other peaks may appear.

[0190] A polycrystalline oxide semiconductor film has high crystallinity and therefore may have high electron mobility. Therefore, a transistor using a polycrystalline oxide semiconductor film has high field-effect mobility. However, in the polycrystalline oxide semiconductor film, impurities may be segregated at crystal grain boundaries. The grain boundaries of the polycrystalline oxide semiconductor film become defect states. Since the oxide semiconductor film may become a carrier trap or a carrier generation source, The transistors using the CAAC-OS film showed a small change in electrical characteristics compared to the transistors using the CAAC-OS film. may result in a transistor with low reliability.

[0191] <Microcrystalline oxide semiconductor> In the TEM image of the microcrystalline oxide semiconductor film, crystal parts can be clearly seen. The crystal parts contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or more. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 to 3 nm or less. The oxide semiconductor film having nc-OS (nanocrystalline O The nc-OS film is called a T In EM images, grain boundaries may not be clearly visible.

[0192] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal planes are In addition, the peaks indicating the diameters larger than those of the crystals in the nc-OS film (e.g. When electron beam diffraction (also called selected area electron beam diffraction) is performed using an electron beam with a diameter of 50 nm or more, On the other hand, for the nc-OS film, the diffraction pattern is crystalline. The probe diameter is close to the size of the crystal part or smaller than the crystal part (for example, 1 nm to 30 nm). When electron beam diffraction using a sagittal beam (also called nanobeam electron diffraction), spots are observed. In addition, when nanobeam electron diffraction is performed on nc-OS, the In addition, when the nanobeam is applied to the nc-OS, a bright area (a circle-like area) may be observed. When sagittal diffraction is performed, multiple spots may be observed within a ring-shaped region.

[0193] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, the crystal orientation is not regular between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0194] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0195] (Embodiment 2) In this embodiment mode, a method for manufacturing an element substrate of a display device, which is different from that in Embodiment Mode 1, will be described with reference to FIG. In this embodiment, as in the first embodiment, a gold semiconductor device having a channel region is used. The metal oxide film and the conductive film that functions as the source electrode and the drain electrode are printed on one photomask. On the other hand, in this embodiment, the conductive film functioning as a capacitance line is formed using Different from form 1.

[0196] A specific example of an element substrate of a liquid crystal display device using liquid crystal elements for the pixels 13 will be described. Here, a top view of the pixel 13 shown in FIG. 1(B) is shown in FIG.

[0197] In the pixel 13 shown in FIG. 6, a part of the metal oxide film 109c functions as a capacitance line. The metal oxide films 109c provided in adjacent pixels are connected by a conductive film 173.

[0198] In the pixel 13 shown in FIG. 6, an opening is provided in the insulating film 119 (see FIG. 7(A)). In the regions 171 and 172, a metal oxide film 109c and a conductive film 12 functioning as a pixel electrode are The conductive film 173 formed at the same time as the opening 151 is connected to the metal oxide film 109c. (See FIG. 4(B)). As a result, the metal oxide film 109c functions as a capacitance line and also functions as a capacitance It functions as one electrode of the quantum element.

[0199] The capacitance element 25 is made up of a conductive metal oxide film 109c, an insulating film 121 (see FIG. 7B), The pixel electrode is made of a conductive film 123 that functions as a pixel electrode. The film 109c is connected to the conductive film 173, so that one electrode ( Here, the conductive metal oxide film 109c) can be set to the same potential.

[0200] In the pixel 13 shown in this embodiment, the conductive films 114 and 115 are formed as the capacitance lines at the same time. Since the conductive films 114 and 115 have a light-shielding property, the aperture ratio of the pixel is increased. It can be improved.

[0201] Next, using the cross-sectional views of the dashed and dotted lines AB and CD shown in FIG. A method for manufacturing the element substrate of the device will be described.

[0202] Through the same steps as in the first embodiment, the first to third photomasks are used. By the above process, a conductive film functioning as a gate electrode is formed on the substrate 101 as shown in FIG. film 103, insulating films 105, 106, metal oxide films 109a, 109c, conductive films 114, In the present embodiment, the conductive film 15, the insulating film 119, and the insulating film 120 are formed. The conductive film 116 is not formed. Also, the metal oxide film 109a is not formed by the second photomask. , 109c and the conductive films 114 and 115 can be formed. This reduces the number of photomasks required.

[0203] Next, a fourth photomask is used to perform a photolithography process on the insulating film 120. After forming the mask, the insulating films 119 and 120 are etched using the mask to form conductive An opening 152 is formed to expose the film 115, and the insulating film 120 is etched. Openings 171 and 172 are formed to expose the conductive metal oxide film (see FIG. 7(B)). (See FIG. 1). Moreover, the insulating film 121 can be formed by this etching.

[0204] Next, the conductive metal oxide film 109c, the exposed portion of the conductive film 115, and the insulating film A light-transmitting conductive film is formed on the insulating film 121. Next, a photoresist is formed on the insulating film 121 using a fifth photomask. A mask is formed on the conductive film having light-transmitting properties by a lithography process, and the mask is used to The conductive film having light-transmitting properties is etched to form a conductive film 123 that functions as a pixel electrode. The conductive film 173 is formed in adjacent pixels. The metal oxide film 109c has a function of electrically connecting the metal oxide film 109c formed on the insulating layer 109. After that, the mask is removed (see FIG. 7(C)).

[0205] Through the above steps, the transistor 22 and the capacitor 25 can be manufactured. By the above steps, an element substrate having pixels with a higher aperture ratio can be manufactured. .

[0206] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0207] (Embodiment 3) In this embodiment, a FFS (Fringe Field Switching) method is used. The pixel structure of a liquid crystal display device in a switching mode will be used for explanation.

[0208] In the liquid crystal display device of the FFS mode shown in this embodiment, the common electrodes are striped. The alignment of the liquid crystal is controlled by applying an electric field generated by the pixel electrode and the common electrode between the liquid crystal and the pixel electrode. FFS mode LCD devices have a high aperture ratio and can obtain a wide viewing angle. Cut.

[0209] Here, a top view of the pixel 13 shown in FIG. 1(B) is shown in FIG.

[0210] The pixels 13 shown in FIG. 8 each have one metal oxide film 183. Conductive films 181 and 182 functioning as a source electrode and a drain electrode are provided on the semiconductor substrate 83. The conductive film 181 also functions as a signal line. In addition, a conductive film 181 electrically connecting the conductive films 181 provided in adjacent pixels is formed. The conductive film 187 is provided on the conductive film 181 via an insulating film (not shown). The conductive film 181 is connected to the openings 184 and 185. A conductive film 186 that functions as a striped common electrode is provided. 86 is formed at the same time.

[0211] In the display device described in this embodiment, the conductive film 186 functioning as a common electrode is Since the conductive films 181, 187, and As a result, the area of ​​the conductive film 103 that functions as a scanning line is reduced. 3 and the conductive film 186, and between the conductive films 181, 187 and the conductive film 186. The parasitic capacitance can be reduced.

[0212] Next, using the cross-sectional views of the dashed and dotted lines AB and EF shown in FIG. A method for manufacturing the element substrate of the device will be described.

[0213] After going through the same process as in the first embodiment, a process using a first photomask is performed to obtain the structure shown in FIG. As shown in FIG. 1, a conductive film 103 that functions as a gate electrode is formed on a substrate 101. In the same manner as in the first embodiment, insulating films 105 and 106 are formed on the substrate 101 and the conductive film 103. A metal oxide film 108 and a conductive film 110 are formed.

[0214] Next, the process using the second photomask shown in the first embodiment is performed to obtain the structure shown in FIG. In this manner, the metal oxide film 183 and the conductive films 181 and 182 are formed. Similarly to the conductive film 114 in the first embodiment, one of the source and drain electrodes of the transistor The conductive film 182 functions as a gate and a signal line. Similarly to the conductive film 115, the conductive film 114 functions as the other of the source electrode and the drain electrode of the transistor. Here, the metal oxide film 183, the conductive film 181, and the first 82, the number of photomasks required for the element substrate manufacturing process can be reduced. can.

[0215] Next, an opening 151 is formed by a process using the third photomask shown in the first embodiment. After forming the insulating film 119, the insulating film 120 is formed on the metal oxide film 183 and the insulating film 119. (See FIG. 9(C).)

[0216] In the metal oxide film 183, a region 191 in contact with the insulating film 120 is the same as that of the metal oxide film 10. As a result, the insulating film 11 functions as a pixel electrode. 9 is formed using an oxide insulating film. The region in contact with the insulating film 119 has a low interface state density with the insulating film 119. The insulating film is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. Then, oxygen contained in the insulating film 119 moves to the metal oxide film 183, so that in the region 192 As a result, the oxygen vacancy content in the metal oxide film 183 can be reduced. Thus, the region 192 in contact with the insulating film 119 functions as a channel region. In the conductive film 183, the regions in contact with the conductive films 181 and 182 become low resistance regions.

[0217] When the insulating film 119 having the opening 151 is formed, the edge of the opening 151 and the scanning The distance between the conductive film functioning as a line and the edge of the opening 151 and the conductive film functioning as a signal line The distance to the film 181 is set to be greater than 1.5 μm and greater than 2 μm, respectively. In the metal oxide film 183, the region in contact with the insulating film 120 has oxygen vacancies. Or, the conductivity is increased by including impurities, but the conductivity is also increased in the region adjacent to the region. This is because the impurities diffuse laterally, and the metal oxide film 183 is This is because impurities are also contained in the region not in contact with the insulating film 121, resulting in a low resistance. Therefore, the distance between the edge of the opening 151 and the conductive film functioning as the scanning line is set to 1.5 By making the thickness larger than 2 μm, the channel of the transistor 22 It is possible to prevent the resistance of the region from decreasing, and a transistor having normally-off characteristics can be fabricated. In addition, the end of the opening 151 and the conductive film 181 functioning as a signal line can be formed. By making the distance larger than 1.5μm, or even larger than 2μm, A region 19 functioning as a pixel electrode in the metal oxide film 183 and a conductive film 181 functioning as a pixel electrode The voltages of 1 and 2 do not affect each other, preventing display defects.

[0218] Next, a fourth photomask is used to perform a photolithography process on the insulating film 121. After forming the mask, the insulating films 119 and 120 are etched using the mask to form conductive Openings 184 and 185 are formed to expose the film 181, and an insulating film 121 is formed. (See Figure 10(A).)

[0219] Next, a light-transmitting conductive film is formed over the exposed portion of the conductive film 181 and the insulating film 121. Next, a fifth photomask is used in a photolithography process to form a light-transmitting A mask is formed over the conductive film, and the conductive film having a light-transmitting property is etched using the mask. Then, a conductive film 186 functioning as a common electrode is formed, and a conductive film 187 functioning as a signal line is formed. A conductive film 187 is formed. The conductive film 187 is formed by electrically connecting the conductive films 181 provided in adjacent pixels. After that, the mask is removed (see FIG. 10(B)).

[0220] Through the above steps, the transistor 22 and the capacitor 25 can be manufactured. By the above steps, an element substrate having pixels with a higher aperture ratio can be manufactured. Moreover, it is possible to fabricate an FFS mode liquid crystal display device.

[0221] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0222] (Embodiment 4) In this embodiment, the amount of defects in the metal oxide film is smaller than that in the first to third embodiments. A semiconductor device having a transistor capable of further reducing The transistor described in this embodiment has a structure similar to that of the transistors described in the first and second embodiments. In comparison, a multilayer film having a plurality of metal oxide films is provided instead of the metal oxide film. The points are different.

[0223] FIG. 11 shows a transistor of a semiconductor device, which is a point of a dashed line AB and a dashed line CD shown in FIG. FIG. 1 is a cross-sectional view taken along dashed lines AB and CD.

[0224] The transistor 22b shown in FIG. 11A has multilayer films 250a and 250b on the insulating film 106. The multilayer film 250a has a first metal oxide film 251a in contact with the insulating film 106, and a second metal oxide film 252a in contact with the first metal oxide film 251a and the insulating film 119. has.

[0225] The multilayer film 250b provided on the insulating film 106 shown in FIG. 11(A) functions as a capacitance electrode. The multilayer film 250b includes a first metal oxide film 251b in contact with the insulating film 107b, and The first metal oxide film 251b and the second metal oxide film 252b in contact with the insulating film 119 are provided. do.

[0226] The second metal oxide films 252a and 252b are formed by bonding the first metal oxide films 251a and 251b. The first metal oxide film is made up of one or more of the constituent elements. At the interfaces between the metal oxide films 251a and 251b and the second metal oxide films 252a and 252b, Plane scattering is unlikely to occur. Therefore, the movement of carriers is not hindered at the interface, The field effect mobility of the transistor is increased.

[0227] The first metal oxide films 251a, 251b and the second metal oxide films 252a, 252b are Representative examples include In-Ga oxide, In-Zn oxide, and In-M-Zn oxide (M is Al). , Ga, Ti, Y, Zr, La, Ce, or Nd).

[0228] The second metal oxide films 252a and 252b are formed by removing the first metal oxide films 251a and 251b. The energy of the bottom of the conduction band is closer to the vacuum level than 1b, and is typically the second metal oxide. The energy of the bottom of the conduction band of the first metal oxide film 251a, The difference in energy between the bottom of the conduction band of 51b and the .1eV or more, or 0.15eV or more and 2eV or less, 1eV or less, 0.5eV or less , or 0.4 eV or less. That is, the electron affinity of the second metal oxide films 252a and 252b is The difference between the neutralization potential and the electron affinity of the first metal oxide films 251a and 251b is 0.05 eV or less. Above, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less.

[0229] The first metal oxide films 251a, 251b and the second metal oxide films 252a, 252b are By containing In, the carrier mobility (electron mobility) becomes high, which is preferable.

[0230] The second metal oxide films 252a and 252b are made of Al, Ga, Ti, Y, Zr, La, By having Ce or Nd in a higher atomic ratio than In, the following effects may be obtained. (1) The energy gap of the second metal oxide films 252a and 252b is increased. (2) To reduce the electron affinity of the second metal oxide films 252a and 252b. (4) Compared to the first metal oxide films 251a and 251b, the diffusion of impurities from the first metal oxide films 251a and 251b is suppressed. (5) Ga, Y, Zr, La, Ce, or Nd bonds with oxygen. Because it is a strong metallic element, oxygen deficiency is less likely to occur.

[0231] When the first metal oxide films 251a and 251b are In-M-Zn oxides, In and When the sum of In and M is 100 atomic %, the atomic ratio of In to M is preferably I The atomic ratio of n to M is preferably such that In is greater than 25 atomic % and M is greater than 75 atomic %. % or less, more preferably In is greater than 34 atomic % and M is 66 atomic % or less. The concentration must be less than mic%.

[0232] When the second metal oxide films 252a and 252b are In-M-Zn oxides, In and When the sum of In and M is 100 atomic %, the atomic ratio of In to M is preferably I n is less than 50 atomic % and M is greater than 50 atomic %, more preferably Let In be less than 25 atomic% and M be greater than 75 atomic%.

[0233] In addition, the first metal oxide films 251a and 251b and the second metal oxide films 252a and 25 2b is In-M-Zn oxide M (M is Al, Ga, Ti, Y, Zr, La, Ce, or In the case of Nd), the second metal oxide film 251a, 251b is larger than the first metal oxide film 251a, 251b. M (Al, Ga, Ti, Y, Zr, La, Ce, or The atomic ratio of Nd) is large, and typically, the first metal oxide films 251a and 251b include Compared with the above atoms contained in the This is a high atomic ratio.

[0234] In addition, the first metal oxide films 251a and 251b and the second metal oxide films 252a and 25 2b is In-M-Zn oxide (M is Al, Ga, Ti, Y, Zr, La, Ce, or In the case of In:M:Zn=x, the second metal oxide films 252a and 252b are In:M:Zn=x 1 :y 1 :z 1 [Atomic ratio], the first metal oxide films 251a and 251b are In:M:Zn=x 2 : y 2 :z 2 [Atomic ratio], y 1 / x 1 y 2 / x 2 and preferably y 1 / x 1 y 2 / x 2 More preferably, y 1 / x 1 y 2 / x 2 More preferably, y 1 / x 1 y 2 / x 2 More than three times Bigger on top.

[0235] The first metal oxide films 251a and 251b are In-M-Zn oxides (wherein M is Al, Ga, In the case of Ti, Y, Zr, La, Ce, or Nd, the first metal oxide film 251a, 25 In the target used to deposit 1b, the atomic ratio of metal elements is In:M:Zn =x 1 :y 1 :z 1 So, 、 x 1 / y 1 is between 1 / 3 and 6, or between 1 and 6 Where z 1 / y 1 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. In addition, z 1 / y 1 By setting the value of the first metal oxide film 251a, 25 The CAAC-OS film is easily formed as 1b. Representative examples are In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In :M:Zn=3:1:2 etc.

[0236] The second metal oxide films 252a and 252b are In-M-Zn oxides (wherein M is Ga, Y, Z). In the case of the second metal oxide film 252a, 252b, the second metal oxide film 252a is formed. The atomic ratio of the metal elements in the target used for the ion implantation is In:M:Zn=x 2 :y 2 :z 2 So, 、 x 2 / y 2 <x 1 / y 1 Where z 2 / y 2 is between 1 / 3 and 6, More preferably, z is 1 or more and 6 or less. 2 / y 2 Set the value to 1 or more and 6 or less. As a result, CAAC-OS films are easily formed as the second metal oxide films 252a and 252b. A typical example of the atomic ratio of the metal elements in the target is In:M:Zn=1:3:2. , In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M:Zn=1:3 :8 etc.

[0237] The first metal oxide films 251a and 251b and the second metal oxide films 252a and 25 The atomic ratio of 2b is allowed to vary by ±40% from the above atomic ratio as an error. include.

[0238] The second metal oxide films 252a and 252b are used as the first metal oxide films when forming the film that will become the insulating film 119. It also functions as a film for reducing damage to the metal oxide film 251a of No. 1.

[0239] The thickness of the first metal oxide films 251a and 251b is preferably 3 nm or more and 200 nm or less. The thickness is preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less. The thickness of the metal oxide films 252a and 252b is 3 nm or more and 100 nm or less, preferably 3 The thickness should be greater than or equal to 50 nm.

[0240] The first metal oxide films 251a, 251b and the second metal oxide films 252a, 252b are For example, the non-single crystal structure may be a CAAC-OS (C Axis Aligned-Crystalline Oxide Semiconductor uctor), polycrystalline structure, microcrystalline structure (described below), or amorphous structure.

[0241] The first metal oxide films 251a and 251b and the second metal oxide films 252a and 25 In 2b, the amorphous structure region, the microcrystalline structure region, the polycrystalline structure region, and the CAAC-O A mixed film having two or more types of regions of a single crystal structure and a region of a single crystal structure may be formed. For example, amorphous structure regions, microcrystalline structure regions, polycrystalline structure regions, CAAC-OS regions In some cases, the crystal structure may be a single layer structure having two or more regions of either a single crystal structure or a mixed crystal structure. The composite film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC- It may have a layered structure of two or more regions of either an OS region or a single crystal structure region. .

[0242] Here, the second metal oxide film 251a is disposed between the first metal oxide film 251a and the insulating film 119. Therefore, between the second metal oxide film 252a and the insulating film 119 In the present invention, even if carrier traps are formed by impurities and defects, the carrier traps There is a gap between the region where the gap is to be formed and the first metal oxide film 251a. Electrons flowing through the first metal oxide film 251a are less likely to be captured by carrier traps, and the It is possible to increase the on-current of the transistor 22b and to enhance the field effect mobility. In addition, when an electron is captured in a carrier trap, the electron becomes a negative fixed charge. As a result, the threshold voltage of the transistor varies. There is a gap between the first metal oxide film 251a and the region where the carrier traps are formed. Therefore, it is possible to suppress the capture of electrons in the carrier traps, and the threshold voltage Pressure fluctuations can be reduced.

[0243] In addition, the second metal oxide film 252a can block impurities from the outside. Therefore, it is possible to reduce the amount of impurities that move from the outside to the first metal oxide film 251a. In addition, oxygen vacancies are unlikely to form in the second metal oxide film 252a. It is possible to reduce the impurity concentration and the amount of oxygen vacancies in the first metal oxide film 251a. be.

[0244] The first metal oxide films 251a and 251b and the second metal oxide films 252a and 25 2b is a continuous junction (here, the energy of the lower end of the conduction band is particularly low) rather than a simple stacking of each film. The structure is such that the thickness of each film changes continuously. At the interface, the first metal oxide films 251a and 251b are trap centers or recombination centers. Impurities that form barriers that impede the flow of carriers, such as defects The laminated structure is such that no metal oxide film exists. If impurities are present between the first metal oxide film 51b and the second metal oxide film 252a, 252b, The continuity of the energy band is lost, and carriers are trapped or recombined at the interface, It disappears.

[0245] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without exposing it to the air. Each chamber in the sputtering device is indispensable for the metal oxide film. A vacuum pump of the adsorption type, such as a cryopump, is used to remove as much pure water as possible. High vacuum pumping (5×10 -7 Pa~1×10 -4 It is preferable to use a temperature of up to about 1 Pa. Alternatively, a turbo molecular pump and cold trap can be combined to evacuate the chamber from the exhaust system. It is preferable to prevent gas, especially gas containing carbon or hydrogen, from flowing back into the .

[0246] As shown in FIG. 11B, the transistor 22c has a multilayer film 255a. Alternatively, the multilayer film 255b may be provided as a capacitive electrode.

[0247] The multilayer film 255a includes a third metal oxide film 253a, a first metal oxide film 251a, and A second metal oxide film 252a is laminated in this order. A third metal oxide film 253a The first metal oxide film 252a is in contact with the insulating film 106, the second metal oxide film 252b is in contact with the insulating film 119, and the first metal oxide film 252c is in contact with the insulating film 119. The oxide film 251a functions as a channel region.

[0248] The multilayer film 255b includes a third metal oxide film 253b, a first metal oxide film 251b, and A second metal oxide film 252b is laminated in this order. A third metal oxide film 253b is laminated in this order. The second metal oxide film 252b is in contact with the insulating film 106, and the second metal oxide film 252b is in contact with the insulating film 119.

[0249] The third metal oxide films 253a and 153b are formed in a layer similar to the second metal oxide films 252a and 252b. Similar materials and formation methods can be used as appropriate.

[0250] The third metal oxide films 253a and 153b are thicker than the first metal oxide films 251a and 251b. It is preferable that the thickness of the third metal oxide films 253a and 153b is set to 1 nm or more. By making the thickness 5 nm or less, preferably 1 nm to 3 nm, the threshold voltage of the transistor can be reduced. It is possible to reduce the amount of pressure fluctuation.

[0251] The transistor described in this embodiment has an insulating film 106 and a first metal oxide film 251a. The third metal oxide film 253a is provided between the first metal oxide film 251 and the second metal oxide film 252. A second metal oxide film 252a is provided between the insulating film 119 and the second metal oxide film 252b. Therefore, the insulating film 106 and the first metal oxide film 251a and the first metal oxide film 25 Carrier traps are formed between 1a and the insulating film 119 due to impurities and defects. However, there is a gap between the region where the carrier traps are formed and the first metal oxide film 251a. As a result, the electrons flowing through the first metal oxide film 251a are trapped in the carrier traps. Therefore, the on-current of the transistor 22c can be increased. When electrons are captured in the carrier traps, As a result, the threshold voltage of the transistor However, the first metal oxide film 251a and the carrier trap are formed. The gap between the regions where the carriers are formed reduces the capture of electrons in the carrier traps. This can reduce the variation in the threshold voltage of the transistor 22c. .

[0252] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0253] (Embodiment 5) In this embodiment, the on-current is large, the field effect mobility is high, and the variation in electrical characteristics is small. A method for manufacturing a small number of transistors and capacitors by reducing the number of photomasks is described. 14 and 15. In this embodiment, the transistor shown in the second embodiment is used. Although the present embodiment will be described using a transistor and a manufacturing method thereof, the present embodiment can be applied to other embodiments as appropriate. Moreover, the description of the configuration that overlaps with the second embodiment will be omitted.

[0254] FIG. 14 is a top view of the pixel 13, and FIG. 15(A) shows the area between the dashed lines AB and CD in FIG. 15(A) is a cross-sectional view taken along dashed line EF in FIG. 14, and FIG. 15(B) is a cross-sectional view taken along dashed line EF in FIG.

[0255] The transistor 22d is provided in a region where the scanning line and the signal line intersect. The gate electrode 22d includes a conductive film 103 functioning as a gate electrode, a gate insulating film (not shown in FIG. 15), ), a metal oxide film 109a in which a channel region is formed on the gate insulating film, Conductive films 114 and 115 functioning as source and drain electrodes, and a metal oxide film 109 a, an insulating film (not shown in FIG. 15) covering the conductive films 114 and 115, and a gate electrode The transistor 22d is formed by the conductive film 243 that functions as a gate electrode. The conductive film 103 and the conductive film 243 functioning as a gate electrode are connected to each other. do.

[0256] Next, the cross-sectional structure of the transistor 22d will be described with reference to FIG. 15(B) is a cross-sectional view of the transistor 22d in the channel length direction, and FIG. FIG. 22d is a cross-sectional view in the channel direction.

[0257] The transistor 22d shown in FIGS. 15A and 15B is a channel-etched transistor. A conductive film 103 functioning as a gate electrode is provided on a substrate 101. An insulating film 105 in contact with the plate 101 and the conductive film 103, and an insulating film 106 in contact with the insulating film 105 A metal oxide film 109a overlapping the conductive film 103 with the insulating films 105 and 106 interposed therebetween, and a gold The insulating film 105 and the conductive films 114 and 115 are in contact with the metal oxide film 109a. The insulating film 119 contacting the insulating film 106, the metal oxide film 109a, and the conductive films 114 and 115. 1, an insulating film 121 is in contact with the insulating film 119, and a gate electrode is in contact with the insulating film 121. The insulating film 105 and the insulating film 106 function as gate insulating films. The insulating films 119 and 121 function as gate insulating films.

[0258] As shown in FIG. 15B, the conductive film 103 and the conductive film 243 are 106, the insulating film 119, and the insulating film 121 are provided with an opening 241 for connection. In addition, in the channel width direction of the transistor, the end of the conductive film 243 is The insulating film 119 and the insulating film 121 are disposed on the outer side of the end of the metal oxide film 109a. The side surface of the oxide film 109a faces the conductive film 243. , it faces the side surface of the metal oxide film 109a.

[0259] The conductive film 243 is formed using a material and a method similar to those of the conductive films 123 and 124. The opening 241 can be formed at the same time as the opening 152 is formed. As a result, five photomasks can be used without increasing the number of photomasks. This can be used to fabricate transistor 22d.

[0260] In FIG. 15B, the metal oxide film 109 The side surface of the conductive film 103 a faces the conductive film 243 that functions as a gate electrode. The electric field of the conductive film 243 affects not only the plane of the metal oxide film 109a but also the side surface. As a result, the region in which carriers flow in the metal oxide film 109a is separated from the insulating film 106 and the metal The metal oxide film 109a and the metal oxide film 109a and the insulating film 119 are the only interfaces between the metal oxide film 109a and the insulating film 119. Since the area is wide and includes the inside of the metal oxide film 109a, the As a result, the on-current of the transistor increases and the electric field The field effect mobility is high, typically 10 cm 2 / V s or more, and even 20cm 2 / V s or more. The L length of the transistor is set to 0.5 μm or more and 6.5 μm or more. By setting the thickness to be preferably greater than 1 μm and less than 6 μm, the increase in field effect mobility becomes noticeable. Author.

[0261] In addition, at the end of the metal oxide film 109a processed by etching or the like, Damage from this causes defects, and the material is contaminated by impurities. One of the conductive film 103 and the conductive film 243 which functions as a gate electrode of a transistor If only the metal oxide film 109a is formed, the electric field By applying such a stress, the end of the metal oxide film 109a is activated, and n In addition, the n-type region is likely to be a low-resistance region. If the n-type region is placed linearly between the n-type and n-type regions, the n-type region becomes a carrier path, resulting in a parasitic channel. As a result, the rise in drain current at the threshold voltage is gradual, In addition, the threshold voltage of the transistor is shifted negatively. As shown in FIG. 15(B), the conductive film 103 and the conductive film 243 are at the same potential, and the channel In the width direction, the conductive film 243 faces the side surface of the metal oxide film 109a, so that the conductive film 243 The electric field of the film 243 also affects the side surface of the metal oxide film 109a. The occurrence of a parasitic channel at the side surface of the 09a or at the end including the side surface and its vicinity is suppressed. As a result, the drain current increases sharply at the threshold voltage, resulting in excellent electrical characteristics. This results in a highly efficient transistor.

[0262] In addition, the conductive film 103 and the conductive film 243 each block an electric field from the outside. In order to have a shielding function, a conductive film 243 is provided between the substrate 101 and the conductive film 243 and on the conductive film 243. As a result, the fixed charges generated by the metal oxide film 109a do not affect the metal oxide film 109a. Apply a negative potential to the gate electrode - GBT (Gate Bias-Temperature Transistor) The degradation of the drain current at different drain voltages is suppressed. Fluctuations in the start-up voltage of the current can be suppressed.

[0263] The BT stress test is a type of accelerated test that detects the transitions that occur during long-term use. It is possible to evaluate the characteristic changes (i.e., aging) of the transistor in a short time. The amount of change in the threshold voltage of a transistor before and after stress testing is used to examine reliability. This is an important indicator. The smaller the change in threshold voltage before and after the BT stress test, the Therefore, it can be said that this is a highly reliable transistor.

[0264] In FIG. 15B, one side of the metal oxide film 109a in the channel width direction An opening is provided on the side surface of the conductive film 103 and the conductive film 243 are electrically connected through the opening. An opening is also provided on the other side of the substrate, and the conductive film 103 and the conductive As a result, an increase in the resistance value of the conductive film 243 can be prevented. At the same time, the electric field of the conductive film 243 is applied to both sides of the metal oxide film 109a. It is possible to affect the dielectric film 109a, thereby increasing the on-current of the transistor. In addition, the field effect mobility can be increased.

[0265] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0266] (Embodiment 6) A driver circuit is formed using the transistor and the capacitor described in any of Embodiments 1 to 5. It can be made.

[0267] The transistor 22d described in Embodiment 4 has a large on-state current and high mobility. For this reason, circuits that are made up of transistors that need to pass a large current, such as buffers, By using the transistor 22d, the channel length and the channel width can be reduced. This allows the area of ​​the transistor to be reduced. As a result, the area of ​​the driver circuit can be reduced. In a semiconductor device having a driving circuit in the peripheral portion, typically a display device, By reducing the area of ​​the operating circuit, the area of ​​the pixel portion in the display device can be increased. That is, it is possible to narrow the frame of the display device.

[0268] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0269] (Embodiment 7) In this embodiment, a display module to which the semiconductor device of one embodiment of the present invention is applied will be described. The explanation will be given with reference to FIG.

[0270] The display module 8000 shown in FIG. 16 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003, A display panel 8006, a backlight unit 8007, a frame 8009, a printed circuit board The backlight unit 8007, the battery 8011, and the LCD panel 8012 are also included. The telly 8011, the touch panel 8004, etc. may not be provided.

[0271] The semiconductor device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0272] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 8006.

[0273] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide a touch panel function to the display panel. It is also possible to provide an optical sensor in each pixel of the 8006 to make it into an optical touch panel. Alternatively, a touch sensor electrode may be provided in each pixel of the display panel 8006 to realize a capacitive touch sensor. It is also possible to use it as a touch panel.

[0274] The backlight unit 8007 includes a light source 8008. Alternatively, the light diffusing plate may be provided at the end of the light receiving unit 8007.

[0275] The frame 8009 protects the display panel 8006 and also supports the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 8009 may also function as a heat sink.

[0276] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. 1 can be omitted if commercial power is used.

[0277] The display module 8000 also includes components such as a polarizing plate, a retardation plate, and a prism sheet. Additional ones may be provided.

[0278] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0279] (Embodiment 8) In this embodiment, the semiconductor device described in the above embodiment is used as an example of a semiconductor device. The electronic devices that can be mounted will be described.

[0280] As an example of electronic equipment, a television device (also called a television or television receiver) (hereinafter referred to as "computer monitors"), digital cameras, digital video cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable game machines, Examples include portable information terminals, audio playback devices, and large game machines such as pachinko machines. A specific example of such an electronic device is shown in FIG.

[0281] FIG. 12A shows an example of a television device. The television device 7100 is A display unit 7103 is incorporated in the housing 7101. The display unit 7103 displays an image. The display device described in the above embodiment can be used for the display portion 7103. In this embodiment, the housing 7101 is supported by a stand 7105. It shows.

[0282] The television device 7100 can be operated using an operation switch provided on the housing 7101 or a separate remote control. This can be done by the remote controller 7110. The operation keys 7109 can be used to operate the channel and the volume. 03. The remote controller 7110 can also be used to control the images displayed on the A display unit 7107 for displaying information output from the remote controller is provided. You may do so.

[0283] The television device 7100 includes a receiver, a modem, and the like. This allows reception of general television broadcasts, and can also be used for wired or wireless reception via a modem. By connecting to a network, communication can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between sender and receiver, or between receivers). .

[0284] FIG. 12B shows a computer, which includes a main body 7201, a housing 7202, a display unit 7203, Including a keyboard 7204, an external connection port 7205, a pointing device 7206, etc. Note that the computer uses the display device described in the above embodiment mode as the display portion 7203. It is possible.

[0285] FIG. 12C shows a portable game machine that is composed of two housings, a housing 7301 and a housing 7302. The housing 7301 is connected to the connector 7303 so as to be openable and closable. A display portion 7305 is incorporated in the housing 7302. The portable game machine shown in FIG. 12C also includes a speaker unit 7306 and a recording medium insertion unit 73 07, LED lamp 7308, input means (operation keys 7309, connection terminal 7310, sensor 7311 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature , chemicals, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, (including functions for measuring vibration, odor, or infrared rays), microphone 7312) Of course, the configuration of the portable gaming machine is not limited to the above, and at least The display device described in the above embodiment may be used for both or either of the display portion 7304 and the display portion 7305. The above-mentioned equipment may be used, and other auxiliary equipment may be appropriately provided. The portable gaming machine shown in 2(C) reads the programs or data recorded on the recording medium. It also has the function of displaying the information on the display screen and wirelessly communicating with other portable gaming machines. The functions of the portable gaming machine shown in FIG. 12(C) are not limited to these. , can have a variety of functions.

[0286] FIG. 12D shows an example of a mobile phone. A mobile phone 7400 includes a housing 740. In addition to the display unit 7402 incorporated in the 1, the operation buttons 7403, the external connection port 7404, The mobile phone 7400 is equipped with a speaker 7405, a microphone 7406, and the like. The display device described in the above embodiment mode is used for the display portion 7402 .

[0287] In a mobile phone 7400 shown in FIG. 12D, when the display portion 7402 is touched with a finger or the like, You can enter information, make calls, write emails, and perform other operations. This can be done by touching the display portion 7402 with a finger or the like.

[0288] The screen of the display unit 7402 has three main modes. The first is a mode that mainly displays images. The first mode is a display mode, the second is an input mode for inputting information such as characters, and the third mode is a display mode. This is a display + input mode that combines the display mode and the input mode.

[0289] For example, when making a call or composing an e-mail, the display unit 7402 is used for inputting characters. The main input mode is the character input mode, and the input operation of the characters displayed on the screen can be performed. In this case, a keyboard or number buttons can be displayed on most of the screen of the display unit 7402. preferable.

[0290] In addition, a sensor for detecting tilt, such as a gyro or an acceleration sensor, is installed inside the mobile phone 7400. By providing a detection device having the above, the orientation of the mobile phone 7400 (portrait or landscape) can be determined, The screen display on the display portion 7402 can be automatically switched.

[0291] The screen mode can be changed by touching the display portion 7402 or the housing 7401. This is done by operating the operation button 7403. Also, the type of image displayed on the display unit 7402 For example, the image signal to be displayed on the display unit may be changed depending on the type of the image. If it is image data, the mode is switched to display mode, and if it is text data, the mode is switched to input mode.

[0292] In the input mode, the optical sensor of the display unit 7402 detects a signal and displays the If there is no input by touch operation on the display unit 7402 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the display mode to the display mode.

[0293] The display unit 7402 can also function as an image sensor. By touching 402 with a palm or a finger and capturing an image of a palm print, fingerprint, or the like, personal authentication can be performed. In addition, a backlight that emits near-infrared light for the display unit or a sensing device that emits near-infrared light for the display unit By using a light source, it is also possible to image finger veins, palm veins, etc.

[0294] FIG. 12(E) shows an example of a folding computer. The computer 7450 has a housing 7451L and a housing 7451R connected by a hinge 7454. In addition, the operation button 7453, the left speaker 7455L and the right speaker 7 In addition to the 455R, the computer 7450 also has an external connection port 745 (not shown) on the side of the computer 7450. 6. The display unit 7452L is provided on the housing 7451L, and the display unit 7451R is provided on the housing 7451R. When the hinge 7454 is folded so that the display portions 7452R face each other, the display The part can be protected by a housing.

[0295] The display unit 7452L and the display unit 7452R not only display images, but also display information when touched with a finger or the like. For example, you can touch and select an icon that represents an installed program. You can start a program by touching two points on the image with your fingers at different intervals. You can zoom in or out on the image by moving your finger over a point on the displayed image. You can also display an image of a keyboard and use your finger to move the displayed letters and symbols. You can also select and enter information.

[0296] In addition, the computer 7450 is equipped with a gyro, an acceleration sensor, and a GPS (Global Positioning System). It is equipped with a GPS receiver, a fingerprint sensor, and a video camera. For example, a detection device having a sensor for detecting the inclination, such as a gyro or an acceleration sensor, By providing a positioning device, the orientation of the computer 7450 (portrait or landscape) can be determined and the screen to be displayed can be adjusted. You can set it to automatically switch orientation.

[0297] The computer 7450 can also be connected to a network. In addition to being able to display information on the Internet, it can also remotely control other electronic devices connected to the network. It can be used as a terminal to operate from the

[0298] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination. EXAMPLES

[0299] In this example, the lateral diffusion length of a conductive region in a metal oxide film was investigated. Ta.

[0300] First, the structure of the sample will be described.

[0301] FIG. 18(A) shows a top view of the sample, and FIG. 18(A) shows a cross-sectional view corresponding to AB in FIG. 8(B).

[0302] The sample is a substrate 301, an insulating film 303 on the substrate 301, and a metal oxide film on the insulating film 303. A pair of conductive films 307 and 308 in contact with a part of the metal oxide film 305, and a metal oxide an insulating film 309 in contact with each of a part of the oxide film 305 and the pair of conductive films 307 and 308; An insulating film 303, a metal oxide film 305, a pair of conductive films 307 and 308, and an insulating film 309. The insulating film 309 has openings 310a and 310b. In addition, the insulating film 311 is in contact with the metal oxide film 305 in the openings 310a and 310b. Contact.

[0303] Here, a glass substrate was used as the substrate 301 .

[0304] The insulating film 303 is made of a first silicon nitride film having a thickness of 50 nm and a second silicon nitride film having a thickness of 300 nm. A second silicon nitride film having a thickness of 50 nm, a third silicon nitride film having a thickness of 50 nm, and an oxide film having a thickness of 50 nm. A laminated film in which silicon nitride films were laminated in order was used.

[0305] As the metal oxide film 305, an In-Ga-Zn oxide film having a thickness of 35 nm was used. The In-Ga-Zn oxide film is In-Ga-Zn with a ratio of In:Ga:Zn=1:1:1. It was formed by sputtering using an n-oxide target.

[0306] A pair of conductive films 307 and 308 are made of a first titanium film having a thickness of 50 nm and a second titanium film having a thickness of 4 A laminated film consisting of a 100 nm thick aluminum film and a second 100 nm thick titanium film stacked in sequence. was used.

[0307] As the insulating film 309, a silicon oxynitride film having a thickness of 450 nm was used.

[0308] As the insulating film 311, a silicon nitride film having a thickness of 100 nm was used.

[0309] The metal oxide film 305 is formed by immersing the insulating film 309 in the openings 310a and 310b. Therefore, the metal oxide film 305 is in contact with the insulating film 309 and the region 305a. The insulating film 311 has regions 305b and 305c. Since the regions 305b and 305c are made of a silicon nitride film, they are thicker than the region 305a. and has high conductivity.

[0310] The hydrogen contained in the insulating film 311 diffuses laterally in the metal oxide film 305. The region where the ions are diffused becomes highly conductive. , 310b becomes narrower, the conductivity also becomes high in the region 305a, Even if it is in contact with the insulating film 309, it will not function as a channel region of the transistor.

[0311] Therefore, the width of the insulating film 309, that is, the distance d between the openings 310a and 310b, was varied. Next, the potential difference between the pair of conductive films 307 and 308 was set to 0.99 V. A voltage was applied and the resistance value of the entire metal oxide film 305 was measured.

[0312] Table 1 and FIG. 19 show the relationship between the distance d between the openings 310a and 310b and the resistance of the metal oxide film 305. In addition, two samples were prepared as comparative examples. Comparative Example 1 has an opening in the insulating film 309. The sample having no openings 310a and 310b, that is, the metal oxide film 305 is entirely made of silicon oxynitride. The sample in contact with the insulating film 309 formed of a SiO2 film is a comparative example 2. The sample was a sample without the metal oxide film 305, that is, a sample in which the entire metal oxide film 305 was a silicon nitride film and an insulating film 311 were formed. It is a sample that comes into contact with the

[0313] [Table 1]

[0314] From Table 1 and FIG. 19, when the distance d between the openings 310a and 310b exceeds 3 μm, metal oxidation occurs. Since the resistance value of the metal oxide film 305 increases, the highly conductive region of the metal oxide film 305 The lateral diffusion length of the regions 305b and 305c is estimated to be about 1.5 to 2 um per side. can be.

[0315] Therefore, the channel region of the transistor and the electrode of the capacitor are formed in a single metal oxide film. When forming a capacitor, the distance between the channel region of the transistor and the electrode of the capacitor is set to 1.5 μm or less. By making it larger than 2μm, or even 3μm or more, excellent switching performance can be achieved. A transistor having switching characteristics and an electrode of a highly conductive capacitor element are connected to a single metal oxide The insulating film can be formed of a material.

Claims

[Claim 1] forming a gate electrode and a gate insulating film on the insulating surface; forming a first metal oxide film and a first conductive film on the gate insulating film; forming a first mask having a region having a first thickness and a region having a second thickness thicker than the first thickness, and a second mask having the same thickness as the first thickness, on the first conductive film; using the first mask and the second mask, the first conductive film and the first metal oxide film are etched, respectively, to form a second conductive film and a third conductive film, and a second metal oxide film and a third metal oxide film; forming a third mask by processing the first mask and removing the second mask, and then etching the second conductive film using the third mask to form a fourth conductive film and a fifth conductive film functioning as a source electrode and a drain electrode on the second metal oxide film and removing the third conductive film; forming a first insulating film on the second metal oxide film, the fourth conductive film, and the fifth conductive film; forming a second insulating film on the first insulating film and the third metal oxide film; a sixth conductive film that functions as a pixel electrode and that is in contact with the fifth conductive film, and a seventh conductive film that functions as a capacitance line and that is in contact with the third metal oxide film, after etching a part of the first insulating film and the second insulating film to form openings in the first insulating film and the second insulating film.

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