Graphene element, method for manufacturing graphene element, and electronic apparatus

Abstract

To achieve a graphene element having excellent electrical characteristics.SOLUTION: A graphene element 1 includes a graphene layer 30 provided on a surface 10a of a substrate 10. The graphene element 1 includes: electrodes 50, 60 connected to parts 31, 33 on a surface 30a of the graphene layer 30, respectively, the electrodes extending to the surface 10a of the substrate 10; and an aluminum oxide layer 40 covering a part 32 adjacent to the parts 31, 33 on the surface 30a of the graphene layer 30. In the manufacture of the graphene element 1, the graphene layer 30 is patterned using a resist formed on the surface 30a through the aluminum oxide layer 40, so that formation of a resist residue on the surface 30a can be suppressed. The aluminum oxide layer 40 is removed from the parts 31, 33 on the surface 30a and the electrode 50, 60 are connected. A resist residue is prevented from being interposed between the graphene layer 30 and the electrodes 50, 60, so that an increase in contact resistance or the like can be suppressed.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a graphene element, a method for manufacturing a graphene element, and an electronic device. [Background technology]

[0002] A technique is known in which a gate electrode, a gate insulating layer, a source / drain electrode, a graphene layer, and a protective layer are successively formed on a base substrate, the graphene layer and the protective layer are simultaneously etched, and then a planarizing layer having openings leading to the source / drain electrodes is formed (Patent Document 1).

[0003] Also, a technique is known in which a graphene layer having a size of a transistor channel and a protective layer made of a transition metal oxide are formed on an insulating substrate, both ends of the protective layer are etched to form a source electrode and a drain electrode, and then a gate electrode is formed on the protective layer via a gate insulating layer (Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] US Patent Application Publication No. 2014 / 0091280 [Patent Document 2] JP 2013-236017 A Summary of the Invention [Problem to be solved by the invention]

[0005] In a graphene element having a graphene layer that functions as an electron conduction path, an electrode is connected to the graphene layer. For example, a resist is formed on the graphene layer, and the graphene layer is patterned (processed) by etching using the resist as a mask, and an electrode is connected to the graphene layer. However, in this case, a residue of the resist used during the patterning may remain on the graphene layer. If the residue of the resist is present between the graphene layer and the electrode connected thereto, this may cause a deterioration in the electrical properties of the graphene element, such as an increase in contact resistance between the graphene layer and the electrode and a decrease in the electron mobility of the graphene layer.

[0006] In one aspect, the present invention aims to realize a graphene device having excellent electrical properties. [Means for solving the problem]

[0007] In one aspect, there is provided a graphene device including a substrate, a graphene layer provided on a first surface of the substrate, a first electrode connected to a first portion of a second surface of the graphene layer opposite the substrate and extending from the first portion to the first surface of the substrate, and an aluminum oxide layer covering a second portion of the second surface of the graphene layer adjacent to the first portion.

[0008] In another aspect, there is provided a method for manufacturing a graphene element, the method including the steps of forming a graphene layer on a first surface of a substrate; forming an aluminum oxide layer on a second surface of the graphene layer opposite the substrate; removing a portion of the aluminum oxide layer; removing the graphene layer exposed from the aluminum oxide layer remaining after removal; removing the aluminum oxide layer from a first portion of the second surface of the graphene layer remaining after removal and leaving the aluminum oxide in a second portion of the second surface adjacent to the first portion; and forming a first electrode connected to the first portion of the second surface of the graphene layer and extending from the first portion to the first surface of the substrate.

[0009] In another aspect, there is provided an electronic device comprising the graphene device as described above. Effect of the Invention

[0010] In one aspect, it becomes possible to realize graphene devices with excellent electrical properties. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram (part 1) for explaining an example of a method for producing a graphene element. [Diagram 2] FIG. 2 is a diagram (part 2) for explaining an example of a method for producing a graphene element. [Diagram 3] FIG. 2 is a diagram illustrating an example of a graphene element according to the first embodiment. [Figure 4] FIG. 1 is a diagram (part 1) illustrating an example of a method for manufacturing a graphene element according to a first embodiment. [Diagram 5] FIG. 2 is a diagram (part 2) illustrating an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 6] FIG. 4 is a diagram (part 3) illustrating an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 7] FIG. 4 is a diagram (part 4) illustrating an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 8] FIG. 5 is a diagram (part 5) illustrating an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 9] FIG. 6 is a diagram (part 6) illustrating an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 10] FIG. 7 is a diagram (part 7) illustrating an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 11] FIG. 8 is a diagram (part 8) illustrating an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 12] FIG. 9 is a diagram for explaining an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 13] FIG. 10 is a diagram illustrating an example of a method for manufacturing the graphene element according to the first embodiment. [Figure 14] 13A to 13C are diagrams illustrating an example of a graphene element according to a third embodiment. [Figure 15] 13A to 13C are diagrams illustrating an example of a graphene device according to a fourth embodiment. [Figure 16] 13 is a diagram illustrating an example of an electronic device according to a fifth embodiment. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] First, an example of a graphene element and a method for manufacturing the same will be described. 1 and 2 are diagrams for explaining an example of a method for manufacturing a graphene element. Each of Figs. 1(A) to 1(G) shows a schematic plan view of a main part of an example of each step in manufacturing a graphene element. Each of Figs. 2(A) to 2(G) shows a schematic cross-sectional view of a main part of an example of each step in manufacturing a graphene element. Here, Fig. 2(A) is a schematic cross-sectional view taken along IIa-IIa in Fig. 1(A). Fig. 2(B) is a schematic cross-sectional view taken along IIb-IIb in Fig. 1(B). Fig. 2(C) is a schematic cross-sectional view taken along IIc-IIc in Fig. 1(C). Fig. 2(D) is a schematic cross-sectional view taken along IId-IId in Fig. 1(D). Fig. 2(E) is a schematic cross-sectional view taken along IIe-IIe in Fig. 1(E). Fig. 2(F) is a schematic cross-sectional view taken along IIf-IIf in Fig. 1(F). Fig. 2(G) is a schematic cross-sectional view taken along IIg-IIg in Fig. 1(G). For convenience, hatching is also applied to the plan views shown in FIG. 1(A) to FIG. 1(G).

[0013] Here, as an example of a method for manufacturing a graphene element, a method for manufacturing a back-gate type (or bottom-gate type) graphene field effect transistor will be illustrated. First, a substrate 110 as shown in Fig. 1(A) and Fig. 2(A) is prepared. For example, the substrate 110 is a substrate 111 such as a silicon (Si) substrate having a silicon oxide (SiO 21(A) and 2(A), a gate electrode 120 is formed on a surface 110b of the substrate 110 opposite to a surface 110a on which the insulating layer 112 is formed. For example, the gate electrode 120 has a structure in which a titanium (Ti) layer 121 and a gold (Au) layer 122 are laminated in this order from the substrate 110 side.

[0014] 1B and 2B, a graphene layer 130 is formed on the insulating layer 112 on the surface 110a side of the substrate 110. For example, the graphene layer 130 is formed by acetylene (C 2 H 2 ) and methane (CH 4 The graphene is formed by transferring graphene formed using a hydrocarbon such as benzene rings, or graphene synthesized using a condensed polycyclic aromatic hydrocarbon in which a plurality of benzene rings are condensed, onto the insulating layer 112 on the surface 110a side of the substrate 110.

[0015] 1(C) and 2(C), a resist 170 is formed on a surface 130a of the graphene layer 130 opposite to the substrate 110. The resist 170 is formed so as to cover a region of the graphene layer 130 that is to remain as an electron conduction path of the back-gate graphene field effect transistor.

[0016] 1(D) and 2(D), the graphene layer 130 exposed from the resist 170 is removed. For example, etching such as reactive ion etching (RIE) is performed using the resist 170 as a mask, and the graphene layer 130 exposed from the resist 170 is removed.

[0017] Next, as shown in FIG. 1(E) and FIG. 2(E), the resist 170 on the graphene layer 130 is removed. For example, acetone (CH 3 COCH 3 ) is used to remove the resist 170.

[0018] 1(F) and 2(F), a resist 180 is formed on a part of the graphene layer 130 and on a part of the insulating layer 112 exposed after removing the graphene layer 130. The resist 180 is formed so as to have a portion 131 and a portion 133 on the surface 130a of the graphene layer 130 to which a source electrode 150 and a drain electrode 160, which will be described later, are respectively connected, and an opening 181 that leads to the insulating layer 112 on the outside thereof.

[0019] Next, as shown in FIG. 1(G) and FIG. 2(G), a source electrode 150 connected to the portion 131 of the graphene layer 130, and a drain electrode 160 connected to the portion 133 of the graphene layer 130 are formed.

[0020] In this case, for example, in a state where a resist 180 as shown in FIG. 1(F) and FIG. 2(F) is formed, the electrode material of the source electrode 150 and the drain electrode 160 is deposited in the opening 181 of the resist 180 and on the upper surface of the resist 180. Then, the resist 180 is removed together with the electrode material deposited on its upper surface, that is, a so-called lift-off is performed. As a result, the source electrode 150 and the drain electrode 160 as shown in FIG. 1(G) and FIG. 2(G) are formed. For example, the source electrode 150 is formed to have a structure in which a titanium layer 151 and a gold layer 152 are laminated in order from the substrate 110 side. The drain electrode 160 is formed to have a structure in which a titanium layer 161 and a gold layer 162 are laminated in order from the substrate 110 side.

[0021] A graphene element 100 having a configuration as shown in FIGS. 1(G) and 2(G), i.e., a back-gate type graphene field effect transistor, is manufactured by the steps as shown in FIGS. 1(A) to 1(G) and 2(A) to 2(G).

[0022] However, in the above-described method for producing the graphene device 100, the following problems may occur. That is, as shown in FIG. 1(C) and FIG. 2(C), in a step of covering a part of the graphene layer 130 with a resist 170 and removing the graphene layer 130 exposed from the resist 170 by etching such as RIE as shown in FIG. 1(D) and FIG. 2(D), the resist 170 may be hardened by heat during etching. In that case, as shown in FIG. 1(E) and FIG. 2(E), in a step of removing the resist 170 using an organic solvent, a part of the hardened resist 170 may remain as a residue 171 on the graphene layer 130 after etching. For example, the residue 171 of the resist 170 may remain on the part 131 of the graphene layer 130 to which the source electrode 150 is connected and the part 133 to which the drain electrode 160 is connected (FIG. 1(F) and FIG. 2(F) and FIG. 1(G) and FIG. 2(G)). For convenience, an example in which the residue 171 of the resist 170 remains on the part 133 of the graphene layer 130 is shown. Even if an organic solvent heated to about 60° C. is used to remove the resist 170, residues 171 of the resist 170 may remain on the graphene layer 130 after etching.

[0023] For example, in a state where the residue 171 of the resist 170 remains as described above, a lift-off resist 180 as shown in Fig. 1(F) and Fig. 2(F) may be formed, followed by the formation of the source electrode 150 and the drain electrode 160 as shown in Fig. 1(G) and Fig. 2(G). In this case, the residue 171 of the resist 170 as described above may be present between the source electrode 150 and the portion 131 of the graphene layer 130 to which it is connected, or between the drain electrode 160 and the portion 133 of the graphene layer 130 to which it is connected.

[0024] If the residue 171 of the resist 170 is present between the graphene layer 130 and the source electrode 150 or the drain electrode 160, the contact resistance between the graphene layer 130 and the source electrode 150 or the drain electrode 160 may increase. Furthermore, if the residue 171 of the resist 170 is present between the graphene layer 130 and the source electrode 150 or the drain electrode 160, the electron mobility of the graphene layer 130, which serves as an electron conduction path in the graphene device 100, may decrease. The residue 171 of the resist 170 formed on the graphene layer 130 may cause a decrease in the electrical characteristics of the graphene device 100, such as an increase in the contact resistance or a decrease in the electron mobility of the graphene layer 130.

[0025] In view of the above, a graphene element having excellent electrical characteristics is realized using a method as shown in the following embodiment. [First embodiment] Fig. 3 is a diagram illustrating an example of the graphene element according to the first embodiment. Fig. 3 is a schematic cross-sectional view of a main part of the example of the graphene element.

[0026] 3 is an example of a back-gate type graphene field effect transistor. The graphene element 1 includes a substrate 10, a gate electrode 20, a graphene layer 30, an aluminum oxide layer 40, a source electrode 50, and a drain electrode 60.

[0027] The substrate 10 is, for example, a substrate having an insulating layer 12 such as a silicon oxide layer formed on the surface of a base substrate 11 such as a silicon substrate. In addition to a silicon substrate, a sapphire substrate, a diamond substrate, or an SOI (Semiconductor On Insulator) substrate may be used as the base substrate 11. The base substrate 11 may have a single-layer structure or a multilayer structure. The insulating layer 12 on the surface of the base substrate 11 may be, in addition to a silicon oxide layer, a silicon carbide (SiC) layer, a silicon oxide carbide (SiOC) layer, a silicon oxynitride (SiON) layer, a silicon nitride (Si 3 N 4 ) layer, aluminum oxide (Al 2O 3 ) layer, hafnium oxide (HfO 2 ) layer, etc. The insulating layer 12 on the surface of the base substrate 11 may have a single layer structure or a multilayer structure.

[0028] The gate electrode 20 is provided on a surface 10b of the substrate 10 opposite to a surface 10a on which the insulating layer 12 is formed. The gate electrode 20 functions as a back gate electrode of the graphene element 1. For example, the gate electrode 20 has a structure in which a titanium layer 21 and a gold layer 22 are laminated in this order from the substrate 10 side. The thickness of the titanium layer 21 is, for example, 10 nm. The thickness of the gold layer 22 is, for example, 50 nm.

[0029] The graphene layer 30 is provided on the insulating layer 12 on the surface 10a side of the substrate 10. The graphene layer 30 is a layer in which the carbon atoms are sp 2 The graphene layer 30 is a sheet-like material having one layer of atoms arranged in a hexagonal lattice by bonding (also called "single-layer graphene"), or a multi-layer material having a plurality of such sheet-like materials laminated thereon (also called "multi-layer graphene"). For example, the graphene layer 30 is formed by transferring graphene formed using a hydrocarbon such as acetylene or methane, or graphene synthesized using a condensed polycyclic aromatic hydrocarbon in which a plurality of benzene rings are condensed, onto the insulating layer 12 on the surface 10a side of the substrate 10. The transferred graphene layer 30 is patterned into a predetermined shape by etching such as RIE. As a result, the graphene layer 30 functioning as an electron conduction path of the graphene device 1 is provided on the insulating layer 12 on the surface 10a side of the substrate 10, as shown in FIG. 3.

[0030] The source electrode 50 and the drain electrode 60 are provided on the surface 10a side of the substrate 10 so as to be connected to a part of the graphene layer 30. The source electrode 50 is provided, for example, with a structure in which a titanium layer 51 and a gold layer 52 are laminated in this order from the substrate 10 side. The drain electrode 60 is provided, for example, with a structure in which a titanium layer 61 and a gold layer 62 are laminated in this order from the substrate 10 side. The thickness of the titanium layer 51 and the titanium layer 61 is, for example, 10 nm. The thickness of the gold layer 52 and the gold layer 62 is, for example, 50 nm.

[0031] The source electrode 50 is connected to a portion 31 on the surface 30a of the graphene layer 30 opposite the substrate 10, and is provided so as to extend from the portion 31 to the surface 10a of the substrate 10. The drain electrode 60 is connected to a portion 33 on the surface 30a of the graphene layer 30 opposite the substrate 10, and is provided so as to extend from the portion 33 to the surface 10a of the substrate 10. The portion 31 to which the source electrode 50 is connected is a portion on one end side of the graphene layer 30, and the portion 33 to which the drain electrode 60 is connected is a portion on the other end side of the graphene layer 30. A portion 32 between the portion 31 to which the source electrode 50 is connected and the portion 33 to which the drain electrode 60 is connected, i.e., the portion 32 of the graphene layer 30 adjacent to the portion 31 and the portion 33, functions as a channel of the graphene element 1.

[0032] The contact resistance of the connection between the graphene layer 30 and the source electrode 50 and the drain electrode 60 tends to be lower as the number or length of the edge portions of the graphene layer 30 present at the connection portions increases. In the graphene device 1, the source electrode 50 is connected to the portion 31 of the face 30a of the graphene layer 30 and is provided so as to extend from the portion 31 to the face 10a of the substrate 10. Since the source electrode 50 is connected to the portion 31 of the face 30a of the graphene layer 30 as well as to the peripheral edge portion of the portion 31, an increase in the contact resistance between the source electrode 50 and the graphene layer 30 is suppressed compared to a case where the source electrode 50 is not connected to the peripheral edge portion. In the graphene device 1, the drain electrode 60 is connected to the portion 33 of the face 30a of the graphene layer 30 and is provided so as to extend from the portion 33 to the face 10a of the substrate 10. Since the drain electrode 60 is connected to the portion 33 of the face 30a of the graphene layer 30, as well as to the outer peripheral edge portion of the portion 33, an increase in contact resistance between the drain electrode 60 and the graphene layer 30 is suppressed compared to when the drain electrode 60 is not connected to the outer peripheral edge portion.

[0033] The aluminum oxide layer 40 is provided so as to cover the portions 31 at both ends of the surface 30a of the graphene layer 30 and the intermediate portion 32 adjacent to the portion 33. It can also be said that the aluminum oxide layer 40 is provided so as to cover the portion 32 between the source electrode 50 connected to the portion 31 and the drain electrode 60 connected to the portion 33 of the surface 30a of the graphene layer 30. The aluminum oxide layer 40 is set to a thickness such that the stress applied to the graphene layer 30 does not adversely affect the electronic conduction characteristics of the graphene layer 30. The thickness of the aluminum oxide layer 40 is set to, for example, 5 nm. The aluminum oxide layer 40 can be, for example, an ALD layer formed by using an atomic layer deposition (ALD) method. Alternatively, the aluminum oxide layer 40 can be a sputtered layer formed by using a sputtering method. The aluminum oxide layer 40 is provided so as to be exposed to the outer surface of the graphene element 1. The aluminum oxide layer 40 covers the graphene layer 30 and has a function of protecting the graphene layer 30 from the outside air and external forces.

[0034] In the graphene device 1 having the above configuration, during operation, a predetermined voltage is applied between the source electrode 50 and the drain electrode 60, and a predetermined voltage is applied to the gate electrode 20. Due to the field effect caused by the voltage applied to the gate electrode 20, the electrons (current) flowing through the graphene layer 30 between the source electrode 50 and the drain electrode 60 are controlled, and the output current is controlled. In this way, the graphene device 1 realizes a transistor function.

[0035] In the graphene element 1, a portion 32 of the graphene layer 30 between a portion 31 to which the source electrode 50 is connected and a portion 33 to which the drain electrode 60 is connected is covered with an aluminum oxide layer 40. The aluminum oxide layer 40 functions as a protective layer that protects the graphene element 1 and the graphene layer 30 during the manufacturing process thereof, which will be described later. By providing the aluminum oxide layer 40 on the graphene layer 30, the graphene element 1 having excellent electrical properties is realized. This point will be described in detail later.

[0036] In the graphene device 1, a surface 10a of the substrate 10 on which the graphene layer 30 is provided is also referred to as a "first surface." A surface 30a of the graphene layer 30 opposite the substrate 10 is also referred to as a "second surface." A surface 10b of the substrate 10 opposite the surface 10a is also referred to as a "third surface."

[0037] In the graphene element 1, the portion 31 of the graphene layer 30 is also referred to as the "first portion", the portion 32 adjacent to the portion 31 is also referred to as the "second portion", and the portion 33 facing the portion 31 via the portion 32 is also referred to as the "third portion". In this case, the source electrode 50 connected to the portion 31 of the graphene layer 30 is also referred to as the "first electrode", the drain electrode 60 connected to the portion 33 is also referred to as the "second electrode", and the gate electrode 20 provided on the surface 10b side of the substrate 10 is also referred to as the "third electrode".

[0038] Alternatively, in the graphene element 1, the portion 33 of the graphene layer 30 is also referred to as the "first portion", the portion 32 adjacent to the portion 33 is also referred to as the "second portion", and the portion 31 facing the portion 33 via the portion 32 is also referred to as the "third portion". In this case, the drain electrode 60 connected to the portion 33 of the graphene layer 30 is also referred to as the "first electrode", the source electrode 50 connected to the portion 31 is also referred to as the "second electrode", and the gate electrode 20 provided on the surface 10b side of the substrate 10 is also referred to as the "third electrode".

[0039] In addition, the source electrode 50 may simply be referred to as the electrode 50 , and the drain electrode 60 may simply be referred to as the electrode 60 . Next, a method for producing the graphene device 1 having the above configuration will be described.

[0040] Fig. 4 to Fig. 13 are diagrams for explaining an example of a method for manufacturing a graphene element according to the first embodiment. Fig. 4 to Fig. 13 each show an example of each step in manufacturing a graphene element. Each step will be described below in order with reference to Fig. 4 to Fig. 13.

[0041] 4A and 4B are diagrams for explaining an example of a substrate preparation and gate electrode formation process. FIG. 4A is a schematic plan view of a main part of an example of a substrate preparation and gate electrode formation process. FIG. 4B is a schematic cross-sectional view of a main part of an example of a substrate preparation and gate electrode formation process. FIG. 4B is a schematic cross-sectional view taken along line IV-IV of FIG. 4A. For convenience, hatching is also applied to the plan view shown in FIG. 4A.

[0042] First, a substrate 10 as shown in Figures 4(A) and 4(B) is prepared, that is, a substrate 10 having an insulating layer 12 such as a silicon oxide layer formed on the surface of a base substrate 11 such as a silicon substrate. Then, as shown in Figures 4(A) and 4(B), a gate electrode 20 is formed on a surface 10b of the prepared substrate 10 opposite to a surface 10a on which the insulating layer 12 is formed. In this example, a gate electrode 20 is formed having a structure in which a titanium layer 21 having a thickness of 10 nm and a gold layer 22 having a thickness of 50 nm are laminated in this order from the substrate 10 side.

[0043] 5A and 5B are diagrams for explaining an example of a graphene layer forming step. FIG. 5A is a schematic plan view of a main part of an example of the graphene layer forming step. FIG. 5B is a schematic cross-sectional view of a main part of an example of the graphene layer forming step. FIG. 5B is a schematic VV cross-sectional view of FIG. 5A. For convenience, hatching is also added to the plan view shown in FIG. 5A.

[0044] After preparing the substrate 10 and forming the gate electrode 20, as shown in Figures 5(A) and 5(B), a graphene layer 30 is formed on an insulating layer 12 formed on a surface 10a of the substrate 10 opposite to a surface 10b on which the gate electrode 20 is formed. For example, the graphene layer 30 is formed by transferring graphene formed using a hydrocarbon such as acetylene or methane, or graphene synthesized using a condensed polycyclic aromatic hydrocarbon in which a plurality of benzene rings are condensed, onto the insulating layer 12 on the surface 10a of the substrate 10. The graphene layer 30 formed on the substrate 10 may be a single-layer graphene or a multi-layer graphene.

[0045] Fig. 6 is a diagram for explaining an example of an aluminum oxide layer forming step. Fig. 6(A) is a schematic plan view of a main part of an example of an aluminum oxide layer forming step. Fig. 6(B) is a schematic cross-sectional view of a main part of an example of an aluminum oxide layer forming step. Fig. 6(B) is a schematic cross-sectional view taken along line VI-VI of Fig. 6(A). For convenience, hatching is also applied to the plan view shown in Fig. 6(A).

[0046] After the graphene layer 30 is formed, an aluminum oxide layer 40 is formed on a surface 30a of the graphene layer 30 opposite to the substrate 10, as shown in Figures 6(A) and 6(B). For example, the aluminum oxide layer 40 having a thickness of 5 nm is formed on the surface 30a of the graphene layer 30 by using an ALD method. The aluminum oxide layer 40 may be formed on the surface 30a of the graphene layer 30 by using a sputtering method.

[0047] 7A and 7B are diagrams for explaining an example of a patterning resist forming step. FIG. 7A is a schematic plan view of a main part of an example of the patterning resist forming step. FIG. 7B is a schematic cross-sectional view of a main part of an example of the patterning resist forming step. FIG. 7B is a schematic cross-sectional view taken along line VII-VII of FIG. 7A. For convenience, hatching is also applied to the plan view shown in FIG. 7A.

[0048] After the aluminum oxide layer 40 is formed, a resist 70 for patterning (processing) the aluminum oxide layer 40 and the graphene layer 30 is formed in a predetermined region on the aluminum oxide layer 40, as shown in Figures 7(A) and 7(B). The resist 70 is formed in a region on the aluminum oxide layer 40 where the aluminum oxide layer 40 will remain by etching, which will be described later. The resist 70 is formed in a region on the aluminum oxide layer 40 that corresponds to the portions of the graphene layer 30 (the portions 31, 32, and 33 described above and below) that will remain as electron conduction paths in the graphene device 1.

[0049] The resist 70 is formed by photolithography, which involves applying a photosensitive resist material onto the aluminum oxide layer 40, followed by exposure and development. Exposure light such as g-rays, i-rays, ultraviolet rays, and electron beams is used for exposure. A developer such as tetramethylammonium hydroxide (TMAH) is used for development. For example, the photosensitive resist material exposed to a predetermined exposure light is developed for about one minute using a predetermined developer, and the resist 70 having a predetermined pattern shape is formed.

[0050] 8A and 8B are diagrams for explaining an example of an aluminum oxide layer patterning step. FIG. 8A is a schematic plan view of a main part of an example of an aluminum oxide layer patterning step. FIG. 8B is a schematic cross-sectional view of a main part of an example of an aluminum oxide layer patterning step. FIG. 8B is a schematic cross-sectional view taken along line VIII-VIII of FIG. 8A. For convenience, hatching is also applied to the plan view shown in FIG. 8A.

[0051] 8(A) and 8(B), after the resist 70 is formed, etching is performed using the resist 70 as a mask to remove a part of the aluminum oxide layer 40. That is, using the resist 70 as a mask, the aluminum oxide layer 40 exposed from the resist 70 is removed by etching.

[0052] For example, the aluminum oxide layer 40 is removed by wet etching. In this case, a developer such as TMAH used for developing the resist 70 is used as an etching solution for the aluminum oxide layer 40. The aluminum oxide layer 40 is dissolved by such a developer. For example, the aluminum oxide layer 40 exposed from the resist 70 is etched for about 2 minutes and 30 seconds using a predetermined developer. As a result, the aluminum oxide layer 40 patterned as shown in Figures 8(A) and 8(B) is obtained.

[0053] 9A and 9B are diagrams for explaining an example of a graphene layer patterning step. FIG. 9A is a schematic plan view of a main part of an example of the graphene layer patterning step. FIG. 9B is a schematic cross-sectional view of a main part of an example of the graphene layer patterning step. FIG. 9B is a schematic cross-sectional view taken along line IX-IX of FIG. 9A. For convenience, hatching is also applied to the plan view shown in FIG. 9A.

[0054] After a portion of the aluminum oxide layer 40 is removed using the resist 70 as a mask, a portion of the graphene layer 30 is removed by etching using the resist 70 and the aluminum oxide layer 40 formed by etching using the resist 70 as a mask as shown in Figures 9(A) and 9(B) . That is, using the resist 70 and the aluminum oxide layer 40 remaining thereunder as a mask, the graphene layer 30 exposed from the aluminum oxide layer 40 is removed by etching.

[0055] The graphene layer 30 exposed from the aluminum oxide layer 40 is removed by dry etching. For example, the graphene layer 30 exposed from the aluminum oxide layer 40 is removed by RIE using the resist 70 and the aluminum oxide layer 40 as a mask. As a result, the graphene layer 30 patterned as shown in Figures 9(A) and 9(B) is obtained.

[0056] When removing (patterning) a portion of the graphene layer 30 by dry etching such as RIE, the resist 70 on the aluminum oxide layer 40 may harden. Fig. 10 is a diagram for explaining an example of a patterning resist removal process. Fig. 10(A) shows a schematic plan view of a main part of an example of a patterning resist removal process. Fig. 10(B) shows a schematic cross-sectional view of a main part of an example of a patterning resist removal process. Fig. 10(B) is a schematic cross-sectional view taken along line XX in Fig. 10(A). For convenience, the plan view shown in Fig. 10(A) is also hatched.

[0057] After removing a portion of the graphene layer 30 using the resist 70 and the aluminum oxide layer 40 as a mask, the resist 70 is removed as shown in Figure 10(A) and Figure 10(B) . For example, an organic solvent such as acetone is used to remove the resist 70 from the aluminum oxide layer 40.

[0058] As described above, if the resist 70 is hardened when a portion of the graphene layer 30 is removed, residue 71 of the resist 70 may remain on the aluminum oxide layer 40 when the resist 70 is removed using such an organic solvent. On the other hand, the graphene layer 30 is covered with the aluminum oxide layer 40 and is not in contact with the resist 70. That is, in this method for manufacturing the graphene element 1, the graphene layer 30 and the resist 70 used for patterning the graphene layer 30 are separated by the aluminum oxide layer 40 interposed therebetween. Therefore, even if residue 71 of the resist 70 remains, the residue 71 may remain on the aluminum oxide layer 40, but is prevented from remaining on the graphene layer 30 (its surface 30a).

[0059] FIG. 11 is a diagram for explaining an example of a lift-off resist forming step. FIG. 11(A) is a schematic plan view of a main part of an example of the lift-off resist forming step. FIG. 11(B) is a schematic cross-sectional view of a main part of an example of the lift-off resist forming step. FIG. 11(B) is a schematic cross-sectional view taken along line XI-XI of FIG. 11(A). For convenience, hatching is also applied to the plan view shown in FIG. 11(A).

[0060] 11(A) and 11(B), after removing the resist 70, a lift-off resist 80 is formed on a part of the graphene layer 30 and on a part of the insulating layer 12 exposed after removing the graphene layer 30. The resist 80 is formed so as to have an aluminum oxide layer 40 covering a portion 31 and a portion 33 of the surface 30a of the graphene layer 30 to which a source electrode 50 and a drain electrode 60, which will be described later, are respectively connected, and an opening 81 leading to the insulating layer 12 on the outside thereof.

[0061] The resist 80 is formed by photolithography, in which a photosensitive resist material is applied to the surface 10a side of the substrate 10, and then exposed and developed. Exposure light such as g-rays, i-rays, ultraviolet rays, and electron beams is used for exposure. A developer such as TMAH is used for development. For example, the photosensitive resist material exposed to a predetermined exposure light is developed for about one minute using a predetermined developer to form the resist 80 having a predetermined pattern shape.

[0062] Fig. 12 is a diagram for explaining an example of the exposed aluminum oxide layer removal step. Fig. 12(A) is a schematic plan view of a main part of an example of the exposed aluminum oxide layer removal step. Fig. 12(B) is a schematic cross-sectional view of a main part of an example of the exposed aluminum oxide layer removal step. Fig. 12(B) is a schematic cross-sectional view taken along line XII-XII of Fig. 12(A). For convenience, hatching is also applied to the plan view shown in Fig. 12(A).

[0063] 12(A) and 12(B), after the resist 80 is formed, etching is performed using the resist 80 as a mask, and the aluminum oxide layer 40 exposed in the opening 81 is removed. That is, the aluminum oxide layer 40 covering the portion 31 and the portion 33 of the surface 30a of the graphene layer 30 is removed by etching using the resist 80 as a mask.

[0064] For example, the aluminum oxide layer 40 is removed by wet etching. In this case, a developer such as TMAH used for developing the resist 80 is used as an etching solution for the aluminum oxide layer 40. The aluminum oxide layer 40 is dissolved by such a developer. For example, the aluminum oxide layer 40 exposed from the resist 80 is etched for about 2 minutes and 30 seconds using a predetermined developer. This results in a state as shown in FIG. 12(A) and FIG. 12(B), that is, a state in which the aluminum oxide layer 40 is removed from the portion 31 and the portion 33 of the surface 30a of the graphene layer 30 and the aluminum oxide layer 40 remains in the portion 32 between them.

[0065] As described above, residues 71 of the resist 70 used in patterning the graphene layer 30 may remain on the aluminum oxide layer 40. Meanwhile, in the method for manufacturing the graphene element 1, the aluminum oxide layer 40 covering the portions 31 and 33 of the surface 30a of the graphene layer 30 is removed by etching. Therefore, even if residues 71 of the resist 70 remain on the aluminum oxide layer 40 covering the portions 31 and 33, the residues are removed from the portions 31 and 33 together with the aluminum oxide layer 40.

[0066] Fig. 13 is a diagram for explaining an example of a source electrode and drain electrode forming step. Fig. 13(A) is a schematic plan view of a main part of an example of a source electrode and drain electrode forming step. Fig. 13(B) is a schematic cross-sectional view of a main part of an example of a source electrode and drain electrode forming step. Fig. 13(B) is a schematic cross-sectional view taken along line XIII-XIII in Fig. 13(A). For convenience, hatching is also applied to the plan view shown in Fig. 13(A).

[0067] After removing a portion of the aluminum oxide layer 40 using the resist 80 as a mask, a source electrode 50 and a drain electrode 60 are formed so as to be connected to portions 31 and 33, respectively, of the surface 30a of the graphene layer 30 exposed by the removal.

[0068] For example, in a state where a resist 80 as shown in FIG. 12(A) and FIG. 12(B) is formed, the electrode material of the source electrode 50 and the drain electrode 60 is deposited in the opening 81 of the resist 80 and on the upper surface of the resist 80. Then, lift-off is performed to remove the resist 80 together with the electrode material deposited on its upper surface. This forms the source electrode 50 and the drain electrode 60 as shown in FIG. 13(A) and FIG. 13(B). In this example, the source electrode 50 is formed having a structure in which a titanium layer 51 having a thickness of 10 nm and a gold layer 52 having a thickness of 50 nm are laminated in this order from the substrate 10 side. The drain electrode 60 is formed having a structure in which a titanium layer 61 having a thickness of 10 nm and a gold layer 62 having a thickness of 50 nm are laminated in this order from the substrate 10 side.

[0069] The contact resistance of the connection between the graphene layer 30 and the source electrode 50 and drain electrode 60 tends to be lower as the number of edges of the graphene layer 30 present at the connection is increased or the length of the edges is increased. Therefore, in the graphene device 1, a resist 80 having openings 81 leading to the portions 31 and 33 of the graphene layer 30 and the insulating layer 12 outside them is used to form the source electrode 50 and the drain electrode 60. The source electrode 50 is connected to the portion 31 of the surface 30a of the graphene layer 30 and is provided so as to extend from the portion 31 to the surface 10a of the substrate 10 (on the insulating layer 12). The drain electrode 60 is connected to the portion 33 of the surface 30a of the graphene layer 30 and is provided so as to extend from the portion 33 to the surface 10a of the substrate 10 (on the insulating layer 12).

[0070] As a result, the source electrode 50 is connected to the portion 31 of the surface 30a of the graphene layer 30 and the outer peripheral edge portion of the portion 31. Therefore, an increase in contact resistance between the source electrode 50 and the graphene layer 30 is suppressed compared to a case where the source electrode 50 is connected only to the portion 31 of the graphene layer 30 and not connected to the outer peripheral edge portion. Also, the drain electrode 60 is connected to the portion 33 of the surface 30a of the graphene layer 30 and the outer peripheral edge portion of the portion 33. Therefore, an increase in contact resistance between the drain electrode 60 and the graphene layer 30 is suppressed compared to a case where the drain electrode 60 is connected only to the portion 33 of the graphene layer 30 and not connected to the outer peripheral edge portion.

[0071] Through the steps described above, a graphene device 1 having the configuration shown in FIGS. 13(A) and 13(B) (and FIG. 3) is manufactured. The graphene device 1 has a configuration in which a portion 32 of a surface 30a of the graphene layer 30 between a portion 31 to which a source electrode 50 is connected and a portion 33 to which a drain electrode 60 is connected is covered with an aluminum oxide layer 40.

[0072] Here, in the manufacturing process of the graphene device 1, the graphene layer 30 is transferred onto the substrate 10 (FIG. 5), and then patterned into a predetermined shape by dry etching such as RIE using the resist 70 as a mask (FIGS. 6 to 10). During this dry etching, an aluminum oxide layer 40 is formed on the graphene layer 30 (FIG. 6), and a resist 70 is formed on the aluminum oxide layer 40 (FIG. 7). Then, the aluminum oxide layer 40 is etched using the resist 70 as a mask (FIG. 8), and the graphene layer 30 is etched using the resist 70 and the aluminum oxide layer 40 after etching as a mask (FIG. 9). Therefore, the graphene layer 30 and the resist 70 used for the patterning are separated by the aluminum oxide layer 40, and the graphene layer 30 is prevented from being dry etched in a state where it is in contact with the resist 70. Therefore, when the resist 70 is removed (FIG. 10), a part of the resist 70 hardened during the dry etching is prevented from remaining as a residue 71 on the graphene layer 30.

[0073] Residues 71 of the resist 70 may remain on the aluminum oxide layer 40. However, the residues 71 of the resist 70 that may be formed on the aluminum oxide layer 40 covering the portions 31 and 33 of the surface 30a of the graphene layer 30 are removed together with the aluminum oxide layer 40 when the aluminum oxide layer 40 is removed from the portions 31 and 33 (FIGS. 11 and 12). Then, a source electrode 50 and a drain electrode 60 are connected to the portions 31 and 33 of the surface 30a of the graphene layer 30 that are exposed after the aluminum oxide layer 40 is removed, respectively (FIG. 13).

[0074] In the graphene element 1, the residue 71 of the resist 70 is prevented from remaining at the portion 31 and the portion 33 of the surface 30a of the graphene layer 30. Thus, the residue 71 of the resist 70 is prevented from being interposed between the portion 31 of the graphene layer 30 and the source electrode 50 connected thereto, and an increase in the contact resistance between the graphene layer 30 and the source electrode 50 is prevented. In addition, the residue 71 of the resist 70 is prevented from being interposed between the portion 33 of the graphene layer 30 and the drain electrode 60 connected thereto, and an increase in the contact resistance between the graphene layer 30 and the drain electrode 60 is prevented. Furthermore, the source electrode 50 and the drain electrode 60 are provided so as to extend from the portion 31 and the portion 33 of the surface 30a of the graphene layer 30 to the surface 10a of the substrate 10, respectively, and are thereby connected to the outer peripheral edge portion of the graphene layer 30, thereby further preventing an increase in the contact resistance. By suppressing an increase in the contact resistance between the source electrode 50 and the drain electrode 60, a decrease in the electron mobility of the graphene layer 30 in the graphene device 1 is suppressed, and high electron conductivity characteristics of the graphene layer 30 are exhibited. Therefore, the graphene device 1 having excellent electrical characteristics is realized.

[0075] [Second embodiment] Here, a modified example of the method for manufacturing the graphene device 1 having the above configuration will be described as the second embodiment.

[0076] In the manufacturing method described in the first embodiment, after a resist 70 is formed as shown in Figures 7(A) and 7(B), a part of the aluminum oxide layer 40 is removed by wet etching as shown in Figures 8(A) and 8(B), and then a part of the graphene layer 30 is removed by dry etching such as RIE as shown in Figures 9(A) and 9(B).

[0077] In contrast, in the manufacturing method of the second embodiment, the partial removal of the aluminum oxide layer 40 shown in Figures 8(A) and 8(B) is performed by dry etching such as RIE, similar to the partial removal of the graphene layer 30 shown in Figures 9(A) and 9(B). That is, in the manufacturing method of the second embodiment, after a resist 70 is formed as shown in Figures 7(A) and 7(B), a part of the aluminum oxide layer 40 and a part of the graphene layer 30 are successively or simultaneously removed by dry etching such as RIE using the resist 70 as a mask.

[0078] 8(A) and 8(B) is performed by dry etching such as RIE, thereby reducing side etching of the aluminum oxide layer 40 compared to the case of performing wet etching using TMAH or the like. This improves the pattern accuracy of the graphene layer 30 that is etched using the resist 70 and the etched aluminum oxide layer 40 as a mask, thereby achieving a high-quality graphene device 1.

[0079] [Third embodiment] Fig. 14 is a diagram for explaining an example of a graphene element according to the third embodiment. Fig. 14(A) is a schematic plan view of a main part of an example of the graphene element. Fig. 14(B) is a schematic cross-sectional view of a main part of an example of the graphene element. Fig. 14(B) is a schematic cross-sectional view taken along line XIV-XIV of Fig. 14(A). For convenience, hatching is also applied to the plan view shown in Fig. 14(A).

[0080] The graphene device 1A shown in FIG. 14(A) and FIG. 14(B) is an example of a top-gate graphene field-effect transistor. In the graphene device 1A, a graphene layer 30, and a source electrode 50 and a drain electrode 60 connected to a portion 31 and a portion 33 of the surface 30a, respectively, are provided on the surface 10a side of the substrate 10 on which the insulating layer 12 is provided. In the graphene device 1A, a portion 32 of the surface 30a of the graphene layer 30 between the source electrode 50 and the drain electrode 60 is covered with an aluminum oxide layer 40, and a gate electrode 20A is provided so as to face the portion 32 via the aluminum oxide layer 40. In the graphene device 1A, the aluminum oxide layer 40 that protects the graphene layer 30 functions as a gate insulating layer interposed between the graphene layer 30 that becomes an electron conduction path (channel) and the gate electrode 20A that applies an electric field thereto.

[0081] The graphene element 1A can be manufactured according to the example of the manufacturing method described in the first embodiment. That is, a substrate 10 having no back gate electrode on the surface 10b side is used, and the steps shown in Figs. 5(A) and 5(B) to 13(A) and 13(B) are carried out. Then, a gate electrode 20A is formed on the aluminum oxide layer 40 covering the graphene layer 30. As a result, a graphene element 1A as shown in Figs. 14(A) and 14(B) is manufactured.

[0082] The techniques described in the first and second embodiments above can also be adopted for manufacturing the graphene device 1A described in this third embodiment, thereby obtaining the same effects as those described in the first and second embodiments above.

[0083] In the graphene device 1A, the surface 10a of the substrate 10 is also referred to as a "first surface." The surface 30a of the graphene layer 30 is also referred to as a "second surface." In addition, in the graphene element 1A, the portion 31 of the graphene layer 30 is also referred to as the “first portion,” the portion 32 is also referred to as the “second portion,” and the portion 33 is also referred to as the “third portion.” In this case, the source electrode 50 connected to the portion 31 is also referred to as the “first electrode,” and the drain electrode 60 connected to the portion 33 is also referred to as the “second electrode.”

[0084] Alternatively, in the graphene element 1A, the portion 33 of the graphene layer 30 is also referred to as the “first portion,” the portion 32 is also referred to as the “second portion,” and the portion 31 is also referred to as the “third portion.” In this case, the drain electrode 60 connected to the portion 33 is also referred to as the “first electrode,” and the source electrode 50 connected to the portion 31 is also referred to as the “second electrode.”

[0085] In addition, the source electrode 50 may simply be referred to as the electrode 50 , and the drain electrode 60 may simply be referred to as the electrode 60 . [Fourth embodiment] Fig. 15 is a diagram for explaining an example of a graphene element according to the fourth embodiment. Fig. 15(A) is a schematic plan view of a main part of an example of the graphene element. Fig. 15(B) is a schematic cross-sectional view of a main part of an example of the graphene element. Fig. 15(B) is a schematic cross-sectional view taken along line XV-XV of Fig. 15(A). For convenience, hatching is also applied to the plan view shown in Fig. 15(A).

[0086] 15(A) and 15(B) is an example of an optical sensor that senses light such as infrared light. In the graphene element 1B, a graphene layer 30, and electrodes 50B and 60B connected to portions 31 and 33 of the surface 30a, respectively, are provided on the surface 10a side of the substrate 10 on which the insulating layer 12 is provided. In the graphene element 1B, a portion 32 of the surface 30a of the graphene layer 30 between the electrodes 50B and 60B is covered with an aluminum oxide layer 40.

[0087] In the graphene element 1B functioning as an optical sensor, a predetermined voltage is applied between the electrodes 50B and 60B, causing electrons (current) to flow through the graphene layer 30. When light such as infrared light is received at a portion 32 of the graphene layer 30 between the electrodes 50B and 60B, the amount of electrons flowing through the graphene layer 30 between the electrodes 50B and 60B changes in accordance with a change in the electronic conductivity of the graphene layer 30 or a change in the resistance between the electrodes 50B and 60B due to the reception of the light. This change is detected, thereby detecting light such as infrared light by the graphene element 1B.

[0088] The graphene element 1B can be manufactured according to the example of the manufacturing method described in the first embodiment. That is, a substrate 10 having no back gate electrode on the surface 10b side is used, and the steps shown in Figures 5(A) and 5(B) to 13(A) and 13(B) are carried out. As a result, the graphene element 1B shown in Figures 15(A) and 15(B) is manufactured.

[0089] The techniques described in the first and second embodiments above can also be adopted in the manufacture of the graphene device 1B described in this fourth embodiment, thereby obtaining the same effects as those described in the first and second embodiments above.

[0090] In the graphene element 1B, the portion 31 of the graphene layer 30 is also referred to as the "first portion," the portion 32 is also referred to as the "second portion," and the portion 33 is also referred to as the "third portion." In this case, the electrode 50B connected to the portion 31 is also referred to as the "first electrode," and the electrode 60B connected to the portion 33 is also referred to as the "second electrode."

[0091] Alternatively, in graphene element 1B, portion 33 of graphene layer 30 is also referred to as a “first portion,” portion 32 is also referred to as a “second portion,” and portion 31 is also referred to as a “third portion.” In this case, electrode 60B connected to portion 33 is also referred to as a “first electrode,” and electrode 50B connected to portion 31 is also referred to as a “second electrode.”

[0092] [Fifth embodiment] The graphene devices 1, 1A, 1B, etc. described in the first to fourth embodiments can be mounted on various electronic devices, such as computers (personal computers, supercomputers, servers, etc.), smartphones, mobile phones, tablet terminals, sensors, cameras, audio equipment, measuring devices, inspection devices, manufacturing devices, transmitters, receivers, and radar devices.

[0093] Fig. 16 is a diagram illustrating an example of an electronic device according to the fifth embodiment. Fig. 16 shows a schematic diagram of an electronic device including a graphene element. As shown in FIG. 16, for example, the graphene device 1 (FIG. 3) as described in the first embodiment above is mounted inside a housing 201 of various electronic devices 200.

[0094] As described above, in the graphene device 1, the source electrode 50 and the drain electrode 60 are connected to the portion 31 and the portion 33 of the surface 30a of the graphene layer 30, respectively, and extend from the portion 31 and the portion 33 to the surface 10a of the substrate 10. Then, the portion 32 between the portion 31 and the portion 33 of the surface 30a of the graphene layer 30 is covered with the aluminum oxide layer 40. In manufacturing the graphene device 1, the aluminum oxide layer 40 separates the graphene layer 30 from the resist 70 used for patterning the graphene layer 30. This prevents the residue 71, which is generated when the resist 70 is removed, from remaining in the portion 31 and the portion 33 of the graphene layer 30 to which the source electrode 50 and the drain electrode 60 are to be connected, respectively. Therefore, an increase in the contact resistance between the source electrode 50 and the drain electrode 60 and the graphene layer 30, as well as a decrease in the electron mobility of the graphene layer 30, are prevented, and the graphene device 1 having excellent electrical characteristics is realized. A high-performance electronic device 200 is realized by mounting such a graphene device 1.

[0095] Here, the electronic device 200 equipped with the graphene element 1 has been exemplified, but it is possible to realize various electronic devices equipped with other graphene elements 1A, 1B, etc. in a similar manner. The following supplementary notes are further provided with respect to the above-described embodiment.

[0096] (Appendix 1) A substrate; A graphene layer provided on a first surface of the substrate; a first electrode connected to a first portion of a second surface of the graphene layer opposite the substrate and extending from the first portion to the first surface of the substrate; an aluminum oxide layer covering a second portion of the second surface of the graphene layer adjacent to the first portion; A graphene element comprising:

[0097] (Supplementary Note 2) The graphene element according to Supplementary Note 1, wherein the aluminum oxide layer is exposed on an outer surface. (Supplementary Note 3) The graphene element of Supplementary Note 1, further comprising a second electrode connected to a third portion of the second surface of the graphene layer, the third portion facing the first portion via the second portion, and extending from the third portion to the first surface of the substrate.

[0098] (Supplementary Note 4) The graphene device according to Supplementary Note 1, further comprising a third electrode provided on a third surface of the substrate opposite to the first surface. (Appendix 5) A step of forming a graphene layer on a first surface of a substrate; forming an aluminum oxide layer on a second surface of the graphene layer opposite the substrate; removing a portion of the aluminum oxide layer; removing the graphene layer exposed from the aluminum oxide layer remaining after the removal; removing the aluminum oxide layer from a first portion of the second surface of the graphene layer remaining after the removal, and leaving the aluminum oxide in a second portion of the second surface adjacent to the first portion; forming a first electrode connected to the first portion of the second surface of the graphene layer and extending from the first portion to the first surface of the substrate; A method for producing a graphene element, comprising:

[0099] (Additional Note 6) The step of removing the part of the aluminum oxide layer includes: forming a resist on an area where the aluminum oxide layer is to remain; removing the aluminum oxide layer exposed from the resist by etching using the resist as a mask; A method for producing the graphene element according to claim 5, comprising:

[0100] (Additional Note 7) The step of removing the graphene layer exposed from the aluminum oxide layer includes: and removing the graphene layer exposed from the aluminum oxide layer by etching using the resist and the aluminum oxide layer remaining after etching using the resist as a mask.

[0101] (Appendix 8) The method for producing a graphene element according to appendix 7, wherein the portion of the aluminum oxide layer is removed by wet etching, and the graphene layer is removed by dry etching.

[0102] (Appendix 9) The method for producing a graphene element according to appendix 7, wherein the aluminum oxide layer and the graphene layer are removed by dry etching. (Additional Note 10) After the step of removing the graphene layer exposed from the aluminum oxide layer, removing the resist; The step of removing the aluminum oxide layer from the first portion of the second surface of the graphene layer includes: 8. A method for producing a graphene element according to claim 7, further comprising removing a residue of the resist formed on the aluminum oxide layer in the first portion together with the aluminum oxide layer in the first portion.

[0103] (Additional Note 11) A step of removing the aluminum oxide layer from a third portion of the second surface of the graphene layer remaining after the step of removing the graphene layer exposed from the aluminum oxide layer, the third portion facing the first portion with the second portion interposed therebetween; forming a second electrode connected to the third portion of the second surface of the graphene layer and extending from the third portion to the first surface of the substrate; 6. A method for producing a graphene element according to claim 5, further comprising:

[0104] (Appendix 12) A method for producing a graphene device according to appendix 5, comprising forming a third electrode on a third surface of the substrate opposite to the first surface. (Appendix 13) A substrate; A graphene layer provided on a first surface of the substrate; a first electrode connected to a first portion of a second surface of the graphene layer opposite the substrate and extending from the first portion to the first surface of the substrate; an aluminum oxide layer covering a second portion of the second surface of the graphene layer adjacent to the first portion; An electronic device comprising a graphene element comprising: [Explanation of symbols]

[0105] 1, 1A, 1B, 100 Graphene element 10, 110 Board 10a, 10b, 30a, 110a, 110b, 130a side 11, 111 Base substrate 12, 112 Insulating layer 20, 20A, 120 Gate electrode 21, 51, 61, 121, 151, 161 Titanium layer 22, 52, 62, 122, 152, 162 gold layer 30, 130 graphene layers 31, 32, 33, 131, 133 parts 40 Aluminum Oxide Layer 50, 150 Source electrode 60, 160 Drain electrode 50B, 60B electrode 70, 80, 170, 180 Resist 71, 171 residue 81, 181 Opening 200 Electronic equipment 201 Case

Claims

1. A substrate; a graphene layer provided on a first surface of the substrate; a first electrode connected to a first portion of a second surface of the graphene layer opposite the substrate and extending from the first portion to the first surface of the substrate; an aluminum oxide layer covering a second portion of the second surface of the graphene layer adjacent to the first portion; A graphene element comprising:

2. The graphene device of claim 1 , wherein the aluminum oxide layer is exposed on an outer surface.

3. 2. The graphene device of claim 1, further comprising a second electrode connected to a third portion of the second surface of the graphene layer, the third portion being opposed to the first portion via the second portion, and extending from the third portion to the first surface of the substrate.

4. forming a graphene layer on a first surface of a substrate; forming an aluminum oxide layer on a second surface of the graphene layer opposite the substrate; removing a portion of the aluminum oxide layer; removing the graphene layer exposed from the aluminum oxide layer remaining after the removal; removing the aluminum oxide layer from a first portion of the second surface of the graphene layer remaining after the removal, and leaving the aluminum oxide in a second portion of the second surface adjacent to the first portion; forming a first electrode connected to the first portion of the second surface of the graphene layer and extending from the first portion to the first surface of the substrate; A method for producing a graphene element, comprising:

5. The step of removing the portion of the aluminum oxide layer includes: forming a resist on an area where the aluminum oxide layer is to remain; removing the aluminum oxide layer exposed from the resist by etching using the resist as a mask; The method for producing the graphene device according to claim 4 , comprising:

6. The step of removing the graphene layer exposed from the aluminum oxide layer includes:

6. The method for producing a graphene element according to claim 5, comprising the step of removing the graphene layer exposed from the aluminum oxide layer by etching using the resist and the aluminum oxide layer remaining after etching using the resist as a mask as a mask.

7. The method for producing a graphene element according to claim 6 , wherein the portion of the aluminum oxide layer is removed by wet etching, and the graphene layer is removed by dry etching.

8. The method for producing a graphene element according to claim 6 , wherein the aluminum oxide layer and the graphene layer are removed by dry etching.

9. After the step of removing the graphene layer exposed from the aluminum oxide layer, removing the resist; The step of removing the aluminum oxide layer from the first portion of the second surface of the graphene layer includes: The method for producing a graphene element according to claim 6 , further comprising removing a residue of the resist formed on the aluminum oxide layer in the first portion together with the aluminum oxide layer in the first portion.

10. A substrate; a graphene layer provided on a first surface of the substrate; a first electrode connected to a first portion of a second surface of the graphene layer opposite the substrate and extending from the first portion to the first surface of the substrate; an aluminum oxide layer covering a second portion of the second surface of the graphene layer adjacent to the first portion; An electronic device comprising a graphene element comprising:

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