Capacitor, electrical machinery and apparatus, and method for manufacturing capacitor

Abstract

To provide a capacitor, an electrical machinery and apparatus, and a method for manufacturing the capacitor that can contribute to ensuring resistance in harsh environments in a practical size.SOLUTION: A capacitor has a laminate in which an alumina film is laminated on an impurity-doped silicon substrate between a pair of electrodes, the impurity-doped silicon substrate is a p-type silicon substrate, and the rate of change in capacitance when heated to 100°C to 500°C relative to the capacitance at room temperature before heating is less than 20%, and the rate of change in capacitance when irradiated with an accumulated dose of 5 MGy X-rays and heated to 300°C relative to the capacitance before X-ray irradiation is less than 20%.SELECTED DRAWING: Figure 10

Description

[Technical field]

[0001] The present invention relates to a capacitor, an electric device, and a method for manufacturing a capacitor. [Background technology]

[0002] Electronic devices are generally vulnerable to heat, and therefore have often been installed away from the heat source to be controlled. However, in recent years, electronic devices have been installed closer to the heat source. For example, in the automotive field, the ECU (Electronic Control Unit) has been moved from the vehicle interior to the engine room. By installing the electronic device closer to the heat source in this way, the distance between the electronic device and the sensors, actuators, etc., installed at the heat source, is reduced, and the accuracy of feedback control is improved. The reason why electronic devices can now be installed closer to the heat source is that the heat resistance of electronic components built into the electronic device has improved. Among electronic components, commercially available capacitors are often designed to meet the standards (e.g., JIS C 5101-1:2019) and therefore have an upper limit temperature of around 150°C (see, for example, Non-Patent Document 1).

[0003] Al2O3 is a useful material as a dielectric material for capacitors that can operate in high-temperature environments. According to Non-Patent Document 2, it has been reported that a capacitor using Al2O3 as a dielectric does not show a significant change in capacitance at room temperature to 500°C. However, since the relative dielectric constant of Al2O3 (8.5) is small, if a capacitor using Al2O3 is set to, for example, about 100 nF and the size of the electrodes is simulated on a substrate of a normal thickness, the size of the electrodes becomes huge, about 27 cm in diameter, which is far from a practical size. Therefore, in order to make a capacitor using Al2O3 into a practical size, Non-Patent Document 3 reports a multilayer capacitor in which Al2O3 and electrodes are stacked in large numbers. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] JIS C 5101-1:2019(https: / / kikakurui.com / c5 / C5101-1-2019-01.html) [Non-Patent Document 2] FY2019 Nuclear System Research and Development Project Results Report, Hokkaido University (https: / / www.nsystemkoubo.jp / result / achv_report / document / r13report.pdf) [Non-Patent Document 3] JH Klootwijk et al., "Ultrahigh Capacitance Density for Multiple ALD-Grown MIM Capacitor Stacks in 3-D Silicon," doi: 10.1109 / LED.2008.923205. Summary of the Invention [Problem to be solved by the invention]

[0005] The following analysis is provided by the present inventors.

[0006] However, to make a multilayer capacitor using Al2O3 into a practical size, multiple layers are required, and impurities and debris (particles, etc.) get between the layers, reducing the resistance to harsh environments (high radiation environments, high temperature environments).

[0007] An object of the present invention is to provide a capacitor, an electric machine and device, and a method for manufacturing a capacitor that can contribute to ensuring resistance in harsh environments with a practical size. [Means for solving the problem]

[0008] A capacitor according to a first aspect has a laminate in which an alumina film is laminated on an impurity-doped silicon substrate, interposed between a pair of electrodes.

[0009] An electric device according to a second aspect of the present invention includes the capacitor according to the first aspect of the present invention.

[0010] A method for manufacturing a capacitor according to a third aspect includes the steps of forming an alumina film on an impurity-doped silicon substrate, and forming electrodes on each of the surfaces of the impurity-doped silicon substrate and the alumina film. Effect of the Invention

[0011] The first to third aspects mentioned above can contribute to ensuring durability in harsh environments with a practical size. [Brief description of the drawings]

[0012] [Figure 1] 1 is a cross-sectional view showing a schematic example of a configuration of a capacitor according to the present disclosure. [Diagram 2] 1 is a cross-sectional view showing a schematic configuration of a capacitor according to a modified example of the present disclosure. [Diagram 3] 1A to 1C are cross-sectional views illustrating steps in a typical example of a method for manufacturing a capacitor according to the present disclosure. [Figure 4] FIG. 1 is a cross-sectional view showing a schematic configuration of a sample capacitor according to the present disclosure. [Diagram 5] 1 is a graph showing temperature dependence of capacitance of a sample capacitor according to the present disclosure. [Figure 6] 1 is a graph showing the cumulative radiation dose dependence of capacitance after radiation exposure of a capacitor sample according to the present disclosure. [Figure 7] 1 is a graph showing the cumulative radiation dose dependence of capacitance of a capacitor sample according to the present disclosure after irradiation and annealing. [Figure 8] 1 is a graph showing the cumulative radiation dose dependence of capacitance at 300° C. after radiation exposure of a capacitor sample according to the present disclosure. [Figure 9] FIG. 2 is a schematic diagram showing the configuration of a measuring device used to measure the capacitance of a capacitor sample according to the present disclosure. [Figure 10] 11 is a cross-sectional view showing a schematic diagram of a second modified example of the configuration of a capacitor according to the present disclosure. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, the embodiments will be described with reference to the drawings. Note that when reference symbols are used in this application, they are intended to aid understanding only and are not intended to limit the present invention to the illustrated embodiments. In addition, the following embodiments are merely examples and do not limit the present invention.

[0014] [Form 1] The capacitor according to the first embodiment will be described with reference to the drawings. Fig. 1 is a cross-sectional view showing a schematic example of a configuration of a capacitor according to the present disclosure. Fig. 2 is a cross-sectional view showing a schematic modification of the configuration of the capacitor according to the present disclosure.

[0015] Capacitor 1 has a configuration including a laminate 2 in which an impurity-doped silicon substrate 13 and an alumina film 14 are sandwiched between a pair of electrodes 12, 15 (see FIG. 1). Capacitor 1 has a configuration in which the surface of laminate 2 on the electrode 12 side is bonded onto support plate 10 via adhesive layer 11. Note that capacitor 1 may also have a configuration in which the surface of laminate 2 on the electrode 15 side is bonded onto support plate 10 via adhesive layer 11, as shown in FIG. 2.

[0016] Capacitor 1 is configured to be resistant to harsh environments in addition to being used in typical capacitor environments (room temperature to 150°C). The harsh environment referred to here includes, for example, a high-temperature environment of at least 150°C to 500°C, and may further include a radiation environment of at least 1 Gy to 5 MGy, and may be an environment exceeding these upper limit temperatures and upper limit radiation doses. Capacitor 1 is of a practical size (for example, an electrode area of ​​100 mm 2Hereinafter, the thickness may be several hundreds of μm). The capacitor 1 may be configured so that the rate of change in capacitance when heated to 100° C. to 500° C. (preferably 200° C. to 500° C.) is less than 20% (preferably less than 10%, more preferably less than 5%) compared to the capacitance at room temperature before heating. The capacitor 1 may be configured so that the rate of change in capacitance at room temperature after irradiating with X-rays with an integrated radiation dose of 5 MGy (0.001 MGy to 5 MGy) and annealing at 100° C. for 5 minutes is less than 20% (less than 10%, less than 5%) compared to the capacitance before X-ray irradiation. The capacitor 1 may be configured so that the rate of change in capacitance when irradiated with X-rays with an integrated radiation dose of 5 MGy and heated to 300° C. is less than 20% (preferably less than 10%, more preferably less than 5%) compared to the capacitance before X-ray irradiation. Capacitor 1 can be incorporated into electrical machinery and equipment such as semiconductor devices, power electronics devices, high-frequency devices, communication equipment, sensing equipment, automobiles, power transmission and distribution equipment, devices for harsh environments, equipment for high-temperature environments, equipment for radiation environments, space equipment, and nuclear reactor equipment.

[0017] The support plate 10 is a substrate that supports the laminate 2 (see FIG. 1). For example, a mullite plate, an alumina plate, a sapphire plate, a magnesia plate, or a zirconia plate can be used for the support plate 10. Considering the thermal expansion coefficients of the impurity-doped silicon substrate 13 and the alumina film 14, it is preferable to use a mullite plate, an alumina plate, or a sapphire plate.

[0018] The adhesive layer 11 is a layer that adheres the laminate 2 to the support plate 10 (see FIG. 1), and considering that the adhesive layer 11 electrically connects the electrodes 12 of the laminate 2 to the outside, the adhesive layer 11 can be a conductive adhesive layer that protrudes from the area of ​​the laminate 2. For the adhesive layer 11, for example, a paste containing conductive particles of platinum, ruthenium, gold, silver, copper, nickel, carbon, or the like in a resin can be used, and considering use in harsh environments, contact resistance, and the like, it is preferable to use a platinum paste.

[0019] The electrodes 12 and 15 are conductive layers for electrically connecting to the outside (see FIG. 1). For example, Pt, Ru, Au, Al, Ti, Mo, Cu, Cr, Pb, and Zn can be used for the electrodes 12 and 15, and they may be combined to form a laminated electrode (for example, Ti / Mo / Au, etc.). Considering use in harsh environments and contact resistance, it is preferable to use Pt and Ru. For example, the electrodes 12 and 15 can be formed using a method such as RF (Radio Frequency) sputtering or EB (Electron Beam) deposition, and considering adhesion with the alumina film 14, it is preferable to form the electrodes using RF sputtering. When forming the electrodes 12 and 15, the electrodes 12 and 15 can be patterned with high precision by forming the electrodes using a mask or resist, and the electrode area (i.e., the capacitance) can be controlled.

[0020] The impurity-doped silicon substrate 13 is a substrate in which impurities (e.g., p-type impurities such as boron and indium) are doped (added) to intrinsic silicon (see FIG. 1). The impurity-doped silicon substrate 13 has chemical resistance, and therefore is easy to clean. It is preferable to use a substrate with a low resistance value (e.g., 1 to 100 Ω·cm, preferably 1 to 30 Ω·cm) for the impurity-doped silicon substrate 13 in order to reduce the effect on the performance of the capacitor. When the surface of the impurity-doped silicon substrate 13 is rough, it is preferable to mirror-polish at least the surface on the alumina film 14 side (preferably both surfaces) to improve the surface flatness in order to form an alumina film 14 of a uniform thickness on the impurity-doped silicon substrate 13 during ALD (Atomic Layer Deposition) to obtain the desired performance. The surface roughness Ra of the impurity-doped silicon substrate 13 can be less than 5 nm, and is preferably less than 1 nm. The impurity-doped silicon substrate 13 is preferably cleaned (e.g., acid cleaned) to increase its cleanliness in order to prevent a decrease in adhesion of the electrode 12 and the alumina film 14 and a decrease in resistance in harsh environments due to impurities and dirt (particles, etc.) on the substrate surface. By increasing the surface flatness and cleanliness, it is possible to improve the accuracy, reproducibility, and adhesion of the alumina film 14 formed by ALD. The surface of the impurity-doped silicon substrate 13 is preferably in a state where no particles with a diameter of 10 μm or more are present immediately before the alumina film 14 is formed.

[0021] The alumina film 14 is a film made of alumina (Al2O3) (see FIG. 1). The alumina film 14 can be single crystal alumina that does not contain impurities. The alumina film 14 has a single-layer structure. The alumina film 14 can be formed by, for example, the ALD method. The thickness of the alumina film 14 is set according to the desired capacitance, and in principle can be set to a thickness of one atomic layer or more, for example, 1 nm to 1000 nm.

[0022] Next, the capacitor according to the embodiment 1 will be described with reference to the drawings. Fig. 3 is a cross-sectional view showing a process of a typical example of a method for producing a capacitor according to the present disclosure.

[0023] First, an impurity-doped silicon substrate 13 is prepared, and polishing and cleaning processes are performed as necessary (for example, when the surface roughness Ra of the impurity-doped silicon substrate 13 is 5 nm or more, or when particles are attached and the cleanliness is low) (see FIG. 3(A)).

[0024] Next, the impurity-doped silicon substrate 13 is cut to a desired size (see FIG. 3(B)).

[0025] Next, an alumina film 14 is formed on the impurity-doped silicon substrate 13 by the ALD method (see FIG. 3(C)).

[0026] Next, the electrodes 12, 15 are formed on the respective surfaces of the impurity-doped silicon substrate 13 and the alumina film 14 (see FIG. 3(C)). This completes the stack 2. It is not important which of the electrodes 12, 15 is formed first.

[0027] Finally, the surface of the laminate 2 on the electrode 12 side is adhered to a support plate 10 via an adhesive layer 11 (see FIG. 1).

[0028] Next, the harsh environment resistance test of the capacitor according to the first embodiment will be described with reference to the drawings. FIG. 4 is a cross-sectional view showing the configuration of a sample of the capacitor according to the present disclosure. FIG. 5 is a graph showing the temperature dependence of the capacitance of the sample of the capacitor according to the present disclosure. FIG. 6 is a graph showing the cumulative radiation dose dependence of the capacitance of the sample of the capacitor according to the present disclosure after irradiation with radiation. FIG. 7 is a graph showing the cumulative radiation dose dependence of the capacitance of the sample of the capacitor according to the present disclosure after irradiation with radiation and annealing. FIG. 8 is a graph showing the cumulative radiation dose dependence of the capacitance of the sample of the capacitor according to the present disclosure at 300° C. after irradiation with radiation. FIG. 9 is a schematic diagram showing the configuration of a measuring device used to measure the capacitance of the sample of the capacitor according to the present disclosure.

[0029] [Sample preparation] The capacitor sample was fabricated as follows so that the designed capacitance was about 100 nF (see Figure 4).

[0030] In the capacitor sample, the impurity-doped silicon substrate 13 had a thickness of 520±20 μm, a diameter of 4 inches, a type of conductivity of p-type, a resistance value of 1 to 100 Ω·cm, a surface orientation of (100), a surface condition of the surface to be used that was mirror-polished, and cleaning that was washed with strong acid before the ALD process. The thickness of the impurity-doped silicon substrate 13 is not particularly limited, and it is sufficient if it has a certain degree of strength and is thick enough to connect the impurity-doped silicon substrate 13 and the electrodes 12.

[0031] The prepared impurity-doped silicon substrate 13 was cut into a 62.8 mm2 area using a diamond cutter. 2 The diamond cutter was a blade cutter (Musashino Electronics Co., Ltd.: MPC-200), with the blade rotation speed set to 130 rpm and the sample movement speed set to 0.9 mm / min.

[0032] An alumina film 14 was formed by ALD on the cut impurity-doped silicon substrate 13. The thickness of the alumina film 14 was 50 nm. An ALD device (Suga Manufacturing Co., Ltd.: AV328-A9) was used for the film formation, the film formation temperature was 600°C, the number of cycles was 500, the materials used were H2O and TMA (Tri-Methyl Aluminum), and the material temperature was 30°C.

[0033] Electrodes 12 and 15 were formed by RF sputtering on both sides of a laminate in which an alumina film 14 was formed on an impurity-doped silicon substrate 13. The thickness of the electrodes 12 and 15 was set to 200 nm, the film formation temperature was set to 150° C., the pressure was set to about 1 Pa, and the material of the electrodes 12 and 15 was Pt.

[0034] The surface of the electrode 12 side of the laminate 2 in which the electrode 12, the impurity-doped silicon substrate 13, the alumina film 14, and the electrode 15 are laminated is adhered to the support plate 10 using the adhesive layer 11, the conductive wire 17 is adhered to the adhesive layer 11, and the conductive wire 18 is adhered to the electrode 15 using the adhesive layer 16, and then sintered. The support plate 10 is an SSAT square plate manufactured by Nikkato Corporation. The adhesive layers 11 and 16 are made of Pt paste (TR-7605 manufactured by Tanaka Kikinzoku Kogyo Co., Ltd.), and the thickness of the adhesive layers 11 and 16 is about 1 mm. The conductive wire is a Pt wire, and the above-mentioned Pt paste is used for adhering the conductive wire. The sintering conditions were 1000°C, in air, and for 1 hour.

[0035] The samples prepared as described above were subjected to the following severe environment resistance test.

[0036] [Actual capacitance] When the capacitance of a sample created so as to have a design capacitance of about 100 nF was measured in air at room temperature, the actual capacitance was 96 to 125 nF.

[0037] The capacitance was measured using a measuring device as shown in FIG. 9. In the measuring device, a quartz chamber for accommodating a sample is placed in a vacuum replacement electric furnace (FT-01VAC-50 manufactured by Furutech). The quartz chamber has an inlet through which Ar gas (Ar: 95.14%, H2: 4.86%) flows in from a cylinder of Ar gas with a flow rate adjusted by a flow rate regulator, and an outlet through which the Ar gas in the quartz chamber is discharged to the outside air. In the quartz chamber, two coaxial cables (copper cables) electrically connected to an LCR meter (IM3536 manufactured by HIOKI) extend into the electric furnace, and the tips of the two coaxial cables are connected to the conductors 17 and 18 in FIG. 4. In the quartz chamber, a K-type thermocouple electrically connected to a multimeter extends into the electric furnace, and the tip of the K-type thermocouple is connected (contacted, pressure-welded) to the sample (support plate 10). In an LCR meter, a sample (capacitor) is charged with a known current through a coaxial cable, the resulting voltage is measured at a measurement frequency of 1 kHz, and the capacitance is calculated.

[0038] [High temperature resistance test] In the high temperature resistance test, the capacitance of the sample was measured in the air without radiation exposure, after heating from room temperature to 500°C. The measuring device shown in Figure 9 was used to measure the capacitance. The temperature was changed at a rate of 10°C / min, and the temperature was stabilized for about 10 minutes before measurement at each temperature. The capacitance of the sample when heated to each temperature was as shown in Figure 5. In other words, the rate of change in capacitance at each temperature from the initial value (capacitance at room temperature) was less than 20%. If the rate of change is less than 20%, it is unlikely to cause a problem in the electronic circuit in which it is expected to be used. Looking at the overall tendency, the capacitance at 100°C is considered to be an irregular value, and the variation in capacitance at each temperature from the initial value is considered to be less than 10%, and if the time to stabilize at each temperature is extended, the variation in capacitance at each temperature from the initial value is considered to be less than 5%. This means that it can be applied to electronic devices that require precise control in high temperature environments.

[0039] [Radiation resistance test] In the radiation resistance test, the capacitance of the samples was measured after irradiation with radiation of 0 to 5 MGy in air at room temperature. An X-ray irradiation device (rigaku, 4037B: target Cr, voltage 20 kV, current 50 mA, dose rate 50 kGy / h) was used for irradiation. A cellulose triacetate (CTA) film dosimeter was used to measure the cumulative radiation dose. The measurement device shown in Figure 9 was used to measure the capacitance. The measurement results of the capacitance of the samples after irradiation with each cumulative radiation dose were as shown in Figure 6. In other words, the capacitance decreased as the cumulative radiation dose increased. This decrease in capacitance after radiation exposure was temporary, and when the samples after irradiation with each cumulative radiation dose were annealed in air at 100°C for 5 minutes, the capacitance recovered to around the capacitance at the cumulative radiation dose of 0 Gy (around the initial value in Figure 6) at any cumulative radiation dose, as shown in Figure 7. The change rate of capacitance at each integrated radiation dose compared to the capacitance at an integrated radiation dose of 0 Gy after recovery was less than 10%. If the change rate is less than 10%, it is unlikely to be a problem in the electronic circuits in which it is expected to be used. Looking at the overall trend, the capacitance at an integrated radiation dose of 1000 Gy seems to be an irregular value, and if the annealing time is extended, the change rate of capacitance at each integrated radiation dose compared to the capacitance at an integrated radiation dose of 0 Gy after recovery is thought to be less than 5%. From this, even if it is exposed to radiation, it can be restored to its initial state by annealing, so it can be applied to electronic devices that require precise control. In addition, if it is used in a high temperature and radiation environment, it will always be in an annealed state, so it can be used continuously without performance degradation.

[0040] [High temperature radiation resistance test] In the high-temperature radiation resistance test, the capacitance of the sample was measured after it was irradiated with radiation of an accumulated radiation dose of 0 to 5 MGy in air at room temperature and heated to 300°C in an Ar gas atmosphere. The same X-ray irradiation device as above was used for radiation irradiation. A cellulose triacetate film dosimeter was used to measure the accumulated radiation dose. The measurement device shown in Figure 9 was used to measure the capacitance. The measurement results of the capacitance of the sample after it was irradiated with radiation of each accumulated radiation dose and heated to 300°C were as shown in Figure 8. In other words, the change rate of the capacitance at each accumulated radiation dose relative to the capacitance at 300°C with an accumulated radiation dose of 0 Gy was less than 20%. If the change rate is less than 20%, it is unlikely to be a problem in the electronic circuit in which it is expected to be used. Looking at the overall tendency, the capacitance at an accumulated radiation dose of 1000 Gy seems to be an irregular value, and the change rate of the capacitance at each accumulated radiation dose relative to the capacitance at 300°C with an accumulated radiation dose of 0 Gy seems to be less than 10%. If the time of heating to 300°C is extended, the rate of change in capacitance at each accumulated radiation dose relative to the capacitance at a calculated radiation dose of 0 Gy is expected to be less than 5%. This means that the material can be applied to electronic devices that require precise control in high-temperature environments that are susceptible to radiation exposure.

[0041] According to the first embodiment, it is possible to contribute to ensuring resistance to harsh environments with a practical size by interposing the impurity-doped silicon substrate 13 between the alumina film 14 and the electrode 12. In other words, it is possible to realize a capacitor 1 that has a practical size, a sufficiently large capacitance, and operates stably in high temperature and radiation environments.

[0042] Furthermore, according to the first embodiment, by introducing a very simple process of forming the alumina film 14 on the impurity-doped silicon substrate 13 by the ALD method, it is possible to manufacture the capacitor 1 that is resistant to harsh environments at low cost. In other words, it is possible to provide an electronic system that is robust against unprecedented high temperature conditions (e.g., 650°C), temperature fluctuations between high temperature and room temperature environments, and radiation (e.g., 5MGy), and it can be used in the nuclear power field, aerospace field, etc.

[0043] Furthermore, by increasing the upper limit of the operable temperature of the capacitor 1, it becomes possible to place the capacitor 1 closer to a heat generation source in a factory, an automobile, etc., thereby improving the accuracy of the feedback control.

[0044] Furthermore, according to the first embodiment, the dielectric layer has a single-layer structure of the alumina film 14, so that impurities and dust (particles, etc.) do not get between the layers as in the case of a multilayer capacitor, and resistance to harsh environments can be ensured. In other words, if impurities or dust are present between the layers, the adhesion and electrical characteristics of the film deteriorate due to the impurities or dust expanding, reacting with surrounding materials, degassing, etc., but according to the first embodiment, it is possible to prevent impurities and dust from getting between the layers, so that stable adhesion and electrical characteristics of the film can be ensured, and resistance to harsh environments can be ensured.

[0045] [Form 2] The capacitor according to the second embodiment will be described with reference to the drawings. Fig. 10 is a cross-sectional view that illustrates a second modified example of the configuration of the capacitor according to the present disclosure.

[0046] The capacitor 1 has a structure in which a laminate in which an alumina film 14 is laminated on an impurity-doped silicon substrate 13 is interposed between a pair of electrodes 12 and 15 .

[0047] According to the second embodiment, the impurity-doped silicon substrate 13 is interposed between the alumina film 14 and the electrode 12, which contributes to ensuring resistance to harsh environments with a practical size.

[0048] Some or all of the above aspects may be described as follows, but are not limited to the following:

[0049] [Appendix 1] A capacitor in which a laminate in which an alumina film is laminated on an impurity-doped silicon substrate is interposed between a pair of electrodes. [Appendix 2] 2. The capacitor of claim 1, wherein the impurity-doped silicon substrate is a p-type silicon substrate. [Appendix 3] 3. The capacitor according to claim 1 or 2, wherein the rate of change in capacitance when heated to 100° C. to 500° C. is less than 20% compared to the capacitance at room temperature before heating. [Appendix 4] 4. The capacitor according to any one of claims 1 to 3, wherein the change in capacitance at room temperature after exposure to X-rays with an accumulated radiation dose of 5 MGy and annealing at 100°C for 5 minutes is less than 20% compared to the capacitance before X-ray exposure. [Appendix 5] 5. The capacitor according to claim 1, wherein the change in capacitance when irradiated with an accumulated radiation dose of 5 MGy of X-rays and heated to 300° C. is less than 20% compared to the capacitance before X-ray irradiation. [Appendix 6] 6. The capacitor according to claim 1, wherein the alumina film has a thickness of 1 nm to 1000 nm. [Appendix 7] 7. The capacitor of claim 1, wherein the impurity-doped silicon substrate has a surface roughness Ra of less than 5 nm. [Appendix 8] 8. The capacitor according to claim 1, wherein no particles having a diameter of 10 μm or more are present between the impurity-doped silicon substrate and the alumina film. [Appendix 9] 9. The capacitor according to claim 1, wherein the pair of electrodes is made of Pt or Ru. [Appendix 10] 10. The capacitor according to claim 1, wherein the alumina film is formed by an ALD method. [Appendix 11] 11. The capacitor according to claim 1, wherein the pair of electrodes are electrodes formed by an RF sputtering method. [Appendix 12] 12. The capacitor described in any one of claims 1 to 11, comprising a support plate adhered to one of the pair of electrodes. [Appendix 13] 13. The capacitor of claim 12, wherein the support plate is an alumina substrate. [Appendix 14] An electrical appliance comprising the capacitor according to any one of claims 1 to 13. [Appendix 15] forming an alumina film on an impurity-doped silicon substrate; forming electrodes on the surfaces of the impurity-doped silicon substrate and the alumina film; A method for manufacturing a capacitor, comprising: [Appendix 16] 16. A method for manufacturing a capacitor as described in claim 15, comprising a step of adhering the electrode on the surface of the impurity-doped silicon substrate or the alumina film to a support plate.

[0050] The disclosures of the above non-patent documents are incorporated herein by reference and may be used as the basis or part of the present invention as necessary. Within the framework of the entire disclosure of the present invention (including the claims and drawings), modifications and adjustments of the forms and embodiments are possible based on the basic technical ideas. Furthermore, within the framework of the entire disclosure of the present invention, various combinations or selections (or non-selection as necessary) of various disclosed elements (including each element of each claim, each element of each form or embodiment, each element of each drawing, etc.) are possible. In other words, the present invention naturally includes various modifications and corrections that a person skilled in the art would be able to make in accordance with the entire disclosure, including the claims and drawings, and the technical ideas. Furthermore, with regard to the numerical values ​​and numerical ranges described in this application, any intermediate value, lower numerical value, and small range are considered to be described even if not specified. Furthermore, the disclosures of the above cited documents may be used in part or in whole in combination with the descriptions in this document as part of the disclosure of the present invention in accordance with the spirit of the present invention as necessary, and are considered to be included (belong) to the disclosures of this application. [Explanation of symbols]

[0051] 1 Capacitor 2. Laminate 10 Support plate 11, 16 Adhesive layer 12, 15 electrodes 13 Impurity-doped silicon substrate 14 Alumina membrane 17, 18 Conductor

Claims

1. A capacitor in which a laminate in which an alumina film is laminated on an impurity-doped silicon substrate is interposed between a pair of electrodes.

2. 2. The capacitor of claim 1, wherein said impurity doped silicon substrate is a p-type silicon substrate.

3. 2. The capacitor according to claim 1, wherein the rate of change in capacitance when heated to 100° C. to 500° C. is less than 20% compared to the capacitance at room temperature before heating.

4. 2. The capacitor according to claim 1, wherein the change in capacitance at room temperature after exposure to an accumulated dose of 5 MGy of X-rays and annealing at 100° C. for 5 minutes is less than 20% compared to the capacitance before X-ray exposure.

5. 2. The capacitor according to claim 1, wherein the change in capacitance when irradiated with an accumulated dose of 5 MGy of X-rays and heated to 300° C. is less than 20% compared to the capacitance before X-ray irradiation.

6. The capacitor of claim 1, wherein the alumina film has a thickness of 1 nm to 1000 nm.

7. The capacitor of claim 1 , wherein the impurity-doped silicon substrate has a surface roughness Ra of less than 5 nm.

8. 2. The capacitor according to claim 1, wherein no particles having a diameter of 10 [mu]m or more are present between said impurity-doped silicon substrate and said alumina film.

9. The capacitor according to claim 1 , wherein the pair of electrodes is made of Pt or Ru.

10. The capacitor according to claim 1 , wherein the alumina film is formed by an ALD method.

11. 2. The capacitor according to claim 1, wherein the pair of electrodes are formed by RF sputtering.

12. The capacitor of claim 1 further comprising a support plate bonded to one of the pair of electrodes.

13. The capacitor of claim 12 , wherein the support plate is an alumina substrate.

14. An electrical appliance comprising the capacitor according to any one of claims 1 to 13.

15. forming an alumina film on an impurity-doped silicon substrate; forming electrodes on the surfaces of the impurity-doped silicon substrate and the alumina film; A method for manufacturing a capacitor, comprising:

16. The method for manufacturing a capacitor according to claim 15, further comprising the step of adhering the electrode on the surface of the impurity-doped silicon substrate or the alumina film to a support plate.

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