Inspection processing apparatus and method for manufacturing semiconductor device

Abstract

To provide an inspection processing apparatus and a method for manufacturing a semiconductor device that can improve efficiency.SOLUTION: An inspection processing apparatus includes a storage unit and a processing unit. The storage unit can store a feature amount distribution including first and second feature amount distribution areas related to a target device. The processing unit can execute the present first inspection related to the target device on the basis of the first and second feature amount distribution areas stored in the storage unit. The feature amount distribution relates to a first past inspection result and a second past inspection result of past first inspection related to the target device. The second past inspection result is acquired by second inspection after past first processing that is performed after the past first inspection. A first fraction defective of the second past inspection result corresponding to the first feature amount distribution area is higher than a second fraction defective of the second past inspection result corresponding to the second feature amount distribution area.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] An embodiment of the present invention relates to an inspection processing apparatus and a method for manufacturing a semiconductor device. [Background technology]

[0002] For example, various types of inspections are performed during the manufacture of target devices such as semiconductor devices, and it is desirable to improve the efficiency of the inspections. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Special Publication No. 2019-525450 Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments provide an inspection processing apparatus and a method for manufacturing a semiconductor device that can improve efficiency. [Means for solving the problem]

[0005] According to an embodiment, an inspection processing device includes a storage unit and a processing unit. The storage unit is capable of storing a feature distribution including a first feature distribution region related to a target device and a second feature distribution region related to the target device. The processing unit is capable of performing a current first inspection on the target device based on the first feature distribution region and the second feature distribution region stored in the storage unit. The feature distribution relates to a first past inspection result and a second past inspection result of the past first inspection on the target device. The second past inspection result is obtained by a past second inspection of the target device after the past first inspection. A first defect rate of the second past inspection result corresponding to the first feature distribution region is higher than a second defect rate of the second past inspection result corresponding to the second feature distribution region. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a flowchart illustrating the operation of the inspection processing apparatus according to the first embodiment. [Diagram 2] FIG. 2 is a block diagram illustrating the inspection processing apparatus according to the first embodiment. [Diagram 3] FIG. 3 is a schematic view illustrating characteristics used in the operation of the inspection processing apparatus according to the first embodiment. [Figure 4] FIG. 4 is a schematic view illustrating characteristics used in the operation of the inspection processing apparatus according to the first embodiment. [Diagram 5] FIG. 5 is a schematic view illustrating a result of the operation of the inspection processing apparatus according to the first embodiment. [Figure 6] FIG. 6 is a schematic view illustrating a result of the operation of the inspection processing apparatus according to the first embodiment. [Figure 7] FIG. 7 is a flowchart illustrating the operation of the inspection processing apparatus according to the first embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In this specification and each drawing, elements similar to those described above with reference to the previous drawings are given the same reference numerals and detailed descriptions thereof will be omitted as appropriate.

[0008] (First embodiment) FIG. 1 is a flowchart illustrating the operation of the inspection processing apparatus according to the first embodiment. FIG. 2 is a block diagram illustrating the inspection processing apparatus according to the first embodiment. 3 and 4 are schematic views illustrating characteristics used in the operation of the inspection processing apparatus according to the first embodiment.

[0009] 2, the inspection processing device 110 according to the embodiment includes a memory unit 76m and a processing unit 76p. The processing unit 76p may include, for example, a calculation device (e.g., a computer, etc.). The memory unit 76m may include any memory (including a hard disk, etc.). The inspection processing device 110 may include an interface 76f, a display 76d, and an input device 76i, etc. The input device 76i may include, for example, at least one of a keyboard, a touch panel, and a mouse.

[0010] In the inspection processing device 110, the storage unit 76m can store a feature distribution related to a target device of inspection. The target device includes, for example, various electronic devices, etc. In one example, the target device may include a semiconductor device.

[0011] The feature distribution includes a plurality of feature regions for the target device. In one example, the feature distribution includes a region with multiple dimensions. The region with multiple dimensions is, for example, divided into a plurality of sub-regions. For example, the feature distribution includes a first feature distribution region for the target device and a second feature distribution region for the target device.

[0012] FIG. 4 illustrates an example of a feature distribution FD. In this example, the feature distribution FD is two-dimensional. In this example, the feature distribution FD is shown in two dimensions including a first feature F1 and a second feature F2. The feature distribution FD is expressed by the first feature F1 and the second feature F2.

[0013] As shown in Fig. 4, the first feature distribution region FR1 is one region in two dimensions. The second feature distribution region FR2 is another region in two dimensions. In this way, the feature distribution FD is divided into multiple regions by multiple features.

[0014] The processing unit 76p is capable of performing a first inspection (current first inspection) on a target device (eg, a semiconductor device) based on the first feature amount distribution region FR1 and the second feature amount distribution region FR2 stored in the storage unit 76m.

[0015] In one example, when the target device is a semiconductor device, the above-mentioned "current first inspection" is an inspection of crystal defects of a semiconductor included in the semiconductor device. For example, an image (such as a microscope image) showing the crystal defects is acquired. For example, a feature amount relating to the shape of the crystal defect or the like may be derived from the image showing the crystal defects. Based on the derived feature amount, a first inspection of the target device (such as a semiconductor device) is performed. In one example, the feature amount may be defined by a multi-dimensional vector or the like (for example, a 128-dimensional value group) or the like.

[0016] The feature distribution FD relates to a first past inspection result of a first past inspection of a target device (such as a semiconductor device) and a second past inspection result. The second past inspection result is obtained by a second past inspection of the target device after a first past process (post-process) that is performed after the first past inspection. For example, the "first past inspection," "first past process," and "second past inspection" are performed in this order.

[0017] In one example, the "past first inspection" is an inspection of crystal defects of a wafer of a semiconductor device. In one example, in the "past first processing", various processing is performed on the wafer after the first inspection is completed. The various processing includes, for example, formation of a semiconductor layer, patterning, and formation of electrodes. A semiconductor device is fabricated from the wafer by the "past first processing". After this, a "past second inspection" is performed. In the "past second inspection", for example, an inspection of the electrical characteristics of the semiconductor device is performed. In the "past second inspection", an appearance inspection of the semiconductor device may also be performed.

[0018] The result of the "second past inspection" may be related to the result of the "first past inspection." For example, the second past inspection result is linked to the first past inspection result. Such first past inspection result and second past inspection result are stored in the memory unit 76m.

[0019] FIG. 3 illustrates an example of a feature distribution FD. The feature distribution FD is based on the results of a "first past inspection" and a "second past inspection" for a target device (e.g., a semiconductor device). The horizontal axis of FIG. 3 is the first feature F1. The vertical axis of FIG. 3 is the second feature F2. The first feature F1 and the second feature F2 are based on the first past inspection result and the second past inspection result. In this example, the "first past inspection" is an inspection of crystal defects in a semiconductor device. The "second past inspection" is an inspection of electrical characteristics in a semiconductor device.

[0020] The black circle RS1 and the white circle RS2 illustrated in Fig. 3 indicate the first feature F1 and the second feature F2 of a defective result (e.g., crystal defect) in the "past first inspection". The black circle RS1 corresponds to a defect (crystal defect) in the "past first inspection" and also a defect (abnormal electrical characteristics) in the "past second inspection". The white circle RS2 corresponds to a defect (crystal defect) in the "past first inspection" but good (normal electrical characteristics) in the "past second inspection".

[0021] As shown in FIG. 3, in the feature distribution FD, there is a region (first feature distribution region FR1) where the occurrence density of black circles RS1 is high. In this region, if a defect is found in the first inspection, it is highly likely to be defective in the second inspection. Defects (crystal defects) in the first inspection included in this region are highly likely to cause defects in the second inspection. Defects in the first inspection included in this region have high "killer characteristics." In the first feature distribution region FR1, there is a high correlation between the results of the first inspection and the results of the second inspection.

[0022] On the other hand, in the region other than the first feature amount distribution region FR1, the correlation between the results of the first inspection and the results of the second inspection is low.

[0023] Based on such past inspection results, a feature distribution FD as shown in Fig. 4 is obtained. As shown in Fig. 4, the feature distribution FD includes a first feature distribution region FR1 and a second feature distribution region FR2. The second feature distribution region FR2 may be, for example, a region excluding the first feature distribution region FR1.

[0024] A first defect rate of the second past inspection result (result of the second inspection) corresponding to the first feature distribution region FR1 is higher than a second defect rate of the second past inspection result (result of the second inspection) corresponding to the second feature distribution region FR2. A feature corresponding to the first feature distribution region FR1 indicates that the possibility of a defect is high in the second inspection. A feature corresponding to the second feature distribution region FR2 indicates that the possibility of a defect is relatively low in the second inspection. In the embodiment, a "current first inspection" is performed based on such first feature distribution region FR1 and second feature distribution region FR2.

[0025] As shown in FIG. 1, in an embodiment, for example, data of a "current first examination" is acquired (step S109). Features (e.g., a first feature F1 and a second feature F2, etc.) are derived from the data of the "current first examination" (step S110). The derived features are compared with a first feature distribution region FR1 based on past data (step S111). At this time, information on the first feature distribution region FR1 and the second feature distribution region FR2 is read out from the storage unit 76m and used. Steps S110 and S111 correspond to at least a part of the "current first examination".

[0026] If the derived feature is in the first feature distribution region FR1, it is determined to be defective (step S112). For example, data (flag) indicating "defective" is output. For example, data indicating "defective" may be recorded.

[0027] By such a process, the first inspection can be performed with high efficiency. According to the embodiment, it is possible to provide an inspection processing apparatus capable of improving efficiency. The first inspection can be performed with high accuracy.

[0028] As shown in FIG. 1, in step S111, a first process is performed on a target device (e.g., a semiconductor device) (step S130). After that, a second inspection (e.g., an electrical characteristic inspection) is performed, and data of the second inspection is obtained (step S119). The data of the second inspection is compared with a determined standard, and the result of the second inspection is judged (step S120). If the result of the second inspection is bad, it is judged as bad (step S122). If the result of the second inspection is good, it is judged as good (step S123).

[0029] 5 and 6 are schematic views illustrating results of the operation of the inspection processing apparatus according to the first embodiment. FIG. 5 illustrates the result of the "current first inspection" for the first sample SPL1. FIG. 6 illustrates the result of the "current first inspection" for the second sample SPL2. In this example, as shown in FIG. 5, a plurality of feature quantities V1 are derived for the first sample SPL1. The plurality of feature quantities V1 are not included in the first feature quantity distribution region FR1. The first sample SPL1 is determined to be good. As shown in FIG. 6, a plurality of feature quantities V1 are derived for the second sample SPL2. At least one of the plurality of feature quantities V1 is included in the first feature quantity distribution region FR1 for the second sample SPL2. The second sample SPL2 is determined to be bad.

[0030] In the embodiment, for example, the processing unit 76p can output a defective judgment result when the result of the "current first inspection" corresponds to the first feature distribution region FR1. The processing unit 76p can not output a defective judgment result when the result of the "current first inspection" corresponds to the second feature distribution region FR2.

[0031] The processing unit 76p may be capable of storing the above-mentioned determination result in the storage unit 76m.

[0032] For example, the "current first test" and the "past first test" may include an image test of the target device, and the "past second test" may include an electrical property test of the target device.

[0033] In one example, the target device is a semiconductor device including a semiconductor. The "current first inspection" and the "past first inspection" include an inspection of crystal defects in a semiconductor. The "past second inspection" may include at least one of an electrical characteristic inspection of the target device (e.g., a semiconductor device) and an appearance inspection of the target device (e.g., a semiconductor device).

[0034] In one example, the semiconductor includes SiC. In a semiconductor device including SiC, crystal defects of SiC tend to affect electrical characteristics. When the embodiment is applied to a semiconductor device including SiC, higher efficiency is likely to be obtained.

[0035] For example, the inspection of the crystal defect may include deriving a crystal defect feature amount that indicates a feature of an image of the crystal defect included in the semiconductor. For example, the crystal defect feature amount indicates a feature of the shape of the image of the crystal defect.

[0036] The semiconductor device to which the embodiment is applied may include a plurality of semiconductor chips provided on a wafer including a semiconductor. Inspection is performed in the wafer state. Inspection of crystal defects is performed on each of the plurality of semiconductor chips.

[0037] For example, inspection of crystal defects may include deriving crystal defect feature amounts that indicate image characteristics of crystal defects contained in a semiconductor using a deep neural network (DNN).

[0038] For example, the processing unit 76p may be further capable of deriving a feature distribution FD based on the first past inspection result and the second past inspection result.

[0039] The processing unit 76p may be capable of storing the derived feature amount distribution FD in the storage unit 76m.

[0040] The derivation of the feature distribution FD may include compressing the dimensions of at least one of the first past inspection result and the second past inspection result. The derivation of the feature distribution FD may include, for example, deriving a first feature distribution region FR1 and a second feature distribution region FR2 from the first past inspection result and the second past inspection result by processing the first past inspection result and the second past inspection result based on at least one selected from the group consisting of Euclidean distance, standard Euclidean distance, Mahalanobis distance, Manhattan distance, Chebyshev distance, and Minkowski distance.

[0041] FIG. 7 is a flowchart illustrating the operation of the inspection processing apparatus according to the first embodiment. In the example of FIG. 7, the target device is a semiconductor device including SiC. For example, in the first inspection, a wafer including SiC is inspected. As shown in FIG. 7, an alignment mark is formed on the wafer (step S101). For example, the position of a semiconductor chip in the surface of the wafer is set. For example, the wafer is inspected for crystal defects (step S102). For example, the crystal defects are linked to the position of the semiconductor chip.

[0042] For example, a feature is derived from an inspection image of crystal defects for each chip (e.g., step S110). The derived feature is compared with a feature distribution region (first feature distribution region FR1) (step S103). It is determined whether the derived feature is in a feature distribution region corresponding to a good product (second feature distribution region FR2) (step S111). If the derived feature is not in a feature distribution region corresponding to a good product (second feature distribution region FR2), it is determined to be defective (step S112).

[0043] In step S111, if the derived feature is in a feature distribution region corresponding to good (second feature distribution region FR2), the remaining process (first processing) is performed (step S130). An inspection process (second inspection) is performed on the target device (semiconductor device) after the remaining process (first processing) is performed (step S119). The result of the inspection process (second inspection) is judged as good / bad (step S120). In step S120, if the result is good, the chip is judged as good (step S123). In step S120, if the result is negatively bad, the chip is judged as bad (step S122).

[0044] In the above steps S130 and S111, the feature amount distribution FD (the first feature amount distribution region FR1 and the second feature amount distribution region FR2) stored in the storage unit 76m is used.

[0045] 7, for example, in step S230, a first feature distribution region FR1 and a second feature distribution region FR2 are defined. The first feature distribution region FR1 is a region of a characteristic corresponding to a result of the second inspection being bad. For example, the first feature distribution region FR1 is a region including a cluster with a high frequency of failures in an electrical test.

[0046] For example, the second feature distribution region FR2 is a region of a feature corresponding to a second inspection result being good. For example, the second feature distribution region FR2 is a region including a cluster uncorrelated with the electrical test result.

[0047] As shown in Fig. 7, for example, a database is stored in the storage unit 76m. In the database, for example, crystal defect inspection results and electrical test results are linked for each chip and stored. For example, features of a group of crystal defect inspection images are derived (step S210). For example, the derived feature distribution FD is divided for each cluster (step S220). The feature distribution FD is divided into a plurality of regions. As a result, a first feature distribution region FR1 and a second feature distribution region FR2 are defined.

[0048] 7, the inspection result for crystal defects obtained in step S102 may be stored in storage unit 76m. For example, step S210 may be performed periodically. The inspection result obtained in step S119 (result of the second inspection) may be stored in storage unit 76m. Second embodiment The second embodiment relates to a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device according to the embodiment performs a first inspection using, for example, a memory unit 76m and a processing unit 76p. The memory unit 76m is capable of storing a feature distribution FD. The feature distribution FD includes a first feature distribution region FR1 related to the semiconductor device and a second feature distribution region FR2 related to the semiconductor device. The processing unit 76p is capable of performing a "current first inspection" on the semiconductor device based on the first feature distribution region FR1 and the second feature distribution region FR2 stored in the memory unit 76m.

[0049] The feature distribution FD relates to a first past inspection result of a past first inspection on the semiconductor device and a second past inspection result. The second past inspection result is acquired by a "second past inspection" of the semiconductor device after a "first past process" performed after the "first past inspection". The second past inspection result is linked to the first past inspection result. A first defect rate of the second past inspection result corresponding to the first feature distribution region FR1 is higher than a second defect rate of the second past inspection result corresponding to the second feature distribution region FR2. In the embodiment, the semiconductor device can be inspected with high efficiency.

[0050] In the second embodiment, the semiconductor device includes a semiconductor. The "current first inspection" and the "past first inspection" include an inspection of crystal defects in the semiconductor. The "past second inspection" includes at least one of an electrical characteristic inspection of the semiconductor device and an appearance inspection of the semiconductor device. The semiconductor includes, for example, SiC.

[0051] The manufacturing method of the semiconductor device according to the embodiment may further include performing a "current first process" on the semiconductor device after the "current first inspection". The manufacturing method of the semiconductor device according to the embodiment may further include performing a "current second inspection" on the semiconductor device after the "current first process" has been performed.

[0052] The embodiments may include the following technical solutions. (Technical proposal 1) a storage unit capable of storing a feature distribution including a first feature distribution region related to a target device and a second feature distribution region related to the target device; a processing unit capable of performing a current first inspection on the target device based on the first feature distribution region and the second feature distribution region stored in the storage unit; Equipped with The feature distribution is related to a first past inspection result and a second past inspection result of the first inspection of the target device, the second past inspection result is obtained by a past second inspection of the target device after the past first inspection, a first defect rate of the second past inspection result corresponding to the first feature amount distribution region is higher than a second defect rate of the second past inspection result corresponding to the second feature amount distribution region.

[0053] (Technical proposal 2) the processing unit is capable of outputting a determination result of a defect when the current result of the first inspection corresponds to the first feature amount distribution region, The inspection processing device described in Technical Proposal 1, wherein the processing unit is capable of not outputting the judgment result of failure when the result of the current first inspection corresponds to the second feature distribution region.

[0054] (Technical proposal 3) The inspection processing device according to technical proposal 1 or 2, wherein a past first process is performed between the past first inspection and the past second inspection.

[0055] (Technical proposal 4) the current first inspection and the past first inspection include an imaging inspection of the target device; The inspection processing apparatus according to any one of Technical Schemes 1 to 3, wherein the second inspection in the past includes an electrical characteristic inspection of the target device.

[0056] (Technical proposal 5) the target device is a semiconductor device including a semiconductor, the current first inspection and the past first inspection include an inspection of a crystal defect of the semiconductor, The inspection processing apparatus according to any one of Technical Proposals 1 to 3, wherein the second inspection in the past includes at least one of an electrical characteristic inspection of the target device and an appearance inspection of the target device.

[0057] (Technical proposal 6) The inspection processing device described in Technical Proposal 5, wherein the semiconductor includes SiC.

[0058] (Technical proposal 7) The inspection processing apparatus described in Technical Proposal 5, wherein the inspection of the crystal defect includes deriving a crystal defect feature quantity indicating an image characteristic of the crystal defect contained in the semiconductor.

[0059] (Technical proposal 8) The inspection processing device described in Technical Proposal 7, wherein the crystal defect feature amount indicates a characteristic of the shape of the image of the crystal defect.

[0060] (Technical proposal 9) The semiconductor device includes a plurality of semiconductor chips provided on a wafer including the semiconductor, The inspection processing apparatus according to any one of Technical Solutions 5 to 8, wherein the inspection for the crystal defects is performed for each of the plurality of semiconductor chips.

[0061] (Technical proposal 10) The inspection processing device described in Technical Proposal 5, wherein the inspection of the crystal defects includes deriving a crystal defect feature quantity indicating image characteristics of the crystal defect contained in the semiconductor using a DNN (Deep Neural Network).

[0062] (Technical proposal 11) The inspection processing apparatus according to any one of Technical Solutions 7 to 10, wherein the feature amount distribution is two-dimensional.

[0063] (Technical proposal 12) the feature distribution is two-dimensional and includes a first feature and a second feature, the first feature distribution region is one region in the two dimensions, The inspection processing apparatus according to any one of Technical Solutions 7 to 10, wherein the second feature amount distribution region is another region in the two dimensions.

[0064] (Technical proposal 13) The inspection processing device according to any one of Technical Schemes 1 to 12, wherein the processing unit is further capable of deriving the feature distribution based on the first past inspection result and the second past inspection result.

[0065] (Technical proposal 14) The inspection processing device described in Technical Proposal 13, wherein the processing unit is capable of storing the derived feature distribution in the memory unit.

[0066] (Technical proposal 15) The inspection processing device according to Technical Proposal 13 or 14, wherein the derivation of the feature distribution includes compressing a dimension of at least one of the first past inspection result and the second past inspection result.

[0067] (Technical proposal 16) The inspection processing device described in any one of Technical Proposals 13 to 15, wherein the derivation of the feature distribution includes deriving the first feature distribution region and the second feature distribution region by processing the first past inspection result and the second past inspection result based on at least one selected from the group consisting of Euclidean distance, standard Euclidean distance, Mahalanobis distance, Manhattan distance, Chebyshev distance, and Minkowski distance.

[0068] (Technical proposal 17) a storage unit capable of storing a feature distribution including a first feature distribution region related to a semiconductor device and a second feature distribution region related to the semiconductor device; a processing unit capable of performing a current first inspection on the semiconductor device based on the first feature amount distribution region and the second feature amount distribution region stored in the storage unit; The first inspection is carried out using The feature distribution is related to a first past inspection result and a second past inspection result of the first inspection on the semiconductor device, the second past inspection result is obtained by a past second inspection of the semiconductor device after the past first inspection, A method for manufacturing a semiconductor device, wherein a first defect rate of the second past inspection result corresponding to the first feature distribution region is higher than a second defect rate of the second past inspection result corresponding to the second feature distribution region.

[0069] (Technical proposal 18) The semiconductor device includes a semiconductor, the current first inspection and the past first inspection include an inspection of a crystal defect of the semiconductor, The method for manufacturing a semiconductor device according to Technical Proposal 17, wherein the second inspection in the past includes at least one of an electrical characteristic inspection of the semiconductor device and an appearance inspection of the semiconductor device.

[0070] (Technical proposal 19) The method for manufacturing a semiconductor device according to Technical Proposal 18, wherein the semiconductor includes SiC.

[0071] (Technical proposal 20) further performing a current first process on the semiconductor device after the current first test; The method for manufacturing a semiconductor device according to Technical Scheme 17 or 18, further comprising: performing a current second inspection on the semiconductor device after the current first processing has been performed.

[0072] According to the embodiment, it is possible to provide an inspection processing apparatus and a method for manufacturing a semiconductor device that can improve efficiency.

[0073] The above describes the embodiment of the present invention with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configuration of each element, such as a memory unit and a processing unit, included in the inspection processing device is included in the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting from a known range.

[0074] Furthermore, any combination of two or more elements of each of the specific examples, within the scope of technical feasibility, is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0075] In addition, all inspection processing devices and semiconductor device manufacturing methods that can be implemented by a person skilled in the art by making appropriate design modifications based on the inspection processing device and semiconductor device manufacturing method described above as embodiments of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.

[0076] In addition, within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0077] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0078] 76d: display; 76f: interface; 76i: input device; 76m: memory unit; 76p: processing unit; 110: inspection processing device; F1, F2: first and second feature amounts; FD: feature amount distribution; FR1, FR2: first and second feature amount distribution areas; RS1: black circle; RS2: white circle; SPL1, SPL2: first and second samples; V1: feature amount

Claims

1. a storage unit capable of storing a feature distribution including a first feature distribution region related to a target device and a second feature distribution region related to the target device; a processing unit capable of performing a current first inspection on the target device based on the first feature distribution region and the second feature distribution region stored in the storage unit; Equipped with The feature distribution is related to a first past inspection result and a second past inspection result of the first inspection of the target device, the second past inspection result is obtained by a past second inspection of the target device after the past first inspection, a first defect rate of the second past inspection result corresponding to the first feature distribution region is higher than a second defect rate of the second past inspection result corresponding to the second feature distribution region.

2. the processing unit is capable of outputting a determination result of a defect when the current result of the first inspection corresponds to the first feature amount distribution region, The inspection processing apparatus according to claim 1 , wherein the processing unit is capable of not outputting the judgment result of failure when the result of the current first inspection corresponds to the second feature amount distribution region.

3. The inspection processing apparatus according to claim 1 , wherein a past first process is performed between the past first inspection and the past second inspection.

4. the current first inspection and the past first inspection include an imaging inspection of the target device; The inspection processing apparatus according to claim 1 , wherein the second inspection in the past includes an electrical characteristic inspection of the target device.

5. the target device is a semiconductor device including a semiconductor, the current first inspection and the past first inspection include an inspection of a crystal defect of the semiconductor; 4. The inspection processing apparatus according to claim 1, wherein the second inspection in the past includes at least one of an electrical characteristic inspection of the target device and an appearance inspection of the target device.

6. The inspection processing apparatus according to claim 5 , wherein the inspection of the crystal defect includes deriving a crystal defect feature amount indicating a feature of an image of the crystal defect included in the semiconductor.

7. The semiconductor device includes a plurality of semiconductor chips provided on a wafer including the semiconductor, 6. The inspection processing apparatus according to claim 5, wherein the inspection for the crystal defects is performed for each of the plurality of semiconductor chips.

8. the feature distribution is two-dimensional and includes a first feature and a second feature, the first feature amount distribution region is one region in the two-dimensional space, The inspection processing apparatus according to claim 6 , wherein the second feature amount distribution region is another region in the two-dimensional space.

9. a storage unit capable of storing a feature distribution including a first feature distribution region related to a semiconductor device and a second feature distribution region related to the semiconductor device; a processing unit capable of performing a current first inspection on the semiconductor device based on the first feature amount distribution area and the second feature amount distribution area stored in the storage unit; performing the first inspection using The feature distribution is related to a first past inspection result and a second past inspection result of the first inspection on the semiconductor device, the second past inspection result is obtained by a past second inspection of the semiconductor device after the past first inspection, A manufacturing method for a semiconductor device, wherein a first defect rate of the second past inspection result corresponding to the first feature distribution region is higher than a second defect rate of the second past inspection result corresponding to the second feature distribution region.

10. The semiconductor device includes a semiconductor, the current first inspection and the past first inspection include an inspection of a crystal defect of the semiconductor; The method for manufacturing a semiconductor device according to claim 9 , wherein the second inspection in the past includes at least one of an electrical characteristic inspection of the semiconductor device and an appearance inspection of the semiconductor device.

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