Semiconductor wafer handling device and semiconductor wafer test system

Abstract

To provide a semiconductor wafer handling device which can increase a speed of temperature control of a device under test (DUT).SOLUTION: A semiconductor wafer handling device 30 includes: a holding member 40 which holds a semiconductor wafer 100 while exposing upper and lower surfaces 101, 102 of the semiconductor wafer 100; a first moving device 50 which moves the holding member 40 relative to a probe card 20; a thermal head 60 which contacts with the lower surface 102 of the semiconductor wafer 100 to adjust a temperature of the DUT 110; and a second moving device 80 which moves the thermal head 60 relative to the semiconductor wafer 100 held by the holding device 40.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor wafer handling device that handles a semiconductor wafer in order to test a circuit element under test (DUT: Device Under Test) formed on the semiconductor wafer, and a semiconductor wafer test system equipped with the semiconductor wafer handling device. [Background technology]

[0002] A known wafer test system for inspecting semiconductor devices formed on a semiconductor wafer includes a wafer chuck for holding the semiconductor wafer and a temperature adjustment means for adjusting the temperature of the semiconductor wafer (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2007-129090 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the above semiconductor test system, the temperature adjustment means is placed inside the wafer chuck that holds the entire surface of the semiconductor wafer, and therefore the temperature adjustment means adjusts the temperature of the entire semiconductor wafer via the wafer chuck, which makes it difficult to quickly adjust the temperature according to the amount of heat generated by the DUT.

[0005] An object of the present invention is to provide a semiconductor wafer handling device and a semiconductor wafer test system that are capable of adjusting the temperature of a DUT at high speed. [Means for solving the problem]

[0006] [1] A first aspect of the present invention is a semiconductor wafer handling device that moves a semiconductor wafer on which a DUT is formed and presses terminals of the DUT arranged on a first surface of the semiconductor wafer against contacts of a probe card, the semiconductor wafer handling device comprising: a holding member that holds the semiconductor wafer while exposing the first and second surfaces of the semiconductor wafer; a first moving device that moves the holding member relative to the probe card; a temperature adjustment device that contacts the second surface of the semiconductor wafer to adjust the temperature of the DUT; and a second moving device that moves the temperature adjustment device relative to the semiconductor wafer held by the holding member.

[0007] [2] A second aspect of the present invention may be a semiconductor wafer handling apparatus according to the first aspect, wherein the temperature adjustment device has a first contact surface that contacts the second side of the semiconductor wafer, and the first contact surface has a size capable of contacting N of the DUTs formed on the semiconductor wafer, where N is a natural number greater than or equal to 1 and less than or equal to 8.

[0008] [3] A third aspect of the present invention may be a semiconductor wafer handling apparatus according to the first or second aspect, wherein the holding member holds an outer peripheral portion of the second surface of the semiconductor wafer while exposing the second surface, and the temperature adjustment device contacts an exposed portion of the second surface that is exposed from the holding member.

[0009] [4] A fourth aspect of the present invention may be a semiconductor wafer handling apparatus according to any one of the first to third aspects, wherein the holding member includes an annular holding portion that holds an outer peripheral portion of the second surface of the semiconductor wafer.

[0010] [5] A fifth aspect of the present invention may be a semiconductor wafer handling device according to the first or second aspect, wherein the holding member holds an outer peripheral portion of the first surface of the semiconductor wafer, and the temperature adjustment device contacts the second surface.

[0011] [6] A sixth aspect of the present invention may be a semiconductor wafer handling apparatus according to any one of the first, second, and fifth aspects, wherein the holding member is provided with an annular holding portion that holds an outer peripheral portion of the first surface of the semiconductor wafer.

[0012] [7] A seventh aspect of the present invention may be a semiconductor wafer handling apparatus according to any one of the first to sixth aspects, wherein the temperature adjustment device includes a contact member having a first contact surface that contacts the second side of the semiconductor wafer, and at least one of a heating device that heats the DUT via the contact member and a cooling device that cools the DUT via the contact member.

[0013] [8] Aspect 8 of the present invention may be a semiconductor wafer handling apparatus according to any one of aspects 1 to 6, wherein the temperature adjustment device is a semiconductor wafer handling apparatus including a heating device that contacts the second surface of the semiconductor wafer and heats the DUT, and a cooling block that has a flow path through which a refrigerant can flow and that holds the heating device.

[0014] [9] A ninth aspect of the present invention may be a semiconductor wafer handling apparatus according to the eighth aspect, wherein the cooling block is provided with a contact portion that surrounds the outer periphery of the heating device and contacts the second surface of the semiconductor wafer.

[0015]

[10] A tenth aspect of the present invention may be a semiconductor wafer handling apparatus according to the ninth aspect, wherein the heating device includes a planar heater having a third surface contacting the second surface of the semiconductor wafer and a fourth surface opposite the third surface, and the cooling block includes a second contact surface in contact with the fourth surface.

[0016]

[11] An eleventh aspect of the present invention may be the semiconductor wafer handling device of the ninth or tenth aspect, wherein the flow path passes through an inside of the contact portion.

[0017]

[12] A twelfth aspect of the present invention is the semiconductor wafer handling apparatus of any one of the eighth to eleventh aspects, wherein the semiconductor wafer handling apparatus includes a plurality of the temperature adjustment devices.

[0018]

[13] A thirteenth aspect of the present invention may be a semiconductor wafer handling apparatus according to the twelfth aspect, wherein the plurality of temperature adjustment devices individually correspond to the plurality of DUTs provided on the semiconductor wafer.

[0019]

[14] A fourteenth aspect of the present invention may be a semiconductor wafer handling apparatus according to any one of aspects one to thirteen, further comprising a control device that controls the first and second moving devices, and the control device controls the first and second moving devices to bring the holding member and the temperature adjustment device closer to the probe card in a pressing direction of the DUT against the probe card, thereby pressing the terminals of the DUT against the contacts of the probe card.

[0020]

[15] A fifteenth aspect of the present invention may be a semiconductor wafer handling apparatus according to any one of the first to fourteenth aspects, wherein the DUT comprises an optical connection portion of the semiconductor wafer, and the semiconductor wafer handling apparatus comprises an optical probe for inputting and outputting an optical signal to and from the optical connection portion, and a third moving device for moving the optical probe.

[0021]

[16] A sixteenth aspect of the present invention may be a semiconductor wafer handling apparatus according to the fifteenth aspect, wherein the terminal is arranged on the first surface of the semiconductor wafer, and the optical connection portion is arranged on the second surface of the semiconductor wafer.

[0022]

[17] A seventeenth aspect of the present invention may be a semiconductor wafer handling apparatus according to any one of the fifteenth or sixteenth aspects, wherein the temperature adjustment device has a first contact surface that contacts the second surface of the semiconductor wafer and a recess that opens into the first contact surface, and the optical probe is inserted into the recess so as to be movable relative to the temperature adjustment device.

[0023]

[18] Aspect 18 of the present invention may be a semiconductor wafer handling apparatus according to aspect 15 or 16, wherein the temperature adjustment device has a first contact surface that contacts the second surface of the semiconductor wafer and an insertion hole that opens into the first contact surface, and the optical probe is inserted into the insertion hole so as to be movable relative to the temperature adjustment device.

[0024]

[19] A nineteenth aspect of the present invention may be the semiconductor wafer handling device of any one of the fifteenth to eighteenth aspects, wherein the optical probe is provided with an optical transmission path capable of transmitting the optical signal.

[0025]

[20] A twentieth aspect of the present invention may be the semiconductor wafer handling device of any one of the fifteenth to nineteenth aspects, wherein the optical connecting portion includes a grating coupler.

[0026]

[21] A twenty-first aspect of the present invention may be a semiconductor wafer handling apparatus according to any one of aspects fifteen to twenty, wherein the second moving device moves the temperature adjustment device and the third moving device relative to the semiconductor wafer held by the holding member.

[0027]

[22] A twenty-second aspect of the present invention may be a semiconductor wafer handling apparatus according to the twenty-first aspect, wherein the second moving device includes a support member to which the temperature adjustment device and the third moving device are fixed, and the third moving device moves the optical probe relative to the temperature adjustment device.

[0028]

[23] Aspect 23 of the present invention is a semiconductor wafer handling apparatus according to any one of aspects 15 to 22, wherein the temperature adjustment device has a first contact surface that contacts the second side of the semiconductor wafer, and the first contact surface has a size capable of contacting N of the DUTs among a plurality of the DUTs formed on the semiconductor wafer, and the semiconductor wafer handling apparatus may be a semiconductor wafer handling apparatus comprising N of the optical probes arranged to correspond to the N DUTs, and N of the third moving devices that move the N of the optical probes independently of one another, where N is a natural number greater than or equal to 1 and less than or equal to 8.

[0029]

[24] A twenty-fourth aspect of the present invention may be a semiconductor wafer handling apparatus according to the twenty-third aspect, wherein the second moving device moves the temperature adjustment device and the N third moving devices relative to the semiconductor wafer held by the holding member.

[0030]

[25] A twenty-fifth aspect of the present invention is a semiconductor wafer testing system comprising a test apparatus for testing a DUT formed on a semiconductor wafer, a probe card electrically connected to the test apparatus, and a semiconductor wafer handling apparatus according to any one of aspects one to twenty-four. Effect of the Invention

[0031] In the present invention, a holding member holds a semiconductor wafer while exposing the first and second sides of the semiconductor wafer, and a temperature adjustment device separate from the holding member contacts the second side of the semiconductor wafer to adjust the temperature of the DUT, thereby enabling faster temperature adjustment of the DUT. [Brief description of the drawings]

[0032] [Figure 1] FIG. 1 is a diagram showing the overall configuration of a semiconductor wafer test system and the internal structure of a prober in the first embodiment of the present invention. [Diagram 2] FIG. 2 is a cross-sectional view of a thermal head and an optical probe unit in the first embodiment of the present invention, and a block diagram showing a control system. [Diagram 3] FIG. 3(a) is a plan view showing a holding member in the first embodiment of the present invention, and FIG. 3(b) is a cross-sectional view taken along line IIIB-IIIB in FIG. 3(a). [Figure 4] FIG. 4 is a plan view of the thermal head and the optical probe unit in the first embodiment of the present invention. [Diagram 5] 5(a) and 5(b) are a cross-sectional view and a plan view showing a modified example of the thermal head and the optical probe unit in the first embodiment of the present invention. [Figure 6] FIG. 6 is a cross-sectional view showing a probe card, a thermal head, and an optical probe unit in the second embodiment of the present invention. [Figure 7] FIG. 7 is a cross-sectional view showing a probe card and a thermal head in a third embodiment of the present invention. [Figure 8] 8(a) to 8(c) are cross-sectional views showing a method for pressing a semiconductor wafer against a probe card by a prober in the first embodiment of the present invention. [Figure 9] FIG. 9 is a diagram showing the overall configuration of a semiconductor wafer test system and the internal structure of a prober in the fourth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0033] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0034] Fig. 1 is a diagram showing the overall configuration of a semiconductor wafer testing system 1 and the internal structure of a prober 30 in a first embodiment of the present invention. Fig. 2 is a cross-sectional view of a thermal head 60 and an optical probe unit 70 in the first embodiment of the present invention, and a block diagram showing a control system. Figs. 3(a) and 3(b) are a plan view and a cross-sectional view showing a holding member 40 in the first embodiment of the present invention. Fig. 4 is a plan view of the thermal head 60 and the optical probe unit 70 in the first embodiment of the present invention.

[0035] A semiconductor wafer test system 1 according to a first embodiment of the present invention is a system for testing a DUT 110 formed on a semiconductor wafer 100. As shown in Fig. 1, the semiconductor wafer test system 1 includes a tester 10, a probe card 20, and a prober 30. The prober 30 corresponds to an example of a "semiconductor wafer handling device" in an aspect of the present invention.

[0036] A plurality of DUTs 110 are formed on the semiconductor wafer 100. Each DUT 110, which is a test target of the semiconductor wafer test system 1, is a device capable of handling electric signals and optical signals, and is a composite circuit element equipped with an electronic circuit and an optical circuit. The optical circuit is formed, for example, by using silicon photonics technology. The DUT 110 includes a terminal 111 for inputting and outputting electric signals, and an optical connection unit 112 for inputting and outputting optical signals. Although not particularly limited, a specific example of the optical connection unit 112 may be, for example, a grating coupler. The terminal 111 is disposed on the upper surface (first surface) 101 of the semiconductor wafer 100, whereas the optical connection unit 112 is disposed on the lower surface (second surface) 102 of the semiconductor wafer 100.

[0037] When testing the DUT 110, an electrical signal is input to and output from the DUT 110 via the terminal 111, and an optical signal is input to and output from the DUT 110 via the optical connection section 112. For example, when this test is completed, the semiconductor wafer 100 is diced to separate the DUTs 110, and the separated DUTs 110 are mounted on a substrate to which an optical fiber or the like is connected to become a final product. This final product is, for example, a CPO (Co-Packaged Optics) device.

[0038] The tester 10 is a test apparatus that tests a semiconductor device 100 using electrical and optical signals, and includes a test head 11 and a main frame (tester body) 12, as shown in Fig. 1, and the test head 11 is connected to the main frame 12 via a cable. A probe card 20 is electrically connected to the test head 11. The probe card 20 enters the inside of the prober 30 through an opening 32 formed in an upper base 31 of the prober 30. The probe card 20 is fixed relatively to the prober 30.

[0039] Probe card 20 includes wiring board 21 and probe head 22 mounted on wiring board 21. Probe head 22 corresponds to one DUT 110 on semiconductor wafer 100. Probe head 22 includes a plurality of probes 23 and a housing 24, as shown in Fig. 2. Probe 23 corresponds to an example of a "contactor" in this embodiment of the present invention.

[0040] The probe 23 is an electric probe that comes into contact with a terminal 111 of the DUT 110 of the semiconductor wafer 100. The multiple probes 23 are arranged to correspond to the multiple terminals 111 of one DUT 110 on the semiconductor wafer 100. Although not particularly limited, specific examples of the probe 23 include a pogo pin, a vertical probe needle, a cantilever probe needle, an anisotropic conductive rubber sheet, a bump provided on a membrane, or a contactor manufactured using MEMS technology.

[0041] Probe 23 is held in housing 24, and housing 24 is fixed to wiring board 21 by screws or the like, thereby mounting probe head 22 on wiring board 21. Note that wiring board 21 may directly hold probe 23, in which case housing 24 can be omitted.

[0042] 1 and 2, the prober 30 includes a holding member 40, a first moving device 50, a thermal head 60, an optical probe unit 70, a second moving device 80, and a control device 90. The thermal head 60 corresponds to an example of a "temperature adjustment device" in an aspect of the present invention.

[0043] In this embodiment, the semiconductor wafer 100 held by the holding member 40 is positioned relative to the probe card 20 by the first moving device 50. In addition, the second moving device 80 brings the thermal head 60 into contact with the lower surface 102 of the semiconductor wafer 100, and the thermal head 60 adjusts the temperature of the DUT 110. Then, the first and second moving devices 50 and 80 press the semiconductor wafer 100 against the probe card 20 to electrically connect them. In this state, the optical probe unit 70 positions the optical probe 71 relative to the optical connection portion 112 of the DUT 110, and then the tester 10 inputs and outputs electrical signals to and from the DUT 110 via the probe card 20 and inputs and outputs optical signals to and from the DUT 110 via the optical connection portion 112, thereby testing the DUT 110.

[0044] The holding member 40 is a member that holds the semiconductor wafer 100. The holding member 40 holds the lower surface 102 of the semiconductor wafer 100, and the entire upper surface 101 of the semiconductor wafer 100 is exposed. As shown in FIG. 3(a) and FIG. 3(b), the holding member 40 has a circular annular holding portion 41. The holding portion 41 has an opening 42 having an inner diameter smaller than the outer diameter of the semiconductor wafer 100. Therefore, the holding portion 41 holds the outer peripheral portion of the lower surface 102 of the semiconductor wafer 100, and the portion of the lower surface 102 of the semiconductor wafer 100 other than the outer peripheral portion (the portion of the lower surface 102 of the semiconductor wafer 100 that is inside the outer peripheral portion) is exposed through the opening 42. The holding member 40 may have a holding mechanism that suction-holds the outer peripheral portion of the semiconductor wafer 100. Alternatively, the holding member 40 may have a holding mechanism that holds the outer peripheral portion of the semiconductor wafer 100 by mechanical clamping.

[0045] The first moving device 50 is a device that moves the holding member 40. The first moving device 50 can move the holding member 40 in the XYZ axis directions in the figure and rotate it around the Z axis (θz). The first moving device 50 aligns the semiconductor wafer 100 with respect to the probe card 20 so that the terminals 111 of the DUT 110 face the probes 23 of the probe head 22, respectively. The first moving device 50 is fixed to the frame of the prober 30, for example. The installation position of the first moving device 50 is not particularly limited to the above, as long as it is fixed relatively to the frame of the prober 30. For example, the first moving device 50 may be fixed to the upper base 31 or the lower base 32 of the prober 30.

[0046] Although not particularly limited, the first moving device 50 includes, for example, an actuator, a transmission mechanism, and a guide mechanism. Although not particularly limited, a specific example of the actuator can be, for example, a motor including an electric motor (rotary motor, linear motor, etc.) or an electric actuator including the electric motor, etc., while a specific example of the transmission mechanism can be, for example, a ball screw mechanism, and an example of the guide mechanism can be, for example, a linear guide mechanism including a guide rail and a block that can slide on the guide rail.

[0047] The thermal head 60 is a temperature adjustment device that contacts the lower surface 102 of the semiconductor wafer 100 to adjust the temperature of the DUT 110. As shown in FIG. 2, the thermal head 60 includes a contact member 61, a heater 65, a flow path 66, and a temperature sensor 67.

[0048] The contact member 61 is a block-shaped member having a flat contact surface 62 that contacts the lower surface 102 of the semiconductor wafer 100. The heater 65 is embedded in the contact member 61. The heater 65 is provided inside the contact member 61 so as to cover the entire contact surface 62. Although not particularly limited, specific examples of the heater 65 include an aluminum nitride heater, a silicon nitride heater, a ceramic heater such as a PTC heater, a polyimide heater, and a cartridge heater. The heater 65 is connected to a control device 90, and generates heat by power supplied from the control device 90 to heat the DUT 110 via the contact member 61. The contact surface 62 corresponds to an example of a "first contact surface" in an aspect of the present invention.

[0049] In addition, a flow path 66 through which a coolant having a temperature lower than room temperature passes is formed inside the contact member 61. This flow path 66 is also provided inside the contact member 61 so as to correspond to the entire area of ​​the contact surface 62. A coolant supply device 68 is connected to this flow path 66, and the coolant supplied from this coolant supply device 68 passes through the flow path 66, thereby cooling the DUT 110 via the contact member 61. As the coolant flowing through this flow path 66, a liquid or a gas may be used. Although not particularly limited, specific examples of the liquid coolant include water and a fluorine-based inert liquid. On the other hand, specific examples of the gas coolant include air and nitrogen.

[0050] The configuration of the temperature adjustment device that adjusts the temperature of the DUT 110 is not particularly limited to the above. For example, instead of a heater, a hot medium at a temperature higher than room temperature may be passed through a flow path in the contact member 61. Alternatively, a Peltier element may be used as the heater, or a Peltier element may be used instead of the coolant. Also, the temperature adjustment device does not have to include either the heating device or the cooling device.

[0051] A temperature sensor 67 is also embedded in the contact member 61. The temperature sensor 67 is provided inside the contact member 61 so as to be located in the vicinity of the contact surface 62. This temperature sensor 67 detects the temperature of the DUT 110 via the contact surface 62. The temperature sensor 67 is connected to the control device 90 so as to be able to output the detection result.

[0052] 2 and 4, the optical probe unit 70 includes an optical probe 71 and a third moving device 74. The optical probe 71 is an optical input / output unit for inputting and outputting an optical signal to and from an optical connection unit 112 formed on the lower surface 102 of the semiconductor wafer 100. The optical probe 71 includes a pair of optical fibers 72a, 72b and a mirror 73.

[0053] Each of the optical fibers 72a and 72b is arranged so that its optical axis is along the XY plane in the figure, and the pair of optical fibers 72a and 72b are arranged substantially parallel to each other. The optical fibers 72a and 72b are connected to the tester 10 so as to be able to transmit optical signals. The mirror 73 is arranged on the optical axes of the optical fibers 72a and 72b.

[0054] When testing the DUT 110, with the tip of the optical probe 71 facing the optical connection portion 112 of the semiconductor wafer 100, an optical signal input from the tester 10 is output from one optical fiber 72a toward the mirror 73, and the optical signal is reflected by the mirror 73 and input to the optical connection portion 112 of the DUT 110. On the other hand, an optical signal output from the optical connection portion 112 of the DUT 110 is reflected by the mirror 73 and input to the tester 10 via the other optical fiber 72b. That is, in this embodiment, one optical fiber 72a functions as an input optical transmission path, and the other optical fiber 72b functions as an output optical transmission path.

[0055] In this embodiment, the optical probe 71 inputs and outputs an optical signal in a non-contact state with the optical connection unit 112 of the DUT 110, but the optical probe 71 may be in contact with the optical connection unit 112. Furthermore, the optical probe 71 may include optical elements other than the optical fibers 72a and 72b and the mirror 73 as an optical transmission path for transmitting an optical signal.

[0056] The optical probe 71 is supported by a third moving device 74. The third moving device 74 is an alignment device that positions the optical probe 71 with respect to the optical connection portion 112 of the semiconductor wafer 100. That is, in this embodiment, the alignment of the optical probe 71 with respect to the optical connection portion 112 can be performed independently of the alignment of the terminal 111 of the DUT 110 with respect to the electric probe 23 of the probe card 20. The third moving device 74 can move the optical probe 71 in the XY axis direction in the figure and rotate it around the Z axis (θz). Note that the degree of freedom of the third moving device 74 may be six degrees of freedom including movement in the Z axis direction and rotation around the X axis and Y axis (θx and θy) in addition to the above three degrees of freedom.

[0057] Although not particularly limited, the third moving device 74 includes, for example, an actuator, a transmission mechanism, and a guide mechanism. Although not particularly limited, a specific example of the actuator can be, for example, a motor including an electric motor (a rotary motor, a linear motor, etc.), or an electric actuator including the electric motor and a piezoelectric actuator (an actuator using a piezoelectric element), etc., while a specific example of the transmission mechanism can be, for example, a ball screw mechanism, and an example of the guide mechanism can be, for example, a linear guide mechanism including a guide rail and a block that can slide on the guide rail.

[0058] The second moving device 80 is a device that moves the thermal head 60 and the optical probe unit 70. As shown in Fig. 1, the second moving device 80 includes a support member 81 and an elevating mechanism 82 that moves the support member 81 along the Z-axis direction.

[0059] The thermal head 60 and the optical probe unit 70 are supported by a flat support member 81. Specifically, as shown in Fig. 2 and Fig. 4, the contact member 61 of the thermal head 60 and the third moving device 74 of the optical probe unit 70 are fixed to the support member 81. Therefore, the third moving device 74 is capable of moving the optical probe 71 relative to the thermal head 60.

[0060] A groove 63 is formed in the contact member 61 of the thermal head 60. This groove 63 is formed in the contact member 61 so that the groove 63 opens on the contact surface 62 that contacts the semiconductor wafer 100, and an optical probe 71 is inserted into this groove 63. Note that a space is provided between the optical probe 71 and the groove 63 so that the optical probe 71 can be moved and rotated by the third moving device 74 described above.

[0061] In this way, by overlapping the contact member 61 and the optical probe 71, the contact area of ​​the thermal head 60 with the DUT 110 can be increased while the optical probe 71 faces the optical connection portion 112 of the DUT 110. This allows the thermal head 60 to efficiently adjust the temperature of the DUT 110 and stably press the DUT 110 against the probe card 20. The groove 63 corresponds to an example of a "recess" in an aspect of the present invention.

[0062] 1, the lifting mechanism 82 is installed on the lower base 33 of the prober 30 so that the support member 81 faces the probe head 22 of the probe card 20 in the Z-axis direction in the figure. When the lifting mechanism 82 raises the support member 81, the thermal head 60 comes into contact with the lower surface 102 of the semiconductor wafer 100, and the tip of the optical probe 71 of the optical probe unit 70 faces the optical connection portion 112 of the DUT 110. The second moving device 80 is a moving device independent of the above-mentioned first moving device 50, and is capable of moving the thermal head 60 and the optical probe unit 70 independently of the holding member 40.

[0063] Although not limited thereto, the lifting mechanism 82 includes, for example, an actuator, a transmission mechanism, and a guide mechanism. Although not limited thereto, specific examples of the actuator include a motor including an electric motor (rotary motor, linear motor, etc.) and an electric actuator including the electric motor, etc., while specific examples of the transmission mechanism include a ball screw mechanism, and an example of the guide mechanism includes a linear guide mechanism including a guide rail and a block that can slide on the guide rail.

[0064] The configuration of the thermal head and the optical probe unit is not particularly limited to the above. For example, the thermal head and the optical probe unit may be configured as shown in Fig. 5(a) and Fig. 5(b). Fig. 5(a) and Fig. 5(b) are a cross-sectional view and a plan view showing a modified example of the thermal head and the optical probe unit in this embodiment. Fig. 5(a) is a cross-sectional view taken along the line VA-VA in Fig. 5(b).

[0065] In the thermal head 60B and the optical probe unit 70B shown in FIG. 5(a) and FIG. 5(b), an insertion hole 64 is formed in the contact member 61 along the Z-axis direction so as to open to the contact surface 62, and the optical probe 71 is inserted into the insertion hole 64. In this modification, the optical probe 71 does not include a mirror 73 because the optical axes of the optical fibers 72a and 72b are arranged along the Z-axis direction in the figure. Note that a space is secured between the optical probe 71 and the insertion hole 64 so that the optical probe 71 can be moved and rotated by the third moving device 74. In this way, by arranging the optical probe 71 in the insertion hole 64 formed in the contact member 61, the contact area of ​​the thermal head 60 with the DUT 110 can be increased while the optical probe 71 faces the optical connection part 112 of the DUT 110.

[0066] In the above-described embodiment, only one DUT 110 is tested in one touchdown, but multiple DUTs 110 may be tested simultaneously in one touchdown. Fig. 6 is a cross-sectional view showing a probe card 20B, a thermal head 60C, and an optical probe unit 70B in a second embodiment of the present invention.

[0067] For example, as shown in FIG. 6, a case will be described where two DUTs 110 are tested simultaneously in one touchdown. In this case, the probe card 20B includes two probe heads 22 arranged on the wiring board 21 so as to correspond to the two DUTs 110. The contact surface 62 of the thermal head 60C has a size that allows the contact of the two DUTs 110 with corresponding regions on the lower surface 102 of the semiconductor wafer 100, and the temperature of the two DUTs 110 can be adjusted by one thermal head 60. Meanwhile, two optical probe units 70B are provided on the support member 81 of the second moving device 80 so as to correspond to the two DUTs 110. Each optical probe unit 70B includes an optical probe 71 and a third moving device 74, similar to the optical probe unit 70B described above. The thermal head 60C and the two optical probe units 70B are provided on the same support member 81.

[0068] Instead of the thermal head 60C, two thermal heads 60B may be provided on the support member 81 so as to correspond to the two DUTs 110. In the example shown in Fig. 6, the optical probe unit 70 shown in Figs. 2 and 4 may be used instead of the optical probe unit 70B.

[0069] Although not particularly limited, the number N of DUTs 110 tested simultaneously in one touchdown is preferably 1 or more and 8 or less (1≦N≦8). In this case, the probe card includes N probe heads 22, the contact surface 62 of the thermal head has a size capable of contacting the N DUTs 110 among the DUTs 110 formed on the semiconductor wafer 100, and the thermal head and the N optical probe units are provided on the same support member 81.

[0070] As a result, the temperature of the semiconductor wafer 100 can be adjusted locally by the thermal head 60, and therefore the temperature adjustment of the DUT 110 can be further accelerated. In addition, an optical probe unit 70 is required for each DUT 110. Therefore, by setting the number N to 8 or less, rather than the total number of DUTs 110 included in the semiconductor wafer 100, an increase in the number of optical probe units 70 can be suppressed. Note that the number N is more preferably 1 or more and 4 or less (1≦N≦4), and even more preferably 1 or more and 2 or less (1≦N≦2). In addition, the total number of DUTs 110 included in the semiconductor wafer 100 is a number greater than the number N.

[0071] Alternatively, the thermal head may be configured as shown in Fig. 7. Fig. 7 is a cross-sectional view showing a probe card 20C and a thermal head 60D in a third embodiment of the present invention.

[0072] 7, the probe card 20C includes three probe heads 22 arranged on the wiring board 21 so as to correspond to the three DUTs 110. The prober also includes three thermal heads 60D so as to correspond to the three probe heads 22. The three thermal heads 60D are provided on the same support member 81.

[0073] Each thermal head 60D includes a heater 65B and a cooling block 61B. Although not particularly limited, the heater 65B is a planar heater including an upper surface (third surface) 651 that directly contacts the lower surface 102 of the semiconductor wafer 100, and a lower surface (fourth surface) 652 opposite to the upper surface 651. Specific examples of such a heater 65B include an aluminum nitride heater, a silicon nitride heater, and a ceramic heater such as a PTC heater, a polyimide heater, a Peltier element, and the like.

[0074] The cooling block 61B is a block-shaped member that holds the above-mentioned heater 65B. The cooling block 61B has a concave upper portion, and the heater 65B is housed in the concave portion.

[0075] Specifically, the cooling block 61B includes a contact surface 611 and an annular protrusion 612 surrounding the outer periphery of the contact surface 611. The contact surface 611 is in contact with a lower surface 652 of the heater 65B. The heater 65B is held by the cooling block 61B with an upper surface 651 of the heater 65B exposed. When the thermal head 60D contacts the lower surface 102 of the semiconductor wafer 100, the upper surface 651 of the heater 65B directly contacts the lower surface 102 of the semiconductor wafer 100. The protrusion 612 protrudes upward (in the +Z direction in the figure) beyond the contact surface 611 and surrounds the outer periphery of the heater 65B.

[0076] The protrusion 612 has a height substantially equal to the thickness of the heater 65B. When the upper surface 651 of the heater 65B directly contacts the lower surface 102 of the semiconductor wafer 100, the protrusion 612 also directly contacts the lower surface 102 of the semiconductor wafer 100. That is, the contact surface 62 of the thermal head 60D with the lower surface 102 of the semiconductor wafer 100 is composed of the upper surface 651 of the heater 65B and the upper surface of the protrusion 612. The contact surface 611 corresponds to an example of a "second contact surface" in this aspect of the present invention, and the protrusion 612 corresponds to an example of a "contact portion" in this aspect of the present invention.

[0077] A flow path 66B through which a refrigerant having a temperature lower than room temperature passes is formed inside the cooling block 61B. The flow path 66B is formed inside the cooling block 61B so as to correspond to the entire contact surface 611 and also pass through the inside of the protruding portion 612. Although not shown in particular, a temperature sensor is embedded in the cooling block 61B, similar to the contact member 61 described above.

[0078] Although not shown, heater 65B is connected to control device 90, similar to heater 65 described above, and generates heat by power supplied from control device 90. Also, although not shown, a refrigerant supply device 68 is connected to flow path 66B, similar to flow path 66 described above, and the refrigerant supplied from refrigerant supply device 68 passes through flow path 66, thereby cooling cooling block 61B.

[0079] 7, since the upper surface 651 of the heater 65B is in direct contact with the lower surface 102 of the semiconductor wafer 100, the heater 65B directly heats the DUT 110. Meanwhile, the cooling block 61B cools the heater 65B in contact with the semiconductor wafer 100, and also directly cools the semiconductor wafer 100 with the protrusion 612. In this manner, by surrounding the outer periphery of the heater 65B with the annular protrusion 612 of the cooling block 61B, it is possible to suppress thermal expansion of the semiconductor wafer 100 caused by heating by the heater 65B, and it is possible to suppress the occurrence of miscontact between the probe card 20C and the DUT 110.

[0080] For example, when the thermal expansion of the semiconductor wafer 100 due to heating by the heater 65B is small, the cooling block 61B may not be provided with the protrusion 612, and only the heater 65B may be exposed from the upper surface of the thermal head 60D.

[0081] Furthermore, the number of probe heads 22 included in the probe card 20C is not particularly limited to the above, and for example, the probe card 20C may include only one probe head 22. Similarly, the number of thermal heads 60D included in the prober is not particularly limited to the above, as long as it corresponds to the number of probe heads 22. Note that when there are a plurality of probe heads 22 and a plurality of thermal heads 60D, the effect of suppressing thermal expansion is particularly large. Furthermore, it is preferable that the number of probe heads 22 and the number of thermal heads 60D are N as described above, which allows for even faster temperature adjustment of the DUT 110.

[0082] 7, the semiconductor wafer 100 does not include the optical connection portion 112, and the prober does not include the optical probe unit 70, but in the example shown in Fig. 7, the semiconductor wafer 100 may include the optical connection portion 112, and the prober may include the optical probe unit 70. Alternatively, in the example shown in Fig. 7, instead of the optical probe unit 70, the prober may include the optical probe unit 70B shown in Fig. 5(a) and Fig. 5(b).

[0083] In addition, in the example shown in Figure 7, the cooling block 61B is divided to correspond to the DUT 110, but as explained with reference to Figure 6, one cooling block 61B may have a size corresponding to multiple DUTs 110.

[0084] Returning to Fig. 2, the control device 90 is configured, for example, by a computer. Although not specifically shown, this computer is an electronic calculator equipped with a CPU (processor), a main memory device (RAM, etc.), an auxiliary memory device (hard disk, SSD, etc.), and an interface, etc. The control described below is functionally realized, for example, by the control device 90 executing a program. Note that the control device 90 may be configured by a circuit board instead of a computer.

[0085] 2, the control device 90 is electrically connected to the heater 65, the temperature sensor 67, and the coolant supply device 68. The control device 90 adjusts the temperature of the DUT 110 via the contact member 61 by controlling the heater 65 and the coolant supply device 68 based on the detection result of the temperature sensor 67. Note that the control device 90 may control the heater 65 and the coolant supply device 68 based on the output of a temperature detection circuit formed on the semiconductor wafer 100 instead of the temperature sensor 67. Although not particularly limited, a specific example of the temperature detection circuit may be a circuit including a thermal diode formed on the semiconductor wafer 100.

[0086] The control device 90 is also connected to the tester 10 so as to be able to transmit electrical signals. The tester 10 has a function of testing the electronic circuit of the DUT 110 and a function of testing the optical circuit of the DUT 110, and is connected to the optical fibers 72a and 72b of the optical probe 71 so as to be able to transmit optical signals. The function of testing the optical circuit of the DUT 110 includes a function of measuring the light source and the intensity of light. Furthermore, the control device 90 is connected to the first to third moving devices 50, 80, and 74 so as to be able to output control signals, and is able to control the operation of the moving devices 50, 80, and 74. Note that the tester 10 does not need to have a function of testing the optical circuit of the DUT 110. In this case, an external measuring device having a function of testing the optical circuit of the DUT 110 is connected to the optical fibers 72a and 72b of the optical probe 71 so as to be able to transmit optical signals. This external measuring device is a test device independent of the tester 10, and is electrically connected to the tester 10, for example.

[0087] A method for pressing the semiconductor wafer 100 against the probe card 20 by the above-mentioned prober 30 will be described below with reference to Figures 8(a) to 8(c). Figures 8(a) to 8(c) are cross-sectional views showing a method for pressing the semiconductor wafer 100 against the probe card 20 by the prober 30 in this embodiment.

[0088] 8(a), the first moving device 50 moves the holding member 40 so that the semiconductor wafer 100 held by the holding member 40 faces the probe card 20. At this time, the position of the holding member 40 is finely adjusted by the first moving device 50, and the semiconductor wafer 100 is positioned with respect to the probe card 20 so that the multiple terminals 111 of the DUT 110 face the multiple probes 23 of the probe head 22, respectively.

[0089] The relative positional relationship between the terminals 111 of the semiconductor wafer 100 and the probes 23 of the probe card 20 is recognized in advance, for example, by cameras 91 and 92 (see FIG. 1) and an image processing function of the control device 90. Specifically, the cameras 91 and 92 are movable by a moving device (not shown). The camera 91 captures an image of the probe card 20, and another camera 92 captures an image of the semiconductor wafer 100 held by the holding member 40. Based on these images, the image processing function of the control device 90 recognizes the relative positional relationship between the terminals 111 and the probes 23. Although not shown, the semiconductor wafer 100 is supplied to the holding member 40 by a transport arm from a cassette such as a FOUP (Front-Opening Unified Pod).

[0090] 8(b), the second moving device 80 raises the thermal head 60 and the optical probe unit 70, and brings the thermal head 60 into contact with the semiconductor wafer 100 held by the holding member 40. At this time, since the outer periphery of the semiconductor wafer 100 is held by the holding member 40, the contact surface 62 of the thermal head 60 comes into direct contact with an exposed portion of the underside 102 of the semiconductor wafer 100 that is more inward than the outer periphery. Once the thermal head 60 comes into contact with the semiconductor wafer 100, the control device 90 starts controlling the heater 65 and the coolant supply device 68 to adjust the temperature of the DUT 110.

[0091] 8(c), while maintaining the contact state between the thermal head 60 and the semiconductor wafer 100, the first moving device 50 raises the holding member 40, and the second moving device 80 raises the thermal head 60 and the optical probe unit 70, pressing the semiconductor wafer 100 against the probe card 20 to electrically connect them. In this state, the multiple terminals 111 of the DUT 110 and the multiple probes 23 of the probe card 20 are in contact with each other.

[0092] Next, the third moving device 74 finely adjusts the position of the optical probe 71 to position the tip of the optical probe 71 with respect to the optical connection portion 112 of the semiconductor wafer 100. Although not particularly limited, the relative positional relationship between the optical probe 71 and the optical connection portion 112 is recognized based on the intensity of the light output from the optical connection portion 112, for example.

[0093] Specifically, light output from a light source included in the tester 10 is irradiated from one optical fiber 72a of the optical probe 71 toward the underside 102 of the semiconductor wafer 100 including the optical connection portion 112. Then, light output from the optical connection portion 112 via a loopback circuit incorporated in the optical circuit of the DUT 110 is acquired by the other optical fiber 72b. While performing this operation, the third moving device 74 causes the optical probe 71 to scan along the underside 102 of the semiconductor wafer 100. Then, the tester 10 measures the intensity of the light output from the optical connection portion 112, and the control device 90 stops the movement of the optical probe 71 at a position where the intensity of the light becomes equal to or greater than a predetermined value, thereby positioning the optical probe 71 relative to the optical connection portion 112.

[0094] Incidentally, like the relative positional relationship between the terminal 111 of the semiconductor wafer 100 and the probe 23 of the probe card 20 described above, the relative positional relationship between the optical probe 71 and the optical connection portion 112 may be recognized by a camera and image processing. In this case, before the thermal head 60 is brought into contact with the semiconductor wafer 100 held by the holding member 40, the semiconductor wafer 100 is imaged from below by a camera, and the thermal head 60 is imaged from above by another camera, and based on these images, the relative positional relationship between the optical probe 71 and the optical connection portion 112 is recognized by the image processing function of the control device 90. Alternatively, the positioning of the optical probe 71 with respect to the optical connection portion 112 may be performed by rough positioning using image processing, and then precise positioning using light intensity.

[0095] The optical probe 71 may be positioned relative to the optical connection portion 112 in a state in which the thermal head 60 is in contact with the semiconductor wafer 100 held by the holding member 40 (the state shown in FIG. 8(b)). That is, the optical probe 71 may be positioned relative to the optical connection portion 112 before the semiconductor wafer 100 and the probe card 20 are electrically connected to each other.

[0096] Next, the tester 10 inputs an electrical signal to the DUT 110 via the electrical probe 23 and the terminal 111, and also inputs an optical signal to the DUT 110 via the optical probe 71 and the optical connection unit 112. The tester 10 then judges the quality and characteristics of the DUT 110 based on the electrical signal output from the DUT 110 via the terminal 111 and the electrical probe 23, and the optical signal output from the DUT 110 via the optical connection unit 112 and the optical probe 71.

[0097] As described above, in this embodiment, the holding member 40 holds the semiconductor wafer 100 while exposing the top and bottom surfaces 101, 102 of the semiconductor wafer 100, and the thermal head 60, which is separate from the holding member 40, contacts the bottom surface 102 of the semiconductor wafer 100 to adjust the temperature of the DUT 110, thereby making it possible to speed up the temperature adjustment of the DUT 110.

[0098] Particularly in this embodiment, the contact surface 62 of the thermal head 60 has a size that allows contact with one to eight DUTs 110 among the multiple DUTs 110 formed on the semiconductor wafer 100. Therefore, the target area for temperature adjustment by the thermal head 60 is small, and it is possible to further increase the speed of temperature adjustment of the DUTs 110.

[0099] In addition, in this embodiment, the prober 30 includes a third moving device 74 that moves the optical probe 71, independent of the first moving device 50 that positions the semiconductor wafer 100 relative to the probe card 20. Therefore, the optical probe 51 can be positioned relatively to the optical connection portion 112 of the DUT 110 while the semiconductor wafer 100 is held by the holding member 40. Even if the positioning accuracy of the optical probe 71 relative to the optical connection portion 112 is higher than the positioning accuracy of the electric probe 23 relative to the terminal 111, the optical probe 71 can be positioned with high accuracy relative to the optical connection portion 112 by the third moving device 74.

[0100] The above-described embodiments are described for the purpose of facilitating understanding of the present invention, and are not described for the purpose of limiting the present invention. Therefore, the elements disclosed in the above embodiments are intended to include all design modifications and equivalents that fall within the technical scope of the present invention.

[0101] For example, as shown in Fig. 9, the semiconductor wafer test system 1 may be configured to test the semiconductor wafer 100 in a vertical position opposite to that of the above-described embodiment. Fig. 9 is a diagram showing the overall configuration of a semiconductor wafer test system and the internal structure of a prober in a fourth embodiment of the present invention.

[0102] In this case, as shown in Fig. 9, the annular holding portion 41 of the holding member 40 holds the lower surface (first surface) 101 of the semiconductor wafer 100. The upper surface (second surface) 102 of the semiconductor wafer 100 faces upward, and the entire upper surface 102 is exposed. The probe card 20 is disposed below the holding member 40 with the probes 23 facing upward, and the second moving device 80 is disposed above the holding member 40 with the contact surface 62 of the thermal head 60 and the optical axis of the optical probe unit 70 facing downward. That is, in the embodiment shown in Fig. 9, all the configurations except for the holding member 40 are inverted from the first embodiment described above.

[0103] 1 to 6, 8(a) to 8(c), and 9, the DUT 110 of the semiconductor wafer 100 is a composite circuit element including an optical circuit and an electronic circuit, but the DUT to be tested may be an electronic circuit element that does not include an optical circuit. In this case, the prober does not include the optical probe units 70 and 70B. [Explanation of symbols]

[0104] 1. Semiconductor wafer test system 10…Tester 11...Test head 12…Mainframe 20, 20B, 20C...Probe cards 21...Wiring board 22…Probe head 23…Probe 24. Housing 30…Prober 31…Upper base 32…Aperture 33…Lower base 40...Retaining member 41...Holding part 42...Aperture 50...First moving device 60,60B~60D...Thermal head 61...Contact member 61B…Cooling block 611…Contact surface 612...Protrusion 62…Contact surface 63...Groove 64…Insertion hole 65,65B…Heater 651…Top surface 652…Bottom surface 66,66B…Flow path 67...Temperature sensor 68... Refrigerant supply device 70, 70B...Optical probe unit 71...Optical probe 72a, 72b...Optical fiber 73…Mirror 74...Third moving device 80...Second moving device 81...Support member 82...Lifting mechanism 90...Control device 91,92…Camera 100...Semiconductor wafer 101…Top surface 102…Bottom surface 110…DUT 111...Terminal 112...Optical connection part

Claims

1. A semiconductor wafer handling device that moves a semiconductor wafer on which a DUT is formed, and presses a terminal of the DUT arranged on a first surface of the semiconductor wafer against a contact of a probe card, a holding member that holds the semiconductor wafer while exposing the first surface and the second surface of the semiconductor wafer; a first moving device that moves the holding member relative to the probe card; a temperature adjustment device that contacts the second surface of the semiconductor wafer to adjust a temperature of the DUT; a second moving device that moves the temperature adjustment device relative to the semiconductor wafer held by the holding member.

2. 2. The semiconductor wafer handling device according to claim 1, the temperature adjustment device includes a first contact surface that contacts the second surface of the semiconductor wafer; the first contact surface has a size capable of contacting N of the DUTs formed on the semiconductor wafer; The semiconductor wafer handling apparatus, wherein N is a natural number greater than or equal to 1 and less than or equal to 8.

3. 2. The semiconductor wafer handling device according to claim 1, the holding member holds an outer periphery of the second surface of the semiconductor wafer while exposing the second surface, The temperature adjustment device is in contact with an exposed portion of the second surface that is exposed from the holding member.

4. 2. The semiconductor wafer handling device according to claim 1, The holding member includes an annular holding portion that holds an outer periphery of the second surface of the semiconductor wafer.

5. 2. The semiconductor wafer handling device according to claim 1, the holding member holds an outer periphery of the first surface of the semiconductor wafer, The temperature adjustment device is a semiconductor wafer handling device in contact with the second surface.

6. 2. The semiconductor wafer handling device according to claim 1, The holding member includes an annular holding portion that holds an outer peripheral portion of the first surface of the semiconductor wafer.

7. 2. The semiconductor wafer handling device according to claim 1, The temperature adjustment device is a contact member having a first contact surface in contact with the second side of the semiconductor wafer; A semiconductor wafer handling apparatus comprising at least one of a heating device that heats the DUT via the contact member and a cooling device that cools the DUT via the contact member.

8. 2. The semiconductor wafer handling device according to claim 1, The temperature adjustment device is a heating device in contact with the second surface of the semiconductor wafer to heat the DUT; a cooling block having a flow path through which a coolant passes and supporting the heating device.

9. 9. The semiconductor wafer handling device according to claim 8, The cooling block is a semiconductor wafer handling device having a contact portion that surrounds the outer periphery of the heating device and contacts the second surface of the semiconductor wafer.

10. 10. The semiconductor wafer handling apparatus of claim 9, the heating device includes a planar heater having a third surface in contact with the second surface of the semiconductor wafer and a fourth surface opposite to the third surface; The cooling block includes a second contact surface in contact with the fourth surface.

11. 10. The semiconductor wafer handling apparatus of claim 9, The flow path passes through the inside of the contact portion.

12. 9. The semiconductor wafer handling device according to claim 8, The semiconductor wafer handling apparatus includes a plurality of the temperature adjustment devices.

13. 13. The semiconductor wafer handling apparatus of claim 12, A semiconductor wafer handling apparatus, wherein the plurality of temperature adjustment devices individually correspond to the plurality of DUTs provided on the semiconductor wafer.

14. 2. The semiconductor wafer handling device according to claim 1, the semiconductor wafer handling apparatus includes a control device that controls the first and second moving devices, The control device controls the first and second moving devices to bring the holding member and the temperature adjustment device closer to the probe card in the direction of pressing the DUT against the probe card, thereby pressing the terminals of the DUT against the contacts of the probe card.

15. 2. The semiconductor wafer handling device according to claim 1, The DUT includes an optical connection portion of the semiconductor wafer, The semiconductor wafer handling apparatus includes: an optical probe for inputting and outputting an optical signal to the optical connection portion; and a third moving device for moving the optical probe.

16. A test apparatus for testing a DUT formed on a semiconductor wafer; a probe card electrically connected to the test device; A semiconductor wafer testing system comprising: a semiconductor wafer handling apparatus according to any one of claims 1 to 15.

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