Semiconductor device and manufacturing method thereof
The semiconductor device design addresses the issue of burr formation and chip handling challenges by incorporating a rounded and thickness-decreasing back electrode, ensuring burr-free dicing and maintaining device integrity.
Patent Information
- Application Number
- JP2023144353
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-09-06
- Publication Date
- 2025-03-18
AI Technical Summary
The dicing process of semiconductor chips often results in burrs on the back electrode, which can lead to difficulties in chip removal, short-circuits, and cracks, while laser dicing poses risks of damage to the chips and resin intrusion affecting device characteristics.
A semiconductor device design featuring a first and second electrode layer, where the second electrode's outer edge is more rounded than the first, and its thickness gradually decreases towards the side surface, allowing for burr-free dicing and improved chip handling without affecting device characteristics.
The solution effectively prevents burr formation on the back electrode, facilitates easy chip removal, reduces the risk of short-circuits and cracks, and maintains the integrity of the semiconductor device characteristics.
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Figure 2025037424000001_ABST
Abstract
Description
[Technical field]
[0001] The present embodiment relates to a semiconductor device and a manufacturing method thereof. [Background technology]
[0002] The dicing process for semiconductor chips is carried out by grinding a semiconductor wafer to thin it, forming a back electrode, and then cutting it with a blade. However, when cutting with a blade, burrs may be generated on the back electrode, and the burrs may bite into the dicing sheet. In this case, it becomes difficult to pick up the semiconductor chip from the dicing sheet. In addition, the burrs on the back electrode may cause short circuits between terminals or cracks on the edge surface of the semiconductor chip.
[0003] Laser dicing suppresses burrs on the backside electrode, but there are concerns that the laser may damage the semiconductor chip. In addition, because the laser groove width is approximately twice the width of the dicing line, resin may seep into the area where the metal has been removed from the edge of the backside chip during the assembly process. This may affect the characteristics of the semiconductor device. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2000-195826 A [Patent Document 2] Patent No. 4427308 [Patent Document 3] JP 2007-165371 A [Patent Document 4] Patent No. 5238927 Summary of the Invention [Problem to be solved by the invention]
[0005] A semiconductor device that can be diced without generating burrs on a back electrode and without affecting the characteristics of the semiconductor device, and a method for manufacturing the same are provided. [Means for solving the problem]
[0006] The semiconductor device according to the present embodiment includes a semiconductor element having a first surface, a second surface opposite to the first surface, and a side surface between the first surface and the second surface. A first electrode layer is provided on the first surface of the semiconductor element. A second electrode layer is provided on the second surface of the semiconductor element. The outer edge of the second surface is rounded more than the outer edge of the first surface. The film thickness of the second electrode layer gradually becomes thinner approaching the side surface. [Brief description of the drawings]
[0007] [Figure 1] 1 is a partial cross-sectional view showing a configuration example of a semiconductor device according to an embodiment. [Diagram 2] 1A to 1C are cross-sectional views showing an example of a manufacturing method of a semiconductor device according to an embodiment. [Diagram 3] 3 is a cross-sectional view showing an example of a method for manufacturing a semiconductor device subsequent to FIG. 2; [Figure 4] 4 is a cross-sectional view showing an example of the method for manufacturing the semiconductor device, subsequent to FIG. 3; [Figure 5A] 5 is a cross-sectional view showing an example of the method for manufacturing the semiconductor device, subsequent to FIG. 4; [Figure 5B] 5 is a cross-sectional view showing an example of the method for manufacturing the semiconductor device, subsequent to FIG. 4; [Figure 6A] 5B is a cross-sectional view showing an example of the method for manufacturing the semiconductor device subsequent to FIG. 5A. [Figure 6B] 5C is a cross-sectional view showing an example of the method for manufacturing the semiconductor device, subsequent to FIG. 5B. [Figure 7A] 6B is a cross-sectional view showing an example of the method for manufacturing the semiconductor device subsequent to FIG. 6A. [Figure 7B] 6C is a cross-sectional view showing an example of the method for manufacturing the semiconductor device subsequent to FIG. 6B. [Figure 8A] 7B is a cross-sectional view showing an example of the method for manufacturing the semiconductor device subsequent to FIG. 7A. [Figure 8B]7C is a cross-sectional view showing an example of the method for manufacturing the semiconductor device subsequent to FIG. 7B. [Figure 9A] 8B is a cross-sectional view showing an example of the manufacturing method of the semiconductor device subsequent to FIG. 8A. [Figure 9B] 8C is a cross-sectional view showing an example of the manufacturing method of the semiconductor device subsequent to FIG. 8B. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The present invention is not limited to the embodiment. The drawings are schematic or conceptual. In the specification and the drawings, the same elements are given the same reference numerals.
[0009] Fig. 1 is a partial cross-sectional view showing a configuration example of a semiconductor device according to an embodiment. The semiconductor device 1 includes a semiconductor element 10, a front electrode 20, an insulating film 30, a back electrode 40, and a front electrode 50. Fig. 1 partially shows an end portion of the semiconductor device 1. The front electrode 20 and / or the front electrode 50 are an example of a first electrode layer.
[0010] The semiconductor device 1 may be, for example, an insulated gate bipolar transistor (IGBT), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), or a power semiconductor device such as a diode. The semiconductor device 1 is separated into individual semiconductor chips.
[0011] The semiconductor element 10 has a first face F1, a second face F2, and a side face F3. The second face F2 is on the opposite side to the first face F1. The side face F3 is between the first face F1 and the second face F2. The semiconductor element 10 is made of a semiconductor material such as silicon. The semiconductor element 10 has a thickness of, for example, 100 μm or less. The semiconductor element 10 includes a semiconductor substrate, an impurity diffusion layer, an epitaxial growth layer, and the like.
[0012] On the first face F1 of the semiconductor element 10, a surface electrode 50 having a relatively thin film formed by sputtering or the like, a surface electrode 20 having a relatively thick film formed by plating, vapor deposition or the like, and an insulating film 30 are provided.
[0013] The front electrode 20 is a metal film formed on the front electrode 50 by plating or vapor deposition, etc., with a thickness equal to or greater than that of the insulating film 30, and the two are electrically connected. The front electrode 50 is made of a conductive metal such as titanium, aluminum, or an alloy of aluminum, silicon, and copper. The front electrode 20 is made of a laminated film of a conductive metal such as copper, aluminum, titanium, nickel, gold, etc.
[0014] The insulating film 30 is provided to electrically isolate the surface electrode 50 and the surface electrode 20 from other semiconductor elements, or to protect the surface electrode 50 or the surface electrode 20. The insulating film 30 is made of an insulating material such as polyimide.
[0015] A back surface electrode 40 as a second electrode layer is provided on the second face F2 of the semiconductor element 10. The back surface electrode 40 covers the second face F2 and functions, for example, as a collector electrode of the IGBT or a drain electrode of the MOSFET of the semiconductor device 1. The back surface electrode 40 is composed of a laminated film of a conductive metal such as copper, aluminum, titanium, nickel, or gold.
[0016] Here, in the outer edge portion AE of the semiconductor element 10, the end E2 of the outer edge portion of the second face F2 is rounder than the end E1 of the outer edge portion of the first face F1. That is, the end E1 of the first face F1 has a relatively small radius of curvature and is approximately right-angled, while the end E2 of the second face F2 has a larger radius of curvature than the end E1 and is rounded in a curved shape. The outer edge portion AE is a curved portion of the second face F1 that is located near the side face F3. The outer edge portion AE may be said to be a curved portion that connects the second face F1 to the side face F3.
[0017] The back electrode 40 also covers the outer edge of the second face F2 and covers the curved surface of the end E2. Therefore, the back electrode 40 is curved in the +Z direction from the second face F2 along the side face F3 toward the first face F1 at the outer edge of the second face F2. The thickness of the back electrode 40 is gradually thinner at the end E2 as it approaches the side face F3. Furthermore, in a plan view (a plane parallel to the first face F1) seen from the perpendicular direction (Z direction) of the first face F1, the back electrode 40 does not protrude outward from the side face F3. That is, in a plan view seen from the Z direction, the back electrode 40 does not protrude outward from the semiconductor element 10 from the side face F3, and is provided inside the semiconductor element 10.
[0018] The end E2 of the semiconductor element 10 is rounded, and the back electrode 40 covers the end E2 from the second face F2 along the side face F3. This makes it possible to suppress cracks and chipping from the end E2 on the second face F2 of the semiconductor element 10. In addition, the back electrode 40 covers the end E2 from the second face F2 along the side face F3, and does not protrude outward from the side face F3. This makes it possible to suppress unintentional electrical shorting of the back electrode 40 to other wiring or semiconductor elements.
[0019] Next, a method for manufacturing the semiconductor device 1 according to the embodiment will be described.
[0020] 2 to 9B are cross-sectional views showing an example of a method for manufacturing a semiconductor device according to an embodiment, and Fig. 5B, Fig. 6B, Fig. 7B, Fig. 8B, and Fig. 9B are cross-sectional views showing in more detail a portion between adjacent semiconductor chips in Fig. 5A, Fig. 6A, Fig. 7A, Fig. 8A, and Fig. 9A.
[0021] First, as shown in FIG. 2, in a pre-process of a semiconductor manufacturing process, after the semiconductor element 10 is manufactured, the front surface electrode 20, the front surface electrode 50 and the insulating film 30 are formed on the first face F1 of the semiconductor element 10.
[0022] Next, as shown in FIG. 3, grooves TR are formed from the first surface F1 to the semiconductor element 10 along dicing lines DL between the multiple semiconductor chips CH. The grooves TR are formed, for example, by blade dicing. The grooves TR are formed to a depth between the first surface F1 and the second surface F2 of the semiconductor element 10. The depth of the grooves TR is formed deeper than the sum of the thickness of the semiconductor element 10 and the thickness of the back electrode 40 in the final completed product. This eliminates the need to cut the back electrode 40 with a blade or laser after the material of the back electrode 40 is formed.
[0023] 4, a liquid adhesive 60 is supplied onto the first face F1 of the semiconductor element 10. The adhesive 60 is made of, for example, an acrylic resin, and is supplied so as to fill the grooves TR.
[0024] Next, the support substrate 70 is placed on the adhesive 60. The support substrate 70 is adhered above the semiconductor element 10 with the adhesive 60. The support substrate 70 is made of an insulating material such as glass.
[0025] 5A and 5B, the semiconductor element 10 is turned upside down so that the support substrate 70 faces downward. As a result, the second face F2 of the semiconductor element 10 appears upward.
[0026] Next, as shown in FIG. 5A and FIG. 5B, the second face F2 of the semiconductor element 10 is polished by using a CMP (Chemical Mechanical Polishing) method or the like until the adhesive 60 in the groove TR is exposed from the second face F2. At this time, as shown in FIG. 5B, etching proceeds more in the boundary portion between the second face F2 of the semiconductor element 10 and the adhesive 60 than in other portions of the second face F2 and the adhesive 60. Therefore, the outer edge (corner) of the second face F2 of the semiconductor element 10 is etched together with the exposed portion of the adhesive 60 and rounded. In this way, the end E2 of the outer edge of the second face F2 has a larger radius of curvature than the outer edge of the first face F1 in FIG. 1, and is curved. The thickness of the semiconductor element 10 after polishing is the sum of the thickness of the semiconductor element 10 in the finished product, the thickness of the back electrode 40, and the thickness of the etched back semiconductor element 10 in FIG. 6A and FIG. 6B.
[0027] Next, as shown in Figures 6A and 6B, the second face F2 of the semiconductor element 10 is selectively etched back using the RIE method or the wet etching method. This causes the adhesive 60 to protrude from the second face F2. The semiconductor element 10 is etched back to the thickness of the final completed product. At this time, as shown in Figure 6B, the end E2 of the second face F2 is etched back while maintaining the curved shape of Figure 5B.
[0028] Next, as shown in FIG. 7A and FIG. 7B, the material of the back electrode 40 is deposited on the second surface F2 and the adhesive 60 by using a sputtering method or the like. At this time, as shown in FIG. 7B, the adhesive 60 protrudes from the second surface F2, and the end E2 of the second surface F2 is rounded, so that the material of the back electrode 40 penetrates into the boundary between the end E2 of the second surface F2 and the adhesive 60, and covers the rounded end E2 of the second surface F2. As a result, the material of the back electrode 40 becomes gradually thinner at the end E2 of the rounded second surface F2 as it approaches the side surface F3. In addition, since the semiconductor element 10 is in contact with the adhesive 60 at the side surface F3, the material of the back electrode 40 does not protrude outward from the side surface F3 in a plan view seen from the Z direction.
[0029] On the other hand, the material of the rear electrode 40 is deposited on the top of the protruding adhesive 60, but is hardly deposited on the side surface thereof. Therefore, at least a part of the side surface of the protruding portion of the adhesive 60 is exposed.
[0030] Next, as shown in FIG. 8A and FIG. 8B, the adhesive 60 is selectively etched while leaving the material of the back electrode 40 on the second surface F2. At this time, since at least a part of the side of the protruding portion of the adhesive 60 is exposed, the protruding portion of the adhesive 60 is selectively etched. Therefore, the material of the back electrode 40 on the protruding portion of the adhesive 60 is removed together with the adhesive 60 (lift-off). At this time, as shown in FIG. 8B, the back electrode 40 is left on the second surface F2 of the semiconductor element 10, and maintains a state in which the rounded end E2 of the second surface F2 is covered. In addition, the adhesive 60 is somewhat recessed from the back electrode 40 or the second surface F2 toward the first surface F1. In this way, the back electrode 40 is separated into each semiconductor chip by lift-off using the adhesive 60, so there is no need to cut the back electrode 40 with a blade or laser.
[0031] 9A and 9B, the semiconductor element 10 is turned upside down. This causes the first face F1 of the semiconductor element 10 to appear above. The back surface electrode 40 on the second face F2 side is attached onto a dicing sheet DS.
[0032] The adhesive 60 is dissolved to peel off the support substrate 70. Next, the semiconductor chips are separated into individual pieces, thereby completing the semiconductor device 1 shown in FIG.
[0033] According to this embodiment, the semiconductor element 10 has a back electrode 40, and uses a DBG (Dicing Before Grinding) method for grinding the second surface F2 of the semiconductor element 10 after dicing. However, in this embodiment, there is no need to cut the material of the back electrode 40 with a blade, and the material of the back electrode 40 on the adhesive 60 is lifted off together with the adhesive 60 in the etching process of the adhesive 60. This prevents burrs from being generated on the back electrode 40, and the semiconductor chip can be easily picked up from the dicing sheet DS. In addition, it is possible to prevent the back electrode 40 from shorting to an unintended semiconductor element, wiring, or the like. Furthermore, the back electrode 40 covers the outer edge of the second surface F2 of the semiconductor element 10, which is rounded. Therefore, it is possible to protect the outer edge of the semiconductor element 10 and prevent the occurrence of cracks, etc. As a result, this embodiment can perform dicing without generating burrs on the back electrode 40 and without affecting the characteristics of the semiconductor device.
[0034] Furthermore, because the back electrode 40 covers the outer edge of the rounded second face F2 of the semiconductor element 10, when the semiconductor chip is mounted on a lead frame or wiring board, solder (not shown) is easily formed in a fillet shape on the back electrode 40. This makes it possible to suppress variations in the solder thickness, and makes it difficult for voids to occur in the solder under the semiconductor chip.
[0035] The back surface electrode 40 covers the outer edge of the rounded second face F2 of the semiconductor element 10, thereby improving the heat dissipation performance of the semiconductor chip.
[0036] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope of the invention and its equivalents described in the claims, as well as in the scope and spirit of the invention. [Explanation of symbols]
[0037] 1 Semiconductor device 10 Semiconductor elements 20 Surface electrode 30 Insulating film 40 Back electrode 50 surface electrode
Claims
1. a semiconductor element having a first surface, a second surface opposite the first surface, and a side surface between the first surface and the second surface; a first electrode layer provided on the first surface of the semiconductor element; a second electrode layer provided on the second surface of the semiconductor element; The outer edge of the second surface is rounded more than the outer edge of the first surface, A semiconductor device, wherein the second electrode layer has a thickness that gradually decreases toward the side surface.
2. The semiconductor device according to claim 1 , wherein the second electrode layer covers an outer edge portion of the second surface.
3. 3. The semiconductor device according to claim 1, wherein the second electrode layer does not protrude outward from the side surface in a plane parallel to the first surface.
4. 3 . The semiconductor device according to claim 1 , wherein the second electrode layer is bent from the second surface along the side surface toward the first surface at an outer edge of the second surface.
5. forming a first electrode layer on a first surface of a semiconductor element having a first surface, a second surface opposite to the first surface, and a side surface between the first surface and the second surface; forming grooves from the first surface into the semiconductor element along lines between a plurality of semiconductor chips of the semiconductor element; supplying an adhesive to the first surface so as to fill the groove; polishing the second surface of the semiconductor element until the adhesive in the groove is exposed from the second surface; selectively etching back the second surface of the semiconductor element to cause the adhesive to protrude from the second surface; depositing a second electrode layer material on the second surface and on the adhesive; selectively removing the adhesive together with material of the second electrode layer on the adhesive while leaving material of the second electrode layer on the second surface.
6. After the adhesive is applied and before the second surface is polished, A support substrate is adhered to the adhesive on the first surface; inverting the semiconductor element so that the support substrate faces downward; After removal of the material of the second electrode layer that is on the adhesive, A sheet is attached onto the second electrode layer on the second surface; The method of claim 5 , comprising turning the semiconductor device upside down so that the sheet is facing down.
7. After the sheet is applied, The method according to claim 6 , wherein the plurality of semiconductor chips are picked up and mounted on a wiring board.
Citation Information
Patent Citations
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JP2004140179A
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JP1977038927A