Control circuit and semiconductor module

Abstract

To provide a control circuit capable of controlling detection on a defective state resulting from the lifetime of an optical coupler, and a semiconductor module.SOLUTION: A control circuit 1A comprises: photocoupler defect detection circuits 11A-7, 11A-8 which detect defective states of photocouplers 21, 22 including deterioration and abnormality; and a warning output circuit 12 which reports that the photocoupler defect detection circuits 11A-7, 11A-8 detect defective states of the photocouplers 21, 22.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a control circuit for controlling detection of a fault state of an optical coupler and a semiconductor module. [Background technology]

[0002] A signal is input to a semiconductor module used as a three-phase AC inverter via a photocoupler provided on a control board. The photocoupler serves to electrically insulate the semiconductor module from a control power supply and a control device (e.g., a microcomputer) mounted on the control board. Technologies using such photocouplers are disclosed in Patent Documents 1 to 3.

[0003] Patent Document 1 discloses the following technology: "A PMW signal for gate drive generated by a gate signal generator is isolated and transmitted to a gate drive via a photocoupler and input to a life prediction device. The life prediction device estimates the current conversion efficiency of the photocoupler based on the falling slope of the output signal from the photocoupler, and predicts the time when the photocoupler will reach its life limit."

[0004] Patent Document 2 discloses a technology comprising "a comparator which compares the output voltage of a photocoupler with a preset threshold value, and degradation determination means which determines whether or not the photocoupler has deteriorated based on the output signal of the comparator and a drive signal of the photocoupler, and the degradation determination means determines that the photocoupler has deteriorated when the drive signal of the photocoupler is active and the output voltage of the photocoupler is lower than the threshold value."

[0005] Patent Document 3 discloses the following technology: "A photocoupler communication system has a photocoupler, a current adjusting unit, an output signal generating unit that generates an output signal according to the current on the secondary side of the photocoupler, and a data processing control unit that adjusts the current on the primary side of the photocoupler by controlling the current adjusting unit and inputs the output signal. In a normal operation mode in which a signal is transmitted from one device to another device using the photocoupler, the data processing control unit switches the current on the primary side of the photocoupler between a first current value and a smaller second current value, and in an inspection mode, sets the current on the primary side of the photocoupler to the second current value, and determines deterioration of the photocoupler based on the output signal at that time." [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2008-268002 A [Patent Document 2] JP 2009-71928 A [Patent Document 3] JP 2015-211246 A Summary of the Invention [Problem to be solved by the invention]

[0007] A photocoupler has a light-emitting element and a light-receiving element. The light-emitting element (e.g., a light-emitting diode (LED)) has a life span that deteriorates over time. It is known that the brightness of the light emitted by the light-emitting element decreases with age. Even if the same amount of current as when the element was first mounted flows through the light-emitting element, the brightness of the light emitted by the light-emitting element will decrease due to age-related deterioration compared to when the element was first mounted, and the brightness of the light received by the light-receiving element will decrease. This causes poor signal transmission in the photocoupler due to the age-related deterioration of the light-emitting element. For this reason, photocouplers used for signal transmission between devices usually need to be replaced every five to six years.

[0008] However, the lifespan of light-emitting elements such as LEDs installed in photocouplers can vary depending on operating conditions and environmental temperature, even for the same product. This poses a problem in that it is difficult to uniquely determine the timing to replace the photocoupler. In addition, not only photocouplers but also parts externally attached to semiconductor modules have the same problem of difficulty in uniquely determining the timing to replace them due to aging.

[0009] An object of the present invention is to provide a control circuit and a semiconductor module that can control detection of a defective state that occurs with the life of an optical coupler. [Means for solving the problem]

[0010] In order to achieve the above-mentioned object, a control circuit according to one aspect of the present invention includes a detection unit that detects faulty conditions, including deterioration and abnormalities, of an optical coupler, and an alarm unit that notifies that the faulty condition has been detected by the detection unit.

[0011] In order to achieve the above object, a semiconductor module according to an aspect of the present invention includes the control circuit according to the above aspect, and a semiconductor switching element controlled based on a control signal. Effect of the Invention

[0012] According to one aspect of the present invention, it is possible to control detection of a fault condition associated with the life of an optical coupler. [Brief description of the drawings]

[0013] [Figure 1] 1 is a diagram showing an example of a schematic configuration of a control circuit and a semiconductor module according to a first embodiment of the present invention; [Diagram 2] 1 is a circuit diagram showing an example of a schematic configuration of a control circuit according to a first embodiment of the present invention. [Diagram 3] 5A to 5C are diagrams illustrating an example of the operation of a photocoupler connected to the control circuit and the semiconductor module according to the first embodiment of the present invention. [Figure 4]5 is a timing chart showing an example of an operation of the control circuit according to the first embodiment of the present invention. [Diagram 5] FIG. 11 is a diagram showing an example of a schematic configuration of a control circuit and a semiconductor module according to a second embodiment of the present invention. [Figure 6] FIG. 11 is a circuit diagram showing an example of a schematic configuration of a control circuit according to a second embodiment of the present invention. [Figure 7] 10 is a timing chart showing an example of an operation of the control circuit according to the second embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] The embodiments of the present invention are examples of devices and methods for embodying the technical idea of ​​the present invention, and the technical idea of ​​the present invention does not specify the materials, shapes, structures, arrangements, etc. of the components as described below. The technical idea of ​​the present invention can be modified in various ways within the technical scope defined by the claims.

[0015] [First embodiment] A control circuit and a semiconductor module according to a first embodiment of the present invention will be described with reference to Figures 1 to 4. In this embodiment and a second embodiment described later, an intelligent power module (IPM) in which an insulated gate bipolar transistor (IGBT) for power conversion, a free wheel diode, and a driving / protection integrated circuit (IC) for driving and protecting the IGBT are integrated into one package will be described as an example of the semiconductor module. However, the semiconductor module in each embodiment of the present invention is not limited to an IPM, and can also be applied to a driving / protection IC that is not integrated into one package with a power semiconductor element such as an IGBT.

[0016] [Semiconductor module configuration] A schematic configuration of the semiconductor module SMA according to this embodiment will be described with reference to Fig. 1. The semiconductor module SMA has a configuration that exhibits a function as an inverter that converts DC power into single-phase AC power.

[0017] As shown in FIG. 1, the semiconductor module SMA includes a control circuit 1A according to this embodiment. The semiconductor module SMA also includes a high-side power supply terminal Tvc1, a high-side input terminal Tin1, a high-side ground terminal Tgnd1, a low-side power supply terminal Tvc2, a low-side input terminal Tin2, and a low-side ground terminal Tgnd2. The semiconductor module SMA also includes an IGBT51 (an example of a semiconductor switching element) controlled based on a control signal Sic1, and an IGBT61 (an example of a semiconductor switching element) controlled based on a control signal Sic2. The control signal Sic1 is input from a photocoupler 21 (an example of an optical coupler) via the high-side input terminal Tin1. The control signal Sic2 is input from a photocoupler 22 (an example of an optical coupler) via the low-side input terminal Tin2.

[0018] The semiconductor module SMA includes a high-side control integrated circuit 7A that controls the IGBT 51. Hereinafter, the "high-side control integrated circuit" will be abbreviated as "high-side control IC." The high-side control IC 7A includes a signal generating circuit 14-7 that generates a first input signal Sin1 based on a control signal Sic1 input via a high-side input terminal Tin1, a first determination circuit 13-7 (an example of a first determination unit) that determines the signal level of the first input signal Sin1, a photocoupler defect detection circuit 11A-7 (an example of a detection unit) that detects a defect state including deterioration and abnormality of the photocoupler 21, and a gate drive circuit 71 that drives the IGBT 51.

[0019] The semiconductor module SMA includes a low-side control integrated circuit 8A that controls the IGBT 51. Hereinafter, the "low-side control integrated circuit" is abbreviated as "low-side control IC." The low-side control IC 8A includes a signal generating circuit 14-8 that generates a first input signal Sin2 based on a control signal Sic2 input via a low-side input terminal Tin2, a first judgment circuit 13-8 (an example of a first judgment unit) that judges the signal level of the first input signal Sin2, a photocoupler defect detection circuit 11A-8 (an example of a detection unit) that detects a defect state including deterioration and abnormality of the photocoupler 22, and a gate drive circuit 71 that drives the IGBT 61. Although details will be described later, the signal generating circuit 14-7, the first judgment circuit 13-7, and the photocoupler defect detection circuit 11A-7 provided in the high-side control IC 7A, and the signal generating circuit 14-8, the first judgment circuit 13-8, and the photocoupler defect detection circuit 11A-8 provided in the low-side control IC 8A are part of the components that configure the control circuit 1A according to this embodiment.

[0020] The semiconductor module SMA includes a free wheel diode 52 connected in anti-parallel to the IGBT 51. The IGBT 51 and the free wheel diode 52 form a semiconductor element 5. A cathode K of the free wheel diode 52 is connected to a collector C of the IGBT 51, and an anode A of the free wheel diode 52 is connected to an emitter E of the IGBT 51. A gate G of the IGBT 51 is connected to the output of a gate drive circuit 71.

[0021] The semiconductor module SMA includes a free wheel diode 62 connected in anti-parallel to the IGBT 61. The IGBT 61 and the free wheel diode 62 form a semiconductor element 6. A cathode K of the free wheel diode 62 is connected to a collector C of the IGBT 61, and an anode A of the free wheel diode 62 is connected to an emitter E of the IGBT 61. A gate G of the IGBT 61 is connected to the output of a gate drive circuit 81.

[0022] The semiconductor module SMA includes a positive power supply input terminal Tp to which a positive DC voltage is input, a negative power supply input terminal Tn to which a negative DC voltage is input, and an AC voltage output terminal To to which an AC voltage obtained by converting the positive DC voltage and the negative DC voltage into AC is output. The collector C of the IGBT 51 and the cathode K of the freewheel diode 52 are connected to the positive power supply input terminal Tp. The emitter E of the IGBT 61 and the anode A of the freewheel diode 62 are connected to the negative power supply input terminal Tn. The emitter E of the IGBT 51 and the anode A of the freewheel diode 52 are connected to the collector C of the IGBT 61 and the cathode K of the freewheel diode 62, and are connected to each other and to the AC voltage output terminal To.

[0023] The semiconductor module SMA includes a warning output circuit (an example of a notification unit) 12 that notifies that at least one of a defective state of the photocouplers 21 and 22 and an overheated state of the IGBTs 51 and 61 has been detected. The output of the warning output circuit 12 is connected to an alarm terminal Tarm provided in the semiconductor module SMA. The warning output circuit 12 is configured to notify the outside of the semiconductor module SMA of the defective state of the photocouplers 21 and 22, etc., via the alarm terminal Tarm.

[0024] The semiconductor module SMA includes a common reference potential terminal Tcom. The common reference potential terminal Tcom is connected to, for example, ground, and serves as a terminal to which the overall reference potential of the semiconductor module SMA is input. A high-side ground terminal Tgnd1 and a low-side ground terminal Tgnd2 are connected to the common reference potential terminal Tcom. Therefore, the potential of the high-side ground terminal Tgnd1 and the potential of the low-side ground terminal Tgnd2 are the same potential, and serve as the reference potential input from the common reference potential terminal Tcom.

[0025] 1, a control device 3 that controls the switching operations of the IGBTs 51 and 61 is connected to the semiconductor module SMA. The control device 3 has signal output terminals T31 and T32 and a signal input terminal T33. The control device 3 is connected to the photocoupler 21 via the signal output terminal T31, to the photocoupler 22 via the signal output terminal T32, and to the semiconductor module SMA via the signal input terminal T33.

[0026] The control device 3 outputs an input signal S1 generated to control the switching operation of the IGBT 51 from a signal output terminal T31 to the photocoupler 21. The control device 3 outputs an input signal S2 generated to control the switching operation of the IGBT 61 from a signal output terminal T32 to the photocoupler 22.

[0027] The signal input terminal T33 is connected to the alarm terminal Tarm. The alarm signal Sarm output from the alarm terminal Tarm is input to the control device 3 via the signal input terminal T33.

[0028] The control device 3 controls the IGBT 61 to be in an off state when the IGBT 51 is in an on state and to be in an on state when the IGBT 51 is in an off state by the input signal S1 and the input signal S2, which are in phase with each other by 180°. The IGBTs 51 and 61 alternately switch between an on state and an off state at a predetermined timing to convert a positive DC voltage input from the positive power supply input terminal Tp and a negative DC voltage input from the negative power supply input terminal Tn into an AC voltage, and the AC voltage is output from the AC voltage output terminal To. When an alarm signal Sarm indicating that a defective state of the photocouplers 21 and 22 or an overheated state of the IGBTs 51 and 61 is detected during the switching operation of the IGBTs 51 and 61, the control device 3 outputs input signals S1 and S2 to the photocouplers 21 and 22 as necessary to stop the switching operation of the IGBTs 51 and 61, and stops the inverter operation by the semiconductor module SMA.

[0029] [Control circuit configuration] The schematic configuration of the control circuit 1A according to this embodiment will be described with reference to Fig. 1 and Fig. 2. The signal generating circuit 14-7, the first judgment circuit 13-7, and the photocoupler defect detection circuit 11A-7 provided in the high side control IC 7A as components of the control circuit 1A to detect the defective state of the photocoupler 21, and the signal generating circuit 14-8, the first judgment circuit 13-8, and the photocoupler defect detection circuit 11A-8 provided in the low side control IC 8A as components of the control circuit 1A to detect the defective state of the photocoupler 22, have the same configuration. Therefore, in describing the control circuit 1A, a description of the specific configurations of the signal generating circuit 14-7, the first judgment circuit 13-7, and the photocoupler defect detection circuit 11A-7 will be omitted.

[0030] As shown in FIG. 2, the control circuit 1A includes a signal generating circuit 14-8 that generates a first input signal Sin2 based on a control signal Sic2 input via a low-side input terminal Tin2. The signal generating circuit 14-8 includes a constant current source 141-8, a resistor element 141-2, and a resistor element 141-3 that are connected in series between a power supply terminal 82 and a reference potential terminal 83. The power supply terminal 82 is a terminal for supplying a power supply voltage to the low-side control IC 8A. The reference potential terminal 83 is a terminal for supplying a reference potential to the low-side control IC 8A. The power supply side terminal of the constant current source 141-8 is connected to the power supply terminal 82, and the output terminal of the constant current source 141-8 is connected to one terminal of the resistor element 142-8. The other terminal of the resistor element 142-8 is connected to one terminal of the resistor element 143-8, and the other terminal of the resistor element 143-8 is connected to the reference potential terminal 83. The signal generating circuit 14-8 generates, as a first input signal Sin2 based on the control signal Sic2, a signal having a voltage level of a voltage drop caused in the resistive element 143-8 by a current flowing from the constant current source 141-8 side.

[0031] The power supply side terminal of the constant current source 141-8 and the power supply terminal 82 are connected to the low-side power supply terminal Tvc2. The output terminal of the constant current source 141-8 and one terminal of the resistor element 141-2 are connected to the low-side input terminal Tin2. The other terminal of the resistor element 143-8 and the reference potential terminal 83 are connected to the low-side ground terminal Tgnd2 and the common reference potential terminal Tcom. Therefore, the reference potential of the low-side control IC 8A becomes the same potential as the reference potential input from the common reference potential terminal Tcom.

[0032] As shown in Fig. 2, the control circuit 1A includes a first judgment circuit 13-8 that judges the signal level of the first input signal Sin2 based on the control signal Sic2. The first judgment circuit 13-8 includes a first comparator 131-8 that compares the signal level of the first input signal Sin2 with the signal level of a first comparison signal Scp1-2 that is set to a predetermined signal level. The first comparator 131-8 is configured, for example, by a hysteresis comparator. The first judgment circuit 13-8 includes a comparison signal generation unit 132-8 that generates the first comparison signal Scp1-2.

[0033] The signal level (voltage level in this embodiment) of the first comparison signal Scp1-2 is set based on a design value of the signal level (voltage level in this embodiment) of the first input signal Sin2 when no degradation occurs in the photocoupler 22. The signal level of the first comparison signal Scp1-2 is set to a value (e.g., 1.4 V) greater than the design value of the signal level of the first input signal Sin2 during the period in which the IGBT 61 is controlled to be in the on state.

[0034] The comparison signal generating unit 132-8 is composed of, for example, a DC power supply. The negative terminal of the comparison signal generating unit 132-8 is connected to the reference potential terminal 83. The positive terminal of the comparison signal generating unit 132-8 is connected to the non-inverting input terminal (+) of the first comparator 131-8. The inverting input terminal (-) of the first comparator 131-8 is connected to the other terminal of the resistor element 142-8 and one terminal of the resistor element 143-8. The output terminal of the first comparator 131-8 is connected to the input side of the photocoupler failure detection circuit 11A-8 and the gate drive circuit 81.

[0035] Therefore, the first comparator 131-8 compares the signal level of the first input signal Sin2 input from the signal generating circuit 14-8 with the signal level of the first comparison signal Scp1-2 input from the comparison signal generating unit 132-8 based on the voltage level. The first comparator 131-8 outputs a first output signal Sout1-2 based on the comparison result between the first input signal Sin2 and the first comparison signal Scp1-2 to the photocoupler defect detection circuit 11A-8 and the gate driving circuit 81. The gate driving circuit 81 generates a gate driving signal for driving the IGBT 61 (see FIG. 1) based on the first output signal Sout1-2 input from the first determination circuit 13-8.

[0036] 2, the control circuit 1A includes a photocoupler defect detection circuit 11A-8 that detects a defect state including deterioration and abnormality of the photocoupler 22 (an example of an optical coupler). The photocoupler 22 is an external component connected to the low-side input terminal Tin2. The photocoupler defect detection circuit 11A-8 includes a second comparator 111-8, a comparison signal generating unit 112-8, an exclusive OR gate (hereinafter referred to as an "XOR gate") 113-8, and a latch circuit 114-8.

[0037] The second comparator 111-8 is configured, for example, by a hysteresis comparator. The second comparator 111-8 compares the signal level of the first input signal Sin2 with the signal level of the second comparison signal Scp2-2, which is set to a signal level different from that of the first comparison signal Scp1-2. The comparison signal generating unit 112-8 generates the second comparison signal Scp2-2. The second comparison signal Scp2-2 is set to a signal level (voltage level in this embodiment) lower than that of the first comparison signal Scp1-2 so that the second comparator 111-8 can detect an increase in the signal level of the first input signal Sin2 earlier than the first comparator 131-8. In addition, the signal level of the second comparison signal Scp2-2 is set to be higher than the signal level of noise generated in the reference potential region or the control circuit 1A so that the second comparator 111-8 does not malfunction due to the noise. When the first comparison signal Scp1-2 is set to, for example, 1.4V, the second comparison signal Scp2-2 is set to, for example, 1.2V.

[0038] The comparison signal generating unit 112-8 is composed of, for example, a DC power supply. The negative terminal of the comparison signal generating unit 112-8 is connected to the reference potential terminal 83. The positive terminal of the comparison signal generating unit 112-8 is connected to the non-inverting input terminal (+) of the second comparator 111-8. The inverting input terminal (-) of the second comparator 111-8 is connected to the other terminal of the resistor element 142-8 and one terminal of the resistor element 143-8. The output terminal of the second comparator 111-8 is connected to one input terminal of the XOR gate 113-8. Therefore, the second comparator 111-8 compares the signal level of the first input signal Sin2 input from the signal generating circuit 14-8 with the signal level of the second comparison signal Scp2-2 input from the comparison signal generating unit 112-8 based on the voltage level. The second comparator 111-8 outputs a second output signal Sout2-2 based on the result of comparison between the first input signal Sin2 and the second comparison signal Scp2-2 to the XOR gate 113-8.

[0039] The other input terminal of the XOR gate 113-8 is connected to the output terminal of the first comparator 131-8, and the output terminal of the XOR gate 113-8 is connected to the inputs of the latch circuit 114-8 and the warning output circuit 12. The XOR gate 113-8 performs an exclusive OR operation on the signal level of the first output signal Sout1-2 input from the first judgment circuit 13-8 and the signal level of the second output signal Sout2-2 input from the second comparator 111-8, based on the voltage levels. The XOR gate 113-8 outputs the operation result signal Sxor2 obtained by the operation to the latch circuit 114-8.

[0040] The output terminal of the latch circuit 114-8 is connected to one of the input terminals of the warning output circuit 12. For example, the latch circuit 114-8 outputs the defect detection signal Sd2 at a low signal level to the warning output circuit 12 until the signal level of the operation result signal Sxor2 input from the XOR gate 113-8 becomes high. On the other hand, for example, when the signal level of the operation result signal Sxor2 input from the XOR gate 113-8 becomes high, the latch circuit 114-8 outputs the defect detection signal Sd2 at a high signal level to the warning output circuit 12. After outputting the defect detection signal Sd2 at a high signal level to the warning output circuit 12, the latch circuit 114-8 continues to output the defect detection signal Sd2 at a high signal level to the warning output circuit 12 until the signal level of the defect detection signal Sd2 is reset, even if the operation result signal Sxor2 at a low signal level is input thereafter.

[0041] Although detailed description is omitted, as shown in FIG. 1, the signal generating circuit 14-7 has the same configuration as the signal generating circuit 14-8 when the constant current source 141-8 is replaced with the constant current source 141-7, the resistive element 142-8 is replaced with the resistive element 142-7, the resistive element 143-8 is replaced with the resistive element 143-7, the power supply terminal 82 is replaced with the power supply terminal 72, and the reference potential terminal 83 is replaced with the reference potential terminal 73. The power supply terminal 72 is a terminal for supplying a power supply voltage to the high side control IC 7A. The reference potential terminal 73 is a terminal for supplying a reference potential to the high side control IC 7A. The power supply side terminal of the constant current source 141-7 is connected to the power supply terminal 72 and the high side power supply terminal Tvc1. The other terminal of the resistive element 143-7 is connected to the reference potential terminal 73 and the high side ground terminal Tgnd1.

[0042] The first judgment circuit 13-7 has the same configuration as the first judgment circuit 13-8 when the first comparator 131-8 is replaced with the first comparator 131-7 and the comparison signal generator 132-8 is replaced with the comparison signal generator 132-7. The negative terminal of the comparison signal generator 132-7 is connected to the reference potential terminal 73, and the output terminal of the first comparator 131-7 is connected to the gate drive circuit 71 and the photocoupler defect detection circuit 11A-7.

[0043] The photocoupler fault detection circuit 11A-7 has the same configuration as the photocoupler fault detection circuit 11A-8. The non-inverting input terminal of a second comparator (not shown) provided in the photocoupler fault detection circuit 11A-7 is connected to the positive terminal of a comparison signal generation unit (not shown) provided in the photocoupler fault detection circuit 11A-7. The inverting input terminal of the second comparator is connected to the connection part of the resistor element 142-7 and the resistor element 143-7 provided in the signal generation circuit 14-8. One input terminal of an XOR gate (not shown) provided in the photocoupler fault detection circuit 11A-7 is connected to the output terminal of the second comparator. The other input terminal of the XOR gate is connected to the output terminal of the first comparator 131-7. A latch circuit (not shown) provided in the photocoupler fault detection circuit 11A-7 generates a fault detection signal Sd1 regarding the faulty state of the photocoupler 21 based on the calculation result signal Sxor1 input from the XOR gate, and outputs the generated fault detection signal Sd1 to the warning output circuit 12.

[0044] Returning to Fig. 2, the control circuit 1A includes a warning output circuit (an example of a notification unit) 12 that notifies that a defective state of the photocoupler 22 has been detected by the photocoupler defect detection circuit 11A-8. The photocoupler 22 corresponds to an example of an optical coupler. The warning output circuit 12 also notifies of a defective state of the photocoupler 21 that has been detected by the photocoupler defect detection circuit 11A-7 provided in the high side control IC 7A. The photocoupler 21 also corresponds to an example of an optical coupler.

[0045] Although not shown, the semiconductor module SMA is provided with a detection circuit that detects an overheated state of the IGBTs 51 and 61 (see FIG. 1). When the detection circuit detects that at least one of the IGBTs 51 and 61 is in an overheated state, the detection circuit outputs an overheat detection signal SOH to the warning output circuit 12. When the warning output circuit 12 receives the overheat detection signal SOH from the detection circuit, the warning output circuit 12 notifies the user that the IGBTs 51 and 61 are in an overheated state.

[0046] The warning output circuit 12 notifies, for example, the failure state of the photocouplers 21 and 22 and the overheat state of the IGBTs 51 and 61 by the signal level and signal pattern of the alarm signal Sarm output from the alarm terminal Tarm. The warning output circuit 12 judges whether the photocoupler 21 is in a normal state or a failure state based on the signal level of the calculation result signal Sxor1 input from the XOR gate provided in the photocoupler failure detection circuit 11A-7 and the signal level of the failure detection signal Sd1 input from the photocoupler failure detection circuit 11A-7. The warning output circuit 12 also judges whether the photocoupler 22 is in a normal state or a failure state based on the signal level of the calculation result signal Sxor2 input from the XOR gate 113-8 and the signal level of the failure detection signal Sd2 input from the latch circuit 114-8.

[0047] When the photocouplers 21 and 22 are in a normal state (not in a faulty state) and the IGBTs 51 and 61 are in a normal state, not in an overheated state, the warning output circuit 12 maintains, for example, the alarm terminal Tarm at a constant voltage level at a high level. On the other hand, when the faulty state of the photocouplers 21 and 22 or the overheated state of the IGBTs 51 and 61 is detected, the warning output circuit 12 switches the voltage level of the alarm terminal Tarm to a low level in a predetermined pattern in order to output, for example, an alarm signal Sarm whose signal level becomes a low level in a predetermined signal pattern from the alarm terminal Tarm. In addition, the warning output circuit 12 changes the signal pattern for making the signal level of the alarm signal Sarm low for each notification target among the faulty state of the photocoupler 21, the faulty state of the photocoupler 22, the overheated state of the IGBT 51, and the overheated state of the IGBT 61. This allows the warning output circuit 12 to notify which of the photocouplers 21 and 22 or the IGBTs 51 and 61 is in fault.

[0048] Furthermore, the warning output circuit 12 changes the signal pattern for changing the signal level of the alarm signal Sarm to a low level according to the deterioration level with respect to the defective state of the photocouplers 21, 22. This allows the control circuit 1A to notify the control device 3 separately of a deterioration warning level at which the photocouplers 21, 22 are deteriorated but the operation of the IGBTs 51, 61 can be continued, and a deterioration state level at which the photocouplers 21, 22 are deteriorated and the operation of the IGBTs 51, 61 must be stopped.

[0049] As shown in FIG. 2, in this embodiment, the photocoupler 22 has a light-emitting diode (LED) 221 as a light-emitting element, a photodiode 222 as a light-receiving element, and a transistor 223 configured of a bipolar transistor. A cathode K of the light-emitting diode 221 is connected to a signal output terminal T32 of the control device 3, and an anode A of the light-emitting diode 221 is connected to a power supply terminal 92. The power supply terminal 92 is connected to a power supply circuit (not shown) provided on a control board (not shown) on which the control device 3 is mounted. A power supply voltage of a predetermined voltage level is supplied to the power supply terminal 92 from the power supply circuit. A cathode K of the photodiode 222 is connected to a low-side power supply terminal Tvc2, and an anode A of the photodiode 222 is connected to a base B of the transistor 223. A collector C of the transistor 223 is connected to a low-side input terminal Tin2. An emitter E of the transistor 223 is connected to a low-side ground terminal Tgnd2. The photodiode 222 and the transistor 223 work together to function as a phototransistor.

[0050] As shown in FIG. 2, a constant voltage source 94 is connected between the low-side power supply terminal Tvc2 and the low-side ground terminal Tgnd2. The positive terminal of the constant voltage source 94 is connected to the low-side power supply terminal Tvc2, and the negative terminal of the constant voltage source 94 is connected to the low-side ground terminal Tgnd2. Therefore, the constant voltage source 94 serves as a power source for the low-side control IC 8A. The positive terminal of the constant voltage source 94 is also connected to the cathode K of the photodiode 222, and the negative terminal of the constant voltage source 94 is also connected to the emitter E of the transistor 223. A pull-up resistor 93 is connected between the cathode K of the photodiode 222 and the collector C of the transistor 223. The pull-up resistor 93 and the constant voltage source 94 are mounted on a control board on which the control device 3 is provided. In addition, between the low-side power supply terminal Tvc2 and the low-side ground terminal Tgnd2, a stabilizing capacitor for stabilizing the voltage level supplied from the constant voltage source 94 to the low-side power supply terminal Tvc2, and a bypass capacitor for preventing noise from flowing from the low-side power supply terminal Tvc2 into the inside of the semiconductor module SMA may be provided.

[0051] 2, the control device 3 has a resistive element 32 connected to a signal output terminal T32, and a logical NOT gate (hereinafter referred to as a "NOT gate") 31 connected to the resistive element 32. Although details will be described later, the control device 3 outputs an input signal S1 to the photocoupler 22 via the resistive element 32 and the signal output terminal T32.

[0052] Photocoupler 21 (see FIG. 1) has the same configuration as photocoupler 22, and the cathode of a light-emitting diode (not shown) provided in photocoupler 21 is connected to signal output terminal T31. A power supply terminal 91 is connected to an anode of the light-emitting diode provided in photocoupler 21. Power supply terminal 91 is connected to a power supply circuit to which power supply terminal 92 is connected.

[0053] 1, a pull-up resistor and a constant voltage source corresponding to the pull-up resistor 93 and the constant voltage source 94 (see FIG. 2) are provided between the photocoupler 21 and the semiconductor module SMA, although they are not shown in the figure as with the photocoupler 22. Note that a stabilizing capacitor and a bypass capacitor may be provided between the photocoupler 21 and the semiconductor module SMA.

[0054] Although not shown in FIG. 1, inside the control device 3, a NOT gate and a resistance element corresponding to the NOT gate 31 and the resistance element 32 are connected to the signal output terminal T31.

[0055] [Control circuit operation] The operation of the control circuit 1A according to this embodiment will be described with reference to Figures 3 and 4 while also referring to Figures 1 and 2. In the control circuit 1A, the operation of detecting a defective state of the photocoupler 21 in the high side control IC 7A and the operation of detecting a defective state of the photocoupler 22 in the low side control IC 8A are the same. For this reason, the operation of the control circuit 1A will be described below using the operation of detecting a defective state of the photocoupler 22 in the low side control IC 8A, that is, the operation of detecting a defective state of the photocoupler 22 by the control circuit 1A as an example. First, the operation of the photocoupler 22 and the signal generating circuit 14-8 before and after deterioration of the photocoupler 22 will be described with reference to Figure 3.

[0056] Fig. 3 is a diagram showing input / output operation waveforms of the photocoupler 22 and operation waveforms of the signal generating circuit 14-8. The first row in Fig. 3 shows the current waveform of the current Iin flowing through the light emitting diode 221 provided in the photocoupler 22, and the second row in Fig. 3 shows the current waveform of the current Iout flowing through the photodiode 222 provided in the photocoupler 22. The third row in Fig. 3 shows the voltage waveforms of the voltage Vin2 of the first input signal Sin2 and the voltage Vcp1-2 of the first comparison signal Scp1-2 generated by the signal generating circuit 14-8.

[0057] 2, the cathode K of the light-emitting diode 221 is connected to the output terminal of the NOT gate 31 via the signal output terminal T32 and the resistor element 32. For this reason, when the voltage level of the input signal S2 input from the NOT gate 31 to the photocoupler 22 is high, no current flows through the light-emitting diode 221. On the other hand, when the voltage level of the input signal S2 input from the NOT gate 31 to the photocoupler 22 is low, a current flows through the light-emitting diode 221.

[0058] For example, if the voltage level of the input signal S2 is high until time ta shown in Fig. 3, the current level of the current Iin flowing through the light-emitting diode 221 becomes low (for example, the current value is 0 A) as shown in the first row of Fig. 3. Therefore, the light-emitting diode 221 does not emit light until time ta, and the current level of the current Iout flowing through the photodiode 222 becomes low (for example, the current value is 0 A). When no current flows through the photodiode 222, no current flows through the base B (see Fig. 2) of the transistor 223 provided in the photocoupler 22, and the transistor 223 is in an off state. As a result, the voltage level of the control signal Sic2 output by the photocoupler 22 to the control circuit 1A via the low-side input terminal Tin2 becomes high. As a result, the current output from the constant current source 141-8 (see FIG. 2) provided in the signal generating circuit 14-8 flows through the resistive elements 142-8 and 143-8 (see FIG. 2) provided in the signal generating circuit 14-8, and hardly flows to the photocoupler 22. For this reason, as shown in the third row of FIG. 3, the voltage level of the voltage Vin2 of the first input signal Sin2 generated by the signal generating circuit 14-8 is high until time ta.

[0059] For example, if the voltage level of the input signal S2 is switched from a high level to a low level at time ta shown in FIG. 3, the potential of the cathode K of the light-emitting diode 221 drops to the reference potential level, and the current level of the current Iin flowing through the light-emitting diode 221 becomes a high level, as shown in the first row of FIG. 3. Therefore, after time ta, the light-emitting diode 221 emits light, and the current level of the current Iout flowing through the photodiode 222 switches from a low level to a high level. When a current flows through the photodiode 222, a current flows through the base B of the transistor 223 provided in the photocoupler 22, and the transistor 223 is turned on. This causes the voltage level of the control signal Sic2 output by the photocoupler 22 to the control circuit 1A via the low-side input terminal Tin2 to drop. The amount of drop in the voltage level of the control signal Sic2 is determined by the amount of current flowing through the base B of the photodiode 222, and the larger the amount of current, the larger the amount of current becomes.

[0060] Incidentally, if the light-emitting diode 221 is not deteriorated, the current Iin of the amount shown in the first row of FIG. 3 flows through the light-emitting diode 221 after time ta, causing the light-emitting diode 221 to emit light with a desired luminance. Therefore, as shown by the dashed line in the second row of FIG. 3, the current Iout of the amount of current Inl flows through the photodiode 222. The amount of current Inl is, for example, an amount of current that can turn the transistor 223 completely on. Therefore, the current output from the constant current source 141-8 flows through the transistor 223, and hardly flows through the resistance elements 142-8 and 143-8 provided in the signal generating circuit 14-8. Therefore, as shown by the dashed line in the third row of FIG. 3, the voltage level of the voltage Vin2 of the first input signal Sin2 generated by the signal generating circuit 14-8 drops from time ta to a voltage value Vin2n (for example, 0 V) ​​at time tc.

[0061] On the other hand, even if the current Iin of the amount shown in the first row of FIG. 3 flows through the light-emitting diode 221 in which degradation has occurred after time ta, the luminance of the light emitted by the light-emitting diode 221 is reduced compared to when degradation has not occurred. Therefore, as shown by the solid line in the second row of FIG. 3, the current Iout of the amount of current Idnl flows through the photodiode 222. The amount of current Idnl is a current amount that can turn the transistor 223 on, but cannot turn it completely on, for example. As a result, a part of the current output from the constant current source 141-8 flows through the transistor 223, and the remaining current flows through the resistor elements 142-8 and 143-8. Therefore, a current of a larger amount flows through the resistor element 143-8 than before the degradation of the photocoupler 22, and the voltage drop in the resistor element 143-8 becomes larger than before the degradation of the photocoupler 22. 3, the voltage level of the voltage Vin2 of the first input signal Sin2 generated by the signal generating circuit 14-8 decreases from time ta to a voltage value Vin2d that is greater than the voltage value Vin2n at time tc. In other words, the amount of drop in the voltage Vin2 of the first input signal Sin2 from time ta to time tc is smaller when the photocoupler 22 is degraded than when the photocoupler 22 is not degraded.

[0062] 3 shows various waveforms when the light-emitting diode 221 is deteriorated, but similarly, when the light receiving sensitivity of the photodiode 222 is reduced, the amount of the current Iout flowing through the photodiode 222 is reduced. Therefore, the voltage value Vin2d of the first input signal Sin2 changes according to the degree of deterioration of the photocoupler 22, becoming smaller when the degree of deterioration is low and becoming larger when the degree of deterioration is high.

[0063] In this embodiment, when the control device 3 controls the IGBT 61 to be in the off state, it outputs the input signal S2 having a high signal level to the photocoupler 22, and when the control device 3 controls the IGBT 61 to be in the on state, it outputs the input signal S2 having a low signal level to the photocoupler 22. As described above, the gate drive circuit 81 (see FIG. 2) generates a gate drive signal for driving the IGBT 61 (see FIG. 1) based on the first output signal Sout1-2 input from the first determination circuit 13-8 (see). For this reason, the first determination circuit 13-8 is set so that the voltage value of the first comparison signal Scp1-2 generated by the comparison signal generation unit 132-8 is larger than the voltage value Vin2n so that it can determine whether the signal level of the control signal Sic2 reflecting the signal level of the input signal S2 input from the control device 3 is a high level or a low level.

[0064] Therefore, when the photocoupler 22 is not deteriorated, the high-low relationship between the voltage Vin2 of the first input signal Sin2 input from the first judgment circuit 13-8 and the voltage Vcp1-2 of the first comparison signal Scp1-2 is reversed before and after the time tb. As a result, the first judgment circuit 13-8 outputs the first output signal Sout1-2 having a low voltage level to the gate drive circuit 81 during a period (period before time tb) during which the IGBT 61 is controlled to be in the off state, as indicated by the left-pointing straight arrow in the third row of FIG. 3. Also, the first judgment circuit 13-8 outputs the first output signal Sout1-2 having a high voltage level to the gate drive circuit 81 during a period (period after time tb) during which the IGBT 61 is controlled to be in the on state, as indicated by the right-pointing straight arrow in the third row of FIG. In this way, when the photocoupler 22 is not deteriorated, the control circuit 1A can output the first output signal Sout1-2 having a voltage level according to the control of the control device 3 to the gate drive circuit 81.

[0065] On the other hand, as the deterioration of the photocoupler 22 progresses, the voltage Vin2 of the first input signal Sin2 increases. Therefore, when the voltage value Vin2d of the first input signal Sin2 when the photocoupler 22 is deteriorated becomes larger than the voltage value Vcp1 of the first comparison signal Scp1-2, even if the signal level of the input signal S2 input from the control device 3 to the photocoupler 22 is switched from high level to low level, the first determination circuit 13-8 outputs the first output signal Sout1-2 whose voltage level is high to the gate drive circuit 81. That is, the first determination circuit 13-8 outputs the first output signal Sout1-2 whose voltage level is high to the gate drive circuit 81 before and after time tb. Therefore, as shown by the two-way straight arrow in the third row of FIG. 3, the gate drive circuit 81 outputs a gate drive signal to the IGBT 61 that turns the IGBT 61 off before and after time tb. As a result, even if the control device 3 outputs an input signal S2 to the photocoupler to switch the IGBT 61 from an off state to an on state, if deterioration occurs in the photocoupler 22, the IGBT 61 will remain in the off state and will not be able to operate as controlled by the control device 3.

[0066] The signal level of the first input signal Sin2 increases as the deterioration of the photocoupler 22 progresses. The photocoupler defect detection circuit 11A-8 provided in the control circuit 1A is adapted to detect the defective state of the photocoupler 22 in stages by utilizing the characteristic of the first input signal Sin2 that reflects the degree of deterioration of the photocoupler 22.

[0067] Next, an example of the detection operation of the photocoupler 22 by the control circuit 1A will be described with reference to FIG. 1 to FIG. 3 and FIG. 4. FIG. 4 is a timing chart showing an example of the operation waveform of the control circuit 1A when detecting a defective state due to aging of the photocoupler 22. In FIG. 4, the first row shows the voltage waveforms of the voltage Vin2a of the first input signal Sin2 input to the first comparator 131-8 and the voltage Vcp1-2 of the first comparison signal Scp1-2. In FIG. 4, the second row shows the voltage waveforms of the voltage Vin2b of the first input signal Sin2 input to the second comparator 111-8 and the voltage Vcp2-2 of the second comparison signal Scp2-2. In FIG. 4, the third row shows the voltage waveform of the voltage Vout1-2 of the first output signal Sout1-2. In FIG. 4, the fourth row shows the voltage waveform of the voltage Vout2-2 of the second output signal Sout2-2. In Fig. 4, the fifth row shows the voltage waveform of the voltage Vxor2 of the operation result signal Sxor2. In Fig. 4, the sixth row shows the voltage waveform of the voltage Vd2 of the fault detection signal Sd2. The horizontal axis of the graph shown in Fig. 4 shows the usage time of the photocoupler 22, and the vertical axis of the graph shown in Fig. 4 shows voltages in each of the first row to the sixth row. In the graph shown in Fig. 4, the passage of time is shown from left to right. Note that the photocoupler 22 starts to deteriorate when the accumulated operating period reaches several years, but in Fig. 4, for ease of understanding, the horizontal time axis is shown ignoring the accumulated operating period required for deterioration of the photocoupler 22.

[0068] In the control circuit 1A, the first input signal Sin2 input to the inverting input terminal (-) of each of the first comparator 131-8 and the second comparator 111-8 is the same signal (see FIG. 2). Therefore, as shown in FIG. 4, the voltage input to the inverting input terminal (-) of the first comparator 131-8 is the same voltage as the voltage input to the inverting input terminal (-) of the second comparator 111-8, but for convenience of explanation in FIG. 4, these voltages are represented by different symbols "V2a" and "V2b".

[0069] The first comparison signal Scp1-2 and the second comparison signal Scp2-2 are set to different signal levels. In the control circuit 1A, the signal level of the first comparison signal Scp1-2 and the signal level of the second comparison signal Scp2-2 are set to be different from each other by making the voltage Vcp1-2 of the first comparison signal Scp1-2 and the voltage Vcp2-2 of the second comparison signal Scp2-2 different. Specifically, in the control circuit 1A, the voltage Vcp1-2 of the first comparison signal Scp1-2 is set higher than the voltage Vcp2-2 of the second comparison signal Scp2-2.

[0070] In FIG. 4, the period when the voltage levels of the voltages Vin2a and Vin2b are at the high level Hi is a period during which the control device 3 (see FIG. 1) controls the IGBT 61 (see FIG. 1) to be in the off state. On the other hand, the period when the voltage levels of the voltages Vin2a and Vin2b are not at the high level Hi is a period during which the control device 3 controls the IGBT 61 to be in the on state. In the following description of the present embodiment, for convenience of explanation, the "period when the voltage levels of the voltages Vin2a and Vin2b are at the high level Hi" is abbreviated to the "high level period", and the "period when the voltage levels of the voltages Vin2a and Vin2b are not at the high level Hi" is referred to as the "low level period". Therefore, the high level period is a period during which the current Iin (see FIG. 2) does not flow through the light emitting diode 221 provided in the photocoupler 22. On the other hand, the low level period is a period during which the current Iin flows through the light emitting diode 221 provided in the photocoupler 22.

[0071] 4, in the period from time t0 to time t1, a high level period and a low level period are repeated at a predetermined timing. Therefore, in the period from time t0 to time t1, a period in which the current Iin does not flow through the light-emitting diode 221 and a period in which the current Iin flows through the light-emitting diode 221 are repeated at a predetermined timing.

[0072] During the period from time t0 to time t1, the photocoupler 22 is not deteriorated. Therefore, as shown in FIG. 4, during the period from time t0 to time t1, the voltages Vin2a and Vin2b of the first input signal Sin2 generated by the signal generating circuit 14-8 (see FIG. 2) provided in the control circuit 1A (see FIG. 2) are lower than the voltages Vcp1-2 of the first comparison signal Scp1-2 and the voltages Vcp2-2 of the second comparison signal Scp2-2 during the low level period. Therefore, the voltage level of the operation result signal Sxor2 output from the XOR gate 113-8 (see FIG. 2) is low level Lo. It is assumed that the operation result signal Sxor2 with a high voltage level is not input to the latch circuit 114-8 (see FIG. 2) before time t0. Therefore, during the low level period from time t0 to time t1, the voltage level of the voltage Vd2 of the failure detection signal Sd2 output from the latch circuit 114-8 is low level Lo.

[0073] The warning output circuit 12 (see FIG. 2) is configured to determine that the photocoupler 22 is not degraded when the voltage levels of the voltage Vxor2 of the calculation result signal Sxor2 and the voltage Vd2 of the defect detection signal Sd2 input from the photocoupler defect detection circuit 11A-8 are low level Lo. During the period from time t0 to time t1, the warning output circuit 12 receives the calculation result signal Sxor2 having the voltage Vxor2 at the low level Lo and the defect detection signal Sd2 having the voltage Vd2 at the low level Lo from the photocoupler defect detection circuit 11A-8. For this reason, the warning output circuit 12 does not output an alarm signal Sarm for notifying the deterioration of the photocoupler 22 to the control device 3 during the period from time t0 to time t1.

[0074] As described with reference to Fig. 3, the voltage levels of the voltages Vin2a and Vin2b of the first input signal Sin2 generated by the signal generating circuit 14-8 included in the control circuit 1A are higher in the low-level period after degradation of the photocoupler 22 than before degradation. For this reason, for example, when the photocoupler 22 starts to deteriorate at time t1, the voltage levels of the voltages Vin2a and Vin2b rise in the low-level period as shown in Fig. 4. Even if the voltage levels of the voltages Vin2a and Vin2b rise in the low-level period after time t1, the voltage Vin2a is lower than the voltage Vcp1-2 of the first comparison signal Scp1-2, and the voltage Vin2b is lower than the voltage Vcp2-2 of the second comparison signal Scp2-2, as in the period before time t1. Therefore, before and after the start of deterioration of the photocoupler 22 (that is, before and after time t1), the voltage Vout1-2 of the first output signal Sout1-2 and the voltage Vout2-2 of the second output signal Sout2-2 both become high level Hi during the low level period.

[0075] Moreover, before and after the start of deterioration of the photocoupler 22 (i.e., before and after time t1), the voltage levels of the voltages Vout1-2 and Vout2-2 are both high level Hi. Therefore, as shown in Fig. 4, before and after the start of deterioration of the photocoupler 22, the voltage level of the voltage Vxor2 of the operation result signal Sxor2 is low level Lo, and the voltage level of the voltage Vd2 of the defect detection signal Sd2 output from the latch circuit 114-8 is also low level Lo.

[0076] Even if the photocoupler 22 starts to deteriorate after time t1 has passed, the photocoupler defect detection circuit 11A-8 inputs the calculation result signal Sxor2 having the voltage Vxor2 whose voltage level is low level Lo and the defect detection signal Sd2 having the voltage Vd2 whose voltage level is low level Lo to the warning output circuit 12. For this reason, the warning output circuit 12 does not output the alarm signal Sarm for notifying the controller 3 of the deterioration of the photocoupler 22 even after time t1 has passed.

[0077] When the photocoupler 22 operates to switch the IGBT 61 from time t1 to time t2, which is a predetermined time after time t1, the degree of deterioration of the photocoupler 22 further progresses. Therefore, after time t2, the first input signal Sin2 in the low level period becomes lower than the first comparison signal Scp1-2 and higher than the second comparison signal Scp2-2. Specifically, as shown in FIG. 4, at time t2, in the first comparator 131-8, the voltage Vin2a of the first input signal Sin2 is lower than the voltage Vcp1-2 of the first comparison signal Scp1-2, and in the second comparator 111-8, the voltage Vin2b of the first input signal Sin2 is higher than the voltage Vcp1-2 of the first comparison signal Scp1-2.

[0078] Therefore, when the deterioration of the photocoupler 22 progresses from time t1 to time t2, the voltage Vin2a of the voltage Vout1-2 of the first output signal Sout1-2 becomes a high level Hi during the low level period. On the other hand, at time t2, the voltage Vin2b of the voltage Vout2-2 of the second output signal Sout2-2 becomes a low level Lo during the low level period. As a result, at time t2, the voltage Vxor2 of the operation result signal Sxor2 becomes a high level Hi. Since the operation result signal Sxor2 of the high level Hi voltage Vxor2 is input to the latch circuit 114-8, the latch circuit 114-8 outputs a fault detection signal Sd2 of the high level Hi voltage Vd2 to the warning output circuit 12.

[0079] The warning output circuit 12 is configured to determine that the photocoupler 22 is at a degradation warning level when the voltage levels of the voltage Vxor2 of the calculation result signal Sxor2 and the voltage Vd2 of the failure detection signal Sd2 input from the photocoupler failure detection circuit 11A-8 are high. Here, the "degradation warning level" means that although the IGBT 61 can perform switching operation as controlled by the control device 3, it is necessary to notify that the photocoupler 22 is beginning to deteriorate.

[0080] At time t2, the photocoupler failure detection circuit 11A-8 inputs the calculation result signal Sxor2 having the voltage Vxor2 at a high level Hi and the failure detection signal Sd2 having the voltage Vd2 at a high level Hi to the warning output circuit 12. Therefore, the warning output circuit 12 outputs an alarm signal Sarm to the control device 3 to notify that the deterioration of the photocoupler 22 has progressed to a deterioration alarm level.

[0081] When the photocoupler 22 operates to switch the IGBT 61 from time t2 to time t3, which is a predetermined time after the time t2, the deterioration of the photocoupler 22 progresses further. However, during the low level period from time t2 to time t3, the voltages Vin2a and Vin2b of the first input signal Sin2 are lower than the voltage Vcp1-2 of the first comparison signal Scp1-2 and higher than the second comparison signal Scp2-2. Therefore, the first comparator 131-8 and the photocoupler failure detection circuit 11A-8 operate in the same manner as at time t2, and the alarm signal Sarm for notifying that the photocoupler 22 is at the deterioration warning level continues to be output from the warning output circuit 12 to the control device 3.

[0082] When the photocoupler 22 operates to switch the IGBT 61 from time t2 to time t3, which is a predetermined time, the degree of deterioration of the photocoupler 22 further progresses. Therefore, during the low level period at time t3, the voltage level of the first input signal Sin2 becomes higher than the voltage Vcp1-2 of the first comparison signal Scp1-2 and the voltage Vcp2-2 of the second comparison signal Scp2-2. Specifically, as shown in FIG. 4, at time t3, in the first comparator 131-8, the voltage Vin2a of the first input signal Sin2 becomes higher than the voltage Vcp1-2 of the first comparison signal Scp1-2, and in the second comparator 111-8, the voltage Vin2b of the first input signal Sin2 continues to be higher than the voltage Vcp1-2 of the first comparison signal Scp1-2.

[0083] Therefore, when the deterioration of the photocoupler 22 progresses from time t2 to time t3, the voltage Vout1-2 of the first output signal Sout1-2 becomes low level Lo during the low level period. Also, at time t3, the voltage Vout2-2 of the second output signal Sout2-2 becomes low level Lo during the low level period. As a result, at time t3, the voltage Vxor2 of the operation result signal Sxor2 becomes low level Lo. The operation result signal Sxor2 having the voltage Vxor2 of the high level Hi is input to the latch circuit 114-8 before time t3. Therefore, even if the operation result signal Sxor2 having the voltage Vxor2 of the low level Lo is input, the latch circuit 114-8 outputs the fault detection signal Sd2 having the voltage Vd2 of the high level Hi to the warning output circuit 12.

[0084] As described above, the photocoupler defect detection circuit 11A-8 outputs the calculation result signal Sxor2 and the defect detection signal Sd2 generated from the calculation result signal Sxor2 to the warning output circuit 12. The calculation result signal Sxor2 is a signal obtained by performing an exclusive OR operation on the signal level of the first output signal Sout1-2 and the signal level of the second output signal Sout2-2. The defect detection signal Sd2 is a signal based on the first output signal Sout1-2 and the second output signal Sout2-2. Therefore, the photocoupler defect detection circuit 11A-8 detects the defect state of the photocoupler 22 based on the first output signal Sout1-2 output from the first comparator 131-8 and the second output signal Sout2-2 output from the second comparator 111-8.

[0085] The first output signal Sout1-2 is a comparison result signal obtained by the first comparator 131-8 comparing the first input signal Sin2 with the first comparison signal Scp1-2. That is, the first output signal Sout1-2 is a signal based on the first input signal Sin2. Therefore, the photocoupler defect detection circuit 11A-8 detects the defective state of the photocoupler 22 based on the first input signal Sin2 and the first output signal Sout1-2 output from the first judgment circuit 13-8.

[0086] The warning output circuit 12 is configured to determine that the photocoupler 22 is in a deteriorated state when the voltage level of the voltage Vxor2 of the calculation result signal Sxor2 input from the photocoupler defect detection circuit 11A-8 is low level Lo and the voltage level of the voltage Vd2 of the defect detection signal Sd2 is high level Hi. Here, the "deteriorated state" refers to a state in which the photocoupler 22 is deteriorated to such an extent that the IGBT 61 cannot perform a switching operation as controlled by the control device 3.

[0087] At time t3, the photocoupler defect detection circuit 11A-8 inputs the calculation result signal Sxor2 having the voltage Vxor2 at a low level Lo and the defect detection signal Sd2 having the voltage Vd2 at a high level Hi to the warning output circuit 12. Therefore, the warning output circuit 12 outputs an alarm signal Sarm to the control device 3 to notify that the deterioration of the photocoupler 22 has progressed and that the photocoupler 22 is in a deteriorated state.

[0088] When the photocoupler 22 operates to switch the IGBT 61 after time t3, the deterioration of the photocoupler 22 progresses further. Therefore, during the low level period, the voltage Vin2a of the first input signal Sin2 remains higher than the voltage Vcp1-2 of the first comparison signal Scp1-2, and the voltage Vin2b of the first input signal Sin2 also remains higher than the second comparison signal Scp2-2. Therefore, the first comparator 131-8 and the photocoupler defect detection circuit 11A-8 operate in the same manner as at time t3, and the alarm signal Sarm for notifying that the photocoupler 22 is in a deteriorated state continues to be output from the warning output circuit 12 to the control device 3.

[0089] [Table 1]

[0090] Table 1 is a truth table of the voltage levels at each point in the detection of the defective state of the photocoupler 22 by the control circuit 1A. "IGBT control state" in Table 1 indicates the control state in which the IGBT 61 is controlled by the control device 3. "Vout1-2" in Table 1 indicates the voltage of the first output signal Sout1-2, and "Vout2-2" in Table 1 indicates the voltage of the second output signal Sout2-2. "Vxor2" in Table 1 indicates the voltage of the calculation result signal Sxor2, and "Vd2" in Table 1 indicates the voltage of the defective detection signal Sd2. "Photocoupler state" in Table 1 indicates the state of the photocoupler 22. "High" in Table 1 indicates that the voltage level of the corresponding voltage is a high level, and "Low" in Table 1 indicates that the voltage level of the corresponding voltage is a low level. "ON" in Table 1 indicates that the IGBT 61 is controlled to the on state, and "OFF" in Table 1 indicates that the IGBT 61 is controlled to the off state. "No problem" in Table 1 indicates that the photocoupler 22 is in a normal state with no degradation. The "degradation alarm level" and "degradation state" in Table 1 are the same as the "degradation alarm level" and "degradation state" explained using FIG. 4.

[0091] As described with reference to Fig. 4, the control circuit 1A notifies the failure state of the photocoupler 22 in stages according to the deterioration level of the photocoupler 22. The periods during which the voltage levels of the voltage Vxor2 of the calculation result signal Sxor2 and the voltage Vd2 of the failure detection signal Sd2 shown in Table 1 are low correspond to the period from time t0 to time t1 shown in Fig. 4 (period during which the photocoupler 22 is not deteriorated) and the period from time t1 to time t2 shown in Fig. 4 (period during which the photocoupler 22 is deteriorated to such an extent that it is not necessary to notify the deterioration of the photocoupler 22). Therefore, as shown in Table 1, during the periods during which the voltage levels of the voltage Vxor2 of the calculation result signal Sxor2 and the voltage Vd2 of the failure detection signal Sd2 are low, the photocoupler state is "no problem".

[0092] Furthermore, in the period shown in Table 1 during which the IGBT 61 is controlled to the on state (i.e., the low-level period described with reference to FIG. 4), during the period during which the voltage level of the voltage Vout1-2 of the first output signal Sout1-2 is high and the voltage level of the voltage Vout2-2 of the second output signal Sout2-2 is low, the voltage levels of both the voltage Vxor2 of the calculation result signal Sxor2 and the voltage Vd2 of the fault detection signal Sd2 are high. This period corresponds to the period from time t2 to time t3 shown in FIG. 4 (the period during which the IGBT 61 can be switched as controlled by the control device 3, but the deterioration of the photocoupler 22 is progressing). As shown in Table 1, during this period, the photocoupler state is at the "deterioration warning level."

[0093] Furthermore, in the period shown in Table 1 during which the IGBT 61 is controlled to the on state (i.e., the low level period described with reference to FIG. 4), during the period during which the voltage levels of the voltage Vout1-2 of the first output signal Sout1-2 and the voltage Vout2-2 of the second output signal Sout2-2 are low, the voltage level of the voltage Vxor2 of the calculation result signal Sxor2 is low, and the voltage level of the voltage Vd2 of the fault detection signal Sd2 is high. This period corresponds to the period after time t3 shown in FIG. 4 (the period during which the deterioration of the photocoupler 22 has progressed to the extent that the IGBT 61 is not switching as controlled by the control device 3). As shown in Table 1, during this period, the photocoupler state is in the "degraded state."

[0094] 4 and Table 1, the photocoupler defect detection circuit 11A-8 changes the signal levels (voltage levels in this embodiment) of the calculation result signal Sxor2 and the defect detection signal Sd2, thereby enabling the photocoupler defect detection circuit 11A-8 to detect in stages the degree of progression of deterioration of the photocoupler 22. When detecting the deterioration of the photocoupler 22, the photocoupler defect detection circuit 11A-8 can detect a defective state of the photocoupler 22 when the IGBT 61 controlled based on the control signal Sic2 input from the photocoupler 22 via the low-side input terminal Tin2 is performing a switching operation.

[0095] For example, the period from time t2 to time t3 shown in FIG. 4 is a period during which the voltage level of the voltage Vout1-2 of the first output signal Sout1-2 repeats a high level Hi and a low level Lo according to the signal level of the control signal Sic2. The gate drive circuit 81 generates a gate drive signal for switching the IGBT 61 using the first output signal Sout1-2 input from the first comparator 131-8. Therefore, during this period, the gate drive circuit 81 can drive the IGBT 61 by switching based on the change in the signal level of the control signal Sic2. Meanwhile, the photocoupler failure detection circuit 11A-8 can detect that the state of the photocoupler 22 is at the degradation warning level shown in Table 1 by outputting the calculation result signal Sxor2 having a high signal level and the failure detection signal Sd2 having a high signal level to the warning output circuit 12 during the period from time t2 to time t3.

[0096] The photocoupler failure detection circuit 11A-8 can detect that the state of the photocoupler 22 is in a deteriorated state even during a period in which the IGBT 61 is not performing a switching operation after detecting a defective state of the photocoupler 22 (i.e., the period after time t3 shown in FIG. 4). That is, the photocoupler failure detection circuit 11A-8 can detect that the state of the photocoupler 22 is in a deteriorated state shown in Table 1 by outputting the calculation result signal Sxor2 having a low level Lo and the failure detection signal Sd2 having a high level to the warning output circuit 12 during a period in which the IGBT 61 is not performing a switching operation after detecting a defective state of the photocoupler 22.

[0097] The warning output circuit 12 can notify that the photocoupler failure detection circuit 11A-8 has detected a failure state of the photocoupler 22 while the IGBT 61 is performing a switching operation. As described above, during the period (the period from time t2 to time t3 shown in FIG. 4) during which the gate drive circuit 81 can drive the IGBT 61 by a switching operation based on a change in the signal level of the control signal Sic2, the warning output circuit 12 receives the calculation result signal Sxor2 with a high signal level and the failure detection signal Sd2 with a high signal level from the photocoupler failure detection circuit 11A-8. Therefore, during this period, the warning output circuit 12 can output the alarm signal Sarm to the control device 3 to notify that the state of the photocoupler 22 is at a degradation alarm level.

[0098] When the IGBT 61 is performing a switching operation, if the degree of the defective state of the photocoupler 22 detected by the photocoupler defect detection circuit 11A-8 is within a predetermined range, the warning output circuit 12 notifies that the defective state has been detected by the photocoupler defect detection circuit 11A-8 while the IGBT 61 is continuing its switching operation. Here, the degree of the defective state of the photocoupler 22 being within the predetermined range means that the state of the photocoupler 22 is at a degradation alarm level. The control circuit 1A detects whether the degree of the defective state of the photocoupler 22 is within the predetermined range, i.e., whether the state of the photocoupler 22 is at a degradation alarm level, based on the amount of change in the voltage level of the voltage Vin2a (voltage Vin2b) of the first input signal Sin2 during the period in which the IGBT 61 is controlled to be in the on state. In other words, when the voltage Vin2a (voltage Vin2b) of the first input signal Sin2 is in the voltage range between the voltage Vcp1-2 of the first comparison signal Scp1-2 and the voltage Vcp2-2 of the second comparison signal Scp2-2, the control circuit 1A detects that the degree of the defective state of the photocoupler 22 is within a predetermined range, i.e., the state of the photocoupler 22 is at the degradation warning level.

[0099] The period during which the voltage Vin2a (voltage Vin2b) of the first input signal Sin2 falls within the voltage range between the voltage Vcp1-2 of the first comparison signal Scp1-2 and the voltage Vcp2-2 of the second comparison signal Scp2-2 is the period from time t2 to time t3 shown in FIG. 4. As described above, during the period from time t2 to time t3, the IGBT 61 performs a switching operation. Therefore, the photocoupler failure detection circuit 11A-8 detects a failure state of the photocoupler 22 that has progressed to such an extent that the voltage Vin2a (voltage Vin2b) of the first input signal Sin2 falls within the voltage range. In this case, the warning output circuit 12 notifies by outputting the alarm signal Sarm that the photocoupler failure detection circuit 11A-8 has detected that the state of the photocoupler 22 is at the degradation warning level while the switching operation of the IGBT 61 continues.

[0100] The warning output circuit 12 notifies by outputting an alarm signal Sarm that the photocoupler fault detection circuit 11A-8 has detected that the photocoupler 22 is in a degraded state, even after the voltage Vin2a (voltage Vin2b) of the first input signal Sin2 falls outside the voltage range and becomes higher than the voltages of the first comparison signal Scp1-2 and the second comparison signal Scp2-2, and the switching operation of the IGBT 61 stops, unless the photocoupler 22 is replaced.

[0101] The detection of the defective state of the photocouplers 21 and 22 in the control circuit 1A has been described above by taking the detection of the defective state of the photocoupler 22 by the photocoupler defect detection circuit 11A-8 as an example. Although detailed description is omitted, the photocoupler defect detection circuit 11A-7 can detect the defective state of the photocoupler 21 in stages (i.e., the deterioration alarm level and the deterioration state) by the same operation as the photocoupler defect detection circuit 11A-8. In addition, the warning output circuit 12 can notify the defective state of the photocoupler 21 in stages (i.e., the deterioration alarm level and the deterioration state) according to the respective signal levels of the calculation result signal Sxor1 and the defect detection signal Sd1 input from the photocoupler defect detection circuit 11A-7.

[0102] As described above, the control circuit 1A according to this embodiment includes photocoupler fault detection circuits 11A-7, 11A-8 that detect faulty states including deterioration and abnormality of the photocouplers 21, 22, and a warning output circuit 12 that notifies that a faulty state of the photocouplers 21, 22 has been detected by the photocoupler fault detection circuits 11A-7, 11A-8.

[0103] The semiconductor module SMA according to this embodiment also includes a control circuit 1A according to this embodiment, an IGBT 51 controlled based on a control signal Sic1, and an IGBT 61 controlled based on a control signal Sic2.

[0104] According to the control circuit 1A and the semiconductor module SMA having such a configuration, it is possible to control the detection of a defective state that occurs with the end of the life of the photocouplers 21 and 22.

[0105] Second Embodiment A control circuit and a semiconductor module according to a second embodiment of the present invention will be described with reference to Figures 5 to 7. Hereinafter, with regard to the components of the control circuit and the semiconductor module according to this embodiment, components that have the same actions and functions as those of the control circuit and the semiconductor module according to the first embodiment described above will be denoted by the same reference numerals, and descriptions thereof will be omitted.

[0106] [Semiconductor module configuration] The schematic configuration of the semiconductor module SMB according to the present embodiment will be described with reference to FIG. 5, the semiconductor module SMB has a similar configuration to the semiconductor module SMA according to the first embodiment, except that it includes a control circuit 1B having a different configuration from the control circuit 1A. That is, the semiconductor module SMB includes the control circuit 1B according to this embodiment. The semiconductor module SMB also includes an IGBT 51 (an example of a semiconductor switching element) controlled based on a control signal Sic1, and an IGBT 61 (an example of a semiconductor switching element) controlled based on a control signal Sic2.

[0107] The semiconductor module SMB includes a high side control IC7B having a different configuration from the high side control IC7A and a low side control IC8B having a different configuration from the low side control IC8A, because the control circuit 1B has a different configuration from the control circuit 1A.

[0108] 5, the high-side control IC7B has a signal generating circuit 15-7, which is one of the components of the control circuit 1B, and a photocoupler defect detection circuit 11B-7 having a different configuration from the photocoupler defect detection circuit 11A-7 in the first embodiment. The low-side control IC8B has a signal generating circuit 15-8, which is one of the components of the control circuit 1B, and a photocoupler defect detection circuit 11B-8 having a different configuration from the photocoupler defect detection circuit 11A-8. The signal generating circuits 15-7 and 15-8 and the photocoupler defect detection circuits 11B-7 and 11B-8 will be described in detail later.

[0109] [Control circuit configuration] The schematic configuration of the control circuit 1B according to this embodiment will be described with reference to Fig. 5 and Fig. 6. The signal generating circuit 14-7, the first judgment circuit 13-7, and the photocoupler defect detection circuit 11B-7 provided in the high side control IC 7B as components of the control circuit 1B to detect the defective state of the photocoupler 21, and the signal generating circuit 14-8, the first judgment circuit 13-8, and the photocoupler defect detection circuit 11B-8 provided in the low side control IC 8B as components of the control circuit 1B to detect the defective state of the photocoupler 22, have the same configuration. Therefore, in describing the control circuit 1B, a description of the specific configurations of the signal generating circuit 14-7, the first judgment circuit 13-7, and the photocoupler defect detection circuit 11B-7 will be omitted.

[0110] As shown in FIG. 6, the control circuit 1B includes a signal generating circuit 15-8 that generates a second input signal Sin2-8 based on a control signal Sic2 and has a different signal level from the first input signal Sin2 generated by the signal generating circuit 14-8. The signal generating circuit 15-8 includes a constant current source 151-8, a resistor element 152-8, and a resistor element 153-8 that are connected in series between a power supply terminal 82 and a reference potential terminal 83. The power supply terminal 82 is a terminal for supplying a power supply voltage to the low-side control IC 8B. The reference potential terminal 83 is a terminal for supplying a reference potential to the low-side control IC 8B. The power supply side terminal of the constant current source 151-8 is connected to the power supply terminal 82, and the output terminal of the constant current source 151-8 is connected to one terminal of the resistor element 152-8. The other terminal of the resistor element 152-8 is connected to one terminal of the resistor element 153-8, and the other terminal of the resistor element 153-8 is connected to the reference potential terminal 83. The signal generating circuit 15-8 generates, as a second input signal Sin2-8 based on the control signal Sic2, a signal having a voltage level of a voltage drop caused in the resistive element 153-8 by a current flowing from the constant current source 151-8 side.

[0111] The power supply side terminal of the constant current source 151-8 and the power supply terminal 82 are connected to the low-side power supply terminal Tvc2. The output terminal of the constant current source 151-8 and one terminal of the resistor element 152-8 are connected to the low-side input terminal Tin2. The other terminal of the resistor element 153-8 and the reference potential terminal 83 are connected to the low-side ground terminal Tgnd2 and the common reference potential terminal Tcom. Therefore, the reference potential of the low-side control IC 8B becomes the same potential as the reference potential input from the common reference potential terminal Tcom.

[0112] The resistance value of the combined resistance of the resistor element 152-8 and the resistor element 153-8 is set to be the same as the resistance value of the combined resistance of the resistor element 142-8 and the resistor element 143-8 provided in the signal generating circuit 14-8, and the resistance value of the resistor element 153-8 is set to be larger than the resistance value of the resistor element 143-8. In addition, the constant current source 151-8 is configured to output a constant current of the same current amount as the constant current output by the constant current source 141-8. Therefore, the signal level of the second input signal Sin2-8 generated by the signal generating circuit 15-8 becomes higher than the signal level of the first input signal Sin2 generated by the signal generating circuit 14-8.

[0113] 6, the control circuit 1B includes a first judgment circuit 13-8 having the same configuration as the first judgment circuit 13-8 in the first embodiment. The first judgment circuit 13-8 in this embodiment includes a first comparator 131-8 that compares the signal level of the first input signal Sin2 with the signal level of a first comparison signal Scp1-2 that is set to a predetermined signal level. The first judgment circuit 13-8 includes a comparison signal generator 132-8 that generates the first comparison signal Scp1-2.

[0114] The control circuit 1B includes a photocoupler failure detection circuit 11B-8 that detects a failure state including deterioration and abnormality of the photocoupler 22 (an example of an optical coupler). The photocoupler failure detection circuit 11B-8 includes a second comparator 111-8, an XOR gate 113-8, and a latch circuit 114-8.

[0115] The second comparator 111-8 compares the signal level of the first comparison signal Scp1-2 with the second input signal Sin2-8, which has a signal level different from the first input signal Sin2 and is based on the control signal Sic2. The non-inverting input terminal (+) of the second comparator 111-8 is connected to the positive terminal of the comparison signal generating unit 132-8. The inverting input terminal (-) of the second comparator 111-8 is connected to the other terminal of the resistance element 152-8 and one terminal of the resistance element 153-8. The output terminal of the second comparator 111-8 is connected to one input terminal of the XOR gate 113-8. Therefore, the second comparator 111-8 compares the signal level of the second input signal Sin2-8 input from the signal generating circuit 15-8 with the signal level of the first comparison signal Scp1-2 input from the comparison signal generating unit 132-8 based on the voltage level. The second comparator 111-8 outputs a second output signal Sout2-2 based on the result of comparison between the second input signal Sin2-8 and the first comparison signal Scp1-2 to the XOR gate 113-8.

[0116] Although the same control signal Sic2 is input to each of the signal generating circuit 14-8 and the signal generating circuit 15-8, the second input signal Sin2-8 generated by the signal generating circuit 15-8 has a higher signal level than the first input signal Sin2 generated by the signal generating circuit 14-8. Therefore, as the deterioration of the photocoupler 22 progresses, the second input signal Sin2-8 becomes higher at an earlier stage than the first comparison signal Scp1-2 compared to the first input signal Sin2. Therefore, the signal level of the second output signal Sout2-2 output from the second comparator 111-8 becomes low at an earlier stage than the first output signal Sout1-2 output from the first comparator 131-8. As a result, the photocoupler failure detection circuit 11B-8 can detect the deterioration state of the photocoupler 22 in stages, although it uses the first comparison signal Scp1-2 common to the first comparator 131-8.

[0117] Although detailed description is omitted, as shown in FIG. 5, the signal generating circuit 15-7 has the same configuration as the signal generating circuit 15-8 when the constant current source 151-8 is replaced with the constant current source 151-7, the resistive element 152-8 is replaced with the resistive element 152-7, the resistive element 153-8 is replaced with the resistive element 153-7, the power supply terminal 82 is replaced with the power supply terminal 72, the reference potential terminal 83 is replaced with the reference potential terminal 73, and the photocoupler defect detection circuit 11B-8 is replaced with the photocoupler defect detection circuit 11B-7. The power supply terminal 72 is a terminal for supplying a power supply voltage to the high side control IC 7B. The reference potential terminal 73 is a terminal for supplying a reference potential to the high side control IC 7B. The power supply side terminal of the constant current source 151-7 is connected to the power supply terminal 72 and the high side power supply terminal Tvc1. The other terminal of the resistive element 153-8 is connected to the reference potential terminal 73 and the high-side ground terminal Tgnd1.

[0118] The photocoupler fault detection circuit 11B-7 has the same configuration as the photocoupler fault detection circuit 11B-8. A non-inverting input terminal of a second comparator (not shown) provided in the photocoupler fault detection circuit 11B-7 is connected to a connection part of the resistor element 152-7 and the resistor element 153-7. An inverting input terminal of the second comparator is connected to a positive terminal of the comparison signal generating unit 132-8. One input terminal of an XOR gate (not shown) provided in the photocoupler fault detection circuit 11B-7 is connected to an output terminal of the second comparator. The other input terminal of the XOR gate is connected to an output terminal of the first comparator 131-7. An output terminal of the XOR gate is connected to an input of a latch circuit (not shown) provided in the photocoupler fault detection circuit 11B-7. The latch circuit generates a failure detection signal Sd1 regarding a failure state of the photocoupler 21 based on the operation result signal Sxor1 input from the XOR gate, and outputs the generated failure detection signal Sd1 to the warning output circuit 12.

[0119] [Control circuit operation] The operation of the control circuit 1B according to this embodiment will be described using Fig. 7 with reference to Fig. 5 and Fig. 6. In the control circuit 1B, the operation of detecting a defective state of the photocoupler 21 in the high side control IC 7B and the operation of detecting a defective state of the photocoupler 22 in the low side control IC 8B are the same. Therefore, the operation of the control circuit 1B will be described below by taking as an example the operation of detecting a defective state of the photocoupler 22 in the low side control IC 8B, that is, the operation of detecting a defective state of the photocoupler 22 by the control circuit 1B.

[0120] FIG. 7 is a timing chart showing an example of an operation waveform of the control circuit 1B when detecting a defective state due to aging of the photocoupler 22. In FIG. 7, the first row shows the voltage waveforms of the voltage Vin2 of the first input signal Sin2 input to the first comparator 131-8 and the voltage Vcp1-2 of the first comparison signal Scp1-2. In FIG. 7, the second row shows the voltage waveforms of the voltage Vin2-8 of the second input signal Sin2-8 input to the second comparator 111-8 and the voltage Vcp1-2 of the first comparison signal Scp1-2. In FIG. 7, the third row shows the voltage waveform of the voltage Vout1-2 of the first output signal Sout1-2. In FIG. 7, the fourth row shows the voltage waveform of the voltage Vout2-2 of the second output signal Sout2-2. In FIG. 7, the fifth row shows the voltage waveform of the voltage Vxor2 of the operation result signal Sxor2. In Fig. 7, the sixth row shows a voltage waveform of the voltage Vd2 of the defect detection signal Sd2. The horizontal axis of the graph shown in Fig. 7 shows the usage time of the photocoupler 22, and the vertical axis of the graph shown in Fig. 7 shows voltage in each of the first row to the sixth row. In the graph shown in Fig. 7, the passage of time is shown from left to right. Note that the photocoupler 22 starts to deteriorate when the accumulated operation period reaches several years, but in Fig. 7, for ease of understanding, the horizontal time axis is shown ignoring the accumulated operation period required for deterioration of the photocoupler 22.

[0121] 7, a period when the voltage levels of the voltages Vin2 and Vin2-8 are at high level Hi is a period when the control device 3 (see FIG. 5) attempts to control the IGBT 61 (see FIG. 5) to the off state. On the other hand, a period when the voltage levels of the voltages Vin2 and Vin2-8 are not at high level Hi is a period when the control device 3 attempts to control the IGBT 61 to the on state. In the description of this embodiment, for convenience of explanation, the "period when the voltage levels of the voltages Vin2 and Vin2-8 are at high level Hi" is abbreviated to "high level period", and the "period when the voltage levels of the voltages Vin2 and Vin2-8 are not at high level Hi" is referred to as "low level period".

[0122] In the control circuit 1B, as in the control circuit 1A according to the first embodiment, during a high level period, the current output from the constant current source 141-8 does not flow to the photocoupler 22 side but flows to the resistance elements 142-8 and 143-8, and the current output from the constant current source 151-8 does not flow to the photocoupler 22 side but flows to the resistance elements 152-8 and 153-8. As described above, the constant current source 141-8 and the constant current source 151-8 have the same current output capability, and the combined resistance of the resistance elements 142-8 and 143-8 is set to a resistance value that is approximately the same as the combined resistance of the resistance elements 152-8 and 153-8. Therefore, during a high level period, the amount of current flowing from the constant current source 141-8 to the resistance elements 142-8 and 143-8 is approximately the same as the amount of current flowing from the constant current source 151-8 to the resistance elements 152-8 and 153-8. On the other hand, the resistance element 143-8 is set to a lower resistance value than the resistance element 153-8.

[0123] 7, during the high level period, the potential difference between the voltage Vin2 and the voltage Vcp1-2 of the first comparison signal Scp1-2 is smaller than the potential difference between the voltage Vin2-8 and the voltage Vcp1-2. Furthermore, regardless of whether the photocoupler 22 is degraded or not, almost no currents output from the constant current sources 141-8 and 151-8 flow to the photocoupler 22 side during the high level period. Therefore, during the high level period, the potential difference between the voltage Vin2 and the voltage Vcp1-2 of the first comparison signal Scp1-2 is substantially constant, and the potential difference between the voltage Vin2-8 and the voltage Vcp1-2 is also substantially constant.

[0124] The amount of current flowing from the constant current source 141-8 to the resistance element 143-8 is smaller in a low level period than in a high level period, and the amount of current flowing from the constant current source 151-8 to the resistance element 153-8 is similarly smaller in a low level period than in a high level period. However, in the low level period, as in the high level period, the amount of current flowing from the constant current source 141-8 to the resistance element 143-8 and the amount of current flowing from the constant current source 151-8 to the resistance element 153-8 are approximately the same. Therefore, in the low level period, the voltage drop caused in the resistance element 153-8 by the current flowing from the constant current source 151-8 is larger than the voltage drop caused in the resistance element 143-8 by the current flowing from the constant current source 141-8. For this reason, as shown in FIG. 7, the voltage Vin2-8 of the second input signal Sin2-8 becomes higher than the voltage Vcp1-2 of the first comparison signal Scp1-2 at an earlier stage during the low level period compared to the voltage Vin2-8 of the second input signal Sin2-8.

[0125] 7, the photocoupler 22 starts to deteriorate at time t1. In addition, in the example of the waveforms, at time t2 when the deterioration of the photocoupler 22 has progressed more than that at time t1, the voltage Vin2-8 of the second input signal Sin2-8 becomes higher than the voltage Vcp1-2 of the first comparison signal Scp1-2 before the voltage Vin2 of the first input signal Sin2 becomes higher. In addition, in the example of the waveforms, at time t3 when the deterioration of the photocoupler 22 has progressed more than that at time t2, the voltage Vin2 of the first input signal Sin2 becomes higher than the voltage Vcp1-2 of the first comparison signal Scp1-2.

[0126] Therefore, the photocoupler defect detection circuit 11B-8 (see FIG. 6) provided in the control circuit 1B outputs, in the same manner as the photocoupler defect detection circuit 11A-8 (see FIG. 2) in the first embodiment, the operation result signal Sxor2 having the voltage Vxor2 whose voltage level is the low level Lo and the defect detection signal Sd2 having the voltage Vd2 whose voltage level is the low level Lo to the warning output circuit 12 (see FIG. 6) during the period from time t0 to time t2. As a result, the warning output circuit 12 does not output the alarm signal Sarm to the control device 3.

[0127] Similarly to the photocoupler failure detection circuit 11A-8, during the period from time t2 to time t3, the photocoupler failure detection circuit 11B-8 outputs an operation result signal Sxor2 having a voltage Vxor2 whose voltage level is at a high level Hi and a failure detection signal Sd2 having a voltage Vd2 whose voltage level is at a high level Hi to the warning output circuit 12. As a result, the warning output circuit 12 outputs an alarm signal Sarm indicating that the photocoupler 22 is in a deterioration warning level state to the control device 3.

[0128] Furthermore, in the period after time t3, like the photocoupler defect detection circuit 11A-8, the photocoupler defect detection circuit 11B-8 outputs the calculation result signal Sxor2 having the voltage Vxor2 whose voltage level is low level Lo and the defect detection signal Sd2 having the voltage Vd2 whose voltage level is high level Hi to the warning output circuit 12. As a result, the warning output circuit 12 outputs an alarm signal Sarm indicating that the photocoupler 22 is in a deteriorated state to the control device 3.

[0129] The photocoupler failure detection circuit 11B-8 outputs the calculation result signal Sxor2 and a failure detection signal Sd2 generated from the calculation result signal Sxor2 to the warning output circuit 12. The calculation result signal Sxor2 is a signal obtained by performing an exclusive OR operation on the signal level of the first output signal Sout1-2 and the signal level of the second output signal Sout2-2. Therefore, the failure detection signal Sd2 is a signal based on the first output signal Sout1-2 and the second output signal Sout2-2. Therefore, the photocoupler failure detection circuit 11B-8 detects a failure state of the photocoupler 22 based on the first output signal Sout1-2 output from the first comparator 131-8 and the second output signal Sout2-2 output from the second comparator 111-8.

[0130] The first output signal Sout1-2 is a comparison result signal obtained by the first comparator 131-8 comparing the first input signal Sin2 with the first comparison signal Scp1-2. That is, the first output signal Sout1-2 is a signal based on the first input signal Sin2. Therefore, the photocoupler defect detection circuit 11B-8 detects a defective state of the photocoupler 22 based on the first input signal Sin2 and the first output signal Sout1-2 output from the first judgment circuit 13-8.

[0131] Like the photocoupler defect detection circuit 11A-8 in the first embodiment described above, the photocoupler defect detection circuit 11B-8 is capable of detecting a defective state of the photocoupler 22 when detecting deterioration of the photocoupler 22 while the IGBT 61 controlled based on the control signal Sic2 input from the photocoupler 22 via the low-side input terminal Tin2 is performing a switching operation.

[0132] For example, the period from time t2 to time t3 shown in FIG. 7 is a period during which the voltage level of the voltage Vout1-2 of the first output signal Sout1-2 repeats a high level Hi and a low level Lo according to the signal level of the control signal Sic2. The gate drive circuit 81 generates a gate drive signal for switching the IGBT 61 using the first output signal Sout1-2 input from the first comparator 131-8. Therefore, during this period, the gate drive circuit 81 can drive the IGBT 61 by a switching operation based on the change in the signal level of the control signal Sic2. Meanwhile, the photocoupler failure detection circuit 11B-8 can detect that the state of the photocoupler 22 is at a degradation warning level by outputting the calculation result signal Sxor2 having a high level Hi and the failure detection signal Sd2 having a high level Hi to the warning output circuit 12 during the period from time t2 to time t3.

[0133] The photocoupler failure detection circuit 11B-8 can detect that the photocoupler 22 is in a deteriorated state even during a period in which the IGBT 61 is not performing a switching operation after detecting a defective state of the photocoupler 22 (i.e., the period after time t3 shown in FIG. 7). That is, the photocoupler failure detection circuit 11B-8 can detect that the photocoupler 22 is in a deteriorated state by outputting to the warning output circuit 12 the calculation result signal Sxor2 having a low level Lo and the failure detection signal Sd2 having a high level Hi during a period in which the IGBT 61 is not performing a switching operation after detecting a defective state of the photocoupler 22.

[0134] As described above, the control circuit 1B according to this embodiment includes photocoupler fault detection circuits 11B-7, 11B-8 which detect faulty states including deterioration and abnormality of the photocouplers 21, 22, and a warning output circuit 12 which notifies that a faulty state of the photocouplers 21, 22 has been detected by the photocoupler fault detection circuits 11B-7, 11B-8.

[0135] The semiconductor module SMB according to this embodiment also includes a control circuit 1B according to this embodiment, an IGBT 51 controlled based on a control signal Sic1, and an IGBT 61 controlled based on a control signal Sic2.

[0136] According to the control circuit 1B and the semiconductor module SMB having such a configuration, it is possible to control the detection of a defective state that occurs with the life of the photocouplers 21 and 22.

[0137] The present invention is not limited to the first and second embodiments, and various modifications are possible. In the first and second embodiments, the "first input signal based on the control signal" is the first input signal Sin1, Sin2 generated by the signal generating circuits 14-7, 14-8 based on the control signals Sic1, Sic2, but the present invention is not limited to this. For example, the "first input signal based on the control signal" may be the control signal itself input from the photocoupler side.

[0138] In the above first embodiment, the first output signals Sout1-1, Sout1-2 used for both detecting a fault state of the photocouplers 21, 22 and generating a gate drive signal for driving the IGBTs 51, 61 are set higher than the second output signal Sout2-2 used only for detecting a fault state of the photocouplers 21, 22, but the present invention is not limited to this. If the first output signals Sout1-1, Sout1-2 and the second output signal Sout2-2 have different signal levels, the high / low relationship is appropriately set according to the logic of the control circuits 1A, 1B and the semiconductor modules SMA, SMB.

[0139] In the first and second embodiments, a photocoupler externally attached to the outside of the semiconductor module is used as an example of the optical coupler, but the present invention is not limited to this. Even if the optical coupler is provided, for example, inside the semiconductor module, the same effects as those of the control circuit and semiconductor module according to the first and second embodiments can be obtained.

[0140] In the above first and second embodiments, a photocoupler has been described as an example, but the present invention is not limited thereto. The control circuit and semiconductor module according to the present invention can detect a defective state including degradation and abnormality even in active elements such as transistors and diodes, resistive elements, and passive elements such as inductors and capacitors. For example, the control circuit and semiconductor module according to the present invention can detect a short circuit defect or an open circuit defect that occurs in an active element or a passive element based on a change in a voltage applied between both terminals of the active element or the passive element or a change in a current flowing between both terminals of the active element or the passive element.

[0141] In the first and second embodiments, the detection of a defective state of an optical coupler is described by taking the detection of aging deterioration of a photocoupler as an example, but the present invention is not limited to this. For example, the control circuit and semiconductor module according to the present invention can detect an abnormality other than aging deterioration in an optical coupler.

[0142] In the above first and second embodiments, a semiconductor module that functions as an inverter that converts DC power into single-phase AC power has been described as an example, but the present invention is not limited to this. For example, the control circuit according to the present invention can detect a defective state of an optical coupler connected to or provided in a semiconductor module that functions as an inverter that converts DC power into AC power of multiple phases by providing a detection unit corresponding to a photocoupler defect detection circuit for each switching element provided in multiple phases that converts DC power.

[0143] The scope of the present invention is not limited to the exemplary embodiments shown and described, but includes all embodiments that achieve the same effect as the object of the present invention. Furthermore, the scope of the present invention is not limited to the combination of the features of the invention defined by the claims, but may be defined by any desired combination of specific features among all the respective features disclosed. [Explanation of symbols]

[0144] 1A, 1B Control circuit 3. Control device 5,6 Semiconductor elements 7A High Side Control IC 8A Low Side Control IC 11A-7, 11A-8, 11B-7, 11B-8 Photocoupler failure detection circuit 12 Warning output circuit 13-7,13-8 First judgment circuit 14-7,14-8,15-7,15-8 Signal generation circuit 21,22 Photocoupler 31 NOT Gate 32, 141-2, 141-3, 142-7, 142-8, 143-7, 143-8, 152-7, 152-8, 153-7, 153-8 Resistance elements 51,61 IGBT 52,62 Freewheeling diode 71,81 Gate drive circuit 72,82,91,92 Power terminal 73,83 Reference potential terminal 93 Pull-up resistor 94 Constant voltage source 111-8 Second comparator 112-8 Comparison signal generator 113-8 XOR Gate 114-8 Latch circuit 131-7,131-8 First comparator 132-7, 132-8 Comparison signal generation unit 141-7,141-8,151-7,151-8 Constant current source 221 Light Emitting Diode 222 Photodiode 223 Transistor 7A,7B High side control IC 8A,8B Low-side control IC S1, S2 input signal Sarm Alarm Signal Scp1-2 First comparison signal Scp2-2 Second comparison signal Sd1, Sd2 Fault detection signal Sic1, Sic2 control signals Sin1, Sin2 First input signal Sin2-8 Second input signal SMA,SMB Semiconductor Module SOH Overheat detection signal Sout1-1,Sout1-2 First output signal Sout2-2 Second output signal Sxor1,Sxor2 operation result signal T31, T32 signal output terminal T33 signal input terminal Tarm Alarm terminal Tcom Common reference potential terminal Tgnd1 High side ground terminal Tgnd2 Low side ground terminal Tin1 High side input terminal Tin2 Low side input terminal Tn Negative power supply input terminal To AC voltage output terminal Tp Positive power supply input terminal Tvc1 High side power supply terminal Tvc2 Low side power supply terminal

Claims

1. a detection unit that detects a fault state including deterioration and abnormality of the optical coupler; a notification unit that notifies that the defective state has been detected by the detection unit; A control circuit comprising:

2. the detection unit is capable of detecting the defective state when the semiconductor switching element is performing a switching operation, The notification unit is capable of notifying that the defective state has been detected by the detection unit while the semiconductor switching element is performing a switching operation.

2. The control circuit of claim 1.

3. When the semiconductor switching element is performing a switching operation, if the degree of the defective state detected by the detection unit is within a predetermined range, the notification unit notifies that the defective state has been detected by the detection unit while the switching operation of the semiconductor switching element continues.

3. The control circuit of claim 2.

4. a first determination unit that determines a signal level of a first input signal based on a control signal for controlling the semiconductor switching element; The detection unit detects the defective state based on the first input signal and a first output signal output from the first determination unit.

3. The control circuit of claim 2.

5. the first determination unit has a first comparator that compares a signal level of the first input signal with a signal level of a first comparison signal that is set to a predetermined signal level, The detection unit is a second comparator that compares a signal level of the first input signal with a signal level of a second comparison signal that is set to a signal level different from that of the first comparison signal; The fault condition is detected based on the first output signal output from the first comparator and the second output signal output from the second comparator.

5. The control circuit of claim 4.

6. the first determination unit has a first comparator that compares a signal level of the first input signal with a signal level of a first comparison signal that is set to a predetermined signal level, The detection unit is a second comparator that compares a signal level of a second input signal, which has a signal level different from that of the first input signal and is based on the control signal, with a signal level of the first comparison signal; The fault condition is detected based on the first output signal output from the first comparator and the second output signal output from the second comparator.

5. The control circuit of claim 4.

7. The optical coupler is a photocoupler.

2. The control circuit of claim 1.

8. The optical coupler is a photocoupler. A control circuit according to any one of claims 2 to 6.

9. A control circuit according to claim 1 or 7; A semiconductor switching element controlled based on a control signal; A semiconductor module comprising:

10. A control circuit according to any one of claims 2 to 6; The semiconductor switching element A semiconductor module comprising:

11. A control circuit according to claim 8; The semiconductor switching element A semiconductor module comprising:

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