Exposure mask, semiconductor device using the same, and method for manufacturing the same

Abstract

To provide: an exposure mask; a semiconductor device using the same; and a method for manufacturing the same.SOLUTION: An exposure mask 100 for forming a pattern used as a first line width L includes: a first line 110 having a second line width A extended in a first direction Y and smaller than the first line width L; a second line 120 extended with the second line width A so as to be parallel to the first line 110; and at least one bridge line 130 connecting the first and second lines 110 and 120.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present technology relates to a semiconductor device, and more particularly to an exposure mask, a semiconductor element using the same, and a method for manufacturing the same. [Background technology]

[0002] To accommodate the increasing integration and miniaturization of semiconductor devices, high-resolution optical devices capable of forming fine patterns on a substrate have been introduced.

[0003] High resolution optical equipment can be used to create fine patterns of targeted widths.

[0004] A semiconductor element may have a mixture of an area where a pattern with a first pitch is formed and an area where a pattern with a second pitch larger than the first pitch is formed. Therefore, when patterns with various pitches are formed using an optical device optimized for a specific area, there is a risk that the profile of the pattern will deteriorate due to poor focusing during the exposure process.

[0005] Thus, in a manufacturing environment optimized for forming fine patterns, a method is needed for forming a pattern of a desired pitch in a forbidden pitch area due to density differences of patterns formed on a substrate. Summary of the Invention [Problem to be solved by the invention]

[0006] Advantageous Effects of Invention Embodiments of the present technology may provide an exposure mask capable of forming semiconductor patterns with various pitches, a semiconductor device using the same, and a method for manufacturing the same. [Means for solving the problem]

[0007] An exposure mask according to one embodiment of the present technology is an exposure mask for forming a pattern to be used as a first line width, and may be configured to include a first line extending in a first direction and having a second line width smaller than the first line width, a second line extending with the second line width, spaced apart and parallel to the first line, and at least one bridge line connecting the first line and the second line.

[0008] A semiconductor device according to an embodiment of the present technology includes a semiconductor substrate having a first region and a second region, a first target pattern formed in the first region and extending with a second line width along a first direction, and a second target pattern formed in the second region and formed with a first line width larger than the second line width, wherein the second target pattern may be configured to include a first line formed extending with the second line width along the first direction, a second line formed extending with the second line width along the first direction, spaced a predetermined distance from the first line in a second direction different from the first direction, and at least one bridge line connecting the first line and the second line at a predetermined position.

[0009] A semiconductor device according to one embodiment of the present technology may be configured to include a lower structure including a plurality of contacts arranged in a first direction, a first line formed on one side of the plurality of contacts on the lower structure including the plurality of contacts by extending with a second line width along the first direction, a second line formed on the other side of the plurality of contacts on the lower structure including the plurality of contacts by extending with a second line width along the first direction, and a plurality of bridge lines formed to contact an upper portion of each of the plurality of contacts and electrically connect the first line and the second line.

[0010] A method for manufacturing a semiconductor device according to one embodiment of the present technology may include the steps of: providing a semiconductor substrate having a first region and a second region and on which a lower structure is to be formed; forming a first target pattern having a second linewidth smaller than a first linewidth on the lower structure of the first region; forming a photoresist pattern on the lower structure of the second region using an exposure mask including a first line extending along a first direction with the second linewidth, a second line extending with the second linewidth so as to be parallel to the first line, and at least one bridge line connecting the first line and the second line; and patterning a lower film of the photoresist pattern using the photoresist pattern to form a second target pattern operating with the first linewidth. Effect of the Invention

[0011] According to the present technology, semiconductor patterns having different pitches can be formed in a plurality of regions on a substrate without changing an optical device. [Brief description of the drawings]

[0012] [Figure 1A] 1A to 1C are diagrams for explaining the results of pattern formation for different target line widths in a high-resolution optical device. [Figure 1B] 1A to 1C are diagrams for explaining the results of pattern formation for different target line widths in a high-resolution optical device. [Figure 1C] 1A to 1C are diagrams for explaining the results of pattern formation for different target line widths in a high-resolution optical device. [Diagram 2] FIG. 2 is a diagram illustrating the configuration of an exposure mask according to an embodiment. [Diagram 3] FIG. 1 is a plan view of a semiconductor device according to an embodiment. [Figure 4A] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. [Figure 4B] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. [Figure 4C]1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. [Figure 4D] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. [Figure 5A] 1 is a plan view illustrating a method for manufacturing a semiconductor device according to an embodiment; [Figure 5B] 1 is a plan view illustrating a method for manufacturing a semiconductor device according to an embodiment; [Figure 5C] 1 is a plan view illustrating a method for manufacturing a semiconductor device according to an embodiment; [Figure 5D] 1 is a plan view illustrating a method for manufacturing a semiconductor device according to an embodiment; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, embodiments of the present technology will be described in more detail with reference to the accompanying drawings.

[0014] 1A to 1C are diagrams for explaining the results of pattern formation according to target line widths in a high-resolution optical device.

[0015] The manufacturing process of semiconductor integrated circuits includes a photolithography process in which a circuit pattern drawn on an exposure mask is exposed using an illumination system and transferred to a photoresist film applied on a wafer.

[0016] The photoresist pattern formed by the photolithography process is used as a mask for etching a material film to be patterned placed underneath the photoresist pattern. The line width of the photoresist pattern is the line width of a target pattern to be finally formed from the material film to be patterned, and is an important variable that determines the integration density of a semiconductor device.

[0017] In order to form a target pattern that is repeated in the same direction (e.g., in the X direction) with a desired line width, an optical device including a modified illumination system, such as a dipole illumination system, is used. Using the modified illumination system, a target pattern having a fine line width of less than 80 nm can be formed with good quality.

[0018] FIG. 1A shows NILS (Normalized Image Log Slope) for each target line width, FIG. 1B shows a photograph of a target pattern having a line width of about 76 nm, and FIG. 1C shows a photograph of a target pattern having a line width of about 160 nm.

[0019] NILS is a value obtained by normalizing the shape of an image using the inclination and width of the image, and the larger the value, the better the image is realized.

[0020] A photograph of a target pattern with a fine line width of about 76 nm formed using a modified illumination system is shown in Figure 1B. The NILS of such a pattern can be formed with good quality, as shown in Figure 1A, B.

[0021] However, a target pattern having a line width of about 160 nm, which is larger than this, may be formed with a poor profile as shown in FIG. 1A E and FIG. 1C.

[0022] This is said to be a problem of a forbidden pitch section that occurs due to a shortage of ±nth order light caused by a decrease in the amount of exposure light in a modified illumination system optimized for fine patterns.

[0023] A semiconductor device can be divided into, for example, a cell region and a peripheral region, and a target pattern having a line width larger than that of the cell region can be formed in the peripheral region. In order to form target patterns operating at different line widths in the cell region and the peripheral region using a single illumination system, an exposure mask capable of forming a pattern having a line width larger than that of the cell region in the peripheral region is required.

[0024] FIG. 2 is a diagram showing the configuration of an exposure mask according to an embodiment.

[0025] Referring to FIG. 2, an exposure mask 100 may be an exposure mask for forming a target pattern used as a line pattern of a first line width.

[0026] The exposure mask 100 according to the embodiment may include first lines 110 extending in a first direction (Y direction) and having a second line width (A) smaller than the first line width, second lines 120 extending with the second line width (A) parallel to the first lines 110, and at least one bridge line 130 connecting the first lines 110 and the second lines 120. A line group including the first lines 110, the second lines 120, and the bridge line 130 may be formed repeatedly a predetermined number of times at a predetermined interval in the second direction (X direction). The interval (S) between the first lines 110 and the second lines 120 may be configured to be larger than the second line width (A).

[0027] The semiconductor element includes a first region, for example a cell region, in which a first pattern of a second line width is formed, and a second region, for example a peripheral region, in which a second pattern of the first line width is formed.

[0028] The exposure mask 100 shown in FIG. 2 is used to form a second pattern of a first line width in a second region.

[0029] In one embodiment, the second line width may be 1 / 2 of the first line width. For example, the second line width may be 65 nm to 85 nm, and the first line width may be 130 nm to 170 nm, but is not limited thereto. The interval (S) between the first line 110 and the second line 120 may be formed to be, for example, 10 nm larger than the second line width, but is not limited thereto.

[0030] Using a modified illumination system, an image including a first line 110, a second line 120, and a bridge line 130 of a second line width is transferred onto a photoresist film to form a photoresist pattern, and the photoresist pattern is used as an etching mask to pattern the underlying film, which is the film to be patterned, with a good profile.

[0031] FIG. 3 is a plan view of a semiconductor device according to an embodiment.

[0032] Referring to FIG. 3, a semiconductor device 200 according to one embodiment may include a semiconductor substrate 210 having a first region 220 and a second region 230, a first target pattern 240 formed in the first region 220, and a second target pattern 250 formed in the second region 230.

[0033] The first target pattern 240 may be formed extending along a first direction (Y direction) with a second line width (A). The first target pattern 240 may be formed repeatedly a predetermined number of times in a second direction (X direction) spaced apart from each other by a predetermined distance (M).

[0034] The second target pattern 250 is formed with a first line width (L) greater than a second line width (A) and may include a first line 251 , a second line 253 and at least one bridge line 255 .

[0035] The first line 251 may be formed to extend with a second line width (A) along a first direction (Y direction), and the second line 253 may be formed to extend with the second line width (A) along the first direction, spaced apart from the first line 251 by a predetermined distance (S) in the second direction (X direction). The bridge line 255 may be configured to connect the first line 251 and the second line 253 at a predetermined position.

[0036] In one embodiment, a plurality of contacts (not shown) arranged in a first direction may be formed on the bottom of each bridge line 255. In this case, each bridge line 255 is formed in contact with the top of each of the plurality of contacts, and the second target pattern 250 may electrically connect each contact.

[0037] The first line 251 and the second line 253 formed in the second region 230 are formed with a second line width (A) and are connected using a bridge line 255, so that the second target pattern 250 can operate as a target pattern with a first line width (L=2A).

[0038] 4A to 4D are cross-sectional views for explaining a method for manufacturing a semiconductor device in accordance with an embodiment, and FIGS. 5A to 5D are plan views for explaining a method for manufacturing a semiconductor device in accordance with an embodiment.

[0039] Figures 4A to 4D show cross-sectional views of a second region of a semiconductor element formed on a semiconductor substrate consisting of a first region (cell region) and a second region (peripheral region), and Figures 5A to 5D show plan views of the second region.

[0040] Although not shown in the figure, a pattern of a second line width extending in a first direction may be formed in a first region of a semiconductor substrate, repeated at predetermined intervals in a second direction different from the first direction.

[0041] 4A and 5A, a photoresist pattern 350 may be formed on a semiconductor substrate 310 on which the lower structures 320, 330, and 340 are formed.

[0042] The lower structures 320, 330, and 340 may be a structure in which a conductive layer 340 is formed on the interlayer insulating film 330 in which the contact 320 is formed, and then planarized. The lower structures are not limited thereto, and may have various forms, such as a lower structure derived by a dual damascene process.

[0043] The photoresist pattern 350 may be formed using, for example, the exposure mask 100 shown in FIG. 2. The photoresist pattern 350 may include a first line 351 extending in a first direction and having a second line width (A) smaller than the first line width, a second line 353 extending parallel to the first line 351 and having the second line width (A), and at least one bridge line 355 connecting the first line 351 and the second line 353. The photoresist pattern 350 including the first line 351, the second line 353, and the bridge line 355 may be repeatedly formed a predetermined number of times in a second direction (X direction) tilted at a certain angle with respect to the first direction. The bridge line 355 may be provided at a position capable of covering the upper portion of each of the plurality of contacts 320 arranged in the first direction.

[0044] 4B and 5B, the conductive layer 340 may be patterned using the photoresist pattern 350 as an etching mask.

[0045] As shown in Figures 4C and 5C, an insulating film 360 may be formed on the entire structure, and planarized to expose the top of the conductive layer 340, to form target patterns 380 operating at a first line width, as shown in Figures 4D and 5D. The insulating film 370 may remain between the target patterns 380. The first line width may be at least twice the second line width.

[0046] This allows a target pattern operating at a first line width larger than the second line width to be formed with a good profile using an optical device set to form a fine second line width.

[0047] Thus, a person skilled in the art to which the present invention pertains can understand that the present invention can be embodied in other specific forms without changing the technical idea or essential features thereof. Therefore, the above-described embodiments should be understood to be illustrative in all respects and not limiting. The scope of the present invention is defined by the claims below rather than the detailed description, and all modifications or variations derived from the meaning and scope of the claims and their equivalent concepts should be interpreted as being included in the scope of the present invention.

Claims

1. An exposure mask for forming a pattern used as a first line width, a first line extending in a first direction and having a second line width smaller than the first line width; a second line extending parallel to and spaced apart from the first line and having the second line width; and at least one bridge line connecting the first line and the second line.

2. 2. The exposure mask of claim 1, wherein a line group including the first line, the second line, and the at least one bridge line is formed in a second direction different from the first direction at a predetermined distance therebetween and repeated a predetermined number of times.

3. 2. The exposure mask of claim 1, wherein the first line width is at least twice as large as the second line width.

4. a semiconductor substrate including a first region and a second region; a first target pattern formed in the first region and extending along a first direction with a second line width; a second target pattern formed in the second region and having a first line width greater than the second line width; A semiconductor device, wherein the second target pattern is configured to include: a first line formed by extending with the second line width along the first direction; a second line formed by extending with the second line width along the first direction, spaced a predetermined distance from the first line in a second direction different from the first direction; and at least one bridge line connecting the first line and the second line at a predetermined position.

5. The semiconductor device of claim 4 , wherein the first target pattern is repeatedly formed a predetermined number of times so as to be spaced apart at a predetermined distance in the second direction.

6. The semiconductor device of claim 4 , further comprising contacts each formed under the at least one bridge line.

7. The semiconductor device of claim 4 , wherein the second target pattern is repeatedly formed a predetermined number of times so as to be spaced apart from each other by a predetermined distance in the second direction.

8. a substructure including a plurality of contacts arranged in a first direction; a first line formed on one side of the plurality of contacts on the lower structure including the plurality of contacts, the first line extending along the first direction with a second line width; a second line formed on the lower structure including the plurality of contacts on the other side of the plurality of contacts, the second line extending along the first direction with a second line width; a plurality of bridge lines formed in contact with respective upper portions of the plurality of contacts and connecting the first line and the second line.

9. 9. The semiconductor device of claim 8, wherein the first line, the second line, and the plurality of bridge lines are operated in a pattern with a first line width greater than the second line width.

10. 10. The semiconductor device of claim 9, wherein the first line width is at least twice as large as the second line width.

11. Providing a semiconductor substrate having a first region and a second region on which a substructure is to be formed; forming a first target pattern on the underlying structure in the first region, the first target pattern having a second linewidth smaller than the first linewidth; forming a photoresist pattern on the lower structure in the second region using an exposure mask including a first line extending along a first direction with the second line width, a second line extending with the second line width so as to be parallel to the first line, and at least one bridge line connecting the first line and the second line; and patterning a film underneath the photoresist pattern using the photoresist pattern to form a second target pattern operating at the first line width.

12. The method of claim 11 , wherein the lower structure includes at least one contact arranged in the first direction, and the bridge line is formed at a position corresponding to a position of the contact.

13. The method of claim 11 , wherein the first line width is at least twice as large as the second line width.

14. forming an insulating film on a second region in which the second target pattern is to be formed; The method of claim 11 , further comprising: removing the insulating film so that the second target pattern is exposed.

15. a semiconductor substrate including a first region and a second region; a first target pattern formed in the first region and having a first width; a plurality of second target patterns each having a second width formed in the second region; The second target pattern is a first line extending in a first direction; a second line formed at a distance from the first line along a second direction different from the first direction; at least one bridge line connected between the first line and the second line.

16. The semiconductor device according to claim 15 , wherein the second target pattern is patterned using a photoresist pattern.

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