Light receiving element, optical device, and electronic device

Abstract

To provide a light receiving element capable of reducing at least one of power consumption and a dead time while reducing an input voltage to a readout circuit.SOLUTION: A light receiving element includes a photon response multiplication portion including a charge multiplication region capable of multiplying charge generated in response to the incidence of a photon, a first resistance portion connected at one end to one end of the photon response multiplication portion, and having a resistance value greater than a resistance value of the photon response multiplication portion, a second resistance portion connected at one end to the other end of the first resistance portion, and a readout portion connected to the other end of the first resistance portion and reading out an output from the photon response multiplication portion via the first resistance portion.SELECTED DRAWING: Figure 4B

Description

[Technical field]

[0001] The present disclosure relates to a light receiving element, an optical device, and an electronic device. [Background technology]

[0002] Single photon avalanche diodes (hereafter referred to as SPADs) that utilize avalanche multiplication are known as one type of optical element that converts received light into an electrical signal and outputs that electrical signal. Avalanche multiplication is a phenomenon in which electrons and holes generated by the incidence of a photon are accelerated by a high electric field, generating new electrons and holes one after another. A pair of electrons and holes is multiplied many times over, causing a large current to flow, and SPADs that utilize this have the advantage of being able to detect weak light. [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] APPLIED OPTICS, Vol.35, No.12, 20 April 1996 Summary of the Invention [Problem to be solved by the invention]

[0004] When a SPAD is in operation, a reverse bias voltage of several tens of volts is applied between the cathode and anode of the SPAD. This can lead to large changes in the cathode potential caused by the large current generated by the SPAD. The change in the cathode potential is read by the readout circuit, so the input voltage to the readout circuit also changes significantly. In this case, the change must be kept below the withstand voltage of the readout circuit. Furthermore, in a SPAD, avalanche amplification causes a large current to flow, which tends to increase power consumption.

[0005] Resistive voltage division is sometimes used to reduce the input voltage to the readout circuit below the withstand voltage and reduce power consumption (Non-Patent Document 1). However, the time constant determined by the resistance value of the resistor for resistive voltage division, the cathode parasitic capacitance of the SPAD, and the input parasitic capacitance to the readout circuit becomes large, and the period for recharging the SPAD may become long. The recharge period is the so-called dead time during which the SPAD cannot detect photons. In other words, with resistive voltage division, although it is possible to reduce the input voltage to the readout circuit below the withstand voltage and reduce power consumption, the inconvenience of increased dead time may occur.

[0006] In view of this, the present disclosure proposes a light receiving element, an optical device, and an electronic device that are capable of reducing at least one of the power consumption and the dead time while reducing the input voltage to a readout circuit. [Means for solving the problem]

[0007] According to the present disclosure, there is provided a light receiving element comprising: a photon response multiplication section including a charge multiplication region capable of multiplying charge generated in response to the incidence of a photon; a first resistance section connected at one end to one end of the photon response multiplication section, the first resistance section having a resistance value greater than the resistance value of the photon response multiplication section; a second resistance section connected at one end to the other end of the first resistance section, the second resistance section having a resistance value greater than the resistance value of the photon response multiplication section; and a readout section connected to the other end of the first resistance section and reading out an output from the photon response multiplication section via the first resistance section.

[0008] The present disclosure also provides an optical device in which a plurality of light receiving elements are arranged in a matrix, each of which includes a photon response multiplication section including a charge multiplication region capable of multiplying charge generated in response to the incidence of a photon, a first resistance section connected at one end to one end of the photon response multiplication section, the first resistance section having a resistance value greater than the resistance value of the photon response multiplication section, a second resistance section connected at one end to the other end of the first resistance section, the second resistance section having a resistance value greater than the resistance value of the photon response multiplication section, and a connection point connecting the other end of the first resistance section, the one end of the second resistance section, and a readout section that reads out an output from the photon response multiplication section.

[0009] Furthermore, according to the present disclosure, there is provided an electronic device comprising: an optical system; a photon response multiplication section including a charge multiplication region capable of multiplying charge generated in response to incidence of photons transmitted through the optical system; a first resistance section connected at one end to one end of the photon response multiplication section, the first resistance section having a resistance value greater than a resistance value of the photon response multiplication section; a second resistance section connected at one end to the other end of the first resistance section, the second resistance section having a resistance value greater than a resistance value of the photon response multiplication section; and an optical device in which a plurality of light receiving elements are arranged in a matrix, each of the light receiving elements having connection points connecting the other end of the first resistance section, the one end of the second resistance section, and a readout section that reads out an output from the photon response multiplication section. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram showing an example of a schematic configuration of an electronic device to which an optical device according to an existing technology is applied. [Diagram 2] FIG. 1 is a block diagram showing a schematic configuration example of an optical device according to an existing technique. [Figure 3A] FIG. 1 is a block diagram showing an example of a schematic configuration of a pixel of an optical device according to an existing technique. [Figure 3B] FIG. 11 is a block diagram showing another example of a schematic configuration of a pixel of an optical device according to an existing technique. [Figure 3C]1 is a graph showing a schematic diagram of a change in cathode potential when one photon is incident on a photodiode of a pixel of an optical device according to existing technology. [Figure 3D] 1 is a graph showing a schematic voltage-current characteristic of a photodiode of a pixel of an optical device according to existing technology. [Figure 4A] 1 is a block diagram showing a schematic configuration example of an optical device according to a first embodiment. [Figure 4B] 1 is a block diagram showing a schematic configuration example of a pixel in a pixel array portion of an optical device according to a first embodiment. [Figure 5A] 4 is a diagram showing a schematic diagram of a change in a cathode voltage when one photon is incident on a single-photon avalanche diode included in a pixel of a pixel array portion of the optical device according to the first embodiment. FIG. [Figure 5B] 4A to 4C are diagrams for explaining the operation of a pixel of the optical device according to the first embodiment. [Figure 5C] 5B. FIG. 5C is a diagram for explaining the operation of a pixel of the optical device according to the first embodiment, following FIG. 5B. [Figure 5D] 5D is a diagram for explaining the operation of a pixel of the optical device according to the first embodiment, following FIG. 5C. FIG. [Figure 5E] 5D. FIG. 5C is a diagram for explaining the operation of a pixel of the optical device according to the first embodiment, following FIG. 5D. [Figure 6A] FIG. 1 is a diagram showing an example of a pixel configuration according to a conventional example. [Figure 6B] FIG. 1 is a diagram showing an example of a pixel configuration according to a conventional example. [Figure 7A] 1 is a block diagram showing a specific example 1 of a shielding resistor in a pixel of the optical device according to the first embodiment. FIG. [Figure 7B] 10 is a block diagram showing a specific example 2 of a shielding resistor in a pixel of the optical device according to the first embodiment. FIG. [Figure 8A] 1 is a block diagram showing a specific example 1 of a quench resistor portion in a pixel of the optical device according to the first embodiment. FIG. [Figure 8B]FIG. 11 is a block diagram showing a specific example 2 of a quench resistor portion in a pixel of the optical device according to the first embodiment. [Figure 8C] 8C is a diagram for explaining the operation of a pixel according to Example 2 of the quench resistor portion shown in FIG. 8B. FIG. [Figure 9A] 2 is a block diagram showing a specific example 1 of a readout circuit in a pixel of the optical device according to the first embodiment. FIG. [Figure 9B] 4A to 4C are diagrams illustrating the operation of a readout circuit in a pixel of the optical device according to the first embodiment. [Figure 9C] FIG. 2 is a block diagram showing specific example 2 of a readout circuit in a pixel of the optical device according to the first embodiment. [Figure 10A] FIG. 11 is a block diagram showing a schematic configuration example of a pixel of an optical device according to a second embodiment. [Figure 10B] 10A to 10C are diagrams illustrating the operation of a pixel of the optical device according to the second embodiment. [Figure 10C] FIG. 11 is a block diagram showing a specific example 3 of a shielding resistor in a pixel of the optical device according to the second embodiment. [Figure 11] FIG. 11 is a block diagram showing a schematic configuration example of a pixel of an optical device according to a third embodiment. [Figure 12] FIG. 13 is a block diagram showing an example of a layered structure of an optical device according to a fourth embodiment. [Figure 13] FIG. 13 is a block diagram showing a schematic configuration example of a pixel of an optical device according to a fourth embodiment. [Figure 14] 13 is a vertical cross-sectional view showing an example of the cross-sectional structure of a surface perpendicular to a light incident surface of an optical device according to a fourth embodiment. FIG. [Figure 15] 15 is a horizontal cross-sectional view showing an example of the cross-sectional structure of the AA plane in FIG. 14. [Figure 16] FIG. 11 is a schematic diagram illustrating a pixel included in an optical device according to a comparative example. [Figure 17A] FIG. 13 is a block diagram showing a first modified example of a pixel of an optical device according to a fourth embodiment. [Figure 17B]FIG. 13 is a block diagram showing a second modified example of a pixel of an optical device according to a fourth embodiment. [Figure 17C] FIG. 13 is a block diagram showing a third modified example of a pixel of an optical device according to a fourth embodiment. [Figure 17D] FIG. 13 is a block diagram showing a fourth modified example of a pixel of an optical device according to the fourth embodiment. [Figure 17E] FIG. 13 is a block diagram showing a fifth modified example of a pixel of an optical device according to the fourth embodiment. [Figure 18A] FIG. 13 is a block diagram showing a sixth modified example of a pixel of an optical device according to the fourth embodiment. [Figure 18B] FIG. 13 is a block diagram showing a seventh modified example of a pixel of an optical device according to the fourth embodiment. [Figure 19A] FIG. 13 is a block diagram showing an eighth modified example of a pixel of an optical device according to the fourth embodiment. [Figure 19B] FIG. 13 is a block diagram showing a 9th modified example of a pixel of an optical device according to the fourth embodiment. [Figure 19C] FIG. 13 is a block diagram showing a modified example 10 of a pixel of an optical device according to a fourth embodiment. [Figure 20] 1 is a schematic diagram illustrating an imaging apparatus as an electronic device to which an optical device according to an embodiment of the present disclosure can be applied. [Figure 21] 1 is a block diagram illustrating an example of the configuration of a distance measuring device as an electronic device to which an optical device according to an embodiment of the present disclosure can be applied. [Figure 22] 1 is a block diagram showing an example of a schematic configuration of a pixel in a pixel array section of an optical device of a distance measuring apparatus as an electronic device to which the present technology is applied. FIG. [Diagram 23] 1 is a diagram illustrating distance measurement by a direct Time of Flight (ToF) method in a distance measuring device as an electronic device to which the present technology is applied. FIG. [Figure 24] 11 is a diagram showing an example of a histogram based on light-receiving times, which is generated in a distance measuring device as an electronic device to which the present technology is applied. FIG. [Diagram 25] 1 is a block diagram showing an example of a schematic configuration of an in-vivo information acquiring system. [Figure 26] 1 is a diagram illustrating an example of a schematic configuration of an endoscopic surgery system. [Figure 27] 2 is a block diagram showing an example of a functional configuration of a camera head and a CCU. FIG. [Figure 28] 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; [Figure 29] 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit; FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following embodiments, the same components are designated by the same reference numerals, and duplicated descriptions will be omitted.

[0012] Prior to describing the embodiments of the present disclosure, existing techniques related to the embodiments of the present disclosure will be described in order to facilitate understanding of the embodiments of the present disclosure. 1 is a block diagram showing a schematic configuration example of an electronic device to which an optical device according to an existing technology is applied. As shown in FIG. 1, the electronic device 1 includes, for example, an imaging lens 30, an optical device 10, a storage unit 40, and a processor 50.

[0013] The imaging lens 30 is an example of an optical system that collects incident light and forms an image of the collected light on the light receiving surface of the optical device 10. The light receiving surface may be a surface on which pixels are arranged in a matrix in the optical device 10. The optical device 10 photoelectrically converts the incident light to generate image data. The optical device 10 also performs predetermined signal processing such as noise removal and white balance adjustment on the generated image data.

[0014] The storage unit 40 is configured with, for example, a flash memory, a dynamic random access memory (DRAM), a static random access memory (SRAM), or the like, and records the image data input from the optical device 10, and the like.

[0015] The processor 50 is configured using, for example, a CPU (Central Processing Unit) and the like, and may include an application processor that executes an operating system, various application software, etc., a GPU (Graphics Processing Unit), a baseband processor, etc. The processor 50 performs various processes as necessary on image data input from the optical device 10, image data read from the storage unit 40, etc., displays the data to the user, and transmits the data to the outside via a predetermined network.

[0016] 2 is a block diagram showing a schematic configuration example of the above-mentioned optical device 10. As shown in the figure, the optical device 10 includes a pixel array unit 11, a timing control circuit 15, a drive circuit 12, and an output circuit 13.

[0017] The pixel array unit 11 includes a plurality of pixels 20 arranged in a matrix. A pixel drive line LD (vertical direction in the drawing) is connected to each column of the plurality of pixels 20, and an output signal line LS (horizontal direction in the drawing) is connected to each row of the pixels 20. One end of the pixel drive line LD is connected to an output terminal of a drive circuit 12 corresponding to each column, and one end of the output signal line LS is connected to an input terminal of an output circuit 13 corresponding to each row.

[0018] The drive circuit 12 includes a shift register, an address decoder, etc., and drives each pixel 20 of the pixel array unit 11, either all pixels at the same time or column by column. The drive circuit 12 applies a selection control voltage to a pixel drive line LD corresponding to a column to be read out, thereby selecting pixels 20 to be used for detecting the incidence of photons column by column. A signal (called a detection signal) output from each pixel 20 in the column selected and scanned by the drive circuit 12 is input to the output circuit 13 through each output signal line LS. The output circuit 13 outputs the detection signal input from each pixel 20 to the storage unit 40 or the processor 50 as a pixel signal.

[0019] The timing control circuit 15 includes a timing generator that generates various timing signals, and controls the drive circuit 12 and the output circuit 13 based on the various timing signals generated by the timing generator.

[0020] 3A is a block diagram showing an example of a schematic configuration of a pixel 20 of the pixel array unit 11. As shown in the figure, the pixel 20 includes a photodiode 21 and a quench resistor 22. In this pixel 20, the photodiode 21 is a single photon avalanche diode (hereinafter, referred to as SPAD 21). In the SPAD 21, even if only one photon is incident, a large current is generated by avalanche multiplication, and this current is output as an electrical signal. The operation of the SPAD 21 will be described later.

[0021] In the illustrated example, the anode of the SPAD 21 is connected to a predetermined power supply, and the cathode of the SPAD 21 is connected to one end of the quench resistor 22. The other end of the quench resistor 22 is grounded. This allows a reverse bias voltage VDDL to be applied across the SPAD 21, as described below. In addition, a cathode parasitic capacitance CK is generated as a parasitic capacitance on the cathode side of the SPAD 21. The cathode parasitic capacitance CK corresponds to a combined capacitance of the capacitance of the SPAD 21, the capacitance generated between the quench resistor 22 and its surrounding insulating layer, the capacitance generated by the wiring connecting the SPAD 21 and the quench resistor 22, and the capacitance of elements such as an inverter included in the readout circuit 23.

[0022] 3B, a readout circuit 23 is connected to the connection point between the SPAD 21 and the quench resistor 22 in the pixel 20. The readout circuit 23 may include, for example, an inverter circuit, and reads out a change in the potential (i.e., the cathode potential) at the connection point between the SPAD 21 and the quench resistor 22 as described below.

[0023] In addition, in the pixel 20, a subsequent circuit 24 is connected to the output terminal of the readout circuit 23. The subsequent circuit 24 can include, for example, a digital counter circuit, and thus the pixel 20 can function as a photon counter element. In this case, image data can be generated based on an output signal corresponding to the number of photons detected in each pixel 20. That is, the optical device 10 can function as an imaging sensor.

[0024] Furthermore, the latter circuit 24 may include a time-to-digital converter (TDC) circuit instead of a digital counter circuit. The TDC circuit may generate a digital signal indicating a time difference between a predetermined reference signal having a predetermined reference frequency and a detection signal based on the reference signal. When the latter circuit 24 includes a TDC circuit, the optical device 10 may function as a distance measuring element using, for example, a Time of Flight (ToF) method.

[0025] Next, the operation of the SPAD 21 will be described with reference to Figures 3C and 3D. Figure 3C is a graph showing a schematic diagram of the change in the cathode potential VK of the SPAD 21 when one photon is incident on the SPAD 21. Figure 3D is a graph showing a schematic diagram of the voltage-current characteristics of the SPAD 21. In Figure 3D, the horizontal axis shows the voltage applied between the anode and cathode of the SPAD 21. This applied voltage is set by setting the anode potential of the SPAD 21 to V An The cathode potential is V Ca Then, V An -V Ca In FIG. 3D, the vertical axis represents the current I An This shows that.

[0026] When a forward bias voltage is applied to the SPAD 21, a current I Anflows in the forward direction, and the current value increases as the applied voltage increases. On the other hand, when a reverse bias voltage is applied to the SPAD 21, the current I An However, when the reverse bias voltage becomes lower than the breakdown voltage -Vbd, avalanche multiplication occurs and a large current I An flows in the reverse direction. The region between the breakdown voltage (-Vbd) and a voltage (-Vbd-Ve) that is lower than this by a voltage Ve (also called excess voltage Ve) is called the Geiger region. In the Geiger region, the gain due to avalanche multiplication is theoretically infinite. By applying a reverse bias voltage of, for example, several tens of volts to both ends of the SPAD21, the SPAD21 can operate in the Geiger region.

[0027] When a predetermined voltage corresponding to the Geiger region is applied between the anode of the SPAD 21 and the ground terminal of the quench resistor 22 from a predetermined power source, if a photon (just one photon will do) is incident on the SPAD 21 (at t0 in FIG. 3C), an electron-hole pair is generated by this photon, and this electron-hole pair is accelerated by the high electric field caused by the reverse bias voltage, and electron-hole pairs are generated one after another. In other words, avalanche multiplication occurs. This causes a large current to flow in the reverse direction.

[0028] This current also flows through the quench resistor 22, causing a voltage drop across the quench resistor 22. This causes the voltage applied to the SPAD 21 to drop. When the (absolute value of) the voltage applied between the cathode and anode of the SPAD 21 becomes lower than the breakdown voltage (absolute value |Vbd|), the avalanche amplification stops (time t1). The phenomenon in which the avalanche multiplication stops is called quenching.

[0029] After this, a current is supplied to the SPAD 21 through the quench resistor 22, and the SPAD 21 is charged. This charging is called recharge. The recharge is performed for a certain period (time t1 to t2) with a time constant determined by the cathode parasitic capacitance CK (FIGS. 3A and 3B). When the recharge is completed (time t2), the voltage applied to the SPAD 21 returns to a voltage corresponding to the Geiger region, and the SPAD 21 can operate in this region again. As described above, when a photon is incident on the SPAD 21, the cathode potential VK of the SPAD 21 changes in a pulse shape as shown in FIG. 3C. Such a change is read by the readout circuit 23, and as a result, the photon is detected. During the recharge period, the SPAD 21 cannot detect photons, so this period is called dead time.

[0030] (First embodiment) [Configuration of the Optical Device According to the First Embodiment] Next, a configuration example of an optical device according to a first embodiment of the present disclosure will be described. Fig. 4A is a block diagram showing a schematic configuration example of an optical device according to the first embodiment. As shown in the figure, the optical device 100 includes a pixel array unit PAR, a column circuit 310, a row scanning circuit 320, and an interface circuit 330.

[0031] The pixel array section PAR has a plurality of pixels (light receiving elements) 200 arranged in a matrix. The pixels 200 are connected to bit lines BL0, BL1, . . . , BL S (hereinafter, unless there is a need to distinguish between them, they will be referred to as bit lines BL) are connected to each row, and word lines WL0, WL1, . . . , WL N (Hereinafter, unless there is a need to distinguish between them, they will be referred to as word lines WL) are connected to the bit lines BL. One end of the bit lines BL is connected to an output terminal of the column circuit 310 corresponding to each column, and one end of the word lines WL is connected to an input terminal of the row scanning circuit 320 corresponding to each row. For ease of explanation, the vertical direction in the figure will be referred to as the column direction, and the horizontal direction will be referred to as the row direction.

[0032] The row scanning circuit 320 drives each pixel 200 of the pixel array unit PAR all at once or column by column. The row scanning circuit 320 applies a selection control voltage to a word line WL corresponding to a column to be read out, thereby selecting a pixel 200 to be used for detecting the incidence of photons in column by column. A signal (called a detection signal) output from each pixel 200 in a column selected and scanned by the row scanning circuit 320 is input to the column circuit 310 through each bit line BL. The column circuit 310 generates a digital signal by digitally converting the detection signal. The generated digital signal is output to the outside through the interface circuit 330. The column circuit 310 and the row scanning circuit 320 are controlled by a timing signal from a timing control circuit (not shown).

[0033] [Pixel configuration of the optical device according to the first embodiment] 4B is a block diagram showing a schematic configuration example of a pixel 200 in the pixel array unit PAR of the optical device 100 according to this embodiment. As shown in the figure, the pixel 200 has a photodiode 210, a shielding resistor unit 211, and a quench resistor unit 212. In this embodiment, the photodiode 210 is a SPAD, and will be referred to as a SPAD 210 hereinafter. The SPAD 210 generates a large current by multiplying charges generated by photoelectric conversion in response to the incidence of one photon by avalanche multiplication (also called avalanche amplification), and outputs the current as an electrical signal. However, the photodiode 210 is not limited to a SPAD, and may be a silicon photomultiplier tube.

[0034] One end of the shielding resistance unit 211 is connected to the cathode of the SPAD 210, and the other end of the shielding resistance unit 211 is connected to one end of the quenching resistance unit 212. That is, in the pixel 200, a series circuit is formed in which the SPAD 210, the shielding resistance unit 211, and the quenching resistance unit 212 are connected in series.

[0035] The shielding resistance portion 211 and the quenching resistance portion 212 can be formed of, for example, high-resistance polysilicon. Further, the shielding resistance portion 211 and the quenching resistance portion 212 may be formed as metal resistances. Examples of materials for metal resistances include so-called cermet-based materials such as TaSiO2 and NbSiO2. Here, let the resistance value of the shielding resistance portion 211 be Rsh, and the resistance value between the cathode and the anode of the SPAD 210 be R ON Then, the relationship of R ON < Rsh is satisfied. That is, the shielding resistance portion 211 is formed to have a resistance value larger than the resistance value between the cathode and the anode of the SPAD 210. The effects caused by such a relationship will be described later.

[0036] Also, when the resistance value of the quenching resistance portion 212 is Rq, the relationship of Rsh < Rq is satisfied. That is, the shielding resistance portion 211 and the quenching resistance portion 212 are formed such that the resistance value Rq of the quenching resistance portion 212 is larger than the resistance value Rsh of the shielding resistance portion 211. The effects caused by such a relationship will be described later.

[0037] Also, as shown in FIG. 4B, a parasitic capacitance C1 is generated on the cathode side of the SPAD 210. This parasitic capacitance C1 corresponds to a combined capacitance such as the capacitance of the SPAD 210 and the capacitance generated by the wiring connecting the SPAD 210 and the shielding resistance portion 211. Further, a parasitic capacitance C2 is generated between the shielding resistance portion 211 and the quenching resistance portion 212. The parasitic capacitance C2 corresponds to a combined capacitance such as the capacitance generated between the shielding resistance portion 211 and the surrounding insulating layer, the capacitance generated between the quenching resistance portion 212 and the surrounding insulating layer, the capacitance generated by the wiring connecting the shielding resistance portion 211 and the quenching resistance portion 212, and the capacitance of elements such as the inverter included in the readout circuit 230 (described later). Note that since there are many circuit elements such as the shielding resistance portion 211, the quenching resistance portion 212, and the readout circuit 230 (described later) around the parasitic capacitance C2 compared to around the parasitic capacitance C1, the capacitance (value) of the parasitic capacitance C2 tends to be larger than the capacitance (value) of the parasitic capacitance C1.

[0038] One end of a read circuit 230 is connected to the connection point between the shielding resistance unit 211 and the quench resistance unit 212. The read circuit 230 may include, for example, an inverter circuit. The read circuit 230 reads out a change in potential at the connection point between the shielding resistance unit 211 and the quench resistance unit 212, as described later.

[0039] In addition, in the pixel 200, a digital counter circuit 240 is connected to the output terminal of the readout circuit 230. The digital counter circuit 240 counts the number of changes in potential at the connection point between the shielding resistor section 211 and the quench resistor 22, which is read out by the readout circuit 230, i.e., the number of photons incident on the SPAD 210, and outputs an output signal according to the count number. When a selection signal is input to the pixel 200 from the row scanning circuit 320 (FIG. 4A) through the word line WL, this output signal is output from the digital counter circuit 240 to the column circuit 310 through the bit line BL. By converting the output signal into luminance, the optical device 100 can function as an imaging element.

[0040] Note that a TDC circuit may be connected in place of the digital counter circuit downstream of the readout circuit 230. This makes it possible to directly perform distance measurement using the ToF method based on the output from the readout circuit 230 and the difference between the light emission timing and the light reception timing.

[0041] In addition, the optical device 100 can also function as a distance measurement unit that performs distance measurement using an indirect ToF method in which the light receiving unit receives light for each phase in response to the light emitted by a specified light source unit, and calculates distance information based on the light receiving signal for each phase output by the light receiving unit upon receiving the light for each phase.

[0042] 4B, the series circuit of the SPAD 210, the shielding resistance unit 211, and the quenching resistance unit 212 is connected to a predetermined power supply, the anode of the SPAD 210 is maintained at potential VDDL, and the other end of the quenching resistance unit 212 (the end opposite to the one end connected to the shielding resistance unit 211) is maintained at potential VDDH. That is, a voltage equivalent to potential VDDH-potential VDDL is applied to the series circuit of the SPAD 210, the shielding resistance unit 211, and the quenching resistance unit 212. Here, since the potential VDDH is higher than the potential VDDL, a reverse bias voltage is applied to the SPAD 210. When the pixel 200 is in operation, this applied voltage is set to a predetermined voltage corresponding to the Geiger region described above.

[0043] [Operation of pixels of the optical device according to the first embodiment] Next, the operation of the pixel 200 will be described with reference to Figures 5A to 5E. Figures 5B to 5E show the pixel 200 in a schematic manner similar to Figure 4B, but omit the digital counter circuit 240 (or the TDC circuit), the word line WL, the bit line BL, etc.

[0044] First, a predetermined voltage is applied to the series circuit of the SPAD210, the shielding resistor unit 211, and the quench resistor unit 212 by a predetermined power supply. That is, a (reverse bias) voltage corresponding to the Geiger region is applied to the SPAD210. When a photon is incident on the SPAD210 in this state (time t0 in FIG. 5A), avalanche multiplication occurs, and a large current flows in the SPAD210 from the cathode to the anode. Here, as shown in FIG. 5B, the current I2 flowing out from the parasitic capacitance C2 is represented typically by a thin arrow, and the current I1 flowing out from the parasitic capacitance C1 is represented typically by a thick line, the large current flowing from the cathode to the anode of the SPAD210 is mainly supplied from the parasitic capacitance C1. This is because a resistance value R between the cathode and anode of the SPAD210 is provided between the parasitic capacitance C2 and the SPAD210. ONThis is because the shielding resistance unit 211 having a resistance value Rsh larger than C1 is provided. In other words, the charge accumulated in the parasitic capacitance C1 easily moves to the SPAD 210, whereas the charge accumulated in the parasitic capacitance C2 is hindered by the shielding resistance unit 211 and does not easily move to the SPAD 210. Therefore, during avalanche multiplication, a current is mainly supplied from the parasitic capacitance C1 to the SPAD 210.

[0045] During avalanche multiplication, as shown in the period t0 to t1 in Fig. 5A, the cathode potential VK1 of the SPAD 210 decreases due to the large current generated by the avalanche multiplication. When the voltage applied across the SPAD 210 becomes lower than the breakdown voltage with the decrease in the cathode potential VK1, quenching occurs (time t1 in Fig. 4C). At this time, the charge accumulated in the parasitic capacitance C1 is discharged, and the supply of the current I1 from the parasitic capacitance C1 to the SPAD 210 is also stopped, as shown in Fig. 5C.

[0046] 5A, during the avalanche multiplication period (t0 to t1), the potential VK2 between the shielding resistance unit 211 and the quench resistance unit 212 does not drop as much as the potential VK1. This is because, as described above, it is difficult for a current to flow from the parasitic capacitance C2.

[0047] As quenching occurs, charge redistribution starts between the parasitic capacitance C1 and the parasitic capacitance C2 (time t1 in FIG. 5A). That is, as shown in FIG. 5D, the charge remaining in the parasitic capacitance C2 moves to the parasitic capacitance C1 through the shielding resistor 211. Here, since the resistance value Rq of the quench resistor 212 is larger than the resistance value Rsh of the shielding resistor 211, the current I3 flowing through the quench resistor 212 only slightly contributes to the charge redistribution. For this reason, the charge redistribution is mainly performed between the parasitic capacitance C2 and the parasitic capacitance C1. When the voltage across the parasitic capacitance C1 and the voltage across the parasitic capacitance C2 become equal (when the potential VK1 and the potential VK2 become equal), the redistribution ends (time t2).

[0048] When the redistribution is completed, recharging begins. That is, since the current I2 from the parasitic capacitance C2 stops flowing, the recharging of the SPAD 210 proceeds by the current I3 flowing through the quench resistor unit 212, as shown in FIG. 5E. Here, since there is no charge loss in the redistribution of charge between the parasitic capacitance C2 and the parasitic capacitance C1, the amount of charge required for recharging is equal to C1ΔVK1 consumed in the avalanche multiplication. That is, an amount of charge equal to C1ΔVK1 is supplied to the SPAD 210 by the current I3. When the recharging is completed (time t3), the SPAD 210 becomes able to detect photons again.

[0049] [Effects of the operation of pixels of the optical device according to the first embodiment] Next, the effects produced by the operation of the pixel 200 of the optical device according to the first embodiment will be described in comparison with a conventional example. Fig. 6A is a diagram showing a configuration example of a pixel according to a conventional example, and this configuration example is almost the same as the configuration disclosed in Non-Patent Document 1. As shown in the figure, the pixel of the conventional example has an avalanche photodiode PD1 and a resistor R L and resistor R S and are connected in series. Also, resistor R L and resistor R S An inverter IVT is connected to the connection point of the resistor R S One end of resistor R S and resistor R L The end of the avalanche photodiode PD1 opposite to the connection point with the resistor R is grounded, and a reverse bias voltage (for example, several tens of volts) is applied to the avalanche photodiode PD1. When a photon is incident on the avalanche photodiode PD1 and avalanche multiplication occurs, a voltage drop occurs in the avalanche photodiode PD1, as shown by the curve CL1 in FIG. 6A. Meanwhile, this voltage drop causes a L and resistor R S The voltage at the connection point with the inverter IVT, i.e., the voltage V applied to the input terminal of the inverter IVT IVT also decreases (curve CL2 in FIG. 6A).

[0050] Here, the voltage drop in the avalanche photodiode PD1 due to avalanche multiplication is Vd, and the resistor R L The resistance value of resistor R S If the resistance value of is RQ2, the voltage V IVT is expressed by the following formula: V IVT = Vd × {1 / (1+RQ1 / RQ2)} That is, the voltage V applied to the input terminal of the inverter IVT is determined by the ratio RQ1 / RQ2 between the resistance value RQ1 and the resistance value RQ2. IVT is reduced to be lower than the voltage drop Vd in the avalanche photodiode PD1. In particular, the larger this ratio RQ1 / RQ2 is, the lower the voltage V IVT Generally, the voltage applied to the avalanche photodiode PD1 reaches several tens of volts, so the voltage drop Vd during avalanche amplification may exceed the withstand voltage of the inverter IVT, for example. L The resistance value of RQ1 and resistor R S By appropriately adjusting the ratio of the resistance RQ2 to the voltage V IVT Therefore, it is possible to make the voltage lower than the withstand voltage of the inverter IVT, and it is possible to protect the inverter IVT.

[0051] However, in an actual circuit, as shown in FIG. 6B, a cathode parasitic capacitance C01 occurs at the cathode terminal of the avalanche photodiode PD1, and an input parasitic capacitance C02 occurs at the input terminal of the inverter IVT. Here, in order to increase the ratio RQ1 / RQ2, a resistor R L When the resistance value RQ1 is increased, the time constant determined by the resistance value RQ1, the cathode parasitic capacitance C01, and the input parasitic capacitance C02 becomes larger. As a result, the recharge time becomes longer, and the dead time becomes longer.

[0052] On the other hand, in the first embodiment of the present disclosure, during a series of operations of avalanche multiplication, quenching, redistribution, and recharging shown in Figures 5B to 5D, the cathode potential VK1 of SPAD 210 drops by ΔVK1, and the potential VK2 at the other end (the end opposite to the one end connected to SPAD 210) of shielding resistance unit 211 drops by ΔVK2. Here, assuming that the capacitance (value) of parasitic capacitance C1 is CC1 and the capacitance (value) of parasitic capacitance C2 is CC2, ΔVK2 is expressed by the following formula. ΔVK2=ΔVK1×{1 / (1+CC2 / CC1)} That is, the voltage ΔVK2 generated at the other end of the shielding resistance unit 211 during a series of operations is lower than the voltage ΔVK1 generated across the SPAD 210 by the capacitance ratio CC2 / CC1. The voltage ΔVK2 at the other end of the shielding resistance unit 211 is an input voltage to the readout circuit 230, and is lower than the voltage ΔVK1 generated across the SPAD 210. This makes it possible to protect the readout circuit 230. That is, it can be said that the readout circuit 230 is protected by the ratio CC2 / CC1 of the capacitance (value) CC2 of the parasitic capacitance C2 to the capacitance (value) CC1 of the parasitic capacitance C1.

[0053] As described with reference to FIG. 5B, the shielding resistor 211 has a resistance value R ON Since the parasitic capacitance C2 has a resistance Rsh larger than the resistance Rsh, during avalanche multiplication of the SPAD 210, only a small amount of current I2 flows from the parasitic capacitance C2, and the current I1 flows mainly from the parasitic capacitance C1. Capacitance (value) of parasitic capacitance C1 CC1 < Capacitance (value) of parasitic capacitance C2 CC2 Resistance value R ON <Resistance value Rsh According to the above relationship, the capacitance (value) CC1 and the resistance value R ONThe time constant determined by the capacitance (value) CC2 and the resistance value Rsh is smaller than the time constant determined by the capacitance (value) CC2 and the resistance value Rsh. Since the current I1 is supplied from the parasitic capacitance C1 to the SPAD 210 through a circuit with a small time constant, the period during which avalanche multiplication occurs can be shortened. Therefore, the time from when a photon is incident on the SPAD 210 until it becomes possible to detect the photon again (dead time in a broad sense) can be shortened.

[0054] During avalanche amplification, the current I1 mainly flows from the parasitic capacitance C1, and only a small amount of the current I2 flows from the parasitic capacitance C2, so the amount of current that flows can be reduced. Therefore, power consumption can be reduced compared to when the current I2 also flows from the parasitic capacitance C2.

[0055] Furthermore, as quenching occurs, charge redistribution from the parasitic capacitance C2 to the parasitic capacitance C1 occurs, and only after the redistribution is completed does the current I3 flowing through the quench resistor 212 contribute to recharging. Therefore, the time required for recharging by the current I3 is shortened, and it is possible to shorten the dead time. Furthermore, since charge is redistributed from the parasitic capacitance C2 to the parasitic capacitance C1, the current I3 required for recharging can be reduced. In other words, power consumption can be reduced.

[0056] As described above, in the pixel 200 of the optical device according to this embodiment, the ratio CC2 / CC1 of the capacitance (value) CC2 of the parasitic capacitance C2 to the capacitance (value) CC1 of the parasitic capacitance C1 makes it possible to reduce the input voltage to the readout circuit 230 below the withstand voltage of the readout circuit 230. In addition, a resistance value R between the cathode and anode of the SPAD 210 is provided between the cathode of the SPAD 210 and the input terminal of the readout circuit 230. ONSince the shielding resistance unit 211 having a resistance value Rsh larger than the resistance value Rsh of the shielding resistance unit 211 is provided, effects such as shortening the dead time and reducing power consumption are achieved. Furthermore, since the resistance value Rq of the quench resistance unit 212 is larger than the resistance value Rsh of the shielding resistance unit 211, recharging by the current I3 starts after the redistribution of charge from the parasitic capacitance C2 to the parasitic capacitance C1 is completed. In other words, the power required for recharging can also be reduced, making it possible to further reduce power consumption.

[0057] [Examples of shielding resistor parts] Next, a specific example of the shielding resistor 211 will be described with reference to Figures 7A and 7B. In these figures, the digital counter circuit 240 (or the TDC circuit), the word line WL, the bit line BL, and the like shown in Figure 4B are omitted.

[0058] 7A is a block diagram showing a first specific example of the shielding resistor 211 in the pixel 200 of the optical device 100 according to the first embodiment. As shown in the figure, the shielding resistor 211 can be realized by a resistor element 211A. The resistor element 211A may be formed of, for example, high-resistance polysilicon or a metal resistor. The high-resistance polysilicon or metal resistor is formed by a thin film formation process, a photolithography technique, an etching process, or the like in a known semiconductor manufacturing process when forming wiring.

[0059] 7B, in specific example 2, the shielding resistor 211 may be configured by, for example, a P-channel metal oxide semiconductor (MOS) transistor 211B. In this case, a bias voltage generating unit 250 is provided to apply a bias voltage to the gate of the MOS transistor 211B. For example, the voltage applied to the gate of the MOS transistor 211B from the bias voltage generating unit 250 is adjusted by an instruction signal from the row scanning circuit 320 (FIG. 4A), thereby adjusting the resistance value between the source and drain of the MOS transistor 211B, i.e., the resistance value Rsh of the shielding resistor 211. This adjustment adjusts the resistance value R of the SPAD 210. ON and the resistance value Rsh of the shielding resistor portion 211.ON The relationship of Rsh can be appropriately realized. Therefore, shortening of the dead time and reduction of power consumption can be surely realized.

[0060] In addition, although one MOS transistor 211B is illustrated in FIG. 7B, the overall resistance value Rsh of the shielding resistance portion 211 may be adjusted by arranging a plurality of MOS transistors 211B in series and applying a date voltage to each of them. Further, in FIGS. 7A and 7B, the pixel 200 in the first embodiment is shown, but this specific example 1 is also applicable to the pixel 200B in the third embodiment.

[0061] Also, at the time of avalanche multiplication of the SPAD 210, by increasing the resistance value between the source and drain of the MOS transistor 211B, the flow of the current I2 from the parasitic capacitance C2 is suppressed to reduce the power consumption. On the other hand, by reducing the resistance value between the source and drain of the MOS transistor 211B along with the occurrence of quenching, the redistribution of charges is promoted, and it is also possible to shorten the dead time.

[0062] [Specific Example of Quenching Resistance Portion] Next, a specific example of the quenching resistance portion 212 will be described. FIG. 8A is a block diagram showing a specific example 1 of the quenching resistance portion in the pixel 200 of the optical device according to the first embodiment.

[0063] As shown in FIG. 8A, the quench resistance portion 212 can have a constant current source 212A. Since the constant current source 212A has a large internal resistance, the relationship Rsh < Rq between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 is easily satisfied. Therefore, during avalanche amplification or during the redistribution of charges between the parasitic capacitance C2 and the parasitic capacitance C1, it is possible to reduce the contribution of the current from the quench resistance portion 212 (corresponding to the current I3 in FIG. 5B, etc.), and it is also possible to reduce power consumption. Further, the constant current source 212A can also maintain the current (corresponding to the current I3) during charging at a predetermined value. For this reason, by appropriately adjusting the recharge current, it is possible to efficiently execute the recharge.

[0064] Next, a specific example 2 of the quench resistance portion 212 will be described. In the pixel 200C in the specific example 2, as shown in FIG. 8B, an active recharge circuit 212B is provided instead of the quench resistance portion 212 in the pixel 200 of the first embodiment. However, the active recharge circuit 212B is also applicable to the pixels 200A and 200B.

[0065] The active recharge circuit 212B includes a switch 212S and a control unit 212C that controls ON / OFF of the switch 212S. The switch 212S electrically connects and disconnects a predetermined power supply (VDDH) and the shielding resistance portion 211 under the control of the control unit 212C. The control unit 212C is connected to the output end of the readout circuit 230 at one end. Thereby, the control unit 212C detects the output voltage of the readout circuit 230. Specifically, when the control unit 212C detects the fall of the pulsed output voltage from the readout circuit 230, after a predetermined delay time, the control unit 212C outputs an ON signal to turn on the switch 212S to the switch 212S. Further, after outputting the ON signal, when a predetermined period has elapsed, the control unit 212C outputs an OFF signal to turn off the switch 212S to the switch 212S.

[0066] The active recharge circuit 212B configured as above operates as follows. As shown in FIG. 8C, when avalanche amplification occurs due to the incidence of photons at time t0, the cathode potential VK1 decreases. When quenching occurs and redistribution of charge from the parasitic capacitance C2 to the parasitic capacitance C1 begins, the cathode potential VK1 increases again. That is, the cathode potential VK1 changes to a negative pulse shape. In contrast, the potential VK2 at the connection point between the shielding resistance unit 211 and the active recharge circuit 212B decreases throughout the avalanche amplification (period t0 to t1) and redistribution (period t1 to t2). Such a potential change is detected by the readout circuit 230. Here, when the potential VK2 falls below a predetermined first threshold potential, the readout circuit 230 outputs an output voltage, and when the potential VK2 falls below a predetermined second threshold potential Vth, the readout circuit 230 stops outputting the output voltage. That is, the read circuit 230 outputs a pulsed output voltage during the period in which the potential VK2 changes from the first threshold potential to the second threshold potential Vth. When the control unit 212C detects the fall of the output voltage of the read circuit 230 (at time t D ), a given delay time (period t D After a lapse of time (t3 to t3), the switch 212S is turned ON (t3), and a current is supplied from a predetermined power source to the SPAD 210 through the shielding resistance unit 211.

[0067] In the active recharge circuit 212B, as described above, the switch 212S is OFF until the potential VK2 falls below the second threshold potential Vth (until the pulsed output signal from the readout circuit 230 falls). Therefore, during the period from when a photon is incident to when the pulsed output signal from the readout circuit 230 falls, the supply of current (corresponding to the current I3 in FIG. 5B and the like) from the power source to the shielding resistance unit 211 is stopped. Therefore, during avalanche amplification, a current flows from the parasitic capacitance C1, and during charge redistribution, a current flows from the parasitic capacitance C2 to the parasitic capacitance C1. Because the switch 212S is OFF, no current flows through the shielding resistance unit 211, so that power consumption can be reliably reduced.

[0068] Furthermore, when the falling edge of the pulsed output signal from the readout circuit 230 is detected and a predetermined delay time has elapsed, the switch 212S turns ON (time t3). This causes a current to be supplied from the power supply to the shielding resistor 211, accelerating recharging. This makes it possible to shorten the dead time. Here, if the timing at which the switch 212S turns ON is matched with the time at which the redistribution of charge from the parasitic capacitance C2 to the parasitic capacitance C1 ends, the dead time can be shortened more appropriately. Note that a constant current source may be provided instead of the power supply. This allows the current value of the current that flows after the switch 212S turns ON to be appropriately adjusted, and therefore makes it possible to complete the recharging in a short time. At time t3, when the switch 212S is turned ON and a current is supplied from the power source to the shielding resistance unit 211, the potential VK2 rapidly returns to the potential before the photon incidence, while the cathode potential VK1 of the SPAD 210 returns to the potential before the photon incidence with a delay from the potential VK2 as shown in Fig. 8C. This is because the time constant of the potential VK1 is larger by the resistance value of the shielding resistance unit 211.

[0069] [Example of readout circuit] Next, a description will be given of a specific example of the readout circuit 230. Fig. 9A is a block diagram showing a specific example 1 of the readout circuit in the pixel 200 of the optical device according to the first embodiment.

[0070] 9A, the readout circuit 230 may include an inverter 230A. An input terminal of the inverter 230A is connected to a connection point between the shielding resistance unit 211 and the quench resistance unit 212. Moreover, power is supplied to the inverter 230A through a predetermined wiring.

[0071] 9B, the inverter 230A operates such that when the potential VK2 at the connection point between the shielding resistance unit 211 and the quench resistance unit 212 becomes lower than a predetermined threshold Vth, the output voltage Vout becomes HIGH, and when the potential VK2 exceeds the predetermined threshold Vth, the output voltage Vout becomes LOW. As a result, even if the potential VK2 changes in a V-shape, the change can be output as a square-wave pulse wave. By employing the inverter 230A as the readout circuit 230, it is possible to read out the change in the potential VK2 at the connection point between the shielding resistance unit 211 and the quench resistance unit 212.

[0072] In the second specific example of the readout circuit, as shown in Fig. 9C, the readout circuit 230 has a P-channel MOS transistor 230B and a current source 230C. In this way, the MOS transistor 230B is ON during a period in which the magnitude of the potential VK2 is equal to or lower than a predetermined voltage, and a predetermined pulse-like output voltage Vout corresponding to that period is output. Therefore, it is possible to read out the change in the potential VK2, similar to the inverter 230A in Fig. 9A.

[0073] Second Embodiment Next, an optical device according to a second embodiment of the present disclosure will be described with reference to Figs. 10A and 7B. Fig. 10A is a block diagram showing a schematic configuration example of a pixel 200A of an optical device according to a second embodiment. In Fig. 10A, a digital counter circuit 240 (or a TDC circuit), a word line WL, a bit line BL, etc. are omitted, but the pixel 200A is similar to the pixel 200 of the optical device 10 according to the first embodiment with respect to configurations other than those shown. In addition, the optical device according to this embodiment can have the same configuration as the optical device 100 according to the first embodiment, and can be replaced with the optical device 10 in the electronic device 1 (Fig. 1) in the same manner as the optical device 100.

[0074] Referring to FIG. 10A, one end of the shielding resistor 211 is connected to the anode of the SPAD 210A, and one end of the quenching resistor 212 is connected to the other end of the shielding resistor 211. That is, in the pixel 200A of the present embodiment, unlike the pixel 200 in the first embodiment where the shielding resistor 211 and the quenching resistor 212 are connected in series on the cathode side of the SPAD 210, the shielding resistor 211 and the quenching resistor 212 are connected in series on the anode side of the SPAD 210A. On the other hand, the resistance value R ON of the SPAD 210A and the resistance value Rsh of the shielding resistor 211 satisfy the relationship of R ON < Rsh, and the resistance value Rsh of the shielding resistor 211 and the resistance value Rq of the quenching resistor 212 satisfy the relationship of Rsh < Rq. In this regard, the pixel 200A is the same as the pixel 200.

[0075] As shown in the figure, a parasitic capacitance C1 is generated between the anode of the SPAD 210A and the shielding resistor 211. This parasitic capacitance C1 corresponds to a combined capacitance such as the capacitance of the SPAD 210A and the capacitance generated by the wiring connecting the SPAD 210A and the shielding resistor 211. Further, a parasitic capacitance C2 is generated between the shielding resistor 211 and the quenching resistor 212. The parasitic capacitance C2 corresponds to a combined capacitance such as the capacitance generated by the shielding resistor 211, the capacitance generated by the quenching resistor 212, the capacitance generated by the wiring connecting the shielding resistor 211 and the quenching resistor 212, and the capacitance of elements such as the inverter included in the readout circuit 230. Also, the input terminal of the readout circuit 230 is connected to the connection point between the shielding resistor 211 and the quenching resistor 212.

[0076] The cathode of the SPAD 210A is connected to the high-potential terminal of a predetermined power supply, and the other end of the quenching resistor 212 (the end opposite to the connection point between the quenching resistor 212 and the shielding resistor 211) is connected to the low-potential terminal of a predetermined power supply. During operation, a predetermined reverse bias voltage (potential VDDH - potential VDDL) corresponding to the Geiger region is applied between the SPAD 210A by a predetermined power supply.

[0077] Next, the operation of the SPAD 210A in this embodiment will be described. Fig. 10B is a graph showing a schematic change in the anode potential VA1 of the SPAD 210A and the potential VA2 of the connection point (the input terminal of the readout circuit 230) between the shielding resistance unit 211 and the quenching resistance unit 212 when one photon is incident on the SPAD 210A of the pixel 200A.

[0078] When a certain voltage corresponding to the Geiger region is applied to the SPAD210A from a certain power source, when one photon is incident on the SPAD210A (time t0), avalanche multiplication occurs in the SPAD210A, and a large current flows from the cathode to the anode. As a result, the anode potential VA1 of the SPAD210A rises (relative to the potential VDDL) during the period t0 to t1 as shown in FIG. 10B.

[0079] At this time, the resistance value Rsh of the shielding resistor 211 is equal to the resistance value R ON Since the parasitic capacitance C2 is larger than the parasitic capacitance C1, the current I1 flows to the SPAD 210A mainly from the parasitic capacitance C1. Since only a small amount of the current I2 flows from the parasitic capacitance C2, the current flowing to the SPAD 210A during avalanche amplification can be reduced. This can reduce power consumption.

[0080] In addition, the capacitance (value) CC1 of the parasitic capacitance C1 is smaller than the capacitance (value) CC2 of the parasitic capacitance C2, and the resistance between the cathode and anode of the SPAD 210 is R ON is smaller than the resistance value Rsh of the shielding resistor 211, the capacitance (value) CC1 and the resistance value R ON The time constant determined by is smaller than the time constant determined by the capacitance (value) CC2 and the resistance value Rsh. Since the current I1 from the parasitic capacitance C1 is supplied to the SPAD 210 through a circuit with a small time constant, the period during which avalanche multiplication occurs can be shortened. Therefore, the time from when a photon is incident on the SPAD 210 until it becomes possible to detect the photon again (dead time in a broad sense) can be shortened.

[0081] Furthermore, as the anode potential VA1 of the SPAD 210A rises during avalanche amplification, the potential VA2 at the connection point between the shielding resistance unit 211 and the quench resistance unit 212 also rises. If the rise in potential VA1 is ΔVA1, the rise in potential VA2 is ΔVA2, the capacitance (value) of the parasitic capacitance C1 is CC1, and the capacitance (value) of the parasitic capacitance C2 is CC2, then: ΔVA2=ΔVA1×{1 / (1+CC2 / CC1)} This is expressed as: That is, the voltage (ΔVA2) applied to the input terminal of the read circuit 230 is lower than ΔVA1. Therefore, the input voltage (ΔVA2) can be maintained lower than the withstand voltage of the read circuit 230, and the read circuit 230 can be protected.

[0082] When the voltage (absolute value) applied to the SPAD 210A becomes smaller than the breakdown voltage (absolute value) with the rise of the anode potential VA1, quenching occurs (time t1). As quenching occurs, charge redistribution starts between the parasitic capacitance C2 and the parasitic capacitance C1 (time t1). That is, the charge remaining in the parasitic capacitance C2 moves to the parasitic capacitance C1 through the shielding resistance unit 211. Here, since the resistance value Rq of the quenching resistance unit 212 is larger than the resistance value Rsh of the shielding resistance unit 211, the current I3 flowing through the quenching resistance unit 212 only slightly contributes to the charge redistribution. For this reason, the charge redistribution occurs mainly between the parasitic capacitance C1 and the parasitic capacitance C2. When the voltage across the parasitic capacitance C1 becomes equal to the voltage across the parasitic capacitance C2, the redistribution ends (time t2).

[0083] When the redistribution is completed, recharging starts. That is, when the redistribution of the charge is completed, the current does not flow from the parasitic capacitance C2, and the SPAD 210 is recharged by the current I3 flowing through the quench resistor 212. When the recharge is completed (time t3), the SPAD 210 becomes able to detect photons again.

[0084] As described above, according to the pixel 200A of the optical device according to the second embodiment, even when the shielding resistance portion 211 and the quenching resistance portion 212 are arranged on the anode side of the SPAD 210A, the resistance value R between the cathode and the anode of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 satisfy the relationship of R ON < Rsh, and the resistance value Rsh of the shielding resistance portion 211 and the resistance value Rq of the quenching resistance portion 212 satisfy the relationship of Rsh < Rq. Further, since the capacitance (value) CC1 of the parasitic capacitance C1 and the capacitance (value) CC2 of the parasitic capacitance C2 satisfy the relationship of CC1 < CC2, the same effects as those of the pixel 200 of the optical device according to the first embodiment are exhibited.

[0085] Also, as shown in FIG. 10C, in the pixel 200A of the optical device according to the second embodiment, the shielding resistance portion 211 can be constituted by, for example, an N-channel type MOS transistor 211C. In this case, a bias voltage generation unit 250 that applies a bias voltage to the gate of the MOS transistor 211C is provided. Even when the MOS transistor 211C is used as the shielding resistance portion 211 in the pixel 200A, the same effects as those when the P-channel type MOS transistor 211B (FIG. 7B) is used in the pixel 200 of the optical device according to the first embodiment are exhibited. Further, also in this case, a plurality of MOS transistors 211C may be used.

[0086] Note that the specific example of the quenching resistance portion described with reference to FIGS. 8A to 8C and the specific example of the readout circuit described with reference to FIGS. 9A to 9C can also be appropriately applied to the second embodiment.

[0087] (Third Embodiment) Next, with reference to FIG. 11, an optical device according to the third embodiment of the present disclosure will be described. As shown in the figure, in the pixel 200B of the optical device according to the present embodiment, the SPAD 210, the shielding resistance portion 211, the quenching resistance portion 212, and the readout circuit 230 are arranged in the same manner as the pixel 200 (FIG. 4B) of the optical device according to the first embodiment. The resistance value R of the SPAD 210ON There is a relationship of R between this and the resistance value Rsh of the shielding resistance part 211. ON <There is a relationship of R < Rsh between the resistance value Rsh of the shielding resistance part 211 and the resistance value Rq of the quenching resistance part 212. In this regard as well, the pixel 200B is the same as the pixel 200. Note that the digital counter circuit 240 (or TDC circuit), word line WL, bit line BL, etc. shown in FIG. 4B are omitted in FIG. 11, but the pixel 200B may be configured in the same manner as the above-described pixels 200 and 200A. Further, the optical device according to the present embodiment can have the same configuration as the optical device 100 according to the first embodiment, and can be replaced with the optical device 10 in the electronic device 1 (FIG. 1) in the same manner as the optical device 100.

[0088] On the other hand, in the pixel 200B in the present embodiment, capacitance variable elements VC1 and VC2 are provided. Specifically, one end of the capacitance variable element VC1 is grounded, and the other end is provided so as to be connected to the cathode of the SPAD 210. Further, one end of the capacitance variable element VC2 is grounded, and the other end is provided so as to be connected to a wiring connecting the shielding resistance part 211 and the quenching resistance part 212. That is, the capacitance variable element VC1 is provided instead of the parasitic capacitance C1 in the pixel 200 of the optical device according to the first embodiment, and the capacitance variable element VC2 is provided instead of the parasitic capacitance C2.

[0089] Each of the capacitance variable elements VC1 and VC2 can be formed by, for example, one MOS transistor. In this case, a bias voltage generation unit that applies a gate voltage to the gate of the MOS transistor is provided. For example, under the control of the row scanning circuit 320, the capacitance of the capacitance variable elements VC1 and VC2 can be adjusted by adjusting the gate voltage applied from the bias voltage generation unit to the gate electrode of the MOS transistor.

[0090] In addition, each of the variable capacitors VC1 and VC2 may be formed by a plurality of MOS transistors. In this case, a bias voltage generation unit that applies a date voltage to the gate of each MOS transistor is provided. According to such a configuration, for example, under the control of the row scanning circuit 320, the capacitance of the variable capacitors VC1 and VC2 can be adjusted by adjusting the number of MOS transistors to which the gate voltage is applied. Note that the variable capacitors VC1 and VC2 may be formed by complementary metal oxide semiconductor (CMOS) transistors.

[0091] Also in the pixel 200B of the optical device according to the present embodiment, similar to the pixel 200 of the optical device according to the first embodiment, the resistance value R of the SPAD 210 ON There is a relationship of R < Rsh between the resistance value Rsh of the shielding resistance portion 211, and there is a relationship of Rsh < Rq between the resistance value Rsh of the shielding resistance portion 211 and the resistance value Rq of the quenching resistance portion 212. Therefore, if the capacitances of the variable capacitor VC1 and the variable capacitor VC2 are adjusted so that the capacitance of the latter is larger, the same effect as that exhibited by the pixel 200 is also exhibited by the pixel 200B. ON <Rsh, and there is a relationship of Rsh < Rq between the resistance value Rsh of the shielding resistance portion 211 and the resistance value Rq of the quenching resistance portion 212. Therefore, if the capacitances of the variable capacitor VC1 and the variable capacitor VC2 are adjusted so that the capacitance of the latter is larger, the same effect as that exhibited by the pixel 200 is also exhibited by the pixel 200B.

[0092] In addition, in the pixel 200B of the optical device according to the present embodiment, variable capacitors VC1 and VC2 are provided, and their respective capacitances can be adjusted. As a result, the amount of charge stored in the variable capacitors VC1 and VC2 can also be adjusted. Therefore, it is possible to adjust the amount of current flowing from the variable capacitor VC1 to the SPAD 210 during avalanche multiplication, and the amount of charge moving from the variable capacitor VC2 to the variable capacitor VC1 during the redistribution of charges after quenching. As a result, shortening of the dead time and reduction of power consumption can be surely realized.

[0093] Note that the specific example of the shielding resistance portion described with reference to FIGS. 7A and 7B, the specific example of the quenching resistance portion described with reference to FIGS. 8A to 8C, and the specific example of the readout circuit described with reference to FIGS. 9A to 9C can also be appropriately applied to the third embodiment.

[0094] (Fourth embodiment) Next, an optical device according to a fourth embodiment of the present disclosure will be described with reference to Fig. 12 to Fig. 16. Fig. 12 is a diagram illustrating an example of a laminated structure of the optical device according to the fourth embodiment. As shown in Fig. 12, the optical device 100 includes a first substrate 71 and a second substrate 72 bonded onto the first substrate 71.

[0095] The first substrate 71 has, for example, a pixel array portion PAR (see FIG. 4A) in which pixels 200 are arranged in a matrix. As shown in FIG. 13, the first substrate 71 has a SPAD 210, a wiring layer 120, and a connection pad 125 formed for each pixel. As described below, the wiring layer 120 includes a shielding resistor portion 211. One end of the shielding resistor portion 211 is connected to the cathode of the SPAD 210. The other end of the shielding resistor portion 211 is connected to the connection pad 125 by a predetermined wiring. The connection pad 125 is exposed on one surface of the first substrate 71 (the upper surface in the vertical direction in FIG. 12) before the first substrate 71 and the second substrate 72 are joined. The connection pad 125 is formed of, for example, copper (Cu). The SPAD 210 is provided on the lower surface side of the first substrate 71. That is, the lower surface of the first substrate 71 in Fig. 12 is the light incident surface, and photons are incident on the SPAD 210 from below in the figure.

[0096] As shown in FIG. 13, the second substrate 72 has a readout circuit 230, a quench resistor section 212, and a wiring layer 130 for each pixel. The readout circuit 230 and the quench resistor section 212 are connected to a connection pad 135 through the wiring layer 130. The connection pad 135 is exposed on one surface (the lower surface in FIG. 12) of the second substrate 72 before the first substrate 71 and the second substrate 72 are bonded. The connection pad 135 is formed of, for example, Cu. Note that the digital counter circuit 240 (or the TDC circuit) shown in FIG. 4B, the column circuit 310, the row scanning circuit 320, and the interface circuit 330 (FIG. 4A) may be arranged on the second substrate 72.

[0097] Here, as shown on the right side of FIG. 13, the number of layers of the wiring layer 130 formed on the second substrate 72 tends to be greater than the number of layers of the wiring layer 120 formed on the first substrate 71. This is because the readout circuit 230, the digital counter circuit 240 (or the TDC circuit), the word lines WL, the bit lines BL, and the like are formed on the second substrate 72, and therefore the number of circuit elements and wiring formed is greater on the second substrate 72 than on the first substrate 71. Therefore, the parasitic capacitance C2 generated between the connection pad 135 of the second substrate 72 and the quench resistance section 212 is greater than the parasitic capacitance C1 on the cathode side of the SPAD 210 of the first substrate 71. In addition, a parasitic capacitance is also generated by the joint section 260, that is, the joint between the connection pad 125 and the connection pad 135, but this parasitic capacitance is included in the parasitic capacitance C2 because the shielding resistance section 211 prevents the coupling with the parasitic capacitance C1. Therefore, the ratio CC2 / CC1 of the capacitance (value) CC1 of the parasitic capacitance C1 to the capacitance (value) CC2 of the parasitic capacitance C2 becomes large, and the input voltage to the read circuit 230 can be further reduced.

[0098] 12 to 14, a joint 260 is formed by bonding (so-called Cu-Cu bonding) the connection pad 125 of the first substrate 71 and the connection pad 135 of the second substrate 72. This electrically connects the SPAD 210 formed on the first substrate 71 and the readout circuit 230 formed on the second substrate 72. The first substrate 71 and the second substrate 72 are also mechanically joined by the joint 260. However, the first substrate 71 and the second substrate 72 may be electrically connected and mechanically joined by bonding the connection pads 125 and 135 with metal bumps (so-called bump bonding). Also, the first substrate 71 and the second substrate 72 may be joined by, for example, flattening the respective joining surfaces and bonding them together by electronic force, so-called direct bonding.

[0099] The first substrate 71 and the second substrate 72 may be electrically connected via a joint such as a TSV (Through-Silicon Via) that penetrates the semiconductor substrate. For the connection using the TSV, for example, a so-called twin TSV method in which two TSVs, a TSV provided on the first substrate 71 and a TSV provided from the first substrate 71 to the second substrate 72, are connected on the outer surface of the chip, or a so-called shared TSV method in which the two are connected by a TSV that penetrates from the first substrate 71 to the second substrate 72, can be adopted.

[0100] Next, a specific structure of the optical device according to the fourth embodiment will be described. Fig. 14 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident surface of the optical device according to the fourth embodiment. Fig. 15 is a horizontal cross-sectional view showing an example of the cross-sectional structure of the AA plane in Fig. 14. Note that Fig. 14 focuses on the cross-sectional structure of the SPAD 210.

[0101] 14, the SPAD 210 of the pixel 200 is provided, for example, in the semiconductor substrate 101 constituting the first substrate 71. When viewed, for example, from the light incident surface (the lower surface in FIG. 12), the semiconductor substrate 101 is partitioned into a plurality of element regions by element isolation sections 110 (see, for example, FIG. 15). The SPAD 210 is provided in each element region partitioned by the element isolation sections 110. Note that the element isolation section 110 may include an anode electrode 122 and an insulating film 109 in a first trench, which will be described later.

[0102] Each SPAD 210 includes a photoelectric conversion region 102, a P-type semiconductor region 104, an N-type semiconductor region 103, a P+ type semiconductor region 105, an N+ type semiconductor region 106, a cathode contact 107, and an anode contact 108.

[0103] The photoelectric conversion region 102 is, for example, an N-type well region or a region containing a low concentration of donors, and performs photoelectric conversion on incident light to generate electron-hole pairs (hereinafter referred to as charges).

[0104] The P-type semiconductor region 104 is, for example, a region including a P-type acceptor, and is provided in a region surrounding the photoelectric conversion region 102, as shown in Figures 14 and 15. This P-type semiconductor region 104 forms an electric field for guiding charges generated in the photoelectric conversion region 102 to the N-type semiconductor region 103 when a reverse bias voltage is applied to an anode contact 108, which will be described later.

[0105] The N-type semiconductor region 103 is, for example, a region containing a higher concentration of donors than the photoelectric conversion region 102. As shown in Figures 14 and 15, this N-type semiconductor region 103 is disposed in the center of the photoelectric conversion region 102, and takes in charges generated in the photoelectric conversion region 102 and guides them to the P+ type semiconductor region 105. Note that the N-type semiconductor region 103 is not an essential component and may be omitted.

[0106] The P+ type semiconductor region 105 is, for example, a region containing a higher concentration of acceptors than the P type semiconductor region 104, and a part of the region is in contact with the P type semiconductor region 104. The N+ type semiconductor region 106 is, for example, a region containing a higher concentration of donors than the N- type semiconductor region 103, and is in contact with the P+ type semiconductor region 105.

[0107] The P+ type semiconductor region 105 and the N+ type semiconductor region 106 form a PN junction and function as an amplification region that accelerates the flowing charge and generates an avalanche current.

[0108] The cathode contact 107 is, for example, a region that contains a higher concentration of donors than the N+ type semiconductor region 106, and is provided in a region that contacts the N+ type semiconductor region 106.

[0109] The anode contact 108 is, for example, a region containing a higher concentration of acceptors than the P+ type semiconductor region 105. The anode contact 108 is provided in a region that contacts the outer periphery of the P type semiconductor region 104. The width of the anode contact 108 may be, for example, about 40 nm (nanometers). In this way, by bringing the anode contact 108 into contact with the entire outer periphery of the P type semiconductor region 104, it is possible to form a uniform electric field in the photoelectric conversion region 102.

[0110] 14 and 15, the anode contacts 108 are provided on the bottom surfaces of trenches (hereinafter referred to as first trenches) provided in a matrix along the element isolation portion 110 on the front surface (lower surface in the drawings) side of the semiconductor substrate 101. With this structure, the formation positions of the anode contacts 108 are shifted in the height direction with respect to the formation positions of the cathode contacts 107 and the N+ type semiconductor region 106, as will be described later.

[0111] The front surface (the lower surface in the drawing) of the semiconductor substrate 101 is covered with an insulating film 109. The film thickness (thickness in the substrate width direction) of the insulating film 109 in the first trench depends on the voltage value of the reverse bias voltage applied between the anode and the cathode, but may be, for example, about 150 nm.

[0112] The insulating film 109 has openings that expose the cathode contact 107 and the anode contact 108 on the surface of the semiconductor substrate 101, and a cathode electrode 121 in contact with the cathode contact 107 and an anode electrode 122 in contact with the anode contact 108 are provided in each opening.

[0113] The element isolation portions 110 that separate the SPADs 210 are provided in trenches (hereinafter referred to as second trenches) that penetrate the semiconductor substrate 101 from the front surface to the back surface. The second trench is connected to the first trench on the front surface side of the semiconductor substrate 101. The inner diameter of the second trench is narrower than the inner diameter of the first trench, and an anode contact 108 is formed in a step portion formed thereby.

[0114] Each element isolation portion 110 includes an insulating film 112 that covers the inner side surface of the second trench, and a light-shielding film 111 that fills the second trench. The thickness of the insulating film 112 (thickness in the substrate width direction) depends on the voltage value of the reverse bias voltage applied between the anode and the cathode, but may be, for example, about 10 nm to 20 nm. The thickness of the light-shielding film 111 (thickness in the substrate width direction) depends on the material used for the light-shielding film 111, etc., but may be, for example, about 150 nm.

[0115] Here, by using a conductive material having light-shielding properties for the light-shielding film 111 and the anode electrode 122, it becomes possible to form the light-shielding film 111 and the anode electrode 122 in the same process. Furthermore, by using the same conductive material for the light-shielding film 111 and the anode electrode 122 for the cathode electrode 121, it becomes possible to form the light-shielding film 111, the anode electrode 122, and the cathode electrode 121 in the same process.

[0116] For example, tungsten (W) can be used as the conductive material having such light-shielding properties. However, the conductive material is not limited to tungsten (W) and may be variously changed to aluminum (Al), an aluminum alloy, copper (Cu), or the like, as long as the conductive material has the property of reflecting or absorbing visible light or light required for each element.

[0117] However, the material for the light-shielding film 111 in the second trench is not limited to a conductive material, and it is also possible to use, for example, a high refractive index material having a refractive index higher than that of the semiconductor substrate 101, or a low refractive index material having a refractive index lower than that of the semiconductor substrate 101.

[0118] Furthermore, since the material used for the cathode electrode 121 is not required to have a light-shielding property, a conductive material such as copper (Cu) may be used instead of a conductive material having a light-shielding property.

[0119] In this embodiment, a so-called FFTI (Front Full Trench Isolation) type element isolation portion 110 in which the second trench penetrates the semiconductor substrate 101 from the front surface side is exemplified; however, the present invention is not limited to this, and it is also possible to adopt an FTI (Full Trench Isolation) type element isolation portion in which the second trench penetrates the semiconductor substrate 101 from the back surface and / or the front surface side, or a DTI (Deep Trench Isolation) type or RDTI (Reverse Deep Trench Isolation) type element isolation portion in which the second trench is formed on the front surface or from the back surface to the middle of the semiconductor substrate 101.

[0120] When the second trench is of an FTI type that penetrates the semiconductor substrate 101 from the back surface side, the material of the light-shielding film 111 may be filled into the second trench from the back surface side of the semiconductor substrate 101.

[0121] The upper portions of the cathode electrode 121 and the anode electrode 122 protrude above the surface (the lower surface in the drawing) of the insulating film 109. On the surface (the lower surface in the drawing) of the insulating film 109, for example, a wiring layer 120 is provided.

[0122] The wiring layer 120 includes an interlayer insulating film 123 and wiring 124 provided in the interlayer insulating film 123. The wiring 124 is in contact with, for example, the cathode electrode 121 protruding from the surface (the lower surface in the drawing) of the insulating film 109. The wiring 124 is also in contact with a connection pad 125 through a predetermined via or the like. Here, the wiring 124 may include a shielding resistor portion 211 ( FIG. 13 ). Specifically, a part or the whole of the wiring 124 may be made of high-resistance polysilicon or a metal resistor. In this case, the wiring 124 has a resistance value Rsh of the shielding resistor portion 211 that is smaller than the resistance value R of the SPAD 210. ON It is formed to be larger than

[0123] 14, the wiring layer 120 is also provided with a wiring in contact with the anode electrode 122. This wiring is connected to a predetermined wiring layer (not shown), and this wiring layer is connected to a connection pad (not shown) provided on the periphery of the optical device 100 (FIG. 4A). By connecting this connection pad to a low potential terminal of a predetermined power supply, the anode electrode 122 can be maintained at a negative potential when the optical device 100 is in operation.

[0124] The wiring layer 130 of the second substrate 72 is bonded to the lower surface of the wiring layer 120. As described above, this bonding is realized by, for example, Cu-Cu bonding between the connection pad 125 and the connection pad 135. The wiring layer 130 includes an interlayer insulating film 131 and a wiring 132 provided in the interlayer insulating film 131. The wiring 132 is electrically connected to a circuit element 142 formed on the semiconductor substrate 141. The circuit element 142 includes a readout circuit 230. Therefore, the cathode electrode 121 of the semiconductor substrate 101 is connected to the readout circuit 230 shown in FIG. 3 via the wiring 124, the connection pad 125, the connection pad 135, and the wiring 132.

[0125] The wiring 133 is also connected to the connection pad 135. The wiring 133 may include a quench resistor 212 (FIG. 13). Specifically, the wiring 133 is partly or entirely made of high-resistance polysilicon or metal resistor to form the quench resistor 212. In this case, the wiring 133 is formed so that the resistance value Rq of the quench resistor 212 is greater than the resistance value Rsh of the shielding resistor 211. The wiring 133 is connected to a predetermined wiring layer (not shown), and this wiring layer is connected to a connection pad (not shown) provided on the periphery of the optical device 100. This connection pad is connected to the high potential terminal of the power supply. As a result, a (reverse bias) voltage corresponding to the Geiger region can be applied to the quench resistor 212, the shielding resistor 211, and the SPAD 210 during operation of the optical device 100.

[0126] Furthermore, a pinning layer 113 and a planarization film 114 are provided on the back surface (upper surface in the drawing) of the semiconductor substrate 101. Furthermore, a color filter 115 and an on-chip lens 116 are provided for each pixel 200 on the planarization film 114. Note that, although the color filter 115 and the on-chip lens 116 are provided in this embodiment, a configuration without the color filter and / or the on-chip lens is also possible depending on the use and purpose of the optical device 100.

[0127] The pinning layer 113 is a fixed charge film made of, for example, a hafnium oxide (HfO2) film or an aluminum oxide (Al2O3) film containing a predetermined concentration of acceptors. The planarization film 114 is an insulating film made of an insulating material such as silicon oxide (SiO2) or silicon nitride (SiN), and is a film for planarizing the surface on which the upper layer color filter 115 and on-chip lens 116 are formed.

[0128] In the above-described structure, when a (reverse bias) voltage corresponding to the Geiger region is applied between the cathode contact 107 and the anode contact 108, an electric field is formed that guides the charge generated in the photoelectric conversion region 102 to the N- type semiconductor region 103 due to the potential difference between the P-type semiconductor region 104 and the N+ type semiconductor region 106. In addition, a strong electric field is formed in the PN junction region between the P+ type semiconductor region 105 and the N+ type semiconductor region 106, accelerating the charge that has entered and generating an avalanche current. This allows the SPAD 210 to operate as an avalanche photodiode.

[0129] Next, the effect of the optical device according to this embodiment will be described in comparison with a comparative example. Fig. 16 is a schematic diagram showing the configuration of a pixel of an optical device according to the comparative example. Referring to Fig. 16, in a pixel 20A of the optical device according to the comparative example, a SPAD 21 and a resistor R L and resistor R Sare connected via a joint 260. The joint 260 is formed by a connection pad 125 and a connection pad 135, similarly to the joint 260 in the fourth embodiment of the present disclosure. In addition, a resistor R L and resistor R S The readout circuit 230 is connected to the connection point of the SPAD 21 and the connection pad 135. The SPAD 21 and the connection pad 135 are formed on the first substrate 710, and the connection pad 125 and the resistor R L , and resistor R S is formed on a second substrate 720.

[0130] At the junction 260, the two connection pads 135 and 125 are joined by, for example, a Cu-Cu junction, and a parasitic capacitance C1b is generated by such a junction. Therefore, when a reverse bias voltage corresponding to the Geiger region is applied to the SPAD 21, if a photon is incident on the SPAD 21 and avalanche amplification occurs, a current flows to the SPAD 21 from both the parasitic capacitance C1a and the parasitic capacitance C1b.

[0131] In contrast, in the pixel 200 of the optical device according to the fourth embodiment, as shown in FIG. 13, a shielding resistor 211 is provided between the SPAD 210 and the connection pad 135. The shielding resistor 211 has a resistance R ON Since the SPAD 210 has a resistance value Rsh larger than that of the parasitic capacitance C2 generated by the junction 260, a current is prevented from flowing from the parasitic capacitance C1 (included in the parasitic capacitance C2 in FIG. 13), and a current mainly flows from the parasitic capacitance C1 to the SPAD 210. In the above comparative example, when a current flows from the parasitic capacitance C1 to the SPAD 210, the amount of current is smaller than when a current flows from both the parasitic capacitances C1a and C1b to the SPAD 21, and therefore it is possible to reduce power consumption. ON Since the time constant determined by the parasitic capacitance C1 is smaller than the time constant determined by the resistance value Rsh of the shielding resistor portion 211 and the parasitic capacitance C2, when there is no contribution of current from the parasitic capacitance C2, it is possible to shorten the period during which avalanche amplification occurs.

[0132] Also, in the optical device according to the fourth embodiment, the SPAD 210 and the readout circuit 230 are arranged vertically. Therefore, the pixel area as viewed from the light incident direction can be reduced compared to the case where the SPAD 210 and the readout circuit 230 are arranged side by side. Accordingly, high pixel density can be achieved.

[0133] [Modification Example of the Fourth Embodiment] Hereinafter, a modification example of the fourth embodiment will be described with reference to FIGS. 17A to 17E. These modification examples are common to the fourth embodiment in that the first substrate 71 and the second substrate 72 are joined by the joining portion 260, and are different from the fourth embodiment in that a plurality of SPADs 210 are electrically connected to one readout circuit 230.

[0134] [Modification Example 1] FIG. 17A is a block diagram showing Modification Example 1 of the pixel of the optical device according to the fourth embodiment. Referring to FIG. 17A, a plurality of connection pads 125 are provided on the first substrate 71. The upper surfaces of the plurality of connection pads 125 are flush with the upper surface of the first substrate 71. Also, inside the first substrate 71, a SPAD 210 and a shielding resistance portion 211 are connected in series to each of the plurality of connection pads 125. Here, similar to each of the embodiments described so far, the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 are in the relationship of R ON < Rsh.

[0135] On the other hand, a plurality of connection pads 135 are provided on the second substrate 72. The lower surfaces of the plurality of connection pads 135 are flush with the lower surface of the second substrate 72. Also, the plurality of connection pads 135 are connected in parallel to each other, and the plurality of connection pads 135 connected in parallel are connected to the quench resistance portion 212 and the readout circuit 230. Here, the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71 are in the relationship of Rsh < Rq.

[0136] Furthermore, a plurality of connection pads 135 on the second substrate 72 are Cu-Cu bonded to corresponding connection pads 125 on the first substrate 71. As a result, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0137] According to such a configuration, changes in the cathode potential of each SPAD 210 are detected by one readout circuit 230 via the shielding resistance portion 211 and the bonding portion 260 provided for each SPAD 210. In other words, one readout circuit 230 is shared by a plurality of SPAD 210s. Also, since one readout circuit 230 is formed in one pixel, in this modification, it can also be said that a plurality of SPAD 210s are provided in one pixel. By providing a plurality of SPAD 210s per pixel, photon detection for each pixel can be reliably performed.

[0138] Also, similar to each of the above-described embodiments (including specific examples and modifications), the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 have a relationship of R ON < Rsh, and between the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71, there is a relationship of Rsh < Rq. Therefore, also according to this modification, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0139] [Modification 2] FIG. 17B is a block diagram showing a modification 2 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 17B, a plurality of SPAD 210s are connected in parallel on the first substrate 71, and the plurality of SPAD 210s connected in parallel are connected to one shielding resistance portion 211. That is, a plurality of SPAD 210s are connected in parallel to the shielding resistance portion 211. Also, the shielding resistance portion 211 is connected to the connection pad 125. The upper surface of the connection pad 125 is flush with the upper surface of the first substrate 71. Here, the resistance value R of each SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 are such that R ONis in the relationship of <Rsh>.

[0140] On the other hand, a connection pad 135 is provided on the second substrate 72. The lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72. Further, a quench resistance portion 212 and a readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71 are in the relationship of Rsh < Rq.

[0141] Furthermore, the connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Thereby, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0142] According to such a configuration, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230 via a set of shielding resistance portions 211 and a bonding portion 260. In that one readout circuit 230 is shared by a plurality of SPADs 210, Modification 2 is the same as Modification 1 described above. Also, since one readout circuit 230 is formed in one pixel, in this modification, it can also be said that a plurality of SPADs 210 are provided in one pixel. By providing a plurality of SPADs 210 per pixel, photon detection for each pixel can be surely performed.

[0143] Also, similar to each of the above-described embodiments (including specific examples and modifications), there is a relationship of R < ON between the resistance value R of each SPAD 210 and the resistance value Rsh of the shielding resistance portion 211, and there is a relationship of R < ON < Rsh, and between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71, there is a relationship of Rsh < Rq. Therefore, also by this modification, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0144] [Modification 3] FIG. 17C is a block diagram showing a modification example 3 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 17C, in the first substrate 71, a plurality of pairs of SPADs 210 and shielding resistance portions 211 connected in series to each other are connected in parallel to the connection pad 125. The connection pad 125 is formed such that its upper surface is flush with the upper surface of the first substrate 71. Here, the resistance value R ON of the SPAD 210 and the resistance value Rsh of the shielding resistance portion 211 connected in series with the SPAD 210 have a relationship of R ON < Rsh.

[0145] On the second substrate 72, one connection pad 135 is formed such that its lower surface is flush with the lower surface of the second substrate 72. Further, a quench resistance portion 212 and a readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71 have a relationship of Rsh < Rq.

[0146] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Thereby, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0147] In modification example 3, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230 via a set of shielding resistance portions 211 and a bonding portion 260. Modification example 3 is the same as modification example 1 described above in that one readout circuit 230 is shared by a plurality of SPADs 210. Also, since one readout circuit 230 is formed in one pixel, in this modification example, it can also be said that a plurality of SPADs 210 are provided in one pixel. By providing a plurality of SPADs 210 per pixel, photon detection for each pixel can be reliably performed.

[0148] Also, similar to each of the above-described embodiments (including specific examples and modification examples), between the resistance value R ON of each SPAD 210 and the resistance value Rsh of the shielding resistance portion 211, R ONThere is a relationship of <Rsh, and there is a relationship of Rsh < Rq between the resistance value Rq of the quench resistance part 212 and the resistance value Rsh of the shielding resistance part 211 of the first substrate 71. Therefore, also by this modification example, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0149] [Modification Example 4] FIG. 17D is a block diagram showing a modification example 4 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 17D, similar to the modification example 2 shown in FIG. 17B, a plurality of SPADs 210 are connected in parallel on the first substrate 71, and the plurality of SPADs 210 connected in parallel are connected to one shielding resistance part 211. However, in the modification example 4, when a plurality of SPADs 210 and shielding resistance parts 211 connected in this way are taken as one group, a plurality of SPADs 210 and shielding resistance parts 211 of a plurality of groups are provided. The shielding resistance part 211 of each group is connected to the connection pad 125 at an end portion on the side opposite to the connection portion with the SPAD 210. The connection pad 125 is formed such that its upper surface is flush with the upper surface of the first substrate 71. Also in the modification example 4, between the resistance value R ON of the SPAD 210 and the resistance value Rsh of the shielding resistance part 211 to which the SPAD 210 is connected in series, there is a relationship of R ON < Rsh.

[0150] On the second substrate 72, one connection pad 135 is formed such that its lower surface is flush with the lower surface of the second substrate 72. Also, a quench resistance part 212 and a readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quench resistance part 212 and the resistance value Rsh of each shielding resistance part 211 of the first substrate 71 are in a relationship of Rsh < Rq.

[0151] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Thereby, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0152] Also in Modification 4, the change in the cathode potential of each SPAD210 will be detected by one readout circuit 230. In that one readout circuit 230 is shared by a plurality of SPAD210s, Modification 4 is the same as Modification 1 described above. Also, since one readout circuit 230 is formed in one pixel, in this modification as well, a plurality of SPAD210s are provided in one pixel. By providing a plurality of SPAD210s per pixel, photon detection for each pixel can be reliably performed.

[0153] Also, similar to each of the above-described embodiments (including specific examples and modifications), the resistance value R of the SPAD210 ON and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD210 is connected have a relationship of R ON < Rsh, and between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of each shielding resistance portion 211 of the first substrate 71, there is a relationship of Rsh < Rq. Therefore, also by this modification, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0154] [Modification 5] FIG. 17E is a block diagram showing Modification 5 of the pixel of the optical device according to the fourth embodiment. Referring to FIG. 17E, similar to Modification 4 shown in FIG. 17D, on the first substrate 71, a plurality of SPAD210s are connected in parallel, and the plurality of SPAD210s connected in parallel are connected to one shielding resistance portion 211. Also, in that when a plurality of such connected SPAD210s and shielding resistance portions 211 are taken as one group, a plurality of groups are provided, it is the same as Modification 4. However, in Modification 5, a plurality of connection pads 125 are provided, and the shielding resistance portion 211 of each group is connected to the corresponding connection pad 125. The connection pad 125 is formed such that its upper surface is on the same plane as the upper surface of the first substrate 71. Also in Modification 5, the resistance value R of the SPAD210 ON and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD210 is connected have a relationship of R ON < Rsh.

[0155] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. As a result, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0156] Also in Modification 5, the change in the cathode potential of each SPAD 210 will be detected by one readout circuit 230. Modification 5 is the same as Modification 1 described above in that one readout circuit 230 is shared by a plurality of SPADs 210. Further, since one readout circuit 230 is formed in one pixel, also in this modification, a plurality of SPADs 210 are provided in one pixel. By providing a plurality of SPADs 210 per pixel, photon detection for each pixel can be reliably performed.

[0157] Also, similar to each of the above-described embodiments (including specific examples and modifications), the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD 210 is connected satisfy the relationship R ON < Rsh. Also, between the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of each shielding resistance portion 211 of the first substrate 71, there is a relationship of Rsh < Rq. Therefore, also by this modification, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0158] [Modification 6] Next, with reference to FIGS. 18A and 18B, Modification 6 and Modification 7 of the fourth embodiment will be described. FIG. 18A is a block diagram showing Modification 6 of the pixel of the optical device according to the fourth embodiment. Referring to FIG. 18A, in the first substrate 71, the cathode of the SPAD 210 is connected to one end of the shielding resistance portion 211, and the other end of the shielding resistance portion 211 is connected to the connection pad 125. Also in Modification 6, the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD 210 is connected satisfy the relationship R ON < Rsh.

[0159] Further, in Modification 6, unlike the fourth embodiment (and its modifications 1 to 5), the quench resistance portion 212 is formed on the first substrate 71 instead of the second substrate 72. Such a quench resistance portion 212 can be formed, for example, by providing a predetermined wiring in the region between the wiring 124 and the connection pad 125 in the first substrate 71 in FIG. 14. This wiring can have polysilicon resistance or metal resistance partially or entirely. Also, this wiring is electrically connected at one end to the wiring 124 where the shielding resistance portion 211 is provided (e.g., by a predetermined via or the like), and at the other end to a predetermined pad at the peripheral edge of the first substrate 71. By electrically connecting this pad to the high-potential terminal of a predetermined power supply, it becomes possible to apply a reverse bias voltage between the quench resistance portion 212 and the anode of the SPAD 210. Further, even when the quench resistance portion 212 is formed on the first substrate 71, it is formed such that the relationship Rsh < Rq is satisfied between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211.

[0160] Even in the case configured as described above, during avalanche amplification, the current from the parasitic capacitance C2 is blocked by the shielding resistance portion 221 and only flows slightly. Also, since it is blocked by the quench resistance portion 212 and the shielding resistance portion 211, the current flowing through the quench resistance portion 212 to the SPAD 210 is also only slightly. That is, during avalanche amplification, current mainly flows from the parasitic capacitance C1 to the SPAD 210. Also, after quenching occurs, charge moves from the parasitic capacitance C2 to the parasitic capacitance C1, and after the voltages between the parasitic capacitances C1 and between the parasitic capacitances C2 become equal, current is supplied through the quench resistance portion 212 and recharge proceeds. That is, also in Modification 6, a series of operations similar to those of avalanche amplification, quenching, charge redistribution, and recharge in the first to fourth embodiments (including modifications) are performed. Therefore, also by Modification 6, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0161] [Modification 7] FIG. 18B is a block diagram showing a modification example 7 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 18B, also in modification example 7, similar to modification example 6, the quench resistance portion 212 is provided on the first substrate 71. However, in modification example 7, one end of the quench resistance portion 212 is connected to the connection point between the cathode of the SPAD 210 and the shielding resistance portion 211.

[0162] Such a quench resistance portion 212 can be formed, for example, by providing a predetermined wiring in the region between the wiring 124 and the cathode electrode 121 in the first substrate 71 in FIG. 14. This wiring can have a polysilicon resistance or a metal resistance partially or entirely. Also, this wiring is electrically connected to the cathode electrode 121 at one end and electrically connected to a predetermined pad at the peripheral edge of the first substrate 71 at the other end. By electrically connecting this pad to the high potential terminal of a predetermined power supply and electrically connecting the anode of the SPAD 210 to the low potential terminal, it becomes possible to apply a reverse bias voltage between the quench resistance portion 212 and the anode of the SPAD 210. Further, even when the quench resistance portion 212 is formed on the first substrate 71, the relationship Rsh < Rq is satisfied between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211.

[0163] Also, between the resistance value R ON of the SPAD 210 and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD 210 is connected, there is a relationship of R ON < Rsh.

[0164] Even in the case of the above configuration, during avalanche amplification, a current mainly flows from the parasitic capacitance C1 to the SPAD 210, and the current from the parasitic capacitance C2 flows only slightly because it is blocked by the shielding resistance unit 221 and the quench resistance unit 212. After quenching occurs, charge moves from the parasitic capacitance C2 to the parasitic capacitance C1, and after the voltage across the parasitic capacitance C1 and the voltage across the parasitic capacitance C2 become equal, a current is supplied through the quench resistance unit 212, and recharging progresses. That is, in the seventh modification, the same operations as those in the first to fourth embodiments (including the modifications), such as avalanche amplification, quenching, charge redistribution, and recharging, are performed. Therefore, the seventh modification also exhibits effects such as shortening the dead time and reducing power consumption.

[0165] Even in the case of the above configuration, during avalanche amplification, the current from the parasitic capacitance C2 is blocked by the shielding resistance unit 221 and flows only slightly. Also, since the current is blocked by the quench resistance unit 212, only a small amount of current flows to the SPAD 210 through the quench resistance unit 212. That is, during avalanche amplification, the current mainly flows from the parasitic capacitance C1 to the SPAD 210. Also, after quenching occurs, charge moves from the parasitic capacitance C2 to the parasitic capacitance C1, and after the voltage across the parasitic capacitance C1 and the voltage across the parasitic capacitance C2 become equal, a current is supplied through the quench resistance unit 212, and recharging progresses. That is, in the seventh modification, the same operations as those in the first to fourth embodiments (including the modifications), such as avalanche amplification, quenching, charge redistribution, and recharging, are performed. Therefore, the seventh modification also exhibits effects such as shortening the dead time and reducing power consumption.

[0166] [Variation 8] Next, another modified example 8 to 9 of the fourth embodiment will be described with reference to Fig. 19A to Fig. 19C. As shown in Fig. 19A, the pixel in the modified example 8 is composed of a first substrate 71, a second substrate 72A, and a third substrate 73. The first substrate 71 has a SPAD 210 and a shielding resistor 211 connected in series thereto, similar to the first substrate 71 in the fourth embodiment. The second substrate 72A is provided with a readout circuit 230. The third substrate 73 is provided with a quench resistor 212.

[0167] The second substrate 72A further has a connection pad 135 on its lower surface in FIG. 19A. In this modification, the lower surface of the connection pad 135 forms the same surface as the lower surface of the second substrate 72A. In addition, the second substrate 72A has a connection pad 135A on its surface (upper surface in FIG. 19A) opposite to the lower surface. In this modification, the upper surface of the connection pad 135A forms the same surface as the upper surface of the second substrate 72A. The connection pad 135 and the connection pad 135A are connected by a predetermined wiring, and this wiring is also connected to the readout circuit 230. The second substrate 72A may be, for example, a silicon substrate, and the readout circuit 230 may be composed of transistors, wiring, other circuit elements, and the like formed on the silicon substrate. In addition, the connection pad 135 and the connection pad 135A may be connected by, for example, a via, wiring, and the like.

[0168] 19A, the third substrate 73 has a connection pad 136 on its lower surface. In this modification, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73. The connection pad 136 is connected to the quench resistor portion 212 by, for example, a via or a wiring.

[0169] Here, the connection pads 125 of the first substrate 71 are joined to the connection pads 135 of the second substrate 72A by, for example, Cu-Cu bonding, thereby forming a joint 260. The shielding resistor 211 of the first substrate 71 and the readout circuit 230 of the second substrate 72A are electrically connected via the joint 260. The first substrate 71 and the second substrate 72A are also mechanically joined by the joint 260.

[0170] The connection pads 135A of the second substrate 72A are joined to the connection pads 136 of the third substrate 73 by, for example, Cu-Cu bonding, thereby forming a joint 260A. The readout circuit 230 of the second substrate 72A and the quench resistor portion 212 of the third substrate 73 are electrically connected via the joint 260A. The second substrate 72A and the third substrate 73 are mechanically joined by the joint 260A. Furthermore, the quench resistor portion 212 is electrically connected to the shielding resistor portion 211 of the first substrate 71 via the joints 260 and 260A.

[0171] The eighth modification having the above configuration is different from the fourth embodiment in that the quench resistor 212 and the readout circuit 230 are formed on separate substrates and connected by a joint 260A. However, the shielding resistor 211 does not have a resistance value R ON The second embodiment is similar to the fourth embodiment in that the quench resistor 212 has a resistance value Rsh larger than the resistance value Rsh of the shielding resistor 211, and the quench resistor 212 has a resistance value Rq larger than the resistance value Rsh of the shielding resistor 211.

[0172] Furthermore, a parasitic capacitance C2 occurs between the connection pad 135 and the readout circuit 230, and a parasitic capacitance C1 occurs at the cathode of the SPAD 210. The parasitic capacitance C2 is a composite capacitance of the capacitance due to the junction 260, the capacitance due to the wiring connecting the connection pad 135 and the connection pad 135A, and the capacitance due to the readout circuit 230. Since many connection pads, wiring, and circuit elements are formed on the second substrate 72A, the capacitance of the parasitic capacitance C2 tends to be larger than the capacitance of the parasitic capacitance C1.

[0173] Therefore, in the eighth modification as well, similarly to the fourth embodiment, it is possible to reduce the input voltage to the readout circuit 230, while shortening the dead time and reducing power consumption.

[0174] [Variation 9] 19B is a block diagram showing a 9th modified example of a pixel of an optical device according to the fourth embodiment. As shown in the figure, the pixel in the 9th modified example is composed of a first substrate 71A, a second substrate 72B, and a third substrate 73A. A SPAD 210 is provided on the first substrate 71, a shielding resistor 211 is provided on the second substrate 72A, and a quench resistor 212 and a readout circuit 230 are provided on the third substrate 73A.

[0175] 19B, the first substrate 71A further has a connection pad 125 on its upper surface in FIG. In this modification, the upper surface of the connection pad 125 is flush with the upper surface of the first substrate 71A. The connection pad 125 is connected to the cathode of the SPAD 210.

[0176] The second substrate 72B has a connection pad 135 on its lower surface in FIG. 19B. In this modification, the lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72B. The connection pad 135 is connected to the shielding resistor 211 by, for example, a via or a wiring. The second substrate 72B also has a connection pad 135A on its upper surface (the surface opposite to the lower surface). In this modification, the upper surface of the connection pad 135A is flush with the upper surface of the second substrate 72B.

[0177] 19B, the third substrate 73A has a connection pad 136 on its lower surface. In this modification, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73A. The connection pad 136 is connected to the quench resistor 212 and the readout circuit 230 by, for example, vias or wiring.

[0178] Here, the connection pads 125 of the first substrate 71A are joined to the connection pads 135 of the second substrate 72B by, for example, Cu-Cu bonding, thereby forming a joint 260. The SPAD 210 of the first substrate 71A and the shielding resistor 211 of the second substrate 72B are electrically connected via the joint 260. The first substrate 71A and the second substrate 72B are also mechanically joined by the joint 260.

[0179] The connection pads 135A of the second substrate 72B are joined to the connection pads 136 of the third substrate 73A by, for example, Cu-Cu bonding, thereby forming a joint 260A. The shielding resistor 211 of the second substrate 72B is electrically connected to the quench resistor 212 and the readout circuit 230 of the third substrate 73A via the joint 260A. The second substrate 72B and the third substrate 73A are also mechanically joined by the joint 260A.

[0180] In the ninth modification having the above configuration, the SPAD 210, the quench resistance unit 212, and the readout circuit 230 are formed on separate substrates, the SPAD 210 and the quench resistance unit 212 are electrically connected via a joint 260, and the shielding resistance unit 211, the quench resistance unit 212, and the readout circuit 230 are electrically connected via a joint 260A. Here, the shielding resistance unit 211 has a resistance value R ON The second embodiment is similar to the fourth embodiment in that the quench resistor 212 has a resistance value Rsh larger than the resistance value Rsh of the shielding resistor 211, and the quench resistor 212 has a resistance value Rq larger than the resistance value Rsh of the shielding resistor 211.

[0181] In addition, when comparing the parasitic capacitance C1 generated at the end electrically connected to the SPAD 210 with the parasitic capacitance C2 generated at the opposite end of the shielding resistance 211, the capacitance of the parasitic capacitance C2 is larger than the capacitance of the parasitic capacitance C1. This is because the parasitic capacitance C2 includes the capacitance due to the shielding resistance 211, the capacitance due to the wiring connecting the shielding resistance 211 and the connection pad 135A, the capacitance due to the junction 260A, and the capacitance due to the wiring connecting the connection pad 136 with the quench resistance 212 and the readout circuit 230, while the parasitic capacitance C1 only includes the capacitance due to the SPAD 210, the wiring connecting the SPAD 210 and the connection pad 125, and the capacitance due to the junction 260.

[0182] Therefore, the capacitance of the parasitic capacitance C1 < the capacitance of the parasitic capacitance C2, the resistance value R ONSince the relationships of Rsh<Rq are satisfied, the ninth modification also exerts the same effects as those exerted by the embodiments (including the modifications) described thus far.

[0183] [Variation 10] 19C is a block diagram showing a modification 10 of a pixel of an optical device according to the fourth embodiment. As shown in the figure, the pixel in the modification 9 is composed of a first substrate 71, a second substrate 72C, and a third substrate 73B. The first substrate 71 is provided with a SPAD 210 and a shielding resistor 211, the second substrate 72C is provided with a quench resistor 212, and the third substrate 73B is provided with a readout circuit 230. The first substrate 71 in this modification has the same configuration as the first substrate 71 in the fourth embodiment and its modification 8.

[0184] The second substrate 72C has a connection pad 135 on its lower surface in FIG. 19C. In this modification, the lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72C. The second substrate 72C has a connection pad 135A on its upper surface (opposite the lower surface). In this modification, the upper surface of the connection pad 135A is flush with the upper surface of the second substrate 72C. The connection pad 135 and the connection pad 135A are connected to each other by, for example, vias or wiring. The connection pad 135 and the connection pad 135A are electrically connected to the quench resistor portion 212.

[0185] 19C, the third substrate 73B has a connection pad 136 on its lower surface. In this modification, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73B. The connection pad 136 is connected to the readout circuit 230 by, for example, a via or a wiring.

[0186] Here, the connection pads 125 of the first substrate 71A are joined to the connection pads 135 of the second substrate 72C by, for example, Cu-Cu bonding, thereby forming a joint 260. The shielding resistor 211 of the first substrate 71A and the quench resistor 212 of the second substrate 72C are electrically connected via the joint 260. The first substrate 71A and the second substrate 72C are also mechanically joined by the joint 260.

[0187] The connection pads 135A of the second substrate 72C are bonded to the connection pads 136 of the third substrate 73B by, for example, Cu-Cu bonding, thereby forming a bonding portion 260A. The quench resistor portion 212 of the second substrate 72C and the readout circuit 230 of the third substrate 73B are electrically connected via the bonding portion 260A. The second substrate 72C and the third substrate 73B are also mechanically bonded to each other by the bonding portion 260A.

[0188] In the tenth modification having the above configuration, the SPAD 210, the quench resistance unit 212, and the readout circuit 230 are formed on separate substrates, the shielding resistance unit 211 and the quench resistance unit 212 are electrically connected via a joint 260, and the quench resistance unit 212 and the readout circuit 230 are electrically connected via a joint 260A. Here, the shielding resistance unit 211 has a resistance value R ON The second embodiment is similar to the fourth embodiment in that the quench resistor 212 has a resistance value Rsh larger than the resistance value Rsh of the shielding resistor 211, and the quench resistor 212 has a resistance value Rq larger than the resistance value Rsh of the shielding resistor 211.

[0189] Furthermore, a parasitic capacitance C2 occurs between the connection pad 135 and the readout circuit 230, and a parasitic capacitance C1 occurs at the cathode of the SPAD 210. The parasitic capacitance C2 may include not only the capacitance due to the junction 260, the capacitance due to the wiring connecting the connection pad 135 and the connection pad 135A, and the capacitance due to the quench resistance unit 212, but also the capacitance due to the junction 260A and the capacitance due to the readout circuit 230. On the other hand, the parasitic capacitance C1 only includes the capacitance due to the SPAD 210 and the capacitance due to the wiring connecting the SPAD 210 and the shielding resistance unit 211. For this reason, the parasitic capacitance C2 is larger than the parasitic capacitance C1.

[0190] Therefore, in the tenth modification as well, similarly to the fourth embodiment, it is possible to reduce the input voltage to the readout circuit 230, while shortening the dead time and reducing power consumption.

[0191] In addition, although the bonding of the connection pads by Cu-Cu bonding has been exemplified in the eighth to tenth modified examples of the fourth embodiment, the connection pads may be connected to each other by a metal pad. In addition, the specific examples of the shielding resistors described with reference to Figures 7A and 7B, the specific examples of the quench resistors described with reference to Figures 8A to 8C, and the specific examples of the readout circuits described with reference to Figures 9A to 9C can also be appropriately applied to the fourth embodiment (including the modified examples).

[0192] <Application example 1> The optical device according to the embodiment of the present disclosure described above can be applied to various electronic devices, such as imaging devices such as digital still cameras and digital video cameras, mobile phones with imaging functions, or other devices with imaging functions.

[0193] Fig. 20 is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied. The imaging device 201 shown in Fig. 20 includes an optical system 202, a shutter device 203, an optical device 100, a driving circuit 205, a signal processing circuit 206, a monitor 207, and a memory 208, and is capable of capturing still images and moving images.

[0194] The optical system 202 is configured to have one or more lenses, and guides light from a subject (incident light) to the optical device 100 and forms an image on the light receiving surface of the optical device 100.

[0195] The shutter device 203 is disposed between the optical system 202 and the optical device 100 , and controls the light irradiation period and light blocking period of the optical device 100 under the control of a drive circuit 205 .

[0196] The drive circuit 205 outputs drive signals that control the transfer operation of the optical device 100 and the shutter operation of the shutter device 203 to drive the optical device 100 and the shutter device 203 .

[0197] The optical device 100 includes a light receiving element (pixel) according to each of the above-mentioned embodiments (including the modified examples). When applied to an imaging device, the optical device 100 has a digital counter circuit 240 (FIG. 4B) at the output end of the readout circuit 230. Under the control of the drive circuit 205, the optical device 100 counts the number of photons for each pixel by the digital counter circuit 240 in accordance with the light imaged on the light receiving surface through the optical system 202 and the shutter device 203 during a predetermined exposure period. The count number is converted into a luminance signal, and under the control of the drive circuit 205, is transferred to the column circuit 310 through the bit line BL in accordance with a selection signal supplied from the row scanning circuit 320 (FIG. 4A) to the word line WL of each pixel. The column circuit 310 converts the luminance signal from each pixel into a digital signal, and the converted digital signal is output to the signal processing circuit 206 through the interface circuit 330.

[0198] The signal processing circuit 206 performs various signal processing on the digital signal output from the optical device 100. An image (image data) obtained by performing the signal processing by the signal processing circuit 206 is supplied to a monitor 207 and displayed, or supplied to a memory 208 and stored (recorded).

[0199] In the imaging device 201 configured in this manner, since the optical device 100 includes the light receiving elements according to each of the above-mentioned embodiments (including the modified examples), the imaging device 201 can also achieve the effects of shortening the dead time and reducing power consumption. Note that a color filter may be provided on the light receiving surface of the optical device 100. In this color filter, a red filter that transmits red wavelength region light, a green filter that transmits green wavelength region light, and a blue filter that transmits blue wavelength light are formed corresponding to the light receiving elements (pixels) of the optical device 100. For example, a Bayer filter is exemplified as the color filter. By using such a color filter, it is possible to configure the imaging device 201 as an imaging device capable of acquiring a color image.

[0200] <Application example 2> Next, a distance measuring device that performs distance measurement by a direct ToF method will be described as an electronic device to which the present technology is applied. Fig. 21 is a block diagram showing a configuration example of a distance measuring device 600 as an electronic device to which the present technology is applied. As shown in the figure, the distance measuring device 600 includes an optical device 100A, a light source unit 602, a storage unit 603, a control unit 604, and an optical system 605.

[0201] The light source unit 602 may be, for example, a vertical cavity surface emitting laser (VCSEL) array that emits laser light as a surface light source. However, the light source unit 602 is not limited to this, and may be a laser diode array in which laser diodes are arranged in a line. In this case, the laser diode array is supported by a predetermined drive unit (not shown) and scanned in a direction perpendicular to the direction in which the laser diodes are arranged. Furthermore, the light source unit 602 may be a single laser diode. In this case, the single laser diode is supported by a predetermined drive unit (not shown) and scanned in the horizontal and vertical directions.

[0202] In the example of Fig. 22, the optical device 100A has the pixel (light receiving element) 200 in the first embodiment. However, the optical device 100A may have a pixel (light receiving element) according to another embodiment (including a modified example). When applied to a distance measuring device, the optical device 100A has a TDC circuit 241, a generating unit 242, and a signal processing unit 243 connected in series to the output terminal of the readout circuit 230, as shown in Fig. 22, instead of the above-mentioned digital counter circuit 240 (Fig. 4B). The functions of the TDC circuit 241, the generating unit 242, and the signal processing unit 243 will be described later.

[0203] The signal processing unit 243 performs a predetermined calculation process based on the data of a histogram (described later) generated by the generation unit 242, and calculates, for example, distance information. For example, the signal processing unit 243 creates a curve approximation of the histogram based on the data of the histogram generated by the generation unit 242. The signal processing unit 243 can detect the peak of the curve obtained by approximating the histogram, and obtain the distance D based on the detected peak.

[0204] The storage unit 603 (FIG. 21) is configured with, for example, a flash memory, a DRAM, an SRAM, or the like, and stores data input from the optical device 10, and the like.

[0205] The control unit 604 controls the overall operation of the distance measuring device 600. For example, the control unit 604 supplies a predetermined reference signal having a predetermined frequency to the optical device 100 and the light source unit 602. The light source unit 602 emits pulsed light based on, for example, the reference signal supplied from the control unit 604. The optical device 100 obtains a time difference between the light emission timing and the light reception timing based on, for example, the above-mentioned reference signal and an output signal output from the readout circuit 230. In addition, the control unit 604 sets a pattern for distance measurement for the optical device 100 in response to, for example, an instruction from outside. The optical system 605 guides light incident from the outside to the light receiving surface of the optical device 100 .

[0206] 23, distance measurement by the direct ToF method will be described by taking as an example of distance measurement by the distance measuring device 600 a case where the distance measuring device 600 measures a distance D from the distance measuring device 600 to the object to be measured 303. The time when the light source unit 602 emits light is defined as light emission timing t0, and the time when the optical device 100 receives the light reflected by the object to be measured 303 from the light source unit 602 is defined as light reception timing t1. At this time, the distance D between the distance measuring device 600 and the object to be measured 303 can be calculated by the following equation (1). D = (c / 2) × (t1-t0) … (1) Here, the constant c is the speed of light (2.9979 × 108 [m / sec]).

[0207] Incidentally, in the optical device 100A, when light (photons) is incident on the pixel 200, even if the light is light (e.g., ambient light) other than the reflected light from the object under test 303, an output signal is output from the readout circuit 230, and the light receiving timing is calculated by the TDC circuit 241 as described below. That is, it is not possible to distinguish between the light receiving timing t1 calculated based on the reflected light from the object under test 303 and the light receiving timing calculated based on the light other than the reflected light.

[0208] Therefore, in the distance measuring device 600, light is repeatedly emitted from the light source unit 602 (for example, several hundred to tens of thousands of times), and a histogram relating to the difference between the light emission timing and the light reception timing is created. FIG. 24 is a diagram showing an example of a histogram created in this way. As shown in the figure, the number (frequency) 301 of light reception timings is shown for each of sections #0, #1, #2, . . ., #(N-2), #(N-1) having a predetermined unit time d. Here, section #0 is the range of time d from the light emission timing t0, and section #1 is the range of time d from the point at which time d has elapsed from the light emission timing t0. Note that in the figure, the period from the light emission timing t0 to t ep The period corresponds to the exposure time of the optical device 100 .

[0209] 24, compared to the range 311 shown by the dashed line, there is a section (hereinafter, for convenience, referred to as section 312) in which the number of light reception timings is outstanding compared to adjacent sections. While reception of light such as ambient light occurs randomly, reception of light emitted from the light source unit 602 and reflected by the measured object 303 may occur when a certain range of time has passed, although it includes an error, because the light is received after propagating a distance of 2×D. Therefore, it is considered that the light reception timing t1 according to the reflected light from the measured object 303 is included in the section 312. Therefore, for example, as shown in the figure, the end point of the section in which the maximum number of light reception timings in the section 312 is recorded can be set as the light reception timing t1 based on the reflected light from the measured object 303. Not limited to this, the start point or the center point of the section in which the maximum number of light reception timings is recorded may be set as the light reception timing t1. Also, in the section 312, an approximation curve for the number of light emission timings may be obtained, and the light emission timing t1 may be obtained based on the peak value.

[0210] As described above, the timing t1 of receiving the reflected light from the object to be measured 303 can be obtained, and the distance D to the object to be measured 303 can be calculated by the formula (1).

[0211] When distance measurement is performed by the above-mentioned direct ToF method in the optical device 100A, the light reception timing is obtained by the TDC circuit 241. That is, the TDC circuit 241 generates a time difference signal indicating the time difference between the reference signal input from the control unit 604 and the output signal from the readout circuit 230. The reference signal from the control unit 604 is also input to the light source unit 602, which emits pulsed light based on this reference signal. Therefore, from the time difference signal generated in the TDC circuit 241, the light reception timing based on the light emission timing t0 at which the pulsed light is emitted from the light source unit 602 can be obtained.

[0212] Light emission based on a reference signal by the light source unit 602 and light reception by the SPAD 210 are repeated, and each time, a histogram relating to the difference between the light emission timing and the light reception timing calculated by the TDC circuit 241 is generated by the generation unit 242. Based on the histogram created by the generation unit 242, the light reception timing t1 is determined by the signal processing unit 243, and the distance D is calculated.

[0213] In the distance measuring device 600 configured in this manner, since the optical device 100A includes a light receiving element according to each of the above-mentioned embodiments (including the modified examples), the distance measuring device 600 can also achieve the effects of shortening the dead time and reducing power consumption.

[0214] <Application example 3> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0215] FIG. 25 is a block diagram showing an example of a schematic configuration of a patient's in-vivo information acquisition system using a capsule endoscope to which the technology according to the present disclosure (the present technology) can be applied.

[0216] The in-vivo information acquisition system 10001 includes a capsule endoscope 10100 and an external control device 10200 .

[0217] The capsule endoscope 10100 is swallowed by a patient during an examination. The capsule endoscope 10100 has an imaging function and a wireless communication function, and while moving inside an organ such as the stomach or intestines by peristalsis or the like until it is naturally discharged from the patient, sequentially captures images of the inside of the organ (hereinafter also referred to as in-vivo images) at predetermined intervals, and sequentially wirelessly transmits information about the in-vivo images to an external control device 10200 outside the body.

[0218] The external control device 10200 comprehensively controls the operation of the in-vivo information acquisition system 10001. In addition, the external control device 10200 receives information about the in-vivo image transmitted from the capsule endoscope 10100, and generates image data for displaying the in-vivo image on a display device (not shown) based on the received information about the in-vivo image.

[0219] In this manner, the in-vivo information acquiring system 10001 can obtain in-vivo images capturing images of the state inside the patient's body at any time from when the capsule endoscope 10100 is swallowed to when it is expelled.

[0220] The configurations and functions of the capsule endoscope 10100 and the external control device 10200 will be described in more detail.

[0221] The capsule endoscope 10100 has a capsule-shaped housing 10101, which houses a light source unit 10111, an imaging unit 10112, an image processing unit 10113, a wireless communication unit 10114, a power supply unit 10115, a power supply unit 10116, and a control unit 10117.

[0222] The light source unit 10111 is composed of a light source such as an LED (light emitting diode), and irradiates the imaging field of the imaging unit 10112 with light.

[0223] The imaging unit 10112 is composed of an imaging element and an optical system consisting of multiple lenses provided in front of the imaging element. Reflected light (hereinafter referred to as observation light) of light irradiated onto the body tissue to be observed is collected by the optical system and enters the imaging element. In the imaging unit 10112, the imaging element photoelectrically converts the observation light incident thereon, and generates an image signal corresponding to the observation light. The image signal generated by the imaging unit 10112 is provided to an image processing unit 10113.

[0224] The image processing unit 10113 is configured with a processor such as a CPU (Central Processing Unit) or a GPU (Graphics Processing Unit), and performs various signal processing on the image signal generated by the imaging unit 10112. The image processing unit 10113 provides the image signal after the signal processing to the wireless communication unit 10114 as RAW data.

[0225] The wireless communication unit 10114 performs predetermined processing such as modulation processing on the image signal that has been subjected to signal processing by the image processing unit 10113, and transmits the image signal to the external control device 10200 via the antenna 10114A. The wireless communication unit 10114 also receives a control signal related to drive control of the capsule endoscope 10100 from the external control device 10200 via the antenna 10114A. The wireless communication unit 10114 provides the control signal received from the external control device 10200 to the control unit 10117.

[0226] The power supply unit 10115 is composed of an antenna coil for receiving power, a power regeneration circuit for regenerating power from a current generated in the antenna coil, a boost circuit, etc. In the power supply unit 10115, power is generated using the principle of so-called non-contact charging.

[0227] The power supply unit 10116 is composed of a secondary battery, and stores the power generated by the power supply unit 10115. In Fig. 25, to avoid cluttering the drawing, arrows and the like indicating the destination of the power supply from the power supply unit 10116 are omitted, but the power stored in the power supply unit 10116 is supplied to the light source unit 10111, the imaging unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the control unit 10117 and can be used to drive these units.

[0228] The control unit 10117 is composed of a processor such as a CPU, and appropriately controls the driving of the light source unit 10111, the imaging unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the power supply unit 10115 in accordance with control signals transmitted from the external control device 10200.

[0229] The external control device 10200 is composed of a processor such as a CPU or a GPU, or a microcomputer or a control board in which a processor and a storage element such as a memory are mixed. The external control device 10200 controls the operation of the capsule endoscope 10100 by transmitting a control signal to the control unit 10117 of the capsule endoscope 10100 via the antenna 10200A. In the capsule endoscope 10100, for example, the light irradiation conditions for the observation target in the light source unit 10111 can be changed by the control signal from the external control device 10200. Furthermore, the imaging conditions (for example, the frame rate and exposure value in the imaging unit 10112) can be changed by the control signal from the external control device 10200. Furthermore, the content of the processing in the image processing unit 10113 and the conditions for the wireless communication unit 10114 to transmit an image signal (for example, the transmission interval, the number of transmitted images, etc.) may be changed by the control signal from the external control device 10200.

[0230] The external control device 10200 also applies various image processing to the image signal transmitted from the capsule endoscope 10100 to generate image data for displaying the captured in-vivo image on a display device. As the image processing, various signal processing such as development processing (demosaic processing), image quality improvement processing (band enhancement processing, super-resolution processing, NR (Noise reduction) processing, and / or image stabilization processing, etc.) and / or enlargement processing (electronic zoom processing) can be performed. The external control device 10200 controls the driving of the display device to display the captured in-vivo image based on the generated image data. Alternatively, the external control device 10200 may record the generated image data in a recording device (not shown) or print out the image data on a printing device (not shown).

[0231] An example of an in-vivo information acquisition system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 10112 among the configurations described above. Specifically, the optical device according to each of the above-described embodiments can be used as the imaging unit 10112. According to the above-described optical device, it is possible to shorten the dead time of the SPAD 210 (or 210A). Therefore, if an optical device is used as the imaging unit 10112, it is possible to appropriately set the imaging interval by the capsule endoscope 10100. That is, it is possible to reduce the possibility that the SPAD 210 (or 210A) is in the dead time when the capsule endoscope 10100 captures an image. In addition, since the power consumption of the SPAD 210 can be reduced, it is also possible to reliably operate the optical device 100 and the like from when the capsule endoscope 10100 is swallowed by the patient until it is naturally excreted.

[0232] Although the patient's internal body information acquisition system using the capsule endoscope has been described here, the technology according to the present disclosure may be applied to, for example, an endoscopic surgery system. The following describes the case where the technology according to the present disclosure is applied to an endoscopic surgery system.

[0233] <Application Example 4> FIG. 26 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0234] 26 shows a state in which an operator (doctor) 11131 is performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0235] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the illustrated example, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may be configured as a so-called flexible scope having a flexible lens barrel.

[0236] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an observation target in the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0237] An optical system and an image sensor are provided inside the camera head 11102, and reflected light (observation light) from an observation target is collected on the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. The image signal is transmitted to a camera control unit (CCU) 11201 as RAW data.

[0238] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0239] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0240] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing an operation site or the like.

[0241] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiated light, magnification, focal length, etc.) of the endoscope 11100.

[0242] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 sends gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity for the purpose of securing the field of view of the endoscope 11100 and securing the working space of the surgeon. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, image, or graph.

[0243] The light source device 11203 that supplies irradiation light to the endoscope 11100 when photographing the surgical site can be composed of a white light source composed of, for example, an LED, a laser light source, or a combination of these. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so that the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to capture images corresponding to each of the RGB colors in a time-division manner by irradiating the observation object with laser light from each of the RGB laser light sources in a time-division manner and controlling the driving of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0244] The light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. The driving of the image sensor of the camera head 11102 may be controlled in synchronization with the timing of the change in the light intensity to obtain images in a time-division manner, and the images may be synthesized to generate an image with a high dynamic range that is free of so-called blackout and whiteout.

[0245] The light source device 11203 may be configured to supply light of a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, by utilizing the wavelength dependency of light absorption in body tissue, a narrow band light is irradiated compared to the irradiated light (i.e., white light) during normal observation, and a predetermined tissue such as blood vessels on the mucous membrane surface is photographed with high contrast, so-called narrow band imaging is performed. Alternatively, in the special light observation, a fluorescent observation may be performed in which an image is obtained by fluorescence generated by irradiating an excitation light. In the fluorescent observation, it is possible to irradiate an excitation light to a body tissue and observe the fluorescence from the body tissue (autofluorescence observation), or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0246] FIG. 27 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0247] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so as to be able to communicate with each other.

[0248] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

[0249] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be one (so-called single-plate type) or multiple (so-called multi-plate type). When the imaging unit 11402 is composed of a multi-plate type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining the image signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (Dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical site. Note that when the imaging unit 11402 is composed of a multi-plate type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0250] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately behind the objective lens.

[0251] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be appropriately adjusted.

[0252] The communication unit 11404 is configured by a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0253] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201, and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of capturing the image, and / or information specifying the magnification and focus of the captured image.

[0254] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by a user, or may be automatically set by the control unit 11413 of the CCU 11201 based on an acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0255] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404.

[0256] The communication unit 11411 is configured with a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0257] Furthermore, the communication unit 11411 transmits, to the camera head 11102, a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0258] The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data sent from the camera head 11102 .

[0259] The control unit 11413 performs various controls related to imaging of the surgical site etc. by the endoscope 11100 and display of the captured image obtained by imaging the surgical site etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0260] Further, the control unit 11413 causes the display device 11202 to display the captured image showing the surgical site, etc., based on the image signal that has been image-processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can recognize surgical tools such as forceps, specific living body parts, bleeding, mist when the energy treatment tool 11112 is used, etc., by detecting the shape and color of the edge of an object included in the captured image. When the control unit 11413 causes the display device 11202 to display the captured image, it may use the recognition result to superimpose various types of surgery support information on the image of the surgical site. By superimposing and presenting the surgery support information to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0261] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0262] Here, in the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0263] An example of an endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 11402 of the camera head 11102 in the configuration described above. Specifically, the optical device according to each of the above-mentioned embodiments can be used as the imaging unit 11402. The optical device described above can shorten dead time and save power. Therefore, the same effect can be achieved by an endoscopic surgery system to which this optical device is applied.

[0264] <Application example 5> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, or a robot.

[0265] FIG. 28 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied.

[0266] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 28, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053 are illustrated.

[0267] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0268] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0269] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface, based on the received image.

[0270] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0271] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.

[0272] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0273] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0274] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0275] The audio / video output unit 12052 transmits at least one output signal of audio and image to an output device capable of visually or audibly notifying information to passengers in the vehicle or the outside of the vehicle. In the example of Fig. 28, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

[0276] FIG. 29 is a diagram showing an example of the installation position of the imaging unit 12031.

[0277] In FIG. 29, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0278] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield in the vehicle interior of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield in the vehicle interior mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided at the upper part of the windshield in the vehicle interior is mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0279] 29 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0280] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.

[0281] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.

[0282] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0283] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0284] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging units 12101 to 12104 among the configurations described above. Specifically, the imaging elements according to the above-described embodiments (including modified examples) can be applied to the imaging units 12101 to 12104. By applying the technology according to the present disclosure to the imaging units 12101 to 12104, it becomes possible to recognize a pedestrian from a slight light from the pedestrian, for example, at night or in a dark place. In addition, the effect of reducing power consumption by the technology according to the present disclosure is particularly useful in a vehicle equipped with a drive motor as a drive force generating device for generating a drive force for the vehicle.

[0285] In the above, various effects achieved by the light receiving element, the optical device including the light receiving element, and the electronic device having the optical device according to the embodiments of the present disclosure are described, but such effects do not limit the present disclosure. Moreover, not all of the various effects may be achieved. Moreover, the light receiving element, the optical device, and the electronic device of the present disclosure may achieve additional effects not described here.

[0286] The present technology can also be configured as follows. (1) a photon responsive multiplication section including a charge multiplication region capable of multiplying charges generated in response to incidence of photons; a first resistor connected at one end to one end of the photon response multiplication unit, the first resistor having a resistance value greater than a resistance value of the photon response multiplication unit; a second resistor portion connected at one end to the other end of the first resistor portion; a connection point at which the other end of the first resistor section, the one end of the second resistor section, and a readout section that reads out an output from the photon response multiplication section are connected; A light receiving element comprising: (2) The light receiving element according to (1), wherein the second resistance portion has a resistance value greater than a resistance value of the first resistance portion. (3) a first capacitance at the one end of the photon responsive multiplication section; The light receiving element according to (1) or (2), wherein a second capacitance is provided at the other end of the first resistor portion. (4) The light receiving element according to (3), wherein each of the first capacitance and the second capacitance is constituted by a variable capacitance element. (5) The photodetector according to (4), wherein the variable capacitance element includes one or more transistors. (6) The photodiode according to claim 4, wherein the one or more transistors are metal oxide semiconductor transistors. (7) The second resistor portion is a switch provided between the readout unit and a power source electrically connected to the other end of the second resistor unit; A control unit that detects an output of the readout unit and controls the switch based on the detection result; The light receiving element according to any one of (1) to (6), (8) The light receiving element according to any one of (1) to (6), wherein the second resistance portion is a constant current source. (9) The photodetector according to any one of (1) to (8), wherein the photon responsive multiplication section includes a single-photon avalanche diode. (10) The photodetector according to (9), wherein the one end of the photon responsive multiplication section is a cathode or an anode of the single-photon avalanche diode. (11) The photodetector according to any one of (1) to (8), wherein the photon responsive multiplication section includes a silicon photomultiplier tube. (12) The light receiving element according to any one of (1) to (11), wherein the first resistor portion is a polysilicon resistor portion or a metal resistor portion. (13) The light receiving element according to any one of (1) to (12), wherein the first resistance portion is formed by one or more transistors. (14) The photodiode according to claim 13, wherein the one or more transistors are metal oxide semiconductor transistors. (15) The light-receiving element according to (14), further comprising a voltage generating unit that applies a voltage to a gate of the metal oxide semiconductor transistor. (16) a first substrate having a first connection portion on one surface; a second substrate having a second connection portion corresponding to the first connection portion on one surface thereof, the second substrate being electrically and mechanically joined to the first substrate by joining the first connection portion and the second connection portion; Further comprising: the photon responsive multiplication unit is provided on the first substrate, The light receiving element according to any one of (1) to (15), wherein the readout section is provided on the second substrate. (17) the first connection portion and the second connection portion are made of copper, The photodetector according to (16), wherein the first connection portion and the second connection portion, which are formed using copper, are joined by closely adhering their surfaces to each other. (18) The light-receiving element according to (16), wherein the first connection portion and the second connection portion are joined by a metal bump. (19) a first substrate having a first connection portion on one surface; a second substrate having a second connection portion on one surface corresponding to the first connection portion and a third connection portion on a surface opposite to the one surface, the second substrate being electrically and mechanically joined to the first substrate by joining the first connection portion and the second connection portion; a third substrate having a third connection portion on one surface thereof corresponding to the second connection portion, and electrically and mechanically joined to the second substrate by joining the second connection portion and the third connection portion; Further comprising: The light receiving element according to any one of (1) to (15), wherein the photon responsive multiplication section is provided on the first substrate. (20) A plurality of the photon responsive multiplication units are provided on the first substrate, The photodetector according to (16) or (19), wherein the plurality of photon response multiplication sections are electrically connected to one of the readout circuits. (twenty one) The light receiving element according to any one of (1) to (20), wherein a counter unit that counts the number of times a signal is output from the readout unit is connected to an output end of the readout unit. (twenty two) A photodetector according to any one of (1) to (20), wherein a time-to-digital conversion circuit is connected to the output end of the readout unit, the time-to-digital conversion circuit generating a digital signal indicating the time difference between a reference signal having a predetermined frequency and another signal generated based on the reference signal. (twenty three) a photon responsive multiplication section including a charge multiplication region capable of multiplying charges generated in response to incidence of photons; a first resistor connected at one end to one end of the photon response multiplication unit, the first resistor having a resistance value greater than a resistance value of the photon response multiplication unit; a second resistor portion connected at one end to the other end of the first resistor portion; a connection point at which the other end of the first resistor section, the one end of the second resistor section, and a readout section that reads out an output from the photon response multiplication section are connected; An optical device in which a plurality of light receiving elements each having the above structure are arranged in a matrix. (twenty four) An optical system; a photon responsive multiplication section including a charge multiplication region capable of multiplying charges generated in response to incidence of photons transmitted through the optical system; a first resistor connected at one end to one end of the photon response multiplication unit, the first resistor having a resistance value greater than a resistance value of the photon response multiplication unit; a second resistor portion connected at one end to the other end of the first resistor portion; and a connection point at which the other end of the first resistor section, the one end of the second resistor section, and a readout section that reads out an output from the photon response multiplication section are connected; an optical device in which a plurality of light receiving elements are arranged in a matrix, each of the light receiving elements having the An electronic device comprising: (twenty five) An optical system; A light emitting unit configured to emit light based on a reference signal having a predetermined frequency; a photon responsive multiplication section including a charge multiplication region capable of multiplying charges generated in response to incidence of photons through the optical system; a first resistor connected at one end to one end of the photon response multiplication unit, the first resistor having a resistance value greater than a resistance value of the photon response multiplication unit; a second resistor portion connected at one end to the other end of the first resistor portion; a connection point at which the other end of the first resistor section, the one end of the second resistor section, and a readout section that reads out an output from the photon response multiplication section are connected; and a time-to-digital conversion circuit that generates a digital signal indicating a time difference between the reference signal and the output read out by a readout unit from the photon response multiplication unit via the first resistance unit; an optical device in which a plurality of light receiving elements are arranged in a matrix, each of the light receiving elements having the An electronic device comprising: [Explanation of symbols]

[0287] 1 Electronic equipment 10 Optical Devices 11 Pixel array section 12 Drive circuit 13 Output circuit 15 Timing control circuit 20, 200, 200A, 200B pixels 21 Photodiode (SPAD) 22 Quench Resistance 23 Readout circuit 30 Imaging lens 40, 603 Storage section 50 processors 71 First Board 72 Second Board LS output signal line LD pixel drive line 100 Optical Devices 101 Semiconductor substrate 102 Photoelectric conversion area 103 N-type semiconductor region 104 P-type semiconductor region 105 P+ type semiconductor region 106 N+ type semiconductor region 107 Cathode Contact 108 Anode Contact 109 Insulating film 110 Element isolation section 111 Light-shielding film 113 Pinning Layer 114 Planarization film 115 Color Filter 116 On-chip lens 120, 130 wiring layers 121 Cathode Electrode 122 Anode Electrode 125, 135, 135A, 136 Connection Pads 210, 210A Single Photon Avalanche Diode (SPAD) 211 Shielding resistance section 211A Resistance element 211B P-channel MOS transistor 211C N-channel MOS transistor 212 Quench resistor 212A constant current source 212B Active recharge circuit 212S Switch 212C Control Unit 230 Readout circuit 230A inverter 240 Digital Counter Circuit 241 TDC circuit 242 Generation part 243 Signal Processing Unit 250 Bias voltage generator 260 Joint 310 Column Circuit 320 Row Scanning Circuit 330 Interface Circuit 600 Rangefinder 602 Light source section 604 Control section 605 Optical system PAR pixel array BL0, BL1, . . . , BL S , BL bit line WL0, WL1, . . . WL N , WL word line C1, C2 parasitic capacitance R L , R S resistor IVT Inverter C01 Cathode parasitic capacitance C02 Input parasitic capacitance VC1, VC2 variable capacitance element 201 Imaging device 202 Optical system 203 Shutter device 205 Drive circuit 206 Signal Processing Circuit 207 Monitor 208 Memory

Claims

1. a photon responsive multiplication section including a charge multiplication region capable of multiplying charges generated in response to incidence of photons; a first resistor connected at one end to one end of the photon response multiplication unit, the first resistor having a resistance value greater than a resistance value of the photon response multiplication unit; a second resistor section connected at one end to the other end of the first resistor section and having a resistance value greater than a resistance value of the photon response multiplication section; a connection point to which the other end of the first resistor section, the one end of the second resistor section, and a readout section that reads out an output from the photon response multiplication section are connected; A light receiving element comprising:

2. The light receiving element according to claim 1 , wherein the second resistor portion has a resistance value greater than a resistance value of the first resistor portion.

3. a first capacitance at the one end of the photon responsive multiplication section; The light receiving element according to claim 1 , further comprising a second capacitance at the other end of the first resistor portion.

4. 4. The light receiving element according to claim 3, wherein each of the first capacitance and the second capacitance is a variable capacitance element.

5. The light receiving element according to claim 4 , wherein the variable capacitance element includes one or a plurality of transistors.

6. The second resistor portion is a switch provided between the readout unit and a power source electrically connected to the other end of the second resistor unit; A control unit that detects an output of the readout unit and controls the switch based on the detection result; The light receiving element according to claim 1 .

7. The light receiving element according to claim 1 , wherein the second resistor portion is a constant current source.

8. The photodetector according to claim 1 , wherein the photon responsive multiplier section includes a single-photon avalanche diode.

9. The photodetector according to claim 8 , wherein the one end of the photon responsive multiplication section is a cathode or an anode of the single-photon avalanche diode.

10. The photodetector according to claim 1 , wherein the photon responsive multiplier section includes a silicon photomultiplier tube.

11. 2. The light receiving element according to claim 1, wherein the first resistor portion is a polysilicon resistor portion or a metal resistor portion.

12. The light receiving element according to claim 1 , wherein the first resistance portion is constituted by one or a plurality of transistors.

13. a first substrate having a first connection portion on one surface; a second substrate having a second connection portion corresponding to the first connection portion on one surface thereof, the second substrate being electrically and mechanically joined to the first substrate by joining the first connection portion and the second connection portion; Further comprising: the photon responsive multiplication unit is provided on the first substrate, The light receiving element according to claim 1 , wherein the readout section is provided on the second substrate.

14. the first connection portion and the second connection portion are made of copper; The light-receiving element according to claim 13 , wherein the first connection portion and the second connection portion, which are made of copper, are joined by bringing surfaces of the first connection portion and the second connection portion into close contact with each other.

15. The light-receiving element according to claim 13 , wherein the first connection portion and the second connection portion are joined by a metal bump.

16. a first substrate having a first connection portion on one surface; a second substrate having a second connection portion on one surface corresponding to the first connection portion and a third connection portion on a surface opposite to the one surface, the second substrate being electrically and mechanically joined to the first substrate by joining the first connection portion and the second connection portion; a third substrate having a third connection portion on one surface thereof corresponding to the second connection portion, and electrically and mechanically joined to the second substrate by joining the second connection portion and the third connection portion; Further comprising: The light receiving element according to claim 1 , wherein the photon responsive multiplication section is provided on the first substrate.

17. 2. The light receiving element according to claim 1, wherein a counter unit that counts the number of times the signal is output from the readout unit is connected to an output end of the readout unit.

18. The light receiving element according to claim 1, wherein a time-to-digital conversion circuit is connected to an output terminal of the readout unit, the time-to-digital conversion circuit generating a digital signal indicating a time difference between a reference signal having a predetermined frequency and another signal generated based on the reference signal.

19. a photon responsive multiplication section including a charge multiplication region capable of multiplying charges generated in response to incidence of photons; a first resistor connected at one end to one end of the photon response multiplication unit, the first resistor having a resistance value greater than a resistance value of the photon response multiplication unit; a second resistor section connected at one end to the other end of the first resistor section and having a resistance value greater than a resistance value of the photon response multiplication section; a connection point to which the other end of the first resistor section, the one end of the second resistor section, and a readout section that reads out an output from the photon response multiplication section are connected; An optical device comprising: a plurality of light receiving elements arranged in a matrix, each of the light receiving elements having the above structure.

20. An optical system; an optical device in which a plurality of light receiving elements are arranged in a matrix and into which photons transmitted through the optical system are respectively incident; Equipped with Each of the plurality of light receiving elements is a photon responsive multiplication section including a charge multiplication region capable of multiplying charges generated in response to the incidence of photons transmitted through the optical system; a first resistor connected at one end to one end of the photon response multiplication unit, the first resistor having a resistance value greater than a resistance value of the photon response multiplication unit; a second resistor section connected at one end to the other end of the first resistor section and having a resistance value greater than a resistance value of the photon response multiplication section; a connection point at which the other end of the first resistor section, the one end of the second resistor section, and a readout section that reads out an output from the photon response multiplication section are connected; Electronic equipment, including

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