Electro-optic device and electronic appliance

By introducing a lens layer and a first relay layer matching the connection member's shape in the electro-optical device, the issue of increased connection electrode diameter and reduced aperture ratio is addressed, enhancing the device's optical performance.

JP2025070502APending Publication Date: 2025-05-02SEIKO EPSON CORP
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Patent Information

Application Number
JP2023180864
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-10-20
Publication Date
2025-05-02

AI Technical Summary

Technical Problem

In electro-optical devices, the formation of an ALD film in contact holes can lead to an increase in the diameter of the connection electrode, resulting in a decreased opening ratio due to the widening of the contact hole edge during etching.

Method used

The electro-optical device incorporates a lens layer between the transistor and pixel electrode layers, with a first connection member penetrating the lens layer to connect the transistor and pixel electrode, and a first relay layer matching the shape of the connection member in plan view, thereby maintaining the aperture ratio.

Benefits of technology

This configuration prevents the contact plug from expanding in plan view, thereby maintaining the aperture ratio and improving the optical performance of the electro-optical device.

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Abstract

To provide an electro-optic device and an electronic appliance whose optical characteristic can be improved.SOLUTION: An electro-optic device includes a transistor, a pixel electrode provided in accordance with the transistor, a lens layer 34 provided between the transistor and the pixel electrode, a contact plug 31 provided penetrating the lens layer 34 and electrically connecting the transistor and the pixel electrode, and a first relay layer 20 electrically connecting the contact plug 31 and the pixel electrode. The first relay layer 20 has the same shape as the contact plug 31 in a plan view.SELECTED DRAWING: Figure 8
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Description

[Technical field]

[0001] The present invention relates to an electro-optical device and an electronic device. [Background technology]

[0002] Patent Document 1 discloses the configuration of an electro-optical device that can achieve high definition by reducing the diameter of the connection electrode embedded in the contact hole and thus reducing the area of ​​the pixel electrode. The pixel electrode is electrically connected to the relay layer via the connection electrode. The connection electrode is formed by forming an ALD (atomic layer deposition) film that functions as a shrink film on the side wall of the contact hole to reduce the diameter of the contact hole. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-184005 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the configuration described in Patent Document 1, when an ALD film is formed in a contact hole and then etching is performed to remove the ALD film on the relay layer, the mouth of the contact hole, i.e., the edge of the contact hole on the pixel electrode side, may be removed. This increases the diameter of the connection electrode in a planar view by the amount of the expanded edge, resulting in a problem of reduced aperture ratio. [Means for solving the problem]

[0005] The electro-optical device comprises a transistor, a pixel electrode corresponding to the transistor, a lens layer provided between the transistor and the pixel electrode, a first connection member provided through the lens layer and electrically connecting the transistor and the pixel electrode, and a first relay layer electrically connecting the first connection member and the pixel electrode, wherein the first relay layer has the same shape as the first connection member in a planar view.

[0006] The electronic device includes the electro-optical device described above. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a plan view showing a configuration of a liquid crystal device as an electro-optical device. [Diagram 2] FIG. 2 is a cross-sectional view of the liquid crystal device shown in FIG. 1 taken along line AA. [Diagram 3] FIG. 2 is an equivalent circuit diagram showing an electrical configuration of an element substrate. [Figure 4] 3 is a cross-sectional view showing a cross-sectional structure of a pixel in a display region of the element substrate. [Diagram 5] FIG. 2 is a plan view showing a configuration of a part of a display area of ​​an element substrate. [Figure 6] 6 is a cross-sectional view taken along line BB of the element substrate shown in FIG. 5. [Figure 7] FIG. 2 is a plan view showing a configuration of a part of a display area of ​​an element substrate. [Figure 8] 8 is a cross-sectional view taken along line CC of the element substrate shown in FIG. 7. [Figure 9A] 5A to 5C are cross-sectional views illustrating a method for manufacturing a liquid crystal device. [Figure 9B] 5A to 5C are cross-sectional views illustrating a method for manufacturing a liquid crystal device. [Figure 9C] 5A to 5C are cross-sectional views illustrating a method for manufacturing a liquid crystal device. [Figure 9D] 5A to 5C are cross-sectional views illustrating a method for manufacturing a liquid crystal device. [Figure 9E] 5A to 5C are cross-sectional views illustrating a method for manufacturing a liquid crystal device. [Figure 9F] 5A to 5C are cross-sectional views illustrating a method for manufacturing a liquid crystal device. [Figure 9G] 5A to 5C are cross-sectional views illustrating a method for manufacturing a liquid crystal device. [Figure 10] FIG. 1 is a schematic diagram showing a configuration of a projector as an electronic device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the dimensions of different components may be shown on different scales in order to make the components easier to see.

[0009] For ease of explanation, the following description will be made using the mutually orthogonal X-axis, Y-axis, and Z-axis as appropriate. A direction along the X-axis will be referred to as the X1 direction, and a direction opposite to the X1 direction will be referred to as the X2 direction. Similarly, a direction along the Y-axis will be referred to as the Y1 direction, and a direction opposite to the Y1 direction will be referred to as the Y2 direction. A direction along the Z-axis will be referred to as the Z1 direction, and a direction opposite to the Z1 direction will be referred to as the Z2 direction. In the following description, a view in the Z1 or Z2 direction will be referred to as a "planar view," and a view from a direction perpendicular to a cross section including the Z-axis will be referred to as a "cross-sectional view."

[0010] Furthermore, in the following description, for example, the term "on the substrate" refers to a substrate that is disposed in contact with the substrate, that is disposed on the substrate via another structure, or that is disposed partially in contact with the substrate and partially disposed via another structure. Furthermore, the term "top surface" of a certain structure refers to the surface of the structure on the Z1 direction side, for example, "top surface of a light-transmitting layer" refers to the surface of the light-transmitting layer on the Z1 direction side. Furthermore, the term "bottom surface" of a certain structure refers to the surface of the structure on the Z2 direction side, for example, "bottom surface of a contact plug" refers to the surface of a contact plug on the Z2 direction side.

[0011] In this embodiment, an active drive type liquid crystal device 300 having a TFT (Thin Film Transistor) as a switching element for each pixel will be described as an example of the electro-optical device. The liquid crystal device 300 is used as a light modulation device in a projection display device as an electronic device, which will be described later.

[0012] First, the configuration of a liquid crystal device 300 as an electro-optical device will be described with reference to FIGS.

[0013] 1 and 2, a liquid crystal device 300 includes a light-transmitting element substrate 100, a light-transmitting counter substrate 200, a frame-shaped seal member 8, and a liquid crystal layer Lc. Note that "light-transmitting" refers to transparency to visible light, and preferably refers to a visible light transmittance of 50% or more.

[0014] The liquid crystal device 300 has a display area A1 for displaying an image, and an outer area A2 located outside the display area A1 in a plan view. A plurality of pixels P arranged in a matrix are provided in the display area A1. Note that although the shape of the liquid crystal device 300 shown in FIG. 1 is rectangular, it may also be, for example, circular.

[0015] 2, the element substrate 100 and the counter substrate 200 are disposed with a liquid crystal layer Lc interposed therebetween. In this embodiment, the counter substrate 200 is disposed on the light incident side of the liquid crystal layer Lc, and the element substrate 100 is disposed on the light exit side of the liquid crystal layer Lc. Incident light IL incident on the counter substrate 200 is modulated by the liquid crystal layer Lc, and is emitted from the element substrate 100 as modulated light ML.

[0016] The element substrate 100 has a base 90, a plurality of interlayer insulating layers including an interlayer insulating layer 82, a pixel electrode 10, and an alignment film 12. Although not shown, a lens layer 34 (see FIG. 4), which will be described later, is provided between the pixel electrode 10 and the interlayer insulating layer 82.

[0017] The base 90 is a flat plate having optical transparency and insulating properties. The base 90 is, for example, a glass substrate or a quartz substrate. A transistor 1 (see FIG. 4), which will be described later, is disposed between the multiple interlayer insulating layers.

[0018] The pixel electrode 10 is translucent and includes a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or fluorine-doped tin oxide (FTO).

[0019] The thickness direction of the pixel electrode 10 coincides with the Z1 direction or the Z2 direction. The alignment film 12 has light-transmitting and insulating properties. The alignment film 12 aligns the liquid crystal molecules of the liquid crystal layer Lc. Examples of materials for the alignment film 12 include silicon oxide and polyimide.

[0020] The counter substrate 200 is a substrate disposed opposite to the element substrate 100. The counter substrate 200 includes a base 210, an insulating layer 220, a common electrode 230, and an alignment film 240.

[0021] The substrate 210 is a flat plate having light-transmitting and insulating properties. The substrate 210 is, for example, a glass substrate or a quartz substrate. The insulating layer 220 is light-transmitting and insulating. The material of the insulating layer 220 is, for example, an inorganic material such as silicon oxide.

[0022] The common electrode 230 is an electrode disposed opposite to the plurality of pixel electrodes 10. The common electrode 230 includes a transparent conductive material such as ITO, IZO, or FTO. The common electrode 230 and the pixel electrodes 10 apply an electric field to the liquid crystal layer Lc. The alignment film 240 is transparent and insulating.

[0023] The seal member 8 is disposed between the element substrate 100 and the counter substrate 200. The seal member 8 is formed using, for example, an adhesive containing various curable resins such as epoxy resin. The seal member 8 may contain a gap material made of an inorganic material such as glass.

[0024] The liquid crystal layer Lc is disposed within an area surrounded by the element substrate 100, the counter substrate 200, and the seal member 8. The liquid crystal layer Lc is disposed between the plurality of pixel electrodes 10 and the common electrode 230. The liquid crystal layer Lc is an electro-optical layer whose optical characteristics change in response to an electric field. The liquid crystal layer Lc contains liquid crystal molecules having positive or negative dielectric anisotropy. The orientation of the liquid crystal molecules changes in response to an electric field applied to the liquid crystal layer Lc. The liquid crystal layer Lc modulates the incident light IL in response to the applied electric field.

[0025] 1, a plurality of scanning line driving circuits 6, a data line driving circuit 7, and a plurality of terminals 9 are arranged in the outer region A2 of the element substrate 100. Some of the plurality of terminals 9 are connected to the scanning line driving circuit 6 or the data line driving circuit 7 via wiring (not shown). The plurality of terminals 9 also includes a terminal to which a common potential is applied from the outside.

[0026] Next, the electrical configuration of the element substrate 100 will be described with reference to FIG.

[0027] 3, a display area A1 of the element substrate 100 is provided with a plurality of transistors 1 as switching elements, n scanning lines 3, m data lines 4, and m capacitance lines 5. n and m are each an integer of 2 or more. The transistors 1 are disposed at intersections between the n scanning lines 3 and the m data lines 4.

[0028] Each of the n scanning lines 3 extends in the X1 direction, and the n scanning lines 3 are arranged at equal intervals in the Y1 direction. Each of the n scanning lines 3 is electrically connected to the gate electrodes of the corresponding transistors 1. The n scanning lines 3 are electrically connected to a scanning line driving circuit 6 shown in Fig. 1. As shown in Fig. 3, scanning signals G1, G2, ..., and Gn are supplied line-sequentially to the 1st to nth scanning lines 3 from the scanning line driving circuit 6.

[0029] Each of the m data lines 4 extends in the Y1 direction, and the m data lines 4 are arranged at equal intervals in the X1 direction. Each of the m data lines 4 is electrically connected to the source regions of the corresponding transistors 1. The m data lines 4 are electrically connected to the data line driving circuit 7 shown in Fig. 1. As shown in Fig. 3, image signals E1, E2, ..., and Em are supplied in parallel to the 1 to m data lines 4 from the data line driving circuit 7.

[0030] The n scanning lines 3 and m data lines 4 are electrically insulated from each other and arranged in a lattice pattern in a plan view. An area surrounded by two adjacent scanning lines 3 and two adjacent data lines 4 corresponds to a pixel P. A pixel electrode 10 is provided for each pixel P. The pixel electrode 10 is electrically connected to the drain region of the transistor 1.

[0031] Each of the m capacitance lines 5 extends in the Y1 direction, and the m capacitance lines 5 are arranged at equal intervals in the X1 direction. The m capacitance lines 5 are electrically insulated from and spaced apart from the m data lines 4 and the n scanning lines 3. A fixed potential such as a common potential or a ground potential is applied to each capacitance line 5.

[0032] One electrode of the capacitance element 2 is electrically connected to a capacitance line 5. The other electrode of the capacitance element 2 is electrically connected to a pixel electrode 10 and holds the potential of an image signal supplied to the pixel electrode 10.

[0033] Next, the configuration of the pixel P on the element substrate 100 will be described with reference to FIG.

[0034] As shown in FIG. 4, in the display region A1, the element substrate 100 has a cross-sectional structure in which insulating or conductive functional layers or functional films are laminated in the Z1 direction of the base 90.

[0035] The light-shielding layer 80 is disposed between the base 90 and the interlayer insulating layer 82. The light-shielding layer 80 is formed of a conductive material having light-shielding properties. Examples of the conductive material having light-shielding properties include metals such as tungsten (W), titanium (Ti), chromium (Cr), iron (Fe), and aluminum (Al), metal nitrides, and metal silicides. The light-shielding layer 80 constitutes a part of the scanning line 3. The term "light-shielding properties" refers to light-shielding properties against visible light, and preferably refers to a visible light transmittance of less than 50%, and more preferably refers to a visible light transmittance of 10% or less.

[0036] The interlayer insulating layer 82 has light transmitting properties and insulating properties. The interlayer insulating layer 82 is formed of an inorganic material such as silicon oxide. The transistor 1 is disposed on the interlayer insulating layer 82.

[0037] The transistor 1 includes a semiconductor layer 70 having an LDD (Lightly Doped Drain) structure, a gate electrode 74, and a gate insulating layer 72. The semiconductor layer 70 includes a drain region 70d, an LDD region 70a, a channel region 70c, an LDD region 70b, and a source region 70s.

[0038] The channel region 70c is located between the source region 70s and the drain region 70d. The LDD region 70b is located between the channel region 70c and the source region 70s. The LDD region 70a is located between the channel region 70c and the drain region 70d.

[0039] The semiconductor layer 70 is, for example, polysilicon, and regions other than the channel region 70c are doped with impurities to enhance conductivity. The impurity concentrations in the LDD region 70b and the LDD region 70a are lower than the impurity concentrations in the source region 70s and the drain region 70d.

[0040] A gate electrode 74 is provided on the semiconductor layer 70 via a gate insulating layer 72. The gate electrode 74 overlaps a channel region 70c of the semiconductor layer 70. The gate electrode 74 is formed, for example, by doping polysilicon with an impurity that enhances electrical conductivity. The gate electrode 74 may be formed using a material having electrical conductivity, such as a metal, a metal silicide, or a metal compound.

[0041] The gate insulating layer 72 is made of silicon oxide formed by, for example, thermal oxidation or a CVD (Chemical Vapor Deposition) method, etc. The gate electrode 74 and the light-shielding layer 80 are electrically connected to each other via a contact plug 81 that penetrates the gate insulating layer 72 and the interlayer insulating layer 82.

[0042] A conductive layer 60 and a relay layer 62 are provided on the transistor 1 via an interlayer insulating layer 76. The conductive layer 60 and the relay layer 62 are provided in the same layer and are formed of a light-shielding conductive material. The interlayer insulating layer 76 is formed of the same material as the interlayer insulating layer 82. The conductive layer 60 constitutes a part of the data line 4. The conductive layer 60 is electrically connected to a source region 70s of the semiconductor layer 70 via a contact plug 73 that penetrates the interlayer insulating layer 76. The relay layer 62 is electrically connected to a drain region 70d of the semiconductor layer 70 via a contact plug 71 that penetrates the interlayer insulating layer 76.

[0043] An interlayer insulating layer 64 is provided on the conductive layer 60 and the relay layer 62, and a relay layer 52 is provided on the interlayer insulating layer 64. The relay layer 52 is formed of a light-shielding conductive material. The interlayer insulating layer 64 is formed of the same material as the interlayer insulating layer 82. The relay layer 52 is electrically connected to the relay layer 62 via a contact plug 61 that penetrates the interlayer insulating layer 64.

[0044] The capacitance element 2 is provided on the relay layer 52 with an interlayer insulating layer 54 interposed therebetween. The capacitance element 2 has a capacitance electrode 50 provided on the base 90 side, a capacitance electrode 40 provided on the pixel electrode 10 side, and a dielectric layer 56 provided between the capacitance electrodes 50 and 40. The capacitance electrodes 40 and 50 are both made of a light-shielding conductive material. The interlayer insulating layer 54 is made of the same material as the interlayer insulating layer 82.

[0045] The capacitance electrode 50 constitutes a part of the capacitance line 5. The capacitance electrode 40 is electrically connected to the relay layer 52 via a contact plug 51 penetrating the interlayer insulating layer 54, and is electrically connected to the drain region 70d of the transistor 1.

[0046] Between the capacitance electrode 40 and the pixel electrode 10, an optical function layer LS including a lens layer 34 is provided. The optical function layer LS is provided to suppress light loss. Specifically, the optical path of the transmitted light is adjusted so that the transmitted light that has passed through the pixel electrode 10 does not hit a light-shielding material layer such as the data line 4 or the capacitance line 5 and become a loss. The optical function layer LS includes a third light-transmitting layer 42, a lens layer 34, a second light-transmitting layer 32, a first light-transmitting layer 22, and a protective layer 24.

[0047] The third light-transmitting layer 42 is an optical path length adjustment layer, which is called a path layer for adjusting the optical path length. The third light-transmitting layer 42 is made of an inorganic material such as silicon oxide. The upper surface of the third light-transmitting layer 42 is planarized by CMP (Chemical Mechanical Polishing) or the like.

[0048] The lens layer 34 is provided on the third light transmissive layer 42. A lens surface 34s of the lens layer 34 has a convex shape. The lens layer 34 is made of an inorganic material having a refractive index different from those of the third light transmissive layer 42 and the second light transmissive layer 32, such as silicon oxynitride.

[0049] The second light transmissive layer 32 is provided on the lens layer 34. The second light transmissive layer 32 is provided with convex portions 32c that become the lens surfaces 34s of the lens layer 34. The second light transmissive layer 32 is formed of an inorganic material such as silicon oxide, similar to the third light transmissive layer 42. The second light transmissive layer 32 is formed by depositing silicon oxide so as to fill the convex portions 32c, and then planarizing the surface by CMP or the like.

[0050] The first light transmitting layer 22 is provided on the second light transmitting layer 32. The first light transmitting layer 22 is formed of an inorganic material such as silicon oxide, similar to the third light transmitting layer 42. The layer thickness of the first light transmitting layer 22 is thinner than the layer thickness of the second light transmitting layer 32. The first light transmitting layer 22 is provided to ensure good electrical connection between the pixel electrodes 10 and the contact plugs 31 serving as the first connecting members. Since the contact plugs 31 are provided in the gaps between the four pixel electrodes 10, the pixel electrodes 10 and the contact plugs 31 cannot be directly connected to each other.

[0051] Therefore, the pixel electrodes 10 and the contact plugs 31 are electrically connected via the first relay layer 20 provided on the second translucent layer 32 so as to overlap the contact plugs 31 and the pixel electrodes 10 in a plan view, and the pixel contact plugs 21 serving as second connection members provided between the first relay layer 20 and the pixel electrodes 10 and penetrating the first translucent layer 22. In this way, by providing the first translucent layer 22 between the first relay layer 20 and the pixel electrodes 10, the contact plugs 31 can be provided in the gaps between the four pixel electrodes 10, and the layout constraints can be satisfied.

[0052] The protective layer 24 is provided on the first light-transmitting layer 22. The protective layer 24 is made of an inorganic material having light-transmitting and hygroscopic properties, such as BSG (Borosilicate Glass). The pixel electrode 10 is provided on the protective layer 24. The alignment film 12 is provided on the pixel electrode 10.

[0053] The pixel electrode 10 and the capacitor electrode 40 are electrically connected via the pixel contact plug 21, the first relay layer 20, the contact plug 31, the second relay layer 30, and the contact plug 41. As a result, the pixel electrode 10 is electrically connected to the drain region 70d of the transistor 1.

[0054] The pixel contact plug 21 is provided to penetrate the protective layer 24 and the first light transmitting layer 22. The pixel contact plug 21 is made of a conductive material such as tungsten. The pixel contact plug 21 contacts the pixel electrode 10 and the first relay layer 20 to electrically connect the pixel electrode 10 and the first relay layer 20.

[0055] The first relay layer 20 is provided between the first light transmitting layer 22 and the second light transmitting layer 32. When tungsten is used as the material of the pixel contact plug 21, the first relay layer 20 is preferably formed of a material that can have good electrical conduction with tungsten, such as titanium nitride.

[0056] The contact plug 31 is provided in the contact hole 33. The contact hole 33 is provided to penetrate the second light transmitting layer 32 and the lens layer 34. The contact plug 31 is formed by filling the inside of the contact hole 33 with a conductive material such as tungsten. The contact plug 31 is in contact with the first relay layer 20 and the second relay layer 30, and electrically connects the first relay layer 20 and the second relay layer 30.

[0057] The second relay layer 30 is provided between the lens layer 34 and the third light transmitting layer 42. When tungsten is used as the material of the contact plug 31, the second relay layer 30 is preferably formed of a material that can provide good electrical conduction with tungsten, such as titanium nitride.

[0058] The contact plug 41 is provided to penetrate the third light-transmitting layer 42. The contact plug 41 is made of a conductive material such as tungsten. The contact plug 41 is in contact with the second relay layer 30 and the capacitance electrode 40, and electrically connects the second relay layer 30 and the capacitance electrode 40.

[0059] Next, the configuration of the optical function layer LS in the display region A1 of the element substrate 100 will be described with reference to FIGS.

[0060] Fig. 5 shows the layout of the pixel electrode 10, pixel contact plug 21, first relay layer 20, and contact plug 31 when the pixel electrode 10 is viewed in the Z2 direction from the liquid crystal layer Lc side. In Fig. 5, the pixel electrode 10 is shown by a solid line. In Fig. 5, the configuration included in the optical function layer LS provided on the base body 90 side of the pixel electrode 10 is drawn by a dashed line. In addition, the curved shape of the lens surface 34s is shown by a triple circle drawn with two-dot chain lines, and the boundary where two adjacent lens surfaces 34s contact each other is shown by a boundary line 34b.

[0061] 5, the pixel electrodes 10 are arranged in a matrix along the X-axis and Y-axis directions. The pixel contact plugs 21 are provided at positions overlapping the pixel electrodes 10, and in this embodiment, at positions overlapping the lower left corner of the pixel electrodes 10 in the drawing.

[0062] The first relay layer 20 has a rectangular shape. The four corners of the first relay layer 20 are provided so as to overlap with the corners of four pixel electrodes 10 adjacent to each other in the X2 direction, the Y2 direction, and the diagonal direction of the pixel electrode 10. The pixel contact plug 21 is provided at one of the four corners of the first relay layer 20 in a plan view.

[0063] The contact plug 31 is provided at a position overlapping with the first relay layer 20 in a planar view. In this embodiment, the contact plug 31 and the pixel contact plug 21 are provided at positions not overlapping with each other in a planar view. In order to prevent the contact plug 31 and the pixel contact plug 21 from overlapping with each other, the contact plug 31 is provided at a corner of the first relay layer 20 diagonally opposite to the corner at which the pixel contact plug 21 is provided.

[0064] The contact plug 31 has an inverted truncated cone shape. Therefore, an outer edge 31a of the top surface of the contact plug 31 surrounds the outside of an outer edge 31b of the bottom surface in a plan view. The contact plug 41 is provided at a position overlapping the contact plug 31.

[0065] The capacitance electrode 40 has a wide portion 40w provided at a corner of the L shape, an extension portion 40u extending from the wide portion 40w along the X1 direction so as to overlap with the scanning line 3, and an extension portion 40u extending from the wide portion 40w along the Y1 direction so as to overlap with the data line 4. The wide portion 40w is provided so as to overlap with the contact plug 31 and the contact plug 41.

[0066] In this embodiment, the intersection of the boundary line 34b overlaps with the contact plug 31. This indicates that the contact plug 31 is provided penetrating the lens surface 34s of the lens layer 34. Note that the boundary line 34b drawn inside the contact hole 33 is intended to indicate that the lens surface 34s is provided without any gaps, and no lens surface 34s exists inside the contact hole 33.

[0067] 6, contact hole 33 penetrates second light transmitting layer 32 and lens layer 34. The aspect ratio of contact hole 33 is about twice or more higher than the aspect ratio of other contact holes, for example, contact hole 43. In this embodiment, contact hole 33 has a depth L of about 5 to 10 μm and an inner diameter D of contact hole 33 of about 1 μm, and therefore the aspect ratio L / D is about 5 to 10.

[0068] Next, the configuration around the contact plug 31 will be described in more detail with reference to Figures 7 and 8. In Figure 7, the pixel electrode 10 and the pixel contact plug 21 are shown by virtual lines.

[0069] 7, the pixel contact plug 21 and the contact plug 31 are provided at positions overlapping the first relay layer 20 in a planar view. The pixel contact plug 21 of the present embodiment is provided so as not to overlap with the contact plug 31 in a planar view, for example. The pixel contact plug 21 and the contact plug 31 are each disposed at diagonally opposite corners of the first relay layer 20 so that the pixel contact plug 21 and the contact plug 31 do not overlap with each other in a planar view.

[0070] 8, the lens surface 34s of the lens layer 34 has a convex shape. The lens layer 34 has a flat portion 34f between each lens surface 34s adjacent to the lens surface 34s. The second light-transmitting layer 32 is provided on the lens layer 34 and has a flat portion 32f that follows the shape of the flat portion 34f of the lens layer 34.

[0071] The contact hole 33 penetrates the flat portion 32f of the second light transmitting layer 32 and the flat portion 34f of the lens layer 34. As shown in Fig. 7, the flat portion 34f is an area surrounded by boundaries 34p between four adjacent lens surfaces 34s. The contact plug 31 is provided at a position overlapping the flat portion 34f of the lens layer 34 and the flat portion 32f of the second light transmitting layer 32.

[0072] 8, the optical function layer LS1 has a first relay layer 20, a second relay layer 30, and a second light-transmitting layer 32 and a lens layer 34 disposed between the first relay layer 20 and the second relay layer 30. The second light-transmitting layer 32 is disposed between the first relay layer 20 and the lens layer 34.

[0073] The contact plug 31 is provided penetrating the second light transmitting layer 32 and the lens layer 34. Therefore, as described above, the aspect ratio L / D is high, about 5 to 10. Therefore, by suppressing the outer shape of the surface of the contact plug 31 from becoming large, the aperture ratio can be improved.

[0074] The contact plug 31 electrically connects the transistor 1 and the pixel electrode 10. Specifically, the contact plug 31 is electrically connected to the pixel electrode 10 via the first relay layer 20 and the pixel contact plug 21.

[0075] The first relay layer 20 has the same shape as the contact plug 31 in a planar view. Specifically, the contact plug 31 has a first portion W1 having a tapered shape from the pixel electrode 10 side toward the transistor 1 side, and a second portion W2 having the same shape as the first relay layer 20 in a planar view and located closer to the pixel electrode 10 than the first portion W1.

[0076] That is, the outer shape of the second portion W2 of the contact plug 31 and the outer shape of the first relay layer 20 are the same shape.

[0077] In this way, since the external shape of the second portion W2 of the contact plug 31 is the same as the external shape of the first relay layer 20, it is possible to prevent the contact plug 31 from becoming larger in a planar view, and thus it is possible to prevent a decrease in the aperture ratio.

[0078] 8, the lens layer 34 and the second light transmitting layer 32 are provided with a contact hole 33 corresponding to the contact plug 31. An ALD film 35 serving as an insulating member is disposed between the side surface of the contact hole 33 and the contact plug 31. The ALD film 35 is, for example, SiO2 (silicon oxide).

[0079] In this manner, since the ALD film 35 is disposed on the side surface of the contact hole 33, it is possible to reduce the cavity of the contact hole 33, i.e., the diameter of the contact hole 33, and thus it is possible to thin the contact plug 31. As a result, it is possible to prevent a decrease in the aperture ratio.

[0080] In a plan view, the outer shape of the second relay layer 30 is the same as the outer shape of the first relay layer 20, or is provided inside the outer shape of the first relay layer 20. The width of the first relay layer 20 in a plan view is, for example, 1.2 μm.

[0081] As such, since the outer shapes of the second relay layer 30 and the first relay layer 20 have the above-mentioned relationship, it is possible to prevent the aperture ratio from being reduced by the first relay layer 20 and the second relay layer 30.

[0082] 9A to 9G, a method for manufacturing the liquid crystal device 300 will be described. Note that the manufacturing method will be described mainly with respect to the periphery of the contact plug 31 shown in FIG.

[0083] 9A, a contact hole 33 is formed. Specifically, the contact hole 33 is formed in the lens layer 34 and the second light transmitting layer 32 that overlap with the second relay layer 30 in a planar view by using photolithography and etching techniques.

[0084] 9B, an ALD film 35 is formed on the entire surface of the element substrate 100, specifically, on the upper surface 32a of the second light transmitting layer 32, the side surface of the contact hole 33, and the surface 30a of the second relay layer 30. This makes it possible to reduce the diameter of the contact hole 33.

[0085] 9C, the ALD film 35 formed on the surface 30a of the second relay layer 30 is removed. Specifically, the element substrate 100 is dry etched, in other words, dry etched back, to remove the ALD film 35 on the upper surface 32a of the second light transmitting layer 32 and the surface 30a of the second relay layer 30. This exposes the surface 30a of the second relay layer 30 and removes the mouth 33a of the contact hole 33. Specifically, the mouth 33a of the contact hole 33 has a tapered shape.

[0086] 9D, tungsten film 31A is embedded in contact hole 33. Specifically, tungsten film 31A is embedded in contact hole 33, and a part of tungsten film 31B of tungsten film 31A is embedded in mouth 33a of contact hole 33. Tungsten film 31B is disposed in an area wider than the outer shape of second relay layer 30, in other words, the surface of contact plug 31 is expanded, narrowing the opening area and decreasing the aperture ratio.

[0087] 9E, an electrode film 20a is deposited to form the first relay layer 20. The deposition method may be a known sputtering method or the like.

[0088] 9F, a resist pattern 36 is formed on the electrode film 20a. Specifically, after a resist film is formed, the resist pattern 36 for forming the first relay layer 20 is formed using photolithography and etching techniques.

[0089] 9G, the electrode film 20a and the tungsten film 31B in the tapered portion of the mouth 33a of the contact hole 33 are etched together to form the first relay layer 20. By etching the electrode film 20a and the tungsten film 31B together, the outer shape of the first relay layer 20 and the outer shape of the second portion W2 of the contact plug 31 become identical to each other.

[0090] Furthermore, by removing tungsten film 31B in the tapered portion of mouth 33a, that is, expanded tungsten film 31B, it is possible to reduce the light blocking range, and the aperture ratio can be improved.

[0091] Next, the configuration of a projector 1000 as a projection-type display device, which is an example of an electronic device, will be described with reference to FIG.

[0092] 10, the projector 1000 is, for example, a three-panel projector equipped with three of the above-mentioned liquid crystal devices 300. The liquid crystal device 300R corresponds to a red display color, the liquid crystal device 300G corresponds to a green display color, and the liquid crystal device 300B corresponds to a blue display color. The control unit 1005 includes, for example, a processor and a memory, and controls the operations of the liquid crystal devices 300R, 300G, and 300B.

[0093] The illumination optical system 1001 supplies red component RL of light emitted from the illumination device 1002, which is a light source, to the liquid crystal device 300R, green component GL to the liquid crystal device 300G, and blue component BL to the liquid crystal device 300B. Each of the liquid crystal devices 300R, 300G, and 300B functions as a light modulation device that modulates the color light RL, GL, and BL supplied from the illumination optical system 1001 according to a display image. The projection optical system 1003 combines the light emitted from each of the liquid crystal devices 300R, 300G, and 300B and projects the combined light onto a projector screen 1004.

[0094] In this way, since the projector 1000 serving as the electronic device of this embodiment includes the liquid crystal device 300 with high optical performance described above, the performance of the projector 1000 can be improved.

[0095] The electronic device is not limited to the exemplified three-panel projector 1000. For example, the projector 1000 may be a single-panel, two-panel, or one equipped with four or more liquid crystal devices 300. The electronic device may also be a PDA (Personal Digital Assistant), a digital still camera, a television, a video camera, a car navigation device, an in-vehicle display, an electronic organizer, an electronic paper, a calculator, a word processor, a workstation, a videophone, a POS (Point of sale), a printer, a scanner, a copier, a video player, or a device equipped with a touch panel.

[0096] As described above, the liquid crystal device 300 of this embodiment comprises a transistor 1, a pixel electrode 10 corresponding to the transistor 1, a lens layer 34 provided between the transistor 1 and the pixel electrode 10, a contact plug 31 provided through the lens layer 34 and electrically connecting the transistor 1 and the pixel electrode 10, and a first relay layer 20 that electrically connects the contact plug 31 and the pixel electrode 10, and the first relay layer 20 has the same shape as the contact plug 31 in a planar view.

[0097] According to this configuration, since the shape of the contact plug 31 is the same as the shape of the first relay layer 20, it is possible to prevent the contact plug 31 from becoming larger in plan view, and therefore it is possible to prevent a decrease in the aperture ratio.

[0098] Moreover, in the liquid crystal device 300 of this embodiment, it is preferable that a second light-transmitting layer 32 is provided between the first relay layer 20 and the lens layer 34, and the contact plug 31 is provided so as to penetrate the second light-transmitting layer 32. According to this configuration, since the contact plug 31 is provided so as to penetrate the second light-transmitting layer 32 and the lens layer 34, the aspect ratio L / D becomes high. However, since the contact plug 31 has the same shape as the outer shape of the first relay layer 20, it is possible to prevent the outer shape of the contact plug 31 from becoming large, and the aperture ratio can be improved.

[0099] Moreover, in the liquid crystal device 300 of this embodiment, the lens layer 34 and the second light-transmitting layer 32 preferably have contact holes 33 provided corresponding to the contact plugs 31, and an ALD film 35, which is an insulating member, is provided between the side surface of the contact hole 33 and the contact plug 31. With this configuration, since the ALD film 35 is disposed on the side surface of the contact hole 33, it is possible to reduce the cavity of the contact hole 33, and the contact plug 31 can be made smaller, i.e., thinner. This makes it possible to suppress a decrease in the aperture ratio.

[0100] Furthermore, in the liquid crystal device 300 of this embodiment, the contact plug 31 preferably has a first portion W1 having a tapered shape from the pixel electrode 10 side toward the transistor 1 side, and a second portion W2 having the same shape as the first relay layer 20 in a planar view and located closer to the pixel electrode 10 than the first portion W1. With this configuration, since the shape of the second portion W2 of the contact plug 31 is the same as the shape of the first relay layer 20, it is possible to prevent the contact plug 31 from becoming larger in a planar view, and thus to prevent a decrease in the aperture ratio.

[0101] Furthermore, in the liquid crystal device 300 of this embodiment, a second relay layer 30 is provided on the side of the contact plug 31 opposite to the first relay layer 20, and in a planar view, the second relay layer 30 preferably has the same shape as the outer shape of the first relay layer 20 or is provided more inward than the first relay layer 20. With this configuration, since the outer shapes of the first relay layer 20 and the second relay layer 30 have the above-mentioned relationship, it is possible to prevent a decrease in the aperture ratio due to the first relay layer 20 and the second relay layer 30.

[0102] Moreover, the projector 1000 of this embodiment includes the above-described liquid crystal device 300. With this configuration, it is possible to provide the projector 1000 that can improve the aperture ratio.

[0103] Modifications of the above embodiment will now be described.

[0104] As described above, the contact plug 31 and the pixel contact plug 21 are not limited to being provided at positions where they do not overlap in a plan view, and may be provided so as to overlap at least partially.

[0105] Thus, the semiconductor device includes a first translucent layer 22 provided between the pixel electrode 10 and the first relay layer 20, and a pixel contact plug 21 provided through the first translucent layer 22 and electrically connecting the pixel electrode 10 and the first relay layer 20, and the pixel contact plug 21 may be arranged to overlap the first relay layer 20 and the contact plug 31 in a planar view.

[0106] According to this configuration, the pixel contact plug 21 is arranged to overlap the first relay layer 20 and the contact plug 31, so that it is possible to reduce the area of ​​the first relay layer 20, thereby improving the aperture ratio.

[0107] As described above, the lens surface 34s of the lens layer 34 is not limited to a convex shape and may be a concave shape. That is, the second light-transmitting layer 32 is provided with a concave portion that becomes the lens surface 34s of the lens layer 34. [Explanation of symbols]

[0108] 1...transistor, 2...capacitive element, 3...scanning line, 4...data line, 5...capacitive line, 6...scanning line driving circuit, 7...data line driving circuit, 8...sealing member, 9...terminal, 10...pixel electrode, 12...alignment film, 20...first relay layer, 20a...electrode film, 21...pixel contact plug as second connecting member, 22...first light-transmitting layer, 24...protective layer, 30...second relay layer, 30a...surface, 31...contact plug as first connecting member, 31a...outer edge, 31 A...tungsten film, 31b...outer edge, 31B...tungsten film, 32...second light-transmitting layer, 32a...upper surface, 32c...convex portion, 32f...flat portion, 33...contact hole, 33a...mouth, 34...lens layer, 34b...boundary line, 34f...flat portion, 34p...boundary line, 34s...lens surface, 35...ALD film as insulating member, 36...resist pattern, 40...capacitive electrode, 40w...wide portion, 41...contact plug, 42...third light-transmitting layer, 43...contact hole Contact hole, 50...capacitive electrode, 51...contact plug, 52...relay layer, 54...interlayer insulating layer, 56...dielectric layer, 60...conductive layer, 61...contact plug, 62...relay layer, 64...interlayer insulating layer, 70...semiconductor layer, 70a...LDD region, 70b...LDD region, 70c...channel region, 70d...drain region, 70s...source region, 71...contact plug, 72...gate insulating layer, 73...contact plug, 74...gate electrode , 76...interlayer insulating layer, 80...light-shielding layer, 81...contact plug, 82...interlayer insulating layer, 90...base, 100...element substrate, 200...opposite substrate, 210...base, 220...insulating layer, 230...common electrode, 240...alignment film, 300, 300B, 300G, 300R...liquid crystal device, 1000...projector, 1001...illumination optical system, 1002...illumination device, 1003...projection optical system, 1004...projector screen, 1005...control unit.

Claims

1. A transistor and a pixel electrode provided corresponding to the transistor; a lens layer provided between the transistor and the pixel electrode; a first connection member provided to penetrate the lens layer and electrically connect the transistor and the pixel electrode; a first relay layer that electrically connects the first connection member and the pixel electrode; Equipped with The first relay layer has the same shape as the first connection member in a plan view.

2. 2. The electro-optical device according to claim 1, a first light transmitting layer provided between the pixel electrode and the first relay layer; a second connection member provided to penetrate the first light transmitting layer and electrically connect the pixel electrode and the first relay layer; Equipped with The second connection member is disposed so as to overlap the first relay layer and the first connection member in a plan view.

3. 2. The electro-optical device according to claim 1, a second light-transmitting layer is provided between the first relay layer and the lens layer; The first connection member is provided so as to penetrate the second light-transmitting layer.

4. 4. The electro-optical device according to claim 3, the lens layer and the second light transmitting layer have contact holes provided corresponding to the first connection members, An insulating member is provided between a side surface of the contact hole and the first connection member.

5. 2. The electro-optical device according to claim 1, An electro-optical device, wherein the first connection member has a first portion having a tapered shape from the pixel electrode side toward the transistor side, and a second portion having the same shape as the first relay layer in a planar view and located closer to the pixel electrode than the first portion.

6. 2. The electro-optical device according to claim 1, a second relay layer is provided on the opposite side of the first connection member to the first relay layer side; An electro-optical device, wherein, in a plan view, the second relay layer has the same shape as an outer shape of the first relay layer or is provided inside the first relay layer.

7. An electronic device comprising the electro-optical device according to claim 1 .

Citation Information

Patent Citations

  • Electro-optic device, electronic apparatus and manufacturing method for electro-optic device

    JP2021184005A