Probe card for probing electrical characteristic of inspection object, and method for manufacturing the same

Abstract

To provide a probe card which makes an interval between probe pins correspond to a fine pitch of an inspection object.SOLUTION: A probe card for probing electrical characteristics of an inspection object includes: a plurality of probe pins in which a probe tip is formed at one side so as to contact the inspection object, and which extend from the one side to the other side; a wafer which is integrally joined to the plurality of probe pins in a state that at least a part of the plurality of probe pins are inserted thereinto, and which is constituted so that the probe tip is exposed to the outside; a film which is disposed so as to overlap with the wafer at one side, and which is connected to the other side of the plurality of probe pins; and a circuit substrate which is disposed so as to overlap with the other side of the film at least in part, and which is constituted to receive a probing signal from the plurality of probe pins via the film. An interval (pitch) between the plurality of probe pins has been expanded at the other side relative to the one side.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a probe card for probing electrical characteristics of a device under test and a method for manufacturing the same. [Background technology]

[0002] 2. Description of the Related Art Electronic devices and integrated circuits (ICs), which are comprised of numerous individual circuit elements mounted on a circuit board, are being designed and manufactured to be smaller and smaller as technology advances.

[0003] An LED (Light Emitting Diode) is a semiconductor device that emits light when an electric current is applied. Micro-LED refers to an ultra-small LED with a horizontal and vertical length of 100 μm or less. Micro-LEDs can solve the problem of breakage due to bending, which is a characteristic of inorganic materials, by shrinking the LED chip to a level of several tens of micrometers (μm), and can be embodied in a stretchable material by transferring it to a flexible printed circuit board.

[0004] To commercialize such Micro-LEDs, the improvement of color uniformity must be solved along with accurate and high throughput transfer / transfer / bonding technology. Color uniformity is a characteristic determined by the Micro-LED wafer, and requires PL (photoluminescence) or EL (electroluminescence) inspection. To improve the yield rate of Micro-LEDs in the future, the development of a probe card that can handle the fine pitch of Micro-LEDs is required. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Korean Patent No. 2241059 Summary of the Invention [Problem to be solved by the invention]

[0006] Micro-LED wafers require either PL (photoluminescence) or EL (electroluminescence) testing, and currently, PL testing is mainly used because it takes a short time and is inexpensive. However, PL testing has fatal shortcomings such as low accuracy and long repair times and costs, so EL testing is essential. Currently, EL testing is done on a chip-by-chip basis, which requires a lot of time and cost, and an even bigger problem is that it cannot perform multi-PARA (e.g. 64PARA, 128PARA, 256PARA, 512PARA, etc.) testing. In order to perform multi-PARA testing, the issue of ensuring pin alignment accuracy of the probe card must be resolved as the size of Micro-LEDs becomes smaller.

[0007] An object of the present disclosure is to provide a probe card having a structure that allows the spacing between a plurality of probe pins to correspond to the fine pitch of a device under test.

[0008] However, the technical problems to be solved by this embodiment are not limited to those described above, and other technical problems may exist. [Means for solving the problem]

[0009] According to an embodiment of the present disclosure, there is provided a probe card for probing electrical characteristics of a test subject, the probe card including: a wafer having a probe tip formed on one side thereof and configured to contact the test subject, the probe tip extending from the one side to the other side; a wafer having at least a portion of the probe pins inserted therein and integrally coupled to the probe pins and configured to expose the probe tip to the outside; a film having one side disposed to overlap the wafer and connected to the other side of the probe pins; and a circuit board having at least a portion disposed to overlap the other side of the film and configured to receive a probing signal from the probe pins via the film, and a pitch between the probe pins may be wider on the other side than on the one side.

[0010] A method for manufacturing a probe card for probing electrical characteristics of a test subject according to one embodiment of the present disclosure may include the steps of etching a probe groove in a depth direction on one side of the wafer, plating the plurality of probe pins into the etched probe groove, etching a portion of the wafer so that the probe tip is exposed to the outside, and connecting the wafer to the film and the circuit board. Effect of the Invention

[0011] Contactor products manufactured by inserting pins into conventional guides guarantee a pin alignment accuracy of X / Y / Z = ±30 μm for products using POGO PINs, and even for highly accurate MEMS Blade products, guarantee a pin alignment accuracy of X / Y / Z = ±8 μm.

[0012] However, the Micro-LED chip has two pads, P-pole and N-pole, and as the size of the Micro LED chip gradually gets smaller, the size of the pads is reduced to a minimum of 4[μm] x 4[μm], and as the size of the chip gets smaller, the size of the pads should also gradually get smaller.

[0013] The guideless probe card according to an embodiment of the present disclosure is manufactured using a MEMS process, and can guarantee pin alignment accuracy of X / Y / Z = ±0.5 μm. As a result, the guideless probe card is currently the only solution for multi-PARAEL inspection of Micro LEDs.

[0014] According to one embodiment of the present disclosure, it is possible to form a spacing between the multiple probe pins to correspond to a test object having a fine pitch, it is possible to maintain the multiple probe pins at a predetermined angle or more with respect to the test object, and it is possible to adjust the force and amount of scrub of the multiple probe pins with respect to the test object. [Brief description of the drawings]

[0015] [Figure 1] 1 illustrates an exploded perspective view of a probe card according to one embodiment of the present disclosure. [Diagram 2] 1 illustrates a side view of a probe card according to one embodiment of the present disclosure. [Diagram 3] 1 illustrates a bottom view of a probe card according to one embodiment of the present disclosure. [Figure 4] 1 illustrates a top view of a probe card according to one embodiment of the present disclosure. [Diagram 5] FIG. 2 is a bottom perspective view of a wafer having a plurality of probe pins coupled thereto in accordance with an embodiment of the present disclosure. [Figure 6] FIG. 2 is a bottom view of a wafer having a plurality of probe pins coupled thereto in accordance with one embodiment of the present disclosure. [Figure 7a]FIG. 2 is a close-up view of a wafer according to one embodiment of the present disclosure. [Figure 7b] FIG. 2 is a perspective view of a wafer having a plurality of probe pins coupled thereto in accordance with an embodiment of the present disclosure. [Figure 7c] FIG. 2 is a side view of a wafer having a plurality of probe pins coupled thereto in accordance with one embodiment of the present disclosure. [Figure 7d] FIG. 2 is a perspective view of a plurality of probe pins according to one embodiment of the present disclosure. [Figure 8] FIG. 13 is a perspective view of a wafer having a plurality of probe pins coupled thereto in accordance with another embodiment of the present disclosure. [Figure 9] 1 illustrates deformations of multiple probe pins according to one embodiment of the present disclosure. [Figure 10] FIG. 2 is an enlarged view of a plurality of probe pins according to one embodiment of the present disclosure. [Figure 11] 2 is a schematic diagram of a plurality of probe pins matched to a test object according to an embodiment of the present disclosure; [Figure 12] FIG. 1 is a perspective view of a film according to one embodiment of the present disclosure. [Figure 13] FIG. 2 is a circuit diagram of a plurality of signal lines formed on a film according to an embodiment of the present disclosure. [Figure 14] FIG. 2 is a perspective view of a circuit board according to an embodiment of the present disclosure. [Figure 15] FIG. 2 is a perspective view of a first housing according to an embodiment of the present disclosure. [Figure 16] FIG. 2 is a perspective view of a second housing according to one embodiment of the present disclosure. [Figure 17] 1 is a flowchart of a method for manufacturing a probe card according to one embodiment of the present disclosure. [Figure 18a] 1 is a phase diagram corresponding to a method of manufacturing a probe card according to one embodiment of the present disclosure. [Figure 18b] 1 is a phase diagram corresponding to a method of manufacturing a probe card according to one embodiment of the present disclosure. [Figure 18c] 1 is a phase diagram corresponding to a method of manufacturing a probe card according to one embodiment of the present disclosure. [Figure 18d]1 is a phase diagram corresponding to a method of manufacturing a probe card according to one embodiment of the present disclosure. [Figure 18e] 1 is a phase diagram corresponding to a method of manufacturing a probe card according to one embodiment of the present disclosure. [Figure 19] 1 is a phase diagram corresponding to a method of manufacturing a probe card according to one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, the present application will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present application. However, the present application may be embodied in various different forms and is not limited to the embodiments described herein. In the drawings, in order to clearly explain the present application, parts that are not related to the description are omitted, and similar parts are designated by similar reference numerals throughout the specification.

[0017] Throughout this specification, when a member is said to be "on" another member, this includes not only when the member is in contact with the other member, but also when there is another member between the two members.

[0018] Throughout the specification of this application, when a part is said to "comprise" a certain element, this means that it may further include other elements, but not to the exclusion of other elements, unless specifically stated to the contrary.

[0019] The terms of degree "about," "substantially," and the like used throughout the specification of this application are used to mean a numerical value or close to a numerical value when manufacturing and material tolerances inherent in the recited meaning are given, and are used to prevent an unconscionable infringer from taking unfair advantage of the disclosure in which precise or absolute numerical values ​​are recited to aid in the understanding of this application. The terms of degree "step of" or "step of" used throughout the specification of this application do not mean "step for".

[0020] Throughout the specification of this application, the term "combination(s) of" contained in a Markush form expression means a mixture or combination of one or more selected from the group of elements set forth in the Markush form expression, and is meant to include one or more selected from the group of elements set forth above.

[0021] Throughout the specification of this application, the statement "A and / or B" means "A or B, or A and B."

[0022] Hereinafter, embodiments and examples of the present application will be described in detail with reference to the accompanying drawings, but the present application is not limited to the embodiments and examples and drawings.

[0023] FIG 1 illustrates an exploded perspective view of a probe card 100 according to one embodiment of the present disclosure. FIG 2 illustrates a side view of a probe card 100 according to one embodiment of the present disclosure. FIG 3 illustrates a bottom view of a probe card 100 according to one embodiment of the present disclosure. FIG 4 illustrates a top view of a probe card 100 according to one embodiment of the present disclosure.

[0024] 1 to 4, a probe card 100 for probing electrical characteristics of a device under test according to one embodiment may include a probe tip 125 formed on one side thereof and configured to contact the device under test, a plurality of probe pins 120 extending from one side to the other side, a wafer 110 configured to be integrally coupled to the plurality of probe pins 120 with at least a portion of the plurality of probe pins 120 inserted therein and to expose the probe tips 125 to the outside, a film 130 arranged to overlap one side of the wafer 110 and connected to the other side of the plurality of probe pins 120; and / or a circuit board 140 arranged to overlap at least a portion of the other side of the film 130 and configured to receive probing signals from the plurality of probe pins 120 via the film 130.

[0025] In one embodiment, a probe card 100 for probing electrical characteristics of a test object may further include a first housing 150 configured to support at least a portion of the wafer 110 from below, and / or a second housing 160 coupled to the first housing 150 and configured to cover the wafer 110 from above with the probe tip 125 exposed to the outside.

[0026] According to an embodiment, the plurality of probe pins 120 may be exposed to the outside while being integrally bonded to the wafer 110. In an embodiment, the plurality of probe pins 120 may have a probe tip 125 formed on one side thereof to contact an object under test exposed in whole or in part to the outside. For example, the object under test may be a micro LED chip formed to have a fine pitch.

[0027] In one embodiment, the plurality of probe pins 120 may be formed to protrude so as to be exposed to the outside even when the wafer 110 is coupled to the first housing 150 and / or the second housing 160 .

[0028] According to an embodiment, the plurality of probe pins 120 may be inclined at a specified angle when the probe card 100 is placed on a plane aligned with the ground. In an embodiment, the plurality of probe pins 120 may be inclined at a specified angle due to the bent shape of the second housing 160 of the probe card 100.

[0029] Depending on the specified angle, the force and amount of scrub of the plurality of probe pins 120 against the test object can be adjusted.

[0030] In one embodiment, the plurality of probe pins 120 may be arranged to be inclined at a specified angle to the object under test that is placed in a plane aligned with the ground. For example, the specified angle may be between 5 degrees and 10 degrees.

[0031] According to an embodiment, the wafer 110 may be etched on one side corresponding to the probe tips 125 such that the probe tips 125 included in the plurality of probe pins 120 are exposed to the outside.

[0032] According to an embodiment, the wafer 110 may be integrally coupled to the plurality of probe pins 120 with at least a portion of the plurality of probe pins 120 inserted therein. In an embodiment, the plurality of probe pins 120 may be integrally coupled to the wafer 110 with a specified pitch between each other, and may extend from an end (e.g., the other side) opposite to an end (e.g., one side) where the probe tips 125 are formed.

[0033] In one embodiment, the wafer 110, the film 130 and / or the circuit board 140 may be coupled to the first housing 150 and / or the second housing 160 between the first housing 150 and the second housing 160. In one embodiment, the wafer 110, the film 130 and / or the circuit board 140 may be fixed in position between the first housing 150 and the second housing 160.

[0034] In one embodiment, the film 130 may be positioned relative to the wafer 110 such that a plurality of signal lines formed therein correspond to a plurality of probe pins 120 coupled to the wafer 110. In one embodiment, the film 130 may be positioned relative to the circuit board 140 such that a plurality of signal lines formed therein correspond to printed lines on the circuit board 140.

[0035] According to an embodiment, the circuit board 140 may be a flexible printed circuit (FPC) made of a flexible material. In an embodiment, the circuit board 140 may extend from one side connected to the film 130 to the other side, and an end of the other side may be connected to a measuring device. In an embodiment, the circuit board 140 may be connected to the measuring device so as to be able to transmit and receive signals.

[0036] In one embodiment, the circuit board 140 may be composed of a plurality of boards 143, 145, and 147. In one embodiment, when a plurality of probe pins 120 correspond to a plurality of devices under test (chips), the circuit board 140 may be composed of a plurality of boards 143, 145, and 147.

[0037] In one embodiment, the number of channels may increase in response to a large number of test objects (chips), and the increase in the number of channels may increase the number of required substrates 143, 145, 147. In one embodiment, each of substrates 143, 145, 147 may include a specified number of channels (e.g., 120 to 200 [ch]) or less.

[0038] In one embodiment, multiple substrates 143, 145, 147 may be attached to the film 130 at a distance from each other along the extension direction, or may be stacked and arranged so that they are spaced apart from each other by a predetermined distance (e.g., 5 mm) or more in the vertical direction.

[0039] Fig. 5 is a bottom perspective view of a wafer 110 having a plurality of probe pins 120 coupled thereto according to an embodiment of the present disclosure. Fig. 6 is a bottom view of a wafer 110 having a plurality of probe pins 120 coupled thereto according to an embodiment of the present disclosure.

[0040] According to an embodiment, the plurality of probe pins 120 may be integrally coupled to the wafer 110. In an embodiment, the plurality of probe pins 120 may be integrally coupled to the wafer 110 with at least a portion of the probe pins 120 inserted into grooves formed in the wafer 110.

[0041] In one embodiment, the plurality of probe pins 120 may extend from the edge of the wafer 110 such that the probe tips 125 are positioned outside the edge of the wafer 110. In one embodiment, the plurality of probe pins 120 may extend from the edge of the wafer 110 such that the probe tips 125 formed on one side are positioned outside the edge of the wafer 110.

[0042] The multiple probe pins 120 according to one embodiment may protrude from the end of the wafer 110 in the length direction (eg, Y-axis direction) by 100 μm to 200 μm.

[0043] The multiple probe pins 120 according to an embodiment may be 5 μm to 10 μm in thickness (e.g., X-axis direction) and 5 μm to 10 μm in height (e.g., Z-axis direction).

[0044] In one embodiment, the force and amount of scrub of the multiple probe pins 120 against the test object may be adjusted depending on the protruding length and thickness of the multiple probe pins 120 from the wafer 110 and / or the thickness of the etched grooves 113 formed in the wafer 110.

[0045] In one embodiment, the plurality of probe pins 120 may be reduced in thickness (e.g., in the X-axis direction) at the probe tip 125. For example, the probe tip 125 may be gradually reduced toward the end. For example, the probe tip 125 may have a thickness of 2 μm or less at the position where it contacts the test object.

[0046] In one embodiment, the plurality of probe pins 120 may be spaced apart from each other at a first pitch so as to correspond to the test object on one side that is in contact with the test object. In one embodiment, the plurality of probe pins 120 may be spaced apart at the same first pitch, and the first pitch may correspond to the spacing of the test object. For example, the first pitch may be 20 μm or less.

[0047] For example, the plurality of probe pins 120 may have a reduced thickness at the probe tips 125 such that the spacing between the probe tips 125 is greater than the first pitch.

[0048] According to an embodiment, the plurality of probe pins 120 may be spaced apart from one another at a second pitch to correspond to the film 130 (eg, a plurality of signal lines) on the other side connected to the film 130 .

[0049] In one embodiment, the second pitch may be relatively large to accommodate an external device (e.g., a measuring device). For example, the second pitch may be relatively larger than the first pitch. For example, the first pitch may be fixed to be the same, and the second pitch may be variable to be different from each other.

[0050] According to an embodiment, the plurality of probe pins 120 may be configured such that the pitch between one side and the other side is expanded from a first pitch to a second pitch. In an embodiment, the plurality of probe pins 120 may be designed in a fan-out shape to correspond to the device under test and the external device, respectively. In an embodiment, the plurality of probe pins 120 may be customized in terms of the line width, line length, thickness, etc. of the circuit according to the characteristics of the product and / or the signal characteristics.

[0051] In one embodiment, the plurality of probe pins 120 may include probe tips 125, contact portions 123 spaced apart from each other at a first pitch, and pattern portions 127 connected to the contact portions 123 and configured such that the spacing between them is expanded from the first pitch to a second pitch.

[0052] In one embodiment, the contact portion 123 and the pattern portion 127 of the plurality of probe pins 120 may be integrally coupled to each other to transmit signals. In one embodiment, the contact portion 123 and the pattern portion 127 may be integrally manufactured or may be separately manufactured and then coupled to each other.

[0053] In one embodiment, wafer 110 may be made of silicon dioxide (silica, SiO2), a precursor of silicon.

[0054] In one embodiment, the plurality of probe pins 120 may be formed on the wafer 110 by a Micro-Electro-Mechanical Systems (MEMS) process. For example, the plurality of probe pins 120 may be made of a nickel (Ni) material.

[0055] FIG 7a is an enlarged view of a wafer 110 according to an embodiment of the present disclosure. FIG 7b is a perspective view of a wafer 110 having a plurality of probe pins 120 coupled thereto according to an embodiment of the present disclosure. FIG 7c is a side view of a wafer 110 having a plurality of probe pins 120 coupled thereto according to an embodiment of the present disclosure. FIG 7d is a perspective view of a plurality of probe pins 120 according to an embodiment of the present disclosure.

[0056] 7a to 7d, according to an embodiment, a wafer 110 may be etched in a depth direction on one surface to correspond to at least some of the plurality of probe pins 120. In an embodiment, the wafer 110 may be formed with etched grooves 113 into which at least some of the plurality of probe pins 120 are inserted along a height direction (e.g., Z-axis direction).

[0057] According to an embodiment, the plurality of probe pins 120 may be arranged such that at least a portion of the probe pins 120 is inserted into one surface of the wafer 110. In an embodiment, the plurality of probe pins 120 may be fixed to the wafer 110 in a state where the probe pins 120 are inserted into etching grooves 113 formed in the lower surface of the wafer 110.

[0058] In one embodiment of the multiple probe pins 120, a portion of the pattern portion 127 having a step formed in a height direction (e.g., Z-axis direction) that intersects with the longitudinal direction in which the contact portion 123 extends may be arranged to overlap the contact portion 123.

[0059] In one embodiment, the contact portion 123 may be inserted into an etched groove 113 formed on the underside of the wafer 110, and the pattern portion 127 may be disposed such that a step is formed downward on the underside exposed to the outside of the contact portion 123. In one embodiment, the contact portion 123 and the pattern portion 127 may be in contact with each other while at least partially overlapping each other in the extending length direction.

[0060] In one embodiment, the contact portion 123 may be disposed so as to be inserted into one surface of the wafer 110, and the pattern portion 127 may be disposed so as to protrude at least partially outward from one surface of the wafer 110. For example, the wafer 110 may be etched only in a section corresponding to the contact portion 123, and may not be etched in a section corresponding to the pattern portion 127 (one-layer pattern plating).

[0061] This makes it possible to maintain the shapes of the wafer 110 and the plurality of probe pins 120 and ensure process stability, thereby improving the yield of the probe card 100.

[0062] FIG. 8 is a perspective view of a wafer 110 having a plurality of probe pins 120 bonded thereto in accordance with another embodiment of the present disclosure.

[0063] 8, according to an embodiment, a plurality of probe pins 120 may be arranged to be inserted into one side of a wafer 110 at a contact portion 123 and a pattern portion 127. In an embodiment, the plurality of probe pins 120 may be formed such that the contact portion 123 and the pattern portion 127 are integrally formed.

[0064] According to an embodiment, the wafer 110 may have etched grooves 113 formed in a section corresponding to the contact portion 123 and a section corresponding to the pattern portion 127. In an embodiment, the plurality of probe pins 120 may be disposed in a state of being inserted into the etched grooves 113 over most of the section extending in the length direction.

[0065] The plurality of probe pins 120 according to the embodiment can be prevented from being broken or damaged due to contact with the object under test, and can be prevented from being detached from the wafer 110 due to contact with the object under test. In addition, by being integrally configured, noise during signal transmission can be minimized.

[0066] FIG. 9 illustrates a deformation 900 of a plurality of probe pins 120 according to one embodiment of the present disclosure.

[0067] Referring to FIG. 9, at least some of the plurality of probe pins 120 according to an embodiment may have a deformed portion 900 that is protruded or recessed in a designated shape.

[0068] In an embodiment, at least a portion of the plurality of probe pins 120 may have a deformed portion 900 that is protruded or recessed in a specified shape. For example, the deformed portion 900 may have a specific graphic shape. For example, the deformed portion 900 may have at least one circular shape as shown in (a). For example, the deformed portion 900 may have at least one rectangular shape as shown in (b).

[0069] In an embodiment, the deformation portions 900 may be formed differently for each of the plurality of probe pins 120 .

[0070] Depending on the shape, size, and protruding or recessed depth of the deformation portion 900, the force and amount of scrub of the plurality of probe pins 120 against the object to be tested can be adjusted.

[0071] Fig. 10 is an enlarged view of a plurality of probe pins 120 according to an embodiment of the present disclosure. Fig. 11 is a schematic diagram of a plurality of probe pins 120 matched to a test object S according to an embodiment of the present disclosure.

[0072] 10 and 11, the plurality of probe pins 120 according to an embodiment may include a plurality of tweezers P configured in a pair. In an embodiment, the plurality of probe pins 120 may include a plurality of tweezers P each consisting of two pairs.

[0073] According to an embodiment, a pair of tweezers P included in the plurality of probe pins 120 may contact and be connected to the same test object S (e.g., a micro LED chip (μLED_chip)).

[0074] According to an embodiment, the plurality of pairs of tweezers P included in the plurality of probe pins 120 may be spaced apart from each other to correspond to the interval between the test objects S or a multiple of the interval between the test objects S.

[0075] In one embodiment, as shown in (a), a plurality of pairs of tweezers P may be arranged in a one-to-one relationship corresponding to the spacing of the test objects S. For example, the spacing between the plurality of tweezers P may match the spacing between the test objects S.

[0076] In one embodiment, the tweezers P of a pair may be spaced apart to correspond to a multiple (n, where n is a natural number) of the spacing between the objects S to be inspected.

[0077] In one embodiment, as shown in (b), the multiple tweezers P may be spaced apart at a distance twice the distance between the test objects S. This allows the multiple tweezers P to skip one test object S arranged between the test objects S corresponding to the multiple tweezers P according to the separation distance. For example, the multiple tweezers P may generate a probing signal while moving only by the distance between the test objects S (e.g., 1 / 2 the distance between the multiple tweezers P).

[0078] In one embodiment, as shown in (c), the multiple tweezers P may be spaced apart at an interval three times the interval between the test objects S. This allows the multiple tweezers P to skip two test objects S arranged between the test objects S corresponding to the multiple tweezers P according to the separation interval. For example, the multiple tweezers P may generate a probing signal while moving only by the interval between the test objects S (e.g., 1 / 3 of the interval between the multiple tweezers P).

[0079] Fig. 12 is a perspective view of a film 130 according to an embodiment of the present disclosure. Fig. 13 is a circuit diagram of a plurality of signal lines formed on the film 130 according to an embodiment of the present disclosure. Fig. 14 is a perspective view of a circuit board 140 according to an embodiment of the present disclosure.

[0080] 12 to 14, a film 130 according to an embodiment may have a plurality of signal lines 1200 extending from one side to the other side.

[0081] According to an embodiment, the spacing between the signal lines 1200 may be increased from one side to the other side. In an embodiment, the signal lines 1200 may have an increased spacing between one side connected to the probe pins 120 and the other side connected to the circuit board 140.

[0082] In one embodiment, the plurality of signal lines 1200 may comprise a first part 1210 , a second part 1220 , and a third part 1230 .

[0083] In one embodiment, the spacing between the signal lines 1200 in the first part 1210 may correspond to the spacing (eg, second pitch) between the probe pins 120 on the other side.

[0084] In one embodiment, in the second part 1220, the signal lines 1200 may be spaced apart from one another in a progressively wider fashion.

[0085] In one embodiment, in the third part 1230, the spacing between the plurality of signal lines 1200 may correspond to a third pitch that is relatively expanded compared to the second pitch. The third pitch may be the spacing between the printed lines of the circuit board 140 and / or the pitch of a measuring device coupled to the circuit board 140.

[0086] In one embodiment, the spacing between the plurality of probe pins 120 may be primarily expanded. In one embodiment, the spacing between the plurality of signal lines 1200 may be secondarily expanded. In this way, the lines connecting the probing signals transmitted to the circuit board may be primarily and secondarily expanded in response to the fine pitch between the devices under test.

[0087] According to an embodiment, the circuit board 140 may extend in a length direction from one side connected to the film 130 to the other side. In an embodiment, the circuit board 140 may be a flexible printed circuit (FPC) made of a flexible material, and may have a shape that is bent in a specific direction.

[0088] In one embodiment, the film 130 and the circuit board 140 may be made of a polyimide (PI) material. In one embodiment, the film 130 and the circuit board 140 may be bonded together by bonding.

[0089] Fig. 15 is a perspective view of a first housing 150 according to one embodiment of the present disclosure. Fig. 16 is a perspective view of a second housing 160 according to one embodiment of the present disclosure.

[0090] 14 to 16, the first housing 150 and the second housing 160 according to an embodiment may be configured to cover and support the wafer 110, the film 130, and the circuit board 140. In an embodiment, the first housing 150 and the second housing 160 may be made of a metal material, for example, an aluminum material.

[0091] In one embodiment, the first housing 150 may be configured to support the wafer 110 with the probe tip 125 tilted downward. In one embodiment, the lower surface of the first housing 150 may form an inclined surface that extends at an angle such that at least a portion of the surface is supported by the bottom surface.

[0092] The first housing 150 according to an embodiment may include an elastic body 1510 arranged to contact the wafer 110 and configured to be compressed by the coupling of the first housing 150 and the second housing 160. In an embodiment, an insertion groove 155 into which the elastic body 1510 can be inserted is formed on the upper part of the first housing 150, and the elastic body 1510 may be inserted into the insertion groove 155. In an embodiment, the elastic body 1510 may pressurize the wafer 110 in a state compressed by the coupling of the first housing 150 and the second housing 160.

[0093] In one embodiment, the first housing 150 and the second housing 160 may be fixedly coupled by a bolt connection.

[0094] Figure 17 is a flow chart 1700 of a method for manufacturing a probe card 100 according to one embodiment of the present disclosure. Figures 18a-18e are state diagrams corresponding to a method for manufacturing a probe card 100 according to one embodiment of the present disclosure. Figure 19 is a state diagram corresponding to a method for manufacturing a probe card 100 according to one embodiment of the present disclosure.

[0095] 17, 18a to 18e and 19, a method of manufacturing a probe card 100 according to one embodiment may include step 1710 of etching probe grooves in a depth direction on one side of the wafer 110, step 1730 of plating the plurality of probe pins 120 into the etched probe grooves, step 1750 of etching a portion of the wafer 110 so that the probe tips 125 are exposed to the outside, and / or step 1770 of connecting the wafer 110 to the film 130 and the circuit board 140.

[0096] In one embodiment, a method for manufacturing a probe card 100 may include preparing a wafer 110, as shown in Fig. 18a. For example, the wafer 110 may be a High Resistivity Substrate (HRS) wafer 110.

[0097] In the method of manufacturing the probe card 100 according to the embodiment, in step 1710, the probe grooves may be etched in a depth direction on one side of the wafer 110. For example, the probe grooves may be etched in a depth direction on one side of the wafer 110 through inductively coupled plasma (ICP) etching.

[0098] In one embodiment, a probe groove may be etched in a depth direction on one side of wafer 110 using exposure to light. In one embodiment, a honing process may be used to etch a portion of the probe groove corresponding to probe tip 125. In one embodiment, a honing process may be used to etch the entire probe groove.

[0099] In one embodiment, a method for manufacturing the probe card 100 may include forming a SiO 2 insulating film on the wafer 110 and sputtering titanium (Ti) and copper (Cu) on the wafer 110.

[0100] 18b and 18c, the method of manufacturing the probe card 100 according to one embodiment may include plating the etched probe grooves to form a plurality of probe pins 120 in step 1730. For example, the plurality of probe pins 120 may be nickel (Ni) or a nickel alloy (Ni-X).

[0101] In one embodiment, a plurality of probe pins 120 may be plated along probe grooves etched in the wafer 110. Here, the plurality of probe pins 120 may have an increased spacing between one side and the other side.

[0102] In one embodiment, the plurality of probe pins 120 may include contact portions 123 including probe tips 125 spaced apart from one another at a first pitch, and pattern portions 127 connected to the contact portions 123 and configured to expand the spacing from the first pitch to a second pitch.

[0103] In one embodiment, the contact portion 123 is formed by plating along a probe groove etched into the wafer 110, and the pattern portion 127 may be formed by plating separately so as to overlap at least a portion of the contact portion 123 in the extending length direction and have a stepped upper portion.

[0104] In another embodiment, the contact portion 123 and the pattern portion 127 may be integrally plated along probe grooves etched in the wafer 110 .

[0105] In one embodiment, a method for manufacturing a probe card 100 may include, in step 1750, etching a portion 115 of a wafer 110 to expose probe tips 125, as shown in FIG. 18d.

[0106] In one embodiment, the wafer 110 may be etched (HRS Etch) on a portion 115 of the wafer 110 on one side where the probe tips 125 of the plurality of probe pins 120 are formed, so that the probe tips 125 are exposed to the outside. As a result, a portion of the plurality of probe pins 120 including the probe tips 125 may be exposed to the outside from the wafer 110.

[0107] A method for manufacturing a probe card 100 according to one embodiment may include bonding a wafer 110 to a film 130 and a circuit board 140 in step 1770, as shown in FIG.

[0108] In one embodiment, the wafer 110, the film 130, and the circuit board 140, to which the plurality of probe pins 120 are integrally coupled, may be integrally coupled between the first housing 150 and the second housing 160. In one embodiment, the wafer 110, the film 130, and / or the circuit board 140 may be temporarily fixed to the first housing 150 or the second housing 160 with their respective signal connection lines aligned, and then the first housing 150 and the second housing 160 may be coupled to each other. In this way, the relative positions of the wafer 110, the film 130, and the circuit board 140 may be fixed.

[0109] The above description of the present disclosure is for illustrative purposes only, and a person having ordinary skill in the art to which the present disclosure pertains can easily understand that the present disclosure can be easily modified into other specific forms without changing the technical idea or essential features of the present disclosure. Therefore, it should be understood that the above-described embodiments are illustrative in all respects and are not limiting. For example, each component described as a single type may be implemented in a distributed form, and similarly, each component described as a distributed type may be implemented in a combined form.

[0110] The scope of the present disclosure is indicated by the claims set forth below rather than by the above detailed description, and all modifications and variations derived from the meaning and scope of the claims and their equivalent concepts should be interpreted as being included within the scope of the present disclosure. [Explanation of symbols]

[0111] 100: Probe card 110: Wafer 120: Probe pin 130:Film 140: Circuit board 150: First housing 160: Second housing

Claims

1. In a probe card for probing electrical characteristics of a test object, a plurality of probe pins extending from one side to the other side, the probe pins having a probe tip formed on one side thereof for contacting the device under test; a wafer integrally coupled to the plurality of probe pins with at least some of the probe pins inserted therein, the wafer being configured to expose the probe tips to the outside; a film having one side disposed to overlap the wafer and connected to the other side of the plurality of probe pins; a circuit board disposed so that at least a portion of the circuit board overlaps the other side of the film and configured to receive probing signals from the plurality of probe pins via the film; A probe card, wherein a pitch between the plurality of probe pins is expanded on the one side relative to the other side.

2. The probe card of claim 1 , wherein the plurality of probe pins extend from the edge of the wafer such that the probe tips are positioned outboard of the edge of the wafer.

3. 2. The probe card of claim 1, wherein the wafer is etched on one side corresponding to the probe tips such that the probe tips included in the plurality of probe pins are exposed to the outside.

4. the wafer is etched in a depth direction on one surface to correspond to at least a portion of the plurality of probe pins; The probe card according to claim 1 , wherein the plurality of probe pins are arranged with at least a portion of the probe pins inserted into the one surface of the wafer.

5. 2. The probe card of claim 1, wherein the plurality of probe pins are arranged spaced apart from each other at a first pitch on the one side to correspond to the test object and at a second pitch on the other side to correspond to the film, and the spacing is expanded from the first pitch to the second pitch between the one side and the other side.

6. The probe card of claim 5, wherein the plurality of probe pins include contact portions that include the probe tips and are spaced apart from each other at an interval of the first pitch, and a pattern portion that is connected to the contact portions and configured such that an interval between the contact portions is expanded from the first pitch to the second pitch.

7. The probe card according to claim 6 , wherein the pattern portion is arranged such that a part of the pattern portion having a step formed in a height direction intersecting a longitudinal direction of the contact portion overlaps with the contact portion.

8. the contact portion is disposed on one surface of the wafer so as to be inserted therein; The probe card according to claim 6 , wherein the pattern portion is disposed so that at least a portion of the pattern portion protrudes outward from the one surface of the wafer.

9. The plurality of probe pins include a plurality of tweezers arranged in pairs, The probe card of claim 1 , wherein the plurality of tweezers are spaced apart from one another to correspond to an interval between the devices under test or a multiple of the interval between the devices under test.

10. The probe card of claim 1 , wherein at least some of the plurality of probe pins are formed with deformed portions that are protruding or recessed in a designated shape.

11. The film has a plurality of signal lines extending from the one side to the other side, The probe card of claim 1 , wherein the spacing between the signal lines is increased on the one side relative to the other side.

12. a first housing configured to support at least a portion of the wafer thereunder; The probe card of claim 1 , further comprising: a second housing coupled to the first housing and configured to cover the wafer above with the probe tips exposed to the exterior.

13. The probe card of claim 12 , wherein the first housing is provided with an elastic body arranged to contact the wafer and configured to be compressed by coupling the first housing and the second housing.

14. The probe card of claim 12 , wherein the first housing is configured to support the wafer with the probe tips tilted downward.

15. 2. The method of manufacturing a probe card according to claim 1, etching a probe groove in a depth direction on one side of the wafer; forming the plurality of probe pins in the etched probe grooves by plating; Etching a portion of the wafer so that the probe tip is exposed; and bonding the wafer to the film and to the circuit board.

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