Electronic component and manufacturing method thereof

Abstract

To provide a coil pattern having a sufficient cross-sectional area and improved reliability in an electronic component in which a coil portion having an insulating layer and a coil pattern is embedded in an element body.SOLUTION: An electronic component 100 includes an element body 110 and a coil portion C embedded in the element body 110 and having a structure in which insulating layers 50 to 54 and coil patterns 11, 21, 31, and 41 are alternately stacked. The coil pattern 11 has a larger surface roughness on a side surface 11S along the circumferential direction than on the top surface 11T that constitutes one end face in the stacking direction.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present disclosure relates to electronic components and methods for manufacturing the same. [Background technology]

[0002] Patent Document 1 discloses an electronic component in which a coil part having a structure in which multiple insulating layers and multiple coil patterns are alternately laminated is embedded in an element body. In Patent Document 1, the surface of the coil pattern is roughened by carrying out a surface roughening treatment. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2022-168375 A Summary of the Invention [Problem to be solved by the invention]

[0004] This disclosure describes a technique for providing a coil pattern having a sufficient cross-sectional area and improved reliability in an electronic component in which a coil portion having an insulating layer and a coil pattern is embedded in an element body. [Means for solving the problem]

[0005] An electronic component according to one aspect of the present disclosure comprises a base body and a coil portion embedded in the base body and having a structure in which a plurality of insulating layers and a plurality of coil patterns are alternately stacked, the plurality of coil patterns including a first coil pattern, the first coil pattern having a side surface along a circumferential direction that has a greater surface roughness than a top surface that constitutes one end face in the stacking direction. Effect of the Invention

[0006] According to the present disclosure, in an electronic component in which a coil portion having an insulating layer and a coil pattern is embedded in an element body, a coil pattern having a sufficient cross-sectional area and improved reliability is provided. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a schematic perspective view for explaining the structure of an electronic component 100 according to an embodiment of the technology disclosed herein. [Diagram 2] FIG. 2 is a schematic cross-sectional view of the electronic component 100. [Diagram 3] FIG. 3 is a schematic plan view for explaining the structure of the conductor layer 10. As shown in FIG. [Figure 4] FIG. 4 is a schematic plan view for explaining the structure of the conductor layer 20. As shown in FIG. [Diagram 5] FIG. 5 is a schematic plan view for explaining the structure of the conductor layer 30. As shown in FIG. [Figure 6] FIG. 6 is a schematic plan view for illustrating the structure of the conductor layer 40. As shown in FIG. [Figure 7] FIG. 7 is a schematic cross-sectional view showing a first example of a cross section taken along line BB shown in FIG. [Figure 8] FIG. 8 is a schematic cross-sectional view showing a second example of a cross section taken along line BB shown in FIG. [Figure 9] FIG. 9 is a process diagram for explaining a method for manufacturing electronic component 100. As shown in FIG. [Figure 10] FIG. 10 is a process diagram for explaining a method for manufacturing the electronic component 100. [Figure 11] FIG. 11 is a process diagram for explaining a method for manufacturing the electronic component 100. [Figure 12] FIG. 12 is a process diagram for explaining a method for manufacturing the electronic component 100. [Figure 13] FIG. 13 is a process diagram for explaining a method for manufacturing the electronic component 100. [Figure 14] FIG. 14 is a process diagram for explaining a method for manufacturing the electronic component 100. [Figure 15]FIG. 15 is a process diagram for explaining a method for manufacturing electronic component 100. [Figure 16] FIG. 16 is a process diagram for explaining a method for manufacturing electronic component 100. [Figure 17] FIG. 17 is a process diagram for explaining a method for manufacturing electronic component 100. [Figure 18] FIG. 18 is a process diagram for explaining a method for manufacturing electronic component 100. [Figure 19] FIG. 19 is a process diagram for explaining a method for manufacturing electronic component 100. As shown in FIG. [Figure 20] FIG. 20 is a process diagram for explaining a method for manufacturing electronic component 100. [Figure 21] FIG. 21 is a process diagram for explaining a method for manufacturing electronic component 100. As shown in FIG. [Figure 22] FIG. 22 is a process diagram for explaining a method for manufacturing electronic component 100. [Figure 23] FIG. 23 is a process diagram for explaining a method for manufacturing electronic component 100. [Figure 24] FIG. 24 is a schematic cross-sectional view showing an example of the shape of the resist pattern 73. As shown in FIG. [Diagram 25] FIG. 25 is a schematic cross-sectional view showing an example of the shape of the resist pattern 73 after the dry desmear treatment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Hereinafter, embodiments of the technology according to the present disclosure will be described in detail with reference to the accompanying drawings.

[0009] FIG. 1 is a schematic perspective view for explaining the structure of an electronic component 100 according to an embodiment of the technology disclosed herein.

[0010] The electronic component 100 illustrated in FIG. 1 is a surface-mountable chip-shaped coil component, and includes an element body 110 and a pair of terminal electrodes 121 and 122. The element body 110 may be made of a composite magnetic member including a metal magnetic filler made of a magnetic material such as iron (Fe) or permalloy, and a resin binder. The element body 110 has a mounting surface 111 that constitutes an XZ plane, and side surfaces 112 and 113 that constitute a YZ plane and are located opposite each other. The mounting surface 111 and the side surfaces 112 and 113 may be orthogonal to each other, or may have a certain angle range from the orthogonal angle (for example, a range of manufacturing error based on the orthogonal angle). The mounting surface 111 is a surface that faces a circuit board when mounted. The terminal electrode 121 is exposed from the mounting surface 111 and the side surface 112. The terminal electrode 122 is exposed from the mounting surface 111 and the side surface 113. An insulating layer 130 is present between the element body 110 and the terminal electrodes 121 and 122 .

[0011] FIG. 2 is a schematic cross-sectional view of the electronic component 100.

[0012] As shown in FIG. 2, the coil portion C is embedded in the element body 110. In the example shown in FIG. 2, the coil portion C has a structure in which insulating layers 50-54 and conductor layers 10, 20, 30, 40 are alternately laminated. The conductor layers 10, 20, 30, 40 are laminated in the Z direction. The conductor layers 10, 20, 30, 40 may be made of a good conductor such as copper (Cu). The insulating layers 50-54 correspond to the insulating layer 130 shown in FIG. 1. The insulating layers 50-54 may be made of a composite insulating material containing an inorganic filler such as silica and a resin binder. Of the insulating layers 50-54, at least the insulating layers 51-53 are made of a nonmagnetic material. The insulating layer 50 located at the bottom layer and the insulating layer 54 located at the top layer may be magnetic.

[0013] 3 to 6 are schematic plan views for explaining the structures of the conductor layers 10, 20, 30, and 40. Line AA shown in FIGS. 3 to 6 indicates the cross-sectional position of FIG.

[0014] The conductor layer 10 is provided on the surface of the insulating layer 50. In the case of the example shown in FIG. 3, the conductor pattern located on the conductor layer 10 includes a coil pattern 11 and terminal patterns 12 and 13. The coil pattern 11 is a conductor pattern that winds around for about two turns, and its outer peripheral end is connected to the terminal pattern 12. The terminal pattern 13 is provided independently of the coil pattern 11 and the terminal pattern 12. An element body 110 is disposed in an inner diameter region surrounded by the coil pattern 11 in a plan view seen from the Z direction, and in an outer region located outside the coil pattern 11 in a plan view seen from the Z direction. An insulating layer 51 is provided between the conductor pattern located on the conductor layer 10 and the element body 110, between the turns of the coil pattern 11, and between the coil pattern 11 and the terminal patterns 12 and 13.

[0015] A conductor layer 20 is provided on the surface of the insulating layer 51. In the example shown in FIG. 4, the conductor pattern located on the conductor layer 20 includes a coil pattern 21 and terminal patterns 22 and 23. The coil pattern 21 is a conductor pattern that winds around for about two turns, and its inner peripheral end is connected to the inner peripheral end of the coil pattern 11 through a via conductor 61 that penetrates the insulating layer 51. The terminal patterns 22 and 23 are provided independently of the coil pattern 21. The terminal patterns 22 and 23 are connected to the terminal patterns 12 and 13, respectively, through via conductors that penetrate the insulating layer 51. An element body 110 is disposed in an inner diameter region surrounded by the coil pattern 21 in a plan view seen from the Z direction and in an outer region located outside the coil pattern 21 in a plan view seen from the Z direction. An insulating layer 52 is provided between the conductor pattern located on the conductor layer 20 and the element body 110, between the turns of the coil pattern 21, and between the coil pattern 21 and the terminal patterns 22 and 23.

[0016] A conductor layer 30 is provided on the surface of the insulating layer 52. In the example shown in FIG. 5, the conductor pattern located on the conductor layer 30 includes a coil pattern 31 and terminal patterns 32 and 33. The coil pattern 31 is a conductor pattern that winds around for about two turns, and its outer peripheral end is connected to the outer peripheral end of the coil pattern 21 through a via conductor 62 that penetrates the insulating layer 52. The terminal patterns 32 and 33 are provided independently of the coil pattern 31. The terminal patterns 32 and 33 are connected to the terminal patterns 22 and 23, respectively, through via conductors that penetrate the insulating layer 52. An element body 110 is disposed in an inner diameter region surrounded by the coil pattern 31 in a plan view seen from the Z direction and in an outer region located outside the coil pattern 31 in a plan view seen from the Z direction. An insulating layer 53 is provided between the conductor pattern located on the conductor layer 30 and the element body 110, between the turns of the coil pattern 31, and between the coil pattern 31 and the terminal patterns 32 and 33.

[0017] A conductor layer 40 is provided on the surface of the insulating layer 53. In the example shown in FIG. 6, the conductor patterns located on the conductor layer 40 include a coil pattern 41 and terminal patterns 42, 43. The coil pattern 41 is a conductor pattern that winds around for about 0.5 turns, and one end of the coil pattern 41 is connected to the inner peripheral end of the coil pattern 31 through a via conductor 63 that penetrates the insulating layer 53. The other end of the coil pattern 41 is connected to the terminal pattern 43. The terminal pattern 42 is provided independently of the coil pattern 41 and the terminal pattern 43. The terminal patterns 42, 43 are connected to the terminal patterns 32, 33, respectively, through via conductors that penetrate the insulating layer 53. An element body 110 is disposed in an area of ​​the conductor layer 40 where no conductor patterns exist. An insulating layer 54 is provided between the conductor patterns located on the conductor layer 40 and the element body 110.

[0018] 1 is formed by the surfaces of the terminal patterns 12, 22, 32, 42 exposed from the element body 110, or by a surface treatment film formed on the surfaces. The terminal electrode 122 shown in Fig. 1 is formed by the surfaces of the terminal patterns 13, 23, 33, 43 exposed from the element body 110, or by a surface treatment film formed on the surfaces.

[0019] Fig. 7 is a schematic cross-sectional view showing a first example of a cross section taken along line BB shown in Fig. 3. Line BB shown in Fig. 3 is aligned along the radial direction of the coil pattern 11.

[0020] The cross section shown in FIG. 7 shows an upper surface 11T, a lower surface 11B, and a side surface 11S of the coil pattern 11 located on the conductor layer 10. The upper surface 11T constitutes one end surface in the stacking direction (Z direction). The lower surface 11B constitutes the other end surface in the stacking direction (Z direction). Both the upper surface 11T and the lower surface 11B intersect with the stacking direction. The side surface 11S is a surface that connects the upper surface 11T and the lower surface 11B, and extends along the circumferential direction of the coil pattern 11. The side surface 11S intersects with the radial direction.

[0021] The aspect ratio of the coil pattern 11 is defined by the ratio (=H11 / W11) of the height H11 of the coil pattern 11 in the Z direction to the width W11 of the coil pattern 11 in the radial direction. The height H11 is the distance in the Z direction between the upper surface 11T and the lower surface 11B. The width W11 is the distance between a pair of side surfaces 11S, that is, the distance in the radial direction between the inner side surface located on the inner periphery side and the outer side surface located on the outer periphery side in each turn. When the width W11 is not constant in the height direction, the width W11 may be defined by the width of the thinnest part, the width at the lower surface 11B, or the average value.

[0022] The aspect ratio of the insulating layer 51 is defined by the ratio (=H11 / W51) of the height H11 of the coil pattern 11 in the Z direction to the width W51 in the radial direction of the insulating layer 51 located between the turns of the coil pattern 11. The width W51 is the radial distance between the outer side surface of the turn located on the inner periphery of the coil pattern 11 and the inner side surface of the turn located on the outer periphery of the coil pattern 11. When the width W51 is not constant in the height direction, the width W51 may be defined by the width of the thinnest part, the width at the bottom in contact with the insulating layer 50, or an average value.

[0023] The aspect ratio of the insulating layer 51 (=H11 / W51) may be 2 or more. If the aspect ratio of the insulating layer 51 is 2 or more, the space between the turns of the coil pattern 11 is reduced while the height H11 of the coil pattern 11 is sufficiently ensured, and therefore it is possible to ensure a sufficient cross-sectional area of ​​the coil pattern 11. If the aspect ratio of the insulating layer 51 is made larger, it is possible to further reduce the space between the turns of the coil pattern 11, but in consideration of the difficulty of manufacturing, it is more realistic to set the aspect ratio to 6 or less.

[0024] Moreover, the surface roughness Ra (=Ra1) of the side surface 11S of the coil pattern 11 is larger than the surface roughness Ra (=Ra2) of the top surface 11T of the coil pattern 11 and the surface roughness Ra (=Ra3) of the bottom surface 11B of the coil pattern 11. The surface roughness Ra1 may be 0.6 μm or more. The surface roughness Ra2 and Ra3 may be 0.2 μm or more. The surface roughness Ra1 may be twice or more the surface roughness Ra2. The surface roughness Ra2 may be larger or smaller than the surface roughness Ra3. If the surface roughness Ra3 of the bottom surface 11B is small, the possibility of residues or the like being generated between the coil patterns can be reduced in the manufacturing process described later (such as removing the seed layer illustrated in FIG. 15). From this viewpoint, the coil pattern 11 may be formed so that the relationship of surface roughness is established: Ra1 (side surface 11S)>Ra2 (top surface 11T)>Ra3 (bottom surface 11B).

[0025] When the surface of the coil pattern 11 has such surface characteristics (shapes of the upper surface, lower surface, and side surface), the adhesion between the side surface 11S of the coil pattern 11 and the insulating layer 51 is enhanced. Moreover, since the upper surface 11T and the lower surface 11B of the coil pattern 11 have smaller surface roughness than the side surface 11S, it is possible to suppress the deterioration of high frequency characteristics due to the skin effect. Furthermore, when the insulating layer 51 is made of a composite insulating material containing an inorganic filler such as silica and a resin binder, a part of the inorganic filler may penetrate into the rough surface shape of the side surface 11S of the coil pattern 11. More specifically, a part of the inorganic filler may be located within a concave portion in the fine unevenness of the rough surface formed on the side surface 11S of the coil pattern 11. This allows the content ratio of the inorganic filler in this portion to be reduced significantly even if the width W51 of the insulating layer 51 is thin (i.e., even if the aspect ratio of the insulating layer 51 is large), making it possible to reduce the difference in thermal expansion coefficient between the portion covering the side surface 11S of the coil pattern 11 and the portion covering the top surface 11T of the coil pattern 11. By forming the coil pattern 11 in this manner, an electronic component 100 with improved reliability can be obtained.

[0026] FIG. 8 is a schematic cross-sectional view showing a second example of a cross section taken along line BB shown in FIG.

[0027] 8, the width of the cross section of the coil pattern 11 is narrowest in an intermediate region 11M located between the upper surface 11T and the lower surface 11B. In other words, if the width of the coil pattern 11 on the upper surface 11T is W111, the width of the coil pattern 11 on the lower surface 11B is W112, and the width of the coil pattern 11 on the intermediate region 11M is W113, W111>W113, and W112>W113 The intermediate region 11M may be located at the middle position between the upper surface 11T and the lower surface 11B in the Z direction, or may be located at a position some distance up or down from the middle position. For example, if the height position of the lower surface 11B of the coil pattern 11 is 0% and the height position of the upper surface 11T of the coil pattern 11 is 100%, the intermediate region 11M may be located at a height position in the range of 40% to 60%, or may be located at a height position in the range of 30% to 70%.

[0028] When the coil pattern 11 has such a cross-sectional shape, the area of ​​the side surface 11S is larger than when the side surface 11S is nearly vertical, and therefore the adhesion between the coil pattern 11 and the insulating layer 51 is further improved. Moreover, the areas of the highly flat upper surface 11T and lower surface 11B are sufficiently secured, and therefore high frequency characteristics are maintained. Furthermore, when the coil pattern 11 has such a cross-sectional shape, the width W51 may be defined by the width of the insulating layer 51 at the bottom portion in contact with the insulating layer 50.

[0029] The surface characteristics and cross-sectional shape of the coil pattern 11 have been described above, but the coil patterns 21, 31, and 41 located in upper layers may also have the same surface characteristics and cross-sectional shape as the coil pattern 11, or a part or all of the coil patterns 21, 31, and 41 may have surface characteristics or cross-sectional shapes different from those of the coil pattern 11. In addition, the aspect ratios of the insulating layers 52 to 54 may be the same as the aspect ratio of the insulating layer 51, or may be different.

[0030] As an example, the coil patterns 21 and 31 may have surface characteristics and cross-sectional shapes that are substantially the same as those of the coil pattern 11, while the aspect ratio of the coil pattern 41 may be smaller than that of the coil pattern 11. Such a configuration can be realized, for example, by making the height of the coil pattern 41 in the Z direction equal to the height of the coil patterns 11, 21, and 31 in the Z direction, and making the pattern width of the coil pattern 41 larger than the pattern width of the coil patterns 11, 21, and 31. This makes it possible to further reduce the resistance value of the coil pattern 41, which has a small number of turns and a generous layout. In this example, the coil pattern 41 may have the same surface roughness on the side surface and the top surface. In other words, the surface roughness of the side surface of the coil pattern 41 may be smaller than that of the coil pattern 11.

[0031] As another example, the aspect ratio of the insulating layer 54 may be lower than that of the insulating layer 51. When the coil pattern 41 embedded in the insulating layer 54 has one turn or less as in the example shown in Fig. 6, since it is not necessary to embed the insulating layer 54 between narrow turns, the width of the insulating layer 54 may be made wider than the width of the insulating layer 51, thereby decreasing the aspect ratio of the insulating layer 54. In addition, although the flatness of the insulating layer 53, which is the base of the coil pattern 41, is lower than that of the underlying insulating layers 50 to 52, the process difficulty is eased by decreasing the aspect ratio.

[0032] Next, a method for manufacturing the electronic component 100 according to this embodiment will be described.

[0033] 9 to 23 are process diagrams illustrating a method for manufacturing electronic component 100 according to this embodiment.

[0034] First, as shown in FIG. 9, a member having a structure in which an insulating layer 71 and a copper foil 72 are laminated on the surface of a support base material 70 is prepared. The copper foil 72 has a region 72A in which the thickness is partially large. The region 72A is formed at a position overlapping with the sacrificial patterns 14, 24, 34, and 44 described later. Next, as shown in FIG. 10, an insulating layer 50 is formed on the surface of the copper foil 72. The surface of the insulating layer 50 is almost flat. Therefore, the thickness of the insulating layer 50 is locally thin in the portion covering the region 72A. Next, as shown in FIG. 11, a seed layer 10S is formed on the surface of the insulating layer 50 by performing electroless plating. Next, as shown in FIG. 12, a resist pattern 73 is formed on the surface of the seed layer 10S. The resist pattern 73 can be formed by forming a photosensitive material on the entire surface, and then performing exposure and development. The resist pattern 73 is a negative pattern of the conductor layer 10.

[0035] FIG. 24 is a schematic cross-sectional view showing an example of the shape of the resist pattern 73. In the example shown in FIG. 24, the resist pattern 73 has an inverse tapered shape, and the width becomes narrower as the height position becomes lower. Therefore, the width W732 at the lower surface 73B of the resist pattern 73 is narrower than the width W731 at the upper surface 73T of the resist pattern 73. Such a shape can be obtained, for example, by using a negative photosensitive material as the material of the resist pattern 73. Here, in order to prevent the resist pattern 73 from peeling or collapsing in the development process, etc., it is necessary to ensure a certain degree of the width W732 at the lower surface 73B of the resist pattern 73 relative to the height H73 of the resist pattern 73. The height H73 of the resist pattern 73 is set to be sufficiently larger than the design thickness of the conductor pattern constituting the conductor layer 10. The aspect ratio of the resist pattern 73 is defined by the ratio (=H73 / W732) of the height H73 of the resist pattern 73 in the Z direction to the width W732 at the lower surface 73B of the resist pattern 73.

[0036] Next, as shown in FIG. 13, by performing dry desmearing treatment, the residue of the resist pattern 73 is removed. At this time, by performing dry desmearing treatment under conditions exceeding the conditions necessary for removing the residue, the surface of the resist pattern 73 is trimmed. For example, by continuing the dry desmearing treatment for a time greatly exceeding the time necessary for removing the residue, the surface of the resist pattern 73 is trimmed.

[0037] FIG. 25 is a schematic cross-sectional view showing an example of the shape of the resist pattern 73 after dry desmearing treatment. When dry desmearing treatment is performed under conditions exceeding the conditions necessary for removing the residue, the surface of the resist pattern 73 is deformed by trimming, and the side surface 73S and the upper surface 73T of the resist pattern 73 are roughened. In the example shown in FIG. 25, dry desmearing treatment is performed under conditions where the trimming amount increases as the height position increases. As a result, the decrease amount of the width W731 of the upper surface 73T is larger than the decrease amount of the width W732 of the lower surface 73B. At this point, the development of the resist pattern 73 has been completed, and since the resist pattern 73 is in a cured state, even if the width W732 of the lower surface 73B decreases to some extent, peeling or collapse of the resist pattern 73 is unlikely to occur. Further, as a result of the trimming amount increasing as the height position increases, the width in the cross-section of the resist pattern 73 is the widest in the intermediate region 73M located between the upper surface 73T and the lower surface 73B. That is, when the width in the intermediate region 73M of the resist pattern 73 is W733, W731 < W733, and W732 < W733 is satisfied.

[0038] As a result of such trimming reducing the width W732 of the lower surface 73B, the aspect ratio of the resist pattern 73 after trimming becomes larger than the aspect ratio before trimming. In other words, it is possible to form a resist pattern 73 with a high aspect ratio while preventing peeling or collapse. The aspect ratio of the resist pattern 73 is defined by the ratio (=H73 / W732) of the height H73 of the resist pattern 73 to the width W732 of the lower surface 73B of the resist pattern 73. The aspect ratio of the resist pattern 73 after trimming is larger than the aspect ratio of the insulating layer 51 described above.

[0039] Next, as shown in FIG. 14, electrolytic plating is performed using the seed layer 10S as a power supply to form a conductor layer 10. The seed layer 10S is also a part of the conductor layer 10. At this point, the conductor layer 10 includes a coil pattern 11, terminal patterns 12 and 13, and a sacrificial pattern 14. The sacrificial pattern 14 is provided in an inner diameter region surrounded by the coil pattern 11 and an outer region located outside the coil pattern 11. In the cross section shown in FIG. 14, a part of the sacrificial pattern 14 provided in the inner diameter region surrounded by the coil pattern 11 is shown. The height of the conductor layer 10 is sufficiently lower than the height of the resist pattern 73. As a result, even if the height of the conductor layer 10 varies depending on the planar position, the upper surface 73T of the resist pattern 73 is not covered by the conductor layer 10.

[0040] Next, as shown in FIG. 15, the resist pattern 73 and the seed layer 10S in the portion covered by the resist pattern 73 are removed. As a result, the coil pattern 11, the terminal pattern 12, the terminal pattern 13, and the sacrificial pattern 14 are electrically separated. In addition, in the process shown in FIG. 14, since the height of the conductor layer 10 does not reach the upper surface 73T of the resist pattern 73, the resist pattern 73 can be easily removed. Furthermore, since the side surface 73S of the resist pattern 73 is roughened, the surface characteristics are transferred to the side surface 11S of the coil pattern 11. As a result, the surface roughness Ra1 of the side surface 11S of the coil pattern 11 is increased more than the surface roughness Ra2 of the upper surface 11T. In this manner, in this embodiment, since the surface roughness Ra1 of the side surface 11S of the coil pattern 11 is increased at the time of performing electrolytic plating, an etching process for increasing the surface roughness Ra1 is unnecessary or can be suppressed to a minimum. As a result, it is possible to suppress the reduction in the cross-sectional area of ​​the coil pattern 11 due to the etching process.

[0041] Next, as shown in Fig. 16, an insulating layer 51 is formed to cover the conductor layer 10. The insulating layer 51 is formed not only on the upper surface of the conductor layer 10, but also between the turns of the coil pattern 11, between the coil pattern 11 and the terminal patterns 12, 13 and the sacrificial pattern 14, and between the terminal patterns 12, 13 and the sacrificial pattern 14. This results in the conductor layer 10 being embedded in the insulating layer 51. As described above, the side surface 11S of the coil pattern 11 has high surface roughness, so that the adhesion between the coil pattern 11 and the insulating layer 51 is improved. The same is true for the terminal patterns 12, 13, and the adhesion between the coil pattern 11 and the insulating layer 51 is also improved.

[0042] 17, openings 51A to 51D are formed in the insulating layer 51. Opening 51A is formed at a position where the inner circumferential end of coil pattern 11 is exposed. Opening 51B is formed at a position where the terminal pattern 12 is exposed. Opening 51C is formed at a position where the terminal pattern 13 is exposed. Opening 51D is formed at a position where the sacrificial pattern 14 is exposed.

[0043] Next, by repeating the steps described with reference to FIGS. 11 to 17, the conductor layer 20, the insulating layer 52, the conductor layer 30, the insulating layer 53, the conductor layer 40, and the insulating layer 54 are formed in this order as shown in FIG. 18. The conductor layer 20 includes a coil pattern 21, terminal patterns 22 and 23, and a sacrificial pattern 24. The conductor layer 30 includes a coil pattern 31, terminal patterns 32 and 33, and a sacrificial pattern 34. The conductor layer 40 includes a coil pattern 41, terminal patterns 42 and 43, and a sacrificial pattern 44. It is not necessary to perform the trimming process shown in FIG. 13 on all the resist patterns used to form each conductor layer. For example, the trimming process may be performed on the resist patterns used to form the conductor layers 20 and 30, and the trimming process may be omitted on the resist pattern used to form the conductor layer 40. When the trimming process is omitted on the resist pattern used to form the conductor layer 40, the surface roughness of the side surface of the coil pattern 41 becomes smaller than the surface roughness of the side surface of the coil pattern 11.

[0044] Next, as shown in FIG. 19, the sacrificial patterns 14, 24, 34, and 44 are removed by etching using an acid or the like. Next, as shown in FIG. 20, the element body 110 is formed in the space formed by removing the sacrificial patterns 14, 24, 34, and 44, and above the insulating layer 54. Next, as shown in FIG. 21, the support base 70, the insulating layer 71, and the copper foil 72 are removed. Next, as shown in FIG. 22, the thickness of the insulating layer 50 is reduced overall by etching. As a result, the parts of the insulating layer 50 that are locally thin in thickness are removed, and the element body 110 is exposed in these parts. Then, as shown in FIG. 23, after forming the remaining parts of the element body 110 that cover the insulating layer 50, the element body 110 is diced into individual pieces so that the terminal patterns 12, 13, 22, 23, 32, 33, 42, and 43 are exposed, and the electronic component 100 shown in FIG. 1 and FIG. 2 is completed.

[0045] In this manner, in this embodiment, after the resist pattern 73 is formed, the dry desmear process is performed under conditions exceeding those necessary for removing the residue, which makes it possible to increase the aspect ratio of the resist pattern 73. As a result, even if the height of the conductor layer 10 varies, the height of the conductor layer 10 does not exceed the upper surface 73T of the resist pattern 73, which makes it easy to peel off the resist pattern 73. Moreover, the cross-sectional area of ​​the coil pattern 11 also increases, which makes it possible to reduce the resistance value of the coil pattern 11.

[0046] The above describes embodiments of the technology related to the present disclosure. However, the technology related to the present disclosure is not limited to the above embodiments, and various modifications are possible without departing from the spirit of the technology, and it goes without saying that these modifications are also included within the scope of the technology related to the present disclosure.

[0047] For example, the coil section C included in the electronic component 100 has a structure in which four conductor layers 10, 20, 30, and 40 are stacked, but the number of conductor layers included in the coil section C is not particularly limited. Note that the electronic component 100 described above is an example of a surface mount type component, but the technology according to the present disclosure is not limited thereto. The technology according to the present disclosure may be applied to an embedded type component that is embedded in a multilayer wiring board, for example.

[0048] The technology according to the present disclosure includes the following configuration examples, but is not limited to these.

[0049] An electronic component according to one aspect of the present disclosure includes an element body, and a coil portion embedded in the element body and having a structure in which a plurality of insulating layers and a plurality of coil patterns are alternately stacked, the plurality of coil patterns including a first coil pattern, the first coil pattern having a side surface along a circumferential direction that has a greater surface roughness than a top surface that constitutes one end surface in the stacking direction, thereby improving adhesion between the first coil pattern and the insulating layer and suppressing degradation of high frequency characteristics due to the skin effect.

[0050] In the above electronic component, the multiple insulating layers may include a first insulating layer in contact with a side surface of the first coil pattern, and the aspect ratio of a cross section along a radial direction of the first insulating layer may be equal to or greater than 2. This makes it possible to increase the cross-sectional area of ​​the first coil pattern.

[0051] In the electronic component, the first insulating layer is made of a composite insulating material containing an inorganic filler and a resin binder, and a part of the inorganic filler may be located in the recess in the side surface, thereby suppressing the variation in thermal expansion coefficient depending on the position in the first insulating layer.

[0052] In the electronic component, the surface roughness of the side surface may be at least twice as large as the surface roughness of the top surface, which further improves the adhesion between the first coil pattern and the insulating layer.

[0053] In the electronic component, the cross section of the first coil pattern may have a shape that is narrowest in an intermediate region between the upper surface and the lower surface that constitutes the other end surface in the stacking direction, thereby making it possible to further increase the adhesion between the first coil pattern and the insulating layer while maintaining high frequency characteristics.

[0054] In the electronic component, the multiple coil patterns may further include a second coil pattern, and the aspect ratio of the radial cross section of the second coil pattern may be smaller than the aspect ratio of the radial cross section of the first coil pattern, thereby making it possible to further increase the cross-sectional area of ​​the second coil pattern.

[0055] In the above electronic component, the second coil pattern may be located on the upper surface side of the first coil pattern, which reduces the process difficulty when forming the second coil pattern located on the upper layer.

[0056] In the electronic component, the second coil pattern may have a smaller surface roughness of the side surface along the circumferential direction than the side surface roughness of the first coil pattern, thereby reducing the number of steps required to form the second coil pattern.

[0057] A method for manufacturing an electronic component according to one aspect of the present disclosure includes a first step of forming a resist pattern having a first aspect ratio on a surface of a seed layer, a second step of changing the aspect ratio of the resist pattern from the first value to a second value larger than the first value by trimming the resist pattern, a third step of forming a coil pattern by performing electrolytic plating using the seed layer as a power supply, a fourth step of removing the resist pattern and the seed layer covered with the resist pattern, and a fifth step of forming an insulating layer covering the coil pattern. This makes it possible to form a resist pattern with a large aspect ratio while preventing peeling, collapse, etc.

[0058] In the above-mentioned method for manufacturing an electronic component, the resist pattern may have a lower surface in contact with the seed layer and an upper surface located opposite to the lower surface, and in the second step, trimming may be performed under conditions in which the cross section of the resist pattern is widest in an intermediate region located between the lower surface and the upper surface. This makes it possible to increase the contact area between the coil pattern and the insulating layer while ensuring the areas of the upper and lower surfaces of the coil pattern. [Explanation of symbols]

[0059] 10,20,30,40 Conductor layers 10S seed layer 11,21,31,41 coil pattern 11B Bottom side 11M intermediate area 11S side 11T top surface 12,13,22,23,32,33,42,43 Terminal pattern 14,24,34,44 Sacrifice Pattern 50~54 Insulation layer 51A~51D opening 61~63 Via conductor 70 Supporting base material 71 Insulating layer 72 Copper foil 72A area 73 Resist Pattern 73B Bottom side 73M intermediate area 73S side 73T top surface 100 Electronic Components 110 Base 111 Mounting surface 112,113 Side 121,122 terminal electrode 130 Insulating layer C Coil section

Claims

1. The body and a coil portion embedded in the element body and having a structure in which a plurality of insulating layers and a plurality of coil patterns are alternately laminated; Equipped with the plurality of coil patterns includes a first coil pattern, the first coil pattern has a side surface along a circumferential direction that has a larger surface roughness than an upper surface that constitutes one end surface in a stacking direction; Electronic components.

2. the plurality of insulating layers includes a first insulating layer in contact with the side surface of the first coil pattern, The aspect ratio of a cross section of the first insulating layer along a radial direction is 2 or more. The electronic component according to claim 1 .

3. the first insulating layer is made of a composite insulating material containing an inorganic filler and a resin binder; A part of the inorganic filler is located within a concave portion of the concave portions constituting the rough surface of the side surface. The electronic component according to claim 2 .

4. The surface roughness of the side surface is at least twice as large as the surface roughness of the upper surface. The electronic component according to claim 1 .

5. the cross section of the first coil pattern has a shape whose width is narrowest in an intermediate region located between the upper surface and a lower surface constituting the other end surface in the stacking direction; The electronic component according to claim 1 .

6. the plurality of coil patterns further includes a second coil pattern; an aspect ratio of a cross section along a radial direction of the second coil pattern is smaller than an aspect ratio of a cross section along a radial direction of the first coil pattern; The electronic component according to any one of claims 1 to 5.

7. The second coil pattern is located on the upper surface side as viewed from the first coil pattern. The electronic component according to claim 6.

8. the second coil pattern has a surface roughness of a side surface along the circumferential direction that is smaller than the surface roughness of the side surface of the first coil pattern; The electronic component according to claim 7.

9. A first step of forming a resist pattern having a first aspect ratio on a surface of a seed layer; a second step of changing an aspect ratio of the resist pattern from the first value to a second value greater than the first value by trimming the resist pattern; a third step of forming a coil pattern by electrolytic plating using the seed layer as a power supply; a fourth step of removing the resist pattern and the seed layer covered with the resist pattern; a fifth step of forming an insulating layer covering the coil pattern; A method for manufacturing an electronic component comprising the steps of:

10. the resist pattern has a lower surface in contact with the seed layer and an upper surface located opposite to the lower surface, In the second step, trimming is performed under conditions in which a cross section of the resist pattern has a widest width in an intermediate region located between the lower surface and the upper surface. The method for manufacturing an electronic component according to claim 9 .

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