Surge protective element
The surge protection element addresses the issue of energy barriers and series resistance in conventional semiconductor elements by incorporating an inclined composition layer in the n-type semiconductor layer, enabling efficient processing of unnecessary current from harmful pulses.
Patent Information
- Application Number
- JP2024016972
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-07
- Publication Date
- 2025-05-19
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
Conventional semiconductor elements experience increased series resistance and energy barriers when exposed to harmful pulses, hindering the smooth processing of unnecessary current.
A surge protection element with an n-type semiconductor layer featuring an inclined composition layer, where the content ratio of element B to element A gradually increases, reducing series resistance and eliminating energy barriers when harmful pulses are applied.
The surge protection element effectively processes unnecessary current generated by harmful pulses without generating energy barriers, ensuring smooth current handling and reduced series resistance.
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Figure 2025077939000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a surge protection element.
Background Art
[0002] Conventionally, many semiconductor devices equipped with semiconductor circuits have been used. However, when a voltage higher than the operating voltage is applied to these semiconductor devices, there is a possibility of failure. As the overvoltage source (harmful pulse) causing this, surges due to static electricity, lightning, etc., electromagnetic pulses, and intentional electromagnetic waves are assumed.
[0003] Therefore, conventionally, a semiconductor element 30 including a first n-type semiconductor layer 31A (ZnO), a second n-type semiconductor layer 31B (Zn 0.50 Mg 0.50 O) having a larger bandgap than the first n-type semiconductor layer, and a metal layer 32 (Pt, Au) has been known (see, for example, Patent Document 1, FIG. 4A).
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] However, when a harmful pulse is applied to the above-described semiconductor element 30, an energy barrier 33 is generated between the first n-type semiconductor layer 31A and the second n-type semiconductor layer 31B (see FIG. 4B). And since the energy barrier raises the series resistance, there is a problem that it is disadvantageous for smooth processing of unnecessary current generated by the harmful pulse.
[0006] In view of the above points, an object of the present invention is to provide a surge protection element capable of smoothly processing unnecessary current generated by a harmful pulse.
Means for Solving the Problem
[0007] The surge protection element of the present invention is a surge protection element in which a first electrode, an n-type semiconductor layer, and a second electrode are joined in this order in a specified direction, wherein a portion from at least the middle of the n-type semiconductor layer to the second electrode in the specified direction is composed of an inclined composition layer, so that in a state where no voltage is applied, the bandgap of this portion gradually increases in the specified direction, and the conduction level of this portion exceeding the Fermi level gradually increases in the specified direction.
[0008] In the surge protection element of the present invention, since an inclined composition layer is formed in at least a part of the n-type semiconductor layer, the bandgap of the portion where the inclined composition layer is formed gradually increases in the specified direction, and the conduction level of the inclined composition layer exceeding the Fermi level gradually increases in the specified direction. Such a surge protection element does not generate the energy barrier 33 as described above in the n-type semiconductor layer even when a harmful pulse is applied. Therefore, unnecessary current generated by the harmful pulse can be smoothly processed.
[0009] The inclined composition layer in the n-type semiconductor layer is preferably composed of a composite oxide or composite nitride of at least two elements A and B selected from the group consisting of Ga, In, Zn, Mg, Al, and Sn, or a combination thereof, and is configured such that the content ratio of element B to element A gradually increases in the specified direction.
[0010] By configuring the surge protection element of the present invention such that the content ratio of element B to element A gradually increases in the specified direction, the bandgap can gradually increase in the specified direction, and the portion where the conduction level exceeds the Fermi level can gradually increase in the specified direction.
[0011] The surge protection element of the present invention preferably has a thickness in the specified direction of the n-type semiconductor layer of 5 to 1000 nm, more preferably 500 nm or less, so that the series resistance is reduced and the Joule heat generated when processing unnecessary current can be suppressed.
Brief Description of the Drawings
[0012]
Figure 1
Figure 2A
Figure 2B
Embodiments for Carrying Out the Invention
[0013] With reference to the drawings, the surge protection element 10 will be described in detail. For the same or corresponding configurations, the same reference numerals may be used and the description may be omitted as appropriate.
[0014] FIG. 1 shows the surge protection element 10 of the present invention. The surge protection element 10 has a first electrode 11, an n-type semiconductor layer 12, and a second electrode 13. The first electrode 11, the n-type semiconductor layer 12, and the second electrode 13 are joined in this order in the specified direction (the upward arrow direction shown in FIG. 1).
[0015] A Schottky barrier SB is formed between the n-type semiconductor layer 12 and the second electrode 13. That is, the surge protection element 10 is a Schottky barrier diode. Therefore, the response speed is faster than that of a p-n junction diode, which is an element in which both majority carriers and minority carriers are involved.
[0016] Figure 2A is an energy band diagram of the surge protection element 10 of the present invention in a state where no voltage is applied. In Figure 2A, the dashed line indicates the Fermi level Ef of the n-type semiconductor layer 12, and the upper solid line in the n-type semiconductor layer 12 indicates the conduction level Ec. In Figure 2A, the Fermi levels Ef of the n-type semiconductor layer 12 and the second electrode 13 are aligned. The n-type semiconductor layer has a forbidden band, which is an energy band where there are no electron orbits at the center of the carrier distribution. Therefore, the free electrons in the n-type semiconductor layer 12 are placed at a higher energy level than the free electrons in the conduction level of the n-type semiconductor layer 12 compared to the energy level where free electrons exist in the metal, and the valence electron level Ev of the n-type semiconductor layer 12 is placed at a lower energy level. When the n-type semiconductor layer 12 and the second electrode 13 are joined, the free electrons in the n-type semiconductor layer 12 move to the second electrode 13 side and decrease. As a result, the carrier distribution of the n-type semiconductor layer 12 at the joined portion changes, so the position of the Fermi level changes, but the Fermi level itself does not move unless an external potential is applied. Therefore, the energy levels of the conduction level and the valence electron level of the n-type semiconductor layer 12 at the joined portion change relative to the position of the Fermi level. In this way, a Schottky barrier SB is formed between the n-type semiconductor layer 12 and the second electrode 13. In this embodiment, the band gap Eg of the n-type semiconductor layer 12 is 3.4 eV, and the Schottky barrier SB between the n-type semiconductor layer 12 and the second electrode 13 is 2.8 eV.
[0017] As shown in FIG. 1, the first electrode 11 is formed in a rectangular flat plate shape having a pair of main surfaces facing each other. Further, as the material of the first electrode 11, an iron-based metal is used. In addition, as the material of the first electrode 11, in addition to the iron-based metal, an aluminum-based metal, a copper-based metal, etc. can also be used. Further, a metal substrate may be used as the first electrode 11. By using a metal substrate as the first electrode 11, the process (manufacturing) cost can be further reduced.
[0018] Regarding this point, a detailed explanation will be given. When forming the first electrode on one of the upper and lower surfaces of the n-type semiconductor layer 12 and the second electrode on the other surface by vapor deposition or the like, first, the n-type semiconductor layer 12 is formed on a substrate (Substrate not limited to a metal substrate). After that, after forming one of the first electrode or the second electrode, it is necessary to once peel the n-type semiconductor layer 12 from the substrate and form the other electrode on the peeled surface. On the other hand, when using a metal substrate as the first electrode, the n-type semiconductor layer 12 can be directly formed on it, and the second electrode 13 can be formed, and the peeling process can be omitted.
[0019] Also, the first electrode 11 may use a substrate composed of a two-layer structure of an insulating layer (for example, glass) and a metal layer. By adopting such a configuration, the same effects as those described above can be obtained. Further, when comparing the resistivity of the film with the resistivity of the bulk body, the resistivity of the film tends to be larger. Therefore, by using a metal substrate as the first electrode 11, the unnecessary current generated by the harmful pulse can be shunted more quickly.
[0020] As shown in FIG. 1, the n-type semiconductor layer 12 is joined to the first electrode 11 in the specified direction. Specifically, on the first electrode 11, a compound film is grown by the mist CVD (Chemical Vapour Deposition) method. Specifically, for example, an organometallic (solid) containing a metal element constituting a desired film is dissolved in an organic solvent to obtain a raw material solution. The mist obtained by atomizing the raw material solution by ultrasonic vibration is transported to a high-temperature reaction vessel (about 300 to 500 ° C) while being diluted with nitrogen (N 2 ) gas, and a compound film is grown on the first electrode 11 installed in the high-temperature reaction vessel. The gas flow rate was set to 5.0 L / min for both the mist carrier gas and the dilution gas.
[0021] In addition, as a method for growing the compound film, as a method other than the mist CVD method, for example, the MOCVD (Metal Organic Chemical Vapour Deposition) method can be adopted. As the raw material gas at this time, hydrogen (H 2) or nitrogen (N 2 ) and the like can be used. Also, a sputtering method, a VPE (Vapor Phase Epitaxy) method, an MBE (Molecular Beam Epitaxy) method, etc. may be employed. The first electrode 11 and the n-type semiconductor layer 12 form an ohmic contact.
[0022] The thickness of the n-type semiconductor layer 12 in the specified direction is 5 to 1000 nm. Note that the thickness of the n-type semiconductor layer 12 is more preferably 5 to 500 nm. By making the thickness of the n-type semiconductor layer 12 500 nm or less, the series resistance can be reduced and at the same time Joule heat can be suppressed.
[0023] The n-type semiconductor layer 12 is composed of three layers: an initial layer 12A (the side of the first electrode 11 of the n-type semiconductor layer 12), a gradient composition layer 12B, and a final layer 12C (the side of the second electrode 13 of the n-type semiconductor layer 12). The initial layer 12A is a low-resistance layer, and the final layer 12C is a high-resistance layer. In the present embodiment, the thicknesses of the initial layer 12A, the gradient composition layer 12B, and the final layer 12C are 100 nm, 200 nm, and 100 nm, respectively. Note that the thickness of the layer can be in the range of 1 to 200 nm for the initial layer 12A, 1 to 200 nm for the gradient composition layer 12B, and 1 to 200 nm for the final layer 12C, and it is preferable that the sum of the thicknesses of the initial layer 12A, the gradient composition layer 12B, and the final layer 12C is 500 nm or less.
[0024] In the present embodiment, the initial layer 12A of the n-type semiconductor layer 12 is composed of an oxide of element A. And from the middle of the n-type semiconductor layer 12 in the specified direction to the part toward the second electrode 13 is composed of the gradient composition layer 12B. The gradient composition layer 12B is composed of a composite oxide of element A and element B. In the present embodiment, the final layer 12C is composed of a composite oxide in which the content ratio of element B to element A is 8 to 2.
[0025] For example, element A is zinc (Zn), and element B is magnesium (Mg). That is, the initial layer 12A of the n-type semiconductor layer 12 is composed of zinc oxide (ZnO), and the gradient composition layer 12B and the final layer 12C are composed of zinc magnesium oxide (ZnMgO).
[0026] In the gradient composition layer 12B, in a specified direction, the content ratio of element B to element A is configured to gradually increase. That is, the gradient composition layer 12B is composed of zinc magnesium oxide (ZnMgO) such that the content ratio of magnesium (Mg) to zinc (Zn) gradually increases as it goes in the specified direction.
[0027] In this embodiment, the transition of the content ratio of magnesium (Mg) to zinc (Zn) changes with a constant increase amount as it goes in the specified direction. Note that the transition of the content ratio of magnesium (Mg) to zinc (Zn) may be such that the content ratio of magnesium (Mg) to zinc (Zn) is rapidly increased on the first electrode 11 side and the content ratio of magnesium (Mg) to zinc (Zn) is gently increased on the second electrode 13 side, or the content ratio of magnesium (Mg) to zinc (Zn) is gently increased on the first electrode 11 side and the content ratio of magnesium (Mg) to zinc (Zn) is rapidly increased on the second electrode 13 side.
[0028] In this embodiment, the content ratio of magnesium (Mg) to zinc (Zn) in the gradient composition layer 12B is finally increased to 8:2.
[0029] In this embodiment, the transition of the content ratio of magnesium (Mg) to zinc (Zn) is changed stepwise (intermittently) as it goes in the specified direction. That is, the gradient composition layer 12B is formed by a laminated structure of a plurality of layers in which the content ratio of magnesium (Mg) to zinc (Zn) changes as it goes in the specified direction. Note that the transition of the content ratio of magnesium (Mg) to zinc (Zn) may be changed continuously as it goes in the specified direction.
[0030] The inclined composition layer 12B is formed such that the content ratio of magnesium (Mg) to zinc (Zn) gradually increases by changing the composition of the stock solution during the growth process. For example, in the initial stage of growth, the composition of Zn 0.90 Mg 0.10 O is changed in concentration in increments of 0.05 to Zn 0.85 Mg 0.15 O, Zn 0.80 Mg 0.20 O, Zn 0.75 Mg 0.25 O ··· Zn 0.20 Mg 0.80 O, and an inclined composition layer 12B is formed with a 16-layer laminated structure by changing the concentration in increments of 0.05.
[0031] In the case of the MOCVD method, an inclined composition layer 12B can be obtained in which the content ratio of magnesium (Mg) to zinc (Zn) gradually increases by changing the concentration of the organometal in the carrier gas. Also, in the case of the sputtering method, a plurality of sputtering targets with different compositions are prepared, and each time one layer of the n-type semiconductor layer 12 is formed, the sputtering target is changed to a sputtering target with a different composition, so that an inclined composition layer 12B can be obtained in which the content ratio of magnesium (Mg) to zinc (Zn) gradually increases.
[0032] In this embodiment, 16 inclined composition layers 12B are formed by changing the concentration in increments of 0.05. However, for example, 8 inclined composition layers 12B can be formed by changing the concentration in increments of 0.10, and the concentration can be changed in increments of 0.05 or more, such as forming 32 inclined composition layers 12B by changing the concentration in increments of 0.025, or the concentration can be changed in increments of 0.05 or less. Also, the composition of the stock solution during the growth process may be continuously changed in concentration.
[0033] In this embodiment, the composition of the stock solution in the initial stage of growth of the inclined composition layer 12B is Zn 0.90 Mg 0.10 O, but the composition of the stock solution such as Zn 0.80 Mg 0.20 O etc. may be Zn at the initial stage of growth.0.90 Mg 0.10 may be higher than O, or Zn 0.99 Mg 0.01 such as O, the composition of the stock solution at the initial growth stage is Zn 0.90 Mg 0.10 may be lower than O.
[0034] In this embodiment, the composition of the stock solution in the later growth stage of the inclined composition layer 12B is Zn 0.20 Mg 0.80 O, but Zn 0.25 Mg 0.75 such as the composition of the stock solution in the later growth stage may be lower than Zn 0.20 Mg 0.80 as well.
[0035] As shown in FIG. 2A, in the n-type semiconductor layer 12, in the portion where the inclined composition layer 12B is formed, the band gap Eg gradually increases as ΔEg1, ΔEg2, and ΔEg3 in the specified direction (right arrow direction). Also, in the portion of the n-type semiconductor layer 12 where the inclined composition layer 12B is formed, the conduction band level Ec is configured to gradually increase as ΔEc1, ΔEc2, and ΔEc3 in the specified direction (right arrow direction) by the amount exceeding the Fermi level Ef. That is, the conduction band level Ec has no step and rises relatively smoothly towards the upper right.
[0036] FIG. 2B is an energy band diagram of the surge protection element 10 of the present invention when a voltage is applied. Similar to FIG. 2A, in FIG. 2B as well, the dashed line indicates the Fermi level Ef of the n-type semiconductor layer 12, and the upper solid line in the n-type semiconductor layer 12 indicates the conduction band level Ec. Also, the dashed line indicates the energy band diagram in a state where no voltage is applied to the surge protection element 10 of the present invention.
[0037] As shown in FIG. 2B, when a voltage is applied to the surge protection element 10 of the present invention, in the portion of the n-type semiconductor layer 12 where the gradient composition layer 12B is formed, there is no step derived from the energy band diagram before voltage application (see FIG. 2A), and it is relatively smooth and slopes downward to the right. That is, no energy barrier 33 that occurs when a voltage is applied to the conventional semiconductor element 30 as shown in FIG. 4B is generated. Therefore, the electrons 20 flow smoothly from the n-type semiconductor layer 12 toward the second electrode 13. That is, by forming the gradient composition layer 12B in the n-type semiconductor layer 12, unnecessary current generated by harmful pulses can be processed smoothly.
[0038] In the present embodiment, element A is zinc (Zn) and element B is magnesium (Mg). However, element A may be Ga, In, Zn, Mg, Al, Sn, etc., or a combination thereof. Also, element B may be Mg, Al, Sn, Ga, Zn, etc., or a combination thereof. Further, in the present embodiment, the initial layer 12A is formed of an oxide, but it may be formed of a nitride, a composite oxide, a composite nitride, or a combination thereof. Furthermore, in the present embodiment, the gradient composition layer 12B and the final layer 12C are formed of a composite oxide, but they may be formed of a composite nitride or a combination thereof.
[0039] In the present embodiment, the final layer 12C is formed of a composite oxide having a content ratio of element B to element A of 8 to 2, which is the same as the composition of the stock solution in the latter stage of the growth of the gradient composition layer 12B. However, the final layer 12C can be formed of a composite oxide having an arbitrary content ratio of element B to element A. It may also be formed of an oxide of element B. Furthermore, it may be formed of a nitride of element B or a composite nitride composed of element A and element B, or a combination thereof.
[0040] Table 1 below is a table summarizing an example of the element (element B) whose relative content ratio is increased and adjusted among the constituent elements of the gradient composition layer 12B, the constituent of the initial layer 12A, and the constituent of the final layer 12C.
[0041]
Table 1
[0042] In this embodiment, the n-type semiconductor layer 12 is composed of three layers, i.e., an initial layer 12A, a gradient composition layer 12B, and a final layer 12C. However, as shown in FIGS. 3A and 3B, the n-type semiconductor layer 12 may be composed of two layers, i.e., an initial layer 12A and a gradient composition layer 12B. In this case, the initial layer 12A is a low-resistance layer, and the end of the gradient composition layer 12B on the second electrode side is a high-resistance layer. Even when the n-type semiconductor layer 12 has a two-layer structure, the effect of the above-described gradient composition layer 12B can be achieved. Further, the n-type semiconductor layer 12 may be composed of two layers, i.e., a gradient composition layer 12B and a final layer 12C. That is, the gradient composition layer 12B may be formed from the end of the n-type semiconductor layer 12 on the first electrode side.
[0043] The n-type semiconductor layer 12 may contain a doping material as necessary. The n-type semiconductor layer 12 may contain at least one of Al, Si, In, Ga, Ge, and Sn as a doping material. By containing an appropriate doping element in the n-type semiconductor layer 12, it becomes possible to adjust the bandgap.
[0044] The second electrode 13 is joined onto the n-type semiconductor layer 12 in a specified direction. The second electrode 13 is formed by a known method, and for example, a film-forming method such as a vapor deposition method or a sputtering method is used.
[0045] The second electrode 13 is a material capable of forming a Schottky contact with the n-type semiconductor 12. As the material, in addition to an alloy of platinum (Pt) and gold (Au), one or more elements selected from the group of metal elements consisting of platinum (Pt), gold (Au), titanium (Ti), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), copper (Cu), iron (Fe), silver (Ag), and chromium (Cr), or an alloy thereof may be used. Further, as the second electrode 13, titanium nitride (TiN), silver oxide (Ag2 Compounds having metal elements such as O) may also be used.
[0046] The desired forward turn-on voltage Vf of the surge protection element 10 can be obtained from the combination of the elements constituting the n-type semiconductor layer 12, the elements constituting the second electrode 13, and the doping element contained in the n-type semiconductor layer 12.
[0047] Next, the operation when a harmful pulse is applied to the semiconductor device including the surge protection element 10 will be described. The surge protection element 10 is connected to, for example, a semiconductor circuit that is forward-connected between the signal line and the ground of the semiconductor device. When a voltage exceeding the forward turn-on voltage Vf such as a harmful pulse is applied to the surge protection element 10, a forward bias current flows through the surge protection element 10 and is grounded (see FIG. 2B). Therefore, the semiconductor device including the surge protection element 10 is protected from harmful pulses.
[0048] The forward turn-on voltage Vf of the surge protection element 10 is set to a value larger than the operating voltage Va of the semiconductor device including the surge protection element 10. Therefore, the surge protection element 10 does not bypass a signal that is below the forward turn-on voltage Vf, and when a harmful pulse larger than the forward turn-on voltage Vf is applied, a forward bias current flows through the surge protection element 10, and the unnecessary current generated by the harmful pulse is grounded.
[0049] As described in detail above, it is possible to provide the surge protection element 10 that can smoothly process the unnecessary current generated by the harmful pulse.
Description of Reference Numerals
[0050] 10 Surge protection element 11 First electrode 12 n-type semiconductor layer 12A Initial layer 12B Gradient composition layer 12C Final layer 13 Second electrode 20 Electron
Claims
1. A surge protection element in which a first electrode, an n-type semiconductor layer, and a second electrode are joined in this order in a specified direction, A surge protection element in which at least a portion from the middle of the n-type semiconductor layer in the specified direction to the second electrode is composed of a gradient composition layer, so that when no voltage is applied, the band gap of that portion gradually increases in the specified direction, and the amount by which the conduction level of that portion exceeds the Fermi level gradually increases in the specified direction.
2. 2. The surge protection element according to claim 1, wherein the gradient composition layer of the n-type semiconductor layer is composed of a composite oxide or composite nitride of at least two elements A and element B selected from the group consisting of Ga, In, Zn, Mg, Al and Sn, or a combination thereof, and is configured so that the content ratio of element B to element A gradually increases in a specified direction.
3. 3. The surge protection element according to claim 1, wherein the n-type semiconductor layer has a thickness in a specified direction of 5 to 1000 nm.
Citation Information
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