Error measurement method for lamination position between printed circuit boards laminated in multilayer printed circuit board

Abstract

To provide a method for measuring an error of a lamination position between printed circuit boards forming a multilayer printed circuit board.SOLUTION: In a method, a virtual alignment mark hole opening circle 3D is set at an estimated position of an opening 3e of an alignment mark hole 3d, which is opened in a low-order layer printed circuit board 3, in a high-order layer printed circuit board 2 of a multilayer printed circuit board 1. A temporary) inner shape rectangular processing region β' including the opening circle and an outer shape rectangular processing region α including the (temporary) inner shape rectangular processing region β' are defined and since lattice points of different processing pitches are provided in both the processing regions and laser irradiation is continuously performed on the lattice points, thereby forming different processing marks in portions corresponding to both the processing regions in the low-order layer printed circuit board and an inner bottom part 3d' of the alignment mark hole in the (temporary) inner shape rectangular processing region β'. Contrast is generated between both the processing regions and between the (temporary) inner shape rectangular processing region and the inner bottom part of the alignment mark hole and a contour of the inner bottom part of the alignment mark hole is made clear, thereby measuring an error.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to a method for measuring the error in stacking position between stacked printed circuit boards, which serves as the basis for correcting the processing position required in laser processing when mounting electronic components, etc., in multilayer printed circuit boards formed by stacking multiple printed circuit boards, which have been widely adopted in recent years. [Background technology]

[0002] In recent years, multilayer printed circuit boards have come to be widely used for mounting electronic components, etc. In order to ensure electrical current between each printed circuit board stacked to form the multilayer printed circuit board, it is necessary for each upper layer printed circuit board to be stacked in a precise position relative to the lower layer printed circuit board.

[0003] Therefore, for example, in a multilayer printed circuit board 100 formed by stacking an upper layer printed circuit board 101 and a lower layer printed circuit board 104, each of which has outermost copper foils 102, 107 on the outside, with an inner copper foil 105 sandwiched between them, as shown in Figure 8, the way in which the upper layer printed circuit board 101 and the lower layer printed circuit board 104 are stacked relative to each other, that is, the error in the stacking position (hereinafter referred to as the "amount of deviation") caused by the heat and pressure applied when joining the two boards 101, 104 together is measured as follows. That is, first, an alignment mark 108 made of a material different from the insulating layer 106 of the lower layer printed circuit board 104 is placed in a gap in the internal copper foil 105 of the lower layer printed circuit board 104 so as to be between the upper layer printed circuit board 101 and the lower layer printed circuit board 104 that form the multilayer printed circuit board 100, and the coordinates of the installation position of the alignment mark 108 on the lower layer printed circuit board 104 are extracted. Then, the origin positions of the lower layer printed circuit board 104 and the upper layer printed circuit board 101 are aligned, and a laser processing hole 101' is excavated by laser irradiation from the surface of the outermost copper foil 102 of the upper layer printed circuit board 101 including the insulating layer 103, with the coordinate position of the installation position of the alignment mark 108 on the lower layer printed circuit board 104 extracted in the upper layer printed circuit board 101 as a target, to expose the alignment mark 108. Furthermore, by processing the image captured of the exposed alignment mark 108, the distance between the center position of the actual exposed alignment mark 108 and the center of the camera, which is the center position of the alignment mark 108 based on the design value, is measured as the error in the stacking position between the upper layer printed board 101 and the lower layer printed board 104 stacked in the multilayer printed board 100, i.e., the amount of deviation (see Patent Document 1). Then, from the above-mentioned deviation amount measured for the multiple alignment marks 108 in the multilayer printed circuit board 100, a correction coefficient to be used in correcting the laser processing position for mounting electronic components, etc. on the multilayer printed circuit board 100 is calculated, and the laser processing position for mounting the electronic components, etc. is corrected using the correction coefficient.

[0004] In recent years, efforts have been made to reduce the weight and thickness of the multilayer printed circuit board 100, and instead of the alignment mark 108, which acts as a foreign object and hinders the thinning process, an opening 3e is provided on the upper surface of the lower layer printed circuit board 3 by drilling a hollow alignment mark hole 3d from the inner layer copper foil 3a on the upper surface of the lower layer printed circuit board 3, with the outermost layer copper foil 3c on the lower surface serving as the inner bottom 3d', in the lower layer printed circuit board 3 that forms the multilayer printed circuit board 1, as shown in Figure 3. That is, the alignment mark hole 3d drilled in the lower layer printed circuit board 3 has its opening 3e opening into the surface of the inner layer copper foil 3a on the upper surface of the lower layer printed circuit board 3. Therefore, in order to expose the surface of the inner layer copper foil 3a on the upper surface of the lower layer printed circuit board 3 from the surface of the outermost copper foil 2a on the upper surface of the upper layer printed circuit board 2, a laser processing hole 2c is drilled by laser irradiation, and a processing mark due to laser irradiation is formed on the surface of the inner layer copper foil 3a and on the inner bottom 3d' of the alignment mark hole 3d through the opening 3e opening into the surface of the inner layer copper foil 3a. As a result, by processing the image captured inside the laser-machined hole 2c with an image processing device, the center position of the exposed actual alignment mark hole 3d was recognized from the contrast between the machining marks formed on the surface of the inner layer copper foil 3a and the inner bottom 3d' of the alignment mark hole 3d, and the distance from the center of the camera, which is the center position of the alignment mark hole 3d based on the design value, was determined to be the error in the stacking position of the upper layer printed board 2 and the lower layer printed board 3 stacked in the multilayer printed board 1 in the same manner as above, that is, the amount of deviation. Then, based on the amount of deviation, the laser processing position was corrected when mounting electronic components, etc.

[0005] Here, the laser-machined hole 2c, which is drilled in the lower layer printed circuit board 3 that forms the above-mentioned multilayer printed circuit board 1 and is drilled to expose the opening 3e of the alignment mark hole 3d that opens into the inner layer copper foil 3a, is drilled by focusing a laser of a certain energy on the surface of the inner layer copper foil 3a over a wide area to include the opening 3e of the alignment mark hole 3d, and continuously irradiating the laser in a linear manner and back and forth in the left and right directions. At this time, the focus of the laser irradiation is set on the surface of the inner layer copper foil 3a, so that the focus of the laser irradiation is significantly shifted at the inner bottom 3d' of the alignment mark hole 3d, which is sufficiently separated from the surface of the inner layer copper foil 3a, and the processing marks formed on the surface of the inner layer copper foil 3a and the inner bottom 3d' of the alignment mark hole 3d are different. As a result, a contrast of light and dark occurs between the surface of the inner layer copper foil 3a and the inner bottom 3d' of the alignment mark hole 3d when light is received, so that the contrast occurring between the surface of the inner layer copper foil 3a and the inner bottom 3d' of the alignment mark hole 3d can clarify the outline of the inner bottom 3d' of the alignment mark hole 3d relative to the surface of the inner layer copper foil 3a within the laser irradiation range. Therefore, the center of the inner bottom 3d' of the alignment mark hole 3d can be found to measure the amount of deviation between each of the laminated printed circuit boards 2 and 3.

[0006] However, when the multilayer printed circuit board 1 is thinned to reduce its weight, the upper and lower printed circuit boards 2 and 3 that form the multilayer printed circuit board 1 are also thinned at the same time, so that the distance between the outermost copper foil 3c that forms the inner bottom 3d' of the alignment mark hole 3d and the inner copper foil 3a of the lower layer printed circuit board 3 where the opening 3e of the alignment mark hole 3d is opened becomes significantly closer. This reduces the deviation in focus of the irradiated laser, and reduces the difference between the processing marks formed on the surface of the inner layer copper foil 3a and the inner bottom 3d' of the alignment mark hole 3d opening in the surface of the inner layer copper foil 3a. Therefore, when the camera of the image processing device is focused on the surface of the inner layer copper foil 3a and image processing is performed, the contrast between light and dark is weakened, and the outline of the inner bottom 3d' of the alignment mark hole 3d relative to the surface of the inner layer copper foil 3a becomes unclear. As a result, the center of the inner bottom 3d' of the alignment mark hole 3d cannot be accurately determined, and it becomes extremely difficult to measure the amount of misalignment between each of the laminated printed circuit boards 2 and 3. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2006-237088 A Summary of the Invention [Problem to be solved by the invention]

[0008] Therefore, the problem that the present invention aims to solve is to generate contrast by making the processing marks caused by laser irradiation formed on the outermost layer copper foil at the inner bottom of an alignment mark hole drilled in the lower layer printed board and on the inner layer copper foil surface of the lower layer printed board where the opening of the alignment mark hole is opened different from each other, and further generating different processing marks caused by laser irradiation in the surrounding interior copper foil, so that the contrast generated there makes it possible to clarify the outline of the inner bottom of the alignment mark hole relative to the inner layer copper foil surface and accurately measure the amount of misalignment between the upper layer printed board and the lower layer printed board. [Means for solving the problem]

[0009] First, the first characteristic is: In a multilayer printed circuit board formed by integrally joining a lower layer printed circuit board and an upper layer printed circuit board onto the lower layer printed circuit board, In the lower layer printed circuit board, an outermost copper foil is disposed on the lower surface side with an insulating layer sandwiched therebetween, and an inner layer copper foil is disposed on the upper surface side, with the inner bottom being the outermost copper foil on the lower surface side, and a hollow alignment mark hole is drilled with its opening opening on the surface of the inner layer copper foil, In the upper layer printed circuit board, an outermost copper foil is disposed on the upper surface side of the insulating layer, First, on the outermost copper foil surface of the upper layer printed circuit board forming the multilayer printed circuit board, Based on a position corresponding to the center position of an opening of an alignment mark hole drilled in a lower layer printed circuit board, an inner rectangular processing area is defined so as to include at least a virtual alignment mark hole opening circle set at the corresponding position, and an outer rectangular processing area is defined which includes the inner rectangular processing area; Next, in the outer rectangular processing area excluding the inner rectangular processing area and in the inner rectangular processing area, lattice points to be irradiated with a laser are provided within a range of half the laser beam diameter or less and at different pitches in both areas, and a processing route is formed that sequentially connects the lattice points provided in both areas together, and a laser processing hole is formed that exposes the inner layer copper foil on the upper surface of the lower layer printed circuit board by irradiating each lattice point with a laser according to the processing route, Then, from an image of the inside of the laser-machined hole photographed with the center position of the virtual alignment mark hole opening circle set in the upper layer printed circuit board as the photographing center, the contour of the inner bottom of the actual alignment mark hole is clarified from the contrast caused by machining marks formed by laser irradiation of lattice points with different pitches between the outer rectangular machining area excluding the inner rectangular machining area and the inner rectangular machining area, and the contrast caused by machining marks formed by the difference in irradiation distance of the laser irradiation between the inner rectangular machining area and the inner bottom of the actual alignment mark hole in the inner rectangular machining area, and the distance between the photographing center position and the center of the opening of the actual alignment mark hole drilled in the lower layer printed circuit board is measured as the error in the stacking position of the upper layer printed circuit board and the lower layer printed circuit board.

[0010] Therefore, when a laser-machined hole is drilled by irradiating a laser from the outermost copper foil of the upper layer printed circuit board to the point where the inner layer copper foil of the lower layer printed circuit board is exposed, the inner layer copper foil surface and the inner bottom of the alignment mark hole of the lower layer printed circuit board that is connected to the inner layer copper foil surface are exposed through the opening. Therefore, processing marks due to laser irradiation in the inner rectangular processing area are formed on the outermost copper foil surface of the lower layer printed circuit board, which is the inner bottom of the alignment mark hole, and on the inner layer copper foil surface around the opening of the alignment mark hole, and processing marks due to laser irradiation are also formed in the outer rectangular processing area surrounding the inner rectangular processing area. However, the processing marks formed in both regions differ due to differences in the irradiation distance and processing pitch of the laser irradiation. That is, contrast occurs between the outer rectangular processing region and the inner rectangular processing region on the inner layer copper foil surface, and between the inner rectangular processing region and the inner bottom of the alignment mark hole within the range of the inner rectangular processing region. As a result, from the image taken by the image processing device within the laser-machined hole, the amount of deviation, which is the distance between the center of the opening of the actual alignment mark hole and the center of the opening of the alignment mark hole based on the design value in the image processing device, can be accurately measured as the error in the stacking position between each printed circuit board that forms the multi-layer printed circuit board. That is, by drilling a laser processing hole in an upper layer printed circuit board to expose the opening of the alignment mark hole that opens on the inner layer copper foil surface of the lower layer printed circuit board, the processing marks formed by laser irradiation are different between the outer rectangular processing area excluding the inner rectangular processing area formed on the inner layer copper foil surface and the inner rectangular processing area due to the difference in irradiation pitch, and a contrast of light and dark is generated in both areas. Then, when the drilled laser processing hole reaches the inner layer copper foil surface and the opening of the alignment mark hole is exposed, the inner rectangular processing area formed on the inner layer copper foil surface and the inner bottom of the alignment mark hole included in the inner rectangular processing area are located apart from each other, so that the processing marks on the inner bottom of the alignment mark hole are different from the processing marks on the inner layer copper foil surface due to the difference in irradiation distance. Therefore, a contrast is generated between both areas and the inner bottom of the alignment mark hole included in the inner rectangular processing area. As a result, first, a contrast occurs between the outer rectangular processing area and the inner rectangular processing area due to the difference in the processing marks caused by the difference in the irradiation pitch of the laser irradiation, and the inner rectangular processing area is defined. Then, a contrast occurs between the inner rectangular processing area and the inner bottom of the alignment mark hole included in the inner rectangular processing area due to the difference in the processing marks caused by the difference in the irradiation distance of the laser irradiation. Therefore, the outline of the inner bottom of the alignment mark hole relative to the inner layer copper foil surface can be made clear. Therefore, the distance between the center of the opening of the actual alignment mark hole calculated by image processing and the center of the opening of the alignment mark hole on the design value, that is, the amount of deviation, can be accurately measured as the error of the stacking position between each printed circuit board forming a multilayer printed circuit board. Furthermore, the contrasts of the outer rectangular machining area, the inner rectangular machining area, and the inner bottom of the alignment mark hole in the inner rectangular machining area will vary depending on the material of the substrate, the wavelength of the illumination light source, and the condition of the machining marks, and therefore the light and dark contrasts will each vary; however, ultimately, the contrast between the inner rectangular machining area and the inner bottom of the alignment mark hole in the inner rectangular machining area is emphasized, and the outline of the inner bottom of the alignment mark hole becomes clear.

[0011] Furthermore, based on the first characteristic, the second characteristic is as follows: In the outer rectangular processing area excluding the inner rectangular processing area and in the inner rectangular processing area, a processing route is formed by sequentially connecting lattice points provided in both areas, and a laser is irradiated to each lattice point according to the processing route to form a laser processing hole that exposes an inner layer copper foil on an upper surface of a lower layer printed circuit board, First, in order to create a lattice table in the outer rectangular processing area on the outermost copper foil surface of the upper layer printed circuit board in the control mechanism that controls the laser irradiation, (a) First, in the outermost rectangular processing area defined on the surface of the copper foil of the upper layer printed circuit board, the vertical and horizontal lengths of the outermost rectangular processing area, which are specified as design values, are divided by the designated pitch, which is the center-to-center distance between adjacent laser irradiation surfaces and which is specified as a design value, to determine the integer lattice spacing number that is closest to this, and calculate the lattice spacing in each vertical and horizontal direction (hereinafter referred to as the "outer lattice pitch"). (b) Next, a grid table is created on the surface of the upper layer printed circuit board, the grid table being made up of grids having the above-mentioned external grid pitch in both the vertical and horizontal directions. Secondly, in a control mechanism for controlling laser irradiation, a lattice table is created in the inner rectangular processing area on the outermost copper foil surface of the upper layer printed circuit board, (i) In an inner rectangular processing area defined on the outermost copper foil surface of an upper layer printed circuit board, calculate each vertical and horizontal lattice spacing (hereinafter referred to as the "inner lattice pitch") which is an integer lattice spacing number and which is a lattice pitch different from the outer lattice pitch in the outer rectangular processing area. (b) Next, a lattice table is imagined on the surface of the upper layer printed circuit board, which is made up of lattices having the above-mentioned internal lattice pitch in both the vertical and horizontal directions. Thirdly, in a control mechanism for controlling the irradiation of the laser, a processing route is created which sequentially connects together the lattice points provided in the outer rectangular processing area excluding the inner rectangular processing area and the lattice points provided in the inner rectangular processing area for each lattice table created in the outer rectangular processing area and the inner rectangular processing area, and then the processing route is recorded. It is something that Based on the second characteristic, the third characteristic is: When creating the above machining route table, Among the lattice points provided in the outer rectangular machining area, a line connecting lattice points that are closest to the outside of the boundary line with the inner rectangular machining area is defined as a new inner rectangular machining area, and lattice points having the inner lattice pitch are provided vertically and horizontally between the lattice points at the four corners of the new inner rectangular machining area, thereby creating a lattice table in the inner rectangular machining area. It is something.

[0012] Therefore, the machining route table for forming different machining marks in the outer rectangular machining area and the inner rectangular machining area of ​​the upper layer printed circuit board that forms the multi-layer printed circuit board is created by selecting lattice points of the lattice table formed in both areas so that the machining steps are performed integrally and continuously, making it easy to create a program for laser irradiation work that forms different machining marks in both areas and improving work efficiency.

[0013] In particular, in a program which creates different machining marks in an outer rectangular machining area and an inner rectangular machining area, it is possible to easily and quickly respond to changed irradiation conditions by simply recalculating the grid tables formed in both areas, and further, a machining route table based on the grid tables can be easily and reliably created.

[0014] Here, when creating the above-mentioned machining route table, the machining route is selected while selecting the lattice points of the outer rectangular machining area, and if the lattice points of the outer rectangular machining area and the lattice points of the inner rectangular machining area are close to each other, the boundary between the two areas may become unclear. Therefore, among the lattice points set in the outer rectangular machining area, the line connecting the lattice points that are closest to the outside of the boundary line with the inner rectangular machining area is set as a new inner rectangular machining area, and lattice points having the inner lattice pitch vertically and horizontally are set between the lattice points at the four corners to create a lattice table in the inner rectangular machining area, thereby eliminating the proximity between the lattice points of the outer rectangular machining area and the lattice points of the inner rectangular machining area and making the boundary between the two areas clearer. Effect of the Invention

[0015] In the present invention, in the method for measuring the error of the stacking position between the laminated printed circuit boards forming the multilayer printed circuit board, in the processing marks formed on the inner layer copper foil surface of the lower layer printed circuit board by the laser irradiation on the outer rectangular processing area excluding the inner rectangular processing area and each lattice point provided in the inner rectangular processing area, the processing pitch of the outer rectangular processing area excluding the inner rectangular processing area and the processing marks formed on the inner rectangular processing area are different from each other in the laser processing, and further, the processing marks formed on the inner bottom of the alignment mark hole provided on the lower layer printed circuit board by the laser irradiation on the lattice points in the inner rectangular processing area and on the inner layer copper foil surface of the lower layer printed circuit board are different due to the focus deviation of the laser irradiation caused by the difference in the irradiation distance. Therefore, a contrast of light and dark occurs not only between the two areas but also between the inner rectangular processing area and the inner bottom of the alignment mark hole included in the inner rectangular processing area. Furthermore, by using the contrast that occurs between the outer rectangular processing area excluding the inner rectangular processing area and the inner rectangular processing area, and between the inner rectangular processing area and the inner bottom of the alignment mark hole included in the inner rectangular processing area, it is possible to determine the position of the inner rectangular processing area in the outer rectangular processing area and clearly define the contour of the inner bottom of the alignment mark hole relative to the inner rectangular processing area on the inner layer copper foil surface. As a result, it has the excellent effect of being able to accurately measure the amount of deviation between the center position of the alignment mark hole on the design value, which is used as the reference when defining the inner rectangular processing area on the upper layer printed circuit board, and the center position of the actual alignment mark hole.

[0016] Furthermore, when forming processing marks by laser irradiation in the above-mentioned outer rectangular processing area and inner rectangular processing area, a processing route table is created in which the lattice points set in each area are sequentially connected, so that not only can one alignment mark hole be drilled quickly and accurately, but also, when calculating a correction coefficient for correcting the misalignment of upper and lower printed circuit boards, it is necessary to provide multiple alignment mark holes in one lower layer printed circuit board and measure the amount of misalignment of each of the multiple alignment mark holes.However, since the processing route table formulated for one alignment mark hole can also be used for other alignment mark holes, it is possible to quickly calculate a correction coefficient for correcting the amount of misalignment between a pair of upper layer printed circuit boards and lower layer printed circuit boards.Finally, by accurately performing processing for mounting electronic components on the multilayer printed circuit board, the occurrence rate of defects in the use of the multilayer printed circuit board can be significantly reduced. [Brief description of the drawings]

[0017] [Figure 1] FIG. 1 is a schematic diagram of a laser processing device that makes it possible to carry out a method of measuring an error in stacking position between stacked printed circuit boards according to the present invention. [Diagram 2] FIG. 2 is a flowchart showing the operations from the step of measuring the stacking position error for N alignment mark holes in one multilayer printed circuit board to the laser processing step for mounting electronic components, etc. in the upper layer printed circuit board of the final multilayer printed circuit board. [Diagram 3] FIG. 3 is a vertical cross-sectional view of a multilayer printed circuit board used in the prior art and the present invention. [Figure 4] FIG. 4 is a schematic diagram showing a processing route in an outer rectangular processing area and an inner rectangular processing area (area surrounded by dotted lines) in which lattice points are formed for laser irradiation when excavating the outermost copper foil of an upper layer printed circuit board by laser irradiation to expose the surface of the inner layer copper foil, according to Example 1 of the present invention. [Diagram 5]5(a) to (c) are plan and longitudinal sectional views of an upper layer printed circuit board, showing the excavation steps from the outermost copper foil surface of an upper layer printed circuit board to the inner layer copper foil surface of a lower layer printed circuit board of a multilayer printed circuit board. [Figure 6] FIG. 6 is a schematic diagram showing a processing route in an outer rectangular processing area and an inner rectangular processing area (area surrounded by dotted lines) in which lattice points are formed for laser irradiation when excavating the outermost copper foil of an upper layer printed circuit board by laser irradiation to expose the surface of the inner layer copper foil, according to a second embodiment of the present invention. [Figure 7] FIG. 7 is a schematic diagram showing a processing route in an outer rectangular processing area and an inner rectangular processing area (area surrounded by dotted lines) in which lattice points are formed for laser irradiation when excavating the outermost copper foil of an upper layer printed circuit board by laser irradiation to expose the surface of the inner layer copper foil, according to a third embodiment of the present invention. [Figure 8] FIG. 11 is a longitudinal sectional view of a multilayer printed circuit board provided with an alignment mark in a conventional example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] In order to accurately measure the error in the stacking position between multiple printed circuit boards that form a multilayer printed circuit board, a virtual alignment mark hole opening circle is defined on the outermost copper foil surface of an upper layer printed circuit board that forms the multilayer printed circuit board, with its center position being a position that is identical in design to the center of the opening of the alignment mark hole drilled in the lower layer printed circuit board. An inner rectangular processing area is defined to include at least the opening circle, and an outer rectangular processing area is defined to include the inner rectangular processing area. Then, in the outer rectangular processing area and the inner rectangular processing area, lattice points that will become laser irradiation points are provided at different processing pitches. Then, in each of the outer rectangular processing area and the inner rectangular processing area, a processing route is created in which the laser is irradiated integrally and continuously so as to form different processing marks in the inner layer copper foil by irradiating the irradiation points with a different processing pitch, and laser processing holes are drilled according to the processing route down to the inner layer copper foil of the lower layer printed circuit board, thereby forming different processing marks between the outer rectangular processing area excluding the inner rectangular processing area and the inner rectangular processing area, and within the inner rectangular processing area, different processing marks are formed between the inner bottom of the alignment mark hole in the inner rectangular processing area due to a shift in the focus of the laser irradiation caused by the difference in irradiation distance. As a result, contrast is generated between the outer rectangular processing area excluding the inner rectangular processing area and the inner rectangular processing area, and between the inner rectangular processing area and the inner bottom of the alignment mark hole within the inner rectangular processing area, making it possible to clarify the outline of the inner bottom of the alignment mark hole contained within the inner rectangular processing area. Therefore, the error in the stacking position between the lower layer printed board and the upper layer printed board that make up the above-mentioned multilayer printed board is measured as the distance, i.e., the amount of deviation, between the center of the opening of the actual alignment mark hole provided in the lower layer printed board and the center of the laser-machined hole provided in the upper layer printed board based on the design value of the alignment mark hole. EXAMPLES

[0019] Shown in FIG. 1 is a laser processing apparatus A (hereinafter referred to as "laser processing apparatus A") for multilayer printed circuit boards, which performs a laser processing method for a multilayer printed circuit board 1, utilizing a method for measuring errors in stacking positions between stacked printed circuit boards in a multilayer printed circuit board, which is the present invention. In the laser processing device A, first, in a multilayer printed board 1 formed of an upper layer printed board 2 and a lower layer printed board 3, the error in the stacking position between the stacked upper layer printed board 2 and lower layer printed board 3 can also be measured. That is, in the laser processing device A, the measured error in the stacking position between the upper layer printed board 2 and the lower layer printed board 3, i.e., the distance (hereinafter, this distance will be referred to as the "deviation amount") between the actual center position of the opening 3e of the alignment mark hole 3d drilled at a specified designed position of the lower layer printed board 3 of the multilayer printed board 1 (meaning the center of the alignment mark hole 3d when viewed in a planar view. Hereinafter, "center" refers to the center when viewed in a planar view) and the center position of the laser-machined hole 2c formed in the upper layer printed board 2 based on the position information of the opening 3e of the alignment mark hole 3d in the design value, is measured by image processing of the image captured by camera i with the center of the laser-machined hole 2c formed in the upper layer printed board 2 as the center of photography. Then, based on the measured amount of deviation, a correction coefficient for the position, inclination, expansion / contraction, etc. of the multilayer printed board 1 on the processing table e is calculated, and the processing position for mounting electronic components, etc. on the multilayer printed board 1 on the processing table e is corrected using the correction coefficient, and laser processing is performed on the surface of the outermost copper foil 2a of the upper layer printed board 2 in the multilayer printed board 1 to mount electronic components, etc. The lower layer printed circuit board 3 forming the multilayer printed circuit board 1 has an outermost layer copper foil 3c bonded to its lower surface and an inner layer copper foil 3a bonded to its upper surface, with an insulating layer 3b sandwiched therebetween, and a plurality of hollow alignment mark holes 3d are drilled at predetermined positions in the design, extending from the surface of the inner layer copper foil 3a to the outermost layer copper foil 3c. The amount of deviation in each of the plurality of alignment mark holes 3d is measured, and then a correction coefficient is calculated. Here, the laser irradiated in the laser processing in the laser processing apparatus A in Examples 1 to 3 of the present invention is a CO2 laser, and since the laser used in the laser processing is a CO2 laser, the surfaces receiving the laser in the outermost copper foil 2a of the upper layer printed circuit board 2 and the inner layer copper foil 3a and the outermost copper foil 3c of the lower layer printed circuit board 3 are blackened to promote heat absorption (the same applies to Examples 2 and 3 below).

[0020] In the upper layer printed circuit board 2, the outermost copper foil 2a is bonded to the top surface of the insulating layer 2b which is bonded to the inner copper foil 3a of the lower layer printed circuit board 3. Therefore, in a multi-layer printed circuit board consisting of three or more layers of printed circuit boards, the error in the lamination position is measured for each alignment mark hole 3d formed in the printed circuit board immediately below each upper layer printed circuit board.

[0021] The laser processing apparatus A shown in FIG. 1 is composed of an oscillator a that generates a laser beam f, a galvanometer mirror c that is controlled by a galvanometer scanner b so as to irradiate the laser beam f at a targeted position on the irradiation surface of a certain section of the multilayer printed circuit board 1, an Fθ lens d that irradiates the laser beam f perpendicularly onto the irradiation surface of the multilayer printed circuit board 1, a processing table e on which the multilayer printed circuit board 1 to be processed by the laser beam f that has passed through the Fθ lens d is placed and which can be moved vertically and horizontally in a planar direction to set the multilayer printed circuit board 1 to an appropriate position if necessary, a camera i that photographs the contrast of processing marks inside and outside the boundary between an inner rectangular processing area and an outer rectangular processing area described later, an image processing device j that is integrated with the camera i and processes the image photographed by the camera i, a plurality of mirrors g that form an optical path that reflects and guides the laser beam f from the oscillator a to the galvanometer mirror c and the Fθ lens d to the multilayer printed circuit board 1, and an NC device h that comprehensively controls the oscillator a, the galvanometer scanner b, the image processing device j, and the processing table e.

[0022] The NC device h, which controls each component part in the laser processing device A, controls the operation of an image processing device j that processes the contrast due to differences in processing marks that occur between the inner rectangular processing area and the outer rectangular processing area, and between the inner bottom 3d' of the alignment mark hole 3d in the inner layer copper foil 3a of the lower layer printed board 3 and the surface of the inner layer copper foil 3a around the opening 3e into which the alignment mark hole 3d opens, and records data, in order to measure the error in the stacking position between the stacked upper layer printed board 2 and lower layer printed board 3 in the multilayer printed board 1, so that the center position of the opening 3e can be easily calculated.

[0023] Furthermore, in the NC device h of the laser processing device A, the laser f irradiated from the oscillator a is focused on the surface of the multilayer printed circuit board 1 on the processing table e by the galvanometer mirror c, which is controlled and positioned by the galvanometer scanner b, and the Fθ lens d, thereby performing laser processing. At this time, the operations of the oscillator a, the galvanometer scanner b, and the processing table e are also integrally controlled so as to adopt optimal positions.

[0024] Moreover, the measurement of the deviation of the stacking position between the upper and lower printed boards 2 and 3 stacked in the multilayer printed board 1 is limited to the area of ​​the galvanometer mirror c and the Fθ lens d controlled by the galvanometer scanner b. Therefore, when a plurality of alignment mark holes 3d are provided in the lower layer printed board 3 of one multilayer printed board 1 and the deviation amount of each of the alignment mark holes 3d with the upper layer printed board 2 is measured, each laser processing hole 2c to be provided in the upper layer printed board 2 corresponding to each alignment mark hole 3d in order to measure each deviation amount is outside the area of ​​the Fθ lens d, so that the processing table e itself is moved in the planar direction to correct the set position of the multilayer printed board 1 itself, and the position for drilling each laser processing hole 2c is adjusted.

[0025] Moreover, the NC device h also controls the machining part programs input during machining. Here, the machining part program is made up of at least a machining condition selection command (hereinafter referred to as a "T command"), a machining table positioning command, a machining command, and an error measurement command for the alignment mark hole 3d. First, in the T command, as a processing mode for selecting the processing method in the present invention, a processing route creation command is set for skiving processing in which the upper layer printed circuit board 2 is excavated to expose the alignment mark hole 3d provided in the lower layer printed circuit board 3. Therefore, in response to the T command, the outer dimensions (outer length X1 and outer length Y1) and outer processing pitch (outer processing pitch x1 and outer processing pitch y1) of the outer frame processing area α described below, which is the outer frame processing area, and the inner dimensions (inner length X2 and inner length Y2) and inner processing pitch (inner processing pitch x2 and inner processing pitch y2) of the inner rectangular processing area β described below, which is the inner processing area, as well as the processing route (linear pattern, zigzag pattern, staggered pattern, etc.) are set as processing shape information. Next, the processing table positioning command is set so that the outer rectangular processing area α and the inner rectangular processing area β provided on the surface of the outermost copper foil 2a of the upper layer printed circuit board 2 that forms the multilayer printed circuit board 1 can be positioned directly below the Fθ lens d by moving the processing table e in the vertical and horizontal directions. Furthermore, the processing command is set to select a skiving processing command for drilling a laser hole 2c through to the surface of the inner layer copper foil 3a of the lower layer printed circuit board 3 using a laser f generated from an oscillator a, and a laser processing command for mounting electronic components, etc. on the surface of the upper layer printed circuit board 2 that forms the multilayer printed circuit board 1. Therefore, the skiving processing command is set so that laser irradiation is performed on the inner rectangular processing area β defined so as to include a virtual alignment mark hole opening circle 3D defined with a center position identical to the center position of the opening 3e of the alignment mark hole 3d drilled in the lower layer printed circuit board 3 as a reference, and on the surface of the outermost copper foil 2a on the upper surface of the upper layer printed circuit board 2, and on the lattice points C, C', and C'' provided in the outer rectangular processing area α defined so as to include the inner rectangular processing area β, so as to form processing marks that are different from each other in both the outer rectangular processing area α and the inner rectangular processing area β except for the inner rectangular processing area β. The difference in the processing marks allows the amount of deviation, which is the deviation between the center position of the alignment mark hole 3d actually provided at a predetermined position of the lower layer printed board 3 and the center position of the virtual alignment mark hole opening circle 3D in the upper layer printed board 2, to be accurately measured. In addition, in the case of not performing the skiving process, the processing position of the multilayer printed board 1 placed on the processing table e is corrected and positioned using a correction coefficient for the multilayer printed board 1 as a whole calculated based on the amount of deviation, and then laser processing is performed on the surface of the upper layer printed board 2 of the multilayer printed board 1 to mount electronic components, etc. In addition, the error measurement command for the alignment mark hole 3d is composed of an alignment mark hole measurement command and a post-measurement correction coefficient calculation command. First, the alignment mark hole measurement command is set so that, after the machining table e is made movable in the vertical and horizontal directions, the camera i takes an image of the center position of the virtual alignment mark hole opening circle 3D as the center of the image, and the image processing device j measures the deviation, i.e., the "amount of deviation," between the center position of the opening 3e and the center position of the virtual alignment mark hole opening circle 3D in the upper layer printed circuit board 2 based on the image of the inner bottom 3d' of the actual alignment mark hole 3d provided in the lower layer printed circuit board 3 that is captured therein and the position information of the center of the image, i.e., the designed alignment mark hole 3d. In this case, due to the difference in the processing pitch of the laser irradiation between the outer rectangular processing area α excluding the inner rectangular processing area β and the inner rectangular processing area β, and between the inner rectangular processing area β and the inner bottom 3d' of the actual alignment mark hole 3d included in the inner rectangular processing area β, the processing marks are different due to the shift in the focus of the laser irradiation caused by the difference in the irradiation distance of the laser irradiation, and further, a contrast is generated due to the difference in the processing marks, so that the outline of the inner bottom 3d' of the actual alignment mark hole 3d becomes clear and the central position of the opening 3e of the actual alignment mark hole 3d is accurately grasped. In addition, the correction coefficient calculation command is set to calculate correction coefficients for the position, inclination, expansion / contraction, etc. of the multilayer printed circuit board 1 on the processing table e from the amount of deviation at each alignment mark hole 3d measured from multiple alignment mark holes 3d in the multilayer printed circuit board 1.

[0026] Here, FIG. 2 is a flowchart showing all the operations performed by the laser processing apparatus A, from the operation of measuring the stacking position error for the N alignment mark holes 3d in the multilayer printed circuit board 1 to the laser processing for mounting electronic components, etc. on the upper layer printed circuit board 2 of the final multilayer printed circuit board 1. That is, when starting drilling work for one of the multiple alignment mark holes 3d to be drilled in the lower layer printed circuit board 3 of the multilayer printed circuit board 1, a processing part program is loaded (S00), the data of the loaded processing part program is analyzed, and the data is judged (S10, S40, S60, S110) as described below. Each process is performed, and the processing part program is continued until the laser processing work for mounting electronic components, etc. is completed. First, it is determined whether the read data is a T command (S10). If it is a T command, based on the skiving processing information indicated therein (S20), the coordinate origin positions of the lower layer printed circuit board 3 and the upper layer printed circuit board 2 are aligned, and based on the coordinate position information of the alignment mark hole 3d actually provided at a predetermined position of the lower layer printed circuit board 3, a virtual alignment mark hole opening circle 3D is set at the coordinate position of the alignment mark hole 3d for the upper layer printed circuit board 2. Then, an inner rectangular processing area β that is circumscribed and has the same center with the virtual alignment mark hole opening circle 3D, and an outer rectangular processing area α that includes the inner rectangular processing area β and has the same center are defined. Then, each of the areas α and β is partitioned by vertical and horizontal lattice points C, C', and C'', and a processing route for irradiating the laser to the lattice points C, C', and C'' is obtained, and the processing route is recorded to create a processing route table B (S30). The method of creating the processing route table B will be described later. After the machining route table B is created, the process loops and proceeds to the next step (S40). Next, it is determined whether the read data is a machining table positioning command (S40), and if so, position information of the center of the opening 3e of the alignment mark hole 3d in the lower layer printed board 3 of the multilayer printed board 1 placed and fixed on the machining table e is obtained, and the machining table e is appropriately moved up, down, left, and right based on the position information of the alignment mark hole 3d, and the machining table e is positioned so that the upper layer printed board 2 of the multilayer printed board 1 is located at a position that serves as a reference for laser irradiation (S50). Then, after the positioning of the machining table e is completed, the process loops and proceeds to the next step, that is, judgment of the machining command (S60). Furthermore, it is determined whether the next data read is a machining command (S60). If it is a command related to skiving (S70), the machining route recorded in the machining route table B created in S30 is used to automatically control the position of the galvano mirror c by the galvano scanner b, and skiving is performed to drill the laser machining hole 2c (S80, S90). Then, the laser is irradiated along all of the processing routes recorded in the processing route table B, and the laser irradiation is repeated to drill the laser processing hole 2c until the internal copper foil 3a of the lower layer printed circuit board 3 is exposed. After the excavation work of exposing the opening 3e of the first alignment mark hole 3d by the laser-machined hole 2c is completed, the process loops back to obtain position information of the center of the opening 3e of the next alignment mark hole 3d in the same manner as in the excavation work for the first alignment mark hole 3d, and the process table e is positioned (S50) by a process table positioning command (S40). After the positioning of the process table e is completed, the process loops back to the next step (S60) and performs the same excavation work as described above. The process is repeated in the same manner for all N alignment mark holes 3d drilled in one multilayer printed circuit board 1, and after the excavation work for all N alignment mark holes 3d is completed, the process loops back to the next step (S110). Next, it is determined whether the read data is a measurement command (S110). If it is a measurement command, the machining table e is positioned so that the center of the inner rectangular machining area β, i.e., the center of a virtual alignment mark hole opening circle 3D set at a position with the same position information on the upper layer printed circuit board 2 based on the position information of the alignment mark hole 3d actually provided at a predetermined position on the lower layer printed circuit board 3, is located directly under the camera i (S120). The camera i photographs the center of the inner rectangular machining area β, i.e., the center of the virtual alignment mark hole opening circle 3D, with the image processing device j using the contrast generated between the outer rectangular machining area α excluding the inner rectangular machining area β and the inner rectangular machining area β to clarify the contrast generated between the inner rectangular machining area β and the inner bottom 3d' of the alignment mark hole 3d included in the inner rectangular machining area β. Then, the center position is calculated from the shape of the actual alignment mark hole 3d provided in the lower layer printed circuit board 3 shown in the image, and the deviation, i.e., the amount of deviation between that center position and the center position of the shooting center position, i.e., the center position of the virtual alignment mark hole opening circle 3D set in the upper layer printed circuit board 2, is measured and recorded (S130). Then, after the measurement of the "deviation amount" is completed, it is determined whether the subsequent command is for calculating a correction coefficient (S140), and if so, a correction coefficient for correcting the processing position of the multilayer printed circuit board 1 is calculated from the deviation amounts measured for all alignment mark holes 3d. After the correction coefficient is calculated, the process loops and proceeds to a processing command (S60). The read data is determined to be a machining command (S60), and then determined to not be a skiving machining command (S70). Then, it is determined whether the machining position of the upper layer printed circuit board 2 for performing laser machining to mount electronic components, etc. has been corrected using the correction coefficient (S100-1). If it has not been corrected, the process loops to a machining table positioning command (S40), where the machining position of the upper layer printed circuit board 2 for performing laser machining to mount electronic components, etc. is corrected using the correction coefficient calculated from the "deviation amount", and then the machining table is positioned (S50). Then, the process loops again in the same manner as above to determine whether it is a machining command (S60) or a skiving machining command (S70), and the position is set using the galvano scanner b, and laser machining to mount electronic components, etc. is performed (S100). In this manner, a series of operations is completed, from measuring the amount of misalignment between the upper layer printed board 2 and the lower layer printed board 3 that form the multilayer printed board 1, to laser processing for mounting electronic components, etc., on the multilayer printed board 1.

[0027] Therefore, the amount of deviation in the stacking position between the upper and lower printed boards 2 and 3 that form the multilayer printed board 1 (see FIG. 3) according to the first embodiment of the present invention is measured, and the amount of deviation is corrected as follows.

[0028] That is, Step 1: A machining part program S00 (including at least a T command, a machining table positioning command, a machining command, and an alignment mark measurement command) is read into the control mechanism of an NC device h. Step 2: Based on the T command, within the control mechanism of the NC device h that controls the laser irradiation, a (tentative) inner rectangular processing area β' and an outer rectangular processing area α of the size specified in the design are defined on the surface of the outermost copper foil 2a of the upper layer printed circuit board 2 of the multilayer printed circuit board 1, using the following procedure. (a) For both the lower layer printed circuit board 3 and the upper layer printed circuit board 2, the same arbitrary position is used as the reference. (b) Based on position information of the center position of the alignment mark hole 3d actually provided in the lower layer printed circuit board 3 and information on the diameter length of its opening 3e when viewed in a plane, a virtual alignment mark hole opening circle 3D of the same size as the opening 3e is set on the outermost copper foil 2a of the upper layer printed circuit board 2, with the position information of the center position of the alignment mark hole 3d as its center. (c) An inner rectangular processing area β is defined whose center is the same as the center position of the virtual alignment mark hole opening circle 3D provided on the upper layer printed circuit board 2 and which is circumscribed about the virtual alignment mark hole opening circle 3D. (iv) An outer rectangular machining area α is defined, the outer rectangular machining area α being centered at the same position as the inner rectangular machining area β and including the inner rectangular machining area β. Step 3: In the rectangular external machining area α, a lattice table consisting of lattice points having a constant pitch vertically and horizontally is created in the following procedure. (a) In the outer rectangular processing area α on the surface of the outermost copper foil 2a of the upper layer printed circuit board 2, the vertical and horizontal lengths are divided by the designated pitch (hereinafter referred to as the "designated pitch"), which is the center-to-center distance between adjacent laser irradiated surfaces specified as a design value, to obtain the lattice spacing in integers that are closest to this, thereby calculating the lattice spacing in each vertical and horizontal direction (hereinafter referred to as the "lattice pitch"). (b) On the surface of the upper layer printed circuit board 2, a lattice table is created that is made up of lattice points C having the above-mentioned lattice pitch in both the vertical and horizontal directions. Step 4: Among the lattice points C set in the outer rectangular machining area α, the area outside the boundary line of the inner rectangular machining area β and connecting the lattice point C' that is closest to the boundary line is set as a (tentative) inner rectangular machining area β'. Step 5: Within the (tentative) inner rectangular machining area β', a grid table consisting of lattice points C" having a constant pitch vertically and horizontally, although the lattice pitch is different from that of the lattice points C set in the outer rectangular machining area α, is created by the following procedure. (a) Calculate the vertical and horizontal lattice pitches of the inner rectangular machining area β' so that they are less than half the laser irradiation diameter and the number of lattice intervals is an integer. At this time, the vertical (inner machining pitch y) and horizontal (inner machining pitch x) lattice pitches in the inner rectangular machining area β' are different from the vertical (outer machining pitch Y) and horizontal (outer machining pitch X) lattice pitches in the outer rectangular machining area α in at least one of the vertical and horizontal directions. In other words, it is necessary to satisfy at least either X≠x or Y≠y. However, when X≠Y, cases where X=y and Y=x are satisfied are excluded. (b) Lattice points C' at the four corners of the inner rectangular machining area β' are set as fixed points, and lattice points C'' are set in the vertical and horizontal directions at lattice pitches of inner machining pitch y and inner machining pitch x. (c) In the inner rectangular machining area β', a lattice table is set by the lattice points C' at the four corners and the lattice points C" set by the inner machining pitch y and the inner machining pitch x. Therefore, on the lattice table within the range of the outer rectangular machining area α, lattice tables having different pitches are set so as to overlap within the range of the (provisional) inner rectangular machining area β'. In steps 2 to 5, in this embodiment, an inner rectangular machining area β is set, then an outer rectangular machining area α is set, and a lattice table is created within the outer rectangular machining area α, and then a lattice table is created within the inner rectangular machining area β'. However, it is also possible to reverse the order in which the inner rectangular machining area β' and the outer rectangular machining area α are set, and the order in which each lattice table is created. Step 6: Using the lattice tables of the outer rectangular machining area α and the inner rectangular machining area β' for which the lattice tables have been created, a machining route table B is created that records the machining route for performing the skiving process integrally and continuously. This machining route can be linear or zigzag throughout the entire outer rectangular machining area α and the inner rectangular machining area β', or the shape of the machining route table B can be different inside and outside the inner rectangular machining area β', or the shape can be different only in a part near the boundary line inside and outside the area. A specific method for forming the machining route table B in a straight line will be described later. Step 7: Along with the positioning of the processing table e, the position of the galvanometer mirror c controlled by the galvanometer scanner b is automatically controlled in the following procedure. (i) By a processing position command, the coordinates of the center position of the virtual alignment mark hole opening circle 3D provided on the upper layer printed circuit board 2 of the multilayer printed circuit board 1 are obtained, and based on the position information of the coordinates, the processing table e is moved to a position where the center of the virtual alignment mark hole opening circle 3D to be processed first becomes the reference for laser irradiation. (b) The position of the galvanometer mirror c is automatically controlled by the galvanometer scanner b so that the laser can be irradiated using the processing route table B created in step 6. Step 8: According to the processing sequence recorded in the processing sequence table B created in step 6, laser irradiation is repeated on the lattice points C, C' and C" in the outer rectangular processing area α and the inner rectangular processing area β' until the laser processing hole 2c reaches the surface of the inner layer copper foil 3a, thereby exposing the opening 3e of the alignment mark hole 3d provided in the lower layer printed circuit board 3 (see Figure 5). Incidentally, Figure 5 is a vertical cross-sectional view of the opening position of the alignment mark hole 3d in the multilayer printed circuit board 1, where (a) is the situation before the start of laser irradiation, (b) is the situation in the middle of excavating the alignment mark hole 3d, and (c) is the situation after the alignment mark hole 3d has been excavated and its inner bottom 3d' has been exposed. As a result, the machining marks formed in the portion of the surface of the inner layer copper foil 3a corresponding to the outer rectangular processing area α excluding the inner rectangular processing area β' (which may include part of the inner bottom 3d' of the alignment mark hole 3d if the deviation is large) and the inner rectangular processing area β' differ from each other due to the difference in machining pitch, and the machining marks formed in the portion of the surface of the inner layer copper foil 3a corresponding to the inner rectangular processing area β' and the inner bottom 3d' of the alignment mark hole 3d opening therein differ from each other due to the deviation in focus of the laser irradiation caused by the difference in irradiation distance, so that a clear contrast is generated in the image processing by the image processing device j in step 10. Therefore, the outline of the inner bottom 3d' of the alignment mark hole 3d included in the inner rectangular processing area β' becomes clear. Step 9: Repeat the same process for all N alignment mark holes 3d provided in the lower layer printed boards 3 of one multilayer printed board 1 to expose the openings 3e of the alignment mark holes 3d provided in the lower layer printed boards 3. Step 10: The amount of misalignment between the lower layer printed board 3 and the upper layer printed board 2 in the multilayer printed board 1 is measured. (a) In response to a measurement command (S110), the machining table e is positioned so that the center of the inner rectangular machining area β', i.e., the center position of the virtual alignment mark hole opening circle 3D of the upper layer printed circuit board 2 described above, is directly under the camera i. (b) The camera i captures an image with the center of the virtual alignment mark hole opening circle 3D as the center of the image capture, and the captured image is processed by an image processing device j to determine the center position of the opening 3e of the actual alignment mark hole 3d provided in the lower layer printed circuit board 3. (c) The distance between the center position of the opening 3e of the actual alignment mark hole 3d and the center position of the virtual alignment mark hole opening circle 3D, which is the center of the shooting, i.e., the amount of deviation between the upper layer printed circuit board 2 and the lower layer printed circuit board 3, is measured and recorded. (iv) For all of the N alignment mark holes 3d provided in the lower layer printed board 3 of one multilayer printed board 1, the processing table e itself is moved appropriately to measure and record the amount of deviation. Step 11: A correction coefficient is calculated from the measured and recorded deviation amounts for each of the N alignment mark holes 3d. Through the above steps 1 to 11, the skiving process is performed on multiple alignment mark holes 3d in one multilayer printed board 1, thereby completing the work of measuring the amount of misalignment, i.e., the error in the stacking position of the upper layer printed board 2 and the lower layer printed board 3, and a correction coefficient is calculated for laser processing to mount electronic components, etc. on the multilayer printed board 1, and the processing position of the multilayer printed board 1 on the processing table e is corrected using the correction coefficient.

[0029] FIG. 4 shows a processing route table B which integrally and continuously connects lattice points C, C' and C" of the lattice table of the outermost copper foil 2a of the upper layer printed circuit board 2 which forms the multilayer printed circuit board 1 in step 6, in order to drill a laser processed hole 2c in the outermost copper foil 2a of the upper layer printed circuit board 2 which forms the multilayer printed circuit board 1, and expose an opening 3e of the alignment mark hole 3d which opens in the surface of the inner layer copper foil 3a.

[0030] That is, the lattice points C, C' and C" created in the outer rectangular processing area α and the (provisional) inner rectangular processing area β' defined on the surface of the outermost copper foil 2a of the upper layer printed circuit board 2 forming the multilayer printed circuit board 1 indicate the center position of the laser irradiation, and each of the lattice points C, C' and C" is given a coordinate (hereinafter, for example, in the coordinate P (nm) of the outer rectangular processing area α, n means the horizontal X-coordinate value, m means the vertical Y-coordinate value, and in the coordinate IP (ij) of the (provisional) inner rectangular processing area β', i means the horizontal X-coordinate value, and j means the vertical Y-coordinate value).). Therefore, taking the outer rectangular machining area α and (tentative) inner rectangular machining area β' shown in FIG. 4 as an example, in the outer rectangular machining area α, the coordinate P(1.1) is assigned to the lattice point C at the lower left corner in FIG. 4, and from there, at the outer machining pitch X, the X coordinate values ​​of 2 to 11 are assigned to each lattice point C in the horizontal direction, and the Y coordinate values ​​of 2 to 11 are assigned to each lattice point C in the vertical direction. The diagonal lattice point C of P(1.1) is set as P(11.11), and coordinates are assigned to all lattice points C in accordance with the above rule. In addition, in the (provisional) inner rectangular machining area β', of the lattice points C' that form its boundary, the lattice point C' at the bottom left corner in FIG. 4 is assigned the coordinate IP(1.1), and from there, at the inner machining pitch x, the X coordinate values ​​of 2 to 5 are assigned to each lattice point C" in the horizontal direction, and the Y coordinate values ​​of 2 to 5 are assigned to each lattice point C" in the vertical direction. The lattice point C' on the diagonal of the lattice point C' at the coordinate position IP(1.1) is set as IP(5.5), and coordinates are assigned to all lattice points C' and C" in accordance with the above rules. As a result, the lattice point C', which is the lattice point C of the outer rectangular machining area α and is also the lattice point of the (provisional) inner rectangular machining area β', is the lattice point C' at the four corners of the (provisional) inner rectangular machining area β', as shown in Figure 4, at coordinate positions IP(1.1), IP(5.1), IP(5.5), and IP(1.5). For example, the lattice point C' at the coordinate position of P(2.2) is also the lattice point C' of IP(1.1), and so double coordinates are assigned. In FIG. 4, the distance between lattice points CC within the outer rectangular machining area α, i.e., the vertical and horizontal outer machining pitch X and outer machining pitch Y, are set equal, and the distance between lattice points C'-C" (or lattice points C"-C") of the (provisional) inner rectangular machining area β', i.e., the vertical and horizontal inner machining pitch x and inner machining pitch y, are also set equal, but the outer machining pitch X is set to be shorter than the inner machining pitch x. Incidentally, the outer shape machining pitch and the inner shape machining pitch do not have to be equal, and there is no need for the vertical and horizontal pitches to be equal. However, when the outer shape machining pitch X and the inner shape machining pitch y are equal, and the outer shape machining pitch Y and the inner shape machining pitch x are equal, in each lattice formed by the lattice points C to C" which are the irradiation positions of each laser irradiation in the outer shape rectangular machining area α and the (provisional) inner shape rectangular machining area β', the shapes of the lattice formed in the outer shape rectangular machining area α and the lattice formed in the (provisional) inner shape rectangular machining area β' are the same just by rotating 90 degrees, so there is no difference in the machining marks caused by the laser irradiation. Therefore, in the relationship between the outer shape machining pitch and the inner shape machining pitch, the above-mentioned case is excluded.

[0031] Then, the machining route table B is as follows. First, starting from the lattice point C in the outer rectangular machining area α, which is the coordinate position of P(1.1), a route is formed horizontally by connecting the lattice points C in order to the lattice point C in the coordinate position of P(11.1). At the lattice point C in the coordinate position of P(11.1), go to the lattice point C in the row above which is the coordinate position of P(11.2), and from there, a route is formed in reverse by connecting the lattice points C in order to the lattice point C in the row above which is the coordinate position of P(1.2). Then, at the lattice point C in the coordinate position of P(1.2), go to the lattice point C in the row above which is the coordinate position of P(1.3), and from there, a route is formed in reverse by connecting the lattice points C in order to the lattice point C' in the coordinate position of P(2.2). The lattice point C' at the coordinate position P(2.2) is also the lattice point C' having the coordinate position IP(1.1) which defines the four corners of the (tentative) inner rectangular machining area β', and a route is formed horizontally by connecting the lattice points C" in order from there along the outer edge of the (tentative) inner rectangular machining area β' to the lattice point C' at the coordinate position IP(5.1). The lattice point C' at the coordinate position IP(5.1) is also the lattice point C' at the coordinate position P(9.2) of the outer rectangular machining area α, and a route is formed horizontally by connecting the lattice points C in order from there to the lattice point C at the coordinate position P(11.3). Then, as before, it goes to the lattice point C one row above with the coordinate position (P11.4), turns around there and goes to the lattice point C with the coordinate position P(10.4). Here, since the arrangement of lattice points C in the outer rectangular machining area α and the arrangement of lattice points C" in the (tentative) inner rectangular machining area β' are not in a straight line, it is determined whether lattice point C" at coordinate position IP(5.2) is closer to lattice point C at coordinate position P(10.4) or to lattice point C at coordinate position P(10.5) one row above that.In the example of FIG. 4, since the lattice point C at the coordinate position P(10.4) is closer to the lattice point C" at the coordinate position IP(5.2), a route is formed to the lattice point C" at the coordinate position IP(5.2). Further, by connecting the lattice points C" in order, a route is formed horizontally to the lattice point C" at the coordinate position IP(1.2), and a route is formed toward the lattice point C of the outer rectangular machining area α. In this case, the distance between the lattice points C at the coordinate positions P(2.4) and P(2.5) is compared in the same manner as described above, and since the lattice point C at the coordinate position P2.4 is naturally closer in FIG. 4, a route is formed toward the lattice point C at the coordinate position P(2.4). Furthermore, a route is formed to each of the lattice points C at coordinate positions P(2.4) → P(1.4) → P(1.5) → P(2.5). However, even here, since the arrangement of the lattice points C in the outer rectangular machining area α and the arrangement of the lattice points C" in the (provisional) inner rectangular machining area β' are not in a straight line, it is determined whether the lattice point C" at coordinate position IP(1.3) is closer to the lattice point C at coordinate position P(2.5) or the lattice point C at coordinate position P(2.6). In Figure 4, the lattice point C at coordinate position P(2.6) is closer to the lattice point C at coordinate position P(2.6). Since C is closer, a route is formed from lattice point C at coordinate position P(2.5), skipping lattice point C" in the (tentative) inner rectangular machining area β', to lattice point C at coordinate position P(10.5), which is lattice point C of the outer rectangular machining area α.After that, a route is similarly formed connecting lattice point C of the outer rectangular machining area α and lattice points C' and C" of the (tentative) inner rectangular machining area β', and finally a route is formed to lattice point C at coordinate position P(11.11). With regard to the lattice points C and C' set within the (tentative) inner rectangular machining area β', none of them are involved in forming the machining route B except for the lattice points C' that define the four corners of the (tentative) inner rectangular machining area β', i.e., the lattice points C' at the coordinate positions IP(1.1), IP(5.1), IP(5.5), and IP(1.5).

[0032] In forming this processing route B, in order to reduce the number of operations for positioning the galvanometer mirror c by the galvanometer scanner b, the processing route B is formed so as to have a length as short as possible overall, and the movement path from the start point to the end point of the route does not pass through the same lattice points C to C'' multiple times. That is, in the processing path B shown in FIG. 4, since the overall length of the processing path B is short, the number of operations for positioning the galvanometer mirror c by the galvanometer scanner b is reduced, and the time required for excavating the alignment mark hole 3d can be shortened. Also, by preventing the laser irradiation position from passing through the same lattice points C to C" multiple times, variable factors other than the difference in processing pitch between the outer rectangular processing area α and the (provisional) inner rectangular processing area β' are eliminated, making it possible to distinguish the differences in processing marks caused by laser irradiation between the outer rectangular processing area α and the (provisional) inner rectangular processing area β', as well as between the (provisional) inner rectangular processing area β' and the inner bottom 3d' of the alignment mark hole 3d included in the (provisional) inner rectangular processing area β'.

[0033] As described above, on the surface of the outermost copper foil 2a of the upper layer printed circuit board 2 in the multilayer printed circuit board 1, the outer rectangular processing area α and the (tentative) inner rectangular processing area β' are defined, and the processing route table B is created and recorded using the lattice points C, C' and C" of the lattice table formed in both areas α and β'. Laser irradiation is repeated according to the processing route recorded in the recorded processing route table B, and the laser processing hole 2c is excavated by skiving until the inner layer copper foil 3a is exposed. As a result, in each area Since the processing pitches at α and β' are different, even if the laser is irradiated with the same output and the irradiated target is the same copper foil, different processing marks will be formed between the part that falls within the outer rectangular processing area α excluding the (tentative) inner rectangular processing area β' and the part that falls within the (tentative) inner rectangular processing area β', as well as between the (tentative) inner rectangular processing area β' and the inner bottom 3d' of the alignment mark hole 3d within the (tentative) inner rectangular processing area β, due to the processing pitch in the laser irradiation and the shift in the focus of the laser irradiation caused by differences in the irradiation distance. That is, in this embodiment 1, the processing pitch of the laser irradiation is made different in order to form different processing marks in the (tentative) inner rectangular processing area β' and the outer rectangular processing area α excluding the (tentative) inner rectangular processing area β'. Therefore, different processing marks are formed between the (tentative) inner rectangular processing area β' and the outer rectangular processing area α excluding the (tentative) inner rectangular processing area β'. In addition, between the (tentative) inner rectangular processing area β' and the inner bottom 3d' of the alignment mark hole 3d in the inner rectangular processing area β', the focus of the laser irradiation is adjusted to the surface of the inner layer copper foil 3a, so that the processing marks are different at the inner bottom 3d of the alignment mark hole 3d separated from the surface of the inner layer copper foil 3a due to deviation from the focus of the irradiated laser. As a result, contrast is generated between the (tentative) inner rectangular processing area β' and the outer rectangular processing area α excluding the (tentative) inner rectangular processing area β', and between the (tentative) inner rectangular processing area β' and the inner bottom 3d' of the alignment mark hole 3d in the inner rectangular processing area β'. During image processing, the contrast that occurs between the (tentative) inner rectangular machining area β' and the outer rectangular machining area α excluding the (tentative) inner rectangular machining area β' emphasizes the contrast that occurs between the (tentative) inner rectangular machining area β' and the inner bottom 3d' of the alignment mark hole 3d in the (tentative) inner rectangular machining area β', thereby making the outline of the inner bottom 3d' of the alignment mark hole 3d in the (tentative) inner rectangular machining area clear. Therefore, by photographing the inside of the laser-machined hole 2c with camera i, the position of the inner rectangular machining area can be determined, and the outline of the inner bottom 3d' of the alignment mark hole 3d relative to the surface of the inner layer copper foil 3a where the opening 3e of the alignment mark hole 3d opens can be clearly photographed. In addition, even if the opening 3e of the actual alignment mark hole 3d in the (provisional) inner rectangular processing area β' on the surface of the inner layer copper foil 3a is shifted from the virtual alignment mark hole opening circle 3D and only a part of the opening 3e is captured in the image, as described above, in the same inner rectangular processing area β', the processing marks are different due to the shift in the focus of the irradiated laser due to the separation between the inner bottom 3d' of the alignment mark hole 3d and the surface of the inner layer copper foil 3a in the (provisional) inner rectangular processing area β', even though the same material is processed by the same laser irradiation in the same inner rectangular processing area β', so a contrast of light and dark occurs between the two. Therefore, by utilizing the contrast with the outer rectangular processing area α, the position of the (provisional) inner rectangular processing area β' is defined, and the outline of the inner bottom 3d' of the alignment mark hole 3d relative to the surface of the inner layer copper foil 3a can be made clear (the same applies to Examples 2 and 3 below). In this manner, the amount of deviation between the center position of the virtual alignment mark hole opening circle 3D provided on the upper layer printed circuit board 2 and the center position of the actual alignment mark hole 3d can be accurately measured.

[0034] Then, similar measurements of the amount of misalignment are performed for the multiple alignment mark holes 3d drilled in one multilayer printed circuit board 1, and a correction coefficient is calculated based on each of the measured amounts of misalignment. Based on this correction coefficient, the position, inclination, expansion / contraction, etc. of the multilayer printed circuit board 1 on the processing table are corrected when laser processing is performed on the upper layer printed circuit board 2 to mount electronic components, etc. As a result, the processing position for the outermost copper foil 3a on the top surface of the upper layer printed circuit board 2 of the multilayer printed circuit board 1 fixed to the processing table e is accurately positioned, so that electronic components, etc. can be accurately mounted by laser processing the outermost copper foil 3a of the multilayer printed circuit board 1, and electricity can be reliably passed through the mounted electronic components, etc.

[0035] Furthermore, for a plurality of alignment mark holes 3d drilled in one multilayer printed circuit board 1, an outer rectangular machining area α and an inner rectangular machining area β (β') of the same size and shape are formed, and the same lattice points C, C' and C" are set to form the same machining route table B. Therefore, by moving the machining table e to set the multilayer printed circuit board 1 to a position where each alignment mark hole 3d can be drilled, the machining route table B can be used in common for all of the alignment mark holes 3d, and it is possible to easily and quickly measure the amount of deviation due to drilling of a plurality of alignment mark holes 3d in one multilayer printed circuit board, and further to calculate a correction coefficient.

[0036] In this embodiment, rectangular areas are set, such as the inner rectangular machining area β (β') and the outer rectangular machining area α, but they are not necessarily limited to rectangular shapes, and it is sufficient as long as a double area in which different machining marks are generated is created, such as the inner machining area β (β') circumscribing the imaginary alignment mark hole opening circle 3D, and the outer machining area α including the inner machining area β (β'). Furthermore, if different machining marks can be generated in each of the double areas, it is not necessary to be concerned with the difference in the grating pitch, and it is also possible to use other differences in the laser irradiation conditions. EXAMPLES

[0037] Fig. 6 shows a machining route table formed different from the machining route table shown in Fig. 4. Here, the method of setting the inner and outer rectangular machining areas α and β and the method of setting the lattice points C, C' and C" therein are the same as in the first embodiment, but only the machining route of the lattice points to be irradiated with the laser is different. In this embodiment 2, the length of the movement path from the start point to the end point of the route is longer than in the case of embodiment 1, but the movement of the galvanometer mirror c during laser irradiation is smaller, so that the operational burden on the laser processing device A itself can be reduced. However, at least in the processing route of embodiment 2, it is arranged not to pass through the same lattice points C to C" multiple times. EXAMPLES

[0038] Furthermore, Fig. 7 shows a machining route table formed different from the machining route tables shown in Fig. 4 and Fig. 6. In the machining route table of this embodiment, a compromise machining route between the first and second embodiments is adopted in order to reduce the length of the movement route and the magnitude of the movement of the galvanometer mirror c. However, in the machining route tables shown in Examples 2 and 3, as shown in Example 1, the movement path from the start point to the end point of the route does not pass through the same lattice points C to C" multiple times, and variable factors other than the difference in machining pitch between the outer rectangular machining area α excluding the (tentative) inner rectangular machining area β' and the (tentative) inner rectangular machining area β' are eliminated, making it possible to distinguish the differences in the machining marks caused by laser irradiation in each area of ​​the outer rectangular machining area α excluding the (tentative) inner rectangular machining area β' and the (tentative) inner rectangular machining area β'. [Industrial Applicability]

[0039] The error in the stacking position between the printed circuit boards of each layer that forms a multilayer printed circuit board can be corrected not only in an outer rectangular processing area, but also by forming an inner rectangular processing area within it and irradiating both of them with a laser to form different processing marks, thereby forming a contrast between the outer rectangular processing area excluding the inner rectangular processing area and the inner rectangular processing area, and between the inner rectangular processing area and the inner bottom of the alignment mark hole in the inner rectangular processing area, thereby clarifying the outline of the inner bottom of the alignment mark hole.The error between the center position of the alignment mark hole actually provided in the lower layer printed circuit board and the position where the center of the alignment mark hole is assumed to exist in the upper layer printed circuit board can be accurately and easily measured and understood.Therefore, in laser processing for mounting electronic components, etc. in a multilayer printed circuit board formed from not only two-layer but more than two-layer printed circuit boards, the laser processing position can be accurately corrected, and the occurrence rate of electrical failures, etc. can be suppressed when electronic components, etc. are mounted on the multilayer printed circuit board and used. [Explanation of symbols]

[0040] 1 Multilayer printed circuit board 2 Upper layer printed circuit board 2a Outermost layer copper foil 2b Insulating layer 2c Laser-machined holes 3 Lower layer PCB 3a Inner layer copper foil 3b Insulating layer 3c Outermost layer copper foil 3d alignment mark hole 3D Virtual Alignment Mark Hole Opening Circle 3d' (Alignment mark hole) inner bottom 3e opening 100 Multilayer Printed Circuit Board 101 Upper layer printed circuit board 101' Laser drilled hole 102 Outermost layer copper foil 103 Insulating layer 104 Lower layer printed circuit board 105 Inner layer copper foil 106 Insulating Layer 107 Outermost layer copper foil 108 Alignment Mark A Laser processing equipment for multi-layer printed circuit boards A. Oscillator b Galvano scanner c Galvano mirror d Fθ lens e Processing table f Laser G Mirror h NC device iCamera j Image processing device B Machining route table C Grid points (of the rectangular machining area) C' [(provisional) inner rectangular machining area boundary approximation] lattice point C” (Grid point of inner rectangular machining area) α Outer rectangular machining area β Internal rectangular machining area β' (tentative) internal rectangular machining area

Claims

1. In a multilayer printed circuit board formed by integrally joining a lower layer printed circuit board and an upper layer printed circuit board onto the lower layer printed circuit board, In the lower layer printed circuit board, an outermost copper foil is disposed on the lower surface side with an insulating layer sandwiched therebetween, and an inner layer copper foil is disposed on the upper surface side, with the inner bottom being the outermost copper foil on the lower surface side, and a hollow alignment mark hole is drilled with its opening opening on the surface of the inner layer copper foil, In the upper layer printed circuit board, an outermost copper foil is disposed on the upper surface side of the insulating layer, First, on the outermost copper foil surface of an upper layer printed circuit board forming a multilayer printed circuit board, an inner rectangular processing area is defined so as to include at least a virtual alignment mark hole opening circle set at a position corresponding to the center position of an opening of an alignment mark hole drilled in a lower layer printed circuit board, and an outer rectangular processing area is defined so as to include the inner rectangular processing area; Next, in the outer rectangular processing area excluding the inner rectangular processing area and in the inner rectangular processing area, lattice points to be irradiated with a laser are provided within a range of half the laser beam diameter or less and at different pitches in both areas, and a processing route is formed that sequentially connects the lattice points provided in both areas together, and a laser processing hole is provided that exposes an inner layer copper foil on an upper surface of a lower layer printed circuit board by irradiating each lattice point with a laser according to the processing route, Then, from an image of the inside of the laser-machined hole photographed with the center position of the virtual alignment mark hole opening circle set in the upper layer printed circuit board as the photographing center, the contour of the inner bottom of the actual alignment mark hole is clarified from the contrast due to machining marks formed by laser irradiation of lattice points with different pitches between the outer rectangular machining area excluding the inner rectangular machining area and the inner rectangular machining area, and the contrast due to machining marks formed by the difference in irradiation distance of laser irradiation between the inner rectangular machining area and the inner bottom of the actual alignment mark hole in the inner rectangular machining area, and the distance between the photographing center position and the center of the opening of the actual alignment mark hole drilled in the lower layer printed circuit board is measured as the error in the stacking position of the upper layer printed circuit board and the lower layer printed circuit board.

13. A method for measuring an error in stacking position between each printed circuit board stacked in a multi-layer printed circuit board, comprising:

2. In the outer rectangular processing area excluding the inner rectangular processing area and in the inner rectangular processing area, a processing route is formed by sequentially connecting lattice points provided in both areas, and a laser is irradiated to each lattice point according to the processing route to form a laser processing hole that exposes an inner layer copper foil on an upper surface of a lower layer printed circuit board, First, in order to create a lattice table in a rectangular outer processing area on the surface of the outermost copper foil of a top-layer printed circuit board in a control mechanism for controlling laser irradiation, (a) First, in the outermost rectangular processing area defined on the copper foil surface of the upper layer printed circuit board, the vertical and horizontal lengths of the outer rectangular processing area, designated as design values, are divided by the designated pitch, which is the center-to-center distance between adjacent laser irradiation surfaces and designated as design values, to determine the integer lattice spacing number that is closest to this, and calculate the lattice spacing in each vertical and horizontal direction (hereinafter referred to as the "outer lattice pitch"). (b) Next, a grid table is created on the surface of the upper layer printed circuit board, the grid table being made up of grids having the above-mentioned external grid pitch in both the vertical and horizontal directions. Secondly, in a control mechanism for controlling laser irradiation, a lattice table is created in the inner rectangular processing area on the outermost copper foil surface of the upper layer printed circuit board, (a) In an inner rectangular processing area defined on the outermost copper foil surface of an upper layer printed circuit board, calculate the lattice spacing in each vertical and horizontal direction (hereinafter referred to as the "inner lattice pitch"), which is an integer lattice spacing number and is a lattice pitch different from the outer lattice pitch in the outer rectangular processing area. (b) Next, a lattice table is imagined on the surface of the upper layer printed circuit board, which is made up of lattices having the above-mentioned internal lattice pitch in both the vertical and horizontal directions. Thirdly, in a control mechanism for controlling the irradiation of the laser, a processing route is created which sequentially connects together the lattice points provided in the outer rectangular processing area excluding the inner rectangular processing area and the lattice points provided in the inner rectangular processing area for each lattice table created in the outer rectangular processing area and the inner rectangular processing area, and then the processing route is recorded.

2. A method for measuring errors in stacking positions between stacked printed circuit boards in a multi-layer printed circuit board according to claim 1.

3. When creating the above machining route table, Among the lattice points provided in the outer rectangular machining area, a line connecting lattice points that are closest to the outside of the boundary line with the inner rectangular machining area is defined as a new inner rectangular machining area, and lattice points having an inner lattice pitch are provided vertically and horizontally between the lattice points at the four corners of the new inner rectangular machining area, thereby creating a lattice table in the inner rectangular machining area.

3. A method for measuring an error in stacking position between stacked printed circuit boards in a multi-layer printed circuit board according to claim 2.

Images