Circuit board and manufacturing method therefor

Abstract

To provide a circuit board that secures a packaging assemblability by improving a substrate structure so as to protect a solder ball connection part that provides a coupling between packages from a bleeding of an under fill material, and provide a manufacturing method therefor.SOLUTION: A circuit board includes: an insulation layer that has a first surface and a second surface that are faced each other, and includes a trench part that is concaved so as to be concaved from the first surface; a first connection pad that is embedded into the insulation layer, and is exposed from the insulation layer on the first surface; and a first protection layer that covers the insulation layer with the first surface, and is opened so as to expose a first connection pad and the trench part.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a circuit board and a manufacturing method thereof, and more particularly to a circuit board in which packaging assembly is ensured by improving a board structure, and a manufacturing method thereof. [Background technology]

[0002] Electronic products tend to become smaller and more multifunctional, which in turn leads to advances in packaging technology. In particular, Package-on-Package (POP) structures play an important role in improving the performance and functionality of electronic products. The POP structure integrates various functions to enable miniaturization, and is made up of multi-layer packages that connect upper and lower packages. This connection is primarily made using solder balls, which provide the electrical and mechanical connection between the packages while maintaining the electrical conductivity of each package.

[0003] However, in a POP structure, when an interposer board and a memory board are mounted one above the other and connected using solder balls, certain problems occur. It has been discovered that when an underfill is injected after a lower package is connected to an upper package with solder balls, the underfill components tend to bleed into the solder ball joints. Since this bleeding phenomenon can reduce reliability between packages and affect the performance of electronic products, there is an increasing need for improved packaging techniques to solve this problem. Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention has been made in consideration of the above-mentioned problems in conventional circuit boards, and an object of the present invention is to provide a circuit board and a manufacturing method thereof that ensure packaging assemblability by improving the board structure so as to protect solder ball joints, which provide connections between packages, from bleeding of underfill material during the packaging process. [Means for solving the problem]

[0005] The circuit board according to the present invention, which has been made to achieve the above-mentioned object, is characterized by having an insulating layer having a first surface and a second surface facing each other and having a trench portion recessed from the first surface, a first connection pad embedded in the insulating layer and exposed from the insulating layer on the first surface, and a first protective layer covering the insulating layer on the first surface and having an opening to expose the first connection pad and the trench portion.

[0006] The first protective layer preferably includes a first opening that exposes the first connection pad and a second opening that exposes the trench portion. In a width along a first direction parallel to the first surface, the width of the second opening is preferably larger than the width of the trench portion. In a width along a first direction parallel to the first surface, the width of the first opening is preferably smaller than the width of the first connection pad. The bottom surface of the trench portion is preferably located at a position further recessed from the exposed surface of the first connection pad. It is preferable that the recessed depth of the trench portion is greater than a thickness of the first connection pad along a second direction perpendicular to the first surface. It is preferable that the recessed depth of the trench portion is smaller than the thickness of the insulating layer along a second direction perpendicular to the first surface. The trench portion is preferably disposed adjacent to the first connection pad. It is preferable that the first connection pad includes a plurality of first connection pads, and the trench portion is disposed between adjacent first connection pads. The exposed surface of the first connection pad is preferably coplanar with the first surface. It is preferable that the semiconductor device further comprises a second connection pad disposed on the second surface so as to protrude from the insulating layer. It is preferable that the semiconductor device further comprises a second protective layer on the second surface at least partially covering the insulating layer and the second connection pad. The insulating layer preferably comprises prepreg (PPG). The protective layer preferably includes a solder resist (SR).

[0007] In order to achieve the above-mentioned object, a method for manufacturing a circuit board according to the present invention includes the steps of forming a conductive layer containing a second metal on a seed layer containing a first metal, patterning a first plating resist covering the conductive layer and plating the second metal to form a protruding pattern layer on the conductive layer, patterning a second plating resist covering the conductive layer and the protruding pattern layer and plating the first metal to form a connection pad on the conductive layer, forming an insulating layer to cover the protruding pattern layer and the connection pattern, and etching and removing the protruding pattern layer to form a recessed trench portion on one side of the insulating layer.

[0008] The method may further include the step of forming a protection layer on one surface of the insulating layer, the protection layer having openings to expose the connection pads and the trench portion. It is preferable that the first metal includes copper (Cu) and the second metal includes tin (Sn). The trench portion is preferably formed in a portion corresponding to the protruding pattern layer. Effect of the Invention

[0009] According to the circuit board and the manufacturing method thereof according to the present invention, the board structure can be improved to protect the solder ball joints, which provide connections between packages during the packaging process, from bleeding of the underfill material, thereby ensuring packaging assemblability. In addition, by forming connection pads on the circuit board manufactured using the ETS (Embedded Trace Substrate) method, a board structure without steps between the embedded copper pattern and the surface of the PPG insulation layer can be manufactured, improving the packaging assembly yield. [Brief description of the drawings]

[0010] [Figure 1] 1 is a cross-sectional view showing a schematic configuration of a circuit board according to an embodiment of the present invention. [Diagram 2] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Diagram 3] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Figure 4] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Diagram 5] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Figure 6] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Figure 7] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Figure 8] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Figure 9] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Figure 10] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Figure 11] 2A to 2C are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. [Figure 12]It is a process cross-sectional view for explaining a method of manufacturing the circuit board shown in FIG. 1. [Figure 13] It is a process cross-sectional view for explaining a method of manufacturing the circuit board shown in FIG. 1. [Figure 14] It is a process cross-sectional view for explaining a method of manufacturing the circuit board shown in FIG. 1. [Figure 15] It is a process cross-sectional view for explaining a method of manufacturing the circuit board shown in FIG. 1. [Figure 16] It is a process cross-sectional view for explaining a method of manufacturing the circuit board shown in FIG. 1. [Figure 17] It is a process cross-sectional view for explaining a method of manufacturing the circuit board shown in FIG. 1.

Embodiments for Carrying Out the Invention

[0011] Next, specific examples of embodiments for carrying out the circuit board and its manufacturing method according to the present invention will be described with reference to the drawings.

[0012] In order to clearly explain the present invention in the drawings, parts that are unnecessary for the explanation are omitted, and the same reference numerals are given to the same or similar components throughout the specification. Also, in the accompanying drawings, some components are exaggerated, omitted, or shown schematically, and the size of each component does not fully reflect the actual size. The accompanying drawings are only for facilitating the understanding of the embodiments disclosed in this specification, and the technical idea disclosed in this specification is not limited by the accompanying drawings, and should be understood to include any modifications, equivalents, or alternatives included in the idea and technical scope of the present invention.

[0013] Terms including ordinal numbers such as first, second, etc. may be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another. In addition, when a part such as a layer, film, region, or plate is said to be "on" or "on top of" another part, this includes not only the case where it is "directly on" the other part, but also the case where there is another part in between. Conversely, when one part is said to be "directly on" another part, it means that there is no other part in between. In addition, being "on" or "above" a reference part means being located above or below the reference part, and does not necessarily mean being located "on" or "above" the direction against gravity.

[0014] Throughout the specification, terms such as "comprise" or "have" are intended to specify the presence of any features, numbers, steps, operations, components, parts, or combinations thereof set forth in the specification, but are to be understood as not precluding the presence or additional possibility of one or more other features, numbers, steps, operations, components, parts, or combinations thereof. Thus, when a part is said to "comprise" certain elements, this means that it can further include other elements, but not to the exclusion of other elements, unless specifically stated to the contrary. Furthermore, throughout the specification, "on a plane" means when the part in question is viewed from above, and "on a cross section" means when the part in question is cut vertically and viewed from the side. In addition, throughout the specification, when the term "connected" is used, this does not only mean that two or more components are directly connected, but also that two or more components are indirectly connected via other components, or that they are not only physically connected but also electrically connected, or that they are referred to by different names depending on their position or function but are nonetheless one unit.

[0015] FIG. 1 is a cross-sectional view showing a schematic configuration of a circuit board according to an embodiment of the present invention. Referring to FIG. 1, a circuit board 100 according to an embodiment of the present invention includes an insulating layer 110, circuit wiring embedded in the insulating layer 110, and protective layers (131, 135) covering at least one side of the insulating layer 110.

[0016] The insulating layer 110 and the circuit wiring have an ETS (Embedded Trace Substrate) structure. The circuit board 100 is a printed circuit board and can be used for a semiconductor package. The insulating layer 110 has a first surface 110a and a second surface 110b facing each other, and includes a resin insulating layer. The insulating layer 110 may be made of a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a resin impregnated with a reinforcing agent such as glass fiber or an inorganic filler, for example, a prepreg. Furthermore, the insulating layer 110 may include, but is not limited to, a thermosetting resin and / or a photocurable resin.

[0017] The circuit wiring includes a first connection pad 121 embedded in the insulating layer 110 and exposed from the insulating layer 110 on the first surface 110a, and a second connection pad 125 protruding from the insulating layer 110 on the second surface 110b. The circuit wiring includes vias 123 that penetrate the insulating layer 110 to connect the first connection pad 121 and the second connection pad 125 to each other, and wiring that is not exposed within the insulating layer 110 and extends therefrom. The circuit wiring may include copper (Cu) and connects to terminals of external circuit components through first connection pads 121 exposed from the insulating layer 110 and second connection pads 125 protruding from the insulating layer 110 . At this time, the exposed surfaces of the first connection pads 121 are flush with the first surface 110a and have no steps. In other words, even though the first connection pad 121 has an ETS structure, the exposed surface of the first connection pad 121 embedded in the insulating layer 110 is not recessed from the surface of the insulating layer 110 .

[0018] The protective layers (131, 135) include a first protective layer 131 covering the first surface 110a of the insulating layer 110, and a second protective layer 135 covering the second surface 110b. The first protective layer 131 is opened to expose the first connection pads 121 on the first surface 110a. The second protective layer 135 covers the second connection pads 125 together with the insulating layer 110 on the second surface 110b, and is opened so as to expose a portion of the second connection pads 125. The protective layers (131, 135) may include a solder resist layer.

[0019] The insulating layer 110 has a trench portion 115 recessed from the first surface 110a. The first protective layer 131 covering the insulating layer 110 is opened so as to expose the trench portion 115 . Therefore, the first protective layer 131 has a first opening 131 a exposing the first connection pad 121 and a second opening 131 b exposing the trench portion 115 . In the width along the first direction parallel to the first surface 110a of the insulating layer 110, the width of the second opening 131b is formed to be larger than the width of the trench portion 115. Moreover, the width of the first opening 131a in the first direction is smaller than the width of the first connection pad 121.

[0020] The bottom surface of the trench portion 115 is located further back from the surface of the insulating layer 110 than the exposed surface of the first connection pad 121 . At this time, the recessed depth of the trench portion 115 is formed to be greater than the thickness of the first connection pad 121 along the second direction perpendicular to the first surface 110a of the insulating layer 110. In addition, the recessed depth of the trench portion 115 is formed to be smaller than the thickness of the insulating layer 110 in the second direction. The first connection pads 121 are made up of a plurality of pads, and the trench portions 115 are disposed adjacent to the first connection pads 121 . Moreover, the trench portions 115 are disposed between the first connection pads 121 adjacent to each other.

[0021] In the packaging process, an electronic component (not shown) is mounted on the circuit board 100 through solder balls (not shown) disposed on the first connection pads 121 . At this time, an underfill material is injected between the electronic element and the circuit board 100 . The injected underfill material may overflow from the first openings 131a of the first protective layer 131 exposing the first connection pads 121 and flow to the surroundings, causing underfill bleeding. The trench portion 115 adjacent to the first connection pad 121 can contain the overflowing underfill material and prevent it from flowing to and contaminating other surrounding first connection pads 121.

[0022] In the embodiment shown in FIG. 1, the device is shown to include one insulating layer 110, two connection pads (121, 125) and a via 123 connecting them, but the present invention is not limited to this and may include a greater number of build-up insulating layers and a greater number of build-up circuit wiring layers, which is also within the scope of the present invention.

[0023] 2 to 17 are cross-sectional views illustrating steps in a method for manufacturing the circuit board shown in FIG. 2 to 5, a carrier substrate 60 having a first seed layer 71 and a conductive layer 75 disposed on at least one surface thereof is prepared, and a protruding pattern layer 78 is formed on the conductive layer 75 through a protruding pattern forming process. The carrier substrate 60 is a substrate in which copper foil layers 62 are laminated on both sides of an insulating material 61, and the first seed layer 71 and the copper foil layer 62 are separated from each other. The insulating material 61 may be a DCF (Dual detach core) layer.

[0024] A conductive layer 75 is formed on the first seed layer 71 by plating (see FIG. 2). The conductive layer 75 includes a first metal, and the first seed layer 71 includes a second metal. The first metal is a metal different from the second metal, and the etching conditions are different between the first metal and the second metal. For example, the first metal includes tin (Sn) and the second metal includes copper (Cu). Only the portions of the carrier substrate 60 where the protruding pattern layer 78 is to be formed are removed through exposure and development to form a first plating resist pattern 83 (see FIG. 3).

[0025] The protruding pattern layer 78 is formed to have protruding portions formed by plating the conductive first metal on the portions of the conductive layer 75 exposed through the openings of the patterned first plating resist pattern 83 (see FIG. 4). After the protruding pattern layer 78 is formed, the first plating resist pattern 83 is removed (see FIG. 5). In this embodiment, the protruding pattern layer 78 is shown formed on both sides of the carrier substrate 60, but it is also possible to form the protruding pattern layer 78 on only one side of the carrier substrate 60, which also falls within the scope of the present invention.

[0026] 6 to 8, the first connection pads 121 are formed on the conductive layer 75 through a circuit formation process. A second plating resist pattern 85 is formed on the conductive layer 75, the portion where the first connection pad 121 is to be formed being removed through exposure and development (see FIG. 6). The first connection pads 121 are formed by plating a conductive second metal onto the portions of the conductive layer 75 exposed through the openings of the patterned second plating resist pattern 85 (see FIG. 7). A part of the conductive layer 75 and the protruding pattern layer 78 are covered with a second plating resist pattern 85, and after the first connection pads 121 are formed, the second plating resist pattern 85 is removed (see FIG. 8).

[0027] Referring to FIG. 9, an insulating layer 110A is deposited so that the first connection pads 121 are embedded, and a second seed layer 125A is formed on the upper surface of the insulating layer 110A. The second seed layer 125A is formed to form the second connection pad 125, and although any conductive metal can be used without limitation, copper (Cu) is generally used. The insulating layer 110A includes a resin insulating layer. The insulating layer 110A may be made of a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a resin impregnated with a reinforcing agent such as glass fiber or an inorganic filler, for example, a prepreg, and the insulating layer 110A may include, but is not limited to, a thermosetting resin and / or a photocurable resin.

[0028] 10 to 13, the second connection pads 125 are formed on the insulating layer 110A through a circuit forming process. The second connection pads 125 are formed in a manner similar to that of forming the first connection pads 121 , and the second connection pads 125 may include the same type of material as the first connection pads 121 . At this time, in order to form a via 123 connecting the first connection pad 121 and the second connection pad 125 to each other, the insulating layer 110A is partially etched to expose a portion of the first connection pad 121 (see FIG. 10), and a plating process is performed on the exposed portion of the first connection pad 121. Then, a third plating resist pattern 87 is formed on the second seed layer 125A, in which only the portions where the second connection pads 125 are to be formed are removed through exposure and development (see FIG. 11).

[0029] The portions of the second seed layer 125A exposed through the openings of the patterned third plating resist pattern 87 are plated with a conductive second metal to form second connection pad patterns 125B (see FIG. 12). After the second connection pads 125 are formed, the third plating resist pattern 87 is removed (see FIG. 13). As a result, embedded pattern substrate portions are completed on both sides of the carrier substrate 60. In the embodiment shown in the figures, each buried pattern substrate portion is shown to include one insulating layer 110 and a first connection pad 121 and a second connection pad 125 of two metal layers, but is not limited to this and may include a greater number of build-up insulating layers and a greater number of build-up wiring pattern layers, which also falls within the scope of the present invention.

[0030] Referring to FIG. 14, the first seed layer 71 and the carrier substrate 60 are separated to prepare a buried pattern substrate. The first seed layer 71 formed on both sides of the carrier substrate 60 is separated from the copper foil layer 62 to obtain a pair of embedded pattern substrates, and a process is individually applied to each of the pair of embedded pattern substrates.

[0031] Referring to FIG. 15, the buried pattern substrate obtained in FIG. 14 is alkaline etched to remove the first seed layer 71 and the second seed layer 125A. When the first seed layer 71 and the second seed layer 125A are removed, the conductive layer 75 and the protruding pattern layer 78 are located on one side of the insulating layer 110 in which the first connection pad 121 is embedded, and the second connection pad 125 protrudes from the other side of the insulating layer 110. When alkaline etching is performed, the first seed layer 71 and the second seed layer 125A made of the first metal are etched and removed, but the conductive layer 75 and the protruding pattern layer 78 made of the second metal are not etched and remain.

[0032] Referring to FIG. 16, the buried pattern substrate obtained in FIG. 15 is etched to remove the conductive layer 75 and the protruding pattern layer 78. For this purpose, the etching process is performed using an etchant that etches the first metal constituting the conductive layer 75 and the protruding pattern layer 78 but does not etches the second metal constituting the connection pads (121, 125). For example, by using a tin (Sn) stripper, the tin (Sn) can be removed and the copper (Cu) can be etched away without being removed. When the conductive layer 75 and the protruding pattern layer 78 are removed from the embedded pattern board, the first connection pads 121 are exposed from one surface of the insulating layer 110 and a trench portion 115 is formed in the insulating layer 110 . The trench portion 115 is formed by being recessed from one surface of the insulating layer 110 where the first connection pad 121 is exposed by removing the protruding pattern layer 78 . Since the first connection pads 121 made of the first metal are not etched by the etching solution that etches the second metal, the exposed surfaces of the first connection pads 121 are located on the same plane as one surface of the insulating layer 110 .

[0033] Referring to FIG. 17, first and second protective layers 135 are formed on both sides of the buried pattern substrate obtained in FIG. 16 to cover the insulating layer 110 and the connection pads (121, 125). The first and second protective layers 135 include a solder resist layer. The first protective layer 131 is patterned on one side of the insulating layer 110 where the first connection pad 121 is exposed, to have a first opening 131a opened to expose the first connection pad 121, and a second opening 131b opened to expose the trench portion 115. In the width along a first direction parallel to one surface of the insulating layer 110, the second opening 131b is formed to be larger than the width of the trench 115. Moreover, the width of the first opening 131a in the first direction is smaller than the width of the first connection pad 121. The second protective layer 135 is opened on the other surface of the insulating layer 110 on which the second connection pads 125 are disposed, so as to expose at least a portion of the second connection pads 125 .

[0034] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the technical scope of the present invention. [Explanation of symbols]

[0035] 100 Circuit Board 110 Insulating layer 115 Trench Section 121 First connection pad 123 Beer 125 Second connection pad 131 1st protective layer 131a 1st opening 131b 2nd opening 135 Second protective layer

Claims

1. an insulating layer having a first surface and a second surface facing each other and a trench portion recessed from the first surface; a first connection pad embedded in the insulating layer and exposed from the insulating layer at the first surface; a first protective layer on the first surface, covering the insulating layer and having an opening to expose the first connection pad and the trench portion.

2. The circuit board according to claim 1 , wherein the first protective layer includes a first opening exposing the first connection pad and a second opening exposing the trench portion.

3. The circuit board according to claim 2 , wherein the width of the second opening is greater than the width of the trench portion in a first direction parallel to the first surface.

4. 3 . The circuit board according to claim 2 , wherein the width of the first opening in a first direction parallel to the first surface is smaller than the width of the first connection pad.

5. The circuit board according to claim 1 , wherein a bottom surface of the trench portion is located at a position further recessed from the exposed surface of the first connection pad.

6. 6. The circuit board of claim 5, wherein the recessed depth of the trench portion is greater than a thickness of the first connection pad along a second direction perpendicular to the first surface.

7. 6. The circuit board according to claim 5, wherein the recessed depth of the trench portion is smaller than a thickness of the insulating layer in a second direction perpendicular to the first surface.

8. The circuit board according to claim 1 , wherein the trench portion is disposed adjacent to the first connection pad.

9. The first connection pad includes a plurality of first connection pads, The circuit board according to claim 1 , wherein the trench portion is disposed between adjacent first connection pads.

10. 2. The circuit board of claim 1, wherein the exposed surface of the first connection pad is flush with the first surface.

11. 2. The circuit board according to claim 1, further comprising a second connection pad disposed on the second surface so as to protrude from the insulating layer.

12. 12. The circuit board of claim 11, further comprising a second protective layer on the second surface at least partially covering the insulating layer and the second connection pads.

13. The circuit board of claim 1 , wherein the insulating layer comprises prepreg (PPG).

14. The circuit board according to claim 1 , wherein the protective layer comprises a solder resist (SR).

15. forming a conductive layer comprising a second metal on a seed layer comprising a first metal; patterning a first plating resist covering the conductive layer, and plating the second metal to form a protruding pattern layer on the conductive layer; patterning a second plating resist covering the conductive layer and the protruding pattern layer, and plating the first metal to form a connection pad on the conductive layer; forming an insulating layer to cover the protruding pattern layer and the connection pattern; and removing the protruding pattern layer by etching to form a recessed trench portion in one surface of the insulating layer.

16. The method of claim 15, further comprising forming a protection layer on one surface of the insulating layer, the protection layer having openings to expose the connection pads and the trench portion.

17. The method of claim 15, wherein the first metal includes copper (Cu) and the second metal includes tin (Sn).

18. The method of claim 15, wherein the trench portion is formed in a portion corresponding to the protruding pattern layer.

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