Cleaned packaging substrate and cleaned packaging substrate manufacturing method
Patent Information
- Application Number
- JP2025028412
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-09-10
- Filing Date
- 2025-02-25
- Publication Date
- 2025-09-25
AI Technical Summary
The challenge in manufacturing semiconductor packaging substrates is to efficiently remove impurities, particularly dust, from complex substrates with fine features like through-vias and redistribution layers, while minimizing damage from static electricity.
A method involving the use of ionized air sprayed onto the substrate, with soft X-rays applied to suppress static electricity, and a controlled low-pressure atmosphere to efficiently remove particulate impurities without damaging the substrate.
This method effectively removes impurities from the substrate surfaces and within complex features, preventing defects like bridge and open defects, while maintaining the integrity of the glass substrate and ensuring reliable electrical performance.
Abstract
Description
Technical Field
[0001] (Cross - Reference to Related Applications) This application claims the priority of U.S. Provisional Patent Application No. 63 / 242,619, filed on September 10, 2021, the entire disclosure of which is incorporated herein by reference for all purposes.
[0002] This disclosure relates to a cleaned packaging substrate and a method for manufacturing a cleaned packaging substrate.
Background Art
[0003] In the manufacture of electronic components, mounting a circuit on a semiconductor wafer is called the front - end process (FE), and assembling the wafer so that it can be actually used in a product is called the back - end process (BE). The back - end process may include a packaging process.
[0004] In recent years, the four core technologies of the semiconductor industry that have enabled the rapid development of electronic products are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Semiconductor technology has developed into various forms such as sub - micron to nano - scale line widths, tens of millions of cells or more, high - speed operation, and a large amount of heat dissipation. However, relatively, there is no technology that perfectly packages this. Thus, it is considered that the electrical performance of a packaged semiconductor may be determined more by the packaging technology and the electrical connections thereby than by the performance of the semiconductor itself.
[0005] As an example, a glass substrate can be applied as a packaging substrate. By forming through - vias in the glass substrate and applying a conductive material in the through - vias, the length of the conductive line between the element and the motherboard can be shortened, and excellent electrical characteristics can be realized.
[0006] When forming fine through - vias in a glass substrate or making connections of the redistribution layer, a strict cleaning process is indispensable. Especially when performing fine wiring, impurities such as dust are very important.
Summary of the Invention
[0007] This summary is provided to introduce a simplified part of the concepts described later in the detailed description of the invention. This summary is not intended to identify important features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
[0008] The present invention is a method for manufacturing a cleaned packaging substrate. In the preparation step, a target substrate is placed in a chamber. In the removal step, in order to separate particulate impurities, ionized air is sprayed onto at least one surface of the target substrate to obtain a cleaned packaging substrate. The target substrate is at least one of a glass packaging substrate and a packaging substrate. The packaging substrate includes a redistribution layer disposed on at least one surface of the glass packaging substrate. A manufacturing method is provided, which is characterized by the above.
[0009] The removal step is configured to irradiate the target substrate with soft X-rays to suppress the generation of static electricity by the ionized air.
[0010] The atmosphere in the chamber in the removal step has an air flow to which a force in a direction opposite to the gravitational direction is applied.
[0011] The ionized air sprayed in the removal step is either an inert gas or dry air.
[0012] The residual charge potential of the substrate in the removal step is 0V.
[0013] The space in the chamber in the removal step is maintained in a low-pressure atmosphere of 0.9 atm or less.
[0014] The injection of the ionized air in the removal step is performed on one of the first surface and the second surface of the substrate, and the air flows at an angle of 30 degrees to 150 degrees with respect to the first surface of the substrate.
[0015] The glass packaging substrate includes a through via penetrating in the thickness direction thereof, and the through via has an opening with a maximum length of 300 μm or less.
[0016] The redistribution layer of the packaging substrate includes blind vias, and the blind vias include openings with a maximum length of 20 μm or less.
[0017] Other features and aspects will become apparent from the following detailed description, drawings, and claims.
Best Mode for Carrying Out the Invention
[0018] The following detailed description is provided to assist the reader in comprehensively understanding the methods, apparatuses, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatuses, and / or systems described herein will become apparent upon understanding the present disclosure. For example, the order of operations described herein is merely illustrative and not limited to what is described herein, and may be changed as will be apparent upon understanding the present disclosure, except when the operations must be performed in a certain order. Also, upon understanding the content of the present disclosure, descriptions of well-known features may be omitted to enhance clarity and conciseness, but it should be noted that the omission of features and their descriptions is not intended to acknowledge their general knowledge.
[0019] The features described herein can be embodied in different forms and should not be construed as limited to the examples described herein. Rather, the examples described herein are provided merely to illustrate some of the many possible ways of implementing the methods, apparatuses, and / or systems described herein that will become apparent after understanding the present disclosure.
[0020] In this specification, terms such as "first", "second", and "third" are used to describe various members, components, regions, layers, or sections, but these members, components, regions, layers, or sections are not limited. Rather, these terms are used only to distinguish one member, component, region, layer, or section from another. Thus, a first member, component, region, layer, or section referred to in an embodiment described in this specification may also be referred to as a second member, component, region, layer, or section without departing from the teachings of the embodiment.
[0021] In the specification, when an element such as a layer, region, or substrate is described as being "on" another element, "connected" or "coupled" to another element, it is either directly "on", "connected", or "coupled" to the other element, or one or more other elements are interposed therebetween. On the other hand, when an element is described as being "directly on", "directly connected" to, or "directly coupled" to another element, no other element is interposed therebetween. Similarly, expressions such as, for example, "between", "immediately between", "adjacent to", and "immediately adjacent to" can be interpreted as described above.
[0022] The terms used in this specification are for the sole purpose of describing particular examples and are not used to limit the present disclosure. The singular forms used in this specification are intended to include the plural forms as well, unless the context clearly dictates otherwise. The term "and / or" used in this specification includes any one of the related listed items and any combination of any two or more of them. The terms "comprising", "including", and "having" as used in this specification identify the presence of the described features, numbers, operations, elements, components, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, operations, elements, components, and / or combinations thereof. In this specification, the term "may" in an example or embodiment (e.g., with respect to what an example or embodiment may include or may implement) means that there is at least one example or embodiment in which such a feature is included or implemented. However, not all examples are limited to this.
[0023] Unless otherwise defined, all terms including technical and scientific terms used in this specification shall have the same meaning as commonly understood by a person of ordinary skill in the art to which this disclosure pertains after understanding the present disclosure. Terms defined as in a commonly used dictionary shall be interpreted to have a meaning consistent with the meaning in the context of the relevant art and the present disclosure, and shall not be interpreted in an idealized or overly formal sense unless explicitly so defined in this specification.
[0024] In this specification, the description of "A and / or B" means "A, B, or A and B".
[0025] In this specification, terms such as "first", "second" or "A", "B" are used to distinguish the same terms from each other unless otherwise described.
[0026] One or more embodiments provide a method for manufacturing a cleaned packaging substrate and a cleaned packaging substrate.
[0027] In one or more embodiments, a method for manufacturing a cleaned packaging substrate and the cleaned packaging substrate can minimize damage to the substrate that may occur due to the influence of static electricity in the cleaning process, and can efficiently remove impurities from a substrate having a complex structure or small holes.
[0028] In one or more embodiments, a singular expression is construed in context to include plural and singular forms unless otherwise stated.
[0029] In a package substrate for a high-performance semiconductor device, it may be desirable to regulate the difference in wiring scale between the boat at the lower end of the substrate and the element at the upper end of the substrate. To achieve this, steps such as applying two or more prepregs and forming a two-layer structure of prepreg and silicon substrate are applied. This is because the difference in wiring scale between the board disposed at the lower end of the packaging substrate and the element disposed at the upper end of the packaging substrate can be relatively easily regulated through the two-layer substrate. However, in such a method, it is difficult to meet the requirement of thinning in the packaging of semiconductor devices.
[0030] A glass substrate of one layer may be applied as a support layer for a package substrate of a high-performance semiconductor device. Therefore, it may be desirable to arrange lines and vias having various sizes inside one package substrate. Precise impurity control is desired to realize the application of a rewiring layer as a fine layer, the reduction of the via size, and the implementation of a complex wiring pattern in a small area of the package substrate. Therefore, the importance of the cleaning process is increasing in the manufacturing process of the package substrate.
[0031] A glass substrate can be applied as the core of a packaging substrate. When applying a glass substrate for a semiconductor package with controlled stress, finer lines with a thinner thickness can be realized. However, glass substrates are vulnerable to impact forces and unbalanced stress. Using a prepreg manufactured by impregnating glass fibers with a polymer can strengthen the glass substrate. Therefore, when energy imbalance occurs inside the glass substrate, the substrate itself may be damaged, and it may be laborious to clean the entire process chamber.
[0032] Therefore, in a glass substrate or a packaging substrate using a glass substrate as the core, it is necessary to apply a cleaning method that can efficiently remove impurities and suppress the generation of unbalanced stress and impact.
[0033] Hereinafter, the embodiments will be described in detail.
[0034] The manufacturing method of the cleaned packaging substrate is applied to the manufacturing process of a glass substrate or a packaging substrate including the same, and includes a preparation step and a removal step.
[0035] The preparation step is a step of placing a target substrate in a chamber.
[0036] Placing the target substrate means fixing it at a predetermined position so that the target substrate is not separated by interaction with an element such as an air jet, but is not limited to an air jet.
[0037] For the fixing step, the target substrate may be placed on a rack provided in the chamber. For the fixing step, the target substrate may be placed on a multi-layer rack provided in the chamber.
[0038] The removal step is a step of spraying ionized air on at least one surface of the target substrate to separate particulate impurities, thereby manufacturing a cleaned substrate for packaging.
[0039] The target substrate is a glass packaging substrate or a packaging substrate.
[0040] The glass packaging substrate may be a glass substrate for semiconductors, and for example, may be a borosilicate glass substrate, a non-alkali glass substrate, or the like.
[0041] The glass packaging substrate may include a through-via penetrating in the thickness direction thereof. The through-via may include an opening having a maximum length of about 300 μm or less. The through-via may have an aspect ratio that is the ratio of the maximum length of the opening to the height of the through-via (corresponding to the thickness of the glass substrate) of about 0.5 to about 1.5.
[0042] When the through-via has a narrow opening or a large aspect ratio, a more careful removal process needs to be performed so that the inside of the via can be sufficiently cleaned.
[0043] The glass substrate may include a cavity in which a part or the whole in the thickness direction is recessed.
[0044] The removal process can sufficiently remove impurities not only on the surface of the glass substrate but also inside the via, on the side surface and bottom surface of the cavity, etc.
[0045] The packaging substrate may include a redistribution layer disposed on at least one surface of the glass packaging substrate and the glass packaging substrate.
[0046] The redistribution layer may be disposed on one surface of the glass packaging substrate.
[0047] The redistribution layer may be disposed on the first surface and the second surface of the glass packaging substrate, respectively.
[0048] The redistribution layer of the packaging substrate may include blind vias.
[0049] The blind via may include an opening having a maximum length of about 20 μm or less, or about 12 μm or less.
[0050] The redistribution layer disposed on the first surface of the glass packaging substrate may be connected to the second surface of the glass packaging substrate through the core of the glass substrate. The second surface may be connected to an external element via a buffer or a similar device, etc. The second surface may be connected to an external element via a buffer or a similar device disposed on the second surface.
[0051] The redistribution layer may include an electrically conductive layer as a fine layer. The fine layer means an electrically conductive layer having a width of about 4 μm or less. Specifically, it may be an electrically conductive layer applied such that the width and the interval are each about 4 μm or less, or about 1 μm to about 4 μm.
[0052] The thickness of the target substrate may be about 1,500 μm or less, about 300 μm to about 1,200 μm, 350 μm to 900 μm, or 350 μm to 700 μm.
[0053] The formation of the redistribution layer may be carried out in multiple steps such as repeating the formation of an insulating layer, the formation of a via, plating, etching, etc. In each step such as the formation of a via, the formation of an insulating layer, subsequent planarization, plating, and removal of unnecessary impurities after etching, a cleaning step is required.
[0054] In such a process, if the process is carried out with impurities such as dust mixed in even in part, defects such as bridge defects, open defects, and etching defects may occur. To prevent this, in the removal process, it is necessary to sufficiently remove impurities regardless of the differences in the morphology of the complex substrate surface and the material of the substrate surface, etc.
[0055] In particular, the packaging glass substrate is a material with insulating properties, and there is a possibility of damage such as cracking or pulverization of the glass. Therefore, it is necessary to clean the inside of the chamber. In addition, damage may also occur to the glass substrate itself. Furthermore, if the charge imbalance in the glass substrate exceeds a certain level, the glass substrate itself may crack. Therefore, not only the impact during the process but also the control of ions and static electricity during the cleaning process is desired.
[0056] The removal step injects ionized air onto the target substrate to separate particulate impurities.
[0057] The injection of the air may be performed by a nozzle.
[0058] The injected air may be applied by a method of injecting ionized air, or may be processed so as to be ionized on the surface of the substrate after the air is injected.
[0059] The injected air may be an inert gas or dry air.
[0060] The inert gas may be nitrogen gas, argon gas, etc., but is not limited thereto.
[0061] The injection of air in the removal step may be performed on the first surface or the second surface of the substrate.
[0062] The air may flow at an angle of about 30 degrees to about 150 degrees with respect to the first surface of the substrate. The air may flow at an angle of about 30 degrees to about 85 degrees, or about 95 degrees to about 150 degrees. The inflow angle of the air may be estimated by the angle of the nozzle.
[0063] In the removal of impurities on the substrate surface, it is important to separate the impurities from the surface by air. Furthermore, it is also important to control so that the separated impurities do not adhere to the surface of the substrate again.
[0064] Electrostatic charges or charge imbalances may occur on the surface of the target substrate due to air injection, and when the target substrate is an insulator, it tends to become more serious.
[0065] By applying a method of controlling the air flow in the chamber and / or a method of injecting ionized air and irradiating with ultraviolet light, it is possible to suppress the generation of static electricity, not substantially damage the substrate, and in addition, efficiently remove impurities.
[0066] Controlling the air flow in the chamber means forming an air flow to which a force is applied in a direction opposite to the gravitational direction. Preferably, turbulent flow may be partially formed. When turbulent flow is applied as the air flow in the chamber, impurities separated by the injected air move in the chamber along with the turbulent flow and are efficiently removed, and it is possible to suppress the reattachment of impurities to the substrate.
[0067] The space in the chamber in the removal step may be maintained to be a low-pressure atmosphere of 0.9 atm or less.
[0068] The removal step may be performed while irradiating the target substrate with soft X-rays to suppress the generation of static electricity.
[0069] As a method of suppressing the generation of static electricity, various methods are applicable.
[0070] As the method, soft X-rays, an electromagnetic wave ionizer, a UV lamp, atmospheric pressure plasma, etc. can be used. In one or more embodiments, soft X-rays may be applied.
[0071] Suppression of static electricity by soft X-rays can form ions or electrons by electrolytic dissociation of air molecules near the target substrate, and suppress the static electricity on the surface of the target substrate. Since the light irradiation method can be applied, there is an advantage that it is not necessary to add a device for transmitting ions such as the plasma method. Furthermore, even when irradiated in an atmosphere containing oxygen, substantially no ozone is generated, which is more advantageous than when applying a UV lamp.
[0072] The soft X-rays may be light having a wavelength of about 1 angstrom to about 700 angstroms, or about 1 angstrom to about 10 angstroms. Also, the energy of the electrolytic dissociation may be applied at about 10 keV or less, or about 1 keV to about 10 keV. The soft X-rays may be irradiated at a distance within about 50 cm from the target substrate, or about 2 cm to about 30 cm. In such an example, electrostatic control can be performed more effectively.
[0073] The removal step may have a residual charge potential that is substantially about 0 V. In this example, reattachment of impurities due to static electricity can be suppressed, and damage to the substrate caused by ionization or static electricity can be stably prevented.
[0074] The method for manufacturing a cleaned packaging substrate shows substantially no damage or deformation to the substrate itself, and foreign substances can be reliably removed from the target substrate. Also, it can be stably and efficiently applied to a glass substrate, which is a high insulator.
[0075] In another embodiment, the method for manufacturing a packaging substrate may include the steps of preparing a glass substrate, forming an electrically conductive layer on the substrate, forming an insulating layer, forming an electrically conductive layer, a cleaning step, and an inspection step.
[0076] The step of preparing a glass substrate is a step of preparing a glass substrate applied to semiconductor packaging. This glass substrate is in a thin plate shape and may be provided with cavities and / or vias as necessary. The cavity means a part of the glass substrate is recessed, and the recessed part may penetrate the glass substrate or may not penetrate the glass substrate and a part of it may remain.
[0077] The step of preparing a glass substrate prepares a cleaned glass substrate or a glass substrate from which static electricity has been removed. Before performing subsequent steps, a step of cleaning or removing static electricity may be further performed.
[0078] In one example, the cleaning step may be the above-described removal step, and the removal of static electricity may be, for example, the step using the above-described soft X-rays, and these steps may be performed simultaneously or in sequence.
[0079] The step of forming an electrically conductive layer on the substrate is to form an electrically conductive layer on the surface of the glass substrate in a predetermined pattern.
[0080] The glass substrate may have vias or cavities, and the electrically conductive layer may be formed inside the vias and on the wall surfaces of the cavities.
[0081] The formation of the electrically conductive layer may be performed, for example, by a method of forming a copper layer or a copper alloy layer by plating, sputtering, or the like. For example, a primer layer is formed at a predetermined position, an insulating layer or the like is formed, and then a portion where the electrically conductive layer is to be formed is partially removed to perform copper plating, thereby forming an electrically conductive layer having a desired shape and thickness. If necessary, planarization of the copper plating layer may be performed.
[0082] The step of forming an insulating layer is a step of forming an insulating layer to be interposed between electrically conductive layers, and can be performed by curing a polymer resin containing nanoparticles. The insulating layer preferably has a planarized surface (upper surface).
[0083] The step of forming an electrically conductive layer is a step of forming an electrically conductive layer at a predetermined position of the insulating layer. The formation of the electrically conductive layer may be performed, for example, by a method of forming a copper layer or a copper alloy layer by plating, sputtering, or the like. For example, a primer layer is formed at a predetermined position, an insulating layer or the like is formed, and then a part of the portion where the electrically conductive layer is to be formed is removed to perform copper plating, thereby forming an electrically conductive layer having a desired shape and thickness. If necessary, planarization of the copper plating layer may be performed.
[0084] The cleaning step is the above-mentioned cleaning step and may include removing dust and static electricity by the flow of air.
[0085] The inspection step is a step of checking whether there are defects in the substrate or conductive wires and whether the impurities generated in the process have been completely removed. The process is carried out by a specialized test device, and a packaging substrate evaluated as failing the test based on the inspection step of the test device may be subjected to the cleaning step again or may be discarded.
[0086] Between the step of forming the insulating layer and the step of forming the electrically conductive layer, a step of forming vias and a cleaning step may further be selectively included.
[0087] Between the step of forming the insulating layer and the step of forming the electrically conductive layer, a step of forming vias, a step of forming via electrically conductive layers, and a cleaning step may further be selectively included.
[0088] Between the step of forming the insulating layer and the step of forming the electrically conductive layer, a step of forming vias, a cleaning step, a step of forming via electrically conductive layers, and a cleaning step may further be selectively included.
[0089] In the step of forming vias, vias for connecting the electrically conductive layers arranged one above the other may be formed. For example, the vias may be formed by etching a part of the insulating layer at a predetermined position and with a predetermined size. For example, laser etching, plasma etching, etc. can be applied. After the etching, a step of removing the etching residue and a step of checking whether the etching residue has been removed may further be selectively included.
[0090] The step of forming the via electrical conductivity layer is the step of forming an electrical conductivity layer in the via. The electrical conductivity layer may be formed with a relatively constant thickness along the surface of the inner diameter of the via. The electrical conductivity layer may be formed in a manner that fills all of the via. Since the formation of the electrical conductivity layer is the same as the formation process of the electrical conductivity layer described above, further description is omitted.
[0091] The step of forming the insulating layer and the step of forming the electrical conductivity layer may be repeatedly performed a plurality of times as necessary. Further, the steps added between the step of forming the insulating layer and the step of forming the electrical conductivity layer may be repeatedly performed as necessary.
[0092] Since the description of each step overlaps with the above description, further description is omitted.
[0093] In one example, the glass substrate may be a glass substrate having a cavity structure.
[0094] Between the step of forming the electrical conductivity layer on the substrate and the step of forming the insulating layer, a step of selectively arranging an element (referred to as a cavity element in the sense of being arranged in the cavity) in the cavity or the like may be further included.
[0095] The cavity element may be a capacitor such as an MLCC, but is not limited thereto.
[0096] The step of arranging an element in the cavity or the like may include a step of arranging the cavity element at a predetermined position and a step of forming an insulating layer, an electrical conductivity layer, an insulating layer, etc. at the predetermined position.
[0097] Before or after the inspection step, a step of attaching solder balls may be further included.
[0098] The step of attaching solder balls is the step of attaching solder balls to the upper surface and / or the lower surface of the substrate.
[0099] The solder ball may directly connect the package substrate and the external element, or may be performed as follows.
[0100] The steps of preparing pads at the positions where the solder balls are to be formed, opening the upper surfaces of the pads to form an insulating film on one surface of the substrate, providing a metal masking layer on the upper surfaces of the pads, and sequentially applying steps of disposing a buff and a metal ball thereon may be applied.
[0101] The pad may be, for example, aluminum, but is not limited thereto. The metal masking layer may be, for example, a layer such as a copper alloy layer or a titanium layer formed in one or more layers, but is not limited thereto. The metal ball may be, for example, a tin ball, but is not limited thereto.
[0102] The method for manufacturing the packaging substrate can remove impurities from the target substrate with high reliability in addition to no significant damage or deformation to the substrate itself. Furthermore, it can be stably and efficiently applied to a glass substrate or the like as a high insulator.
[0103] The packaging substrate according to one or more embodiments may be cleaned by the method described above. The cleaned packaging substrate can efficiently suppress bridge defects, open defects, etching defects, etc., and can provide a packaging substrate with improved reliability.
[0104] This disclosure includes specific embodiments. After understanding the disclosure of this application, it will be apparent to those skilled in the art that various changes in form and detail can be made in these embodiments without departing from the spirit and scope of the claims and their equivalents. The embodiments described herein should be considered only in an illustrative sense and not for purposes of limitation. The description of a feature or aspect in each embodiment shall be regarded as applicable to a similar feature or aspect in other embodiments. Appropriate results may be achieved if the described techniques are performed in a different order and / or if the components in the described system, architecture, device, or circuit are combined in a different manner and / or if replaced or supplemented with other components or their equivalents. Accordingly, the scope of this disclosure is defined not by the detailed description but by the claims and their equivalents, and all modifications within the scope of the claims and their equivalents should be construed as being included in this disclosure.
[0105] Accordingly, the scope of this disclosure is defined not by the detailed description but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents should be construed as being included in this disclosure.
Claims
1. 1. A method for manufacturing a cleaned packaging substrate, comprising: In the preparation step, a target substrate is placed in a chamber; In the removing step, ionized air is sprayed onto at least one surface of the target substrate to separate particulate impurities, thereby obtaining a cleaned packaging substrate; the target substrate is at least one of a glass packaging substrate and a packaging substrate; the packaging substrate comprises a glass packaging substrate and a redistribution layer disposed on at least one surface of the glass packaging substrate; the glass packaging substrate has a through via penetrating through the substrate in a thickness direction; The through via has an opening with a maximum length of 300 μm or less, the redistribution layer of the packaging substrate comprises blind vias; the blind via has an opening with a maximum length of 20 μm or less; the removing step is configured to irradiate the target substrate with soft X-rays to suppress generation of static electricity due to ionized air; the atmosphere in the chamber in the removing step has an air flow that applies a force in a direction opposite to the direction of gravity; a manufacturing method characterized in that the residual charge potential of the substrate in the removing step is 0V;
2. The manufacturing method described in claim 1, wherein the ionized air sprayed in the removal process is one of an inert gas and dry air.
3. A manufacturing method as described in claim 1, wherein the space within the chamber during the removal process is maintained at a low-pressure atmosphere of 0.9 atmospheres or less.
4. The injection of the ionized air in the removal step is performed on one of the one surface of the substrate and the other surface of the substrate, The method of claim 1 , wherein the air is introduced at an angle of 30 to 150 degrees relative to one surface of the substrate.
5. A packaging substrate manufactured using the cleaned packaging substrate described in claim 1.