Multilayer varistor

Abstract

To provide a multilayer varistor capable of suppressing deterioration of a surge resistance even if a plurality of surges are received at the same time.SOLUTION: A multilayer varistor 1 comprises: a sinter body 11 in which a plurality of layers are laminated in a lamination direction; a first internal electrode 21 that is provided to a first lamination surface T1 in the sinter body 11; a second internal electrode 22 that is provided to a lamination surface T2 that is different from the first lamination surface T1 in the sinter body 11, and which is overlapped with at least a part of the first internal electrode 21 in the lamination direction; and a third internal electrode 23 that is provided to the lamination surface T2 that is different from the first lamination surface T1 in the sinter body 11, and which is overlapped with at least a part of the first internal electrode 21 in the lamination direction. A length d1 in lamination direction of the first internal electrode 21 is larger than a length d2 in the lamination direction of each of the second internal electrode 22 and the third internal electrode 23.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a multilayer varistor, and more particularly to a multilayer varistor having three or more internal electrodes.

Background Art

[0002] Multilayer varistors are used for the purpose of protecting various electronic devices, electronic devices, etc. from abnormal voltages caused by lightning surges, static electricity, etc., and preventing malfunction of electronic devices, electronic devices, etc. due to noise generated in the circuit.

[0003] As a multilayer varistor, a 2-in-1 structure in which two varistor elements are formed in one multilayer varistor has been proposed. Patent Document 1 discloses a chip capacitive varistor as a 2-in-1 structure multilayer varistor, which includes a sheet-like substrate having a voltage non-linear resistance ceramic, and a plurality of pairs of internal electrodes in which at least one of each pair constituting the pairs is formed so as not to be in electrical contact with each other with the substrate interposed therebetween.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In a conventional 2-in-1 structure multilayer varistor such as Patent Document 1, when two varistor elements are simultaneously subjected to a surge, the density of the current flowing through the internal electrodes increases, resulting in burnout of the internal electrodes and deterioration of the varistor elements due to local heat generation, and there is a possibility that the surge resistance decreases.

[0006] An object of the present disclosure is to provide a multilayer varistor capable of suppressing a decrease in surge resistance even when a plurality of surges are simultaneously received.

Means for Solving the Problems

[0007] A multilayer varistor according to one aspect of the present disclosure includes a sintered body in which a plurality of layers are laminated in a lamination direction, a first internal electrode provided on a first lamination surface in the sintered body, and a lamination surface different from the first lamination surface in the sintered body. A second internal electrode provided and overlapping at least a part of the first internal electrode in the lamination direction, and a third internal electrode provided on a lamination surface different from the first lamination surface in the sintered body and overlapping at least a part of the first internal electrode in the lamination direction. The length of the first internal electrode in the lamination direction is larger than the length of each of the second internal electrode and the third internal electrode in the lamination direction.

Effects of the Invention

[0008] According to the present disclosure, it is possible to provide a multilayer varistor capable of suppressing a decrease in surge resistance even when receiving a plurality of surges simultaneously.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Modes for Carrying Out the Invention

[0010] 1. Overview Hereinafter, a multilayer varistor according to an embodiment of the present disclosure will be described with reference to the drawings. Note that each of the drawings described in the following embodiments is a schematic diagram, and the ratio of the size and thickness of each component in each drawing does not necessarily reflect the actual dimensional ratio. Also, in each drawing, the "lamination direction", which is the direction in which a plurality of layers in the sintered body 11 are laminated, is defined as the z-direction.

[0011] The inventors have intensively studied each component of the 2in1 structure multilayer varistor, and found that there is a relationship between the relative dimensions of a plurality of internal electrodes and the reduction of surge resistance, and thus completed the present disclosure.

[0012] As shown in FIG. 1A, the multilayer varistor 1 of the present embodiment includes a sintered body 11 and, as internal electrodes, a first internal electrode 21, a second internal electrode 22, and a third internal electrode 23. The first internal electrode 21, the second internal electrode 22, and the third internal electrode 23 are disposed within the sintered body 11.

[0013] As shown in FIG. 1B, the first internal electrode 21 is provided on the first lamination surface T1, the second internal electrode 22 is provided on a lamination surface T2 different from the first lamination surface T1, and the third internal electrode 23 is provided on a lamination surface T2 different from the first lamination surface T1.

[0014] In the lamination direction, the second internal electrode 22 overlaps at least a part of the first internal electrode 21, and the third internal electrode 23 overlaps at least a part of the first internal electrode 21. "Overlapping in the lamination direction" means that at least a part intersects for two objects (the first internal electrode 21 and the second internal electrode 22, or the first internal electrode 21 and the third internal electrode 23) when viewed from the lamination direction.

[0015] In the multilayer varistor 1 of the present embodiment, the length d1 of the first internal electrode 21 in the lamination direction is larger than the length d2 of each of the second internal electrode 22 and the third internal electrode 23 in the lamination direction.

[0016] By having the above configuration, the multilayer varistor 1 of the present embodiment can suppress a decrease in surge resistance even when receiving a plurality of surges simultaneously. Regarding the reason for achieving the above effect by the multilayer varistor 1 having the above configuration, it can be speculated as follows, for example. The multilayer varistor 1 includes a first internal electrode 21, a second internal electrode 22 and a third internal electrode 23 provided on a lamination plane different from the first internal electrode 21, and at least a part of the first internal electrode 21 overlaps at least a part of the second internal electrode 22 and at least a part of the third internal electrode 23 in the lamination direction. In this way, the multilayer varistor 1 has two varistor elements, that is, a varistor element composed of the first internal electrode 21 and the second internal electrode 22, and a varistor element composed of the first internal electrode 21 and the third internal electrode 23. When both of the two varistor elements receive a surge simultaneously, the density of the current flowing through the first internal electrode 21 common to the two varistor elements may increase. However, in the multilayer varistor 1 of the present embodiment, the length d1 of the first internal electrode 21 in the lamination direction is made larger than the length d2 of the second internal electrode 22 or the third internal electrode 23 in the lamination direction, that is, the thickness of the first internal electrode 21 is made thicker than the thickness of the second internal electrode 22 or the third internal electrode 23. Therefore, the density of the current flowing through the first internal electrode 21 can be made smaller. As a result, it is possible to suppress the burnout of the internal electrode, which is likely to occur in a conventional multilayer varistor, and the decrease in the surge resistance of the multilayer varistor due to the deterioration of the varistor element caused by local heat generation.

[0017] 2. Details <Multilayer Varistor> [Embodiment] Hereinafter, the multilayer varistor 1 of the present embodiment will be described in detail.

[0018] The multilayer varistor 1 in FIGS. 1A and 1B includes a sintered body 11 and, as internal electrodes, a first internal electrode 21, a second internal electrode 22, and a third internal electrode 23. The multilayer varistor 1 usually includes external electrodes, and usually includes a first external electrode 31, a second external electrode 32, and a third external electrode 33 as the external electrodes. Hereinafter, each component of the multilayer varistor 1 will be described.

[0019] (Sintered body) The sintered body 11 has a laminated structure in which a plurality of layers are laminated along the lamination direction (z direction), and is formed, for example, in a rectangular parallelepiped shape having a length of 0.5 to 3 mm, a width of 0.3 to 2 mm, and a height of 0.3 to 2 mm with the x direction as the long side. When the sintered body 11 is in the shape of a rectangular parallelepiped, the sintered body 11 has two main surfaces facing each other in the lamination direction (z direction), two side surfaces facing each other in the y direction, and two end surfaces facing each other in the x direction. The sintered body 11 may be appropriately chamfered at the edge portions of the rectangular parallelepiped, and the edge portions of the sintered body 11 may be rounded.

[0020] The sintered body 11 is composed of, for example, a semiconductor ceramic component having non-linear resistance characteristics. The sintered body 11 usually contains ZnO as a main component as a semiconductor ceramic component, and as a sub-component, for example, Bi 2 O 3 , Pr 6 O 11 , CaCO 3 , Co 2 O 3 , Cr 2 O 3 , MnO 2 and at least one of Sb 2 O 3 may be included. In the sintered body 11, ZnO is sintered, and at least a part of the sub-components is precipitated at the grain boundaries thereof. Non-linear resistance characteristics are exhibited by the grain boundary barriers formed between ZnO particles. The sintered body 11 is formed, for example, by sintering a plurality of ceramic sheets mainly composed of ZnO after laminating them in the lamination direction.

[0021] (Internal electrode) The multilayer varistor 1 includes, as internal electrodes, a first internal electrode 21, a second internal electrode 22, and a third internal electrode 23. In the multilayer varistor 1 of FIGS. 1B, 2, and 3, there is one first internal electrode 21, one second internal electrode 22, and one third internal electrode 23 each, but as in the multilayer varistor 1 of FIG. 4, there may be two or more internal electrodes 21, 22, and 23 each.

[0022] The shape and dimensions of each of the internal electrodes 21, 22, and 23 in plan view are not particularly limited, but each of the internal electrodes 21, 22, and 23 is, for example, in a flat plate shape with a rectangular or square shape in plan view and longitudinal and lateral dimensions in plan view of 0.05 mm or more and 3 mm or less. The shape of the internal electrode in plan view may be a cross shape, a T shape, or the like.

[0023] As shown in FIG. 1B, the first internal electrode 21 is provided on the first lamination surface T1. The second internal electrode 22 and the third internal electrode 23 are provided on another lamination surface T2 different from the first lamination surface T1. The lamination surface T2 on which the second internal electrode 22 is provided and the lamination surface T2 on which the third internal electrode 23 is provided may be different as in FIGS. 1B and 3, or may be the same as in FIG. 2.

[0024] The length d1 of the first internal electrode 21 in the lamination direction is larger than the length d2 of each of the second internal electrode 22 and the third internal electrode 23 in the lamination direction. The "length of the internal electrode in the lamination direction" means the thickness of the internal electrode, and refers to the arithmetic average value of the thicknesses measured at a plurality of locations (for example, 10 points) in the internal electrode.

[0025] "d1 is larger than d2" means that d1 is 10% or more larger than d2, that is, 1.1 times or more. The length d1 of the first internal electrode 21 in the stacking direction is preferably 1.2 times or more, more preferably 1.5 times or more, still more preferably 2 times or more, and particularly preferably 2.3 times or more of the length d2 of each of the second internal electrode 22 and the third internal electrode 23 in the stacking direction. In this case, a decrease in surge resistance can be more suppressed. On the other hand, the length d1 of the first internal electrode 21 in the stacking direction is preferably 5 times or less, more preferably 4 times or less, still more preferably 3 times or less, and particularly preferably 2.7 times or less of the length d2 of each of the second internal electrode 22 and the third internal electrode 23 in the stacking direction. In this case, when the total thickness of the internal electrodes 21, 22, and 23 is large during sintering for forming the internal electrodes, element deflection of the internal electrodes caused by the difference in shrinkage rate between the sintered body and the internal electrodes can be suppressed.

[0026] The first internal electrode 21 is preferably located between the second internal electrode 22 and the third internal electrode 23 in the stacking direction. Such a structure is a structure in which the current density of the first internal electrode 21 is likely to increase and heat is likely to be generated, so the benefit of adopting the present disclosure is great.

[0027] It is preferable that at least a part of the first internal electrode 21, at least a part of the second internal electrode 22, and at least a part of the third internal electrode 23 overlap in the stacking direction. Such a structure is also a structure in which the current density of the first internal electrode 21 is likely to increase and heat is likely to be generated, so the benefit of adopting the present disclosure is great.

[0028] The first internal electrode 21 is preferably electrically connected to the ground. Also, the second internal electrode 22 and the third internal electrode 23 are preferably electrically connected to different signal lines, respectively. When connected in this way, the current flowing through the first internal electrode 21 can be made smaller, and a decrease in surge resistance can be more suppressed.

[0029] Each of the internal electrodes 21, 22, and 23 may be connected to the external electrode on any of the side surfaces and end surfaces of the sintered body 11. For example, the first internal electrode 21 is connected to the first external electrode 31 on the side surface, the second internal electrode 22 is connected to the second external electrode 32 on one of the two opposing end surfaces, and the third internal electrode 23 is connected to the third external electrode 33 on the other of the two opposing end surfaces.

[0030] The internal electrodes 21, 22, and 23 contain, for example, Ag, Pd, PdAg, PtAg, etc. The internal electrodes 21, 22, and 23 are formed, for example, by laminating ceramic sheets coated with internal electrode paste to a desired thickness of the internal electrode and then firing them.

[0031] (External electrode) The multilayer varistor 1 usually includes, as external electrodes, a first external electrode 31 connected to the first internal electrode 21, a second external electrode 32 connected to the second internal electrode 22, and a third external electrode 33 connected to the third internal electrode 23.

[0032] Each of the first external electrode 31, the second external electrode 32, and the third external electrode 33 may be provided on any of the side surfaces and end surfaces of the sintered body 11. For example, the first external electrode 31 is provided on the side surface, and the second external electrode 32 and the third external electrode 33 are provided on different end surfaces, one and the other of the two opposing end surfaces, respectively.

[0033] The external electrodes 31, 32, and 33 contain, for example, metal components such as Ag, AgPd, AgPt, etc., and glass components such as Bi 2 O 3 , SiO 2 , B 2 O 5 , etc. The external electrodes 31, 32, and 33 preferably have a metal as the main component, and more preferably have silver as the main component. The external electrodes 31, 32, and 33 can be formed, for example, by roller-transferring a conductive external electrode paste onto the surface of the sintered body 11.

[0034] The first external electrode 31 is preferably electrically connectable to ground, the second external electrode 32 is preferably electrically connectable to the first signal line, and the third external electrode 33 is preferably electrically connectable to the second signal line. In this case, a decrease in the surge resistance of the multilayer varistor 1 can be further suppressed.

[0035] The multilayer varistor 1 may be provided with plating electrodes so as to cover at least a part of each of the external electrodes 31, 32, and 33. Examples of the plating electrodes include a Ni electrode provided so as to cover at least a part of the external electrodes 31, 32, and 33, and a Sn electrode provided so as to cover at least a part of the Ni electrode.

[0036] [Modification Example] The above-described embodiment is merely one of various embodiments of the present disclosure. The above-described embodiment can be variously modified according to design and the like as long as the object of the present disclosure can be achieved.

[0037] Hereinafter, modification examples of the above-described embodiment will be described.

[0038] In the multilayer varistor 1 of the above-described embodiment, the second internal electrode 22 and the third internal electrode 23 are provided on different sides of the first internal electrode 21 (see FIG. 1B). However, as in the multilayer varistor 1 of FIG. 2, the second internal electrode 22 and the third internal electrode 23 may be provided on the same side of the first internal electrode 21.

[0039] Further, in the multilayer varistor 1 of the above-described embodiment, all of the first internal electrode 21, the second internal electrode 22, and the third internal electrode 23 overlap (see FIG. 1B). However, as in the multilayer varistor 1 of FIG. 3, not all of the first internal electrode 21, the second internal electrode 22, and the third internal electrode 23 overlap, and only the first internal electrode 21 and one of the second internal electrode 22 and the third internal electrode 23 may overlap.

[0040] In the multilayer varistor 1 of the above embodiment, the first internal electrode 21, the second internal electrode 22, and the third internal electrode 23 were each one (see FIG. 1B), but the multilayer varistor 1 may include a plurality of at least one of the first internal electrode 21, the second internal electrode 22, and the third internal electrode 23. The multilayer varistor 1 in FIG. 4 includes two combinations of the first internal electrode 21, the second internal electrode 22, and the third internal electrode 23 in the stacking direction. With such a structure, the multilayer varistor 1 can increase the number of varistor elements.

[0041] (Summary) As is clear from the above embodiment and the modification, the present disclosure includes the following aspects. Hereinafter, for the sole purpose of clarifying the correspondence with the embodiment, reference numerals are given in parentheses.

[0042] The multilayer varistor (1) of the first aspect includes a sintered body (11) in which a plurality of layers are stacked in the stacking direction, a first internal electrode (21) provided on a first stacking surface (T1) in the sintered body (11), and a first stacking surface (T1) in the sintered body (11). A second internal electrode (22) provided on a stacking surface (T2) different from the first stacking surface (T1) and overlapping at least a part of the first internal electrode (21) in the stacking direction, and a first stacking surface (T1) in the sintered body (11). And a third internal electrode (23) provided on a stacking surface (T2) different from the first stacking surface (T1) and overlapping at least a part of the first internal electrode (21) in the stacking direction. The length (d1) of the first internal electrode (21) in the stacking direction is larger than the length (d2) of each of the second internal electrode (22) and the third internal electrode (23) in the stacking direction.

[0043] According to the first aspect, even when receiving a plurality of surges simultaneously, a decrease in surge resistance can be suppressed.

[0044] In the multilayer varistor (1) of the second aspect, in the first aspect, the first internal electrode (21) is electrically connected to the ground, and the second internal electrode (22) and the third internal electrode (23) are each electrically connected to a different signal line.

[0045] According to the second aspect, the current flowing through the first internal electrode (21) can be made smaller, and the decrease in surge resistance can be further suppressed.

[0046] In the multilayer varistor (1) of the third aspect, in the second aspect, the first internal electrode (21) is connected to a first external electrode (31) that can be electrically connected to the ground, the second internal electrode (22) is connected to a second external electrode (32) that can be electrically connected to the first signal line, and the third internal electrode (23) is connected to a third external electrode (33) that can be electrically connected to the second signal line.

[0047] According to the third aspect, the decrease in the surge resistance of the multilayer varistor (1) can be further suppressed.

[0048] In the multilayer varistor (1) of the fourth aspect, in any one of the first to third aspects, in the stacking direction, the first internal electrode (21) is between the second internal electrode (22) and the third internal electrode (23).

[0049] According to the fourth aspect, since the current density of the first internal electrode (21) is likely to increase and it is a structure that is likely to generate heat, the benefits of adopting the present disclosure are great.

[0050] In the multilayer varistor (1) of the fifth aspect, in any one of the first to fourth aspects, at least a part of the first internal electrode (21), at least a part of the second internal electrode (22), and at least a part of the third internal electrode (23) overlap in the stacking direction.

[0051] According to the fifth aspect, since the current density of the first internal electrode (21) is likely to increase and it is a structure that is likely to generate heat, the benefits of adopting the present disclosure are great.

[0052] In the multilayer varistor (1) of the sixth aspect, in any one of the first to fifth aspects, the length (d1) of the first internal electrode (21) in the stacking direction is 1.2 times or more and 3 times or less the length (d2) of each of the second internal electrode (22) and the third internal electrode (23) in the stacking direction.

[0053] According to the sixth aspect, in addition to suppressing the reduction of surge resistance, the element deflection of the internal electrode can be further suppressed.

[0054] In the multilayer varistor (1) of the seventh aspect, in any one of the first to sixth aspects, at least one of the first internal electrode (21), the second internal electrode (22), and the third internal electrode (23) is provided in plurality.

[0055] According to the seventh aspect, the number of varistor elements in the multilayer varistor (1) can be increased.

Explanation of Signs

[0056] 1 Multilayer varistor 11 Sintered body 21 First internal electrode 22 Second internal electrode 23 Third internal electrode T1 First lamination surface T2 Other lamination surface

Claims

1. A sintered body in which a plurality of layers are laminated in a lamination direction, a first internal electrode provided on a first lamination surface in the sintered body, a second internal electrode provided on a lamination surface different from the first lamination surface in the sintered body and overlapping at least a part of the first internal electrode in the lamination direction, a third internal electrode provided on a lamination surface different from the first lamination surface in the sintered body and overlapping at least a part of the first internal electrode in the lamination direction and comprising: The length of the first internal electrode in the lamination direction is greater than the length of each of the second internal electrode and the third internal electrode in the lamination direction, a laminated varistor.

2. The first internal electrode is electrically connected to ground, The second internal electrode and the third internal electrode are electrically connected to different signal lines, respectively, The laminated varistor according to Claim 1.

3. The first internal electrode is connected to a first external electrode that can be electrically connected to ground, The second internal electrode is connected to a second external electrode that can be electrically connected to a first signal line, The third internal electrode is connected to a third external electrode that can be electrically connected to a second signal line, The laminated varistor according to Claim 2.

4. In the lamination direction, the first internal electrode is between the second internal electrode and the third internal electrode, The laminated varistor according to Claim 1 or 2.

5. At least a part of the first internal electrode, at least a part of the second internal electrode, and at least a part of the third internal electrode overlap in the lamination direction, The laminated varistor according to Claim 1 or 2.

6. The length of the first internal electrode in the lamination direction is 1.2 times or more and 3 times or less the length of each of the second internal electrode and the third internal electrode in the lamination direction, The laminated varistor according to Claim 1 or 2.

7. At least one of the first internal electrode, the second internal electrode, and the third internal electrode is provided in plurality, The laminated varistor according to Claim 1 or 2.

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