Photoelectric conversion device and signal processing apparatus

Abstract

To provide a photoelectric conversion device that has reduced noise.SOLUTION: A photoelectric conversion device has a pixel array, a pixel control unit, and a correction value generation unit that generates a correction value used for black level correction. The pixel array includes effective pixel regions for outputting signals according to incident light through photoelectric conversion, and correction signal acquisition regions for outputting correction signals in the black level correction. The correction signal acquisition regions are arranged to correspond to the rows of the effective pixel regions. The pixel control unit is configured to perform control of pixels in two or more rows in parallel in one row control period, and can change the number of control rows controlled in parallel in one frame period. The correction value generation unit generates the correction value with a first correction coefficient in a predetermined number of row control periods including the timing at which the number of controlled rows is changed, and generates the correction value with a second correction coefficient in the other row control periods.SELECTED DRAWING: Figure 9

Description

Technical Field

[0001] The present invention relates to a photoelectric conversion device and a signal processing device.

Background Art

[0002] Patent Document 1 discloses a solid-state imaging device including a plurality of pixels arranged in a matrix. In the solid-state imaging device of Patent Document 1, control is performed for each row of the plurality of pixels. In Patent Document 1, reset operation and readout operation are controlled for the pixels in each row, and control for a plurality of rows may be performed in parallel.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When control for a plurality of rows is performed in parallel as in Patent Document 1, if the number of rows controlled in parallel changes, fluctuations may occur in the potential of a power supply or the like. Due to this potential fluctuation, strip-shaped noise may appear in the image.

[0005] An object of the present invention is to provide a photoelectric conversion device and a signal processing device with reduced noise.

Means for Solving the Problems

[0006] According to one disclosure of the present specification, there is provided a photoelectric conversion device including a pixel array including a plurality of pixels arranged in a plurality of rows, a pixel control unit that controls the plurality of pixels row by row, and a correction value generation unit that generates a correction value used for black level correction of a signal output from the pixel array. The pixel array includes an effective pixel region that outputs a signal corresponding to incident light by photoelectric conversion and a correction signal acquisition region that outputs a correction signal in black level correction. The correction signal acquisition region is arranged so as to correspond to each row of the effective pixel region. The pixel control unit is configured to control pixels in two or more rows in parallel within one row control period and is capable of changing the number of controlled rows controlled in parallel within one frame period. The correction value generation unit generates the correction value with a first correction coefficient within a predetermined number of row control periods including the timing at which the number of controlled rows changes, and generates the correction value with a second correction coefficient in other row control periods.

[0007] According to one disclosure of the present specification, there is provided a signal processing device that processes a signal output from a photoelectric conversion device including a pixel array including a plurality of pixels arranged in a plurality of rows, a pixel control unit that controls the plurality of pixels row by row, and the pixel control unit is configured to control pixels in two or more rows in parallel within one row control period and is capable of changing the number of controlled rows controlled in parallel within one frame period. The pixel array includes an effective pixel region that outputs a signal corresponding to incident light by photoelectric conversion and a correction signal acquisition region that outputs a correction signal in black level correction. The correction signal acquisition region is arranged so as to correspond to each row of the effective pixel region. The signal processing device includes a correction value generation unit that generates a correction value and a correction unit that performs black level correction of the signal output from the pixel array based on the correction value. The correction value generation unit generates the correction value with a first correction coefficient within a predetermined number of row control periods including the timing at which the number of controlled rows changes, and generates the correction value with a second correction coefficient in other row control periods.

Advantages of the Invention

[0008] According to the present invention, there are provided a photoelectric conversion device and a signal processing device with reduced noise.

Brief Description of the Drawings

[0009]

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Figure 18

Embodiments for Carrying Out the Invention

[0010] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The same elements or corresponding elements are given common reference numerals throughout the plurality of drawings, and the description thereof may be omitted or simplified.

[0011] [First Embodiment] The photoelectric conversion device according to the first embodiment will be described with reference to FIGS. 1 to 10. FIG. 1 is a block diagram showing a configuration example of the photoelectric conversion device 1 according to the present embodiment.

[0012] The photoelectric conversion device 1 includes a pixel array 11, a control unit 12, a vertical scanning unit 13, a readout circuit unit 14, an AD conversion unit (analog-digital conversion unit) 15, a memory unit 16, a horizontal scanning unit 17, and a signal processing unit 18.

[0013] The pixel array 11 has a plurality of pixels P arranged in a plurality of rows and a plurality of columns. The pixel P may include a photoelectric conversion element. In FIG. 1, the pixels P arranged in an m-column × n-row matrix are shown as rectangular blocks. In FIG. 1, coordinates represented by (column number, row number) are appended to the symbols of the pixels. In this specification, the direction in which each row extends (row direction) is defined as the horizontal direction, and the direction in which each column extends (column direction) is defined as the vertical direction. Also, the row number of the uppermost row is the first row, and the column number of the leftmost column is the first column.

[0014] The vertical scanning unit 13 operates in response to a control signal from the control unit 12 and is a control circuit (pixel control unit) that drives the pixels P constituting the pixel array 11 in row units. The vertical scanning unit 13 supplies a control signal to the pixels P in row units via the control lines V(1) to V(n) arranged for each row of the pixel array 11. The vertical scanning unit 13 can be configured using a shift register or an address decoder. Note that each of the control lines V(1) to V(n) can be composed of a plurality of signal lines.

[0015] The vertical scanning unit 13 is connected to the m pixels P arranged in the corresponding row via the control lines V(1) to V(n), and selects a row for performing reset or a row for reading out a signal. The pixel P selected as the row for performing reset is reset and starts exposure. The pixels P in the row selected as the row for reading out a signal output the signal to the readout circuit unit 14 all at once via the corresponding vertical output lines H(1) to H(m). Note that each of the vertical output lines H(1) to H(m) can be composed of a plurality of signal lines.

[0016] The operations that the vertical scanning unit 13 causes the pixels P to perform include electronic shutter scanning and readout scanning. Electronic shutter scanning refers to an operation of starting exposure by sequentially releasing the reset state of charge accumulation in the photoelectric conversion element for some or all of the rows of the pixels P in the pixel array 11 in row units to make the state capable of accumulating charge. Readout scanning refers to an operation of sequentially outputting signals corresponding to the amount of charge accumulated in the photoelectric conversion element from some or all of the rows of the pixels P in the pixel array 11 in row units. In the present disclosure, electronic shutter scanning and readout scanning are collectively referred to as pixel control.

[0017] The readout circuit unit 14 is a circuit that reads out an analog signal from the pixels P in each column. The readout circuit unit 14 may include an amplification circuit that amplifies the signal output from the pixel P.

[0018] The AD conversion unit 15 converts the analog signal output from the readout circuit unit 14 into a digital signal. The memory unit 16 temporarily holds the digital signal output from the AD conversion unit 15. The AD conversion and the holding of the digital signal can be performed for each column. That is, the AD conversion unit 15 may include an AD conversion circuit corresponding to each column. The memory unit 16 may include a memory corresponding to each column.

[0019] The horizontal scanning unit 17 operates in response to a control signal from the control unit 12, and is a circuit that transfers the digital signals held in the memories of each column of the memory unit 16 to the signal processing unit 18 sequentially for each column. The horizontal scanning unit 17 may be configured using a shift register or an address decoder. The digital signal at the address specified by the horizontal scanning unit 17 is sequentially read out from the memory unit 16 to the signal processing unit 18.

[0020] The signal processing unit 18 is a signal processing circuit that performs various digital signal processes for reducing noise generated in the pixel array 11, the readout circuit unit 14, the AD conversion unit 15, the memory unit 16, the horizontal scanning unit 17, etc. The signal processing unit 18 outputs the processed signal to the outside of the photoelectric conversion device 1 in a predetermined format.

[0021] The control unit 12 is a control circuit that acquires a signal indicating setting information such as shooting conditions when the photoelectric conversion device 1 performs imaging, and generates a control signal based on the setting information. The control unit 12 controls these units by outputting a control signal to the vertical scanning unit 13, the readout circuit unit 14, the AD conversion unit 15, the memory unit 16, the horizontal scanning unit 17, and the signal processing unit 18.

[0022] The photoelectric conversion device 1 according to the present embodiment may be formed on a single substrate, or may be a stacked type in which a plurality of substrates are stacked. FIG. 2 is a perspective view showing a configuration example of the stacked photoelectric conversion device 1. As shown in FIG. 2, the photoelectric conversion device 1 may be a stacked photoelectric conversion device in which a pixel substrate 10a and a circuit substrate 10b are stacked and electrically connected. The pixel substrate 10a and the circuit substrate 10b may be semiconductor substrates such as silicon.

[0023] On the pixel substrate 10a, among the components of the photoelectric conversion device 1, the pixel array 11 can be arranged. Further, on the circuit substrate 10b, among the components of the photoelectric conversion device 1, the control unit 12, the vertical scanning unit 13, the readout circuit unit 14, the AD conversion unit 15, the memory unit 16, the horizontal scanning unit 17, and the signal processing unit 18 can be arranged.

[0024] By configuring the photoelectric conversion device 1 in this way, when manufacturing the photoelectric conversion device 1, an appropriate manufacturing process can be selected for each of the analog unit including the pixel array 11 and the logic unit including the signal processing unit 18. As a result, the characteristics of each part of the photoelectric conversion device 1 are improved. Therefore, a photoelectric conversion device 1 with improved image quality can be realized.

[0025] As described above, the pixel array 11 and the signal processing unit 18 are arranged in the photoelectric conversion device 1, but it is not limited thereto. The signal processing unit 18 may be arranged in a signal processing device different from the pixel array 11. Further, the signal processing unit 18 may be arranged in a signal processing device outside the photoelectric conversion device 1. In this case, the signal processing device corrects the signal output from the photoelectric conversion device 1 to generate image data or the like. Further, the signal processing unit 18 may be realized by a computer including a processor (such as a CPU (Central Processing Unit) or an MPU (Micro Processing Unit)). Further, the signal processing unit 18 may be realized by a circuit such as an ASIC (Application Specific Integrated Circuit).

[0026] FIG. 3 is a schematic diagram showing a configuration example of the pixel array 11 according to the present embodiment. The pixel array 11 includes an effective pixel region 11a and correction signal acquisition regions 11b and 11c. The effective pixel region 11a is a region in which effective pixels including photoelectric conversion elements are arranged. The effective pixels output signals corresponding to light incident on the pixel array 11 through an optical system such as a lens. The correction signal acquisition region 11b is a region in which correction pixels that output correction signals used for black level correction are arranged. The correction signal acquisition regions 11b and 11c can be light-shielded regions that optically shield incident light to the photoelectric conversion elements, for example, by disposing light-shielding portions such as light-shielding films on the photoelectric conversion elements. Such light-shielded regions can also be called optical black (OB) regions.

[0027] The correction signal acquisition region 11c is arranged to the left of the effective pixel region 11a so as to correspond to each row of the effective pixel region 11a. The correction signal acquisition region 11c may also be called an HOB region. The correction signal acquisition region 11c may be arranged to the right of the effective pixel region 11a.

[0028] The correction signal acquisition region 11b is arranged above the effective pixel region 11a and the correction signal acquisition region 11c. The correction signal acquisition region 11b may also be called a VOB region. The correction signal acquisition region 11b may be arranged below the effective pixel region 11a and the correction signal acquisition region 11c.

[0029] Note that the correction signal acquisition regions 11b and 11c are not limited to OB regions where the photoelectric conversion elements are light-shielded. For example, the correction signal acquisition regions 11b and 11c may be NULL regions that do not have photoelectric conversion elements. The pixel P in the NULL region has the same configuration as that obtained by excluding the photoelectric conversion element from the effective pixels in the effective pixel region 11a. In this case, the correction signal acquisition region 11c may also be called a VNULL region, and the correction signal acquisition region 11b may also be called an HNULL region. Further, the correction signal acquisition regions 11b and 11c may include both OB regions and NULL regions.

[0030] FIG. 4 is a circuit diagram showing a configuration example of the pixel P according to the first embodiment. In FIG. 4, a pixel P(m,n) arranged at the m-th row and n-th column of the pixel array 11 is illustrated, but other pixels P also have the same configuration. The pixel P includes a photoelectric conversion element PD, a transfer transistor M1, a reset transistor M2, an amplification transistor M3, and selection transistors M4 and M5.

[0031] The photoelectric conversion element PD is an element that generates and accumulates charges corresponding to incident light by photoelectrically converting the incident light. The photoelectric conversion element PD is, for example, a photodiode. Here, it is assumed that the photoelectric conversion element PD is constituted by a photodiode.

[0032] The anode of the photodiode constituting the photoelectric conversion element PD is connected to the ground node. The cathode of the photodiode constituting the photoelectric conversion element PD is connected to the source of the transfer transistor M1. The drain of the transfer transistor M1 is connected to the source of the reset transistor M2 and the gate of the amplification transistor M3. The connection node between the drain of the transfer transistor M1, the source of the reset transistor M2, and the gate of the amplification transistor M3 is a so-called floating diffusion portion FD.

[0033] The drain of the reset transistor M2 and the drain of the amplification transistor M3 are connected to the power supply voltage node (voltage VCC). The source of the amplification transistor M3 is connected to the drain of the selection transistor M4 and the drain of the selection transistor M5. The source of the selection transistor M4 is connected to the signal line Vline1(m) via the signal line sel1(n)_cm. The source of the selection transistor M5 is connected to the signal line Vline2(m) via the signal line sel2(n)_cm. The signal lines Vline1(m) and Vline2(m) are part of a plurality of signal lines constituting the vertical output line H(m).

[0034] In the case of the pixel configuration shown in FIG. 4, each of the control lines arranged in each row of the pixel array 11 includes a transfer gate signal line, a reset signal line, and two selection signal lines. The transfer gate signal line of the n-th row is connected to the gates of the transfer transistors M1 of the pixels P(1,n) to P(m,n) in the n-th row. The transfer gate signal line of the n-th row supplies the control signal PTX(n) output from the vertical scanning unit 13 to the gates of the transfer transistors M1 of the pixels P(1,n) to P(m,n).

[0035] The reset signal line of the n-th row is connected to the gates of the reset transistors M2 of the pixels P(1,n) to P(m,n) in the n-th row. The reset signal line of the n-th row supplies the control signal PRES(n) output from the vertical scanning unit 13 to the gates of the reset transistors M2 of the pixels P(1,n) to P(m,n).

[0036] The first selection signal line of the n-th row is connected to the gates of the selection transistors M4 of the pixels P(1,n) to P(m,n) in the n-th row. The first selection signal line of the n-th row supplies the control signal PSEL1(n) output from the vertical scanning unit 13 to the gates of the selection transistors M4 of the pixels P(1,n) to P(m,n).

[0037] The second selection signal line of the n-th row is connected to the gates of the selection transistors M5 of the pixels P(1,n) to P(m,n) in the n-th row. The second selection signal line of the n-th row supplies the control signal PSEL2(n) output from the vertical scanning unit 13 to the gates of the selection transistors M5 of the pixels P(1,n) to P(m,n). Thus, for the pixels P in the same row, a common control signal is supplied from the vertical scanning unit 13.

[0038] When each transistor is composed of N-channel transistors, when a high-level control signal is supplied from the vertical scanning unit 13, the corresponding transistor becomes conductive. Also, when a low-level control signal is supplied from the vertical scanning unit 13, the corresponding transistor becomes non-conductive. Here, it is assumed that the high level corresponds to the logical value "1" and the low level corresponds to the logical value "0". Note that each transistor constituting the pixel P can be composed of N-channel transistors, but may also be composed of P-channel transistors.

[0039] The photoelectric conversion element PD converts incident light into an amount of charge corresponding to the amount of the light (photoelectric conversion) and accumulates the generated charge. The transfer transistor M1 transfers the charge held by the photoelectric conversion element PD to the floating diffusion part FD when it is turned on (conductive state). The floating diffusion part FD includes a capacitance component, holds the charge transferred from the photoelectric conversion element PD in the capacitance, and becomes a potential corresponding to the amount of charge by charge-voltage conversion by the capacitance.

[0040] A bias current is supplied to the source of the amplification transistor M3 from a current source (not shown) via the signal line Vline1(m) and the selection transistor M4 or via the signal line Vline2(m) and the selection transistor M5. Also, a power supply voltage (voltage VCC) is supplied to the drain of the amplification transistor M3. That is, the amplification transistor M3 constitutes a source follower circuit with the gate as the input node. Thereby, the amplification transistor M3 outputs a signal based on the potential of the floating diffusion part FD to the signal line Vline1(m) via the selection transistor M4, or outputs it to the signal line Vline2(m) via the selection transistor M5.

[0041] When the reset transistor M2 turns on (conducts), it resets the floating diffusion part FD to a potential corresponding to the power supply voltage (voltage VCC). By turning on the transfer transistor M1 simultaneously with the reset transistor M2, the photoelectric conversion element PD can also be reset to a potential corresponding to the voltage VCC. The selection transistor M4 switches the connection between the amplification transistor M3 and the signal line Vline1(m). Also, the selection transistor M5 switches the connection between the amplification transistor M3 and the signal line Vline2(m).

[0042] The electronic shutter scanning is an operation that sequentially performs the electronic shutter operation (first control) of the pixel P in row units. In the electronic shutter operation of the pixel P, the reset state of the photoelectric conversion element PD is released. The photoelectric conversion element PD is reset to a potential corresponding to the power supply voltage (voltage VCC) by turning on the transfer transistor M1 and the reset transistor M2. By turning off the transfer transistor M1 from this reset state, the reset state of the photoelectric conversion element PD is released, and exposure (charge accumulation) in the photoelectric conversion element PD is started.

[0043] The readout scanning is an operation that sequentially performs the readout operation (second control) of the pixel P in row units. In the readout operation of the pixel P, the readout of the noise signal (N signal) and the readout of the signal (S signal) based on the incident light are performed.

[0044] The readout of the N signal is performed by outputting, by the amplification transistor M3, a signal corresponding to the potential of the floating diffusion part FD in the reset state to the signal line Vline1(m) or the signal line Vline2(m) after releasing the reset state of the floating diffusion part FD. The release of the reset state of the floating diffusion part FD is performed by turning off the reset transistor M2. At that time, when reading the N signal to the signal line Vline1(m), the selection transistor M4 is turned on, and when reading the N signal to the signal line Vline2(m), the selection transistor M5 is turned on.

[0045] The reading of the S signal is performed after the reading of the N signal. The charge held by the photoelectric conversion element PD is transferred to the floating diffusion section FD, and a signal corresponding to the amount of charge transferred to the floating diffusion section FD is output to the signal line Vline1(m) or the signal line Vline2(m). At this time, when reading the S signal to the signal line Vline1(m), the selection transistor M4 is turned on, and when reading the S signal to the signal line Vline2(m), the selection transistor M5 is turned on.

[0046] By performing correlated double sampling processing (S-N) on the S signal and the N signal read in this way, a pixel signal with the reset noise of the floating diffusion section FD removed can be obtained.

[0047] FIG. 5 is a schematic diagram showing the connection relationship between the vertical scanning section 13 and the pixel array 11 according to the present embodiment. The vertical scanning section 13 receives a control signal from the control section 12 and generates and outputs control signals PTX(1) to PTX(n), PRES(1) to PRES(n), PSEL1(1) to PSEL1(n), and PSEL2(1) to PSEL2(n). The control signals PTX(k), PRES(k), PSEL1(k), and PSEL2(k) output from the vertical scanning section 13 are input to the pixels P(1,k) to P(m,k) arranged in the k-th row via the control line V(k) (k is an integer from 1 to n).

[0048] The vertical scanning section 13 can perform an electronic shutter operation and a reading operation on the pixels P(1,k) to P(m,k) in the k-th row by appropriately controlling the control signals PTX(k), PRES(k), PSEL1(k), and PSEL2(k). Then, by sequentially controlling the control signals PTX(k), PRES(k), PSEL1(k), and PSEL2(k) for each row, an electronic shutter scan and a read scan can be performed.

[0049] FIG. 6 is a schematic diagram showing the connection relationship between the pixel array 11 and the readout circuit section 14 according to the present embodiment. In each column of the pixel array 11, vertical output lines H(1) to H(m) are arranged. Each of the vertical output lines H(1) to H(m) includes a plurality of signal lines. In the example of FIG. 6, each of the vertical output lines H(1) to H(m) is assumed to include six signal lines.

[0050] The vertical output line H(1) of the first column includes signal lines c1_vl1, c1_vl2, c1_vl3, c1_vl4, c1_vl5, and c1_vl6. The vertical output line H(2) of the second column includes signal lines c2_vl1, c2_vl2, c2_vl3, c2_vl4, c2_vl5, and c2_vl6. The vertical output line H(m) of the m-th column includes signal lines cm_vl1, cm_vl2, cm_vl3, cm_vl4, cm_vl5, and cm_vl6. Each signal line is connected to a constant current source (not shown). Note that the signal lines Vline1 and Vline2 described in FIG. 4 are any of these signal lines.

[0051] The source of the selection transistor M4 included in the pixel P(j, k) of the j-th column and the k-th row is connected to the vertical output line H(j) via the signal line sel1(k)_cj (j is an integer from 1 to m, and k is an integer from 1 to n). The source of the selection transistor M5 included in the pixel P(j, k) of the j-th column and the k-th row is connected to the vertical output line H(j) via the signal line sel2(k)_cj.

[0052] First, paying attention to the signal line sel1(k)_cj connected to the selection transistor M4, the connection relationship between the pixel array 11 and the readout circuit section 14 will be described in more detail.

[0053] The signal line sel1(k)_cj is connected to a predetermined signal line among the signal lines c1_vl1 to c1_vl6 in a 6-line cycle. In the example of FIG. 6, the signal line sel1(1)_cj is connected to the signal line cj_vl1. The signal line sel1(2)_cj is connected to the signal line cj_vl2. The signal line sel1(3)_cj is connected to the signal line cj_vl3. The signal line sel1(4)_cj is connected to the signal line cj_vl4. The signal line sel1(5)_cj is connected to the signal line cj_vl5. The signal line sel1(6)_cj is connected to the signal line cj_vl6. Similarly, the signal lines sel1(7)_cj to sel1(n)_cj after the 7th row are also connected to a predetermined signal line among the signal lines cj_vl1 to cj_vl6 in a 6-line cycle. For example, the signal line sel1(7)_cj is connected to the signal line cj_vl1. The signal line sel1(12)_cj is connected to the signal line cj_vl6. The signal line sel1(n)_cj is connected to the signal line cj_vl6.

[0054] The signal line sel1(k)_cj is connected in the order of the signal lines cj_vl1, cj_vl2, cj_vl3, cj_vl4, cj_vl5, cj_vl6, cj_vl1,... according to the order of the rows, but the connection order does not necessarily have to be this order. As long as the signal lines sel1(k)_cj of six consecutive rows are connected to different signal lines among the signal lines ck_vl1 to ck_vl6, this connection order may be other orders.

[0055] Next, paying attention to the signal line sel2(k)_cj connected to the selection transistor M5, the connection relationship between the pixel array 11 and the readout circuit section 14 will be described in more detail. Regarding the signal line sel2(k)_cj, it will be described separately for the signal lines connected to the signal lines cj_vl1 to cj_vl4 and the signal lines connected to the signal lines cj_vl5 and cj_vl6.

[0056] First, the signal lines among the signal lines sel2(k)_cj that are connected to the signal lines cj_vl1 to cj_vl4 will be described. Among the signal lines sel2(k)_cj, the signal line sel2(12i 1+1)_cj is connected to signal line cj_vl1. Signal line sel2(12i 1 +4)_cj is connected to signal line cj_vl2. Signal line sel2(12i 1 +7)_cj is connected to signal line cj_vl3. Signal line sel2(12i 1 +10)_cj is connected to signal line cj_vl4. Here, i 1 is an integer from 0 to (n / 12 - 1). For example, signal line sel2(1)_cj is connected to signal line cj_vl1. Signal line sel2(4)_cj is connected to signal line cj_vl2. Signal line sel2(7)_cj is connected to signal line cj_vl3. Signal line sel2(10)_cj is connected to signal line cj_vl4. Similarly, for signal lines sel2(13)_cj to sel2(n - 2)_cj from the 13th row onwards, they are connected to a predetermined signal line among signal lines cj_vl1 to cj_vl4 in a 12-row cycle.

[0057] Signal line sel2(k)_cj is connected to a predetermined signal line among signal lines cj_vl1 to cj_vl4 at 2-row intervals, but the signal line sel2(k)_cj connected to signal lines cj_vl1 to cj_vl4 does not necessarily have to be at 2-row intervals. Signal line sel2(k)_cj may be connected to a predetermined signal line among signal lines cj_vl1 to cj_vl4 at S-row intervals (S is an integer greater than or equal to 1). Also, the order of connecting signal line sel2(k)_cj to signal lines cj_vl1, cj_vl2, cj_vl3, cj_vl4 does not necessarily have to be the order of the rows. As long as there is one signal line sel2(k)_cj connected to each of signal lines cj_vl1 to cj_vl4 in consecutive (S + 1) × 4 rows of signal line sel2(k)_cj.

[0058] Next, the signal lines among signal line sel2(k)_cj that are connected to signal lines cj_vl5 and cj_vl6 will be described. Among signal line sel2(k)_cj, signal line sel2(6i 2 +2)_cj is connected to signal line cj_vl5. Signal line sel2(6i 2+5)_cj is connected to signal line cj_vl6. Here, i 2 is an integer from 0 to (n / 6 - 1). For example, signal line sel2(2)_cj is connected to signal line cj_vl5. Signal line sel2(5)_cj is connected to signal line cj_vl6. Similarly, for signal lines sel2(8)_cj to sel2(n - 1)_cj after the 8th line, they are connected to a predetermined signal line among cj_vl5 and cj_vl6 in a 6-line cycle.

[0059] Signal line sel2(k)_cj is connected to a predetermined signal line among cj_vl5 and cj_vl6 at an interval of 2 lines, but the signal line sel2(k)_cj connected from cj_vl5 to cj_vl6 does not necessarily have to be at an interval of 2 lines. Signal line sel2(k)_cj may be connected to a predetermined signal line among cj_vl5 and cj_vl6 at an interval of S lines (S is an integer of 1 or more). Also, the order of connecting signal line sel2(k)_cj to cj_vl5 and cj_vl6 does not necessarily have to be the order of the lines. It is sufficient that there is one signal line sel2(N)_cj connected to cj_vl5 and cj_vl6 respectively in (S + 1)×2 consecutive lines of signal line sel2(k)_cj.

[0060] Regarding the signal line sel2(k)_cj of pixel P in rows other than those described above, it may be connected to any of the six signal lines cj_vl1 to cj_vl6.

[0061] For example, as shown in FIG. 6, signal line sel2(6i 2 + 3) may be connected to signal line cj_vl6, and signal line sel2(6i 2 + 6) may be connected to signal line cj_vl5. Here, i 2 is an integer from 0 to (n / 6 - 1). According to this connection, the pixel signal of pixel P in the (6i 2 + 2)th row and the pixel signal of pixel P in the (6i 2 + 6)th row can be analog-added on signal line cj_vl5. Also, in the (6i 2+3) The pixel signal of the pixel P in the (6i 2 +5) The pixel signal of the pixel P in the (6i

[0062] Alternatively, as another example, the following configuration can be cited. The signal line sel2(12i 1 +3) is connected to the signal line cj_vl1, and the signal line sel2(12i 1 +6) is connected to the signal line cj_vl2. Also, the signal line sel2(12i 1 +9) is connected to the signal line cj_vl3, and the signal line sel2(12i 1 +12) is connected to the signal line cj_vl4. Here, i 1 is an integer from 0 to (n / 12 - 1). According to this connection, analog addition of pixel signals can be performed on the signal lines cj_vl1 to cj_vl4. Specifically, the pixel signal of the pixel P in the (12i 1 +1) and the pixel signal of the pixel P in the (12i 1 +3) can be analog-added on the signal line cj_vl1. Also, the pixel signal of the pixel P in the (12i 1 +4) and the pixel signal of the pixel P in the (12i 1 +6) can be analog-added on the signal line cj_vl2. Also, the pixel signal of the pixel P in the (12i 1 +7) and the pixel signal of the pixel P in the (12i 1 +9) can be analog-added on the signal line cj_vl3. Also, the pixel signal of the pixel P in the (12i 1 +10) and the pixel signal of the pixel P in the (12i 1 +12) can be analog-added on the signal line cj_vl4.

[0063] By connecting in this way, the number of selection transistors M4 and M5 connected to each of the six signal lines cj_vl1 to cj_vl6 arranged in each column becomes the same. Therefore, the parasitic capacitances (transistor capacitances) connected to the signal lines cj_vl1 to cj_vl6 can be made uniform.

[0064] FIG. 7 is a timing chart showing an operation example of the photoelectric conversion device 1 according to the present embodiment. With reference to FIG. 7, the electronic shutter scanning and the readout scanning in the photoelectric conversion device 1 will be described. In the present embodiment, it is assumed that the signal output from each pixel P is made via the selection transistor M4. That is, the signal output from each pixel P to the vertical output lines H(1) to H(m) is made via the signal line sel1(k)_cj, and the signal line sel2(k)_cj is not used.

[0065] The horizontal direction in FIG. 7 indicates the passage of time. The vertical direction in FIG. 7 schematically shows the pixel rows in which the electronic shutter scanning and the readout scanning are performed, and the uppermost row is taken as the first row. "cp_vl1", "cp_vl2", "cp_vl3", "cp_vl4", "cp_vl5" and "cp_vl6" in the leftmost frame of FIG. 7 indicate six signal lines from which signals are read out from the pixels in a certain column (the p-th column) (p is an integer from 1 to m).

[0066] "VD" and "HD" in FIG. 7 indicate the input timings of the vertical synchronization signal and the horizontal synchronization signal, respectively. "Number of pixel controls" in FIG. 7 indicates the total value of the number of controlled rows of pixel rows in which the electronic shutter operation and the readout operation are controlled in parallel at the same time. "Correction coefficient switching signal" in FIG. 7 indicates a control signal used for switching the correction coefficient used for the correction performed in the signal processing unit 18. The correction coefficient switching signal will be described later in the description of FIG. 9.

[0067] Times T1, T2, and T3 are the times when the pulses of the vertical synchronization signal VD are input. That is, time T1 is the start time of a certain frame period, and time T2 is the start time of the next frame period. In the present embodiment, in one frame period between time T1 and time T2, the electronic shutter scanning and the readout scanning are each performed once.

[0068] At time T1, the read operation starts. During the period from time T1 to time T1a1, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in 6 lines from the first line to the sixth line are read out. This period is one cycle of the pulse of the horizontal synchronization signal HD and is one line control period. That is, in the present embodiment, the control of two or more lines is performed in parallel within one line control period. Note that this charge accumulation is started by the electronic shutter scanning in a frame period (not shown) immediately before the one-frame period from time T1 to time T2.

[0069] During the period from time T1 to time T1a1, the vertical scanning unit 13 controls the control signals PSEL1(1) to PSEL1(6) to be at a high level. Thereby, the selection transistors M4 of the pixels P arranged in 6 lines from the first line to the sixth line are turned on. By this operation, the pixel signals output from the pixels P of the first line are read out to the read circuit unit 14 via the signal line cp_vl1. The pixel signals output from the pixels P of the second line are read out to the read circuit unit 14 via the signal line cp_vl2. The pixel signals output from the pixels P of the third line are read out to the read circuit unit 14 via the signal line cp_vl3. The pixel signals output from the pixels P of the fourth line are read out to the read circuit unit 14 via the signal line cp_vl4. The pixel signals output from the pixels P of the fifth line are read out to the read circuit unit 14 via the signal line cp_vl5. The pixel signals output from the pixels P of the sixth line are read out to the read circuit unit 14 via the signal line cp_vl6. Thus, during the period from time T1 to time T1a1, the signal reading for 6 lines from the first line to the sixth line is performed in parallel.

[0070] At time T1a1, the pulse of the horizontal synchronization signal HD is input, and the next read operation starts. During the period from time T1a1 to time T1a2, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in 6 lines from the seventh line to the twelfth line are read out.

[0071] During the period from time T1a1 to time T1a2, the vertical scanning unit 13 controls the control signals PSEL1(7) to PSEL1(12) to a high level. As a result, the selection transistors M4 of the pixels P arranged in six rows from the seventh row to the twelfth row are turned on. By this operation, pixel signals are read from the pixels P arranged in six rows from the seventh row to the twelfth row to the readout circuit unit 14, similarly to the above. Thus, during the period from time T1a1 to time T1a2, signal readout for six rows from the seventh row to the twelfth row is performed in parallel.

[0072] After time T1a2, the readout operation is sequentially performed for six rows at a time in synchronization with the horizontal synchronization signal HD.

[0073] Also, during the frame period (from time T1 to time T2), an electronic shutter scan for the readout scan of the next frame period (from time T2 to time T3) is performed.

[0074] At time T1a3, the electronic shutter scan starts. During the period from time T1a3 to time T1a4, the reset state of the photoelectric conversion elements PD of the pixels P arranged in six rows from the first row to the sixth row is released.

[0075] During the period from time T1a3 to time T1a4, the vertical scanning unit 13 controls the control signals PTX(1) to PTX(6) from a high level to a low level. As a result, the transfer transistors M1 of the pixels P arranged in six rows from the first row to the sixth row are turned off. By this electronic shutter operation, charge accumulation starts in the pixels P for six rows from the first row to the sixth row.

[0076] After time T1a4, the electronic shutter operation is sequentially performed for six rows at a time in synchronization with the horizontal synchronization signal HD.

[0077] Note that, in the frame period from time T2 to time T3, an example is shown where the electronic shutter scanning is not performed and only the readout scanning is performed from time T2. The time difference between the electronic shutter scanning starting from time T1a3 and the readout scanning from time T2 corresponds to the exposure period in pixel P.

[0078] In the period from time T1 to time T1a3 and the period from time T1a7 to time T2a7, only one of the electronic shutter scanning and the readout scanning is performed. Therefore, as shown in the "Pixel Control Number" in FIG. 7, the pixel control number is 6 in these periods. On the other hand, in the period between time T1a3 and time T1a7, the electronic shutter scanning and the readout scanning are performed overlappingly. Therefore, as shown in the "Pixel Control Number" in FIG. 7, the pixel control number is 12 in these periods. Thus, in this embodiment, the pixel control number can be changed within one frame period. In the operation of this embodiment, the pixel control number changes at time T1a3. As a result, a potential fluctuation may occur in the potential of the power supply or the like at a time near time T1a3. Due to this potential fluctuation, strip-shaped noise may appear in the image. This strip-shaped noise may occur near the pixel row where the readout is performed near the timing when the pixel control number changes.

[0079] In the example of FIG. 7, the start times of the readout scanning and the electronic shutter scanning are set to time T1 and time T1a3 respectively, but these start times may be different depending on the settings of the photoelectric conversion device 1 or the like. Therefore, the period during which the readout scanning and the electronic shutter scanning are performed overlappingly may also be different depending on the settings of the photoelectric conversion device 1 or the like.

[0080] The signal processing unit 18 of this embodiment has a function of correcting the noise caused by the change in the pixel control number as described above. Hereinafter, this correction process will be described.

[0081] FIG. 8 is a block diagram of the signal processing unit 18 according to this embodiment. The signal processing unit 18 has a black level correction circuit 180. The black level correction circuit 180 has a correction unit 181 and a correction value generation unit 182.

[0082] The correction value generation unit 182 generates a correction value used for black level correction based on the correction signals acquired in the correction signal acquisition regions 11b and 11c and the correction coefficient switching signal. The correction unit 181 performs black level correction of the pixel signal by subtracting the correction value from the pixel signal acquired in the effective pixel region 11a. In the generation of the correction value, the regions (row and column ranges) within the correction signal acquisition regions 11b and 11c where the correction signal is acquired can be set as appropriate.

[0083] FIG. 9 is a block diagram of the correction value generation unit 182 according to the present embodiment. The correction value generation unit 182 includes a row average value calculation unit 182a, a subtraction unit 182b, a correction coefficient selection unit 182c, an attenuation unit 182d, an addition unit 182e, and a clamp value holding unit 182f.

[0084] The correction value generation unit 182 performs a filter process with reference to three values: the row average value of the correction signal calculated by the row average value calculation unit 182a, the attenuation coefficient set by the attenuation unit 182d, and the clamp value held by the clamp value holding unit 182f. A new clamp value is generated by this filter process. In the present embodiment, the process performed by the correction value generation unit 182 is a process of generating a clamp value by performing digital low-pass filter processing on the correction signal for each row. The digital low-pass filter in the present embodiment is an IIR (Infinite Impulse Response) filter.

[0085] For the above-described filter process, from the viewpoint of reducing row variation, it is desirable to use the above-described IIR filter. However, the process using the IIR filter is not limited as long as the average value of the correction signal can be acquired as the clamp value. For example, integral averaging may be used for the process of the correction value generation unit 182.

[0086] The row average value calculation unit 182a calculates the row average value of the correction signals acquired in the correction signal acquisition regions 11b and 11c. It is desirable that the correction signals used for calculating the row average value be acquired from the correction signal acquisition region 11c. This is because correction signals of the same row as the effective pixel region 11a can be acquired from the correction signal acquisition region 11c, enabling effective correction of noise that depends on the position of the pixel row.

[0087] The row average value calculated by the row average value calculation unit 182a is input to the subtraction unit 182b. The subtraction unit 182b subtracts the clamp value held in the clamp value holding unit 182f from the row average value and outputs it to the attenuation unit 182d.

[0088] A correction coefficient selection signal, a first correction coefficient, and a second correction coefficient are input to the correction coefficient selection unit 182c. These control signals may be input, for example, from the control unit 12, from other blocks of the photoelectric conversion device 1, or from outside the photoelectric conversion device 1. The correction coefficient switching signal is a signal for transmitting a change in the pixel control number to the correction coefficient selection unit 182c. The first correction coefficient and the second correction coefficient are attenuation coefficients for the attenuation process performed in the attenuation unit 182d. The first correction coefficient and the second correction coefficient are different from each other.

[0089] Based on the correction coefficient switching signal, the correction coefficient selection unit 182c selects either the first correction coefficient or the second correction coefficient and outputs it to the attenuation unit 182d. It is assumed that the correction coefficient selection unit 182c selects the first correction coefficient when the correction coefficient switching signal is "1" and selects the second correction coefficient when the correction coefficient switching signal is "0". The attenuation unit 182d attenuates the signal output from the subtraction unit 182b (the value obtained by subtracting the clamp value from the row average value) according to the correction coefficient selected by the correction coefficient selection unit 182c.

[0090] The signal after attenuation processing output from the attenuation unit 182d is input to the addition unit 182e. The addition unit 182e adds the output signal of the attenuation unit 182d and the clamp value held in the clamp value holding unit 182f. The correction value thus obtained is output from the correction value generation unit 182 to the correction unit 181. Also, this correction value is held as a clamp value in the clamp value holding unit 182f and is used for generating the correction value in the next row.

[0091] Summarizing the above processing, the IIR filter processing performed by the loop of the subtraction unit 182b, the attenuation unit 182d, the addition unit 182e, and the clamp value holding unit 182f is expressed by the following formula (1). Clamp value (correction value) of the k-th row = attenuation coefficient × row average value of the k-th row + (1 - attenuation coefficient) × clamp value of the (k - 1)-th row (1) Here, the "attenuation coefficient" in formula (1) is the attenuation coefficient of the attenuation unit 182d determined by the first correction coefficient or the second correction coefficient, and is a value greater than 0 and less than or equal to 1.

[0092] In the operation example of FIG. 6, the correction coefficient switching signal is "1" during the period from time T1a3 when the pixel control number increases from 6 to 12 to time T1a4. Also, in other periods, the correction coefficient switching signal is "1". Therefore, the correction coefficient selection unit 182c selects the first correction coefficient during the period from time T1a3 to time T1a4, and selects the second correction coefficient in other periods.

[0093] It is desirable that the attenuation coefficient of the attenuation unit 182d set by the first correction coefficient is larger than the attenuation coefficient of the attenuation unit 182d set by the second correction coefficient. With this setting, compared with the case where the second correction coefficient is set, the tracking performance of the IIR filter can be improved when the first correction coefficient is set. Thereby, when the pixel control number changes, it is possible to switch from the second correction coefficient to the first correction coefficient, and a correction value can be generated with high tracking performance. Therefore, since the tracking performance of the correction becomes high at the timing when the pixel control number changes and the potential such as the power supply fluctuates, noise can be corrected more effectively.

[0094] The larger the change amount of the pixel control number, the larger the fluctuation amount of the potential of the power supply or the like, and large noise may occur. Therefore, when the change amount of the pixel control number is large, a larger value may be set as the first correction coefficient.

[0095] Note that the types of correction coefficients selected by the correction coefficient selection unit 182c and applied to the attenuation unit 182d are not limited to two, and may be three or more. For example, in the operation of the photoelectric conversion device 1 as shown in FIG. 7, when the number of types of pixel control number values is three or more, the same number of correction coefficient types as the number of types of pixel control number values may be selectable.

[0096] The method of detecting a change in the pixel control number in the generation and acquisition of the correction coefficient switching signal is not particularly limited. For example, a flag for transmitting a change in the pixel control number may be generated in the vertical scanning unit 13, and the signal processing unit 18 may receive the flag. Further, the signal processing unit 18 may refer to, for example, a set value for switching pixel control from the control unit 12.

[0097] Further, the correction coefficient switching signal may be the value "1" of the first correction coefficient selected not only at the moment when the pixel control number changes, but also for a predetermined period after the pixel control number changes. Further, the correction coefficient switching signal may be the value "1" of the first correction coefficient for a predetermined period between before and after the change of the pixel control number. That is, the correction coefficient switching signal may be the value "1" of the first correction coefficient within a predetermined number of line control periods including the timing when the pixel control number changes, and the value "0" of the second correction coefficient in other line control periods.

[0098] In the present embodiment, an example in which the correction coefficient selection unit 182c determines the switching of the correction coefficient based on the correction coefficient switching signal has been shown, but the determination of the switching of the correction coefficient may be performed based on other conditions. For example, when a mechanical shutter is mounted on the photoelectric conversion device 1 and the mechanical shutter is used for imaging, the determination may be made so as not to switch the correction coefficient.

[0099] FIG. 10 is a flowchart showing the black level correction method according to the present embodiment. An example of the processing procedure in the signal processing unit 18 will be described. In some cases, descriptions of parts overlapping with the descriptions of FIGS. 8 and 9 may be omitted or simplified as appropriate.

[0100] In step S11, the photoelectric conversion device 1 acquires a correction signal from the correction signal acquisition region 11c of the pixel array 11. This correction signal is input to the row average value calculation unit 182a.

[0101] In step S12, the row average value calculation unit 182a calculates the row average value from the correction signal.

[0102] In step S13, the correction coefficient selection unit 182c determines whether the value of the input correction coefficient switching signal is "1". In step S13, if the correction coefficient switching signal is "1" (YES in step S13), the process proceeds to step S14. In step S14, the correction coefficient selection unit 182c selects the first correction coefficient and outputs it to the attenuation unit 182d. Thereafter, the process proceeds to step S16.

[0103] In step S13, if the correction coefficient switching signal is not "1" (NO in step S13), the process proceeds to step S15. In step S15, the correction coefficient selection unit 182c selects the second correction coefficient and outputs it to the attenuation unit 182d. Thereafter, the process proceeds to step S16.

[0104] In step S16, the subtraction unit 182b, the attenuation unit 182d, the addition unit 182e, and the clamp value holding unit 182f generate a correction value by the above-described IIR filter. This correction value is held by the clamp value holding unit 182f, and the clamp value is updated. Also, this correction value is output to the correction unit 181.

[0105] In step S17, the correction unit 181 performs black level correction processing on the pixel signal by subtracting the correction value, that is, the updated clamp value, from the pixel signal acquired in the effective pixel region 11a.

[0106] In the process of step S13, the process is switched based on whether the correction coefficient switching signal is "1", but other discrimination criteria may be used. For example, when the number of types of correction coefficients is 3 or more, the correction coefficient switching signal may have a value corresponding to the type of correction coefficient. In this case, the process of step S13 is replaced with a process of specifying the value of the correction coefficient switching signal.

[0107] When the control of a plurality of rows is performed in parallel, such as in the case of electronic shutter scanning and readout scanning, the number of rows controlled in parallel may change. In such a case, strip noise may appear in the image due to fluctuations in the potential of the power supply or the like. In the present embodiment, by switching the correction coefficient used for black level correction during a period including the timing when the number of rows controlled in parallel changes, the noise can be appropriately corrected. Therefore, according to the present embodiment, a photoelectric conversion device with reduced noise is provided.

[0108] In the present embodiment, an example is shown in which the correction coefficient is switched only once within one frame period. However, the number of times of switching the correction coefficient may be two or more within one frame period, and can be appropriately set according to the number of times of change in the number of pixel controls.

[0109] [Second Embodiment] Referring to FIG. 11, the photoelectric conversion device of the second embodiment will be described. In the present embodiment, an example of a correction method in a driving method in which two readout scans are performed in parallel will be described. In the present embodiment, descriptions of elements common to the first embodiment may be omitted or simplified.

[0110] FIG. 11 is a timing chart showing an operation example of the photoelectric conversion device 1 according to the present embodiment. Referring to FIG. 11, the electronic shutter scanning and the readout scanning in the photoelectric conversion device 1 will be described. In the present embodiment, unlike the first embodiment, it is assumed that the signal output from each pixel P is made via the selection transistor M5. That is, the signal output from each pixel P to the vertical output lines H(1) to H(m) is made via the signal line sel2(k)_cj, and the signal line sel1(k)_cj is not used.

[0111] In the present embodiment, by performing two types of pixel controls (first pixel control and second pixel control) in parallel, two sets of image data can be acquired in parallel. The image acquired by the first pixel control can be used, for example, as an image taken for live view. The image acquired by the second pixel control can be used, for example, as an image for flicker detection.

[0112] When acquiring image data by readout scanning, only the selection transistor M5 of the pixel P is used, and pixel signals are read from the six vertical output lines H(p) arranged in each column (p is an integer from 1 to m). At that time, in the readout scanning (first readout scanning) by the first pixel control, reading is performed using four of the six vertical output lines H(p) arranged in each column (signal lines cp_vl1, cp_vl2, cp_vl3, cp_vl4). In the readout scanning (second readout scanning) by the second pixel control, reading is performed using two of the six vertical output lines H(p) arranged in each column (signal lines cp_vl5, cp_vl6). Since the connection relationship of the pixels P, the signal line sel2(k)_cj, and the signal lines cp_vl1, cp_vl2, cp_vl3, cp_vl4, cp_vl5, cp_vl6 in each row is the same as that described with reference to FIG. 6 in the first embodiment, the description thereof will be omitted.

[0113] During a one-frame period from time T1 to time T2, first pixel control including one-time electronic shutter scanning (first electronic shutter scanning) and one-time readout scanning (first readout scanning), and second pixel control including one-time electronic shutter scanning (second electronic shutter scanning) are performed.

[0114] At time T1, the first readout scanning of the first pixel control starts. During the period from time T1 to time T1a1, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in four rows, namely the first row, the fourth row, the seventh row, and the tenth row, are read out.

[0115] During the period from time T1 to time T1a1, the vertical scanning unit 13 controls the control signals PSEL2(1), PSEL2(4), PSEL2(7), and PSEL2(10) to be at a high level. As a result, the selection transistors M5 of the pixels P arranged in the four rows, namely the first row, the fourth row, the seventh row, and the tenth row, are turned on. By this operation, the pixel signals output from the pixels P in the first row are read out to the readout circuit unit 14 via the signal line cp_vl1. The pixel signals output from the pixels P in the fourth row are read out to the readout circuit unit 14 via the signal line cp_vl2. The pixel signals output from the pixels P in the seventh row are read out to the readout circuit unit 14 via the signal line cp_vl3. The pixel signals output from the pixels P in the tenth row are read out to the readout circuit unit 14 via the signal line cp_vl4. Thus, during the period from time T1 to time T1a1, signal readouts for the four rows, namely the first row, the fourth row, the seventh row, and the tenth row, are performed in parallel.

[0116] At time T1a1, a pulse of the horizontal synchronization signal HD is input, and the next readout operation starts. During the period from time T1a1 to time T1a2, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in four rows, namely the 13th row, the 16th row, the 19th row, and the 22nd row, are read out.

[0117] During the period from time T1a1 to time T1a2, the vertical scanning unit 13 controls the control signals PSEL2(13), PSEL2(16), PSEL2(19), and PSEL2(22) to the high level. As a result, the selection transistors M5 of the pixels P arranged in the four rows of the 13th row, 16th row, 19th row, and 22nd row are turned on. By this operation, in the same manner as described above, pixel signals are read from the pixels P arranged in the four rows of the 13th row, 16th row, 19th row, and 22nd row to the readout circuit unit 14. Thus, during the period from time T1a1 to time T1a2, signal readout for four rows of the 13th row, 16th row, 19th row, and 22nd row is performed in parallel.

[0118] After time T1a2, in synchronization with the horizontal synchronization signal HD, the readout operation is sequentially performed for four rows at a period of one row every three rows.

[0119] Also, during the frame period (from time T1 to time T2), the first electronic shutter scanning and the second electronic shutter scanning for the first readout scanning and the second readout scanning in the next frame period (from time T2 to time T3) are performed.

[0120] At time T1a5, the first electronic shutter scanning of the first pixel control starts. During the period from time T1a5 to time T1a6, the reset state of the photoelectric conversion elements PD of the pixels P arranged in the four rows of the first row, fourth row, seventh row, and tenth row is released.

[0121] During the period from time T1a5 to time T1a6, the vertical scanning unit 13 controls the control signals PTX(1), PTX(4), PTX(7), and PTX(10) from the high level to the low level. As a result, the transfer transistors M1 of the pixels P arranged in the four rows of the first row, fourth row, seventh row, and tenth row are turned off. By this electronic shutter operation, charge accumulation starts in the pixels P for four rows of the first row, fourth row, seventh row, and tenth row.

[0122] After time T1a6, synchronized with the horizontal synchronization signal HD, the electronic shutter operation is sequentially performed for four lines at a period of one line every three lines. Further, after time T1a6, the second electronic shutter scan of the second pixel control is performed in parallel with the first electronic shutter scan of the first pixel control.

[0123] At time T1a6, the second electronic shutter scan of the second pixel control starts. During the period from time T1a6 to time T1a7, the reset state of the photoelectric conversion elements PD of the pixels P arranged in two lines, the second line and the fifth line, is released.

[0124] During the period from time T1a6 to time T1a7, the vertical scanning unit 13 controls the control signals PTX(2) and PTX(5) from high level to low level. As a result, the transfer transistors M1 of the pixels P arranged in two lines, the second line and the fifth line, are turned off. By this electronic shutter operation, the accumulation of charges starts in the pixels P for two lines, the second line and the fifth line.

[0125] After time T1a7, synchronized with the horizontal synchronization signal HD, the electronic shutter operation is sequentially performed for two lines at a period of one line every three lines.

[0126] During the one-frame period from time T2 to time T3, the first pixel control including one electronic shutter scan (first electronic shutter scan) and one readout scan (first readout scan) and the second pixel control including one readout scan (second readout scan) are performed.

[0127] At time T2, the first readout scan of the first pixel control starts. During the period from time T2 to time T2a1, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in four lines, the first line, the fourth line, the seventh line, and the tenth line, are read out. Since this first readout scan is the same as the first readout scan of the first pixel control starting from time T1, the description is omitted. That is, after time T2, synchronized with the horizontal synchronization signal HD, the readout operation is sequentially performed for four lines at a period of one line every three lines.

[0128] Also, after time T2a1, a second readout scan for second pixel control is performed in parallel with the first readout scan for first pixel control. During the period from time T2a1 to time T2a2, signals based on the charges of the photoelectric conversion elements PD of the pixels P arranged in two lines, i.e., the second line and the fifth line, are read out.

[0129] During the period from time T2a1 to time T1a2, the vertical scanning unit 13 controls the control signals PSEL2(2) and PSEL2(5) to be at a high level. As a result, the selection transistors M5 of the pixels P arranged in the two lines, i.e., the second line and the fifth line, are turned on. By this operation, the pixel signals output from the pixels P in the second line are read out to the readout circuit unit 14 via the signal line cp_vl5. The pixel signals output from the pixels P in the fifth line are read out to the readout circuit unit 14 via the signal line cp_vl6. Thus, during the period from time T2a1 to time T2a2, signal readouts for two lines, i.e., the second line and the fifth line, are performed in parallel. After time T2a2, in synchronization with the horizontal synchronization signal HD, readout operations are sequentially performed for two lines at a period of one line every three lines.

[0130] At time T2a5, a first electronic shutter scan for first pixel control corresponding to the first readout scan for first pixel control of the next frame starts. This first electronic shutter scan is the same as the first electronic shutter scan starting from time T1a6. That is, after time T2a5, in synchronization with the horizontal synchronization signal HD, electronic shutter operations are sequentially performed for four lines at a period of one line every three lines.

[0131] During the one-frame period after time T3, first pixel control including one first readout scan is performed. This first readout scan is the same as the first electronic shutter scan starting from time T2. That is, after time T3, in synchronization with the horizontal synchronization signal HD, readout operations are sequentially performed for four lines at a period of one line every three lines.

[0132] During the period from time T2a1 to time T2a3, the first read scan and the second read scan are performed overlappingly. Therefore, as shown in "Number of Pixel Controls" in FIG. 11, the number of pixel controls increases during these periods compared to other periods. In the operation of this embodiment, the number of pixel controls changes at times T2a1 and T2a3. As a result, fluctuations may occur in the potential of a power supply or the like at times near T2a1 and T2a3. Due to this potential fluctuation, stripy noise may appear in the image.

[0133] The start times of the first and second electronic shutter scans and the first and second read scans shown in the example of FIG. 11 may vary depending on the settings of the photoelectric conversion device 1 and the like. Therefore, the period during which the first read scan and the second read scan are performed overlappingly may also vary depending on the settings of the photoelectric conversion device 1 and the like. Also, the number of pixel controls and the number of scans in one frame period can be set as appropriate.

[0134] In the operation example of FIG. 11, the correction coefficient switching signal is "1" during the period from time T2a1 to time T2a2 and during the period from time T2a3 to time T2a4. Therefore, the correction coefficient selection unit 182c selects the first correction coefficient during the period from time T2a1 to time T2a2 and during the period from time T2a3 to time T2a4, and selects the second correction coefficient during other periods. Other configurations and correction processes are the same as those in the first embodiment.

[0135] As described above, even in a driving method in which two read scans are performed in parallel as in this embodiment, the correction coefficient used for black level correction is switched at the timing when the number of rows controlled in parallel changes in the same manner as in the first embodiment, and correction can be performed. Therefore, according to this embodiment, a photoelectric conversion device with reduced noise is provided.

[0136] [Third Embodiment] Referring to FIG. 12, a photoelectric conversion device according to the third embodiment will be described. In this embodiment, an example of a correction method in a driving method in which the first readout scan of the first pixel control and the second electronic shutter scan of the second pixel control are performed in parallel will be described. In this embodiment, descriptions of elements common to the first embodiment or the second embodiment may be omitted or simplified.

[0137] FIG. 12 is a timing chart showing an operation example of the photoelectric conversion device 1 according to this embodiment. Referring to FIG. 12, the electronic shutter scan and the readout scan in the photoelectric conversion device 1 will be described. Also in this embodiment, similar to the second embodiment, it is assumed that the signal output from each pixel P is made via the selection transistor M5. That is, the signal output from each pixel P to the vertical output lines H(1) to H(m) is made via the signal line sel2(k)_cj, and the signal line sel1(k)_cj is not used.

[0138] During one frame period from time T1 to time T2, first pixel control including one electronic shutter scan (first electronic shutter scan) and one readout scan (first readout scan) each, and second pixel control including one electronic shutter scan (second electronic shutter scan) are performed.

[0139] At time T1, the first readout scan of the first pixel control starts. During the period from time T1 to time T1a1, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in the four rows of the first row, the fourth row, the seventh row, and the tenth row are read out.

[0140] During the period from time T1a1 to time T1a2, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in the four rows of the 13th row, the 16th row, the 19th row, and the 22nd row are read out. After time T1a2, in synchronization with the horizontal synchronization signal HD, the readout operation is sequentially performed for four rows in a cycle of one row every three rows.

[0141] Also, during the frame period (from time T1 to time T2), the first and second electronic shutter scans for the first and second read scans of the next frame period (from time T2 to time T3) are performed.

[0142] At time T1a1, the second electronic shutter scan of the second pixel control starts. During the period from time T1a1 to time T1a2, the reset state of the photoelectric conversion elements PD of the pixels P arranged in two rows, i.e., the second and fifth rows, is released. After time T1a2, in synchronization with the horizontal synchronization signal HD, the electronic shutter operation is sequentially performed for two rows at a period of one row every three rows.

[0143] At time T1a7, the first electronic shutter scan of the first pixel control starts. During the period from time T1a7 to time T1a8, the reset state of the photoelectric conversion elements PD of the pixels P arranged in four rows, i.e., the first, fourth, seventh, and tenth rows, is released. After time T1a8, in synchronization with the horizontal synchronization signal HD, the electronic shutter operation is sequentially performed for four rows at a period of one row every three rows.

[0144] During one frame period from time T2 to time T3, the first pixel control including one electronic shutter scan (the first electronic shutter scan) and one read scan (the first read scan) and the second pixel control including one read scan (the second read scan) are performed.

[0145] At time T2, the first read scan of the first pixel control starts. During the period from time T2 to time T2a1, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in four rows, i.e., the first, fourth, seventh, and tenth rows, are read. Since this first read scan is the same as the first read scan of the first pixel control starting from time T1, the description is omitted. That is, after time T2, in synchronization with the horizontal synchronization signal HD, the read operation is sequentially performed for four rows at a period of one row every three rows.

[0146] At time T2a5, the second readout scan of the second pixel control starts. During the period from time T2a5 to time T2a6, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in two rows, i.e., the second row and the fifth row, are read out. After time T2a6, in synchronization with the horizontal synchronization signal HD, the readout operation is sequentially performed for two rows at a period of one row every three rows.

[0147] At time T2a7, the first electronic shutter scan of the first pixel control corresponding to the first readout scan of the first pixel control in the next frame starts. This first electronic shutter scan is the same as the first electronic shutter scan starting from time T1a7. That is, after time T2a7, in synchronization with the horizontal synchronization signal HD, the electronic shutter operation is sequentially performed for four rows at a period of one row every three rows.

[0148] During one frame period after time T3, the first pixel control including one first readout scan is performed. This first readout scan is the same as the first electronic shutter scan starting from time T2. That is, after time T3, in synchronization with the horizontal synchronization signal HD, the readout operation is sequentially performed for four rows at a period of one row every three rows.

[0149] During the period from time T1a1 to time T1a3, the first readout scan and the second electronic shutter scan are performed overlappingly. Therefore, as shown in the "number of pixel controls" in FIG. 12, the number of pixel controls increases during these periods compared to other periods. In the operation of this embodiment, the number of pixel controls changes at times T1a1 and T1a4. As a result, potential fluctuations may occur in the potential of the power supply or the like at times near T1a1 and T1a4. Due to this potential fluctuation, strip-shaped noise may appear in the image.

[0150] The start times of the first and second electronic shutter scans and the first and second readout scans shown in the example of FIG. 12 may vary depending on the settings of the photoelectric conversion device 1 and the like. Therefore, the period during which the first readout scan and the second electronic shutter scan are performed in parallel may also vary depending on the settings of the photoelectric conversion device 1 and the like. Also, the number of pixels to be controlled and the number of scans in one frame period can be set as appropriate.

[0151] In the operation example of FIG. 12, the correction coefficient switching signal is "1" during the period from time T1a1 to time T1a2 and during the period from time T1a3 to time T1a4. Therefore, the correction coefficient selection unit 182c selects the first correction coefficient during the period from time T1a1 to time T1a2 and during the period from time T1a3 to time T1a4, and selects the second correction coefficient during other periods. Other configurations and correction processes are the same as those in the first embodiment.

[0152] As described above, even in the driving method in which the first readout scan of the first pixel control and the second electronic shutter scan of the second pixel control are performed in parallel as in the present embodiment, it is possible to switch the correction coefficient in the same manner as in the second embodiment. That is, it is possible to perform correction by switching the correction coefficient used for black level correction at the timing when the number of rows controlled in parallel changes in the same manner as in the first embodiment. Therefore, according to the present embodiment, a photoelectric conversion device with reduced noise is provided.

[0153] In the present embodiment, an example in which the first readout scan of the first pixel control and the second electronic shutter scan of the second pixel control are performed in parallel is shown, but the same applies when the first electronic shutter scan of the first pixel control and the second readout scan of the second pixel control are performed in parallel.

[0154] Since the noise generation factors are different between the second embodiment and the third embodiment, the values of the correction coefficients used for black level correction may be set to different values.

[0155] [Fourth Embodiment] Referring to FIGS. 13 and 14, a photoelectric conversion device according to the fourth embodiment will be described. In this embodiment, an example of a correction method in the case where a plurality of photoelectric conversion elements are arranged in one pixel P will be described. In this embodiment, descriptions of elements common to the first to third embodiments may be omitted or simplified.

[0156] FIG. 13 is a circuit diagram showing a configuration example of the pixel P according to this embodiment. In the photoelectric conversion device 1 according to this embodiment, the configuration of at least some of the plurality of pixels P constituting the pixel array 11 is different from that of the photoelectric conversion device 1 of the first embodiment. The pixel P of the photoelectric conversion device 1 according to this embodiment includes photoelectric conversion elements PDA and PDB, transfer transistors M1A and M1B, a reset transistor M2, an amplification transistor M3, selection transistors M4 and M5. That is, in this embodiment, one pixel P has two photoelectric conversion elements PDA and PDB (first photoelectric conversion element, second photoelectric conversion element). The photoelectric conversion elements PDA and PDB of one pixel P are arranged to share one microlens, and light that has passed through different pupil regions of the incident optical system is incident on the photoelectric conversion elements PDA and PDB. It can also be said that one pixel P includes a sub-pixel A including the photoelectric conversion element PDA and a sub-pixel B including the photoelectric conversion element PDB. The photoelectric conversion elements PDA and PDB are, for example, photodiodes. Here, it is assumed that both the photoelectric conversion elements PDA and PDB are constituted by photodiodes.

[0157] The anode of the photodiode that constitutes the photoelectric conversion element PDA is connected to the ground node. The cathode of the photodiode that constitutes the photoelectric conversion element PDA is connected to the source of the transfer transistor M1A. Also, the anode of the photodiode that constitutes the photoelectric conversion element PDB is connected to the ground node. The cathode of the photodiode that constitutes the photoelectric conversion element PDB is connected to the source of the transfer transistor M1B. The drains of the transfer transistor M1A and the transfer transistor M1B are connected to the source of the reset transistor M2 and the gate of the amplification transistor M3. The connection node between the drain of the transfer transistor M1A, the drain of the transfer transistor M1B, the source of the reset transistor M2, and the gate of the amplification transistor M3 is a so-called floating diffusion portion.

[0158] The drain of the reset transistor M2 and the drain of the amplification transistor M3 are connected to the power supply voltage node (voltage VCC). The source of the amplification transistor M3 is connected to the drains of the selection transistor M4 and the selection transistor M5. The source of the selection transistor M4 is connected to the signal line Vline1(m) via the signal line sel1(n)_cm. The source of the selection transistor M5 is connected to the signal line Vline2(m) via the signal line sel2(n)_cm. The signal lines Vline1(m) and Vline2(m) are part of a plurality of signal lines that constitute the vertical output line H(m).

[0159] In the case of the pixel configuration shown in FIG. 13, each of the control lines arranged in each row of the pixel array 11 includes two transfer gate signal lines, a reset signal line, and two selection signal lines. The first transfer gate signal line of the n-th row is connected to the gates of the transfer transistors M1A of the pixels P(1,n) to P(m,n) in the n-th row. The first transfer gate signal line of the n-th row supplies the control signal PTXA(n) output from the vertical scanning unit 13 to the gates of the transfer transistors M1A of the pixels P(1,n) to P(m,n). The second transfer gate signal line of the n-th row is connected to the gates of the transfer transistors M1B of the pixels P(1,n) to P(m,n) in the n-th row. The second transfer gate signal line of the n-th row supplies the control signal PTXB(n) output from the vertical scanning unit 13 to the gates of the transfer transistors M1B of the pixels P(1,n) to P(m,n). Since the connection between the reset signal line, the two selection signal lines, and the pixel P is the same as that in FIG. 4, the description thereof is omitted.

[0160] When each transistor is composed of an N-channel transistor, when a high-level control signal is supplied from the vertical scanning unit 13, the corresponding transistor becomes conductive. Also, when a low-level control signal is supplied from the vertical scanning unit 13, the corresponding transistor becomes non-conductive. Here, it is assumed that the high level corresponds to the logical value "1" and the low level corresponds to the logical value "0". Each transistor constituting the pixel P may be composed of an N-channel transistor, but may also be composed of a P-channel transistor.

[0161] The photoelectric conversion elements PDA and PDB convert incident light into an amount of charge corresponding to the amount of the light (photoelectric conversion) and accumulate the generated charge. The transfer transistor M1A transfers the charge held by the photoelectric conversion element PDA to the floating diffusion section FD when it is turned on (conductive). The transfer transistor M1B transfers the charge held by the photoelectric conversion element PDB to the floating diffusion section FD when it is turned on. The floating diffusion section FD includes a capacitive component, holds the charge transferred from the photoelectric conversion element PD in the capacitance, and becomes a potential corresponding to the amount of charge by charge-voltage conversion by the capacitance.

[0162] A bias current is supplied from a current source (not shown) to the source of the amplification transistor M3 via the signal line Vline1(m) and the selection transistor M4 or via the signal line Vline2(m) and the selection transistor M5. Also, a power supply voltage (voltage VCC) is supplied to the drain of the amplification transistor M3. That is, the amplification transistor M3 constitutes a source follower circuit having a gate as an input node. Thereby, the amplification transistor M3 outputs a signal based on the potential of the floating diffusion section FD to the signal line Vline1(m) via the selection transistor M4, or outputs it to the signal line Vline2(m) via the selection transistor M5.

[0163] When the reset transistor M2 is turned on (conducting state), the floating diffusion section FD is reset to a potential corresponding to the power supply voltage (voltage VCC). By turning on the transfer transistors M1A simultaneously with the reset transistor M2 (conducting state), the photoelectric conversion element PDA can also be reset to a potential corresponding to the voltage VCC. By turning on the transfer transistor M1B simultaneously with the reset transistor M2 (conducting state), the photoelectric conversion element PDB can also be reset to a potential corresponding to the voltage VCC.

[0164] As described in the first embodiment, the vertical scanning section 13 appropriately controls the transfer transistors M1A, M1B, the reset transistor M2, and the selection transistors M4, M5. Thereby, from each pixel P, a noise signal (N signal) and a signal (S signal) corresponding to the amount of incident light to the photoelectric conversion elements PDA, PDB can be read out.

[0165] Further, in the pixel P of the present embodiment, two photoelectric conversion elements PDA and PDB share one floating diffusion portion FD. From such a pixel P, a signal based on the charge generated by the photoelectric conversion element PDA and a signal based on the charge generated by the photoelectric conversion element PDB can be read out separately or in combination. For example, first, the N signal and the S signal (A signal) based on the charge generated by the photoelectric conversion element PDA are read out, and then, the N signal and the S signal (B signal) based on the charge generated by the photoelectric conversion element PDB are read out. The A signal and the B signal can be used as signals for focus detection. The A + B signal obtained by adding the A signal and the B signal can be used as a signal for image generation.

[0166] FIG. 14 is a timing chart showing an operation example of the photoelectric conversion device 1 according to the present embodiment. With reference to FIG. 14, the electronic shutter scanning and the readout scanning in the photoelectric conversion device 1 will be described. In the present embodiment, as in the first embodiment, it is assumed that the signal output from each pixel P is made via the selection transistor M4. That is, the signal output from each pixel P to the vertical output lines H(1) to H(m) is made via the signal line sel1(k)_cj, and the signal line sel2(k)_cj is not used.

[0167] During one frame period from time T1 to time T2, one electronic shutter scanning and one readout scanning are performed. Also, the acquisition of the A signal and the acquisition of the A + B signal are continuously performed in a series of scans.

[0168] At time T1, the readout scanning starts. During the period from time T1 to time T1a1, the A signal based on the charge accumulated in the photoelectric conversion element PDA of the pixels P arranged in six rows from the first row to the sixth row is read out.

[0169] During the period from time T1a1 to time T1a2, the A + B signal based on the charges accumulated in the photoelectric conversion elements PDA and PDB of the pixels P arranged in six rows from the first row to the sixth row is read out.

[0170] During the period from time T1a2 to time T1a3, the A signal based on the charges accumulated in the photoelectric conversion element PDA of the pixel P arranged in 6 rows from the 7th row to the 12th row is read out.

[0171] During the period from time T1a3 to time T1a4, the A + B signal based on the charges accumulated in the photoelectric conversion elements PDA and PDB of the pixel P arranged in 6 rows from the 7th row to the 12th row is read out.

[0172] After time T1a4, in synchronization with the horizontal synchronization signal HD, the readout operations of the A signal and the A + B signal are sequentially performed 6 rows at a time. Also, during the frame period (from time T1 to time T2), an electronic shutter scan for the readout scan of the next frame period (from time T2 to time T3) is performed.

[0173] At time T1a6, the electronic shutter scan starts. During the period from time T1a6 to time T1a7, the reset state of the photoelectric conversion element PDA of the pixel P arranged in 6 rows from the 1st row to the 6th row is released.

[0174] During the period from time T1a7 to time T1a8, the reset state of the PDB of the pixel P arranged in 6 rows from the 1st row to the 6th row is released. After time T1a7, in synchronization with the horizontal synchronization signal HD, the electronic shutter operation is sequentially performed 6 rows at a time.

[0175] During the one - frame period from time T2 to time T3, a readout scan is performed. This readout scan is the same as the readout scan starting from time T1.

[0176] During the period from time T1a6 to time T1a14, readout scanning and electronic shutter scanning are performed overlappingly. Therefore, as shown in the "number of pixels controlled" in FIG. 14, during these periods, the number of pixels controlled increases compared to other periods. In the operation of this embodiment, the number of pixels controlled changes at time T1a6. As a result, fluctuations may occur in the potential of the power supply or the like at times near time T1a6. Due to this potential fluctuation, stripy noise may appear in the image.

[0177] The start times of the electronic shutter scanning and readout scanning shown in the example of FIG. 14 may differ depending on the settings of the photoelectric conversion device 1 and the like. Therefore, the period during which the electronic shutter scanning and readout scanning are performed overlappingly may also differ depending on the settings of the photoelectric conversion device 1 and the like. Also, the number of pixels controlled and the number of scans in one frame period can be set as appropriate.

[0178] In the operation example of FIG. 14, the correction coefficient switching signal is "1" during the period from time T1a6 to time T1a7 and during the period from time T1a7 to time T1a8. Therefore, the correction coefficient selection unit 182c selects the first correction coefficient during the period from time T1a6 to time T1a7 and during the period from time T1a7 to time T1a8, and selects the second correction coefficient during other periods. Other configurations and correction processes are the same as those in the first embodiment.

[0179] As described above, even in a driving method in which the A signal and the A + B signal are acquired as in this embodiment, the correction coefficient used for black level correction is switched at the timing when the number of rows controlled in parallel changes in the same manner as in the first embodiment, and correction can be performed. Therefore, according to this embodiment, a photoelectric conversion device with reduced noise is provided.

[0180] Note that the correction coefficients used for correcting the A signal and the correction coefficients used for correcting the A + B signal may be different. For example, the first correction coefficient for the A signal can be set to "1" and the second correction coefficient to "8", and the first correction coefficient for the A + B signal can be set to "2" and the second correction coefficient to "10". By using correction coefficients suitable for each of the A signal and the A + B signal, noise can be reduced more effectively.

[0181] [Fifth Embodiment] With reference to FIG. 15, a photoelectric conversion device according to the fifth embodiment will be described. In the present embodiment, the horizontal synchronization signal of the electronic shutter scanning and the horizontal synchronization signal of the readout scanning are independent, and an example of a correction method in the case where they operate at different clock cycles will be described. In the present embodiment, descriptions of elements common to the first to fourth embodiments may be omitted or simplified.

[0182] FIG. 15 is a timing chart showing an operation example of the photoelectric conversion device 1 according to the present embodiment. With reference to FIG. 15, the electronic shutter scanning and the readout scanning in the photoelectric conversion device 1 will be described. In the present embodiment, in one frame period from time T1 to time T2, the readout scanning is controlled by a horizontal synchronization signal HD1 having a period of 10 μs, and the electronic shutter scanning is controlled by a horizontal synchronization signal HD2 having a period of 8 μs.

[0183] In one frame period from time T1 to time T2, one electronic shutter scanning and one readout scanning are performed.

[0184] At time T1, the readout scanning starts. In the period from time T1 to time T1a1, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in six rows from the first row to the sixth row are read out.

[0185] During the period from time T1a1 to time T1a2, signals based on the charges accumulated in the photoelectric conversion elements PD of the pixels P arranged in six rows from the seventh row to the twelfth row are read out. After time T1a2, the readout operation is sequentially performed six rows at a time in synchronization with the horizontal synchronization signal HD1.

[0186] Also, during the frame period (from time T1 to time T2), an electronic shutter scan for the readout scan of the next frame period (from time T2 to time T3) is performed.

[0187] At time T1b5, the electronic shutter scan starts. During the period from time T1b5 to time T1b6, the reset state of the photoelectric conversion elements PD of the pixels P arranged in six rows from the first row to the sixth row is released. After time T1b6, the electronic shutter operation is sequentially performed six rows at a time in synchronization with the horizontal synchronization signal HD2.

[0188] During the one-frame period from time T2 to time T3, a readout scan synchronized with the horizontal synchronization signal HD2 is performed.

[0189] During the period from time T1b5 to time T1a7, the readout scan and the electronic shutter scan are performed overlappingly. Therefore, as shown in the "number of pixel controls" in FIG. 15, the number of pixel controls increases during these periods compared to other periods. In the operation of this embodiment, the number of pixel controls changes after time T1a3. As a result, fluctuations may occur in the potential of the power supply or the like at times near time T1a3. Due to this potential fluctuation, strip-shaped noise may appear in the image.

[0190] The start times of the electronic shutter scan and the readout scan shown in the example of FIG. 15 may differ depending on the settings of the photoelectric conversion device 1 and the like. Therefore, the period during which the electronic shutter scan and the readout scan are performed overlappingly may also differ depending on the settings of the photoelectric conversion device 1 and the like. Also, the number of pixel controls and the number of scans in one frame period can be set as appropriate.

[0191] In the operation example of FIG. 15, the correction coefficient switching signal is “1” during the period from time T1a3 to time T1a4. Therefore, the correction coefficient selection unit 182c selects the first correction coefficient during the period from time T1a3 to time T1a4, and selects the second correction coefficient during other periods. Other configurations and correction processes are the same as those in the first embodiment.

[0192] As described above, even in the driving method in which the horizontal synchronization signal of the electronic shutter scanning and the horizontal synchronization signal of the readout scanning are independent as in the present embodiment, the number of rows controlled in parallel changes in the same manner as in the first embodiment. The correction coefficient can be switched at the timing of correction to perform correction. Therefore, according to the present embodiment, a photoelectric conversion device with reduced noise is provided.

[0193] In the present embodiment, the periods of the horizontal synchronization signals HD1 and HD2 are set to be different, but they may have the same period. Also, in the present embodiment, the horizontal synchronization signals HD1 and HD2 are set to be asynchronous, but they may be synchronous. Further, in the present embodiment, the period of the horizontal synchronization signal HD1 is set to 10 μs, and the period of the horizontal synchronization signal HD2 is set to 8 μs, but the lengths of the periods are not limited to these.

[0194] [Sixth Embodiment] FIG. 16 is a diagram showing a configuration example of the imaging system 1100 according to the present embodiment. The imaging system 1100 is an example of a device in which the photoelectric conversion device 1 of the above-described first to fifth embodiments is incorporated. The imaging system 1100 includes a signal generation unit 1101, a signal correction unit 1102, a CPU 1103, an external input unit 1104, an optical system 1105, a video display unit 1106, a recording unit 1107, and a drive system 1108.

[0195] The signal correction unit 1102 can be the above-described signal processing unit 18. Further, the signal generation unit 1101 can include the above-described pixel array 11, control unit 12, vertical scanning unit 13, readout circuit unit 14, AD conversion unit 15, memory unit 16, horizontal scanning unit 17, and the like. Therefore, the signal generation unit 1101 and the signal correction unit 1102 can be the above-described photoelectric conversion device 1.

[0196] The optical system 1105 is a part that causes light to enter the light receiving part of the signal generation unit 1101, and may include a lens, a diaphragm, etc. The signal generation unit 1101 photoelectrically converts the incident light to generate an analog image signal. The signal generation unit 1101 generates and outputs image data by performing AD conversion on this analog signal. The signal correction unit 1102 performs correction processing on the image data so that it can be output to and stored in the video display unit 1106 or the recording unit 1107. The video display unit 1106 performs image display using the corrected display image data. Also, the recording unit 1107 stores the display image data. The CPU 1103 is a processor that performs overall control and arithmetic processing of the imaging system 1100. The drive system 1108 performs, for example, focus adjustment of the optical system 1105, adjustment of the diaphragm, etc. The external input unit 1104 can be buttons or the like for the user to input imaging conditions, operate the shutter, etc. The video display unit 1106 may be a touch panel, and the touch panel may function as part of the external input unit 1104.

[0197] According to the present embodiment, a device in which the photoelectric conversion device 1 of the first to fifth embodiments is incorporated is provided.

[0198] [Seventh Embodiment] The device according to the seventh embodiment of the present invention will be described with reference to FIG. 17. FIG. 17 is a block diagram showing a schematic configuration of the device according to the present embodiment.

[0199] FIG. 17 is a schematic diagram showing a device EQP including a photoelectric conversion device APR. The photoelectric conversion device APR has the functions of the photoelectric conversion device 1 of the first to fifth embodiments. All or part of the photoelectric conversion device APR is a semiconductor device IC. The photoelectric conversion device APR in this example can be used, for example, as an image sensor, an AF (Auto Focus) sensor, a photometric sensor, a distance measuring sensor, etc. The semiconductor device IC has a pixel area PX in which pixel circuits PXC including a photoelectric conversion unit are arranged in a matrix. The semiconductor device IC can have a peripheral area PR around the pixel area PX. Circuits other than the pixel circuit can be arranged in the peripheral area PR.

[0200] The photoelectric conversion device APR may have a structure (chip stacking structure) in which a first semiconductor chip provided with a plurality of photoelectric conversion units and a second semiconductor chip provided with peripheral circuits are stacked. The peripheral circuits in the second semiconductor chip can each be column circuits corresponding to the pixel columns of the first semiconductor chip. Also, the peripheral circuits in the second semiconductor chip can each be matrix circuits corresponding to the pixels or pixel blocks of the first semiconductor chip. For the connection between the first semiconductor chip and the second semiconductor chip, through electrodes (TSV), inter-chip wiring by direct bonding of conductors such as copper, connection by micro-bumps between chips, connection by wire bonding, etc. can be adopted.

[0201] In addition to the semiconductor device IC, the photoelectric conversion device APR may include a package PKG that houses the semiconductor device IC. The package PKG may include a substrate to which the semiconductor device IC is fixed, a lid such as glass facing the semiconductor device IC, and connection members such as bonding wires and bumps that connect the terminals provided on the substrate and the terminals provided on the semiconductor device IC.

[0202] The equipment EQP may further include at least one of an optical device OPT, a control device CTRL, a processing device PRCS, a display device DSPL, a memory device MMRY, and a mechanical device MCHN. The optical device OPT corresponds to a photoelectric conversion device APR as a photoelectric conversion device, and is, for example, a lens, a shutter, or a mirror. The control device CTRL controls the photoelectric conversion device APR, and is, for example, a semiconductor device such as an ASIC. The processing device PRCS processes the signal output from the photoelectric conversion device APR, and constitutes an AFE (analog front end) or a DFE (digital front end). The processing device PRCS is a semiconductor device such as a CPU (central processing unit) or an ASIC (application specific integrated circuit). The display device DSPL is an EL display device, a liquid crystal display device, etc., which displays the information (image) obtained by the photoelectric conversion device APR. The memory device MMRY is a magnetic device, a semiconductor device, etc., which stores the information (image) obtained by the photoelectric conversion device APR. The memory device MMRY is a volatile memory such as SRAM or DRAM, or a non-volatile memory such as a flash memory or a hard disk drive. The mechanical device MCHN has a movable part or a propulsion part such as a motor or an engine. In the equipment EQP, the signal output from the photoelectric conversion device APR is displayed on the display device DSPL or transmitted externally by a communication device (not shown) provided in the equipment EQP. For this purpose, it is preferable that the equipment EQP further includes the memory device MMRY and the processing device PRCS separately from the storage circuit part and the arithmetic circuit part of the photoelectric conversion device APR.

[0203] The equipment EQP shown in FIG. 17 can be an electronic device such as an information terminal having a photographing function (for example, a smartphone and a wearable terminal), a camera (for example, a single-lens reflex camera, a compact camera, a video camera, and a surveillance camera). The mechanical device MCHN in the camera can drive the components of the optical device OPT for zooming, focusing, and shutter operations. Also, the equipment EQP can be a transportation device (mobile body) such as a vehicle, a ship, or an aircraft. Also, the equipment EQP can be a medical device such as an endoscope or a CT scanner.

[0204] The mechanical device MCHN in the transport device can be used as a moving device. The device EQP as a transport device is suitable for transporting the photoelectric conversion device APR, assisting and / or automating operation (control) by a photographing function, and the like. The processing device PRCS for assisting and / or automating operation (control) can perform processing for operating the mechanical device MCHN as a moving device based on the information obtained by the photoelectric conversion device APR.

[0205] The photoelectric conversion device APR according to this embodiment can provide high value to its designer, manufacturer, seller, purchaser, and / or user. Therefore, if the photoelectric conversion device APR is mounted on the device EQP, the value of the device EQP can also be increased. Thus, in manufacturing and selling the device EQP, determining to mount the photoelectric conversion device APR of this embodiment on the device EQP is advantageous in increasing the value of the device EQP.

[0206] [Eighth Embodiment] FIG. 18(a) and FIG. 18(b) are block diagrams of devices related to the in-vehicle camera in the present embodiment. FIGS. 18(a) and 18(b) are examples in which the above-described photoelectric conversion device 1 is applied to a moving body such as a vehicle. The device 80 includes an imaging device 800 (an example of a photoelectric conversion device) and a signal processing device (processing device) that processes signals from the imaging device 800. The device 80 has an image processing unit 801 that performs image processing on a plurality of pieces of image data acquired by the imaging device 800, and a parallax calculation unit 802 that calculates parallax (phase difference of a parallax image) from the plurality of pieces of image data acquired from the device 80. Further, the device 80 has a distance measurement unit 803 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether there is a possibility of collision based on the calculated distance. Here, the parallax calculation unit 802 and the distance measurement unit 803 are examples of distance information acquisition means for acquiring distance information to an object. That is, the distance information is information regarding parallax, defocus amount, distance to an object, and the like. The collision determination unit 804 may determine the possibility of collision using any of these distance information. The distance information acquisition means may be realized by dedicatedly designed hardware, or may be realized by a software module. Further, it may be realized by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or a combination thereof.

[0207] Device 80 is connected to a vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Further, a control ECU 820, which is a control device that outputs a control signal for generating a braking force on the vehicle based on the determination result of the collision determination unit 804, is connected to device 80. Further, device 80 is also connected to an alarm device 830 that issues an alarm to the driver based on the determination result of the collision determination unit 804. For example, when the determination result of the collision determination unit 804 indicates a high possibility of collision, the control ECU 820 performs vehicle control to avoid the collision and reduce damage, such as applying the brakes, returning the accelerator, and suppressing the engine output. The alarm device 830 warns the user by sounding an alarm such as a sound, displaying alarm information on the screen of a car navigation system, or applying vibration to the seat belt or steering wheel. Device 80 functions as a control means for controlling the operation of controlling the vehicle as described above.

[0208] In the present embodiment, device 80 images the periphery of the vehicle, for example, the front or the rear. FIG. 18(b) shows the device when imaging the front of the vehicle (imaging range 850). The vehicle information acquisition device 810 as imaging control means sends an instruction to device 80 or the imaging device 800 to perform the imaging operation. With such a configuration, the ranging accuracy can be further improved.

[0209] In the above description, an example of controlling so as not to collide with other vehicles has been described, but it is also applicable to control for automatically driving while following other vehicles, control for automatically driving so as not to deviate from the lane, and the like. Further, the device is not limited to vehicles such as automobiles, and can be applied to, for example, moving bodies (mobile devices) such as ships, airplanes, artificial satellites, industrial robots, and household robots. In addition, it can be applied not only to moving bodies but also to devices that widely utilize object recognition or biometric recognition, such as advanced road traffic systems (ITS) and monitoring systems.

[0210] [Modification Embodiment] The present invention is not limited to the above-described embodiments and can be variously modified. For example, an example in which a part of the configuration of one embodiment is added to another embodiment, or an example in which a part of the configuration of one embodiment is replaced with a part of the configuration of another embodiment is also an embodiment of the present invention.

[0211] The disclosure of this specification includes the complement of the concepts described in this specification. That is, if this specification describes, for example, that "A is B" (A = B), even if the description that "A is not B" (A ≠ B) is omitted, this specification is considered to disclose or imply that "A is not B". This is because when the description that "A is B" is given, it is assumed that the case where "A is not B" is considered.

[0212] The disclosure of this specification includes the following configurations or methods. (Configuration 1) A pixel array including a plurality of pixels arranged in a plurality of rows, A pixel control unit that controls the plurality of pixels row by row, A correction value generation unit that generates a correction value used for black level correction of a signal output from the pixel array, having The pixel array includes an effective pixel region that outputs a signal corresponding to incident light by photoelectric conversion, and a correction signal acquisition region that outputs a correction signal in the black level correction, The correction signal acquisition region is arranged so as to correspond to each row of the effective pixel region, The pixel control unit is configured to control pixels in two or more rows in parallel within one row control period, and the number of rows to be controlled in parallel within one frame period can be changed, The correction value generation unit generates the correction value by a first correction coefficient within a predetermined number of row control periods including the timing at which the number of rows to be controlled changes, and generates the correction value by a second correction coefficient in other row control periods A photoelectric conversion device characterized by the above. (Configuration 2) The pixel control unit performs a first control to release the reset state of charge accumulation in the pixel The photoelectric conversion device according to Configuration 1, characterized in that... (Configuration 3) The pixel control unit performs second control to output a signal based on the charge accumulated in the pixel. The photoelectric conversion device according to Configuration 1 or 2, characterized in that... (Configuration 4) The pixel control unit performs a plurality of the second controls in parallel, and at the timing when the number of control lines changes, the plurality of the second controls overlap. The photoelectric conversion device according to Configuration 3, characterized in that... (Configuration 5) The number of control lines is the total number of lines in which a plurality of the second controls are performed in parallel. The photoelectric conversion device according to Configuration 4, characterized in that... (Configuration 6) The pixel control unit performs first control to release the reset state of charge accumulation in the pixel and second control to output a signal based on the charge accumulated in the pixel, and at the timing when the number of control lines changes, the first control and the second control overlap. The photoelectric conversion device according to Configuration 1, characterized in that... (Configuration 7) The number of control lines is the total number of lines in which the first control and the second control are performed in parallel. The photoelectric conversion device according to Configuration 6, characterized in that... (Configuration 8) The timing of the first control and the timing of the second control are controlled by different synchronization signals. The photoelectric conversion device according to Configuration 6 or 7, characterized in that... (Configuration 9) The different synchronization signals have different periods. The photoelectric conversion device according to Configuration 8, characterized in that... (Configuration 10) Each of the plurality of pixels includes a first photoelectric conversion element and a second photoelectric conversion element. The photoelectric conversion device according to any one of Configurations 1 to 9, characterized in that... (Configuration 11) Each of the plurality of pixels outputs a signal corresponding to the incident light to the first photoelectric conversion element and a signal corresponding to the incident light to the first photoelectric conversion element and the second photoelectric conversion element. The photoelectric conversion device according to Configuration 10, characterized in that. (Configuration 12) The correction value generation unit includes a low-pass filter. The photoelectric conversion device according to any one of Configurations 1 to 11, characterized in that. (Configuration 13) The first correction coefficient and the second correction coefficient are attenuation coefficients of the low-pass filter. The photoelectric conversion device according to Configuration 12, characterized in that. (Configuration 14) The first correction coefficient is larger than the second correction coefficient. The photoelectric conversion device according to Configuration 13, characterized in that. (Configuration 15) The low-pass filter is an IIR (Infinite Impulse Response) filter. The photoelectric conversion device according to any one of Configurations 12 to 14, characterized in that. (Configuration 16) The pixels in the effective pixel region include a photoelectric conversion element. The pixels in the correction signal acquisition region include a photoelectric conversion element and a light shielding portion that shields the incident light to the photoelectric conversion element. The photoelectric conversion device according to any one of Configurations 1 to 15, characterized in that. (Configuration 17) The pixels in the effective pixel region include a photoelectric conversion element. The pixels in the correction signal acquisition region do not include a photoelectric conversion element. The photoelectric conversion device according to any one of Configurations 1 to 15, characterized in that. (Configuration 18) The photoelectric conversion device according to any one of Configurations 1 to 17, An optical device corresponding to the photoelectric conversion device, A control device that controls the photoelectric conversion device, A processing device that processes a signal output from the photoelectric conversion device, A display device that displays information obtained by the photoelectric conversion device, A storage device that stores information obtained by the photoelectric conversion device, and A machine device that operates based on information obtained by the photoelectric conversion device, at least any one of which, and is characterized by a device comprising. (Configuration 19) The processing device is the device according to Configuration 18, characterized in that it acquires distance information from the photoelectric conversion device to an object. (Configuration 20) A signal processing device that has a pixel array including a plurality of pixels arranged in a plurality of rows and a pixel control unit that controls the plurality of pixels row by row, wherein the pixel array includes an effective pixel region that outputs a signal corresponding to incident light by photoelectric conversion and a correction signal acquisition region that outputs a correction signal in black level correction, the correction signal acquisition region is arranged to correspond to each row of the effective pixel region, and the pixel control unit is configured to control pixels in two or more rows in parallel within one row control period and is capable of changing the number of controlled rows controlled in parallel within one frame period, and that A correction value generation unit that generates a correction value, A correction unit that performs the black level correction of the signal output from the pixel array based on the correction value, And has, The correction value generation unit generates the correction value with a first correction coefficient within a predetermined number of row control periods including the timing when the number of controlled rows changes, and generates the correction value with a second correction coefficient in other row control periods A signal processing device characterized by this.

[0213] The present invention can also be realized by a process in which a program that realizes one or more functions of the above-described embodiment is supplied to a system or device via a network or a storage medium, and one or more processors in a computer of the system or device read and execute the program. Further, it can also be realized by a circuit (for example, ASIC) that realizes one or more functions.

[0214] It should be noted that all of the above-described embodiments are merely examples of implementation when carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner by these. That is, the present invention can be implemented in various forms without departing from its technical idea or its main features.

Description of Reference Numerals

[0215] 1 Photoelectric conversion device 11 Pixel array 11a Effective pixel region 11b, 11c Correction signal acquisition regions 182 Correction value generation unit

Claims

1. A pixel array including a plurality of pixels arranged in a plurality of rows, a pixel control unit that controls the plurality of pixels row by row, a correction value generation unit that generates a correction value used for black level correction of a signal output from the pixel array, having, the pixel array includes an effective pixel region that outputs a signal corresponding to incident light by photoelectric conversion and a correction signal acquisition region that outputs a correction signal in the black level correction, the correction signal acquisition region is arranged to correspond to each row of the effective pixel region, the pixel control unit is configured to control pixels in two or more rows in parallel within one row control period, and the number of controlled rows that are controlled in parallel within one frame period can be changed, the correction value generation unit generates the correction value with a first correction coefficient within a predetermined number of row control periods including a timing at which the number of controlled rows changes, and generates the correction value with a second correction coefficient in other row control periods A photoelectric conversion device characterized by the above.

2. The pixel control unit performs a first control to release a reset state of charge accumulation in the pixel The photoelectric conversion device according to claim 1, characterized in that.

3. The pixel control unit performs a second control to output a signal based on the charge accumulated in the pixel The photoelectric conversion device according to claim 1, characterized in that.

4. The pixel control unit performs a plurality of the second controls in parallel, at a timing when the number of controlled rows changes, the plurality of the second controls overlap The photoelectric conversion device according to claim 3, characterized in that.

5. The number of controlled rows is the sum of the number of rows in which a plurality of the second controls are performed in parallel The photoelectric conversion device according to claim 4, characterized in that.

6. The pixel control unit performs a first control to release a reset state of charge accumulation in the pixel and a second control to output a signal based on the charge accumulated in the pixel, at a timing when the number of controlled rows changes, the first control and the second control overlap The photoelectric conversion device according to claim 1, characterized in that.

7. The number of controlled rows is the sum of the number of rows in which the first control and the second control are performed in parallel The photoelectric conversion device according to claim 6, characterized in that.

8. The timing of the first control and the timing of the second control are controlled by different synchronization signals The photoelectric conversion device according to claim 6, characterized in that.

9. The mutually different synchronization signals have mutually different periods The photoelectric conversion device according to claim 8, characterized in that

10. Each of the plurality of pixels includes a first photoelectric conversion element and a second photoelectric conversion element The photoelectric conversion device according to claim 1, characterized in that

11. Each of the plurality of pixels outputs a signal corresponding to the incident light to the first photoelectric conversion element and a signal corresponding to the incident light to the first photoelectric conversion element and the second photoelectric conversion element The photoelectric conversion device according to claim 10, characterized in that

12. The correction value generation unit includes a low-pass filter The photoelectric conversion device according to claim 1, characterized in that

13. The first correction coefficient and the second correction coefficient are attenuation coefficients of the low-pass filter The photoelectric conversion device according to claim 12, characterized in that

14. The first correction coefficient is larger than the second correction coefficient The photoelectric conversion device according to claim 13, characterized in that

15. The low-pass filter is an IIR (Infinite Impulse Response) filter The photoelectric conversion device according to claim 12, characterized in that

16. The pixels in the effective pixel region include photoelectric conversion elements The pixels in the correction signal acquisition region include a photoelectric conversion element and a light shielding portion that shields the incident light to the photoelectric conversion element The photoelectric conversion device according to claim 1, characterized in that

17. The pixels in the effective pixel region include photoelectric conversion elements The pixels in the correction signal acquisition region do not include photoelectric conversion elements The photoelectric conversion device according to claim 1, characterized in that

18. The photoelectric conversion device according to any one of claims 1 to 17, An optical device corresponding to the photoelectric conversion device, A control device for controlling the photoelectric conversion device, A processing device for processing a signal output from the photoelectric conversion device, A display device for displaying information obtained by the photoelectric conversion device, A storage device for storing information obtained by the photoelectric conversion device, and At least one of a mechanical device that operates based on information obtained by the photoelectric conversion device, characterized in that the device is provided

19. The processing device according to claim 18, characterized in that the processing device acquires distance information from the photoelectric conversion device to an object

20. A signal processing device that processes a signal output from a photoelectric conversion device having a pixel array including a plurality of pixels arranged in a plurality of rows, and a pixel control unit that controls the plurality of pixels row by row. The pixel array includes an effective pixel region that outputs a signal corresponding to incident light by photoelectric conversion, and a correction signal acquisition region that outputs a correction signal in black level correction. The correction signal acquisition region is arranged to correspond to each row of the effective pixel region. The pixel control unit is configured to control pixels in two or more rows in parallel within one row control period, and is capable of changing the number of rows to be controlled in parallel within one frame period. The signal processing device includes: a correction value generation unit that generates a correction value; a correction unit that performs the black level correction of the signal output from the pixel array based on the correction value; and has: The correction value generation unit generates the correction value by a first correction coefficient within a predetermined number of row control periods including the timing at which the number of rows to be controlled changes, and generates the correction value by a second correction coefficient in other row control periods. A signal processing device characterized by the above.

Images