Electronic component and instrument including electronic component

Abstract

To enable miniaturization of an electronic component.SOLUTION: An electronic component has a cooling member, a semiconductor substrate, and a base substance on which the cooling member and the semiconductor substrate are mounted. The cooling member is arranged between the base substance and the semiconductor substrate. The semiconductor substrate has a first electrode. The base substance has a second electrode. The first electrode and the second electrode are connected to each other by a conductive wire. A ball is formed at both a joining part of the first electrode and the conductive wire, and a joining part of the second electrode and the conductive wire.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to an electronic component and a device including the electronic component.

Background Art

[0002] Patent Document 1 discloses an electronic device having a Peltier element and an imaging element.

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When wire bonding a substrate on which an imaging element is arranged and a package base on which the substrate is placed, it is difficult to miniaturize the electronic component in order to prevent interference between the bonding capillary and the substrate.

Means for Solving the Problems

[0005] In view of the above problems, an electronic component according to an embodiment of the present invention includes a cooling member, a semiconductor substrate, and a base on which the cooling member and the semiconductor substrate are placed. The cooling member is arranged between the base and the semiconductor substrate. The semiconductor substrate has a first electrode, the base has a second electrode, the first electrode and the second electrode are connected by a conductive wire, and balls are formed at both a joint portion between the first electrode and the conductive wire and a joint portion between the second electrode and the conductive wire.

Effects of the Invention

[0006] According to the present invention, miniaturization of the electronic component can be achieved.

Brief Description of the Drawings

[0007]

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Embodiments for Carrying Out the Invention

[0008] The following embodiments are for embodying the technical idea of the present invention and do not limit the present invention. The sizes and positional relationships of the members shown in each drawing may be exaggerated for clarity of explanation. In the following description, the same components may be denoted by the same numbers and the description may be omitted.

[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description, terms indicating specific directions and positions (for example, "up", "down", "right", "left", and other terms including these terms) are used as necessary. The use of these terms is for facilitating the understanding of the embodiments with reference to the drawings, and the technical scope of the present invention is not limited by the meanings of these terms.

[0010] In this specification, a plan view means viewing from a direction perpendicular to the light incident surface of the semiconductor layer. Also, a cross-sectional view means a plane in a direction perpendicular to the light incident surface of the semiconductor layer. When the light incident surface of the semiconductor layer is rough microscopically, the plan view is defined based on the light incident surface of the semiconductor layer when viewed macroscopically.

[0011] The semiconductor layer has a first surface on which light is incident and a second surface opposite to the first surface. In this specification, the depth direction is the direction from the first surface to the second surface of the semiconductor layer in which the PD (photodiode) is disposed. The "depth" of a certain point or region within the semiconductor layer means the distance from the first surface of that point or region. There is a point (or region) Z1 whose distance (depth) from the first surface is d1 and a point (or region) Z2 whose distance (depth) from the first surface is d2. When d1 > d2, it may also be expressed as "Z1 is deeper than Z2" or "Z2 is shallower than Z1". Also, there is a point (or region) Z3 whose distance (depth) from the first surface is d3. When d1 > d3 > d2 holds, it may also be expressed as "Z3 is at a depth between Z1 and Z2" or "Z3 is between Z1 and Z2 in the depth direction".

[0012] (First Embodiment) An electronic component according to an embodiment of the present disclosure will be described with reference to FIGS. 1 to 8.

[0013] In an electronic component equipped with an imaging device, noise may occur due to temperature changes in the imaging device. To reduce noise, a cooling member for further cooling the semiconductor chip on which the imaging device is disposed can be placed on the package on which the semiconductor chip with the imaging device is mounted. As one of the members used for cooling the semiconductor chip, a Peltier element can be mentioned. In the following embodiments, an electronic component having an imaging device and a Peltier element will be described, but the cooling member is not limited to the Peltier element, and may be, for example, cooling fins, a heat pipe, etc.

[0014] FIG. 1 is a cross-sectional view showing a configuration example of an electronic component according to the first embodiment.

[0015] The electronic component includes a package 100 having a base 101 and an optical member 102 adhered to the frame of the base 101 by an optical member adhesive 108. A Peltier element 106 is adhered to the bottom of the base 101 by a Peltier adhesive 105, and a semiconductor substrate 103 is further adhered by a semiconductor substrate adhesive 107. The semiconductor substrate 103 is electrically connected to the base 101 by a conductive wire 109.

[0016] The base 101 is formed mainly of a ceramic such as alumina or aluminum nitride. This is because it has a high thermal conductivity and easily dissipates the heat generated by the Peltier element to the outside of the package.

[0017] The optical member 102 is formed of, for example, glass, crystal, sapphire, etc. Crystal and sapphire also function as a low-pass filter (LPF). Sapphire has a higher strength than crystal and can be made thinner. That is, it is advantageous for miniaturizing the entire package 100. In addition, since the linear expansion coefficient of sapphire is about the same as that of alumina, if the optical member 102 is sapphire when the base 101 is alumina, the adhesion reliability is high.

[0018] The semiconductor substrate 103 is, for example, a silicon substrate, and is provided with a pixel region 104 in which a plurality of imaging elements are arranged in an array. The imaging element may be, for example, a CMOS image sensor or an avalanche diode. When the imaging element is an avalanche diode, it may be a SPAD (Single Photon Avalanche Diode).

[0019] The optical member adhesive 108 is, for example, an epoxy-based adhesive. It may be an ultraviolet curable adhesive or a heat curable adhesive, but since the inside of the substrate is held in an N 2 atmosphere or vacuum for heat insulation, it is desirable that the adhesive has low moisture permeability and can maintain airtightness.

[0020] In order to keep the moisture permeability low, the adhesive thickness of the optical member adhesive 108 is preferably thin and the adhesive width is preferably wide. For example, the thickness of the optical member adhesive 108 is preferably 20 to 30 μm or less. The adhesive width can be set from the viewpoints of miniaturization of the package 100, adhesive reliability, and moisture permeability.

[0021] For the Peltier adhesive 105 and the semiconductor substrate adhesive 107, materials with high thermal conductivity such as silver paste are preferable. Since the generation of a space on the adhesive surface hinders heat conduction, these adhesives are preferably applied to as wide a surface as possible or the entire surface of the adhesive surface. The adhesive thickness of the Peltier adhesive 105 and the semiconductor substrate adhesive 107 is about 100 μm or less, and particularly preferably about 20 to 30 μm.

[0022] FIG. 2 is a plan view from the side of the optical member 102 of the electronic member according to the present embodiment.

[0023] The pixel region 104 of the rectangular semiconductor substrate 103 is arranged at the center of the electronic member, and a plurality of conductive wires 109 are provided on each side. Here, an electronic member is assumed in which when the length in the longitudinal direction of the electronic member is x and the length in the short transverse direction is y, both x and y are about 20 mm, but the size of the electronic member is not limited to this.

[0024] FIG. 3(a) and FIG. 3(b) are both top views of the optical member 102 side of the electronic member according to the present embodiment. FIG. 3(a) is a schematic diagram when the package 100 is a so-called LGA (Land Grid Array), and FIG. 3(b) is a schematic diagram when the package is a so-called LCC (Leadless Ceramic Chip Carrier).

[0025] The configuration of the electrodes for connection to the outside of the package 100 may be LGA or LCC, or may be PGA. Since it is possible to reduce the height compared to other configurations, LGA is preferable from the viewpoint of miniaturization. Also, a configuration combining LGA and LCC may be used.

[0026] When the configuration of the package 100 is LGA, manufacturing using a reflow furnace is possible, and an improvement in productivity can be expected compared to other methods. However, in order to prevent damage to the Peltier element 106 due to the solder contained in the Peltier element 106 melting during reflow, the reflow furnace used in the manufacture of the electronic component according to the present embodiment needs to be at a low temperature (200° C. or lower). Therefore, the joining to the outside is realized by a material with a low melting point such as resin-reinforced solder.

[0027] The terminal arrangement of LGA preferably has a portion without terminals in the central portion as shown in FIG. 3(a). By joining a member with high thermal conductivity to this portion without terminals and releasing the heat of the base 101 to the outside, the cooling efficiency of the Peltier element can be increased. As the member with high thermal conductivity, for example, a carbon graphite sheet, an alloy plate for a heat spreader, a heat pipe, etc. can be used. As shown in FIG. 16, a carbon graphite sheet 403 having one end joined to the electronic component 100 is led out of the electronic component 100 through an opening provided in the PCB substrate 401, and the other end is connected to the housing of the camera module to form a path for releasing heat to the outside.

[0028] FIG. 4 is an enlarged schematic diagram of the vicinity of the joint between the base 101 and the conductive wire 109 of the electronic member according to the present embodiment. The Peltier adhesive 105 and the semiconductor substrate adhesive 107 are omitted.

[0029] The first electrode 110 provided on the semiconductor substrate 103 and the second electrode 111 provided on the base 101 are connected by a conductive wire 109. When the region where the frame at the bottom of the base 101 is provided is defined as the first region and the region where the Peltier element 106 is placed is defined as the second region, the second electrode 111 is disposed between the first region and the second region. In FIG. 4, the second electrode 111 is provided on a surface protruding toward the semiconductor substrate 103 side from the surface of the base 101 on which the Peltier element 106 is placed. This is a configuration for preventing interference between the base 101 and the capillary described later, and the second electrode 111 may be provided on the surface of the base 101 on which the Peltier element 106 is placed. Here, if the angle formed by the conductive wire 109 and the normal line of the surface on which the second electrode 111 is disposed is θ, it is desirable to provide the second electrode 111 at a position closer to the semiconductor substrate 103 for miniaturization of the electronic component 100, and θ is, for example, 10° or less.

[0030] In an electronic component in which a Peltier element is placed together with a semiconductor substrate as in the present embodiment, the conductive wire 109 connecting the semiconductor substrate 103 and the base 101 preferably has a certain length in order to suppress the return heat flow from the Peltier element 106, and it is desirable that the second electrode 111 be at a lower position to ensure the wire length.

[0031] The vertical distance between the surface on which the second electrode 111 is provided and the uppermost part of the conductive wire 109 is 1 mm or more. The vertical distance of the conductive wire 109 is determined by the thickness of the Peltier element 106 and the chip thickness of the substrate 103. In the present embodiment, back grinding is not performed to maintain the thickness of the substrate 103, and the substrate 103 has a thickness of about 0.7 to 0.8 mm. Further, when back grinding is not performed, the thermal conductivity in the direction parallel to the plane of the substrate 103 becomes high, and the effect of keeping the temperature distribution in the plane of the imaging element uniform becomes high, which is more preferable. Even when back grinding is performed on the substrate 103, the vertical distance is ensured by setting the substrate thickness to about 0.5 mm.

[0032] Similarly, by increasing the thickness of the Peltier element 106, it is also possible to extend the vertical distance of the conductive wire 109. However, when the Peltier element 106 becomes thicker, the capillary used during wire bonding may interfere with the substrate 101.

[0033] Also, the conductive wire 109 is preferably thinner than the wires generally used in image pickup elements that do not mount the Peltier element 106, such as Φ15μm. This is because by increasing the thermal resistance of the wire, the heat flow returning from the Peltier element 106 to the semiconductor substrate 103 via the substrate 101 can be suppressed. Furthermore, in order to increase the thermal resistance, the wire used as the conductive wire 109 is preferably a wire with a thermal conductivity of less than 300 W / mK, which is made mainly of a gold alloy or aluminum rather than a gold wire. The wire diameter of the conductive wire 109 is determined by the balance with the allowable current, resistance, inductance, etc. to prevent wire breakage.

[0034] On the other hand, since the Peltier element 106 consumes a large amount of power, the wire electrically connecting the Peltier element 106 and the substrate 101 is preferably thicker. The member connecting the Peltier element 106 and the substrate 101 may be a conductive adhesive such as silver paste or solder instead of a wire.

[0035] FIG. 5 is a drawing for explaining the minimum clearance between the bonding capillary and the chip. For example, as shown in FIG. 5(a), when the Peltier element 106 with a thickness A is used, the distance between the upper end of the semiconductor substrate 103 and the point where the capillary is closest at the same height as the upper end of the semiconductor substrate 103 is defined as a. On the other hand, as shown in FIG. 5(b), when the Peltier element 106 with a thickness B is used, the distance between the upper end of the semiconductor substrate 103 and the capillary is defined as b. For example, when the same substrate 101 is used, if the thickness is A < B, the relationship between the distances is a > b.

[0036] The minimum clearance between the semiconductor substrate 103 and the capillary varies depending on the size of the semiconductor substrate 103 and the position of the second electrode 111. Even when using a Peltier with the same thickness B as in Fig. 5(b), the distance c between the semiconductor substrate 103 and the capillary can be ensured by shifting the position of the second electrode in a direction away from the semiconductor substrate 103 in a plan view as shown in Fig. 5(c). Also, the distance c can be ensured by bringing the surface of the base body 101 where the second electrode 111 is provided closer to the semiconductor substrate 103, that is, by shifting the position of the second electrode 111 upward.

[0037] Fig. 6 is a drawing for explaining the relationship between the wire angle and the capillary angle during the drop-down of general wire bonding. Fig. 6(a) is a diagram when θ is larger than 10 - 15°, and Fig. 6(b) is a diagram when θ is smaller than 10 - 15°.

[0038] As shown in Fig. 6(a), in general wire bonding, after joining the first electrode 110 and the conductive wire 109, a wire loop is formed, and the second electrode 111 and the conductive wire 109 are joined by stitch bonding. At this time, the tip of the capillary used for bonding has an angle of about 20 - 30° in cross-section. As shown in Fig. 6(b), when attempting to perform bonding in a state where the wire angle θ is steeper than the angle of the capillary, the capillary and the wire interfere with each other, so bonding cannot be performed. Since a horizontal space is required between the second electrode 111 and the end of the base body 101 to increase θ, it may hinder the miniaturization of electronic components.

[0039] FIG. 7 is a drawing for explaining the relationship between the wire angle and the capillary angle during wire bonding in the ball stitch on bonding (BSOB) method. In this method, first, a ball is formed on the first electrode 110. Then, the second electrode 111 and the conductive wire 109 are joined, and the capillary is raised substantially vertically to join the first electrode 110 and the conductive wire 109. That is, balls are formed and joined at both the joint of the first electrode 110 and the conductive wire 109 and the joint of the second electrode 111 and the conductive wire 109. A stitch is formed and joined on the ball at the joint of the second electrode 111 and the conductive wire 109. In this bonding method, as long as the distance for joining the conductive wire 109 and the second electrode 111 is ensured, regardless of the distance between the second electrode 111 and the end of the base 101, there is no interference between the capillary and the conductive wire 109 when joining the conductive wire 109 to the semiconductor substrate 103. Therefore, it is possible to reduce the horizontal space compared to the case where the conductive wire 109 is joined by a normal bonding method, and thus the miniaturization of electronic components is possible.

[0040] The space required for performing normal wire bonding is further described with reference to FIG. 8. A general wire bonding flow was briefly described with reference to FIG. 6. More specifically, the capillary moves in the order of (a), (b), (c), and (d) of FIG. 8 while joining the conductive wire 109.

[0041] A ball is made on the first electrode 110, and the first electrode 110 and the conductive wire 109 are joined by applying pressure while applying heat and ultrasonic waves. Then, a bending point is made on the conductive wire 109, and the conductive wire 109 is pulled out by a required length. While maintaining the tension so that the pulled-out conductive wire 109 does not sag, the conductive wire 109 is pressure-bonded to the second electrode 111, and a stitch is formed at the joint. When the height of the second electrode 111 is lower than the height of the semiconductor substrate 103, if there is a wall surface of the base 101 on the locus drawn by the capillary, the capillary and the base 101 will interfere with each other. To prevent interference, a horizontal space is required between the second electrode 111 and the end of the base 101, leading to the enlargement of electronic components.

[0042] (Second Embodiment) The electronic component according to the second embodiment will be described with reference to FIGS. 9 to 13. The portions overlapping with the description of the electronic component according to the first embodiment will be omitted, and mainly the differences from the first embodiment will be described.

[0043] The Peltier element 106 mounted on the electronic component according to the present embodiment will be described with reference to FIG. 9. The Peltier element 106 has a configuration in which a metal electrode, a P-type semiconductor, and an N-type semiconductor are alternately connected in a π shape between upper and lower heat sinks.

[0044] One of the upper and lower heat sinks is a heat absorption surface 201, and the other is a heat dissipation surface 202. In the electronic component according to the present invention, the heat absorption surface 201 faces the semiconductor substrate 103, and the heat dissipation surface 202 faces the base 101. The heat sink is made of alumina, aluminum nitride, or the like, and the heat conduction may be enhanced by a treatment such as gold plating. Also, if the materials of the base 101 and the heat sink are the same, there is no difference in the linear expansion coefficient, which is advantageous in terms of stress. The Peltier element 106 has a conduction space including electrodes 203 and 204 for conduction with the outside. For example, the electrode 203 is an electrode connected to a power source, and the electrode 204 is an electrode connected to the ground.

[0045] When a voltage V is applied to the Peltier element 106, a current I flows. Let the temperature of the heat absorption surface be T c , and the temperature of the heat dissipation surface be T h . When the Seebeck coefficient is α, the internal resistance is R, the thermal conductivity is λ, and the temperature difference between the heat absorption surface and the heat dissipation surface is ΔT, the heat absorption Qc is expressed by the following formula.

[0046]

Equation

[0047] That is, in order to increase the heat absorption Qc of the Peltier element 106, it is better that the thermal conductivity λ and the internal resistance R are small.

[0048] The variations of the Peltier element 106 will be described with reference to FIGS. 10(a) to 10(c).

[0049] In the electronic component shown in FIG. 10(a), the Peltier element 106 has the same size as the semiconductor substrate 103. In other words, the sizes of the second region and the third region where the semiconductor substrate 103 and the bottom overlap are the same. In this case, it is easy to cool the inside of the semiconductor substrate 103 evenly. However, since λ in the above formula becomes large and the power consumption increases, the heat dissipation amount on the heat generation side also increases. Along with this, it becomes difficult to suppress the heat flow, which is a demerit that the total power consumption of the product may increase. In addition, since the conduction space for providing the first electrode 110 is outside the second region, it is disadvantageous in terms of miniaturization of the chip.

[0050] In the electronic component shown in FIG. 10(b), the entire Peltier element 106 including the conduction space is sized to be included within the second region where the semiconductor substrate 103 is arranged, and the Peltier element 106 is sized to be included within the pixel region in the semiconductor substrate 103. Also in this case, while it is easy to cool the inside of the semiconductor substrate 103 evenly, since λ is large and the power consumption increases, there is a possibility that the heat dissipation amount on the heat generation side also increases and it becomes difficult to suppress the heat flow, and there is a possibility that the total power consumption increases.

[0051] In the electronic component shown in FIG. 10(c), the entire Peltier element 106 including the conduction space fits within the semiconductor substrate 103. Further, the second region where the Peltier element 106 is arranged is smaller than the fourth region where the pixel region and the bottom overlap.

[0052] In a standard Peltier element, a smaller area of the heat sink can reduce the thermal conductivity λ. However, since Qc also decreases accordingly, it is important to select a Peltier element having an appropriate number of P-type semiconductors and N-type semiconductors.

[0053] When the cooling temperature of the target image sensor is Tc, the temperature of the base 101 on the heat dissipation side is Th, and the thermal resistance of the plurality of conductive wires 109 is Rw, the heat Pw returning from the base 101 to the semiconductor substrate 103 through the entire conductive wire 109 is represented by (Th - Tc) / Rw. In order to keep the cooling temperature Tc of the image sensor constant, the sum of the power consumption Ps of the image sensor and the heat Pw transmitted through the conductive wire 109 needs to be equal to the heat absorption amount Qc of the Peltier element.

[0054] In order to suppress the power consumption Pp of the Peltier element under such conditions, it is preferable to select a Peltier element having the number of P-type semiconductors and N-type semiconductors such that the coefficient of performance COP = Qc / Pp, which is the ratio of Qc to the power consumption of the Peltier element, is maximized. When a bismuth telluride-based Peltier element that is widely mass-produced is used for cooling the image sensor, as shown in Fig. 10(c), by selecting a Peltier element that is small compared to the image sensor, that is, having a relatively small number of P-type and N-type elements and a small λ, heat can be efficiently absorbed, and in many cases, it is possible to suppress the total power consumption of the product.

[0055] However, when the first electrode 110 is joined at a position overlapping in plan view with the hollow region where the Peltier element 106 is not arranged under the semiconductor substrate 103, heat and ultrasonic waves from the heating stage provided under the package 100 may not easily be transmitted to the joint.

[0056] Since the Peltier element 106 is small and the region for holding the semiconductor substrate 103 is narrow, there is a possibility that a load is applied to the bonding surface between the semiconductor substrate 103 and the Peltier element 106 based on this principle when wire bonding is performed. Furthermore, there is a possibility of temperature unevenness on the surface of the semiconductor substrate 103.

[0057] Using Figs. 11(a) to (f), modified examples of the Peltier element 106 are further shown.

[0058] Fig. 11(a) shows an electronic component 100 having a Peltier element 106 that is smaller than the pixel region of the semiconductor substrate 103 described as Fig. 10(c). For example, it is assumed that the semiconductor substrate 103 is about 15.5×11.2 mm (pixel region is 13×10 mm), while the Peltier element 106 is about 6 mm×6 mm. As described above, this configuration has problems in terms of wire bonding property, strength, and temperature non-uniformity.

[0059] Fig. 11(b) shows the electronic component 100 when the size of the heat sink of the Peltier element 106 in the xy direction is enlarged while keeping the number and thermal resistance of the P-type semiconductor and N-type semiconductor included in the Peltier element 106 the same as in the case of Fig. 11(a). The Peltier element 106 is expanded to be at least larger than the pixel region. The Peltier element 106 may be expanded, for example, to a position overlapping with the first electrode 110 in a plan view. With such a configuration, while maintaining the cooling capacity of the Peltier element 106 shown in Fig. 11(a) and the aforementioned COP, the holding area by the Peltier element 106 under the semiconductor substrate 103 can be increased. That is, wire bonding becomes easier, and suppression of temperature non-uniformity and improvement of strength can be expected.

[0060] Fig. 11(c) shows a diagram of the Peltier element 106 when the interval between the N-type semiconductor and the P-type semiconductor is further changed from the Peltier element 106 shown in Fig. 11(b), and they are arranged sparsely near the central part of the electronic component 100 and densely on the outer peripheral side.

[0061] Also in this case, the cooling capacity, thermal resistance, and COP of the Peltier element 106 shown in Figs. 11(a) and (b) do not change. By configuring the Peltier element 106 in this way, wire bonding becomes easy, and temperature non-uniformity can be suppressed. Furthermore, by making the elements on the outer peripheral side of the electronic component 100 dense, the strength during bonding is ensured, and an improvement in reliability (temperature cycle resistance) is expected.

[0062] FIG. 11(d) shows an electronic component 100 in which a plurality of small Peltier elements 106 are arranged. The plurality of Peltier elements 106 may be connected in series or in parallel. In the case of series connection, the current I increases, and in the case of parallel connection, the voltage V increases. In the cross-section shown in FIG. 11(d), two Peltier elements 106(a) and 106(b) are shown, but the number of Peltier elements 106 to be connected is not limited to this, and three or more Peltier elements 106 may be connected.

[0063] With such a configuration, wire bonding is easy, and it is possible to suppress temperature unevenness and ensure strength.

[0064] FIG. 11(e) is also a diagram of an electronic component 100 having small Peltier elements 106 similar to those in FIG. 11(a). As a difference from FIG. 11(a), the electronic component 100 shown in FIG. 11(e) has an alloy heat spreader 205 between the semiconductor substrate 103 and the Peltier element 106. This is to promote heat conduction with the heat spreader and at the same time reinforce the strength of the semiconductor substrate 103.

[0065] A Cu alloy is suitable as the heat spreader 205. The heat spreader 205 preferably has a thickness of about 0.5 mm and should be over the entire area under the semiconductor substrate 103. In this case, in order to prevent the thickness from becoming too large, the semiconductor substrate 103 may be thinned by backgrinding.

[0066] Even with such a configuration, wire bonding is facilitated, and effects such as temperature unevenness suppression and strength assurance can be obtained.

[0067] FIG. 11(f) shows an electronic component 100 having a Peltier element 106 with a height higher than that of the Peltier element 106 in FIG. 11(a) although the size in plan view is the same as that in FIG. 11(a). For the same cross-sectional area, the higher the height of the Peltier element 106, the smaller the operating current amount I of the Peltier becomes, and the larger the operating voltage V becomes. Since the smaller the current, the Joule loss in the wiring can be suppressed, there is an effect of suppressing the overall power consumption.

[0068] FIG. 12 shows a further modified example of the electronic component 100 shown in FIG. 11. As described above, when a wire is joined at a position overlapping in plan view with a region where the Peltier element 106 is not arranged under the semiconductor substrate 103, heat or ultrasonic waves from the stage for heating provided under the base 101 may not easily be transmitted to the joint portion.

[0069] In the configuration shown in FIG. 12, a frame portion 206 is provided in a region overlapping the first electrode 110 in plan view. The frame portion 206 is formed of a hard material with low thermal conductivity. For example, it is a resin frame such as epoxy. Ultrasonic waves can easily be transmitted to the joint portion through the frame portion 206.

[0070] When the frame portion 206 is a resin frame, since the thermal conductivity is lower than that of, for example, a ceramic or metal frame, heat is less likely to be transmitted as compared with these frames. Also, when the frame portion 206 is not provided under the semiconductor substrate 103 and is hollow, the heat inflow from the heat generating surface of the Peltier element 106 increases. Therefore, it is preferable that the frame portion 206 has a frame with as narrow a width as possible. Specifically, when the first electrode 110 is about 50 μm to 100 μm, it is desirable to form a frame up to about 10 times the electrode size (about 0.5 to 1 mm) to allow for some deviation.

[0071] FIG. 13 shows an arrangement example of the Peltier element 106 of the electronic component 100 shown in FIG. 11(c).

[0072] FIG. 13(a) is a top view of the connection relationship of a normal Peltier element 106. Columnar semiconductors are arranged in an array, and the connections on the heat generating side shown by solid lines are on the front side of the paper surface, and the connections on the heat absorbing side shown by dotted lines are on the back side of the paper surface to connect the semiconductors to each other. The semiconductors are connected in one continuous line from the power PAD (electrode 203 in FIG. 9) and the ground PAD (electrode 204 in FIG. 9) provided in the conduction space.

[0073] FIG. 13(b) shows an example of the arrangement of the Peltier element 106, where when arranging the semiconductors in a rectangle, the semiconductors are not arranged at the four corners. By adopting such an arrangement, the reliability can be improved. This is because due to the temperature difference between the high-temperature side and the low-temperature side of the Peltier element, thermal expansion occurs in the material on the high-temperature side and thermal contraction occurs in the material on the low-temperature side, resulting in stress generation in the N-type semiconductor and the P-type semiconductor. This is because the stress is highest at the semiconductors at the four corners.

[0074] In FIG. 13(b), one semiconductor in the semiconductor row is removed, but a configuration in which three or four semiconductors are removed from the corners may also be used. Also, the connection relationship between the semiconductors is not limited to the form shown in FIG. 13(b), and it is sufficient if the connection from the power supply to the ground is drawn in one stroke. As shown in FIG. 13(c), a configuration may be adopted in which semiconductors connected from the power supply to the ground in one stroke are provided in parallel.

[0075] As shown in FIG. 14, the Peltier element 106 may have a configuration in which a plurality of Peltier elements 106 are stacked vertically. At this time, the heat sink of the upper Peltier element 106 also serves as the heat sink of the lower Peltier element 106. By stacking a plurality of Peltier elements 106, the difference ΔT between the high-temperature side Th and the low-temperature side Tc can be increased, and an improvement in the cooling capacity can be expected.

[0076] (Third Embodiment) The electronic component 100 according to the third embodiment will be described with reference to FIGS. 15 to 22.

[0077] FIG. 15 is a cross-sectional view showing a configuration example of the electronic component 100 according to the present embodiment. FIG. 16 is a plan view of the electronic member according to the present embodiment as viewed from the optical member 102 side. In the electronic component 100 shown in the first embodiment, the semiconductor substrate 103 and the base 101 were electrically connected by one type of conductive wire 109. In FIG. 15, the semiconductor substrate 103 is provided with a third electrode 113 in addition to the first electrode 110, and the base 101 is provided with a fourth electrode 114 in addition to the second electrode 111. The first electrode 110 and the second electrode 111 are connected by a conductive wire 109, and the third electrode 113 and the fourth electrode 114 are connected by a second conductive wire 112. The fourth electrode 114 is provided on the outer peripheral side of the electronic component 100 as compared with the second electrode 111. Here, the conductive wire 109 is, for example, a signal line or a control line, and the second conductive wire 112 is a wiring for transmitting a power supply voltage or a ground voltage. As shown in FIGS. 15 and 16, by making the second conductive wire 112 shorter than the conductive wire 109, the electrical resistance and inductance of the second conductive wire 112 can be reduced. When the second conductive wire 112 is a wiring for transmitting a power supply voltage or a ground voltage, a voltage drop can be suppressed. Since the conductive wire 109 is longer than the second conductive wire 112 as in the first embodiment, the effect of suppressing the heat flow from the Peltier element 106 can be obtained. Further, in order to enhance the heat flow suppression effect, the conductive wire 109 may be made longer. The layout pattern of the conductive wire 109 and the second conductive wire 112 shown in FIG. 16 is an example. As another example, for example, a layout in which the second conductive wire 112 is arranged at the corner of each side of the semiconductor substrate 103 can be adopted, but it can be laid out due to the circuit arrangement of the semiconductor substrate 103 and the like. With this configuration, both voltage drop suppression and heat flow suppression from the Peltier element 106 can be achieved.

[0078] A configuration example of the conductive wire 109 and the second conductive wire 112 according to this embodiment will be described. FIG. 17 is a cross-sectional view near the conductive wire 109 and the second conductive wire 112. FIG. 17(a) is a cross-sectional view near the conductive wire 109, and FIG. 17(b) is a cross-sectional view near the second conductive wire 112. As shown in FIG. 17(b), the fourth electrode 114 is provided at a position higher than the second electrode 111 (the region where the fourth electrode 114 of the substrate 101 is provided is formed up to a position higher than the region where the second electrode 111 is provided), and the second conductive wire 112 may be wired shorter than the forms shown in FIGS. 15 and 16. The electrical resistance and inductance of the second conductive wire 112 can be further reduced. At this time, the second conductive wire 112 can have a configuration with a small amount of downward displacement or upward displacement from the third electrode 113 toward the fourth electrode 114. Therefore, the conductive wire can be formed by a method of wire bonding from the third electrode 113 toward the fourth electrode 114, or a method of ball stitch on bonding. Also, the layout of the second electrode 111 and the fourth electrode 114 may be a layout in which the second electrode 111 and the fourth electrode 114 of the substrate 101 are arranged alternately, and the conductive wire 109 and the second conductive wire 112 are arranged alternately. Also, as shown in FIG. 16, a layout in which a plurality of second conductive wires 112 are arranged adjacent to each other and a plurality of conductive wires 109 are arranged adjacent to each other may be used. In the case of a layout in which the conductive wire 109 and the second conductive wire 112 are arranged alternately, since the heights of the electrodes are alternately different, the distance between the electrodes is widened so that the capillary and the substrate 101 do not interfere with each other during wire bonding of these conductive wires. For this reason, the electronic component 100 may become larger. On the other hand, in the form shown in FIG. 16, the distance between the electrodes at the portion where the conductive wire 109 and the second conductive wire 112 are adjacent to each other may be made wider than at least one of the distance between the electrodes of the plurality of conductive wires 109 and the distance between the electrodes of the plurality of second conductive wires 112. Thereby, the electronic component 100 can be miniaturized compared to the layout in which the conductive wire 109 and the second conductive wire 112 are arranged alternately.

[0079] FIG. 18 is a cross-sectional view showing a configuration example of the electronic component 100 according to the present embodiment. FIG. 19 is a plan view from the side of the optical member 102 in FIG. 18. FIG. 20 is a cross-sectional view near the conductive wire 109 and the second conductive wire 112 of the present embodiment. FIG. 20(a) is a cross-sectional view near the conductive wire 109, and FIG. 20(b) is a cross-sectional view near the second conductive wire 112. Since the second conductive wire 112 is thicker than the conductive wire 109 as compared with FIGS. 15 and 16, the electrical resistance and inductance of the second conductive wire 112 can be further reduced.

[0080] FIG. 21 is a plan view from the side of the optical member 102 of the electronic component according to the present embodiment. A layout may be adopted in which the sides where the conductive wire 109 and the second conductive wire 112 are arranged are separated for each side of the semiconductor substrate 103. FIG. 22 is a cross-sectional view of the electronic component according to the present embodiment, and FIG. 22(a) is a cross-sectional view in the long side direction, and FIG. 22(b) is a cross-sectional view in the short side direction. Not only the conductive wire 109 and the second conductive wire 112 are separated for each side of the semiconductor substrate 103, but also the height of the fourth electrode 114 may be increased and the second conductive wire 112 may be shortened. Since the second conductive wire 112 is thicker and shorter than the conductive wire 109, the electrical resistance and inductance can be further reduced.

[0081] In the above configuration example, the conductive wire 109 and the second conductive wire 112 may be made of the same material or different materials. As described in Embodiment 1, in order to increase the thermal resistance and enhance the heat flow suppression effect, a wire having a thermal conductivity of less than 300 W / mK and mainly made of a gold alloy or aluminum rather than a gold wire is desirable.

[0082] (Fourth Embodiment) The electronic component 100 according to the fourth embodiment will be described with reference to FIG. 23.

[0083] In the electronic component 100 shown in the first embodiment, the substrate 101 and the optical member 102 were sealed with an adhesive. Vacuum sealing may be performed for heat insulation inside the package. Due to the heat-resistant temperatures of the pixel region 103 and the Peltier element 106, sealing at high temperatures cannot be performed. Therefore, seam welding sealing may be performed in which heat and load are applied to the optical member 302 with the metal frame 301 and it is pressure-bonded to the substrate 101. With seam welding sealing, vacuum sealing is possible within the heat-resistant temperatures of the pixel region 103 and the Peltier element 106.

[0084] (Fifth Embodiment) The electronic component 100 according to the fifth embodiment will be described with reference to FIGS. 24 to 26.

[0085] When the package configuration is LGA, the package is reflow-mounted on the secondary substrate. Here, the secondary substrate is, for example, a PCB substrate 401. The PCB substrate may have an opening as shown in FIG. 24, and may have a heat path for heat dissipation by a member with high thermal conductivity (for example, a carbon graphite sheet 403) through the opening, but the opening is not an essential configuration.

[0086] As described above, in order to prevent the solder contained in the Peltier element 106 from melting and the Peltier element 106 from being damaged during reflow, a material with a low melting point that can be used in a reflow furnace at a low temperature of 200°C or lower, more preferably 180°C or lower, such as resin-reinforced solder, is used.

[0087] The electronic component 100 according to this embodiment is heavy due to the weight of the Peltier element 106 mounted thereon. Therefore, there is a concern about a short circuit (FIG. 25) due to solder collapse of the solder 402 disposed between the electronic component 100 and the PCB substrate 401.

[0088] As shown in FIG. 26(a), in order to prevent solder collapse, a spacer 404 may be disposed between the substrate 101 and the PCB substrate 401.

[0089] As a variation of the spacer, the base body 101 may be protruded toward the PCB substrate 401 side and used as a spacer. In this case, since the back surface side of the base body 101 can be polished, improvement in flatness and parallelism can be expected.

[0090] Conversely, the PCB substrate 401 may be protruded toward the base body 101 side and used as a spacer. By protruding the base body 101 toward the PCB substrate 401 side and providing a concave portion in the PCB substrate 401, the spacer may be used for alignment by fitting.

[0091] (Sixth Embodiment) The photoelectric conversion system according to this embodiment will be described with reference to FIG. 27. FIG. 27 is a block diagram showing a schematic configuration of the photoelectric conversion system according to this embodiment.

[0092] The electronic components described in the first to fifth embodiments above are applicable to various photoelectric conversion systems as a photoelectric conversion device. Examples of applicable photoelectric conversion systems include a digital still camera, a digital camcorder, a surveillance camera, a copying machine, a facsimile, a mobile phone, an in-vehicle camera, an observation satellite, and the like. Further, a camera module including an optical system such as a lens and an imaging device is also included in the photoelectric conversion system. FIG. 27 illustrates a block diagram of a digital still camera as an example of these.

[0093] The photoelectric conversion system illustrated in FIG. 27 includes an imaging device 1004 which is an example of a photoelectric conversion device, a lens 1002 that forms an optical image of a subject on the imaging device 1004, a diaphragm 1003 for variably controlling the amount of light passing through the lens 1002, and a barrier 1001 for protecting the lens 1002. The lens 1002 and the diaphragm 1003 are an optical system that condenses light on the imaging device 1004. The imaging device 1004 is a photoelectric conversion device (imaging device) according to any of the above embodiments, and converts the optical image formed by the lens 1002 into an electrical signal.

[0094] The photoelectric conversion system also includes a signal processing unit 1007, which is an image generation unit that generates an image by processing the output signal output from the imaging device 1004. The signal processing unit 1007 performs operations such as various corrections and compressions as necessary to output image data. The signal processing unit 1007 may be formed on the semiconductor substrate on which the imaging device 1004 is provided, or may be formed on a semiconductor substrate different from the imaging device 1004. Also, the imaging device 1004 and the signal processing unit 1007 may be formed on the same semiconductor substrate.

[0095] The photoelectric conversion system further includes a memory unit 1010 for temporarily storing image data, and an external interface unit (external I / F unit) 1013 for communicating with an external computer or the like. Furthermore, the photoelectric conversion system includes a recording medium 1012 such as a semiconductor memory for recording or reading out imaging data, and a recording medium control interface unit (recording medium control I / F unit) 1011 for recording or reading out to / from the recording medium 1012. Note that the recording medium 1012 may be built into the photoelectric conversion system or may be detachable.

[0096] Furthermore, the photoelectric conversion system includes an overall control and arithmetic unit 1009 for performing various operations and controlling the entire digital still camera, and a timing generation unit 1008 for outputting various timing signals to the imaging device 1004 and the signal processing unit 1007. Here, the timing signal or the like may be input from the outside, and the photoelectric conversion system may have at least the imaging device 1004 and the signal processing unit 1007 that processes the output signal output from the imaging device 1004.

[0097] The imaging device 1004 outputs an imaging signal to the signal processing unit 1007. The signal processing unit 1007 performs predetermined signal processing on the imaging signal output from the imaging device 1004 and outputs image data. The signal processing unit 1007 generates an image using the imaging signal.

[0098] Thus, according to this embodiment, a photoelectric conversion system applying the photoelectric conversion device (imaging device) of any of the above embodiments can be realized.

[0099] (Seventh Embodiment) The photoelectric conversion system and the moving body of this embodiment will be described with reference to FIG. 28. FIG. 28 is a diagram showing the configuration of the photoelectric conversion system and the moving body of this embodiment.

[0100] FIG. 28(a) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 1300 includes an imaging device 1310. The imaging device 1310 is a photoelectric conversion device (imaging device) described in any of the above embodiments. The photoelectric conversion system 1300 includes an image processing unit 1312 that performs image processing on a plurality of pieces of image data acquired by the imaging device 1310. Further, the photoelectric conversion system 1300 includes a distance acquisition unit 1316 that calculates the distance to an object, and a collision determination unit 1318 that determines whether there is a possibility of collision based on the calculated distance. Here, the distance acquisition unit 1316 may acquire distance information to a ToF (Time Of Flight) object, or may acquire distance information using parallax information or the like. That is, the distance information is information related to parallax, defocus amount, distance to an object, etc. The collision determination unit 1318 may determine the possibility of collision using any of these distance information. The distance information acquisition means may be realized by dedicatedly designed hardware, or may be realized by a software module. Further, it may be realized by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or the like, or may be realized by a combination of these.

[0101] The photoelectric conversion system 1300 is connected to the vehicle information acquisition device 1320 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Further, the photoelectric conversion system 1300 is connected to an ECU 1330 which is a control device that outputs a control signal for generating a braking force for the vehicle based on the determination result of the collision determination unit 1318. Further, the photoelectric conversion system 1300 is also connected to an alarm device 1340 that issues an alarm to the driver based on the determination result of the collision determination unit 1318. For example, when the determination result of the collision determination unit 1318 indicates a high possibility of collision, the ECU 1330 performs vehicle control to avoid the collision and reduce the damage, such as applying the brakes, returning the accelerator, and suppressing the engine output. The alarm device 1340 warns the user by sounding an alarm such as a sound, displaying alarm information on a screen of a car navigation system, or applying vibration to a seat belt or a steering wheel.

[0102] In the present embodiment, the photoelectric conversion system 1300 images the surroundings of the vehicle, for example, the front or the rear. FIG. 28(b) shows the photoelectric conversion system when imaging the front of the vehicle (imaging range 1350). The vehicle information acquisition device 1320 sends an instruction to the photoelectric conversion system 1300 or the imaging device 1310. With such a configuration, the ranging accuracy can be further improved.

[0103] In the above, an example of controlling so as not to collide with other vehicles has been described, but it is also applicable to control for automatically driving while following other vehicles and control for automatically driving so as not to deviate from the lane. Further, the photoelectric conversion system is applicable not only to vehicles such as automobiles but also to moving bodies (mobile devices) such as ships, airplanes, or industrial robots. This moving body mainly includes a driving force generation unit that generates a driving force used for the movement of the moving body, and one or both of rotating bodies mainly used for the movement of the moving body. The driving force generation unit can be an engine, a motor, or the like. The rotating body can be a tire, a wheel, a screw of a ship, a propeller of an aircraft, or the like. In addition, it is applicable not only to moving bodies but also to devices that widely use object recognition, such as an advanced road traffic system (ITS).

[0104] (Eighth Embodiment) The photoelectric conversion system of this embodiment will be described with reference to FIG. 29. FIG. 29 is a block diagram showing a configuration example of a distance image sensor which is the photoelectric conversion system of this embodiment.

[0105] As shown in FIG. 29, the distance image sensor 401 includes an optical system 407, a photoelectric conversion device 408, an image processing circuit 404, a monitor 405, and a memory 406. Then, the distance image sensor 401 can obtain a distance image corresponding to the distance to the subject by receiving the light (modulated light or pulsed light) that is projected from the light source device 409 toward the subject and reflected by the surface of the subject.

[0106] The optical system 407 is configured to have one or more lenses, guides the image light (incident light) from the subject to the photoelectric conversion device 408, and forms an image on the light receiving surface (sensor unit) of the photoelectric conversion device 408.

[0107] As the photoelectric conversion device 408, the photoelectric conversion devices of the above-described embodiments are applicable, and a distance signal indicating the distance obtained from the light reception signal output from the photoelectric conversion device 408 is supplied to the image processing circuit 404.

[0108] The image processing circuit 404 performs image processing for constructing a distance image based on the distance signal supplied from the photoelectric conversion device 408. Then, the distance image (image data) obtained by the image processing is supplied to the monitor 405 for display or supplied to the memory 406 for storage (recording).

[0109] In the distance image sensor 401 configured as described above, by applying the above-described photoelectric conversion device, for example, a more accurate distance image can be obtained as the characteristics of the pixels are improved.

[0110] (Ninth Embodiment) The photoelectric conversion system of this embodiment will be described with reference to FIG. 30. FIG. 30 is a diagram showing an example of a schematic configuration of an endoscope surgery system which is the photoelectric conversion system of this embodiment.

[0111] In FIG. 30, an operator (doctor) 1131 is shown performing a surgery on a patient 1132 on a patient bed 1133 using an endoscopic surgery system 1150. As shown, the endoscopic surgery system 1150 includes an endoscope 1100, a surgical instrument 1110, and a cart 1134 equipped with various devices for endoscopic surgery.

[0112] The endoscope 1100 includes a lens barrel 1101 whose tip region of a predetermined length is inserted into the body cavity of the patient 1132, and a camera head 1102 connected to the proximal end of the lens barrel 1101. In the illustrated example, an endoscope 1100 configured as a so-called rigid endoscope having a rigid lens barrel 1101 is shown, but the endoscope 1100 may be configured as a so-called flexible endoscope having a flexible lens barrel.

[0113] An opening in which an objective lens is fitted is provided at the tip of the lens barrel 1101. A light source device 1203 is connected to the endoscope 1100, and the light generated by the light source device 1203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 1101 and irradiated toward the observation target in the body cavity of the patient 1132 through the objective lens. Note that the endoscope 1100 may be a direct vision endoscope, a forward oblique endoscope, or a side vision endoscope.

[0114] An optical system and a photoelectric conversion device are provided inside the camera head 1102, and the reflected light (observation light) from the observation target is condensed onto the photoelectric conversion device by the optical system. The observation light is photoelectrically converted by the photoelectric conversion device, and an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image, is generated. As the photoelectric conversion device, the photoelectric conversion device (imaging device) described in each of the above embodiments can be used. The image signal is transmitted as RAW data to a camera control unit (CCU) 1135.

[0115] The CCU 1135 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 1100 and the display device 1136. Further, the CCU 1135 receives an image signal from the camera head 1102, and performs various image processes for displaying an image based on the image signal, such as development processing (demosaicing processing).

[0116] The display device 1136 displays an image based on the image signal processed by the CCU 1135 under the control of the CCU 1135.

[0117] The light source device 1203 is composed of a light source such as an LED (Light Emitting Diode), and supplies irradiation light for photographing the surgical site or the like to the endoscope 1100.

[0118] The input device 1137 is an input interface for the endoscope surgical system 1150. The user can input various information and instruction inputs to the endoscope surgical system 1150 via the input device 1137.

[0119] The treatment instrument control device 1138 controls the drive of the energy treatment instrument 1112 for cauterizing, incising tissues, or sealing blood vessels.

[0120] The light source device 1203 that supplies irradiation light for photographing the surgical site with the endoscope 1100 can be composed of, for example, an LED, a laser light source, or a white light source composed of a combination thereof. When a white light source is composed of a combination of RGB laser light sources, since the output intensity and output timing of each color (each wavelength) can be controlled with high precision, the white balance of the captured image can be adjusted in the light source device 1203. Also, in this case, the laser light from each of the RGB laser light sources is irradiated to the observation target in a time-division manner, and by controlling the driving of the imaging element of the camera head 1102 in synchronization with the irradiation timing, it is also possible to capture images corresponding to each of RGB in a time-division manner. According to this method, a color image can be obtained without providing a color filter for the imaging element.

[0121] Also, the driving of the light source device 1203 may be controlled so as to change the intensity of the output light at predetermined time intervals. By controlling the driving of the imaging element of the camera head 1102 in synchronization with the timing of the change in the intensity of the light and acquiring images in a time-division manner and synthesizing the images, it is possible to generate a high-dynamic range image without so-called black crushing and white blooming.

[0122] Also, the light source device 1203 may be configured to be able to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, the wavelength dependence of light absorption in body tissue is utilized. Specifically, by irradiating light with a narrower band than the irradiation light (i.e., white light) during normal observation, a predetermined tissue such as blood vessels in the mucosal surface layer can be photographed with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image by fluorescence generated by irradiating excitation light. In fluorescence observation, it is possible to irradiate the body tissue with excitation light and observe the fluorescence from the body tissue, or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescence wavelength of the reagent to obtain a fluorescence image. The light source device 1203 can be configured to be able to supply such narrow-band light and / or excitation light corresponding to special light observation.

[0123] (Tenth Embodiment) The photoelectric conversion system of this embodiment will be described with reference to FIGS. 31(a) and (b). FIG. 31(a) illustrates glasses 1600 (smart glasses), which are the photoelectric conversion system of this embodiment. The glasses 1600 have a photoelectric conversion device 1602. The photoelectric conversion device 1602 is the photoelectric conversion device (imaging device) described in each of the above embodiments. Also, a display device including a light-emitting device such as an OLED or an LED may be provided on the back side of the lens 1601. The photoelectric conversion device 1602 may be one or a plurality. Also, a combination of multiple types of photoelectric conversion devices may be used. The arrangement position of the photoelectric conversion device 1602 is not limited to FIG. 31(a).

[0124] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power supply that supplies power to the photoelectric conversion device 1602 and the above display device. Also, the control device 1603 controls the operations of the photoelectric conversion device 1602 and the display device. An optical system for condensing light onto the photoelectric conversion device 1602 is formed in the lens 1601.

[0125] FIG. 31(b) illustrates glasses 1610 (smart glasses) according to one application example. The glasses 1610 have a control device 1612, and a photoelectric conversion device corresponding to the photoelectric conversion device 1602 and a display device are mounted on the control device 1612. An optical system for projecting the light emission from the photoelectric conversion device and the display device within the control device 1612 is formed in the lens 1611, and an image is projected onto the lens 1611. The control device 1612 functions as a power supply that supplies power to the photoelectric conversion device and the display device, and controls the operations of the photoelectric conversion device and the display device. The control device may have a gaze detection unit that detects the wearer's gaze. Infrared rays may be used for gaze detection. The infrared light emitting unit emits infrared light to the eyeball of the user who is gazing at the display image. An imaging image of the eyeball is obtained by the imaging unit having a light receiving element detecting the reflected light of the emitted infrared light from the eyeball. By having a reducing means for reducing the light from the infrared light emitting unit to the display unit in a frontal view, a decrease in image quality is reduced.

[0126] The user's line of sight with respect to the display image is detected from the captured image of the eyeball obtained by infrared imaging. Any known method can be applied to the line-of-sight detection using the captured image of the eyeball. As an example, a line-of-sight detection method based on the Purkinje image by the reflection of the irradiation light on the cornea can be used.

[0127] More specifically, a line-of-sight detection process based on the pupil corneal reflection method is performed. Using the pupil corneal reflection method, a line-of-sight vector representing the orientation (rotation angle) of the eyeball is calculated based on the image of the pupil and the Purkinje image included in the captured image of the eyeball, whereby the user's line of sight is detected.

[0128] The display device of the present embodiment may include a photoelectric conversion device having a light receiving element, and control the display image of the display device based on the user's line-of-sight information from the photoelectric conversion device.

[0129] Specifically, the display device determines a first visual field region that the user is gazing at and a second visual field region other than the first visual field region based on the line-of-sight information. The first visual field region and the second visual field region may be determined by the control device of the display device, or the display device may receive those determined by an external control device. In the display area of the display device, the display resolution of the first visual field region may be controlled to be higher than that of the second visual field region. That is, the resolution of the second visual field region may be made lower than that of the first visual field region.

[0130] Further, the display area has a first display area and a second display area different from the first display area, and based on the line-of-sight information, a region with a higher priority may be determined from the first display area and the second display area. The first visual field region and the second visual field region may be determined by the control device of the display device, or the display device may receive those determined by an external control device. The resolution of the region with a higher priority may be controlled to be higher than that of the region other than the region with a higher priority. That is, the resolution of the region with a relatively lower priority may be made lower.

[0131] In addition, AI may be used to determine the first visual field area or the area with high priority. The AI may be a model configured to estimate the angle of the line of sight and the distance to the object at the end of the line of sight from the eye image, using the eye image and the direction in which the eye in the image is actually looking as teacher data. The AI program may be provided in the display device, the photoelectric conversion device, or an external device. When provided in an external device, it is transmitted to the display device via communication.

[0132] When performing display control based on visual recognition detection, it can be preferably applied to smart glasses further having a photoelectric conversion device for imaging the outside. The smart glasses can display the captured external information in real time.

[0133] (Eleventh Embodiment) The above-described photoelectric conversion device and photoelectric conversion system may be applied to electronic devices such as so-called smartphones and tablets.

[0134] FIGS. 32(a) and 32(b) are diagrams showing an example of an electronic device 1500 equipped with a photoelectric conversion device. FIG. 32(a) shows the front side of the electronic device 1500, and FIG. 32(b) shows the back side of the electronic device 1500.

[0135] As shown in FIG. 32(a), a display 1510 for displaying an image is arranged at the center of the surface of the electronic device 1500. Along the upper side of the surface of the electronic device 1500, front cameras 1521 and 1522 using the photoelectric conversion device, an IR light source 1530 that emits infrared light, and a visible light source 1540 that emits visible light are arranged.

[0136] Also, as shown in FIG. 32(b), along the upper side of the back of the electronic device 1500, rear cameras 1551 and 1552 using the photoelectric conversion device, an IR light source 1560 that emits infrared light, and a visible light source 1570 that emits visible light are arranged.

[0137] In the electronic device 1500 configured as described above, by applying the above-described photoelectric conversion device, for example, a higher-quality image can be captured. Note that the photoelectric conversion device can also be applied to other electronic devices such as an infrared sensor, a distance measurement sensor using an active infrared light source, a security camera, and a personal or biometric authentication camera. Thereby, improvements in the accuracy and performance of these electronic devices can be achieved.

[0138] Although various devices have been described in the above embodiments, a mechanical device may be further provided. The mechanical device in a camera can drive the components of the optical system for zooming, focusing, and shutter operation. Alternatively, the mechanical device in a camera can move the photoelectric conversion device for anti-vibration operation.

[0139] Also, the device can be a transportation device such as a vehicle, a ship, or an aircraft. The mechanical device in a transportation device can be used as a moving device. The device as a transportation device is suitable for transporting a photoelectric conversion device or for assisting and / or automating driving (operation) with a photographing function. The processing device for assisting and / or automating driving (operation) can perform processing for operating the mechanical device as a moving device based on the information obtained by the photoelectric conversion device.

[0140] In this specification, expressions such as "A or B", "at least one of A and B", "at least one of A or / and B", and "one or more of A or / and B" can include all possible combinations of the listed items unless otherwise explicitly defined. That is, the above expressions are understood to disclose all cases including at least one A, at least one B, and both at least one A and at least one B. This is similarly applicable to combinations of three or more elements.

[0141] The above-described embodiments can be appropriately modified without departing from the technical idea. Note that the disclosure of this specification includes not only what is described in this specification but also all matters that can be grasped from this specification and the drawings attached hereto. Further, the disclosure of this specification includes the complementary set of the concepts described in this specification. That is, for example, if this specification describes that "A is larger than B", even if the description that "A is not larger than B" is omitted, it can be said that this specification discloses the meaning that "A is not larger than B". This is because when the description that "A is larger than B" is given, it is premised that the case where "A is not larger than B" is considered.

[0142] The disclosure of this embodiment includes the following configurations and methods.

[0143] (Configuration 1) An electronic component having a cooling member, a semiconductor substrate, and a base on which the cooling member and the semiconductor substrate are placed, wherein the cooling member is disposed between the base and the semiconductor substrate, the semiconductor substrate has a first electrode, the base has a second electrode, the first electrode and the second electrode are connected by a conductive wire, and balls are formed at both a joint portion between the first electrode and the conductive wire and a joint portion between the second electrode and the conductive wire.

[0144] (Configuration 2) Having an optical member mounted on the base, wherein a frame body that supports the optical member in the base is provided in a first region at the bottom, the cooling member is placed in a second region at the bottom, and the second electrode is provided between the first region and the second region. The electronic component according to Configuration 1, characterized in that.

[0145] (Configuration 3) The electronic component according to Configuration 1 or 2, characterized in that stitches are formed on the ball at the joint portion between the first electrode and the conductive wire.

[0146] (Configuration 4) The electronic component according to any one of Configurations 1 to 3, wherein an angle formed by the conductive wire and a normal line of a plane on which the second electrode is disposed is 10° or less.

[0147] (Configuration 5) The electronic component according to Configuration 2, wherein the second electrode is on the side of the semiconductor substrate rather than the bottom.

[0148] (Configuration 6) The semiconductor substrate has a third electrode, The base has a fourth electrode, The third electrode and the fourth electrode are connected by a second conductive wire, The electronic component according to any one of Configurations 1 to 5, wherein a thermal resistance of the second conductive wire is lower than a thermal resistance of the conductive wire.

[0149] (Configuration 7) The electronic component according to Configuration 6, wherein balls are formed at both a junction between the third electrode and the second conductive wire and a junction between the fourth electrode and the second conductive wire.

[0150] (Configuration 8) The electronic component according to Configuration 6 or 7, wherein stitches are formed on the ball at a junction between the third electrode and the second conductive wire.

[0151] (Configuration 9) The electronic component according to any one of Configurations 6 to 8, wherein the fourth electrode is disposed at a position closer to an outer periphery of the electronic component than the second electrode.

[0152] (Configuration 10) The electronic component according to any one of Configurations 6 to 9, wherein, when viewed from the base, the fourth electrode is disposed at a position higher than the second electrode.

[0153] (Configuration 11) The electronic component according to any one of Configurations 6 to 10, wherein the second conductive wire is shorter than the conductive wire.

[0154] (Configuration 12) The electronic component according to any one of Configurations 6 to 11, wherein the second conductive wire is thicker than the conductive wire. (Configuration 13) The electronic component according to any one of Configurations 6 to 12, wherein the second conductive wire has a higher thermal conductivity than the conductive wire.

[0155] (Configuration 14) The electronic component according to any one of Configurations 1 to 13, wherein the cooling member is a Peltier element.

[0156] (Configuration 15) The electronic component according to any one of Configurations 1 to 14, wherein the base includes alumina.

[0157] (Configuration 16) The electronic component according to any one of Configurations 1 to 14, wherein the base includes aluminum nitride.

[0158] (Configuration 17) The electronic component according to any one of Configurations 1 to 16, wherein the conductive wire includes gold.

[0159] (Configuration 18) The electronic component according to any one of Configurations 1 to 16, wherein the conductive wire includes aluminum.

[0160] (Configuration 19) The electronic component according to any one of Configurations 1 to 18, wherein the vertical distance between the second electrode and the top of the conductive wire is 1 mm or more.

[0161] (Configuration 20) The electronic component according to Configuration 2, wherein in a plan view, the second region is included within the region where the semiconductor substrate is disposed.

[0162] (Configuration 21) The electronic component according to Configuration 2, wherein the semiconductor substrate has a plurality of pixels arranged in an array.

[0163] (Configuration 22) The electronic component according to Configuration 21, wherein in plan view, the second region is included within the region where the plurality of pixels are arranged.

[0164] (Configuration 23) The electronic component according to Configuration 2, wherein the base body and the optical member are adhered by an adhesive.

[0165] (Configuration 24) The electronic component according to Configuration 2, wherein the base body and the optical member are adhered by a metal frame.

[0166] (Configuration 25) The electronic component according to any one of Configurations 1 to 24, wherein the base body is mounted on a secondary substrate via solder, and the base body has a member protruding toward the secondary substrate.

[0167] (Configuration 26) The electronic component according to Configuration 14, wherein the cooling member is configured by laminating a plurality of the Peltier elements.

[0168] (Configuration 27) The electronic component according to Configuration 2, wherein a plurality of the cooling members are placed in the second region.

[0169] (Configuration 28) An apparatus comprising: the electronic component according to any one of Configurations 1 to 27; and a processing device that processes a signal output from the electronic component.

Explanation of Reference Numerals

[0170] 101 Base body 103 Semiconductor substrate 106 Cooling member 109 Conductive wire 110 First electrode 111 Second electrode

Claims

1. An electronic component having a cooling member, a semiconductor substrate, and a base on which the cooling member and the semiconductor substrate are mounted, the cooling member is disposed between the base and the semiconductor substrate; the semiconductor substrate has a first electrode; the substrate has a second electrode; The first electrode and the second electrode are connected by a conductive wire; An electronic component, characterized in that a ball is formed at both a joint between the first electrode and the conductive wire and a joint between the second electrode and the conductive wire.

2. an optical member mounted on the base, a frame for supporting the optical member in the base is provided in a first region of a bottom portion, and the cooling member is placed in a second region of the bottom portion, The electronic component according to claim 1 , wherein the second electrode is provided between the first region and the second region.

3. 2. The electronic component according to claim 1, wherein a stitch is formed on the ball at a junction between the first electrode and the conductive wire.

4. 2. The electronic component according to claim 1, wherein an angle between the conductive wire and a normal to a surface on which the second electrode is disposed is 10 degrees or less.

5. The electronic component according to claim 2 , wherein the second electrode is located closer to the semiconductor substrate than the bottom portion.

6. the semiconductor substrate has a third electrode; the substrate has a fourth electrode; the third electrode and the fourth electrode are connected by a second conductive wire; 2. The electronic component according to claim 1, wherein the thermal resistance of the second conductive wire is lower than the thermal resistance of the conductive wire.

7. The electronic component according to claim 6, characterized in that a ball is formed at both a joint between the third electrode and the second conductive wire and a joint between the fourth electrode and the second conductive wire.

8. 7. The electronic component according to claim 6, wherein a stitch is formed on the ball at a junction between the third electrode and the second conductive wire.

9. The electronic component according to claim 6 , wherein the fourth electrode is disposed closer to an outer periphery of the electronic component than the second electrode.

10. 7. The electronic component according to claim 6, wherein the fourth electrode is disposed at a higher position than the second electrode when viewed from the base body.

11. The electronic component of claim 6 , wherein the second conductive wire is shorter than the conductive wire.

12. 7. The electronic component according to claim 6, wherein the second conductive wire is thicker than the first conductive wire.

13. 7. The electronic component according to claim 6, wherein the second conductive wire has a higher thermal conductivity than the conductive wire.

14. 14. The electronic component according to claim 1, wherein the cooling member is a Peltier element.

15. 14. The electronic component according to claim 1, wherein the base contains alumina.

16. 14. The electronic component according to claim 1, wherein the base contains aluminum nitride.

17. 14. The electronic component according to claim 1, wherein the conductive wires comprise gold.

18. 14. The electronic component according to claim 1, wherein the conductive wires comprise aluminum.

19. 14. The electronic component according to claim 1, wherein the vertical distance between the second electrode and the top of the conductive wire is 1 mm or more.

20. The electronic component according to claim 2 , wherein, in a plan view, the second region is included within a region in which the semiconductor substrate is disposed.

21. 3. The electronic component according to claim 2, wherein the semiconductor substrate has a plurality of pixels arranged in an array.

22. 22. The electronic component according to claim 21, wherein, in a plan view, the second region is included within a region in which the plurality of pixels are arranged.

23. 3. The electronic component according to claim 2, wherein the base and the optical member are bonded together with an adhesive.

24. 3. The electronic component according to claim 2, wherein the base and the optical member are bonded to each other by a metal frame.

25. The substrate is mounted to a secondary substrate via solder; 14. The electronic component according to claim 1, wherein the base body has a member protruding toward the secondary substrate.

26. 15. The electronic component according to claim 14, wherein the cooling member is configured by stacking a plurality of the Peltier elements.

27. The electronic component according to claim 2 , wherein a plurality of the cooling members are placed in the second region.

28. The electronic component according to claim 1 ; A processing device that processes a signal output from the electronic component; An apparatus comprising:

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