Susceptor, epitaxial wafer manufacturing equipment, method for manufacturing epitaxial wafer, and method for manufacturing semiconductor device

Abstract

To provide a technology capable of suppressing thickness variation of epitaxial layers formed on semiconductor wafers having an orientation flat.SOLUTION: A susceptor has a mounting section on which a semiconductor wafer with an orientation flat is placed, and a wall section protruding from the mounting section and whose inner circumference in plan view corresponds to the shape of the semiconductor wafer, and at least one of the height and the inclination of the inner wall toward the mounting section side differs between the first portion of the wall that faces the orientation flat and the second portion of the wall that is not the first portion.SELECTED DRAWING: Figure 11

Description

Technical Field

[0001] The present disclosure relates to a susceptor, an epitaxial wafer manufacturing apparatus, a method for manufacturing an epitaxial wafer, and a method for manufacturing a semiconductor device.

Background Art

[0002] In recent years, the demand for SiC single crystal epitaxial wafers (hereinafter sometimes referred to as "SiC epitaxial wafers") as substrates for high breakdown voltage electronic devices and the like has been increasing. Generally, in the manufacture thereof, a SiC single crystal thin film (hereinafter sometimes referred to as an "epitaxial layer") is epitaxially grown on a SiC single crystal wafer (hereinafter sometimes referred to as a "SiC wafer") by thermal CVD (Chemical Vapor Deposition). In such SiC epitaxial wafers, basal plane dislocations (BPDs) existing on the SiC wafer are blocked by an epitaxial layer with a controlled doping concentration of impurities.

[0003] However, when an epitaxial layer is formed by the thermal CVD method with a SiC wafer placed in a recess (concave portion) of a susceptor, it is known that so-called epi-crown occurs in which the epitaxial layer at the outermost peripheral portion of the SiC wafer becomes thick. When the epi-crown becomes high, the area of the outer periphery of the SiC wafer (a region called edge exclusion or end cut) that cannot be used for manufacturing a semiconductor device increases from the viewpoint of quality. When the area that cannot be used for manufacturing a semiconductor device increases, the yield of semiconductor devices per SiC epitaxial wafer decreases, and thus it is required to suppress the occurrence of epi-crown.

[0004] On the other hand, for example, Patent Document 1 proposes a technique for uniformly increasing the step between the upper surface of a SiC wafer and the upper surface of a susceptor. In this technique, since the supply of the source gas to the outer peripheral portion of the SiC wafer is suppressed, it is possible to suppress the occurrence of epi-crown.

Prior Art Documents

Patent Documents

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-119472 [Summary of the Invention] [Problems to be Solved by the Invention]

[0006] In the technology of Patent Document 1, for a SiC wafer without an orientation flat (Orientaion Flat), the thickness of the epitaxial layer at the outermost periphery of the SiC wafer can be suppressed. However, when the technology of Patent Document 1 is applied to a SiC wafer having an orientation flat, although the thickness of the epitaxial layer at the outermost periphery of the SiC wafer can be suppressed, it affects the thickness of the epitaxial layer at the wafer outer periphery in a region other than the orientation flat. As a result, there is a problem that an area that cannot be used for manufacturing a semiconductor device cannot be appropriately reduced.

[0007] Therefore, the present disclosure has been made in view of the above problems, and an object thereof is to provide a technology capable of suppressing variations in the thickness of an epitaxial layer formed on a semiconductor wafer having an orientation flat. [Means for Solving the Problems]

[0008] The susceptor according to the present disclosure includes a mounting portion on which a semiconductor wafer having an orientation flat is mounted, and a wall portion that protrudes from the mounting portion and has an inner peripheral shape in a plan view corresponding to the shape of the semiconductor wafer. At least one of the height and the inclination of the inner wall toward the mounting portion side is different between a first portion of the wall portion facing the orientation flat and a second portion of the wall portion other than the first portion. [Effects of the Invention]

[0009] According to the present disclosure, since at least one of the height of the susceptor in contact with the orifice and the inclination of the inner wall toward the placement portion is different, only the orifice is affected, and the regions other than the orifice of the semiconductor wafer are not affected. Therefore, variations in the thickness of the epitaxial layer formed on the semiconductor wafer having the orifice can be suppressed.

Brief Description of the Drawings

[0010]

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Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments will be described with reference to the accompanying drawings. The features described in the following embodiments are examples, and not all features are necessarily essential. Also, in the descriptions shown below, the same or similar reference numerals are assigned to the same components in a plurality of embodiments, and different components will be mainly described. Further, in the descriptions described below, specific positions and directions such as "upper", "lower", "left", "right", "front", or "back" do not necessarily have to match the positions and directions during actual implementation.

[0012] <Related Device> Before describing the epitaxial wafer manufacturing apparatus according to Embodiment 1, a device related to the epitaxial wafer manufacturing apparatus (hereinafter sometimes referred to as "related device") will be described.

[0013] FIG. 1 is a schematic cross-sectional view showing the configuration of the related device. The related device in FIG. 1 manufactures an epitaxial wafer by forming an epitaxial layer on a heated semiconductor wafer 4 while supplying a source gas into a chamber 1 capable of evacuating under reduced pressure. That is, the related device in FIG. 1 manufactures an epitaxial wafer by thermal CVD. Hereinafter, a case where the semiconductor wafer 4 is a SiC single crystal wafer, the epitaxial layer is a SiC single crystal thin film, and the epitaxial wafer is a SiC single crystal epitaxial wafer will be described, but it is not limited thereto.

[0014] When forming an epitaxial layer of SiC, for example, silane (SiH4), dichlorosilane (H2SiCl2), trichlorosilane (HSiCl3), silicon tetrachloride (SiCl4), etc. can be used as the Si source in the source gas, and propane (C3H8), ethane (C2H6), methane (CH4), etc. can be used as the carbon (C) source. Further, for example, a gas containing hydrogen (H2) can be used as the carrier gas.

[0015] The related apparatus sets a semiconductor wafer 4 on each of a plurality of satellite disks 3 disposed on a planetary susceptor 2. During epitaxial growth, the related apparatus mechanically rotates the planetary susceptor 2 and blows the gas 9 passing through the planetary susceptor 2 from the lower surface of the satellite disk 3 to rotate the satellite disk 3, whereby the semiconductor wafer 4 rotates and revolves.

[0016] Note that since the jig on which the semiconductor wafer 4 is usually placed is called a susceptor, the satellite disk 3 can be regarded as a susceptor. Therefore, in the following description, the satellite disk 3 is referred to as "susceptor 3". A reaction space is provided between the susceptor 3 and a top plate 5 disposed opposite to the upper surface of the susceptor 3 in the chamber 1. An induction heating coil 8 is provided under the planetary susceptor 2. For example, carbon is used for the base materials of the planetary susceptor 2 and the susceptor 3, and the induction heating coil 8 heats the semiconductor wafer 4 by inductively heating the planetary susceptor 2 and the susceptor 3.

[0017] An injector 6 penetrating the central portion of the top plate 5 is provided in the chamber 1. The lower portion of the injector 6 is accommodated in a concave center part 7 provided on the planetary susceptor 2. The source gas discharged from the injector 6 flows radially from the center side to the outside (the left and right sides in FIG. 2) of the chamber 1. The source gas supplied parallel to the upper surface of the semiconductor wafer 4 is discharged out of the chamber 1 through an exhaust port provided at the outer peripheral portion (the left and right end portions in FIG. 2) of the chamber 1 after being used for the formation of the epitaxial layer.

[0018] In the upstream region of the source gas (i.e., the region close to the injector 6) and the downstream region (i.e., the region far from the injector 6), the growth rate and carrier concentration of the epitaxial layer on the semiconductor wafer 4 are different. In the related apparatus, since the semiconductor wafer 4 rotates and revolves, the uniformity of the growth rate and carrier concentration in the plane of the semiconductor wafer 4 can be improved.

[0019] FIG. 2 is a top view showing the configuration of the susceptor 3 of the related apparatus and a cross-sectional view taken along A-A'. The susceptor 3 includes a mounting portion 3a and a wall portion 3b.

[0020] The semiconductor wafer 4 having an orientation flat 4a is placed on the mounting portion 3a. In the top view, the mounting portion 3a is hatched diagonally.

[0021] As shown in the cross-sectional view, the wall portion 3b protrudes from the mounting portion 3a. Since the periphery of the semiconductor wafer 4 is surrounded by the wall portion 3b, even if the semiconductor wafer 4 rotates and revolves, and even if the source gas 51 flows over the upper surface of the semiconductor wafer 4, the displacement of the semiconductor wafer 4 is suppressed.

[0022] In the susceptor 3 of the related apparatus, the height of the wall portion 3b is uniform regardless of the position of the portion inside the wall portion 3b in plan view. For this reason, the step 52 between the upper surface of the semiconductor wafer 4 and the upper surface of the wall portion 3b is uniform.

[0023] Also, as shown in the top view, the shape of the inner periphery of the wall portion 3b in plan view is a circular shape without a notch such as the orientation flat 4a, and does not correspond to the shape of the semiconductor wafer 4 having the orientation flat 4a. For this reason, the distance between the orientation flat 4a of the semiconductor wafer 4 and the inner wall of the wall portion 3b is larger than the distance between the portion other than the orientation flat 4a of the semiconductor wafer 4 and the inner wall of the wall portion 3b.

[0024] FIG. 3 is a cross-sectional view showing the outer peripheral portion of the epitaxial wafer 11 manufactured by a related apparatus. The epitaxial wafer 11 includes a semiconductor wafer 4 and an epitaxial layer 12. The epitaxial layer 12 is formed on the semiconductor wafer 4 on the mounting portion 3a of the susceptor 3 by a related apparatus. In thermal CVD using a related apparatus or the like, an epi-crown 12a in which the epitaxial layer 12 at the outer peripheral portion of the semiconductor wafer 4 becomes thicker than the epitaxial layer 12 in other portions is generated. In the following description, the thickness of the epitaxial layer 12 may be referred to as "epi-thickness", and the height 100 of the epi-crown 12a may be referred to as "epi-crown height 100". Note that the epi-crown height 100 indicates, for example, the difference between the epi-thickness at the outermost peripheral portion and the epi-thickness at a location about 5 mm inward from the edge of the semiconductor wafer 4.

[0025] FIG. 4 is a diagram showing the results of measuring the epi-crown height 100 at four points on the outer peripheral portion of the semiconductor wafer 4 for a 6-inch epitaxial wafer 11 manufactured by a related apparatus. Note that the epi-crown height 100 is shown as a normalized value normalized by the average of the thicknesses of the epitaxial layer 12 in the plane of the semiconductor wafer 4. In the following description, the average of the epi-thicknesses in the plane of the semiconductor wafer 4 may also be referred to as "average in-plane epi-thickness". From the results of FIG. 4, it can be seen that the epi-crown height 100 at the central portion of the orifice 4a (corresponding to θ = 0°) is significantly higher than the other epi-crown heights 100.

[0026] FIG. 5 is a diagram showing the results of examining the correlation between the step 52 in FIG. 2 and the epi-crown height 100 (normalized value normalized by the average in-plane epi-thickness) at the central portion of the orifice 4a. Note that the step 52 is substantially the same as the step between the upper surface of the SiC wafer in Patent Document 1 and the upper surface of the susceptor.

[0027] From the results of FIG. 5, it can be seen that in order to lower the epi-crown height 100 at the central portion of the orifice 4a, the step 52 may be increased. This is presumably because the range that is a dead angle for the source gas spreads at the edge of the semiconductor wafer 4, and the supply of the source gas to the edge of the semiconductor wafer 4 is inhibited.

[0028] FIG. 6 is a diagram showing the result of examining the correlation between the step 52 and the average epi thickness (standardized value normalized by the average in-plane epi thickness) of seven points on the outer peripheral portion of the semiconductor wafer 4 excluding the orifice 4a. Each of the seven points is a point 5 mm inward from the edge of the semiconductor wafer 4.

[0029] From the results of FIG. 6, it can be seen that when the step 52 is increased to about 2.0 mm, the standardized value of the average epi thickness of the outer peripheral portion of the semiconductor wafer 4 approaches 1.00, and the epi thickness of the outer peripheral portion of the semiconductor wafer 4 and the epi thickness of the portion other than the outer peripheral portion can be made uniform. However, when the step 52 is increased from about 2.0 mm, it can be seen that the standardized value of the average epi thickness of the outer peripheral portion of the semiconductor wafer 4 becomes smaller than 1.00, and the difference between the epi thickness of the outer peripheral portion of the semiconductor wafer 4 and the epi thickness of the portion other than the outer peripheral portion becomes large.

[0030] FIGS. 7 and 8 are diagrams showing the distribution of the epi thickness (standardized value normalized by the average in-plane epi thickness) in the x direction passing through the center of the epitaxial wafer 11 when the step 52 is 0.7 mm and 2.5 mm, respectively. The difference between the epi thickness of the outer peripheral portion of the semiconductor wafer 4 and the epi thickness of the portion other than the outer peripheral portion when the step 52 is 2.5 mm is larger than the difference when the step 52 is 0.7 mm.

[0031] Summarizing the results of FIGS. 5 to 8, increasing the step 52 can reduce the epi crown height 100 at the center of the orifice 4a, but a new problem occurs in that the film thickness of the epitaxial layer 12 varies in the plane of the semiconductor wafer 4. This problem can also occur when the susceptor 3 is configured such that the step 52 of the orifice 4a of the semiconductor wafer 4 is different from the step 52 of the portion other than the orifice 4a of the semiconductor wafer 4.

[0032] Therefore, the inventor investigated factors affecting the epi-crown 12a in addition to the step 52. FIG. 9 is a top view showing the configuration of the susceptor 16 for investigation. The susceptor 16 has a different shape of the wall portion from the susceptor 3 in FIG. 2, but is otherwise the same as the susceptor 3 in FIG. 2. FIG. 10 is a diagram showing the result of measuring the epi-crown height 100 (a standardized value normalized by the average in-plane epi-thickness) of the outer peripheral portion of the semiconductor wafer 4 for the epitaxial wafer 11 manufactured using the susceptor 16 in FIG. 9.

[0033] From the results in FIG. 10, it can be seen that the epi-crown height 100 has peaks at two portions on the side opposite to the orifice 4a, that is, at portion B that does not face the wall portion of the susceptor 16 in FIG. 9. Also, in the susceptor 3 of FIG. 2, the distance between the orifice 4a of the semiconductor wafer 4 and the inner wall of the wall portion 3b is larger than others, and as a result in FIG. 4, the epi-crown height 100 of the orifice 4a is higher than others.

[0034] From the results in FIGS. 4 and 10, it is considered that when the distance between the outer peripheral portion of the semiconductor wafer 4 and the inner wall of the wall portion 3b is small, the epi-crown height 100 becomes low. That is, if the shape of the inner periphery of the wall portion 3b in plan view is configured to correspond to the shape of the semiconductor wafer 4 having the orifice 4a, it is considered that the epi-crown height 100 at the orifice 4a becomes low. However, if the shape of the inner periphery of the wall portion 3b in plan view is configured to correspond to the shape of the semiconductor wafer 4 having the orifice 4a and, moreover, the step 52 is increased, it is highly likely to affect the epi-thickness of the region other than the orifice 4a. This is because the epi-crown height 100 of the orifice 4a is higher than the epi-crown height 100 of other regions. Therefore, the inventor derived a configuration in which a change in the step 52 was added so that the supply of the source gas to the orifice 4a was appropriately inhibited in the configuration where the shape of the inner periphery of the wall portion 3b corresponds to the shape of the semiconductor wafer 4.

[0035] <Embodiment 1> FIG. 11 is a top view, a cross-sectional view taken along A-A', and a side view showing the configuration of the susceptor according to Embodiment 1. Hereinafter, the epitaxial wafer manufacturing apparatus according to Embodiment 1 will be described on the assumption that it is the same as the related apparatus in FIG. 1 except that the related apparatus and the susceptor 3 are different, but this is not restrictive. Also, hereinafter, among the components according to Embodiment 1, the same or similar components as the above-described components will be given the same or similar reference numerals, and different components will be mainly described.

[0036] As shown in FIG. 11, the susceptor 3 according to Embodiment 1 includes a placement portion 3a and a wall portion 3b.

[0037] A semiconductor wafer 4 having an orifice 4a is placed on the placement portion 3a. The epitaxial wafer manufacturing apparatus according to Embodiment 1 forms an epitaxial layer 12 made of SiC on the semiconductor wafer 4 made of SiC on the placement portion 3a. During the formation of the epitaxial layer, the central portion of the semiconductor wafer 4 often warps so as to protrude downward (i.e., toward the placement portion 3a). In this case, if the placement portion 3a is flat as in the cross-sectional view of FIG. 2, the lower surface of the central portion of the semiconductor wafer 4 comes into partial contact with the placement portion 3a. As a result, the temperature within the plane of the semiconductor wafer 4 varies, and the film thickness and carrier concentration of the epitaxial layer, which are important parameters, may vary. Therefore, in order to suppress variations in the film thickness and carrier concentration, a bowl-shaped recess (not shown) may be provided on the upper surface of the placement portion 3a to support the semiconductor wafer 4 at its outer peripheral portion so that the lower surface of the central portion of the semiconductor wafer 4 does not contact the placement portion 3a.

[0038] The wall portion 3b protrudes from the placement portion 3a. Similar to the related apparatus, in the epitaxial wafer manufacturing apparatus according to Embodiment 1, the semiconductor wafer 4 rotates and revolves, and the source gas 51 flows over the upper surface of the semiconductor wafer 4, and the displacement of the semiconductor wafer 4 is suppressed by the wall portion 3b.

[0039] The susceptor 3 may be formed, for example, by providing a countersink (recess) in a disk member, or may be formed, for example, by connecting a separately formed mounting portion 3a and a wall portion 3b. According to the former forming method, the parts cost can be reduced, and according to the latter forming method, since the respective materials and coating materials of the mounting portion 3a and the wall portion 3b can be freely combined, the degree of freedom in design can be increased. Which forming method to apply may be determined according to the purpose of the susceptor 3.

[0040] In a plan view, the shape of the inner circumference of the wall portion 3b is a substantially circular shape having a notch such as the orifice 4a, corresponding to the shape of the semiconductor wafer 4 having the orifice 4a. For this reason, since the distance between the orifice 4a of the semiconductor wafer 4 and the inner wall of the wall portion 3b becomes small, the epi-crown height 100 at the orifice 4a can be reduced.

[0041] Also, in the first embodiment, the height of the first portion 3b1 of the wall portion 3b facing the orifice 4a is higher than the height of the second portion 3b2 of the wall portion 3b other than the first portion 3b1. As a result, the step 52b1 between the upper surface of the semiconductor wafer 4 and the first portion 3b1 is higher than the step 52b2 between the upper surface of the semiconductor wafer 4 and the second portion 3b2. According to such a configuration, since the supply of the source gas to the orifice 4a is inhibited more than the portions other than the orifice 4a, it is possible to suppress the epi-crown 12a from locally increasing at the orifice 4a.

[0042] The epitaxial wafer 11 manufactured by the epitaxial wafer manufacturing apparatus according to Embodiment 1 includes a semiconductor wafer 4 and an epitaxial layer 12, and a semiconductor device is formed on the epitaxial wafer 11. The semiconductor device includes, for example, at least any one of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), an RC-IGBT (Reverse Conducting - IGBT), an SBD (Schottky Barrier Diode), and a PND (PN junction diode). In this specification, for example, at least any one of A, B, C, …, and Z means any one of all combinations extracted from the group of A, B, C, …, and Z. When the semiconductor wafer 4 is made of SiC and the epitaxial layer 12 is made of SiC, in the semiconductor device, stable operation at high temperature and high voltage and high switching speed can be achieved.

[0043] <Summary of Embodiment 1> According to the susceptor 3 according to Embodiment 1 as described above, the height of the first portion 3b1 of the wall portion 3b facing the orifice 4a is higher than the height of the second portion 3b2 other than the first portion 3b1. According to such a configuration, it is possible to suppress the local increase of the epi-crown 12a at the orifice 4a. Further, in Embodiment 1, since the inner peripheral shape of the wall portion 3b in plan view corresponds to the shape of the semiconductor wafer 4, it is possible to reduce the epi-crown height 100 while suppressing the variation in the film thickness of the epitaxial layer 12.

[0044] If the semiconductor wafer 4 has an orifice 4a, the size of the semiconductor wafer 4 is not limited, and it may be, for example, 4 inches or 6 inches. Further, as shown in FIG. 12, an inclination may be provided at the upper portion of the first portion 3b1 of the wall portion 3b.

[0045] <Embodiment 2> FIG. 13 is a top view showing the configuration of the susceptor 3 according to Embodiment 2 and a cross-sectional view taken along line A-A' thereof. In Embodiment 1, the shape of the inner periphery of the wall portion 3b in plan view corresponds to the shape of the semiconductor wafer 4, and by raising the first portion 3b1 of the wall portion 3b that faces the orifice 4a, the supply of the source gas to the orifice 4a was inhibited.

[0046] In Embodiment 2, similar to Embodiment 1, the shape of the inner periphery of the wall portion 3b in plan view corresponds to the shape of the semiconductor wafer 4. However, in Embodiment 2, unlike Embodiment 1, the height of the first portion 3b1 is the same as the height of the second portion 3b2. Also, in Embodiment 2, unlike Embodiment 1, the inner wall of the first portion 3b1 is inclined toward the mounting portion 3a, and the inner walls of the second portion 3b2 other than the first portion 3b1 are erected so as not to be inclined toward the mounting portion 3a. According to such a configuration, since the first portion 3b1 of the wall portion 3b protrudes so as to cover the upper part of the orifice 4a, the supply of the source gas to the orifice 4a is inhibited, so that it is possible to suppress the local increase of the epi-crown 12a at the orifice 4a.

[0047] Note that in a configuration where the inner walls of the wall portion 3b are inclined toward the mounting portion 3a over the entire circumference of the semiconductor wafer 4, the semiconductor wafer 4 cannot be mounted on the mounting portion 3a unless the opening at the upper part of the wall portion 3b is larger than the semiconductor wafer 4. On the other hand, in Embodiment 2 where only the inner wall of the first portion 3b1 is inclined toward the mounting portion 3a, even if the opening is somewhat small, after first setting the orifice 4a between the mounting portion 3a and the inner wall of the first portion 3b1, the other parts of the semiconductor wafer 4 can be mounted on the mounting portion 3a.

[0048] FIG. 14 is an enlarged cross-sectional view of the first portion 3b1 of FIG. 13. The step 52b1 between the upper surface of the semiconductor wafer 4 and the upper surface of the first portion 3b1 is α [mm], the distance 53 by which the first portion 3b1 protrudes from the orifice 4a of the semiconductor wafer 4 is β [mm], and the angle formed between the inner wall of the first portion 3b1 and the placement portion 3a is θ [rad]. In this case, tan θ = α / β holds. When the maximum value of β is 1 [mm], θ that satisfies tan θ = α becomes the minimum value of the angle formed between the inner wall of the first portion 3b1 and the placement portion 3a.

[0049] <Summary of Embodiment 2> According to the susceptor 3 according to Embodiment 2 as described above, the inner wall of the first portion 3b1 is inclined toward the placement portion 3a side, and the inner wall of the second portion 3b2 is not inclined toward the placement portion 3a side. According to such a configuration, it is possible to suppress the local increase in the epi-crown 12a at the orifice 4a. Further, in Embodiment 2, since the shape of the inner periphery of the wall portion 3b in plan view corresponds to the shape of the semiconductor wafer 4, it is possible to reduce the epi-crown height 100 while suppressing variations in the film thickness of the epitaxial layer 12.

[0050] <Embodiment 3> In the epitaxial wafer manufacturing apparatus according to Embodiments 1 and 2, the source gas was supplied from a part of the outer peripheral portion of the semiconductor wafer 4 toward another part of the outer peripheral portion. However, among epitaxial wafer manufacturing apparatuses, there is also an apparatus that forms the epitaxial layer 12 by spraying the source gas from above the center of the rotating semiconductor wafer 4. In the center spraying type apparatus, by rotating the semiconductor wafer 4, it is possible to expect the effect of enhancing the in-plane uniformity of the film thickness and carrier concentration of the epitaxial layer 12. Moreover, not only that, but also the effect of increasing the growth rate of the epitaxial layer by enhancing the utilization efficiency of the source gas, or the effect of easily discharging the source gas sprayed onto the semiconductor wafer 4 by centrifugal force can be expected.

[0051] Therefore, the epitaxial wafer manufacturing apparatus according to Embodiment 3 is a center spraying type apparatus. As shown in FIG. 15, the raw material gas 51 is configured to be sprayed from above the center of the semiconductor wafer 4. When the epi-crown 12a of the epitaxial wafer 11 on which the epitaxial layer 12 is formed by such a center spraying type apparatus was examined, generally, a high epi-crown 12a was generated at the orifice 4a. In the center spraying type apparatus, the raw material gas 51 that reaches the outer peripheral portion of the semiconductor wafer 4 collides with the inner wall of the high first portion 3b1 facing the orifice 4a, and the exhaust is inhibited. Therefore, it is considered that a high epi-crown 12a is generated at the orifice 4a.

[0052] Therefore, in Embodiment 3, as shown in FIG. 15, the height of the first portion 3b1 of the wall portion 3b facing the orifice 4a is lower than the height of the second portion 3b2 other than the first portion 3b1 of the wall portion 3b. According to such a configuration, the raw material gas 51 at the orifice 4a can be exhausted smoothly, so that it is possible to suppress the epi-crown 12a from locally increasing at the orifice 4a. The configuration for making the height of the first portion 3b1 lower than the height of the second portion 3b2 may be realized by providing a substantially rectangular groove extending in the horizontal direction, or a groove having an inclination that becomes higher or lower toward the outer peripheral portion, in the wall portion 3b.

[0053] <Summary of Embodiment 3> According to the susceptor 3 according to Embodiment 3 as described above, the height of the first portion 3b1 of the wall portion 3b facing the orifice 4a is lower than the height of the second portion 3b2 other than the first portion 3b1. According to such a configuration, it is possible to suppress the epi-crown 12a from locally increasing at the orifice 4a. Further, in Embodiment 3, since the shape of the inner periphery of the wall portion 3b in plan view corresponds to the shape of the semiconductor wafer 4, it is possible to reduce the epi-crown height 100 while suppressing variations in the film thickness of the epitaxial layer 12.

[0054] <Modification> It is also possible to combine Embodiment 1 and Embodiment 2, or to combine Embodiment 2 and Embodiment 3. That is, in the first part 3b1 of the wall portion 3b that faces the orifice 4a and the second part 3b2 of the wall portion 3b other than the first part 3b1, at least one of the height and the inclination of the inner wall toward the mounting portion 3a side may be different.

[0055] In addition, it is possible to freely combine each embodiment and each modification example, or to appropriately modify or omit each embodiment and each modification example.

[0056] Hereinafter, various aspects of the present disclosure will be collectively described as appendices.

[0057] (Appendix 1) A mounting portion on which a semiconductor wafer having an orifice is mounted, A wall portion that protrudes from the mounting portion and has an inner peripheral shape in a plan view corresponding to the shape of the semiconductor wafer and A susceptor in which at least one of the height and the inclination of the inner wall toward the mounting portion side is different between a first part of the wall portion that faces the orifice and a second part of the wall portion other than the first part.

[0058] (Appendix 2) The susceptor according to Appendix 1, wherein the height of the first part is higher than the height of the second part.

[0059] (Appendix 3) The susceptor according to Appendix 1 or Appendix 2, wherein the inner wall of the first part is inclined toward the mounting portion side, and the inner wall of the second part is not inclined toward the mounting portion side.

[0060] (Appendix 4) The susceptor according to Appendix 1 or Appendix 3, wherein the height of the first part is lower than the height of the second part.

[0061] (Appendix 5) Comprising the susceptor according to any one of Appendices 1 to 4, An epitaxial wafer manufacturing apparatus for forming an epitaxial layer made of SiC on the semiconductor wafer made of SiC on the placement part.

[0062] (Appendix 6) A method for manufacturing an epitaxial wafer using the susceptor according to any one of Appendices 1 to 4, A method for manufacturing an epitaxial wafer for forming an epitaxial layer made of SiC on the semiconductor wafer made of SiC on the placement part.

[0063] (Appendix 7) A method for manufacturing a semiconductor device using the susceptor according to any one of Appendices 1 to 4, A method for manufacturing a semiconductor device for forming an epitaxial layer made of SiC on the semiconductor wafer made of SiC on the placement part and forming a semiconductor device on the semiconductor wafer and the epitaxial layer.

Explanation of Reference Signs

[0064] 3 susceptor, 3a placement part, 3b wall part, 3b1 first part, 3b2 second part, 4 semiconductor wafer, 4a orifice, 11 epitaxial wafer, 12 epitaxial layer, 100 epitaxial crown height.

Claims

1. A mounting portion on which a semiconductor wafer having an orifice is mounted, A wall portion protruding from the mounting portion and having an inner peripheral shape in plan view corresponding to the shape of the semiconductor wafer, and comprising: Among the wall portions, at least one of the height and the inclination of the inner wall toward the mounting portion is different between a first portion facing the orifice and a second portion other than the first portion of the wall portion. A susceptor.

2. The susceptor according to claim 1, wherein the height of the first portion is higher than the height of the second portion. A susceptor.

3. The susceptor according to claim 1, wherein the inner wall of the first portion is inclined toward the mounting portion, and the inner wall of the second portion is not inclined toward the mounting portion. A susceptor.

4. The susceptor according to claim 1, wherein the height of the first portion is lower than the height of the second portion. A susceptor.

5. An epitaxial wafer manufacturing apparatus comprising the susceptor according to any one of claims 1 to 4, and forming an epitaxial layer made of SiC on the semiconductor wafer made of SiC on the mounting portion.

6. A method for manufacturing an epitaxial wafer using the susceptor according to any one of claims 1 to 4, and forming an epitaxial layer made of SiC on the semiconductor wafer made of SiC on the mounting portion. A method for manufacturing an epitaxial wafer.

7. A method for manufacturing a semiconductor device using the susceptor according to any one of claims 1 to 4, A method of manufacturing a semiconductor device, comprising: forming an epitaxial layer made of SiC on the semiconductor wafer made of SiC on the mounting portion; and forming a semiconductor device on the semiconductor wafer and the epitaxial layer.

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