Manufacturing method of element chip

Abstract

To enhance a transverse intensity of an element chip.SOLUTION: A manufacturing method of an element chip, comprises: a preparation step of preparing a substrate 1 having a semiconductor layer 2, a wiring layer 3 and a resin layer 4, and a division region; a laser grouping step of irradiating the division region with a laser beam L1 and forming an open in the division region; and a plasma etching step. The laser grouping step includes: a first step of exposing the wiring layer 3 by irradiating the resin layer 4 with a first laser beam L1 having a first pulse width; and a second step of exposing the semiconductor layer 2 by irradiating the wiring layer 3 exposed in the first step with a second laser beam L2 having a second pulse width that is shorter than the first pulse width. In the first step, the irradiation of the resin layer 4 corresponding to the division region with the first laser beam L1 is performed at a plurality of times along a long direction of the division region.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing an element chip.

Background Art

[0002] Conventionally, a method for manufacturing an element chip that divides a substrate into a plurality of element chips by plasma etching is known (for example, Patent Document 1). The method for manufacturing an element chip according to Patent Document 1 includes a step of forming a mask layer on a circuit formation surface of a substrate on which a plurality of semiconductor elements are formed, and a step of removing the mask layer in a division region that divides adjacent semiconductor elements from each other by irradiating laser light, and a step of removing the substrate corresponding to the division region by plasma etching to obtain a plurality of element chips.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, according to the method for manufacturing an element chip of Patent Document 1, unevenness occurs at the ends of the openings formed in the step of irradiating laser light. As a result, the smoothness of the side surface of the obtained element chip decreases, and the flexural strength of the element chip may decrease. In such a situation, one of the objects of the present disclosure is to increase the flexural strength of the element chip.

Means for Solving the Problems

[0005] One aspect of the present disclosure relates to a method for manufacturing an element chip. The manufacturing method includes a substrate including a semiconductor layer having a first main surface and a second main surface, a wiring layer formed on the first main surface side of the semiconductor layer, and a resin layer formed on the wiring layer, the method comprising: a preparation step of preparing a substrate including a plurality of element regions and division regions defining the element regions; a laser grooving step of irradiating the division regions with laser light from the first main surface side to form openings in which the semiconductor layer is exposed in the division regions; and a plasma etching step of obtaining a plurality of element chips by etching the semiconductor layer exposed in the openings with plasma. The laser grooving step includes a first step of irradiating the resin layer with first laser light having a first pulse width to remove the resin layer corresponding to the division regions and expose the wiring layer, and a second step of irradiating the wiring layer exposed in the first step with second laser light having a second pulse width shorter than the first pulse width to remove the wiring layer corresponding to the division regions and expose the semiconductor layer. In the first step, the irradiation of the first laser light onto the resin layer corresponding to the division regions is performed a plurality of times along the longitudinal direction of the division regions.

Advantages of the Invention

[0006] According to the present disclosure, the flexural strength of the element chip can be increased.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0008] Embodiments of the method for manufacturing an element chip according to the present disclosure will be described below with examples. However, the present disclosure is not limited to the examples described below. In the following description, specific numerical values and materials may be exemplified, but other numerical values and materials may be applied as long as the effects of the present disclosure can be obtained.

[0009] The method for manufacturing an element chip according to the present disclosure is a method of obtaining a plurality of element chips by singulating a substrate by plasma etching. The method for manufacturing an element chip according to the present disclosure includes a preparation step, a laser grooving step, and a plasma etching step.

[0010] In the preparation step, a substrate including a semiconductor layer having a first main surface and a second main surface, a wiring layer formed on the first main surface side of the semiconductor layer, and a resin layer formed on the wiring layer is prepared. The substrate includes a plurality of element regions and a division region that defines the element regions. The semiconductor material included in the semiconductor layer is not particularly limited, and may be, for example, Si, SiC, GaN, or GaAs. The wiring layer may include, for example, an insulating film such as SiO2, SiN, SiCN, and a metal such as Cu or Al. The shape of each element region is not particularly limited, and may be, for example, rectangular, polygonal, or circular. The width of the division region is also not particularly limited and can be appropriately set according to the purpose. The resin layer may include a water-soluble or water-insoluble resin material. The thickness of the resin layer is not particularly limited as long as it is not completely removed in the plasma etching step. Examples of the water-insoluble resin material include photoresist materials. The resin layer may be formed on the wiring layer by, for example, a spray coating method or a spin coating method.

[0011] In the laser grooving process, a laser beam is irradiated from the first main surface side to a division region to form an opening in which the semiconductor layer is exposed in the division region. That is, in the laser grooving process, the resin layer and the wiring layer corresponding to the division region are removed by the irradiation of the laser beam. At this time, according to the conventional method of simultaneously removing the resin layer and the wiring layer, irregularities may occur at the edge of the opening. This is presumably due to the fact that a shock wave is generated between the resin layer and the wiring layer in the process of irradiating the laser beam, and the resin layer adjacent to the resin layer in the division region is partially peeled off from the wiring layer. If there are irregularities at the edge of the opening, the smoothness of the side surface of the element chip may be reduced, and as a result, the flexural strength of the element chip may be reduced.

[0012] On the other hand, the laser grooving process of the present disclosure mainly includes a first step of removing the resin layer and a second step of removing the wiring layer, and the above-mentioned opening is formed by both steps. More specifically, in the first step, the resin layer corresponding to the division region is removed by irradiating the resin layer with the first laser beam having the first pulse width to expose the wiring layer. In the second step, the wiring layer exposed in the first step is irradiated with the second laser beam having the second pulse width shorter than the first pulse width, so that the wiring layer corresponding to the division region is removed to expose the semiconductor layer. The first pulse width may be, for example, a pulse width on the order of nanoseconds. The second pulse width may be, for example, a pulse width on the order of picoseconds or femtoseconds.

[0013] In this way, by using the first laser beam having a relatively long pulse width (first pulse width) for removing the resin layer, the peak value of the laser intensity is suppressed to be small, and the shock wave generated between the resin layer and the wiring layer is weakened, thereby suppressing the unintentional peeling of the resin layer. However, if the pulse width of the first laser beam is too long (for example, a pulse width on the order of milliseconds), the resin layer will be excessively melted by the laser heat, which is not preferable. Therefore, the first pulse width is preferably a pulse width on the order of sub-milliseconds even if it is long. And, by using the second laser beam having a relatively short pulse width (second pulse width) for removing the wiring layer, the thermal influence on the semiconductor layer under the wiring layer is suppressed, and as a result, it is possible to suppress the undesirable influence such as thermal distortion from reaching the obtained element chip.

[0014] Furthermore, in the first step of the present disclosure, the irradiation of the first laser beam to the resin layer corresponding to the division region is performed a plurality of times along the longitudinal direction of the division region. In this way, instead of removing the resin layer by a single irradiation of the first laser beam, by removing the resin layer by a plurality of irradiations of the first laser beam, it is allowed to lower the laser intensity per irradiation, and thereby it becomes possible to further weaken the shock wave generated between the resin layer and the wiring layer. That is, the unintentional peeling of the resin layer can be further suppressed. Note that the longitudinal direction of the division region refers to the extending direction of the division region that extends so as to divide adjacent element regions.

[0015] In the plasma etching step, a plurality of element chips are obtained by etching the semiconductor layer exposed in the opening with plasma. Each element chip may correspond to the above element region. The plasma etching can be performed using the resin layer as a mask. As described above, according to the laser grooving step of the present disclosure, since the unintentional peeling of the resin layer is suppressed, the element chip obtained by plasma etching using the resin layer as a mask has a very high smoothness on its side surface. Therefore, the flexural strength of the element chip can be increased.

[0016] The irradiation of the first laser light in the first step may include irradiating the first laser light along each of a plurality of first planned irradiation lines that are spaced apart from each other in the width direction of the division region and extend in the longitudinal direction of the division region. The width direction of the division region refers to the direction orthogonal to the longitudinal direction of the division region (or the facing direction of adjacent element regions). For example, the plurality of first planned irradiation lines may include two first planned irradiation lines near the ends in the width direction, that is, a pair of first planned irradiation lines located on the outermost sides in the width direction of the division region (hereinafter also referred to as the first outermost planned irradiation lines), and at least one (preferably one) first planned irradiation line located between the two first planned irradiation lines.

[0017] The irradiation of the first laser light along the plurality of first planned irradiation lines in the first step may be started from the irradiation along the first planned irradiation line closest to the end in the width direction of the division region. According to this configuration, by irradiating the first laser light along the first planned irradiation line closest to the end of the division region, the resin layer adjacent to the element region is removed immediately after the start of the first step (that is, before irradiating the first laser light along the first planned irradiation line relatively far from the end of the division region). Therefore, the thermal influence by the subsequent irradiation of the first laser light is less likely to reach the element region. When there are two first planned irradiation lines closest to the end in the width direction of the division region, the first laser light may be irradiated along one of the first planned irradiation lines and then along the other first planned irradiation line, or the first laser light may be irradiated along both first planned irradiation lines simultaneously.

[0018] The beam width of the first laser light irradiated along the first planned irradiation line closest to the end in the width direction of the division region may be smaller than the beam width of the first laser light irradiated along the first planned irradiation line closer to the center in the width direction of the division region. For example, the former beam width may be 1 μm or more and 6 μm or less, and the latter beam width may be 10 μm or more and 20 μm or less.

[0019] The irradiation of the first laser beam along the first planned irradiation line closest to the end in the width direction of the divided region in the first step may be performed multiple times along the same first planned irradiation line. As a result, compared with the case where the irradiation of the first laser beam along the first planned irradiation line is completed at once, the peak value of the laser intensity can be suppressed to be low, the shock wave generated between the resin layer and the wiring layer can be weakened, and thus the unintentional peeling of the resin layer can be suppressed. In addition, the thermal influence on the element region due to the irradiation of the first laser beam can also be suppressed. The number of times of irradiating the first laser beam along the same first planned irradiation line may be, for example, 2 or more and 5 or less.

[0020] The irradiation of the first laser beam in the first step may be performed multiple times along the same first planned irradiation line set to extend in the longitudinal direction of the divided region. As a result, compared with the case where the irradiation of the first laser beam along the first planned irradiation line is completed at once, the peak value of the laser intensity can be suppressed to be low, the shock wave generated between the resin layer and the wiring layer can be weakened, and thus the unintentional peeling of the resin layer can be suppressed. The number of times of irradiating the first laser beam along the same first planned irradiation line may be, for example, 2 or more and 5 or less.

[0021] The first laser beam may be a UV laser or an infrared laser. Thereby, particularly when the resin layer contains a water-soluble resin material, the resin layer can be efficiently removed by the first laser beam.

[0022] The irradiation of the second laser beam in the second step may include irradiating the second laser beam along each of a plurality of second planned irradiation lines that are spaced apart from each other in the width direction of the divided region and extend in the longitudinal direction of the divided region. For example, the plurality of second planned irradiation lines may include two second planned irradiation lines closer to the end in the width direction, that is, a pair of second planned irradiation lines located on the outermost side in the width direction of the divided region (hereinafter, also referred to as the second outermost planned irradiation lines), and at least one second planned irradiation line located between the two second planned irradiation lines. Each second planned irradiation line may overlap with the first planned irradiation line or may not overlap with the first planned irradiation line.

[0023] Also, the first planned irradiation line and the second planned irradiation line may be set such that a second region sandwiched between a pair of second outermost planned irradiation lines is inside a first region sandwiched between a pair of first outermost planned irradiation lines. Thereby, it is possible to suppress the resin layer from being ablated or the resin layer from being partially peeled off from the wiring layer, which is induced by the irradiation of the second laser beam.

[0024] Irradiation of the second laser beam along a plurality of second planned irradiation lines in the second step may be started from irradiation along the second planned irradiation line closest to the end in the width direction of the divided region. According to this configuration, by irradiating the second laser beam along the second planned irradiation line closest to the end of the divided region, immediately after the start of the second step (that is, before the irradiation of the second laser beam along the second planned irradiation line relatively far from the end of the divided region), the wiring layer adjacent to the element region is removed. Therefore, the thermal influence by the subsequent irradiation of the second laser beam hardly reaches the element region. When there are two second planned irradiation lines closest to the end in the width direction of the divided region, the second laser beam may be irradiated along one of the second planned irradiation lines and then along the other second planned irradiation line, or the second laser beam may be irradiated simultaneously along both second planned irradiation lines.

[0025] The plurality of second planned irradiation lines may include two second planned irradiation lines close to the end in the width direction of the divided region and at least two second planned irradiation lines set between the two second planned irradiation lines. According to this configuration, compared with the case where only one second planned irradiation line is set in the region corresponding to at least two second planned irradiation lines, the thermal influence on the semiconductor layer (particularly, the semiconductor layer in the element region) can be suppressed. Irradiation of the second laser beam along at least two second planned irradiation lines may be performed one by one or in plural sequentially, or all at the same time. In the case of the former sequential performance, the thermal influence on the semiconductor layer can be further suppressed, while in the case of the latter simultaneous performance of all, the tact time related to the manufacture of the element chip can be shortened.

[0026] Irradiation of the second laser light along at least two second planned irradiation lines may be performed multiple times along the same second planned irradiation line. Thereby, compared with the case where the irradiation of the second laser light along the second planned irradiation line is completed at once, the peak value of the laser intensity can be suppressed to be lower, and the thermal influence on the semiconductor layer under the wiring layer (particularly, the semiconductor layer in the element region) can be further suppressed. The number of times of irradiating the second laser light along the same second planned irradiation line may be, for example, 2 or more and 5 or less.

[0027] As described above, according to the present disclosure, by adopting a laser grooving process having predetermined first and second steps, the flexural strength of the element chip can be increased.

[0028] Hereinafter, an example of a method for manufacturing an element chip according to the present disclosure will be specifically described with reference to the drawings. The above-described steps can be applied to the steps of an example of a method for manufacturing an element chip described below. The steps of an example of a method for manufacturing an element chip described below can be changed based on the above description. Also, the matters described below may be applied to the above embodiments. Among the steps of an example of a method for manufacturing an element chip described below, steps that are not essential for the method for manufacturing an element chip according to the present disclosure may be omitted. Note that the drawings shown below are schematic and do not accurately reflect the shape and number of actual members.

[0029] The method for manufacturing an element chip of the present embodiment is a method for obtaining a plurality of element chips by singulating a substrate by plasma etching. As shown in FIGS. 1 to 7, the method for manufacturing an element chip includes a preparation step, a laser grooving step, and a plasma etching step. The laser grooving step and the plasma etching step may be performed while the substrate 1 is held by a transfer carrier having a holding tape 20 and a frame (not shown) that supports the holding tape 20, as shown in FIGS. 2 to 7.

[0030] In the preparation process, as shown in FIG. 1, a substrate 1 is prepared, which includes a semiconductor layer 2 having a first main surface 2a and a second main surface 2b, a wiring layer 3 formed on the first main surface 2a side of the semiconductor layer 2, and a resin layer 4 formed on the wiring layer 3. The substrate 1 includes a plurality of element regions EA and a division region DA that defines the element regions EA. The resin layer 4 of the present embodiment contains a water-soluble resin material, but is not limited thereto.

[0031] In the laser grooving process, as shown in FIGS. 2 to 6, laser beams L1 and L2 are irradiated from the first main surface 2a side to the division region DA to form an opening 5 in which the semiconductor layer 2 is exposed in the division region DA. The laser grooving process has a first step, a second step, and a third step.

[0032] In the first step, as shown in FIG. 2, by irradiating the resin layer 4 with a first laser beam L1 having a first pulse width (for example, a pulse width on the order of nanoseconds), the resin layer 4 corresponding to the division region DA is removed to expose the wiring layer 3. In the first step, the irradiation of the first laser beam L1 to the resin layer 4 corresponding to the division region DA is performed a plurality of times along the longitudinal direction of the division region DA (the direction perpendicular to the paper surface in FIG. 2). The first laser beam L1 of the present embodiment is a UV laser, but is not limited thereto.

[0033] More specifically, the irradiation of the first laser beam L1 in the first step is set to be spaced apart from each other in the width direction of the division region DA (the left-right direction in FIG. 2) and includes irradiating the first laser beam L1 along each of a plurality (in this example, three) of first irradiation planned lines IL1 (shown by a two-dot chain line in FIG. 3) that extend in the longitudinal direction of the division region DA.

[0034] Also, the irradiation of the first laser beam L1 along the plurality of first irradiation planned lines IL1 in the first step starts from the irradiation along the first irradiation planned line IL1 closest to the end in the width direction of the division region DA (the two first irradiation planned lines IL1 on the left and right in FIG. 3). In the present embodiment, the irradiation along the two first irradiation planned lines IL1 is performed simultaneously, but is not limited thereto.

[0035] Furthermore, the irradiation of the first laser beam L1 along the first planned irradiation line IL1 closest to the widthwise end of the divided region DA in the first step is performed a plurality of times (in this example, three times) along the same first planned irradiation line IL1. Note that the three vertically arranged first laser beams L1 shown in FIG. 2 mean that the first laser beam L1 is irradiated three times.

[0036] Also, the irradiation of the first laser beam L1 along the plurality of first planned irradiation lines IL1 in the first step may be performed by changing the beam shape of the first laser beam L1. For example, as shown in FIG. 2, the irradiation of the first laser beam L1 along the first planned irradiation line IL1 closest to the widthwise end of the divided region DA in the first step is performed with the beam diameter of the first laser beam L1 relatively narrowed, and then, the irradiation of the first laser beam L1 along the first planned irradiation line IL1 set near the center in the width direction of the divided region DA is performed with the beam diameter of the first laser beam L1 relatively widened.

[0037] In the second step, as shown in FIG. 4, by irradiating the wiring layer 3 exposed in the first step with a second laser beam L2 having a second pulse width shorter than the first pulse width (for example, a pulse width on the femtosecond order), the wiring layer 3 corresponding to the divided region DA is removed to expose the semiconductor layer 2. In the second step, the irradiation of the second laser beam L2 to the wiring layer 3 corresponding to the divided region DA is performed a plurality of times along the longitudinal direction of the divided region DA (the direction perpendicular to the paper surface in FIG. 4).

[0038] More specifically, the irradiation of the second laser beam L2 in the second step includes irradiating the second laser beam L2 along each of a plurality (in this example, 11) of second planned irradiation lines IL2 (shown by a two-dot chain line in FIG. 5) that are spaced apart from each other in the width direction of the divided region DA (the left-right direction in FIG. 4) and extend in the longitudinal direction of the divided region DA.

[0039] Further, the first planned irradiation line IL1 and the second planned irradiation line IL2 may be set such that a second region sandwiched between a pair of second planned irradiation lines IL2 (a pair of outermost second planned irradiation lines) located most outward in the width direction of the divided region DA is inside a first region sandwiched between a pair of first planned irradiation lines IL1 (a pair of outermost first planned irradiation lines) located most outward in the width direction of the divided region DA.

[0040] Also, the irradiation of the second laser beam L2 along the plurality of second planned irradiation lines IL2 in the second step starts from the irradiation along the second planned irradiation line IL2 closest to the end in the width direction of the divided region DA (the two second planned irradiation lines IL2 on the left and right in FIG. 5). In the present embodiment, the irradiation along the two second planned irradiation lines IL2 is performed simultaneously, but it is not limited thereto.

[0041] Furthermore, the plurality of second planned irradiation lines IL2 includes two second planned irradiation lines IL2 close to the end in the width direction of the divided region DA and at least two (nine in this example) second planned irradiation lines IL2 set between the two second planned irradiation lines IL2. In the present embodiment, the irradiation of the second laser beam L2 along the nine second planned irradiation lines IL2 is all performed simultaneously, but it is not limited thereto. Also, the irradiation of the second laser beam L2 along the nine second planned irradiation lines IL2 is performed a plurality of times (three times in this example) along the same second planned irradiation line IL2. Note that the three vertically arranged second laser beams L2 shown in FIG. 4 mean that the second laser beam L2 is irradiated three times.

[0042] In the third step, as shown in FIG. 6, by irradiating the exposed surface (including the surface of the semiconductor layer 2 and the side surfaces of the resin layer 4 and the wiring layer 3) at the aperture 5 with a third laser beam L3 having lower energy than the first laser beam L1 and the second laser beam L2, the deposits (debris) attached to the exposed surface in the first step and the second step are removed. In the third step, the irradiation of the third laser beam L3 to the exposed surface is performed a plurality of times along the longitudinal direction of the divided region DA (the direction perpendicular to the paper surface in FIG. 6).

[0043] More specifically, the irradiation of the third laser beam L3 in the third step is performed by irradiating the third laser beam L3 along each of a plurality (in this example, three) of third planned irradiation lines (not shown) that are spaced apart from each other in the width direction of the divided region DA (the left-right direction in FIG. 6) and extend in the longitudinal direction of the divided region DA.

[0044] In addition, the irradiation of the third laser beam L3 along the plurality of third planned irradiation lines in the third step starts from the irradiation along the third planned irradiation line closer to the center in the width direction of the divided region DA. The third laser beam L3 irradiated along the third planned irradiation line closer to the center preferably has a third pulse width shorter than the first pulse width (for example, a pulse width on the order of femtoseconds), and preferably has a width dimension of 80% or more of the width dimension of the divided region DA. Further, the third laser beam L3 is preferably performed a plurality of times (in this example, three times) along the same third planned irradiation line. On the other hand, the third laser beam L3 irradiated along the third planned irradiation line closer to the end in the width direction of the divided region DA in the third step preferably has a width dimension of 20% or less of the width dimension of the divided region DA, and the irradiation may be performed at least once.

[0045] In the plasma etching process, as shown in FIG. 7, the semiconductor layer 2 exposed in the opening 5 is etched by plasma to obtain a plurality of element chips 10 each corresponding to the element region EA. Each element chip 10 corresponds to the element region EA of the substrate 1. The plasma etching may be performed, for example, by applying a Bosch process.

[0046] In the plasma etching process, the plasma processing apparatus 30 (plasma etching apparatus 30) shown in FIG. 8 may be used. The plasma processing apparatus 30 includes a chamber 31 having a dielectric window provided at the top and defining a processing chamber 34, an antenna 32 as an upper electrode provided above the chamber 31, a first high-frequency power source 33 electrically connected to the antenna 32, a stage 35 as a lower electrode provided on the bottom side of the processing chamber 34 on which the substrate 1 is placed, and a second high-frequency power source 36 electrically connected to the stage 35. A gas inlet 37 provided in the chamber 31 is fluidly connected to a source gas source 38. An exhaust port 39 provided in the chamber 31 is fluidly connected to a vacuum exhaust section 40 including a vacuum pump.

[0047] In the plasma processing apparatus 30 shown in FIG. 8, after placing the substrate 1 on the stage 35, the processing chamber 34 is evacuated by the vacuum exhaust section 40, and a source gas is supplied from the source gas source 38 to the processing chamber 34. Thereafter, high-frequency power is supplied from the first high-frequency power source 33 to the antenna 32 to generate plasma in the processing chamber 34 and irradiate the substrate 1. The semiconductor layer 2 exposed at the bottom of the opening 5 can be removed by the physicochemical action of radicals and ions in the plasma. Note that by supplying high-frequency power from the second high-frequency power source 36 to the stage 35, it is possible to control the collision speed of radicals and ions with respect to the substrate 1.

[0048] <Supplementary Note> According to the description of the above embodiments, the following techniques are disclosed. (Technique 1) A substrate including a semiconductor layer having a first main surface and a second main surface, a wiring layer formed on the first main surface side of the semiconductor layer, and a resin layer formed on the wiring layer, the method comprising: a preparation step of preparing a substrate including a plurality of element regions and division regions defining the element regions; a laser grooving step of irradiating the division region with a laser beam from the first main surface side to form an opening in which the semiconductor layer is exposed in the division region; a plasma etching step of etching the semiconductor layer exposed in the opening by plasma to obtain a plurality of element chips; comprising wherein the laser grooving process includes a first step of irradiating the resin layer with a first laser beam having a first pulse width to remove the resin layer corresponding to the division region and expose the wiring layer; and a second step of irradiating the wiring layer exposed in the first step with a second laser beam having a second pulse width shorter than the first pulse width to remove the wiring layer corresponding to the division region and expose the semiconductor layer; and in the first step, the irradiation of the first laser beam onto the resin layer corresponding to the division region is performed multiple times along the longitudinal direction of the division region, a method for manufacturing an element chip. (Technology 2) The method for manufacturing an element chip according to Technology 1, wherein the irradiation of the first laser beam in the first step is set to be spaced apart from each other in the width direction of the division region, and the first laser beam is irradiated along each of a plurality of first planned irradiation lines extending in the longitudinal direction of the division region. (Technology 3) The method for manufacturing an element chip according to Technology 2, wherein the irradiation of the first laser beam along the plurality of first planned irradiation lines in the first step is started from the irradiation along the first planned irradiation line closest to the end in the width direction of the division region. (Technology 4) The method for manufacturing an element chip according to Technology 3, wherein the irradiation of the first laser beam along the first planned irradiation line closest to the end in the width direction of the division region in the first step is performed multiple times along the same first planned irradiation line. (Technology 5) The irradiation of the second laser beam in the second step includes setting the second laser beam to be spaced apart from each other in the width direction of the division region, and irradiating the second laser beam along each of a plurality of second planned irradiation lines extending in the longitudinal direction of the division region, The first irradiation planned line and the second irradiation planned line are set such that a second region sandwiched between a pair of the second irradiation planned lines located most outward in the width direction of the divided region is inside a first region sandwiched between a pair of the first irradiation planned lines located most outward in the width direction of the divided region. The method for manufacturing an element chip according to any one of Technologies 2 to 4. (Technology 6) Irradiation of the first laser beam in the first step is performed a plurality of times along the same first irradiation planned line set to extend in the longitudinal direction of the divided region. The method for manufacturing an element chip according to Technology 1. (Technology 7) The first laser beam is a UV laser or an infrared laser. The method for manufacturing an element chip according to any one of Technologies 1 to 6.

Industrial Applicability

[0049] This disclosure can be used in a method for manufacturing an element chip.

Explanation of Signs

[0050] 1: Substrate 2: Semiconductor layer 2a: First main surface 2b: Second main surface 3: Wiring layer 4: Resin layer 5: Opening 10: Element chip 20: Holding tape 30: Plasma processing apparatus 31: Chamber 32: Antenna 33: First high-frequency power source 34: Processing chamber 35: Stage 36: Second high-frequency power source 37: Gas inlet 38: Source gas source 39: Exhaust port 40: Vacuum exhaust section DA: Divided region EA: Element region IL1: First irradiation planned line IL2: Second irradiation planned line L1: First laser beam L2: Second laser beam L3: Third laser beam

Claims

1. A substrate comprising a semiconductor layer having a first main surface and a second main surface, a wiring layer formed on the first main surface side of the semiconductor layer, and a resin layer formed on the wiring layer, the method comprising a preparation step of preparing a substrate comprising a plurality of element regions and a division region defining the element regions, a laser grooving step of irradiating the division region with laser light from the first main surface side to form an opening in which the semiconductor layer is exposed in the division region, a plasma etching step of obtaining a plurality of element chips by etching the semiconductor layer exposed in the opening with plasma, comprising: The laser grooving step includes: a first step of irradiating the resin layer with first laser light having a first pulse width to remove the resin layer corresponding to the division region and expose the wiring layer; a second step of irradiating the wiring layer exposed in the first step with second laser light having a second pulse width shorter than the first pulse width to remove the wiring layer corresponding to the division region and expose the semiconductor layer; having: In the first step, the irradiation of the first laser light onto the resin layer corresponding to the division region is performed a plurality of times along the longitudinal direction of the division region. A method for manufacturing an element chip.

2. The irradiation of the first laser light in the first step is set to be spaced apart from each other in the width direction of the division region, and includes irradiating the first laser light along each of a plurality of first irradiation planned lines extending in the longitudinal direction of the division region. The method for manufacturing an element chip according to claim 1.

3. The irradiation of the first laser light along the plurality of first irradiation planned lines in the first step starts from the irradiation along the first irradiation planned line closest to the end in the width direction of the division region. The method for manufacturing an element chip according to claim 2.

4. The irradiation of the first laser light along the first irradiation planned line closest to the end in the width direction of the division region in the first step is performed a plurality of times along the same first irradiation planned line. The method for manufacturing an element chip according to claim 3.

5. The irradiation of the second laser light in the second step is set to be spaced apart from each other in the width direction of the division region, and includes irradiating the second laser light along each of a plurality of second irradiation planned lines extending in the longitudinal direction of the division region, In the method for manufacturing an element chip according to claim 2, the first irradiation planned line and the second irradiation planned line are set such that a second region sandwiched between a pair of the second irradiation planned lines located most outward in the width direction of the divided region is inside a first region sandwiched between a pair of the first irradiation planned lines located most outward in the width direction of the divided region.

6. In the method for manufacturing an element chip according to claim 1, the irradiation of the first laser beam in the first step is performed a plurality of times along the same first irradiation planned line set to extend in the longitudinal direction of the divided region.

7. The first laser beam is a UV laser or an infrared laser in the method for manufacturing an element chip according to any one of claims 1 to 6.

Images