Back surface design for flat silicon carbide susceptor

Abstract

To provide a susceptor used in semiconductor wafer processing.SOLUTION: A susceptor for use in a processing chamber for supporting a wafer includes a susceptor substrate having a front surface and a back surface opposite the front surface, and a coating layer deposited on the susceptor substrate. The front surface has a pocket configured to hold the wafer to be processed in the processing chamber, and the pocket is textured with a first pattern. The back surface is textured with a second pattern.SELECTED DRAWING: Figure 6B

Description

Technical Field

[0001] The embodiments described herein generally relate to susceptors used in semiconductor wafer processing, and more particularly, to silicon carbide coated susceptors having a textured back surface used in an epitaxial deposition process.

Background Art

[0002] The chemical vapor deposition (CVD) process is used, among other processes, in semiconductor wafer processing to epitaxially deposit a thin layer (generally less than 10 microns) on a wafer. In the CVD process, it is necessary to heat the wafer held on the susceptor to a high temperature, for example, up to about 1200 °C. The wafer is typically heated to a high temperature within about 30 minutes from room temperature. For high-quality epitaxial deposition, the susceptor needs to be manufactured to have precise dimensions and maintain its shape, especially flatness, while repeating the rapid heating process and the cooling process. That is, the susceptor is required to have excellent thermal shock resistance, high mechanical strength, and high thermal stability. Further, the material of the susceptor needs to be impermeable to gas and not outgas so that the susceptor acts as a barrier against contaminants released from both the susceptor and the external environment within the CVD chamber. Examples of such materials include silicon carbide (SiC), and thus, the susceptor is typically made from a graphite substrate having a front surface with pockets for holding the wafer inside and a back surface with a flat and planar surface coated with silicon carbide (SiC) by the CVD process. However, it is known that typical SiC-coated graphite susceptors warp and curve during the CVD process. Such warping and curving are induced by the interface stress between the graphite substrate and the SiC coating layer due to the mismatch in the coefficient of thermal expansion (CTE) and design differences between the front and back surfaces of the susceptor. The interface stress is further increased by recent requirements in semiconductor wafer processing, such as an increase in the size of the susceptor for processing larger-sized wafers, an increase in the thickness ratio of the SiC coating layer to the graphite substrate for a lightweight and durable susceptor, and a sophisticated design of the pockets on the front surface of the susceptor.

[0003] Therefore, there is a need for a susceptor that can reduce warping and curving while meeting the requirements of size, weight, and design. SUMMARY OF THE INVENTION

[0004] Embodiments of the present disclosure include a susceptor for use in a processing chamber for supporting a wafer. The susceptor includes a susceptor substrate having a front surface and a back surface opposite the front surface, and a coating layer deposited on the susceptor substrate. The front surface has pockets configured to hold a wafer to be processed within the processing chamber, the pockets being textured in a first pattern, and the back surface being textured in a second pattern.

[0005] Embodiments of the present disclosure also include a processing chamber. The processing chamber includes a chamber body fluidly coupled to one or more gas sources, and a substrate support assembly including a susceptor. The susceptor includes a susceptor substrate having a front surface and a back surface opposite the front surface, and a coating layer deposited on the susceptor substrate. The front surface has pockets configured to hold a wafer to be processed within the processing chamber, the pockets being textured in a first pattern, and the back surface being textured in a second pattern.

[0006] Embodiments of the present disclosure further include a method for manufacturing a susceptor for use in a processing chamber for supporting a wafer. The method includes forming a susceptor substrate having a front surface and a back surface opposite the front surface, forming pockets configured to hold a wafer to be processed within the processing chamber, texturing the pockets in a first pattern, texturing the back surface in a second pattern, and forming a coating layer on the susceptor substrate.

[0007] As the above features of the present disclosure can be understood in detail, a more specific description, briefly summarized above, can be made by reference to examples, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings show only some examples, and thus the present disclosure should not be considered as limiting the scope of the present disclosure since other equally valid examples can be recognized.

Brief Description of the Drawings

[0008]

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DETAILED DESCRIPTION OF THE INVENTION

[0009] For ease of understanding, the same reference numbers are used to indicate the same elements common to the figures as much as possible.

[0010] Generally, the embodiments described herein relate to a susceptor for holding a wafer for semiconductor wafer processing, and more particularly, to a silicon carbide-coated susceptor having a textured back surface used in an epitaxial deposition process. The texture on the back surface of the susceptor reduces the interfacial stress between the susceptor substrate and the coating layer during the epitaxial deposition process, reduces the warping and curvature of the susceptor, and improves the flatness of the susceptor.

[0011] FIG. 1 is a schematic top view of an example of a multi-chamber processing system 100 according to some examples of the present disclosure. The processing system 100 generally includes a factory interface 102, load lock chambers 104, 106, transfer chambers 108, 110 each having a respective transfer robot 112, 114, holding chambers 116, 118, and processing chambers 120, 122, 124, 126, 128, 130. As detailed herein, wafers within the processing system 100 can be processed in various chambers and transferred between various chambers without exposing the wafers to the ambient environment outside the processing system 100 (e.g., an atmospheric ambient environment such as may exist in a fab). For example, wafers can be processed in various chambers in a low pressure (e.g., about 300 Torr or less) or vacuum environment and transferred between various chambers without breaking the low pressure or vacuum environment between the various processes performed on the wafers within the processing system 100. Thus, the processing system 100 can provide an integrated solution for some processing of wafers.

[0012] Examples of processing systems that can be appropriately modified in accordance with the teachings provided herein include the Endura®, Producer® or Centura® integrated processing systems commercially available from Applied Materials, Inc., Santa Clara, California, or other suitable processing systems. It is contemplated that other processing systems, including those from other manufacturers, may be adapted to benefit from the aspects described herein.

[0013] In the illustrated example of FIG. 1, the factory interface 102 includes a docking station 140 and a factory interface robot 142 to facilitate the transfer of wafers. The docking station 140 is configured to receive one or more front-opening unified pods (FOUPs) 144. In some examples, each factory interface robot 142 generally includes a blade 148 disposed at one end of each factory interface robot 142 configured to transfer wafers from the factory interface 102 to the load lock chambers 104, 106.

[0014] Load lock chambers 104, 106 have respective ports 150, 152 coupled to factory interface 102 and respective ports 154, 156 coupled to transfer chamber 108. Transfer chamber 108 further has respective ports 158, 160 coupled to holding chambers 116, 118 and respective ports 162, 164 coupled to processing chambers 120, 122. Similarly, transfer chamber 110 has respective ports 166, 168 coupled to holding chambers 116, 118 and respective ports 170, 172, 174, 176 coupled to processing chambers 124, 126, 128, 130. Ports 154, 156, 158, 160, 162, 164, 166, 168, 170, 172, 174, 176 can be slit valve openings having slit valves for wafer transfer by transfer robots 112, 114, for example, and for sealing between respective chambers to prevent gas passage between the respective chambers. Generally, any port is open for wafer transfer and closed otherwise.

[0015] Load lock chambers 104, 106, transfer chambers 108, 110, holding chambers 116, 118, and processing chambers 120, 122, 124, 126, 128, 130 may be fluidly coupled to a gas and pressure control system (not specifically shown). The gas and pressure control system can include one or more gas pumps (e.g., turbo pumps, cryo pumps, roughing pumps), gas sources, various valves, and conduits fluidly coupled to the various chambers. In operation, the factory interface robot 142 transfers the wafer from the FOUP 144 to the load lock chamber 104 or 106 via port 150 or 152. The gas and pressure control system then pumps down the load lock chamber 104 or 106. The gas and pressure control system further maintains the transfer chambers 108, 110 and the holding chambers 116, 118 in an internal low pressure or vacuum environment (which may include an inert gas). Therefore, the pumping down of the load lock chamber 104 or 106 facilitates the transfer of the wafer, for example, between the atmospheric environment of the factory interface 102 and the low pressure or vacuum environment of the transfer chamber 108.

[0016] With a wafer in the pumped-down load lock chamber 104 or 106, transfer robot 112 transfers the wafer from the load lock chamber 104 or 106 into the transfer chamber 108 via port 154 or 156. Next, transfer robot 112 can transfer the wafer to either of the processing chambers 120, 122 for processing via respective ports 162, 164 and / or between any of the processing chambers 120, 122, and can transfer the wafer to the holding chambers 116, 118 for holding to await further transfer via respective ports 158, 160. Similarly, transfer robot 114 can access the wafer in the holding chamber 116 or 118 via port 166 or 168, and can transfer the wafer to any of the processing chambers 124, 126, 128, 130 for processing via respective ports 170, 172, 174, 176 and / or between any of the processing chambers 124, 126, 128, 130, and can transfer the wafer to the holding chambers 116, 118 for holding to await further transfer via respective ports 166, 168. Transfer and holding of the wafer within and between the various chambers can be performed within a low pressure or vacuum environment provided by the gas and pressure control system.

[0017] The processing chambers 120, 122, 124, 126, 128, 130 can be any suitable chambers for processing the wafer. In some examples, processing chamber 122 can perform a cleaning process, processing chamber 120 can perform an etching process, and processing chambers 124, 126, 128, 130 can perform respective epitaxial growth processes. Processing chamber 122 may be a SiCoNi (trademark) Preclean chamber available from Applied Materials of Santa Clara, California. Processing chamber 120 may be a Selectra (trademark) etching chamber available from Applied Materials of Santa Clara, California.

[0018] The system controller 190 is coupled to the processing system 100 to control the processing system 100 or its components. For example, the system controller 190 can control the operation of the processing system 100 by using direct control of chambers 104, 106, 108, 116, 118, 110, 120, 122, 124, 126, 128, 130 of the processing system 100 or by controlling controllers associated with chambers 104, 106, 108, 116, 118, 110, 120, 122, 124, 126, 128, 130. In operation, the system controller 190 enables data collection and feedback from each chamber to adjust the performance of the processing system 100.

[0019] The system controller 190 generally includes a central processing unit (CPU) 192, a memory 194, and a support circuit 196. The CPU 192 may be one of any form of general-purpose processor that can be used in an industrial environment. The memory 194 or non-transitory computer-readable medium is accessible by the CPU 192 and may be one or more of a memory such as random access memory (RAM), read-only memory (ROM), a floppy disk, a hard disk, or any other form of digital storage, local or remote. The support circuit 196 is coupled to the CPU 192 and can include a cache, a clock circuit, an input / output subsystem, a power supply, and the like. The various methods disclosed herein may generally be implemented under the control of the CPU 192 by the CPU 192 executing computer instruction code stored in the memory 194 (or the memory of a particular process chamber), for example, as software routines. When the computer instruction code is executed by the CPU 192, the CPU 192 controls the chambers to execute a process according to various methods.

[0020] Other processing systems may have other configurations. For example, more or fewer processing chambers may be coupled to the transfer device. In the illustrated example, the transfer device includes transfer chambers 108, 110 and holding chambers 116, 118. In other examples, more or fewer transfer chambers (e.g., one transfer chamber) and / or more or fewer holding chambers (e.g., no holding chambers) may be implemented as the transfer device in the processing system.

[0021] FIG. 2 is a cross-sectional view of a processing chamber 200 that may be used to perform epitaxial growth. The processing chamber 200 may be any one of the processing chambers 120, 122, 124, 126, 128, 130 of FIG. 1. Non-limiting examples of suitable processing chambers that can be modified according to the embodiments disclosed herein may include RP EPI reactors, Elvis chambers, and Lennon chambers, all of which are commercially available from Applied Materials, Inc. of Santa Clara, California. The processing chamber 200 can be added to a CENTURA® integrated processing system available from Applied Materials, Inc. of Santa Clara, California. The processing chamber 200 is described below to be utilized to implement the various embodiments described herein, although other semiconductor processing chambers from different manufacturers may also be used to implement the embodiments described in this disclosure.

[0022] The processing chamber 200 includes a chamber body 202, a support system 204, and a controller 206. The chamber body 202 includes an upper portion 208 and a lower portion 210. The upper portion 208 includes the region within the chamber body 202 between the upper dome 212 and the wafer W. The lower portion 210 includes the region within the chamber body 202 between the lower dome 214 and the bottom of the wafer W. The deposition process is generally performed on the upper surface of the wafer W within the upper portion 208.

[0023] The support system 204 includes components used to execute and monitor a predetermined process such as the growth of an epitaxial film within the processing chamber 200. The controller 206 is coupled to the support system 204 and is adapted to control the processing chamber 200 and the support system 204. The controller 206 may be the system controller 190 or a controller controlled by the system controller 190 to control processes within the processing chamber 200.

[0024] The processing chamber 200 includes a plurality of heat sources such as a lamp 216 adapted to supply thermal energy to components disposed within the processing chamber 200. For example, the lamp 216 may be adapted to supply thermal energy to the wafer W, the susceptor 218, and / or the preheating ring 220. The lower dome 214 may be formed of an optically transparent material such as quartz to facilitate the passage of thermal radiation. It is contemplated that the lamp 216 may be arranged to supply thermal energy through the upper dome 212 as well as the lower dome 214.

[0025] The chamber body 202 includes a plurality of plenums formed therein. The plenums are in fluid connection with one or more gas sources 222 such as a carrier gas, and one or more precursor sources 224 such as a deposition gas and a dopant gas. For example, the first plenum 226 may be adapted to supply the deposition gas 228 to the upper portion 208 of the chamber body 202 therethrough, and the second plenum 230 may be adapted to exhaust the deposition gas 228 from the upper portion 208. Thus, the deposition gas 228 can flow parallel to the upper surface of the wafer W.

[0026] When a liquid precursor is used, the processing chamber 200 can include a liquid vaporizer 232 that is fluidly connected to a liquid precursor source 234. The liquid vaporizer 232 is used to vaporize the liquid precursor supplied to the processing chamber 200. Although not shown, it is contemplated that the liquid precursor source 234 may include, for example, one or more ampoules of precursor liquid and solvent liquid, a shut-off valve, and a liquid flow meter (LFM).

[0027] The substrate support assembly 236 is disposed in the lower portion 210 of the chamber body 202. The substrate support assembly 236 is shown to support the wafer W at the processing position. The substrate support assembly 236 includes a susceptor support shaft 238 formed from an optically transparent material and a susceptor 218 supported by the susceptor support shaft 238. The shaft 240 of the susceptor support shaft 238 is disposed within a shroud 242 to which lift pin contacts 244 are coupled. The susceptor support shaft 238 is rotatable to facilitate rotation of the wafer W during processing. Rotation of the susceptor support shaft 238 is facilitated by an actuator 246 coupled to the susceptor support shaft 238. The shroud 242 is generally fixed in place and thus does not rotate during processing. Support pins 248 couple the susceptor support shaft 238 to the susceptor 218.

[0028] The lift pins 250 are disposed through openings (not labeled) formed in the susceptor support shaft 238. The lift pins 250 are operable in a vertical direction and are adapted to contact the lower surface of the substrate W and lift the substrate W from the processing position (as shown) to a substrate removal position.

[0029] The preheating ring 220 is removably disposed on a lower liner 252 coupled to the chamber body 202. The preheating ring 220 is disposed around the internal volume of the chamber body 202 and surrounds the substrate W while the substrate W is at the processing position. The preheating ring 220 facilitates preheating of the process gas when the process gas enters the chamber body 202 through a first plenum 226 adjacent to the preheating ring 220.

[0030] The central window portion 254 of the upper dome 212 and the bottom portion 256 of the lower dome 214 may be formed of an optically transparent material such as quartz. The peripheral flange 258 of the upper dome 212 that engages the central window portion 254 around the circumference of the central window portion 254, and the peripheral flange 260 of the lower dome 214 that engages the bottom portion 256 around the circumference of the bottom portion 256 may all be formed of opaque quartz to prevent the O-ring 262 adjacent to the peripheral flange from being directly exposed to thermal radiation. The peripheral flange 258 may be formed of an optically transparent material such as quartz.

[0031] Figures 3A and 3B are a cross-sectional view and a top view of a scanning electron microscope (SEM) image of a susceptor 300 according to an embodiment. The susceptor 300 may be the susceptor 218 disposed in the processing chamber 200 of FIG. 2. The susceptor 300 includes a susceptor substrate 302 and a coating layer 304. The susceptor substrate 302 is formed of graphite. The coating layer 304 is formed of silicon carbide (SiC). The graphite substrate 302 may be porous and have pores 306 in which silicon carbide (SiC) tendrils are formed. The formation of this silicon carbide (SiC) brings about an improvement in the mechanical properties of the susceptor 300.

[0032] FIG. 4 is a flow diagram of a method 400 that can be utilized to manufacture a susceptor 500 having a front surface 508 and a back surface 510 opposite the front surface 508, according to one embodiment. FIGS. 5A, 5B, and 5C are schematic cross-sectional views of a portion of the susceptor 500 corresponding to various stages of the method 400. FIGS. 6A, 6B, 6C, and 6D are perspective, front, enlarged front, and back views of the susceptor 500 manufactured in accordance with the method 400. FIGS. 7A, 7B, 7C, 7D, 7E, 7F, and 7G show various patterns that can be applied to the back surface 510 of the susceptor 500 in accordance with the method 400. The susceptor 500 may be the susceptor 218 disposed in the processing chamber 200 of FIG. 2.

[0033] In block 402, a susceptor substrate 502 is formed. First, the susceptor substrate 502 is prepared by slicing any suitable graphite billet into a disk-shaped plate and grinding the surface of the disk-shaped plate, as shown in FIG. 5A. The susceptor substrate 502 may be formed of graphite having a purity of at least 99%. The susceptor substrate 502 can have a diameter of about 150 mm to about 400 mm, such as about 370 mm, and a thickness of about 1 mm to about 15 mm, such as about 3.70 mm.

[0034] In block 404, the susceptor substrate 502 can then undergo a surface treatment, such as precision machining, to apply a specific surface structure to the surface of the susceptor substrate 502. The surface structure can be applied using conventional methods known in the art. During the surface treatment, as shown in FIG. 5B, a pocket 512 for holding a wafer (not shown) is formed in the susceptor ledge 514 on the front surface 508 of the susceptor 500. The pocket 512 may be a cylindrical recess having a diameter of about 150 mm to about 300 mm, such as about 300 mm, and a depth of about 0.30 mm to about 1.00 mm, such as about 0.40 mm. The susceptor ledge 514 may have a width of about 15 mm to about 70 mm, such as about 35 mm. The back surface 510 of the susceptor is machined to a flat and planar surface.

[0035] Thereafter, the surface 516 of the pocket 512 on the front face 508 is textured with a grid pattern 518 by precision machining as shown in FIGS. 6B and 6C. The grid pattern 518 can have a width of from about 0.20 mm to about 3.00 mm, such as about 0.43 mm, a pitch of from about 0.80 mm to about 3.00 mm, such as about 1.14 mm, and a depth of from about 0.10 mm to about 5.00 mm, such as about 0.31 mm.

[0036] In block 404, the back surface 510 is also textured by precision machining. In some embodiments, the surface 520 of the back surface 510 is uniformly textured in a pattern. An example of the pattern is a grid pattern that matches the grid pattern 518 applied to the surface 516 of the pocket 512 on the front surface 508. Another example of the pattern is, for example, a stripe pattern having a width of about 0.50 mm to about 30.00 mm, such as about 3 mm, a pitch of about 0.50 mm to about 3.00 mm, such as about 0.8 mm, and a depth of about 0.10 mm to about 5.00 mm, such as about 0.3 mm. In some other embodiments, a ring pattern 522 is formed on the outer edge of the surface 520 of the back surface 510. The ring pattern 522 can have a thickness of about 0.10 mm to about 5.00 mm, such as about 0.30 mm, and a width of about 5.00 mm to about 50.00 mm, such as about 35.00 mm. The width of the ring pattern 522 may be similar to the width of the susceptor ledge 514 on the front surface 508 to compensate for the interfacial stress induced by the structural difference between the front surface 508 and the back surface 510. In one example, the ring pattern 522 includes a notch 524 as shown in FIG. 7A. The notch 524 can have a width of about 5 mm to about 45 mm, such as about 30 mm, and a length of about 50 mm to about 120 mm, such as about 100 mm. In another example, the ring pattern 522 is formed of an array of rod-shaped portions 526 radially arranged on the outer edge of the surface 520 of the back surface 510 as shown in FIG. 7B. Each rod-shaped portion 526 can have a length of about 10 mm to about 50 mm, such as about 30 mm, and a width of about 0.50 mm to about 5.00 mm, such as about 1.00 mm. The ring pattern 522 may include other shapes as shown in FIGS. 7C and 7D. In some other embodiments, a plurality of ring patterns 528 as shown in FIG. 7E, a plurality of radial line patterns 530 as shown in FIG. 7F, and a combination of a plurality of ring patterns 528 and a plurality of radial line patterns 530 as shown in FIG. 7G may be formed on the surface 520 of the back surface 510.The plurality of ring patterns 528 can each have a width of from about 1 mm to about 20 mm, such as about 1.60 mm, a depth of from about 0.1 mm to about 5 mm, such as about 0.30 mm, a diameter varying from about 150 mm to about 300 mm, and a radial distance between adjacent ring patterns 528 of from about 1 mm to about 20 mm, such as about 1.60 mm. The plurality of radial line patterns 530 can each have a width of from about 1 mm to about 20 mm, such as about 1.60 mm, a depth of from about 0.1 mm to 5 mm, such as about 0.30 mm, a length of from about 150 mm to about 300 mm, such as about 300 mm, and an angle between adjacent radial line patterns 530 of from about 0.5° to about 45°, such as about 5°.

[0037] In block 406, the susceptor substrate 502 can then undergo a purification process and a chlorination process. The susceptor substrate 502 can be heated in a furnace and purged with nitrogen gas at a temperature of about 2000°C. Metal element impurities are removed from the susceptor substrate 502 by purging chlorine gas into the furnace to chlorinate a carbonaceous material such as graphite to remove the metal element impurities. In the purification process and the chlorination process, the impurity level of the susceptor substrate 502 can be reduced to less than about 5 ppm.

[0038] In block 408, a coating layer 504 is formed on the susceptor substrate 502 by conformally depositing silicon carbide (SiC) on the susceptor substrate 502 by a CVD process. Silicon carbide (SiC) is deposited by using an organosilicon precursor. The coating layer 504 can have a thickness of from about 40 μm to about 300 μm, such as about 80 μm.

[0039] In block 410, the susceptor 500 having the coating layer 504 on the susceptor substrate 502 then undergoes a quality assurance (QA) inspection. The final dimensions of the susceptor 500 are determined by coordinate measuring machine (CMM) measurements by sensing discrete points on the surface of the susceptor 500.

[0040] The inventors observed the warping and curvature of susceptor 500 having a thickness of about 3.70 mm with a flat and planar surface on the back surface 510 manufactured according to blocks 402-410 of method 400 described above (i.e., not including block 410 for texturing the back surface 510 of susceptor 500), and no reduction in warping and curvature of susceptor 500 having a thickness of about 5.00 mm and about 6.35 mm, each having a flat and planar surface on the back surface, was observed respectively. The inventors observed that compared to susceptor 500 having a thickness of about 3.70 mm with a flat and planar surface on the back surface 510, the warping and curvature were reduced by about 75.5% in a susceptor having a thickness of about 3.70 mm with a back surface 510 textured with a grid pattern that matches the grid pattern 518 applied to the surface 516 of pocket 512 on the front surface 508, and the warping and curvature were reduced by about 64.6% in a susceptor 500 having a thickness of about 3.70 mm with a back surface 510 textured with a stripe pattern.

[0041] In the embodiments described herein, a silicon carbide coated susceptor for holding a wafer in an epitaxial deposition process has its back surface textured. The texture on the back surface of the susceptor reduces the interfacial stress between the susceptor substrate and the coating layer during the epitaxial deposition process, reduces the warping and curvature of the susceptor, and improves the flatness of the susceptor.

[0042] It should be noted that the specific configurations described above are among some possible exemplary designs of a flat susceptor according to the present disclosure and do not limit the possible configurations, specifications, etc. of the patterns according to the present disclosure. For example, the texture on the back surface of the susceptor is not limited to the patterns described above. In other examples, the back surface of the susceptor may be textured with other patterns to reduce the interfacial stress between the susceptor substrate and the coating layer caused during the epitaxial process.

[0043] Although the above has been directed to specific embodiments, other additional embodiments may be devised without departing from the basic scope thereof, which is determined by the following claims.

Claims

1. 1. A susceptor for use in a processing chamber for supporting a wafer, comprising: a susceptor substrate having a front surface and a back surface opposite the front surface; a coating layer deposited on the susceptor substrate; Equipped with the front surface having a pocket configured to hold a wafer to be processed in a processing chamber, the pocket being textured with a first pattern; the back surface being textured with a second pattern; Susceptor.

2. The susceptor of claim 1, wherein the first pattern is a grid pattern having a width of 0.20 mm to 3.00 mm, a pitch of 0.80 mm to 3.00 mm, and a depth of 0.10 mm to 5.00 mm.

3. The susceptor of claim 2 , wherein the second pattern is identical to the first pattern.

4. The susceptor of claim 2, wherein the second pattern is a stripe pattern having a width of 0.50 mm to 30.00 mm, a pitch of 0.50 mm to 3.00 mm, and a depth of 0.10 mm to 5.00 mm.

5. The susceptor of claim 2 , wherein the second pattern includes a ledge formed on an outer edge of the back surface.

6. The susceptor of claim 1 , wherein the susceptor substrate comprises graphite.

7. 2. The susceptor of claim 1, wherein the susceptor substrate is a disk-shaped plate having a diameter of 150 mm to 400 mm and a thickness of 1 mm to 15 mm.

8. The susceptor of claim 1, wherein the pocket is a cylindrical recess having a diameter of 150 mm to 300 mm and a depth of 0.30 mm to 1.00 mm.

9. The susceptor of claim 1 , wherein the coating layer comprises silicon carbide (SiC).

10. A processing chamber comprising: a chamber body in fluid communication with one or more gas sources; 1. A substrate support assembly comprising a susceptor, the susceptor comprising: a susceptor substrate having a front surface and a back surface opposite the front surface; and a coating layer deposited on the susceptor substrate; Equipped with the front surface having a pocket configured to hold a wafer to be processed in a processing chamber, the pocket being textured with a first pattern; the back surface being textured with a second pattern; a substrate support assembly; A processing chamber comprising:

11. 11. The processing chamber of claim 10, wherein the first pattern is a grid pattern having a width between 0.20 mm and 3.00 mm, a pitch between 0.80 mm and 3.00 mm, and a depth between 0.10 mm and 5.00 mm.

12. The processing chamber of claim 11 , wherein the second pattern is identical to the first pattern.

13. 12. The processing chamber of claim 11, wherein the second pattern is a stripe pattern having a width of 0.50 mm to 30.00 mm, a pitch of 0.5 mm to 3.00 mm, and a depth of 0.10 mm to 5.00 mm.

14. The processing chamber of claim 11 , wherein the second pattern comprises a ledge formed on an outer edge of the back surface.

15. the susceptor substrate comprises graphite; The coating layer comprises silicon carbide (SiC); The susceptor of claim 1 .

16. 1. A method for manufacturing a susceptor for use in a processing chamber for supporting a wafer, comprising: forming a susceptor substrate having a front surface and a back surface opposite the front surface; forming a pocket configured to hold a wafer to be processed in a processing chamber; texturing the pocket with a first pattern; texturing the back surface with a second pattern; forming a coating layer on the susceptor substrate; A method comprising:

17. 17. The method of claim 16, wherein the first pattern is a grid pattern having a width of 0.20 mm to 3.00 mm, a pitch of 0.80 mm to 3.00 mm, and a depth of 0.10 mm to 5.00 mm.

18. The method of claim 17 , wherein the second pattern is identical to the first pattern.

19. 18. The method of claim 17, wherein the second pattern is a stripe pattern having a width of 0.50 mm to 30.00 mm, a pitch of 0.50 mm to 3.00 mm, and a depth of 0.10 mm to 5.00 mm.

20. The method of claim 17 , wherein the second pattern includes a ledge formed on an outer edge of the back surface.

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