Semiconductor structure and semiconductor device
By forming an Al-containing film on a SiC-coated susceptor and removing the dummy substrate before growing the group III nitride semiconductor, the method addresses Si mixing issues, ensuring consistent Si concentration and improved device characteristics.
Patent Information
- Application Number
- JP2025068378
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-04-17
- Publication Date
- 2025-07-03
AI Technical Summary
The variation in Si concentration within and between wafers due to separation from the SiC film of the susceptor into the group III nitride semiconductor during the manufacturing process is not adequately addressed by existing methods, leading to inconsistent device characteristics.
A preparation step involving the formation of an Al-containing film on a SiC-coated susceptor at high temperature followed by cooling and removal of a dummy substrate before growing the group III nitride semiconductor, without using ammonia, to prevent Si mixing.
This method effectively suppresses the variation in Si concentration, resulting in more consistent semiconductor properties across the wafer and between lots.
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Figure 2025100768000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for manufacturing a group III nitride semiconductor in which a group III nitride semiconductor is grown on a substrate using a susceptor on which a SiC film is formed.
Background Art
[0002] Group III nitride semiconductors are mainly grown using a MOCVD apparatus. In MOCVD, a substrate is placed on a carbon susceptor, the susceptor is heated to heat the substrate to a desired temperature, and a group III nitride semiconductor is crystal-grown by reacting a source gas on the substrate.
[0003] Here, the carbon susceptor reacts with ammonia, which is a group V source gas. Therefore, it is common to use a susceptor whose surface is coated with a SiC film.
[0004] Patent Document 1 describes that a pretreatment step is performed before forming a group III nitride semiconductor having a high Al content. In the pretreatment step, it is described that a dummy layer made of AlN is formed on a dummy substrate at 1100°C or higher. Thereby, impurities such as group III metals and nitrogen deposited in the reaction furnace are incorporated into the dummy layer, and impurities in the group III nitride semiconductor having a high Al content to be formed thereafter are reduced.
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0006] In a vertical power device, the donor concentration of the drift layer has a great influence on device characteristics such as breakdown voltage and on-resistance. Also, in a lateral power device, the resistance of the buffer layer affects the breakdown voltage. However, as a result of the inventors' study, it was found that when using a SiC-coated susceptor, Si separates from the SiC film and unintentionally mixes into the group III nitride semiconductor. Therefore, there has been a problem that the Si concentration in the drift layer and the buffer layer varies within a wafer or varies between lots.
[0007] Further, Patent Document 1 suppresses impurities deposited in the reactor from mixing into the group III nitride semiconductor, and does not suppress Si separated from the SiC film of the susceptor from mixing into the group III nitride semiconductor.
[0008] Therefore, an object of the present invention is to suppress variations in the Si concentration of a group III nitride semiconductor in a method for manufacturing a group III nitride semiconductor.
Means for Solving the Problems
[0009] The present invention relates to a method for manufacturing a group III nitride semiconductor having a growth step of installing a substrate on a susceptor whose surface is covered with a SiC film and forming a group III nitride semiconductor on the substrate, and having a preparation step before the growth step, the preparation step including: a first step of installing a dummy substrate on the susceptor; a second step of heating the susceptor to 1100° C. or higher and supplying an Al raw material to form a film containing Al on the SiC film; and a third step of removing the dummy substrate from the susceptor.
[0010] In the present invention, in the second step, it is not necessary to supply ammonia gas.
[0011] In the present invention, in the second step, the flow rate of the carrier gas that transports the Al raw material may be changed.
[0012] In the present invention, after the second step and before the third step, a semiconductor layer made of a group III nitride semiconductor may be formed on the film containing Al.
Advantages of the Invention
[0013] According to the present invention, it is possible to suppress the mixing of Si from the SiC film of the susceptor into the group III nitride semiconductor. Therefore, it is possible to suppress the variation in the Si concentration of the group III nitride semiconductor.
Brief Description of the Drawings
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Embodiments for Carrying Out the Invention
[0015] Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0016] (First Embodiment) The manufacturing method of a semiconductor device made of a group-III nitride semiconductor according to the first embodiment includes a preparation step S1, a crystal growth step S2, and a device step S3. FIG. 1 is a flowchart showing the manufacturing process of the group-III nitride semiconductor according to the first embodiment. As shown in FIG. 1, the preparation step S1 is a step performed before crystal-growing a group-III nitride semiconductor on a substrate. The growth step S2 is a step of actually crystal-growing a group-III nitride semiconductor on the substrate after the preparation step S1. After repeating the growth step S2 about 1 to 20 times, the preparation step S1 is performed again. Also, the device step S3 is a step performed after each growth step S2, and is an element manufacturing step other than the formation of the group-III nitride semiconductor, for example, an electrode formation step. The preparation step S1 and the growth step S2 are steps inside the reaction furnace of the MOCVD apparatus, and the device step S3 is a step outside the reaction furnace. Hereinafter, the preparation step S1, the growth step S2, and the device step S3 will be described.
[0017] (Preparation Step S1) In the preparation step S1, first, a dummy substrate 3 is placed in the recess 2 of the susceptor 1 (see FIG. 2(a)). As the susceptor 1, one coated with SiC is used. That is, one in which the surface of the susceptor 1 made of carbon is covered with the SiC film 4 is used. The SiC film 4 is provided to prevent the reaction between ammonia and carbon which is the material of the susceptor 1. Ammonia becomes a nitrogen source gas in the crystal growth of the group-III nitride semiconductor by the MOCVD method. The material of the dummy substrate 3 may be any material having heat resistance and not reacting with the Al raw material or the carrier gas. For example, sapphire, SiC, AlN, etc. can be used.
[0018] Next, the susceptor 1 is heated to a temperature of 1100°C or higher, and an Al raw material is introduced onto the susceptor 1. The pressure may be normal pressure or reduced pressure, but a pressure similar to that in the growth step S2 is preferred. As the Al raw material, any material may be used as long as it is the Al raw material used when growing a group III nitride semiconductor by MOCVD, and organometals such as TMA (trimethylaluminum) and TEA (triethylaluminum) can be used. It is preferable to use the same material as the Al raw material used when forming a group III nitride semiconductor containing Al in the growth step S2. In particular, TMA is preferred. Also, the Al raw material is usually mixed with a carrier gas and supplied. The carrier gas is, for example, hydrogen.
[0019] By introducing the Al raw material, a film 5 containing Al is formed on the SiC film 4 of the susceptor 1 and on the dummy substrate 3 (see Fig. 2(b)). It is unknown specifically what material the film 5 containing Al is, and its thickness is also unknown. However, since the film 5 containing Al is transparent and has no metallic luster, it may be an Al film or a very thin Al film. There is also a possibility that it is a dielectric such as AlC. Of course, it may be a material other than these.
[0020] Forming the film 5 containing Al at 1100°C or higher is to prevent the film 5 containing Al from evaporating when forming the group III nitride semiconductor in the growth step S2. As long as the temperature is higher than the maximum value of the growth temperature of the group III nitride semiconductor in the growth step S2, a temperature below 1100°C is also acceptable. Preferably it is 1150°C or higher, and more preferably 1200°C.
[0021] The flow rate of the carrier gas carrying the Al raw material may be constant or may be changed. When the flow velocity of the carrier gas is increased, the reaction point shifts to the downstream side, so by changing the flow rate of the carrier gas, it becomes easy to form the film 5 containing Al over the entire susceptor 1. When changing the flow rate, it may be changed stepwise or continuously.
[0022] After the formation of the film 5 containing Al, before the next step, a semiconductor layer 6 made of a group-III nitride semiconductor may be further formed on the film 5 containing Al by MOCVD method (see Fig. 3). When the susceptor 1 is cooled down, the film 5 containing Al may peel off from the SiC film 4 due to the stress caused by the difference in thermal expansion coefficients between the SiC film 4 and the film 5 containing Al. Therefore, by forming the semiconductor layer 6 made of a group-III nitride semiconductor on the film 5 containing Al, peeling of the film 5 containing Al during cooling can be suppressed. The semiconductor layer 6 is preferably GaN. Also, the thickness of the semiconductor layer 6 is, for example, 1 to 2 μm.
[0023] Next, the susceptor 1 is cooled down to room temperature, and the dummy substrate 3 is taken out from the recess 2 of the susceptor 1 (see Fig. 2(c)). Since the dummy substrate 3 was installed in the recess 2, the film 5 containing Al is not formed on the bottom surface and the side surface of the recess 2. Therefore, when the substrate 7 is installed in the growth step S2, there is no risk that the film 5 containing Al is transferred and adhered to the substrate 7.
[0024] (Growth step S2) The growth step S2 is a step performed after the preparation step S1. In the growth step S2, the substrate 7 is installed in the recess 2 of the susceptor 1, and a semiconductor layer 8 made of a group-III nitride semiconductor is formed on the substrate 7 by MOCVD method. The wafer may be taken out of the reactor once to etch a part of the semiconductor layer 8, and then the wafer may be put back into the reactor after etching to regrow the semiconductor layer 8. The substrate 7 may be any material capable of growing a group-III nitride semiconductor. For example, for a lateral semiconductor device, an insulating substrate such as sapphire, and for a vertical device, a conductive substrate such as GaN.
[0025] The semiconductor layer 8 has a layer structure corresponding to the semiconductor device to be fabricated. For example, in the case of a vertical FET, as shown in FIG. 4, a structure in which a base layer 10 made of high-concentration n-type GaN, a drift layer 11 made of low-concentration n-type GaN, a channel layer 12 made of p-type GaN, and a contact layer 13 made of high-concentration n-type GaN are laminated in this order. Also, in the case of a vertical Schottky barrier diode, as shown in FIG. 10, a structure in which a base layer 10 made of high-concentration n-type GaN and a drift layer 11 made of low-concentration n-type GaN are laminated in this order. Also, in the case of a lateral HFET, as shown in FIG. 11, a structure in which a buffer layer 14 made of undoped GaN and a barrier layer 15 made of AlGaN are laminated in this order. Or, as shown in FIG. 12, a structure in which an LT-GaN layer 16 made of GaN grown at low temperature, a buffer layer 17 made of undoped GaN, and a barrier layer 18 made of AlGaN are laminated in this order.
[0026] Here, if the preparation step S1 is not performed, Si from the SiC film 4 mixes into the semiconductor layer 8, and the Si concentration varies within the wafer or between lots.
[0027] On the other hand, in the first embodiment in which the preparation step S1 is performed, a film 5 containing Al is formed on the SiC film 4. Therefore, it is possible to suppress the separation of Si from the SiC film 4 during the growth step S2 and suppress the mixing into the group III nitride semiconductor.
[0028] After repeating the growth step S2 about 1 to 20 times, the preparation step S1 is performed again. By repeating the growth step S2, the film 5 containing Al may peel off from the SiC film 4. Therefore, by performing the preparation step S1 again, the film 5 containing Al is overwritten, or the film 5 containing Al is formed again at the peeled portion.
[0029] (Device process S3) The device process S3 is a process performed after each growth process S2. In the device process S3, device fabrication processes other than the formation of the semiconductor layer 8 are performed. That is, various processes are performed outside the reactor of the MOCVD apparatus. For example, an insulating film formation process, an etching process, an electrode formation process, and the like. Thus, a semiconductor device is fabricated.
[0030] In the manufacturing method of the semiconductor device of the first embodiment described above, the preparation process S1 is performed before the growth process S2, and a film 5 containing Al is formed on the SiC film 4 of the susceptor 1. Therefore, it is possible to suppress the separation of Si from the SiC film 4 and its mixing into the semiconductor layer 8 in the growth process S2, and it is possible to suppress the variation in Si concentration within the wafer and the variation in Si concentration between lots.
[0031] Next, various experimental results related to the first embodiment will be described.
[0032] (Example 1) In Example 1, a vertical FET was fabricated by the preparation process S1, the growth process S2, and the device process S3.
[0033] First, the preparation process S1 was performed as follows. A 2-inch diameter dummy substrate 3 made of sapphire was placed in the recess 2 of the susceptor 1 coated with the SiC film 4. Then, while flowing hydrogen into the reactor at a flow rate of 72 slm, the susceptor 1 was heated to 1108 °C, TMA was introduced into the reactor at a flow rate of 67.1 μmol / min, and a film 5 containing Al was formed on the SiC film 4 of the susceptor 1. The hydrogen flow rate was 72 slm for the first 10 minutes after introducing TMA, 60 slm for the next 10 minutes, and 48 slm for the last 5 minutes, and the flow rate was changed in three steps. Thus, a film 5 containing Al was formed over the entire susceptor 1.
[0034] Next, hydrogen was introduced into the reactor at a flow rate of 72 slm, TMG (trimethylgallium) at 938.7 μmol / min, and ammonia at 1383929 μmol / min for 60 minutes. Thereby, a semiconductor layer 6 made of GaN was formed on the film 5 containing Al, and peeling of the film 5 containing Al was prevented.
[0035] Next, the introduction of TMG was stopped, the heating of susceptor 1 was stopped, and at the same time, the hydrogen introduced into the reactor was switched to nitrogen, and the nitrogen flow rate was decreased to 36 slm and the ammonia flow rate was decreased to 669643 μmol / min. When the temperature of susceptor 1 reached 700 °C, the nitrogen flow rate was decreased to 6 slm and the ammonia flow rate was decreased to 133939 μmol / min. When the temperature of susceptor 1 reached 400 °C, the introduction of ammonia was stopped. Thereafter, it was confirmed that the temperature of susceptor 1 had dropped to room temperature, and the dummy substrate 3 was taken out of the reactor.
[0036] Next, the growth process S2 was performed as follows. First, a 2-inch diameter substrate 7 made of GaN was placed in the recess 2 of susceptor 1 in the reactor. Then, susceptor 1 was heated to 1080 °C while introducing hydrogen and ammonia into the reactor. Thereafter, in addition to hydrogen and ammonia, TMG and silane were introduced, and an n + -type GaN underlying layer 10 with a thickness of 200 nm was formed. Next, the flow rate of silane was decreased to form an n - -type GaN drift layer 11 with a thickness of 10 μm. Next, hydrogen, TMG, ammonia, and Cp2Mg were introduced into the reactor to form a p-GaN channel layer 12 with a thickness of 0.6 μm. Next, hydrogen, TMG, ammonia, and silane were introduced into the reactor to form an n + -type GaN contact layer 13 with a thickness of 0.2 μm. In this way, the semiconductor layer 8 was formed on the substrate 7 (see FIG. 4).
[0037] Next, the device process S3 was performed as follows. A trench reaching the drift layer 11 from a partial region of the contact layer 13 was formed by dry etching. Then, a gate insulating film was continuously formed on the surface of the contact layer 13 near the trench, the side surface of the trench, and the bottom surface of the trench, and a gate electrode was formed on the gate insulating film. Next, a recess reaching the channel layer 12 from a partial region of the contact layer 13 was formed by dry etching, and a source electrode in contact with the bottom surface of the recess and the contact layer 13 was formed. Next, a drain electrode was formed on the back surface of the substrate 7. Thus, a vertical FET was fabricated. Also, a pn junction diode was formed to measure the donor concentration in the wafer.
[0038] Figure 5 is a diagram showing the result of obtaining the distribution of the donor concentration in the wafer by CV measurement. The average of the donor concentration is 7.8×10 15 cm -3 , the maximum is 8.7×10 15 cm -3 , the minimum is 6.8×10 15 cm -3 , and the standard deviation σ is 5.7×10 14 cm -3 .
[0039] (Comparative Example 1) For comparison, a vertical FET was fabricated in the same manner except that the preparation process S1 was not performed, and a pn junction diode for measuring the donor concentration was fabricated.
[0040] Figure 6 is a diagram showing the result of obtaining the distribution of the donor concentration in the wafer in the comparative example (the distribution of the donor concentration in the drift layer in the semiconductor layer 8) by CV measurement. The average of the donor concentration is 1.19×10 16 cm -3 , the maximum is 1.81×10 16 cm -3 , the minimum is 9.79×10 15 cm -3 , and the standard deviation σ is 2.26×10 15 cm -3 .
[0041] As shown in FIGS. 5 and 6, it was found that by performing the preparation step S1, the variation in the donor concentration within the wafer was reduced.
[0042] FIG. 7 is a graph showing the difference between lots and the variation in the donor concentration within the wafer. When the preparation step S1 is not performed, it was found that the donor concentration varies greatly within the wafer, whereas when the preparation step S1 is performed, the variation is small.
[0043] (Example 2) After performing the preparation step S1 in the same manner as in Example 1, the growth step S2 was performed as follows. A 2-inch diameter substrate 7 made of GaN was placed in the recess 2 of the susceptor 1 in the reactor. Then, while introducing hydrogen and ammonia into the reactor, the susceptor 1 was heated to 1080° C. Thereafter, in addition to hydrogen and ammonia, TMG was introduced, and a semiconductor layer 8 made of undoped GaN was formed to a thickness of 8 μm.
[0044] (Comparative Example 2) For comparison, the semiconductor layer 8 was formed in the same manner except that the preparation step S1 was not performed.
[0045] FIGS. 8 and 9 are graphs showing the results of SIMS analysis of the Si concentration in the semiconductor layer 8, where FIG. 8 is for Comparative Example 2 and FIG. 9 is for Example 2. The horizontal axis is the depth (μm) from the surface of the semiconductor layer 8, and the vertical axis is the Si concentration (cm -3 ).
[0046] As shown in FIG. 8, in Comparative Example 2, although the semiconductor layer 8 is undoped GaN, Si of about 1×10 15 ~1×10 16 cm -3 was detected. This unintended Si contamination is considered to be due to the SiC film 4 covering the surface of the susceptor 1.
[0047] On the other hand, as shown in FIG. 9, in Example 2, the Si concentration in the semiconductor layer 8 is approximately the detection limit (1×10 14 cm -3) As a result, by forming the Al-containing film 5 in the preparation step S1, the mixing of Si into the semiconductor layer 8 separated from the SiC film 4 is suppressed, and it is considered that the intended undoped GaN is formed.
[0048] (Example 3) In Example 3, a vertical Schottky barrier diode was fabricated by the preparation step S1, the growth step S2, and the device step S3. The preparation step S1 is the same as in Example 1.
[0049] After the preparation step S1, the growth step S2 was performed as follows. First, a 2-inch diameter substrate 7 made of GaN was placed in the recess 2 of the susceptor 1 in the reactor. Then, while introducing hydrogen and ammonia into the reactor, the susceptor 1 was heated to 1080 °C. After that, in addition to hydrogen and ammonia, TMG and silane were introduced, and an n + -type GaN underlying layer 10 with a thickness of 200 nm was formed. Next, the flow rate of silane was decreased, and an n - -type GaN drift layer 11 with a thickness of 10 μm was formed. The semiconductor layer 8 was formed on the substrate 7 as described above (see Fig. 10).
[0050] Next, the device step S3 was performed as follows. A Schottky electrode was formed on the surface of the drift layer 11, and an ohmic electrode was formed on the back surface of the substrate 7. Thus, a vertical Schottky barrier diode was fabricated.
[0051] Also in the case of Example 3, it was confirmed that, as in Example 1, the variation in the donor concentration distribution within the wafer was reduced.
[0052] (Example 4) In Example 4, a lateral HFET was fabricated by the preparation step S1, the growth step S2, and the device step S3. The preparation step S1 is the same as in Example 1.
[0053] After the preparation step S1, the growth step S2 was performed as follows. First, a 2-inch diameter substrate 7 made of GaN was placed in the recess 2 of the susceptor 1 in the reactor. Then, while introducing hydrogen and ammonia into the reactor, the susceptor 1 was heated to 1080°C. Thereafter, in addition to hydrogen and ammonia, TMG was introduced to form a 10-μm-thick buffer layer 14 made of undoped GaN. Next, hydrogen, ammonia, TMG, and TMA were introduced to form a 30-nm-thick barrier layer 15 made of AlGaN. In this way, the semiconductor layer 8 was formed on the substrate 7 (see FIG. 11).
[0054] Next, the device step S3 was performed as follows. A gate insulating film was formed on a partial region of the surface of the barrier layer 15, and a gate electrode was formed on the gate insulating film. Next, a source electrode was formed on another region of the surface of the barrier layer 15. Next, a drain electrode was formed on the back surface of the substrate 7. In this way, a vertical HFET was fabricated.
[0055] Also in the case of Example 4, it was confirmed that, as in Example 1, the variation in the distribution of the donor concentration within the wafer was reduced.
[0056] (Example 5) In Example 5, a lateral HFET was fabricated through the preparation step S1, the growth step S2, and the device step S3. The preparation step S1 is the same as in Example 1.
[0057] After the preparation step S1, the growth step S2 was performed as follows. First, a substrate 7 made of sapphire was placed in the recess 2 of the susceptor 1 in the reactor. Then, while introducing hydrogen into the reactor, the susceptor 1 was heated to 1180°C. Thereafter, the temperature was lowered to 550°C, and in addition to hydrogen, ammonia and TMG were introduced to form a 30-nm-thick LT-GaN layer 16. Next, while introducing hydrogen and ammonia into the furnace, the susceptor 1 was heated to 1100°C, and in addition to hydrogen and ammonia, TMG was introduced to form a 1-μm-thick buffer layer 17 made of undoped GaN. Next, hydrogen, ammonia, TMG, and TMA were introduced to form a barrier layer 15 made of AlGaN. In this way, the semiconductor layer 8 was formed on the substrate 7 (see FIG. 12).
[0058] Next, the device process S3 was performed as follows. A gate insulating film was formed on a partial region of the surface of the barrier layer 15, and a gate electrode was formed on the gate insulating film. Next, source and drain electrodes were formed on another region of the surface of the barrier layer 15 that sandwiches the gate electrode. By the above, a lateral HFET was fabricated.
[0059] Also in the case of Example 5, it was confirmed that the variation in the distribution of the donor concentration within the wafer was reduced as in Example 1.
Industrial Applicability
[0060] The present invention is effective for manufacturing power devices and the like.
Explanation of Signs
[0061] 1: susceptor 2: recess 3: dummy substrate 4: SiC film 5: film containing Al 6, 8: semiconductor layer 7: substrate
Claims
1. In a method for manufacturing a group-III nitride semiconductor having a growth step of installing a substrate on a susceptor whose surface is covered with a SiC film and forming a group-III nitride semiconductor on the substrate, a preparation step is included before the growth step, wherein the preparation step includes a first step of installing a dummy substrate on the susceptor, a second step of heating the susceptor to 1100 °C or higher and supplying an Al raw material to form a film containing Al on the SiC film, and a third step of removing the dummy substrate from the susceptor, and a method for manufacturing a group-III nitride semiconductor, characterized by the above.
2. The method for manufacturing a group-III nitride semiconductor according to claim 1, characterized in that ammonia gas is not supplied in the second step.
3. The method for manufacturing a group-III nitride semiconductor according to claim 1 or claim 2, characterized in that the flow rate of the carrier gas carrying the Al raw material is changed in the second step.
4. The method for manufacturing a group-III nitride semiconductor according to claim 1 or claim 2, characterized in that a semiconductor layer made of a group-III nitride semiconductor is formed on the film containing Al after the second step and before the third step.
Citation Information
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